diff options
| -rw-r--r-- | arch/x86/kernel/amd_nb.c | 53 | ||||
| -rw-r--r-- | drivers/hwmon/k10temp.c | 10 | ||||
| -rw-r--r-- | include/linux/pci_ids.h | 3 |
3 files changed, 50 insertions, 16 deletions
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index a6eca647bc76..cc51275c8759 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c | |||
| @@ -11,14 +11,15 @@ | |||
| 11 | #include <linux/errno.h> | 11 | #include <linux/errno.h> |
| 12 | #include <linux/export.h> | 12 | #include <linux/export.h> |
| 13 | #include <linux/spinlock.h> | 13 | #include <linux/spinlock.h> |
| 14 | #include <linux/pci_ids.h> | ||
| 14 | #include <asm/amd_nb.h> | 15 | #include <asm/amd_nb.h> |
| 15 | 16 | ||
| 16 | #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 | 17 | #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 |
| 17 | #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0 | 18 | #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0 |
| 18 | #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 | 19 | #define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480 |
| 19 | #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464 | 20 | #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464 |
| 20 | #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb | ||
| 21 | #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec | 21 | #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec |
| 22 | #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494 | ||
| 22 | 23 | ||
| 23 | /* Protect the PCI config register pairs used for SMN and DF indirect access. */ | 24 | /* Protect the PCI config register pairs used for SMN and DF indirect access. */ |
| 24 | static DEFINE_MUTEX(smn_mutex); | 25 | static DEFINE_MUTEX(smn_mutex); |
| @@ -28,9 +29,11 @@ static u32 *flush_words; | |||
| 28 | static const struct pci_device_id amd_root_ids[] = { | 29 | static const struct pci_device_id amd_root_ids[] = { |
| 29 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) }, | 30 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) }, |
| 30 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) }, | 31 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) }, |
| 32 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) }, | ||
| 31 | {} | 33 | {} |
| 32 | }; | 34 | }; |
| 33 | 35 | ||
| 36 | |||
| 34 | #define PCI_DEVICE_ID_AMD_CNB17H_F4 0x1704 | 37 | #define PCI_DEVICE_ID_AMD_CNB17H_F4 0x1704 |
| 35 | 38 | ||
| 36 | const struct pci_device_id amd_nb_misc_ids[] = { | 39 | const struct pci_device_id amd_nb_misc_ids[] = { |
| @@ -44,6 +47,7 @@ const struct pci_device_id amd_nb_misc_ids[] = { | |||
| 44 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, | 47 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, |
| 45 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, | 48 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, |
| 46 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, | 49 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, |
| 50 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, | ||
| 47 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, | 51 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, |
| 48 | {} | 52 | {} |
| 49 | }; | 53 | }; |
| @@ -57,6 +61,7 @@ static const struct pci_device_id amd_nb_link_ids[] = { | |||
| 57 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) }, | 61 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) }, |
| 58 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) }, | 62 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) }, |
| 59 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) }, | 63 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) }, |
| 64 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) }, | ||
| 60 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, | 65 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, |
| 61 | {} | 66 | {} |
| 62 | }; | 67 | }; |
| @@ -214,7 +219,10 @@ int amd_cache_northbridges(void) | |||
| 214 | const struct pci_device_id *root_ids = amd_root_ids; | 219 | const struct pci_device_id *root_ids = amd_root_ids; |
| 215 | struct pci_dev *root, *misc, *link; | 220 | struct pci_dev *root, *misc, *link; |
| 216 | struct amd_northbridge *nb; | 221 | struct amd_northbridge *nb; |
| 217 | u16 i = 0; | 222 | u16 roots_per_misc = 0; |
| 223 | u16 misc_count = 0; | ||
| 224 | u16 root_count = 0; | ||
| 225 | u16 i, j; | ||
| 218 | 226 | ||
| 219 | if (amd_northbridges.num) | 227 | if (amd_northbridges.num) |
| 220 | return 0; | 228 | return 0; |
| @@ -227,26 +235,55 @@ int amd_cache_northbridges(void) | |||
| 227 | 235 | ||
| 228 | misc = NULL; | 236 | misc = NULL; |
| 229 | while ((misc = next_northbridge(misc, misc_ids)) != NULL) | 237 | while ((misc = next_northbridge(misc, misc_ids)) != NULL) |
| 230 | i++; | 238 | misc_count++; |
| 231 | 239 | ||
| 232 | if (!i) | 240 | if (!misc_count) |
| 233 | return -ENODEV; | 241 | return -ENODEV; |
| 234 | 242 | ||
| 235 | nb = kcalloc(i, sizeof(struct amd_northbridge), GFP_KERNEL); | 243 | root = NULL; |
| 244 | while ((root = next_northbridge(root, root_ids)) != NULL) | ||
| 245 | root_count++; | ||
| 246 | |||
| 247 | if (root_count) { | ||
| 248 | roots_per_misc = root_count / misc_count; | ||
| 249 | |||
| 250 | /* | ||
| 251 | * There should be _exactly_ N roots for each DF/SMN | ||
| 252 | * interface. | ||
| 253 | */ | ||
| 254 | if (!roots_per_misc || (root_count % roots_per_misc)) { | ||
| 255 | pr_info("Unsupported AMD DF/PCI configuration found\n"); | ||
| 256 | return -ENODEV; | ||
| 257 | } | ||
| 258 | } | ||
| 259 | |||
| 260 | nb = kcalloc(misc_count, sizeof(struct amd_northbridge), GFP_KERNEL); | ||
| 236 | if (!nb) | 261 | if (!nb) |
| 237 | return -ENOMEM; | 262 | return -ENOMEM; |
| 238 | 263 | ||
| 239 | amd_northbridges.nb = nb; | 264 | amd_northbridges.nb = nb; |
| 240 | amd_northbridges.num = i; | 265 | amd_northbridges.num = misc_count; |
| 241 | 266 | ||
| 242 | link = misc = root = NULL; | 267 | link = misc = root = NULL; |
| 243 | for (i = 0; i != amd_northbridges.num; i++) { | 268 | for (i = 0; i < amd_northbridges.num; i++) { |
| 244 | node_to_amd_nb(i)->root = root = | 269 | node_to_amd_nb(i)->root = root = |
| 245 | next_northbridge(root, root_ids); | 270 | next_northbridge(root, root_ids); |
| 246 | node_to_amd_nb(i)->misc = misc = | 271 | node_to_amd_nb(i)->misc = misc = |
| 247 | next_northbridge(misc, misc_ids); | 272 | next_northbridge(misc, misc_ids); |
| 248 | node_to_amd_nb(i)->link = link = | 273 | node_to_amd_nb(i)->link = link = |
| 249 | next_northbridge(link, link_ids); | 274 | next_northbridge(link, link_ids); |
| 275 | |||
| 276 | /* | ||
| 277 | * If there are more PCI root devices than data fabric/ | ||
| 278 | * system management network interfaces, then the (N) | ||
| 279 | * PCI roots per DF/SMN interface are functionally the | ||
| 280 | * same (for DF/SMN access) and N-1 are redundant. N-1 | ||
| 281 | * PCI roots should be skipped per DF/SMN interface so | ||
| 282 | * the following DF/SMN interfaces get mapped to | ||
| 283 | * correct PCI roots. | ||
| 284 | */ | ||
| 285 | for (j = 1; j < roots_per_misc; j++) | ||
| 286 | root = next_northbridge(root, root_ids); | ||
| 250 | } | 287 | } |
| 251 | 288 | ||
| 252 | if (amd_gart_present()) | 289 | if (amd_gart_present()) |
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index 2cef0c37ff6f..9790f1f5eb98 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
| 24 | #include <linux/module.h> | 24 | #include <linux/module.h> |
| 25 | #include <linux/pci.h> | 25 | #include <linux/pci.h> |
| 26 | #include <linux/pci_ids.h> | ||
| 26 | #include <asm/amd_nb.h> | 27 | #include <asm/amd_nb.h> |
| 27 | #include <asm/processor.h> | 28 | #include <asm/processor.h> |
| 28 | 29 | ||
| @@ -41,14 +42,6 @@ static DEFINE_MUTEX(nb_smu_ind_mutex); | |||
| 41 | #define PCI_DEVICE_ID_AMD_15H_M70H_NB_F3 0x15b3 | 42 | #define PCI_DEVICE_ID_AMD_15H_M70H_NB_F3 0x15b3 |
| 42 | #endif | 43 | #endif |
| 43 | 44 | ||
| 44 | #ifndef PCI_DEVICE_ID_AMD_17H_DF_F3 | ||
| 45 | #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 | ||
| 46 | #endif | ||
| 47 | |||
| 48 | #ifndef PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 | ||
| 49 | #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb | ||
| 50 | #endif | ||
| 51 | |||
| 52 | /* CPUID function 0x80000001, ebx */ | 45 | /* CPUID function 0x80000001, ebx */ |
| 53 | #define CPUID_PKGTYPE_MASK 0xf0000000 | 46 | #define CPUID_PKGTYPE_MASK 0xf0000000 |
| 54 | #define CPUID_PKGTYPE_F 0x00000000 | 47 | #define CPUID_PKGTYPE_F 0x00000000 |
| @@ -367,6 +360,7 @@ static const struct pci_device_id k10temp_id_table[] = { | |||
| 367 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, | 360 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, |
| 368 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, | 361 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, |
| 369 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, | 362 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, |
| 363 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, | ||
| 370 | {} | 364 | {} |
| 371 | }; | 365 | }; |
| 372 | MODULE_DEVICE_TABLE(pci, k10temp_id_table); | 366 | MODULE_DEVICE_TABLE(pci, k10temp_id_table); |
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 69f0abe1ba1a..349276fbd269 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
| @@ -545,6 +545,9 @@ | |||
| 545 | #define PCI_DEVICE_ID_AMD_16H_NB_F4 0x1534 | 545 | #define PCI_DEVICE_ID_AMD_16H_NB_F4 0x1534 |
| 546 | #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F3 0x1583 | 546 | #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F3 0x1583 |
| 547 | #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F4 0x1584 | 547 | #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F4 0x1584 |
| 548 | #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 | ||
| 549 | #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb | ||
| 550 | #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493 | ||
| 548 | #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703 | 551 | #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703 |
| 549 | #define PCI_DEVICE_ID_AMD_LANCE 0x2000 | 552 | #define PCI_DEVICE_ID_AMD_LANCE 0x2000 |
| 550 | #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 | 553 | #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 |
