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-rw-r--r--drivers/iommu/amd_iommu.c19
1 files changed, 1 insertions, 18 deletions
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index f7cdd2ab7f11..7a0de274934c 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -2122,23 +2122,6 @@ out_err:
2122 return ret; 2122 return ret;
2123} 2123}
2124 2124
2125/* FIXME: Move this to PCI code */
2126#define PCI_PRI_TLP_OFF (1 << 15)
2127
2128static bool pci_pri_tlp_required(struct pci_dev *pdev)
2129{
2130 u16 status;
2131 int pos;
2132
2133 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
2134 if (!pos)
2135 return false;
2136
2137 pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
2138
2139 return (status & PCI_PRI_TLP_OFF) ? true : false;
2140}
2141
2142/* 2125/*
2143 * If a device is not yet associated with a domain, this function makes the 2126 * If a device is not yet associated with a domain, this function makes the
2144 * device visible in the domain 2127 * device visible in the domain
@@ -2167,7 +2150,7 @@ static int attach_device(struct device *dev,
2167 2150
2168 dev_data->ats.enabled = true; 2151 dev_data->ats.enabled = true;
2169 dev_data->ats.qdep = pci_ats_queue_depth(pdev); 2152 dev_data->ats.qdep = pci_ats_queue_depth(pdev);
2170 dev_data->pri_tlp = pci_pri_tlp_required(pdev); 2153 dev_data->pri_tlp = pci_prg_resp_pasid_required(pdev);
2171 } 2154 }
2172 } else if (amd_iommu_iotlb_sup && 2155 } else if (amd_iommu_iotlb_sup &&
2173 pci_enable_ats(pdev, PAGE_SHIFT) == 0) { 2156 pci_enable_ats(pdev, PAGE_SHIFT) == 0) {