diff options
5 files changed, 29 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt index 4f2ba8c13d92..4a0f4f7682ad 100644 --- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt +++ b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt | |||
@@ -5,6 +5,7 @@ Required properties for dp-controller: | |||
5 | platform specific such as: | 5 | platform specific such as: |
6 | * "samsung,exynos5-dp" | 6 | * "samsung,exynos5-dp" |
7 | * "rockchip,rk3288-dp" | 7 | * "rockchip,rk3288-dp" |
8 | * "rockchip,rk3399-edp" | ||
8 | -reg: | 9 | -reg: |
9 | physical base address of the controller and length | 10 | physical base address of the controller and length |
10 | of memory mapped region. | 11 | of memory mapped region. |
diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt index e832ff98fd61..726c94502a2a 100644 --- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt | |||
@@ -2,7 +2,8 @@ Rockchip RK3288 specific extensions to the Analogix Display Port | |||
2 | ================================ | 2 | ================================ |
3 | 3 | ||
4 | Required properties: | 4 | Required properties: |
5 | - compatible: "rockchip,rk3288-edp"; | 5 | - compatible: "rockchip,rk3288-edp", |
6 | "rockchip,rk3399-edp"; | ||
6 | 7 | ||
7 | - reg: physical base address of the controller and length | 8 | - reg: physical base address of the controller and length |
8 | 9 | ||
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index 7699597070a1..ed798e3c8744 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | |||
@@ -1208,6 +1208,7 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp) | |||
1208 | 1208 | ||
1209 | switch (dp->plat_data->dev_type) { | 1209 | switch (dp->plat_data->dev_type) { |
1210 | case RK3288_DP: | 1210 | case RK3288_DP: |
1211 | case RK3399_EDP: | ||
1211 | /* | 1212 | /* |
1212 | * Like Rk3288 DisplayPort TRM indicate that "Main link | 1213 | * Like Rk3288 DisplayPort TRM indicate that "Main link |
1213 | * containing 4 physical lanes of 2.7/1.62 Gbps/lane". | 1214 | * containing 4 physical lanes of 2.7/1.62 Gbps/lane". |
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 0a309315f852..8557a085d0ac 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | |||
@@ -36,6 +36,8 @@ | |||
36 | 36 | ||
37 | #define RK3288_GRF_SOC_CON6 0x25c | 37 | #define RK3288_GRF_SOC_CON6 0x25c |
38 | #define RK3288_EDP_LCDC_SEL BIT(5) | 38 | #define RK3288_EDP_LCDC_SEL BIT(5) |
39 | #define RK3399_GRF_SOC_CON20 0x6250 | ||
40 | #define RK3399_EDP_LCDC_SEL BIT(5) | ||
39 | 41 | ||
40 | #define HIWORD_UPDATE(val, mask) (val | (mask) << 16) | 42 | #define HIWORD_UPDATE(val, mask) (val | (mask) << 16) |
41 | 43 | ||
@@ -159,6 +161,8 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, | |||
159 | struct drm_connector_state *conn_state) | 161 | struct drm_connector_state *conn_state) |
160 | { | 162 | { |
161 | struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state); | 163 | struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state); |
164 | struct rockchip_dp_device *dp = to_dp(encoder); | ||
165 | int ret; | ||
162 | 166 | ||
163 | /* | 167 | /* |
164 | * FIXME(Yakir): driver should configure the CRTC output video | 168 | * FIXME(Yakir): driver should configure the CRTC output video |
@@ -173,8 +177,19 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, | |||
173 | * But if I configure CTRC to RGBaaa, and eDP driver still keep | 177 | * But if I configure CTRC to RGBaaa, and eDP driver still keep |
174 | * RGB666 input video mode, then screen would works prefect. | 178 | * RGB666 input video mode, then screen would works prefect. |
175 | */ | 179 | */ |
180 | |||
176 | s->output_mode = ROCKCHIP_OUT_MODE_AAAA; | 181 | s->output_mode = ROCKCHIP_OUT_MODE_AAAA; |
177 | s->output_type = DRM_MODE_CONNECTOR_eDP; | 182 | s->output_type = DRM_MODE_CONNECTOR_eDP; |
183 | if (dp->data->chip_type == RK3399_EDP) { | ||
184 | /* | ||
185 | * For RK3399, VOP Lit must code the out mode to RGB888, | ||
186 | * VOP Big must code the out mode to RGB10. | ||
187 | */ | ||
188 | ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, | ||
189 | encoder); | ||
190 | if (ret > 0) | ||
191 | s->output_mode = ROCKCHIP_OUT_MODE_P888; | ||
192 | } | ||
178 | 193 | ||
179 | return 0; | 194 | return 0; |
180 | } | 195 | } |
@@ -378,6 +393,13 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = { | |||
378 | #endif | 393 | #endif |
379 | }; | 394 | }; |
380 | 395 | ||
396 | static const struct rockchip_dp_chip_data rk3399_edp = { | ||
397 | .lcdsel_grf_reg = RK3399_GRF_SOC_CON20, | ||
398 | .lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL), | ||
399 | .lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL), | ||
400 | .chip_type = RK3399_EDP, | ||
401 | }; | ||
402 | |||
381 | static const struct rockchip_dp_chip_data rk3288_dp = { | 403 | static const struct rockchip_dp_chip_data rk3288_dp = { |
382 | .lcdsel_grf_reg = RK3288_GRF_SOC_CON6, | 404 | .lcdsel_grf_reg = RK3288_GRF_SOC_CON6, |
383 | .lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL), | 405 | .lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL), |
@@ -387,6 +409,7 @@ static const struct rockchip_dp_chip_data rk3288_dp = { | |||
387 | 409 | ||
388 | static const struct of_device_id rockchip_dp_dt_ids[] = { | 410 | static const struct of_device_id rockchip_dp_dt_ids[] = { |
389 | {.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp }, | 411 | {.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp }, |
412 | {.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp }, | ||
390 | {} | 413 | {} |
391 | }; | 414 | }; |
392 | MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids); | 415 | MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids); |
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h index 790ab5d07a88..fc4aea39822d 100644 --- a/include/drm/bridge/analogix_dp.h +++ b/include/drm/bridge/analogix_dp.h | |||
@@ -16,11 +16,12 @@ | |||
16 | enum analogix_dp_devtype { | 16 | enum analogix_dp_devtype { |
17 | EXYNOS_DP, | 17 | EXYNOS_DP, |
18 | RK3288_DP, | 18 | RK3288_DP, |
19 | RK3399_EDP, | ||
19 | }; | 20 | }; |
20 | 21 | ||
21 | static inline bool is_rockchip(enum analogix_dp_devtype type) | 22 | static inline bool is_rockchip(enum analogix_dp_devtype type) |
22 | { | 23 | { |
23 | return type == RK3288_DP; | 24 | return type == RK3288_DP || type == RK3399_EDP; |
24 | } | 25 | } |
25 | 26 | ||
26 | struct analogix_dp_plat_data { | 27 | struct analogix_dp_plat_data { |