6 files changed, 228 insertions, 35 deletions

diff --git a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
index 31b5b21598ff..5bf13960f7f4 100644
--- a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
+++ b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
@@ -9,6 +9,7 @@ Required properties:
   - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
   - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
   - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
+  - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
 - reg : Offset and length of the register set for the device
 - interrupts : Should contain CSPI/eCSPI interrupt
 - cs-gpios : Specifies the gpio pins to be used for chipselects.
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index f9698b7aeb3b..babb15f07995 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -56,6 +56,7 @@
 
 /* The maximum  bytes that a sdma BD can transfer.*/
 #define MAX_SDMA_BD_BYTES  (1 << 15)
+#define MX51_ECSPI_CTRL_MAX_BURST       512
 
 enum spi_imx_devtype {
         IMX1_CSPI,
@@ -63,7 +64,8 @@ enum spi_imx_devtype {
         IMX27_CSPI,
         IMX31_CSPI,
         IMX35_CSPI,     /* CSPI on all i.mx except above */
-        IMX51_ECSPI,    /* ECSPI on i.mx51 and later */
+        IMX51_ECSPI,    /* ECSPI on i.mx51 */
+        IMX53_ECSPI,    /* ECSPI on i.mx53 and later */
 };
 
 struct spi_imx_data;
@@ -74,6 +76,9 @@ struct spi_imx_devtype_data {
         void (*trigger)(struct spi_imx_data *);
         int (*rx_available)(struct spi_imx_data *);
         void (*reset)(struct spi_imx_data *);
+        bool has_dmamode;
+        unsigned int fifo_size;
+        bool dynamic_burst;
         enum spi_imx_devtype devtype;
 };
 
@@ -94,12 +99,14 @@ struct spi_imx_data {
         unsigned int bits_per_word;
         unsigned int spi_drctl;
 
-        unsigned int count;
+        unsigned int count, remainder;
         void (*tx)(struct spi_imx_data *);
         void (*rx)(struct spi_imx_data *);
         void *rx_buf;
         const void *tx_buf;
         unsigned int txfifo; /* number of words pushed in tx FIFO */
+        unsigned int dynamic_burst, read_u32;
+        unsigned int word_mask;
 
         /* DMA */
         bool usedma;
@@ -125,9 +132,9 @@ static inline int is_imx51_ecspi(struct spi_imx_data *d)
         return d->devtype_data->devtype == IMX51_ECSPI;
 }
 
-static inline unsigned spi_imx_get_fifosize(struct spi_imx_data *d)
+static inline int is_imx53_ecspi(struct spi_imx_data *d)
 {
-        return is_imx51_ecspi(d) ? 64 : 8;
+        return d->devtype_data->devtype == IMX53_ECSPI;
 }
 
 #define MXC_SPI_BUF_RX(type)                                            \
@@ -219,7 +226,7 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
         if (bytes_per_word != 1 && bytes_per_word != 2 && bytes_per_word != 4)
                 return false;
 
-        for (i = spi_imx_get_fifosize(spi_imx) / 2; i > 0; i--) {
+        for (i = spi_imx->devtype_data->fifo_size / 2; i > 0; i--) {
                 if (!(transfer->len % (i * bytes_per_word)))
                         break;
         }
@@ -228,6 +235,7 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
                 return false;
 
         spi_imx->wml = i;
+        spi_imx->dynamic_burst = 0;
 
         return true;
 }
@@ -242,6 +250,7 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
 #define MX51_ECSPI_CTRL_PREDIV_OFFSET   12
 #define MX51_ECSPI_CTRL_CS(cs)          ((cs) << 18)
 #define MX51_ECSPI_CTRL_BL_OFFSET       20
+#define MX51_ECSPI_CTRL_BL_MASK         (0xfff << 20)
 
 #define MX51_ECSPI_CONFIG       0x0c
 #define MX51_ECSPI_CONFIG_SCLKPHA(cs)   (1 << ((cs) +  0))
@@ -269,6 +278,106 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
 #define MX51_ECSPI_TESTREG      0x20
 #define MX51_ECSPI_TESTREG_LBC  BIT(31)
 
+static void spi_imx_buf_rx_swap_u32(struct spi_imx_data *spi_imx)
+{
+        unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA);
+#ifdef __LITTLE_ENDIAN
+        unsigned int bytes_per_word;
+#endif
+
+        if (spi_imx->rx_buf) {
+#ifdef __LITTLE_ENDIAN
+                bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word);
+                if (bytes_per_word == 1)
+                        val = cpu_to_be32(val);
+                else if (bytes_per_word == 2)
+                        val = (val << 16) | (val >> 16);
+#endif
+                val &= spi_imx->word_mask;
+                *(u32 *)spi_imx->rx_buf = val;
+                spi_imx->rx_buf += sizeof(u32);
+        }
+}
+
+static void spi_imx_buf_rx_swap(struct spi_imx_data *spi_imx)
+{
+        unsigned int bytes_per_word;
+
+        bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word);
+        if (spi_imx->read_u32) {
+                spi_imx_buf_rx_swap_u32(spi_imx);
+                return;
+        }
+
+        if (bytes_per_word == 1)
+                spi_imx_buf_rx_u8(spi_imx);
+        else if (bytes_per_word == 2)
+                spi_imx_buf_rx_u16(spi_imx);
+}
+
+static void spi_imx_buf_tx_swap_u32(struct spi_imx_data *spi_imx)
+{
+        u32 val = 0;
+#ifdef __LITTLE_ENDIAN
+        unsigned int bytes_per_word;
+#endif
+
+        if (spi_imx->tx_buf) {
+                val = *(u32 *)spi_imx->tx_buf;
+                val &= spi_imx->word_mask;
+                spi_imx->tx_buf += sizeof(u32);
+        }
+
+        spi_imx->count -= sizeof(u32);
+#ifdef __LITTLE_ENDIAN
+        bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word);
+
+        if (bytes_per_word == 1)
+                val = cpu_to_be32(val);
+        else if (bytes_per_word == 2)
+                val = (val << 16) | (val >> 16);
+#endif
+        writel(val, spi_imx->base + MXC_CSPITXDATA);
+}
+
+static void spi_imx_buf_tx_swap(struct spi_imx_data *spi_imx)
+{
+        u32 ctrl, val;
+        unsigned int bytes_per_word;
+
+        if (spi_imx->count == spi_imx->remainder) {
+                ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
+                ctrl &= ~MX51_ECSPI_CTRL_BL_MASK;
+                if (spi_imx->count > MX51_ECSPI_CTRL_MAX_BURST) {
+                        spi_imx->remainder = spi_imx->count %
+                                             MX51_ECSPI_CTRL_MAX_BURST;
+                        val = MX51_ECSPI_CTRL_MAX_BURST * 8 - 1;
+                } else if (spi_imx->count >= sizeof(u32)) {
+                        spi_imx->remainder = spi_imx->count % sizeof(u32);
+                        val = (spi_imx->count - spi_imx->remainder) * 8 - 1;
+                } else {
+                        spi_imx->remainder = 0;
+                        val = spi_imx->bits_per_word - 1;
+                        spi_imx->read_u32 = 0;
+                }
+