5 files changed, 48 insertions, 5 deletions

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index b6b0f509f07c..78f118cb73d4 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -87,11 +87,11 @@
         thermal-zones {
                 cpu_thermal: cpu-thermal {
                         cooling-maps {
-                                map0 {
+                                cooling_map0: map0 {
                                      /* Corresponds to 800MHz at freq_table */
                                      cooling-device = <&cpu0 7 7>;
                                 };
-                                map1 {
+                                cooling_map1: map1 {
                                      /* Corresponds to 200MHz at freq_table */
                                      cooling-device = <&cpu0 13 13>;
                                };
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index 99634c54dca9..7504a5aa538e 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -13,6 +13,7 @@
 
 /dts-v1/;
 #include "exynos4412-odroid-common.dtsi"
+#include "exynos4412-prime.dtsi"
 
 / {
         model = "Hardkernel ODROID-U3 board based on Exynos4412";
@@ -47,11 +48,11 @@
                         cooling-maps {
                                 map0 {
                                      trip = <&cpu_alert1>;
-                                     cooling-device = <&cpu0 7 7>;
+                                     cooling-device = <&cpu0 9 9>;
                                 };
                                 map1 {
                                      trip = <&cpu_alert2>;
-                                     cooling-device = <&cpu0 13 13>;
+                                     cooling-device = <&cpu0 15 15>;
                                 };
                                 map2 {
                                      trip = <&cpu_alert0>;
diff --git a/arch/arm/boot/dts/exynos4412-odroidx2.dts b/arch/arm/boot/dts/exynos4412-odroidx2.dts
index 083647402d74..d867b2ee95ca 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx2.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx2.dts
@@ -12,6 +12,7 @@
 */
 
 #include "exynos4412-odroidx.dts"
+#include "exynos4412-prime.dtsi"
 
 / {
         model = "Hardkernel ODROID-X2 board based on Exynos4412";
diff --git a/arch/arm/boot/dts/exynos4412-prime.dtsi b/arch/arm/boot/dts/exynos4412-prime.dtsi
new file mode 100644
index 000000000000..e75bc170c89c
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-prime.dtsi
@@ -0,0 +1,41 @@
+/*
+ * Samsung's Exynos4412 Prime SoC device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * Exynos4412 Prime SoC revision supports higher CPU frequencies than
+ * non-Prime version.  Therefore we need to update OPPs table and
+ * thermal maps accordingly.
+ */
+
+&cpu0_opp_1500 {
+        /delete-property/turbo-mode;
+};
+
+&cpu0_opp_table {
+        opp@1600000000 {
+                opp-hz = /bits/ 64 <1600000000>;
+                opp-microvolt = <1350000>;
+                clock-latency-ns = <200000>;
+        };
+        opp@1704000000 {
+                opp-hz = /bits/ 64 <1704000000>;
+                opp-microvolt = <1350000>;
+                clock-latency-ns = <200000>;
+        };
+};
+
+&cooling_map0 {
+        cooling-device = <&cpu0 9 9>;
+};
+
+&cooling_map1 {
+        cooling-device = <&cpu0 15 15>;
+};
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 40beede46e55..3ebdf01d814c 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -130,7 +130,7 @@
                         opp-microvolt = <1287500>;
                         clock-latency-ns = <200000>;
                 };
-                opp@1500000000 {
+                cpu0_opp_1500: opp@1500000000 {
                         opp-hz = /bits/ 64 <1500000000>;
                         opp-microvolt = <1350000>;
                         clock-latency-ns = <200000>;