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-rw-r--r--arch/arm/boot/dts/am33xx.dtsi1
-rw-r--r--arch/arm/boot/dts/am4372.dtsi5
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts4
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts2
-rw-r--r--arch/arm/boot/dts/am57xx-cl-som-am57x.dts12
-rw-r--r--arch/arm/boot/dts/am57xx-sbc-am57x.dts8
-rw-r--r--arch/arm/boot/dts/logicpd-torpedo-som.dtsi9
-rw-r--r--arch/arm/boot/dts/omap5-board-common.dtsi33
-rw-r--r--arch/arm/configs/omap2plus_defconfig10
-rw-r--r--arch/arm/mach-omap2/devices.c28
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c23
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S61
-rw-r--r--arch/arm/mach-omap2/sleep44xx.S25
13 files changed, 130 insertions, 91 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 04885f9f959e..1fafaad516ba 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -439,6 +439,7 @@
439 ti,mbox-num-users = <4>; 439 ti,mbox-num-users = <4>;
440 ti,mbox-num-fifos = <8>; 440 ti,mbox-num-fifos = <8>;
441 mbox_wkupm3: wkup_m3 { 441 mbox_wkupm3: wkup_m3 {
442 ti,mbox-send-noirq;
442 ti,mbox-tx = <0 0 0>; 443 ti,mbox-tx = <0 0 0>;
443 ti,mbox-rx = <0 0 3>; 444 ti,mbox-rx = <0 0 3>;
444 }; 445 };
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index df955ba4dc62..92068fbf8b57 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -73,7 +73,7 @@
73 global_timer: timer@48240200 { 73 global_timer: timer@48240200 {
74 compatible = "arm,cortex-a9-global-timer"; 74 compatible = "arm,cortex-a9-global-timer";
75 reg = <0x48240200 0x100>; 75 reg = <0x48240200 0x100>;
76 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; 76 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
77 interrupt-parent = <&gic>; 77 interrupt-parent = <&gic>;
78 clocks = <&mpu_periphclk>; 78 clocks = <&mpu_periphclk>;
79 }; 79 };
@@ -81,7 +81,7 @@
81 local_timer: timer@48240600 { 81 local_timer: timer@48240600 {
82 compatible = "arm,cortex-a9-twd-timer"; 82 compatible = "arm,cortex-a9-twd-timer";
83 reg = <0x48240600 0x100>; 83 reg = <0x48240600 0x100>;
84 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; 84 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
85 interrupt-parent = <&gic>; 85 interrupt-parent = <&gic>;
86 clocks = <&mpu_periphclk>; 86 clocks = <&mpu_periphclk>;
87 }; 87 };
@@ -290,6 +290,7 @@
290 ti,mbox-num-users = <4>; 290 ti,mbox-num-users = <4>;
291 ti,mbox-num-fifos = <8>; 291 ti,mbox-num-fifos = <8>;
292 mbox_wkupm3: wkup_m3 { 292 mbox_wkupm3: wkup_m3 {
293 ti,mbox-send-noirq;
293 ti,mbox-tx = <0 0 0>; 294 ti,mbox-tx = <0 0 0>;
294 ti,mbox-rx = <0 0 3>; 295 ti,mbox-rx = <0 0 3>;
295 }; 296 };
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 64d43325bcbc..ecd09ab6d581 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -590,8 +590,6 @@
590 pinctrl-names = "default"; 590 pinctrl-names = "default";
591 pinctrl-0 = <&pixcir_ts_pins>; 591 pinctrl-0 = <&pixcir_ts_pins>;
592 reg = <0x5c>; 592 reg = <0x5c>;
593 interrupt-parent = <&gpio3>;
594 interrupts = <22 0>;
595 593
596 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 594 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
597 595
@@ -599,7 +597,7 @@
599 * 0x264 represents the offset of padconf register of 597 * 0x264 represents the offset of padconf register of
600 * gpio3_22 from am43xx_pinmux base. 598 * gpio3_22 from am43xx_pinmux base.
601 */ 599 */
602 interrupts-extended = <&gpio3 22 IRQ_TYPE_NONE>, 600 interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
603 <&am43xx_pinmux 0x264>; 601 <&am43xx_pinmux 0x264>;
604 interrupt-names = "tsc", "wakeup"; 602 interrupt-names = "tsc", "wakeup";
605 603
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 746fd2b17958..d580e2b70f9a 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -491,7 +491,7 @@
491 pinctrl-0 = <&pixcir_ts_pins>; 491 pinctrl-0 = <&pixcir_ts_pins>;
492 reg = <0x5c>; 492 reg = <0x5c>;
493 interrupt-parent = <&gpio1>; 493 interrupt-parent = <&gpio1>;
494 interrupts = <17 0>; 494 interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
495 495
496 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>; 496 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
497 497
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
index c53882643ae9..8d93882dc8d5 100644
--- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
+++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
@@ -167,7 +167,7 @@
167 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ 167 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
168 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ 168 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
169 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ 169 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
170 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ 170 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
171 >; 171 >;
172 }; 172 };
173 173
@@ -492,14 +492,14 @@
492 pinctrl-names = "default"; 492 pinctrl-names = "default";
493 pinctrl-0 = <&qspi1_pins>; 493 pinctrl-0 = <&qspi1_pins>;
494 494
495 spi-max-frequency = <20000000>; 495 spi-max-frequency = <48000000>;
496 496
497 spi_flash: spi_flash@0 { 497 spi_flash: spi_flash@0 {
498 #address-cells = <1>; 498 #address-cells = <1>;
499 #size-cells = <1>; 499 #size-cells = <1>;
500 compatible = "spansion,m25p80", "jedec,spi-nor"; 500 compatible = "spansion,m25p80", "jedec,spi-nor";
501 reg = <0>; /* CS0 */ 501 reg = <0>; /* CS0 */
502 spi-max-frequency = <20000000>; 502 spi-max-frequency = <48000000>;
503 503
504 partition@0 { 504 partition@0 {
505 label = "uboot"; 505 label = "uboot";
@@ -559,13 +559,13 @@
559 559
560&cpsw_emac0 { 560&cpsw_emac0 {
561 phy_id = <&davinci_mdio>, <0>; 561 phy_id = <&davinci_mdio>, <0>;
562 phy-mode = "rgmii"; 562 phy-mode = "rgmii-txid";
563 dual_emac_res_vlan = <0>; 563 dual_emac_res_vlan = <0>;
564}; 564};
565 565
566&cpsw_emac1 { 566&cpsw_emac1 {
567 phy_id = <&davinci_mdio>, <1>; 567 phy_id = <&davinci_mdio>, <1>;
568 phy-mode = "rgmii"; 568 phy-mode = "rgmii-txid";
569 dual_emac_res_vlan = <1>; 569 dual_emac_res_vlan = <1>;
570}; 570};
571 571
@@ -588,7 +588,7 @@
588}; 588};
589 589
590&usb2 { 590&usb2 {
591 dr_mode = "peripheral"; 591 dr_mode = "host";
592}; 592};
593 593
594&mcasp3 { 594&mcasp3 {
diff --git a/arch/arm/boot/dts/am57xx-sbc-am57x.dts b/arch/arm/boot/dts/am57xx-sbc-am57x.dts
index 77bb8e17401a..988e99632d49 100644
--- a/arch/arm/boot/dts/am57xx-sbc-am57x.dts
+++ b/arch/arm/boot/dts/am57xx-sbc-am57x.dts
@@ -25,8 +25,8 @@
25&dra7_pmx_core { 25&dra7_pmx_core {
26 uart3_pins_default: uart3_pins_default { 26 uart3_pins_default: uart3_pins_default {
27 pinctrl-single,pins = < 27 pinctrl-single,pins = <
28 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */ 28 DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
29 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */ 29 DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
30 >; 30 >;
31 }; 31 };
32 32
@@ -108,9 +108,9 @@
108 pinctrl-0 = <&i2c5_pins_default>; 108 pinctrl-0 = <&i2c5_pins_default>;
109 clock-frequency = <400000>; 109 clock-frequency = <400000>;
110 110
111 eeprom_base: atmel@50 { 111 eeprom_base: atmel@54 {
112 compatible = "atmel,24c08"; 112 compatible = "atmel,24c08";
113 reg = <0x50>; 113 reg = <0x54>;
114 pagesize = <16>; 114 pagesize = <16>;
115 }; 115 };
116 116
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 7fed0bd4f3de..00805322367e 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -112,14 +112,6 @@
112 clock-frequency = <400000>; 112 clock-frequency = <400000>;
113}; 113};
114 114
115&i2c2 {
116 clock-frequency = <400000>;
117};
118
119&i2c3 {
120 clock-frequency = <400000>;
121};
122
123/* 115/*
124 * Only found on the wireless SOM. For the SOM without wireless, the pins for 116 * Only found on the wireless SOM. For the SOM without wireless, the pins for
125 * MMC3 can be routed with jumpers to the second MMC slot on the devkit and 117 * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
@@ -143,6 +135,7 @@
143 interrupt-parent = <&gpio5>; 135 interrupt-parent = <&gpio5>;
144 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */ 136 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
145 ref-clock-frequency = <26000000>; 137 ref-clock-frequency = <26000000>;
138 tcxo-clock-frequency = <26000000>;
146 }; 139 };
147}; 140};
148 141
diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi
index 888412c63f97..902657d6713b 100644
--- a/arch/arm/boot/dts/omap5-board-common.dtsi
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi
@@ -130,6 +130,16 @@
130 }; 130 };
131}; 131};
132 132
133&gpio8 {
134 /* TI trees use GPIO instead of msecure, see also muxing */
135 p234 {
136 gpio-hog;
137 gpios = <10 GPIO_ACTIVE_HIGH>;
138 output-high;
139 line-name = "gpio8_234/msecure";
140 };
141};
142
133&omap5_pmx_core { 143&omap5_pmx_core {
134 pinctrl-names = "default"; 144 pinctrl-names = "default";
135 pinctrl-0 = < 145 pinctrl-0 = <
@@ -213,6 +223,13 @@
213 >; 223 >;
214 }; 224 };
215 225
226 /* TI trees use GPIO mode; msecure mode does not work reliably? */
227 palmas_msecure_pins: palmas_msecure_pins {
228 pinctrl-single,pins = <
229 OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE6) /* gpio8_234 */
230 >;
231 };
232
216 usbhost_pins: pinmux_usbhost_pins { 233 usbhost_pins: pinmux_usbhost_pins {
217 pinctrl-single,pins = < 234 pinctrl-single,pins = <
218 OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */ 235 OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
@@ -278,6 +295,12 @@
278 &usbhost_wkup_pins 295 &usbhost_wkup_pins
279 >; 296 >;
280 297
298 palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
299 pinctrl-single,pins = <
300 OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */
301 >;
302 };
303
281 usbhost_wkup_pins: pinmux_usbhost_wkup_pins { 304 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
282 pinctrl-single,pins = < 305 pinctrl-single,pins = <
283 OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */ 306 OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
@@ -345,6 +368,8 @@
345 interrupt-controller; 368 interrupt-controller;
346 #interrupt-cells = <2>; 369 #interrupt-cells = <2>;
347 ti,system-power-controller; 370 ti,system-power-controller;
371 pinctrl-names = "default";
372 pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
348 373
349 extcon_usb3: palmas_usb { 374 extcon_usb3: palmas_usb {
350 compatible = "ti,palmas-usb-vid"; 375 compatible = "ti,palmas-usb-vid";
@@ -358,6 +383,14 @@
358 #clock-cells = <0>; 383 #clock-cells = <0>;
359 }; 384 };
360 385
386 rtc {
387 compatible = "ti,palmas-rtc";
388 interrupt-parent = <&palmas>;
389 interrupts = <8 IRQ_TYPE_NONE>;
390 ti,backup-battery-chargeable;
391 ti,backup-battery-charge-high-current;
392 };
393
361 palmas_pmic { 394 palmas_pmic {
362 compatible = "ti,palmas-pmic"; 395 compatible = "ti,palmas-pmic";
363 interrupt-parent = <&palmas>; 396 interrupt-parent = <&palmas>;
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index c5e1943e5427..a7151744b85c 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -50,6 +50,7 @@ CONFIG_SOC_AM33XX=y
50CONFIG_SOC_AM43XX=y 50CONFIG_SOC_AM43XX=y
51CONFIG_SOC_DRA7XX=y 51CONFIG_SOC_DRA7XX=y
52CONFIG_ARM_THUMBEE=y 52CONFIG_ARM_THUMBEE=y
53CONFIG_ARM_KERNMEM_PERMS=y
53CONFIG_ARM_ERRATA_411920=y 54CONFIG_ARM_ERRATA_411920=y
54CONFIG_ARM_ERRATA_430973=y 55CONFIG_ARM_ERRATA_430973=y
55CONFIG_SMP=y 56CONFIG_SMP=y
@@ -177,6 +178,7 @@ CONFIG_TI_CPTS=y
177CONFIG_AT803X_PHY=y 178CONFIG_AT803X_PHY=y
178CONFIG_SMSC_PHY=y 179CONFIG_SMSC_PHY=y
179CONFIG_USB_USBNET=m 180CONFIG_USB_USBNET=m
181CONFIG_USB_NET_SMSC75XX=m
180CONFIG_USB_NET_SMSC95XX=m 182CONFIG_USB_NET_SMSC95XX=m
181CONFIG_USB_ALI_M5632=y 183CONFIG_USB_ALI_M5632=y
182CONFIG_USB_AN2720=y 184CONFIG_USB_AN2720=y
@@ -354,6 +356,11 @@ CONFIG_USB_MUSB_DSPS=m
354CONFIG_USB_INVENTRA_DMA=y 356CONFIG_USB_INVENTRA_DMA=y
355CONFIG_USB_TI_CPPI41_DMA=y 357CONFIG_USB_TI_CPPI41_DMA=y
356CONFIG_USB_DWC3=m 358CONFIG_USB_DWC3=m
359CONFIG_USB_SERIAL=m
360CONFIG_USB_SERIAL_GENERIC=y
361CONFIG_USB_SERIAL_SIMPLE=m
362CONFIG_USB_SERIAL_FTDI_SIO=m
363CONFIG_USB_SERIAL_PL2303=m
357CONFIG_USB_TEST=m 364CONFIG_USB_TEST=m
358CONFIG_AM335X_PHY_USB=y 365CONFIG_AM335X_PHY_USB=y
359CONFIG_USB_GADGET=m 366CONFIG_USB_GADGET=m
@@ -387,6 +394,7 @@ CONFIG_NEW_LEDS=y
387CONFIG_LEDS_CLASS=m 394CONFIG_LEDS_CLASS=m
388CONFIG_LEDS_GPIO=m 395CONFIG_LEDS_GPIO=m
389CONFIG_LEDS_PWM=m 396CONFIG_LEDS_PWM=m
397CONFIG_LEDS_PCA963X=m
390CONFIG_LEDS_TRIGGERS=y 398CONFIG_LEDS_TRIGGERS=y
391CONFIG_LEDS_TRIGGER_TIMER=m 399CONFIG_LEDS_TRIGGER_TIMER=m
392CONFIG_LEDS_TRIGGER_ONESHOT=m 400CONFIG_LEDS_TRIGGER_ONESHOT=m
@@ -449,6 +457,8 @@ CONFIG_NLS_CODEPAGE_437=y
449CONFIG_NLS_ISO8859_1=y 457CONFIG_NLS_ISO8859_1=y
450CONFIG_PRINTK_TIME=y 458CONFIG_PRINTK_TIME=y
451CONFIG_DEBUG_INFO=y 459CONFIG_DEBUG_INFO=y
460CONFIG_DEBUG_INFO_SPLIT=y
461CONFIG_DEBUG_INFO_DWARF4=y
452CONFIG_MAGIC_SYSRQ=y 462CONFIG_MAGIC_SYSRQ=y
453CONFIG_SCHEDSTATS=y 463CONFIG_SCHEDSTATS=y
454CONFIG_TIMER_STATS=y 464CONFIG_TIMER_STATS=y
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 9cda974a3009..d7f1d69daf6d 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -18,7 +18,6 @@
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/of.h> 19#include <linux/of.h>
20#include <linux/pinctrl/machine.h> 20#include <linux/pinctrl/machine.h>
21#include <linux/platform_data/mailbox-omap.h>
22 21
23#include <asm/mach-types.h> 22#include <asm/mach-types.h>
24#include <asm/mach/map.h> 23#include <asm/mach/map.h>
@@ -66,32 +65,6 @@ static int __init omap3_l3_init(void)
66} 65}
67omap_postcore_initcall(omap3_l3_init); 66omap_postcore_initcall(omap3_l3_init);
68 67
69#if defined(CONFIG_OMAP2PLUS_MBOX) || defined(CONFIG_OMAP2PLUS_MBOX_MODULE)
70static inline void __init omap_init_mbox(void)
71{
72 struct omap_hwmod *oh;
73 struct platform_device *pdev;
74 struct omap_mbox_pdata *pdata;
75
76 oh = omap_hwmod_lookup("mailbox");
77 if (!oh) {
78 pr_err("%s: unable to find hwmod\n", __func__);
79 return;
80 }
81 if (!oh->dev_attr) {
82 pr_err("%s: hwmod doesn't have valid attrs\n", __func__);
83 return;
84 }
85
86 pdata = (struct omap_mbox_pdata *)oh->dev_attr;
87 pdev = omap_device_build("omap-mailbox", -1, oh, pdata, sizeof(*pdata));
88 WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
89 __func__, PTR_ERR(pdev));
90}
91#else
92static inline void omap_init_mbox(void) { }
93#endif /* CONFIG_OMAP2PLUS_MBOX */
94
95static inline void omap_init_sti(void) {} 68static inline void omap_init_sti(void) {}
96 69
97#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 70#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
@@ -229,7 +202,6 @@ static int __init omap2_init_devices(void)
229 * please keep these calls, and their implementations above, 202 * please keep these calls, and their implementations above,
230 * in alphabetical order so they're easier to sort through. 203 * in alphabetical order so they're easier to sort through.
231 */ 204 */
232 omap_init_mbox();
233 omap_init_mcspi(); 205 omap_init_mcspi();
234 omap_init_sham(); 206 omap_init_sham();
235 omap_init_aes(); 207 omap_init_aes();
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index e781e4fae13a..a935d28443da 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -23,6 +23,8 @@
23#include <linux/platform_data/pinctrl-single.h> 23#include <linux/platform_data/pinctrl-single.h>
24#include <linux/platform_data/iommu-omap.h> 24#include <linux/platform_data/iommu-omap.h>
25#include <linux/platform_data/wkup_m3.h> 25#include <linux/platform_data/wkup_m3.h>
26#include <linux/platform_data/pwm_omap_dmtimer.h>
27#include <plat/dmtimer.h>
26 28
27#include "common.h" 29#include "common.h"
28#include "common-board-devices.h" 30#include "common-board-devices.h"
@@ -449,6 +451,24 @@ void omap_auxdata_legacy_init(struct device *dev)
449 dev->platform_data = &twl_gpio_auxdata; 451 dev->platform_data = &twl_gpio_auxdata;
450} 452}
451 453
454/* Dual mode timer PWM callbacks platdata */
455#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
456struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = {
457 .request_by_node = omap_dm_timer_request_by_node,
458 .free = omap_dm_timer_free,
459 .enable = omap_dm_timer_enable,
460 .disable = omap_dm_timer_disable,
461 .get_fclk = omap_dm_timer_get_fclk,
462 .start = omap_dm_timer_start,
463 .stop = omap_dm_timer_stop,
464 .set_load = omap_dm_timer_set_load,
465 .set_match = omap_dm_timer_set_match,
466 .set_pwm = omap_dm_timer_set_pwm,
467 .set_prescaler = omap_dm_timer_set_prescaler,
468 .write_counter = omap_dm_timer_write_counter,
469};
470#endif
471
452/* 472/*
453 * Few boards still need auxdata populated before we populate 473 * Few boards still need auxdata populated before we populate
454 * the dev entries in of_platform_populate(). 474 * the dev entries in of_platform_populate().
@@ -502,6 +522,9 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
502 OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3", 522 OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
503 &wkup_m3_data), 523 &wkup_m3_data),
504#endif 524#endif
525#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
526 OF_DEV_AUXDATA("ti,omap-dmtimer-pwm", 0, NULL, &pwm_dmtimer_pdata),
527#endif
505#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 528#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
506 OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu", 529 OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
507 &omap4_iommu_pdata), 530 &omap4_iommu_pdata),
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index eafd120b53f1..1b9f0520dea9 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -86,13 +86,18 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
86 stmfd sp!, {lr} @ save registers on stack 86 stmfd sp!, {lr} @ save registers on stack
87 /* Setup so that we will disable and enable l2 */ 87 /* Setup so that we will disable and enable l2 */
88 mov r1, #0x1 88 mov r1, #0x1
89 adrl r2, l2dis_3630 @ may be too distant for plain adr 89 adrl r3, l2dis_3630_offset @ may be too distant for plain adr
90 str r1, [r2] 90 ldr r2, [r3] @ value for offset
91 str r1, [r2, r3] @ write to l2dis_3630
91 ldmfd sp!, {pc} @ restore regs and return 92 ldmfd sp!, {pc} @ restore regs and return
92ENDPROC(enable_omap3630_toggle_l2_on_restore) 93ENDPROC(enable_omap3630_toggle_l2_on_restore)
93 94
94 .text 95/*
95/* Function to call rom code to save secure ram context */ 96 * Function to call rom code to save secure ram context. This gets
97 * relocated to SRAM, so it can be all in .data section. Otherwise
98 * we need to initialize api_params separately.
99 */
100 .data
96 .align 3 101 .align 3
97ENTRY(save_secure_ram_context) 102ENTRY(save_secure_ram_context)
98 stmfd sp!, {r4 - r11, lr} @ save registers on stack 103 stmfd sp!, {r4 - r11, lr} @ save registers on stack
@@ -126,6 +131,8 @@ ENDPROC(save_secure_ram_context)
126ENTRY(save_secure_ram_context_sz) 131ENTRY(save_secure_ram_context_sz)
127 .word . - save_secure_ram_context 132 .word . - save_secure_ram_context
128 133
134 .text
135
129/* 136/*
130 * ====================== 137 * ======================
131 * == Idle entry point == 138 * == Idle entry point ==
@@ -289,12 +296,6 @@ wait_sdrc_ready:
289 bic r5, r5, #0x40 296 bic r5, r5, #0x40
290 str r5, [r4] 297 str r5, [r4]
291 298
292/*
293 * PC-relative stores lead to undefined behaviour in Thumb-2: use a r7 as a
294 * base instead.
295 * Be careful not to clobber r7 when maintaing this code.
296 */
297
298is_dll_in_lock_mode: 299is_dll_in_lock_mode:
299 /* Is dll in lock mode? */ 300 /* Is dll in lock mode? */
300 ldr r4, sdrc_dlla_ctrl 301 ldr r4, sdrc_dlla_ctrl
@@ -302,11 +303,7 @@ is_dll_in_lock_mode:
302 tst r5, #0x4 303 tst r5, #0x4
303 bne exit_nonoff_modes @ Return if locked 304 bne exit_nonoff_modes @ Return if locked
304 /* wait till dll locks */ 305 /* wait till dll locks */
305 adr r7, kick_counter
306wait_dll_lock_timed: 306wait_dll_lock_timed:
307 ldr r4, wait_dll_lock_counter
308 add r4, r4, #1
309 str r4, [r7, #wait_dll_lock_counter - kick_counter]
310 ldr r4, sdrc_dlla_status 307 ldr r4, sdrc_dlla_status
311 /* Wait 20uS for lock */ 308 /* Wait 20uS for lock */
312 mov r6, #8 309 mov r6, #8
@@ -330,9 +327,6 @@ kick_dll:
330 orr r6, r6, #(1<<3) @ enable dll 327 orr r6, r6, #(1<<3) @ enable dll
331 str r6, [r4] 328 str r6, [r4]
332 dsb 329 dsb
333 ldr r4, kick_counter
334 add r4, r4, #1
335 str r4, [r7] @ kick_counter
336 b wait_dll_lock_timed 330 b wait_dll_lock_timed
337 331
338exit_nonoff_modes: 332exit_nonoff_modes:
@@ -360,15 +354,6 @@ sdrc_dlla_status:
360 .word SDRC_DLLA_STATUS_V 354 .word SDRC_DLLA_STATUS_V
361sdrc_dlla_ctrl: 355sdrc_dlla_ctrl:
362 .word SDRC_DLLA_CTRL_V 356 .word SDRC_DLLA_CTRL_V
363 /*
364 * When exporting to userspace while the counters are in SRAM,
365 * these 2 words need to be at the end to facilitate retrival!
366 */
367kick_counter:
368 .word 0
369wait_dll_lock_counter:
370 .word 0
371
372ENTRY(omap3_do_wfi_sz) 357ENTRY(omap3_do_wfi_sz)
373 .word . - omap3_do_wfi 358 .word . - omap3_do_wfi
374 359
@@ -437,7 +422,9 @@ ENTRY(omap3_restore)
437 cmp r2, #0x0 @ Check if target power state was OFF or RET 422 cmp r2, #0x0 @ Check if target power state was OFF or RET
438 bne logic_l1_restore 423 bne logic_l1_restore
439 424
440 ldr r0, l2dis_3630 425 adr r1, l2dis_3630_offset @ address for offset
426 ldr r0, [r1] @ value for offset
427 ldr r0, [r1, r0] @ value at l2dis_3630
441 cmp r0, #0x1 @ should we disable L2 on 3630? 428 cmp r0, #0x1 @ should we disable L2 on 3630?
442 bne skipl2dis 429 bne skipl2dis
443 mrc p15, 0, r0, c1, c0, 1 430 mrc p15, 0, r0, c1, c0, 1
@@ -449,12 +436,14 @@ skipl2dis:
449 and r1, #0x700 436 and r1, #0x700
450 cmp r1, #0x300 437 cmp r1, #0x300
451 beq l2_inv_gp 438 beq l2_inv_gp
439 adr r0, l2_inv_api_params_offset
440 ldr r3, [r0]
441 add r3, r3, r0 @ r3 points to dummy parameters
452 mov r0, #40 @ set service ID for PPA 442 mov r0, #40 @ set service ID for PPA
453 mov r12, r0 @ copy secure Service ID in r12 443 mov r12, r0 @ copy secure Service ID in r12
454 mov r1, #0 @ set task id for ROM code in r1 444 mov r1, #0 @ set task id for ROM code in r1
455 mov r2, #4 @ set some flags in r2, r6 445 mov r2, #4 @ set some flags in r2, r6
456 mov r6, #0xff 446 mov r6, #0xff
457 adr r3, l2_inv_api_params @ r3 points to dummy parameters
458 dsb @ data write barrier 447 dsb @ data write barrier
459 dmb @ data memory barrier 448 dmb @ data memory barrier
460 smc #1 @ call SMI monitor (smi #1) 449 smc #1 @ call SMI monitor (smi #1)
@@ -488,8 +477,8 @@ skipl2dis:
488 b logic_l1_restore 477 b logic_l1_restore
489 478
490 .align 479 .align
491l2_inv_api_params: 480l2_inv_api_params_offset:
492 .word 0x1, 0x00 481 .long l2_inv_api_params - .
493l2_inv_gp: 482l2_inv_gp:
494 /* Execute smi to invalidate L2 cache */ 483 /* Execute smi to invalidate L2 cache */
495 mov r12, #0x1 @ set up to invalidate L2 484 mov r12, #0x1 @ set up to invalidate L2
@@ -506,7 +495,9 @@ l2_inv_gp:
506 mov r12, #0x2 495 mov r12, #0x2
507 smc #0 @ Call SMI monitor (smieq) 496 smc #0 @ Call SMI monitor (smieq)
508logic_l1_restore: 497logic_l1_restore:
509 ldr r1, l2dis_3630 498 adr r0, l2dis_3630_offset @ adress for offset
499 ldr r1, [r0] @ value for offset
500 ldr r1, [r0, r1] @ value at l2dis_3630
510 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630 501 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630
511 bne skipl2reen 502 bne skipl2reen
512 mrc p15, 0, r1, c1, c0, 1 503 mrc p15, 0, r1, c1, c0, 1
@@ -535,9 +526,17 @@ control_stat:
535 .word CONTROL_STAT 526 .word CONTROL_STAT
536control_mem_rta: 527control_mem_rta:
537 .word CONTROL_MEM_RTA_CTRL 528 .word CONTROL_MEM_RTA_CTRL
529l2dis_3630_offset:
530 .long l2dis_3630 - .
531
532 .data
538l2dis_3630: 533l2dis_3630:
539 .word 0 534 .word 0
540 535
536 .data
537l2_inv_api_params:
538 .word 0x1, 0x00
539
541/* 540/*
542 * Internal functions 541 * Internal functions
543 */ 542 */
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 9b09d85d811a..c7a3b4aab4b5 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -29,12 +29,6 @@
29 dsb 29 dsb
30.endm 30.endm
31 31
32ppa_zero_params:
33 .word 0x0
34
35ppa_por_params:
36 .word 1, 0
37
38#ifdef CONFIG_ARCH_OMAP4 32#ifdef CONFIG_ARCH_OMAP4
39 33
40/* 34/*
@@ -266,7 +260,9 @@ ENTRY(omap4_cpu_resume)
266 beq skip_ns_smp_enable 260 beq skip_ns_smp_enable
267ppa_actrl_retry: 261ppa_actrl_retry:
268 mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX 262 mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX
269 adr r3, ppa_zero_params @ Pointer to parameters 263 adr r1, ppa_zero_params_offset
264 ldr r3, [r1]
265 add r3, r3, r1 @ Pointer to ppa_zero_params
270 mov r1, #0x0 @ Process ID 266 mov r1, #0x0 @ Process ID
271 mov r2, #0x4 @ Flag 267 mov r2, #0x4 @ Flag
272 mov r6, #0xff 268 mov r6, #0xff
@@ -303,7 +299,9 @@ skip_ns_smp_enable:
303 ldr r0, =OMAP4_PPA_L2_POR_INDEX 299 ldr r0, =OMAP4_PPA_L2_POR_INDEX
304 ldr r1, =OMAP44XX_SAR_RAM_BASE 300 ldr r1, =OMAP44XX_SAR_RAM_BASE
305 ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET] 301 ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET]
306 adr r3, ppa_por_params 302 adr r1, ppa_por_params_offset
303 ldr r3, [r1]
304 add r3, r3, r1 @ Pointer to ppa_por_params
307 str r4, [r3, #0x04] 305 str r4, [r3, #0x04]
308 mov r1, #0x0 @ Process ID 306 mov r1, #0x0 @ Process ID
309 mov r2, #0x4 @ Flag 307 mov r2, #0x4 @ Flag
@@ -328,6 +326,8 @@ skip_l2en:
328#endif 326#endif
329 327
330 b cpu_resume @ Jump to generic resume 328 b cpu_resume @ Jump to generic resume
329ppa_por_params_offset:
330 .long ppa_por_params - .
331ENDPROC(omap4_cpu_resume) 331ENDPROC(omap4_cpu_resume)
332#endif /* CONFIG_ARCH_OMAP4 */ 332#endif /* CONFIG_ARCH_OMAP4 */
333 333
@@ -380,4 +380,13 @@ ENTRY(omap_do_wfi)
380 nop 380 nop
381 381
382 ldmfd sp!, {pc} 382 ldmfd sp!, {pc}
383ppa_zero_params_offset:
384 .long ppa_zero_params - .
383ENDPROC(omap_do_wfi) 385ENDPROC(omap_do_wfi)
386
387 .data
388ppa_zero_params:
389 .word 0
390
391ppa_por_params:
392 .word 1, 0
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-26 13:23:48 -0400