4 files changed, 37 insertions, 2 deletions

diff --git a/arch/arm/boot/dts/vt8500.dtsi b/arch/arm/boot/dts/vt8500.dtsi
index 4a4b96f6827e..a0b490d51519 100644
--- a/arch/arm/boot/dts/vt8500.dtsi
+++ b/arch/arm/boot/dts/vt8500.dtsi
@@ -11,6 +11,16 @@
 / {
         compatible = "via,vt8500";
 
+        cpus {
+                #address-cells = <0>;
+                #size-cells = <0>;
+
+                cpu {
+                        device_type = "cpu";
+                        compatible = "arm,arm926ej-s";
+                };
+        };
+
         soc {
                 #address-cells = <1>;
                 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index b2bf359e852f..35d9ead79513 100644
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -12,8 +12,12 @@
         compatible = "wm,wm8505";
 
         cpus {
-                cpu@0 {
-                        compatible = "arm,arm926ejs";
+                #address-cells = <0>;
+                #size-cells = <0>;
+
+                cpu {
+                        device_type = "cpu";
+                        compatible = "arm,arm926ej-s";
                 };
         };
 
diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi
index dd8464eeb40d..7dce5c18615c 100644
--- a/arch/arm/boot/dts/wm8650.dtsi
+++ b/arch/arm/boot/dts/wm8650.dtsi
@@ -11,6 +11,16 @@
 / {
         compatible = "wm,wm8650";
 
+        cpus {
+                #address-cells = <0>;
+                #size-cells = <0>;
+
+                cpu {
+                        device_type = "cpu";
+                        compatible = "arm,arm926ej-s";
+                };
+        };
+
         soc {
                 #address-cells = <1>;
                 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
index fc790d0aee66..3aa131538935 100644
--- a/arch/arm/boot/dts/wm8850.dtsi
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -11,6 +11,17 @@
 / {
         compatible = "wm,wm8850";
 
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a9";
+                        reg = <0x0>;
+                };
+        };
+
         aliases {
                 serial0 = &uart0;
                 serial1 = &uart1;