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-rw-r--r--drivers/staging/rtl8192u/ieee80211/rtl819x_HT.h38
1 files changed, 19 insertions, 19 deletions
diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_HT.h b/drivers/staging/rtl8192u/ieee80211/rtl819x_HT.h
index c3aabbaac7ae..5f54d93dfb66 100644
--- a/drivers/staging/rtl8192u/ieee80211/rtl819x_HT.h
+++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_HT.h
@@ -35,7 +35,7 @@
35#define HT_SUPPORTED_MCS_1SS_2SS_BITMAP HT_MCS_1SS_BITMAP|HT_MCS_1SS_2SS_BITMAP 35#define HT_SUPPORTED_MCS_1SS_2SS_BITMAP HT_MCS_1SS_BITMAP|HT_MCS_1SS_2SS_BITMAP
36 36
37 37
38typedef enum _HT_MCS_RATE{ 38typedef enum _HT_MCS_RATE {
39 HT_MCS0 = 0x00000001, 39 HT_MCS0 = 0x00000001,
40 HT_MCS1 = 0x00000002, 40 HT_MCS1 = 0x00000002,
41 HT_MCS2 = 0x00000004, 41 HT_MCS2 = 0x00000004,
@@ -58,7 +58,7 @@ typedef enum _HT_MCS_RATE{
58// 58//
59// Represent Channel Width in HT Capabilities 59// Represent Channel Width in HT Capabilities
60// 60//
61typedef enum _HT_CHANNEL_WIDTH{ 61typedef enum _HT_CHANNEL_WIDTH {
62 HT_CHANNEL_WIDTH_20 = 0, 62 HT_CHANNEL_WIDTH_20 = 0,
63 HT_CHANNEL_WIDTH_20_40 = 1, 63 HT_CHANNEL_WIDTH_20_40 = 1,
64}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH; 64}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;
@@ -67,14 +67,14 @@ typedef enum _HT_CHANNEL_WIDTH{
67// Represent Extension Channel Offset in HT Capabilities 67// Represent Extension Channel Offset in HT Capabilities
68// This is available only in 40Mhz mode. 68// This is available only in 40Mhz mode.
69// 69//
70typedef enum _HT_EXTCHNL_OFFSET{ 70typedef enum _HT_EXTCHNL_OFFSET {
71 HT_EXTCHNL_OFFSET_NO_EXT = 0, 71 HT_EXTCHNL_OFFSET_NO_EXT = 0,
72 HT_EXTCHNL_OFFSET_UPPER = 1, 72 HT_EXTCHNL_OFFSET_UPPER = 1,
73 HT_EXTCHNL_OFFSET_NO_DEF = 2, 73 HT_EXTCHNL_OFFSET_NO_DEF = 2,
74 HT_EXTCHNL_OFFSET_LOWER = 3, 74 HT_EXTCHNL_OFFSET_LOWER = 3,
75}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET; 75}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET;
76 76
77typedef enum _CHNLOP{ 77typedef enum _CHNLOP {
78 CHNLOP_NONE = 0, // No Action now 78 CHNLOP_NONE = 0, // No Action now
79 CHNLOP_SCAN = 1, // Scan in progress 79 CHNLOP_SCAN = 1, // Scan in progress
80 CHNLOP_SWBW = 2, // Bandwidth switching in progress 80 CHNLOP_SWBW = 2, // Bandwidth switching in progress
@@ -119,7 +119,7 @@ typedef union _HT_CAPABILITY_MACPARA{
119}HT_CAPABILITY_MACPARA, *PHT_CAPABILITY_MACPARA; 119}HT_CAPABILITY_MACPARA, *PHT_CAPABILITY_MACPARA;
120*/ 120*/
121 121
122typedef enum _HT_ACTION{ 122typedef enum _HT_ACTION {
123 ACT_RECOMMAND_WIDTH = 0, 123 ACT_RECOMMAND_WIDTH = 0,
124 ACT_MIMO_PWR_SAVE = 1, 124 ACT_MIMO_PWR_SAVE = 1,
125 ACT_PSMP = 2, 125 ACT_PSMP = 2,
@@ -134,14 +134,14 @@ typedef enum _HT_ACTION{
134 134
135 135
136/* 2007/06/07 MH Define sub-carrier mode for 40MHZ. */ 136/* 2007/06/07 MH Define sub-carrier mode for 40MHZ. */
137typedef enum _HT_Bandwidth_40MHZ_Sub_Carrier{ 137typedef enum _HT_Bandwidth_40MHZ_Sub_Carrier {
138 SC_MODE_DUPLICATE = 0, 138 SC_MODE_DUPLICATE = 0,
139 SC_MODE_LOWER = 1, 139 SC_MODE_LOWER = 1,
140 SC_MODE_UPPER = 2, 140 SC_MODE_UPPER = 2,
141 SC_MODE_FULL40MHZ = 3, 141 SC_MODE_FULL40MHZ = 3,
142}HT_BW40_SC_E; 142}HT_BW40_SC_E;
143 143
144typedef struct _HT_CAPABILITY_ELE{ 144typedef struct _HT_CAPABILITY_ELE {
145 145
146 //HT capability info 146 //HT capability info
147 u8 AdvCoding:1; 147 u8 AdvCoding:1;
@@ -184,7 +184,7 @@ typedef struct _HT_CAPABILITY_ELE{
184// Only AP is required to include this element 184// Only AP is required to include this element
185//------------------------------------------------------------ 185//------------------------------------------------------------
186 186
187typedef struct _HT_INFORMATION_ELE{ 187typedef struct _HT_INFORMATION_ELE {
188 u8 ControlChl; 188 u8 ControlChl;
189 189
190 u8 ExtChlOffset:2; 190 u8 ExtChlOffset:2;
@@ -215,18 +215,18 @@ typedef struct _HT_INFORMATION_ELE{
215// MIMO Power Save control field. 215// MIMO Power Save control field.
216// This is appear in MIMO Power Save Action Frame 216// This is appear in MIMO Power Save Action Frame
217// 217//
218typedef struct _MIMOPS_CTRL{ 218typedef struct _MIMOPS_CTRL {
219 u8 MimoPsEnable:1; 219 u8 MimoPsEnable:1;
220 u8 MimoPsMode:1; 220 u8 MimoPsMode:1;
221 u8 Reserved:6; 221 u8 Reserved:6;
222} MIMOPS_CTRL, *PMIMOPS_CTRL; 222} MIMOPS_CTRL, *PMIMOPS_CTRL;
223 223
224typedef enum _HT_SPEC_VER{ 224typedef enum _HT_SPEC_VER {
225 HT_SPEC_VER_IEEE = 0, 225 HT_SPEC_VER_IEEE = 0,
226 HT_SPEC_VER_EWC = 1, 226 HT_SPEC_VER_EWC = 1,
227}HT_SPEC_VER, *PHT_SPEC_VER; 227}HT_SPEC_VER, *PHT_SPEC_VER;
228 228
229typedef enum _HT_AGGRE_MODE_E{ 229typedef enum _HT_AGGRE_MODE_E {
230 HT_AGG_AUTO = 0, 230 HT_AGG_AUTO = 0,
231 HT_AGG_FORCE_ENABLE = 1, 231 HT_AGG_FORCE_ENABLE = 1,
232 HT_AGG_FORCE_DISABLE = 2, 232 HT_AGG_FORCE_DISABLE = 2,
@@ -238,7 +238,7 @@ typedef enum _HT_AGGRE_MODE_E{
238// to default value in HTInitializeHTInfo() 238// to default value in HTInitializeHTInfo()
239//------------------------------------------------------------ 239//------------------------------------------------------------
240 240
241typedef struct _RT_HIGH_THROUGHPUT{ 241typedef struct _RT_HIGH_THROUGHPUT {
242 u8 bEnableHT; 242 u8 bEnableHT;
243 u8 bCurrentHTSupport; 243 u8 bCurrentHTSupport;
244 244
@@ -347,7 +347,7 @@ typedef struct _RT_HIGH_THROUGHPUT{
347// when card is configured as "AP mode" 347// when card is configured as "AP mode"
348//------------------------------------------------------------ 348//------------------------------------------------------------
349 349
350typedef struct _RT_HTINFO_STA_ENTRY{ 350typedef struct _RT_HTINFO_STA_ENTRY {
351 u8 bEnableHT; 351 u8 bEnableHT;
352 352
353 u8 bSupportCck; 353 u8 bSupportCck;
@@ -377,7 +377,7 @@ typedef struct _RT_HTINFO_STA_ENTRY{
377// when card is configured as "STA mode" 377// when card is configured as "STA mode"
378//------------------------------------------------------------ 378//------------------------------------------------------------
379 379
380typedef struct _BSS_HT{ 380typedef struct _BSS_HT {
381 381
382 u8 bdSupportHT; 382 u8 bdSupportHT;
383 383
@@ -395,7 +395,7 @@ typedef struct _BSS_HT{
395 u8 bdRT2RTLongSlotTime; 395 u8 bdRT2RTLongSlotTime;
396} __attribute__ ((packed)) BSS_HT, *PBSS_HT; 396} __attribute__ ((packed)) BSS_HT, *PBSS_HT;
397 397
398typedef struct _MIMO_RSSI{ 398typedef struct _MIMO_RSSI {
399 u32 EnableAntenna; 399 u32 EnableAntenna;
400 u32 AntennaA; 400 u32 AntennaA;
401 u32 AntennaB; 401 u32 AntennaB;
@@ -404,12 +404,12 @@ typedef struct _MIMO_RSSI{
404 u32 Average; 404 u32 Average;
405}MIMO_RSSI, *PMIMO_RSSI; 405}MIMO_RSSI, *PMIMO_RSSI;
406 406
407typedef struct _MIMO_EVM{ 407typedef struct _MIMO_EVM {
408 u32 EVM1; 408 u32 EVM1;
409 u32 EVM2; 409 u32 EVM2;
410}MIMO_EVM, *PMIMO_EVM; 410}MIMO_EVM, *PMIMO_EVM;
411 411
412typedef struct _FALSE_ALARM_STATISTICS{ 412typedef struct _FALSE_ALARM_STATISTICS {
413 u32 Cnt_Parity_Fail; 413 u32 Cnt_Parity_Fail;
414 u32 Cnt_Rate_Illegal; 414 u32 Cnt_Rate_Illegal;
415 u32 Cnt_Crc8_fail; 415 u32 Cnt_Crc8_fail;
@@ -442,7 +442,7 @@ extern u8 MCS_FILTER_1SS[16];
442 442
443#define IS_11N_MCS_RATE(rate) (rate&0x80) 443#define IS_11N_MCS_RATE(rate) (rate&0x80)
444 444
445typedef enum _HT_AGGRE_SIZE{ 445typedef enum _HT_AGGRE_SIZE {
446 HT_AGG_SIZE_8K = 0, 446 HT_AGG_SIZE_8K = 0,
447 HT_AGG_SIZE_16K = 1, 447 HT_AGG_SIZE_16K = 1,
448 HT_AGG_SIZE_32K = 2, 448 HT_AGG_SIZE_32K = 2,
@@ -464,7 +464,7 @@ typedef enum _HT_IOT_PEER
464// 464//
465// IOT Action for different AP 465// IOT Action for different AP
466// 466//
467typedef enum _HT_IOT_ACTION{ 467typedef enum _HT_IOT_ACTION {
468 HT_IOT_ACT_TX_USE_AMSDU_4K = 0x00000001, 468 HT_IOT_ACT_TX_USE_AMSDU_4K = 0x00000001,
469 HT_IOT_ACT_TX_USE_AMSDU_8K = 0x00000002, 469 HT_IOT_ACT_TX_USE_AMSDU_8K = 0x00000002,
470 HT_IOT_ACT_DISABLE_MCS14 = 0x00000004, 470 HT_IOT_ACT_DISABLE_MCS14 = 0x00000004,