aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--Documentation/devicetree/bindings/dma/ste-dma40.txt62
-rw-r--r--arch/arm/mach-ux500/board-mop500-audio.c56
-rw-r--r--arch/arm/mach-ux500/board-mop500-sdi.c40
-rw-r--r--arch/arm/mach-ux500/board-mop500.c63
-rw-r--r--arch/arm/mach-ux500/board-mop500.h1
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c52
-rw-r--r--arch/arm/mach-ux500/devices-db8500.c123
-rw-r--r--arch/arm/mach-ux500/ste-dma40-db8500.h193
-rw-r--r--arch/arm/mach-ux500/usb.c18
-rw-r--r--drivers/crypto/ux500/cryp/cryp.h7
-rw-r--r--drivers/crypto/ux500/cryp/cryp_core.c31
-rw-r--r--drivers/crypto/ux500/hash/hash_alg.h5
-rw-r--r--drivers/crypto/ux500/hash/hash_core.c24
-rw-r--r--drivers/dma/ste_dma40.c366
-rw-r--r--drivers/dma/ste_dma40_ll.c106
-rw-r--r--drivers/dma/ste_dma40_ll.h3
-rw-r--r--include/linux/platform_data/dma-ste-dma40.h20
17 files changed, 504 insertions, 666 deletions
diff --git a/Documentation/devicetree/bindings/dma/ste-dma40.txt b/Documentation/devicetree/bindings/dma/ste-dma40.txt
new file mode 100644
index 000000000000..2679a873522d
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ste-dma40.txt
@@ -0,0 +1,62 @@
1* DMA40 DMA Controller
2
3Required properties:
4- compatible: "stericsson,dma40"
5- reg: Address range of the DMAC registers
6- reg-names: Names of the above areas to use during resource look-up
7- interrupt: Should contain the DMAC interrupt number
8- #dma-cells: must be <3>
9
10Optional properties:
11- dma-channels: Number of channels supported by hardware - if not present
12 the driver will attempt to obtain the information from H/W
13
14Example:
15
16 dma: dma-controller@801C0000 {
17 compatible = "stericsson,db8500-dma40", "stericsson,dma40";
18 reg = <0x801C0000 0x1000 0x40010000 0x800>;
19 reg-names = "base", "lcpa";
20 interrupt-parent = <&intc>;
21 interrupts = <0 25 0x4>;
22
23 #dma-cells = <2>;
24 dma-channels = <8>;
25 };
26
27Clients
28Required properties:
29- dmas: Comma separated list of dma channel requests
30- dma-names: Names of the aforementioned requested channels
31
32Each dmas request consists of 4 cells:
33 1. A phandle pointing to the DMA controller
34 2. Device Type
35 3. The DMA request line number (only when 'use fixed channel' is set)
36 4. A 32bit mask specifying; mode, direction and endianess [NB: This list will grow]
37 0x00000001: Mode:
38 Logical channel when unset
39 Physical channel when set
40 0x00000002: Direction:
41 Memory to Device when unset
42 Device to Memory when set
43 0x00000004: Endianess:
44 Little endian when unset
45 Big endian when set
46 0x00000008: Use fixed channel:
47 Use automatic channel selection when unset
48 Use DMA request line number when set
49
50Example:
51
52 uart@80120000 {
53 compatible = "arm,pl011", "arm,primecell";
54 reg = <0x80120000 0x1000>;
55 interrupts = <0 11 0x4>;
56
57 dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
58 <&dma 13 0 0x0>; /* Logical - MemToDev */
59 dma-names = "rx", "rx";
60
61 status = "disabled";
62 };
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index aba9e5692958..ec872622340f 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -22,27 +22,13 @@
22static struct stedma40_chan_cfg msp0_dma_rx = { 22static struct stedma40_chan_cfg msp0_dma_rx = {
23 .high_priority = true, 23 .high_priority = true,
24 .dir = STEDMA40_PERIPH_TO_MEM, 24 .dir = STEDMA40_PERIPH_TO_MEM,
25 25 .dev_type = DB8500_DMA_DEV31_MSP0_SLIM0_CH0,
26 .src_dev_type = DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX,
27 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
28
29 .src_info.psize = STEDMA40_PSIZE_LOG_4,
30 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
31
32 /* data_width is set during configuration */
33}; 26};
34 27
35static struct stedma40_chan_cfg msp0_dma_tx = { 28static struct stedma40_chan_cfg msp0_dma_tx = {
36 .high_priority = true, 29 .high_priority = true,
37 .dir = STEDMA40_MEM_TO_PERIPH, 30 .dir = STEDMA40_MEM_TO_PERIPH,
38 31 .dev_type = DB8500_DMA_DEV31_MSP0_SLIM0_CH0,
39 .src_dev_type = STEDMA40_DEV_DST_MEMORY,
40 .dst_dev_type = DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX,
41
42 .src_info.psize = STEDMA40_PSIZE_LOG_4,
43 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
44
45 /* data_width is set during configuration */
46}; 32};
47 33
48struct msp_i2s_platform_data msp0_platform_data = { 34struct msp_i2s_platform_data msp0_platform_data = {
@@ -54,27 +40,13 @@ struct msp_i2s_platform_data msp0_platform_data = {
54static struct stedma40_chan_cfg msp1_dma_rx = { 40static struct stedma40_chan_cfg msp1_dma_rx = {
55 .high_priority = true, 41 .high_priority = true,
56 .dir = STEDMA40_PERIPH_TO_MEM, 42 .dir = STEDMA40_PERIPH_TO_MEM,
57 43 .dev_type = DB8500_DMA_DEV30_MSP3,
58 .src_dev_type = DB8500_DMA_DEV30_MSP3_RX,
59 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
60
61 .src_info.psize = STEDMA40_PSIZE_LOG_4,
62 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
63
64 /* data_width is set during configuration */
65}; 44};
66 45
67static struct stedma40_chan_cfg msp1_dma_tx = { 46static struct stedma40_chan_cfg msp1_dma_tx = {
68 .high_priority = true, 47 .high_priority = true,
69 .dir = STEDMA40_MEM_TO_PERIPH, 48 .dir = STEDMA40_MEM_TO_PERIPH,
70 49 .dev_type = DB8500_DMA_DEV30_MSP1,
71 .src_dev_type = STEDMA40_DEV_DST_MEMORY,
72 .dst_dev_type = DB8500_DMA_DEV30_MSP1_TX,
73
74 .src_info.psize = STEDMA40_PSIZE_LOG_4,
75 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
76
77 /* data_width is set during configuration */
78}; 50};
79 51
80struct msp_i2s_platform_data msp1_platform_data = { 52struct msp_i2s_platform_data msp1_platform_data = {
@@ -86,31 +58,15 @@ struct msp_i2s_platform_data msp1_platform_data = {
86static struct stedma40_chan_cfg msp2_dma_rx = { 58static struct stedma40_chan_cfg msp2_dma_rx = {
87 .high_priority = true, 59 .high_priority = true,
88 .dir = STEDMA40_PERIPH_TO_MEM, 60 .dir = STEDMA40_PERIPH_TO_MEM,
89 61 .dev_type = DB8500_DMA_DEV14_MSP2,
90 .src_dev_type = DB8500_DMA_DEV14_MSP2_RX,
91 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
92
93 /* MSP2 DMA doesn't work with PSIZE == 4 on DB8500v2 */
94 .src_info.psize = STEDMA40_PSIZE_LOG_1,
95 .dst_info.psize = STEDMA40_PSIZE_LOG_1,
96
97 /* data_width is set during configuration */
98}; 62};
99 63
100static struct stedma40_chan_cfg msp2_dma_tx = { 64static struct stedma40_chan_cfg msp2_dma_tx = {
101 .high_priority = true, 65 .high_priority = true,
102 .dir = STEDMA40_MEM_TO_PERIPH, 66 .dir = STEDMA40_MEM_TO_PERIPH,
103 67 .dev_type = DB8500_DMA_DEV14_MSP2,
104 .src_dev_type = STEDMA40_DEV_DST_MEMORY,
105 .dst_dev_type = DB8500_DMA_DEV14_MSP2_TX,
106
107 .src_info.psize = STEDMA40_PSIZE_LOG_4,
108 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
109
110 .use_fixed_channel = true, 68 .use_fixed_channel = true,
111 .phy_channel = 1, 69 .phy_channel = 1,
112
113 /* data_width is set during configuration */
114}; 70};
115 71
116static struct platform_device *db8500_add_msp_i2s(struct device *parent, 72static struct platform_device *db8500_add_msp_i2s(struct device *parent,
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 0ef38775a0c1..29be714b8a73 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -35,19 +35,13 @@
35struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = { 35struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {