litmus-rt-ext-res.git - LITMUS^RT with extended reservations for Forbidden Zones paper @ RTAS'20

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-rw-r--r--

2 files changed, 8 insertions, 0 deletions

         /* Crucible Devices */
         { USB_DEVICE(FTDI_VID, FTDI_CT_COMET_PID) },
         { USB_DEVICE(FTDI_VID, FTDI_Z3X_PID) },
+        /* Cressi Devices */
+        { USB_DEVICE(FTDI_VID, FTDI_CRESSI_PID) },
         { }                                     /* Terminating entry */
 };
  * Manufacturer: Smart GSM Team
  */
 #define FTDI_Z3X_PID            0x0011
+/*
+ * Product: Cressi PC Interface
+ * Manufacturer: Cressi
+ */
+#define FTDI_CRESSI_PID         0x87d0

/* * Copyright (c) 2014-2015 Imagination Technologies Ltd. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published by * the Free Software Foundation. * */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/regulator/consumer.h> #include <linux/slab.h> #include <linux/iio/buffer.h> #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> #include <linux/iio/trigger.h> #include <linux/iio/trigger_consumer.h> #include <linux/iio/triggered_buffer.h> /* Registers */ #define CC10001_ADC_CONFIG 0x00 #define CC10001_ADC_START_CONV BIT(4) #define CC10001_ADC_MODE_SINGLE_CONV BIT(5) #define CC10001_ADC_DDATA_OUT 0x04 #define CC10001_ADC_EOC 0x08 #define CC10001_ADC_EOC_SET BIT(0) #define CC10001_ADC_CHSEL_SAMPLED 0x0c #define CC10001_ADC_POWER_DOWN 0x10 #define CC10001_ADC_POWER_DOWN_SET BIT(0) #define CC10001_ADC_DEBUG 0x14 #define CC10001_ADC_DATA_COUNT 0x20 #define CC10001_ADC_DATA_MASK GENMASK(9, 0) #define CC10001_ADC_NUM_CHANNELS 8 #define CC10001_ADC_CH_MASK GENMASK(2, 0) #define CC10001_INVALID_SAMPLED 0xffff #define CC10001_MAX_POLL_COUNT 20 /* * As per device specification, wait six clock cycles after power-up to * activate START. Since adding two more clock cycles delay does not * impact the performance too much, we are adding two additional cycles delay * intentionally here. */ #define CC10001_WAIT_CYCLES 8 struct cc10001_adc_device { void __iomem *reg_base; struct clk *adc_clk; struct regulator *reg; u16 *buf; bool shared; struct mutex lock; unsigned int start_delay_ns; unsigned int eoc_delay_ns; }; static inline void cc10001_adc_write_reg(struct cc10001_adc_device *adc_dev, u32 reg, u32 val) { writel(val, adc_dev->reg_base + reg); } static inline u32 cc10001_adc_read_reg(struct cc10001_adc_device *adc_dev, u32 reg) { return readl(adc_dev->reg_base + reg); } static void cc10001_adc_power_up(struct cc10001_adc_device *adc_dev) { cc10001_adc_write_reg(adc_dev, CC10001_ADC_POWER_DOWN, 0); ndelay(adc_dev->start_delay_ns); } static void cc10001_adc_power_down(struct cc10001_adc_device *adc_dev) { cc10001_adc_write_reg(adc_dev, CC10001_ADC_POWER_DOWN, CC10001_ADC_POWER_DOWN_SET); } static void cc10001_adc_start(struct cc10001_adc_device *adc_dev, unsigned int channel) { u32 val; /* Channel selection and mode of operation */ val = (channel & CC10001_ADC_CH_MASK) | CC10001_ADC_MODE_SINGLE_CONV; cc10001_adc_write_reg(adc_dev, CC10001_ADC_CONFIG, val); udelay(1); val = cc10001_adc_read_reg(adc_dev, CC10001_ADC_CONFIG); val = val | CC10001_ADC_START_CONV; cc10001_adc_write_reg(adc_dev, CC10001_ADC_CONFIG, val); } static u16 cc10001_adc_poll_done(struct iio_dev *indio_dev, unsigned int channel, unsigned int delay) { struct cc10001_adc_device *adc_dev = iio_priv(indio_dev); unsigned int poll_count = 0; while (!(cc10001_adc_read_reg(adc_dev, CC10001_ADC_EOC) & CC10001_ADC_EOC_SET)) { ndelay(delay); if (poll_count++ == CC10001_MAX_POLL_COUNT) return CC10001_INVALID_SAMPLED; } poll_count = 0; while ((cc10001_adc_read_reg(adc_dev, CC10001_ADC_CHSEL_SAMPLED) & CC10001_ADC_CH_MASK) != channel) { ndelay(delay); if (poll_count++ == CC10001_MAX_POLL_COUNT) return CC10001_INVALID_SAMPLED; } /* Read the 10 bit output register */ return cc10001_adc_read_reg(adc_dev, CC10001_ADC_DDATA_OUT) & CC10001_ADC_DATA_MASK; } static irqreturn_t cc10001_adc_trigger_h(int irq, void *p) { struct cc10001_adc_device *adc_dev; struct iio_poll_func *pf = p; struct iio_dev *indio_dev; unsigned int delay_ns; unsigned int channel; unsigned int scan_idx; bool sample_invalid; u16 *data; int i; indio_dev = pf->indio_dev; adc_dev = iio_priv(indio_dev); data = adc_dev->buf; mutex_lock(&adc_dev->lock); if (!adc_dev->shared) cc10001_adc_power_up(adc_dev); /* Calculate delay step for eoc and sampled data */ delay_ns = adc_dev->eoc_delay_ns / CC10001_MAX_POLL_COUNT; i = 0; sample_invalid = false; for_each_set_bit(scan_idx, indio_dev->active_scan_mask, indio_dev->masklength) { channel = indio_dev->channels[scan_idx].channel; cc10001_adc_start(adc_dev, channel); data[i] = cc10001_adc_poll_done(indio_dev, channel, delay_ns); if (data[i] == CC10001_INVALID_SAMPLED) { dev_warn(&indio_dev->dev, "invalid sample on channel %d\n", channel); sample_invalid = true; goto done; } i++; } done: if (!adc_dev->shared) cc10001_adc_power_down(adc_dev); mutex_unlock(&adc_dev->lock); if (!sample_invalid)


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