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-rw-r--r--arch/arm64/boot/dts/mediatek/mt8173.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 9fbc4c190dc9..ba46fe5a4a56 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -14,6 +14,7 @@
14#include <dt-bindings/clock/mt8173-clk.h> 14#include <dt-bindings/clock/mt8173-clk.h>
15#include <dt-bindings/interrupt-controller/irq.h> 15#include <dt-bindings/interrupt-controller/irq.h>
16#include <dt-bindings/interrupt-controller/arm-gic.h> 16#include <dt-bindings/interrupt-controller/arm-gic.h>
17#include <dt-bindings/reset-controller/mt8173-resets.h>
17#include "mt8173-pinfunc.h" 18#include "mt8173-pinfunc.h"
18 19
19/ { 20/ {
@@ -159,6 +160,17 @@
159 reg = <0 0x10005000 0 0x1000>; 160 reg = <0 0x10005000 0 0x1000>;
160 }; 161 };
161 162
163 pwrap: pwrap@1000d000 {
164 compatible = "mediatek,mt8173-pwrap";
165 reg = <0 0x1000d000 0 0x1000>;
166 reg-names = "pwrap";
167 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
168 resets = <&infracfg MT8173_INFRA_PMIC_WRAP_RST>;
169 reset-names = "pwrap";
170 clocks = <&infracfg CLK_INFRA_PMICSPI>, <&infracfg CLK_INFRA_PMICWRAP>;
171 clock-names = "spi", "wrap";
172 };
173
162 sysirq: intpol-controller@10200620 { 174 sysirq: intpol-controller@10200620 {
163 compatible = "mediatek,mt8173-sysirq", 175 compatible = "mediatek,mt8173-sysirq",
164 "mediatek,mt6577-sysirq"; 176 "mediatek,mt6577-sysirq";