diff options
-rw-r--r-- | drivers/dma/xilinx/xilinx_dma.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index 1fbe0258578b..5d56f1e4d332 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c | |||
@@ -68,6 +68,9 @@ | |||
68 | #define XILINX_DMA_DMACR_CIRC_EN BIT(1) | 68 | #define XILINX_DMA_DMACR_CIRC_EN BIT(1) |
69 | #define XILINX_DMA_DMACR_RUNSTOP BIT(0) | 69 | #define XILINX_DMA_DMACR_RUNSTOP BIT(0) |
70 | #define XILINX_DMA_DMACR_FSYNCSRC_MASK GENMASK(6, 5) | 70 | #define XILINX_DMA_DMACR_FSYNCSRC_MASK GENMASK(6, 5) |
71 | #define XILINX_DMA_DMACR_DELAY_MASK GENMASK(31, 24) | ||
72 | #define XILINX_DMA_DMACR_FRAME_COUNT_MASK GENMASK(23, 16) | ||
73 | #define XILINX_DMA_DMACR_MASTER_MASK GENMASK(11, 8) | ||
71 | 74 | ||
72 | #define XILINX_DMA_REG_DMASR 0x0004 | 75 | #define XILINX_DMA_REG_DMASR 0x0004 |
73 | #define XILINX_DMA_DMASR_EOL_LATE_ERR BIT(15) | 76 | #define XILINX_DMA_DMASR_EOL_LATE_ERR BIT(15) |
@@ -2118,8 +2121,10 @@ int xilinx_vdma_channel_set_config(struct dma_chan *dchan, | |||
2118 | chan->config.gen_lock = cfg->gen_lock; | 2121 | chan->config.gen_lock = cfg->gen_lock; |
2119 | chan->config.master = cfg->master; | 2122 | chan->config.master = cfg->master; |
2120 | 2123 | ||
2124 | dmacr &= ~XILINX_DMA_DMACR_GENLOCK_EN; | ||
2121 | if (cfg->gen_lock && chan->genlock) { | 2125 | if (cfg->gen_lock && chan->genlock) { |
2122 | dmacr |= XILINX_DMA_DMACR_GENLOCK_EN; | 2126 | dmacr |= XILINX_DMA_DMACR_GENLOCK_EN; |
2127 | dmacr &= ~XILINX_DMA_DMACR_MASTER_MASK; | ||
2123 | dmacr |= cfg->master << XILINX_DMA_DMACR_MASTER_SHIFT; | 2128 | dmacr |= cfg->master << XILINX_DMA_DMACR_MASTER_SHIFT; |
2124 | } | 2129 | } |
2125 | 2130 | ||
@@ -2135,11 +2140,13 @@ int xilinx_vdma_channel_set_config(struct dma_chan *dchan, | |||
2135 | chan->config.delay = cfg->delay; | 2140 | chan->config.delay = cfg->delay; |
2136 | 2141 | ||
2137 | if (cfg->coalesc <= XILINX_DMA_DMACR_FRAME_COUNT_MAX) { | 2142 | if (cfg->coalesc <= XILINX_DMA_DMACR_FRAME_COUNT_MAX) { |
2143 | dmacr &= ~XILINX_DMA_DMACR_FRAME_COUNT_MASK; | ||
2138 | dmacr |= cfg->coalesc << XILINX_DMA_DMACR_FRAME_COUNT_SHIFT; | 2144 | dmacr |= cfg->coalesc << XILINX_DMA_DMACR_FRAME_COUNT_SHIFT; |
2139 | chan->config.coalesc = cfg->coalesc; | 2145 | chan->config.coalesc = cfg->coalesc; |
2140 | } | 2146 | } |
2141 | 2147 | ||
2142 | if (cfg->delay <= XILINX_DMA_DMACR_DELAY_MAX) { | 2148 | if (cfg->delay <= XILINX_DMA_DMACR_DELAY_MAX) { |
2149 | dmacr &= ~XILINX_DMA_DMACR_DELAY_MASK; | ||
2143 | dmacr |= cfg->delay << XILINX_DMA_DMACR_DELAY_SHIFT; | 2150 | dmacr |= cfg->delay << XILINX_DMA_DMACR_DELAY_SHIFT; |
2144 | chan->config.delay = cfg->delay; | 2151 | chan->config.delay = cfg->delay; |
2145 | } | 2152 | } |