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-rw-r--r--arch/x86/include/asm/intel-family.h1
-rw-r--r--arch/x86/include/asm/msr-index.h11
-rw-r--r--drivers/cpufreq/intel_pstate.c15
-rw-r--r--drivers/idle/intel_idle.c6
-rw-r--r--tools/power/x86/turbostat/turbostat.8253
-rw-r--r--tools/power/x86/turbostat/turbostat.c1880
6 files changed, 1570 insertions, 596 deletions
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 8167fdb67ae8..9814db42b790 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -59,6 +59,7 @@
59#define INTEL_FAM6_ATOM_MERRIFIELD 0x4A /* Tangier */ 59#define INTEL_FAM6_ATOM_MERRIFIELD 0x4A /* Tangier */
60#define INTEL_FAM6_ATOM_MOOREFIELD 0x5A /* Anniedale */ 60#define INTEL_FAM6_ATOM_MOOREFIELD 0x5A /* Anniedale */
61#define INTEL_FAM6_ATOM_GOLDMONT 0x5C 61#define INTEL_FAM6_ATOM_GOLDMONT 0x5C
62#define INTEL_FAM6_ATOM_GEMINI_LAKE 0x7A
62#define INTEL_FAM6_ATOM_DENVERTON 0x5F /* Goldmont Microserver */ 63#define INTEL_FAM6_ATOM_DENVERTON 0x5F /* Goldmont Microserver */
63 64
64/* Xeon Phi */ 65/* Xeon Phi */
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 00293a94ffaf..d8b5f8ab8ef9 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -46,7 +46,7 @@
46#define MSR_FSB_FREQ 0x000000cd 46#define MSR_FSB_FREQ 0x000000cd
47#define MSR_PLATFORM_INFO 0x000000ce 47#define MSR_PLATFORM_INFO 0x000000ce
48 48
49#define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 49#define MSR_PKG_CST_CONFIG_CONTROL 0x000000e2
50#define NHM_C3_AUTO_DEMOTE (1UL << 25) 50#define NHM_C3_AUTO_DEMOTE (1UL << 25)
51#define NHM_C1_AUTO_DEMOTE (1UL << 26) 51#define NHM_C1_AUTO_DEMOTE (1UL << 26)
52#define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25) 52#define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25)
@@ -147,6 +147,7 @@
147/* C-state Residency Counters */ 147/* C-state Residency Counters */
148#define MSR_PKG_C3_RESIDENCY 0x000003f8 148#define MSR_PKG_C3_RESIDENCY 0x000003f8
149#define MSR_PKG_C6_RESIDENCY 0x000003f9 149#define MSR_PKG_C6_RESIDENCY 0x000003f9
150#define MSR_ATOM_PKG_C6_RESIDENCY 0x000003fa
150#define MSR_PKG_C7_RESIDENCY 0x000003fa 151#define MSR_PKG_C7_RESIDENCY 0x000003fa
151#define MSR_CORE_C3_RESIDENCY 0x000003fc 152#define MSR_CORE_C3_RESIDENCY 0x000003fc
152#define MSR_CORE_C6_RESIDENCY 0x000003fd 153#define MSR_CORE_C6_RESIDENCY 0x000003fd
@@ -203,10 +204,17 @@
203#define MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B 204#define MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
204 205
205#define MSR_CORE_C1_RES 0x00000660 206#define MSR_CORE_C1_RES 0x00000660
207#define MSR_MODULE_C6_RES_MS 0x00000664
206 208
207#define MSR_CC6_DEMOTION_POLICY_CONFIG 0x00000668 209#define MSR_CC6_DEMOTION_POLICY_CONFIG 0x00000668
208#define MSR_MC6_DEMOTION_POLICY_CONFIG 0x00000669 210#define MSR_MC6_DEMOTION_POLICY_CONFIG 0x00000669
209 211
212#define MSR_ATOM_CORE_RATIOS 0x0000066a
213#define MSR_ATOM_CORE_VIDS 0x0000066b
214#define MSR_ATOM_CORE_TURBO_RATIOS 0x0000066c
215#define MSR_ATOM_CORE_TURBO_VIDS 0x0000066d
216
217
210#define MSR_CORE_PERF_LIMIT_REASONS 0x00000690 218#define MSR_CORE_PERF_LIMIT_REASONS 0x00000690
211#define MSR_GFX_PERF_LIMIT_REASONS 0x000006B0 219#define MSR_GFX_PERF_LIMIT_REASONS 0x000006B0
212#define MSR_RING_PERF_LIMIT_REASONS 0x000006B1 220#define MSR_RING_PERF_LIMIT_REASONS 0x000006B1
@@ -459,6 +467,7 @@
459 467
460#define MSR_IA32_TEMPERATURE_TARGET 0x000001a2 468#define MSR_IA32_TEMPERATURE_TARGET 0x000001a2
461 469
470#define MSR_MISC_FEATURE_CONTROL 0x000001a4
462#define MSR_MISC_PWR_MGMT 0x000001aa 471#define MSR_MISC_PWR_MGMT 0x000001aa
463 472
464#define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0 473#define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index eb0f7fb71685..676a92413e68 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -39,11 +39,6 @@
39 39
40#define INTEL_CPUFREQ_TRANSITION_LATENCY 20000 40#define INTEL_CPUFREQ_TRANSITION_LATENCY 20000
41 41
42#define ATOM_RATIOS 0x66a
43#define ATOM_VIDS 0x66b
44#define ATOM_TURBO_RATIOS 0x66c
45#define ATOM_TURBO_VIDS 0x66d
46
47#ifdef CONFIG_ACPI 42#ifdef CONFIG_ACPI
48#include <acpi/processor.h> 43#include <acpi/processor.h>
49#include <acpi/cppc_acpi.h> 44#include <acpi/cppc_acpi.h>
@@ -1367,7 +1362,7 @@ static int atom_get_min_pstate(void)
1367{ 1362{
1368 u64 value; 1363 u64 value;
1369 1364
1370 rdmsrl(ATOM_RATIOS, value); 1365 rdmsrl(MSR_ATOM_CORE_RATIOS, value);
1371 return (value >> 8) & 0x7F; 1366 return (value >> 8) & 0x7F;
1372} 1367}
1373 1368
@@ -1375,7 +1370,7 @@ static int atom_get_max_pstate(void)
1375{ 1370{
1376 u64 value; 1371 u64 value;
1377 1372
1378 rdmsrl(ATOM_RATIOS, value); 1373 rdmsrl(MSR_ATOM_CORE_RATIOS, value);
1379 return (value >> 16) & 0x7F; 1374 return (value >> 16) & 0x7F;
1380} 1375}
1381 1376
@@ -1383,7 +1378,7 @@ static int atom_get_turbo_pstate(void)
1383{ 1378{
1384 u64 value; 1379 u64 value;
1385 1380
1386 rdmsrl(ATOM_TURBO_RATIOS, value); 1381 rdmsrl(MSR_ATOM_CORE_TURBO_RATIOS, value);
1387 return value & 0x7F; 1382 return value & 0x7F;
1388} 1383}
1389 1384
@@ -1445,7 +1440,7 @@ static void atom_get_vid(struct cpudata *cpudata)
1445{ 1440{
1446 u64 value; 1441 u64 value;
1447 1442
1448 rdmsrl(ATOM_VIDS, value); 1443 rdmsrl(MSR_ATOM_CORE_VIDS, value);
1449 cpudata->vid.min = int_tofp((value >> 8) & 0x7f); 1444 cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
1450 cpudata->vid.max = int_tofp((value >> 16) & 0x7f); 1445 cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
1451 cpudata->vid.ratio = div_fp( 1446 cpudata->vid.ratio = div_fp(
@@ -1453,7 +1448,7 @@ static void atom_get_vid(struct cpudata *cpudata)
1453 int_tofp(cpudata->pstate.max_pstate - 1448 int_tofp(cpudata->pstate.max_pstate -
1454 cpudata->pstate.min_pstate)); 1449 cpudata->pstate.min_pstate));
1455 1450
1456 rdmsrl(ATOM_TURBO_VIDS, value); 1451 rdmsrl(MSR_ATOM_CORE_TURBO_VIDS, value);
1457 cpudata->vid.turbo = value & 0x7f; 1452 cpudata->vid.turbo = value & 0x7f;
1458} 1453}
1459 1454
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 7d8ea3d5fda6..930537da76d4 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -961,9 +961,9 @@ static void auto_demotion_disable(void)
961{ 961{
962 unsigned long long msr_bits; 962 unsigned long long msr_bits;
963 963
964 rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); 964 rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits);
965 msr_bits &= ~(icpu->auto_demotion_disable_flags); 965 msr_bits &= ~(icpu->auto_demotion_disable_flags);
966 wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); 966 wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits);
967} 967}
968static void c1e_promotion_disable(void) 968static void c1e_promotion_disable(void)
969{ 969{
@@ -1273,7 +1273,7 @@ static void sklh_idle_state_table_update(void)
1273 if ((mwait_substates & (0xF << 28)) == 0) 1273 if ((mwait_substates & (0xF << 28)) == 0)
1274 return; 1274 return;
1275 1275
1276 rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr); 1276 rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr);
1277 1277
1278 /* PC10 is not enabled in PKG C-state limit */ 1278 /* PC10 is not enabled in PKG C-state limit */
1279 if ((msr & 0xF) != 8) 1279 if ((msr & 0xF) != 8)
diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8
index 03cb639b292e..fedca3285326 100644
--- a/tools/power/x86/turbostat/turbostat.8
+++ b/tools/power/x86/turbostat/turbostat.8
@@ -16,9 +16,9 @@ idle power-state statistics, temperature and power on X86 processors.
16There are two ways to invoke turbostat. 16There are two ways to invoke turbostat.
17The first method is to supply a 17The first method is to supply a
18\fBcommand\fP, which is forked and statistics are printed 18\fBcommand\fP, which is forked and statistics are printed
19upon its completion. 19in one-shot upon its completion.
20The second method is to omit the command, 20The second method is to omit the command,
21and turbostat displays statistics every 5 seconds. 21and turbostat displays statistics every 5 seconds interval.
22The 5-second interval can be changed using the --interval option. 22The 5-second interval can be changed using the --interval option.
23.PP 23.PP
24Some information is not available on older processors. 24Some information is not available on older processors.
@@ -28,9 +28,10 @@ name as necessary to disambiguate it from others is necessary. Note that option
28.PP 28.PP
29\fB--add attributes\fP add column with counter having specified 'attributes'. The 'location' attribute is required, all others are optional. 29\fB--add attributes\fP add column with counter having specified 'attributes'. The 'location' attribute is required, all others are optional.
30.nf 30.nf
31 location: {\fBmsrDDD\fP | \fBmsr0xXXX\fP} 31 location: {\fBmsrDDD\fP | \fBmsr0xXXX\fP | \fB/sys/path...\fP}
32 msrDDD is a decimal offset, eg. msr16 32 msrDDD is a decimal offset, eg. msr16
33 msr0xXXX is a hex offset, eg. msr0x10 33 msr0xXXX is a hex offset, eg. msr0x10
34 /sys/path... is an absolute path to a sysfs attribute
34 35
35 scope: {\fBcpu\fP | \fBcore\fP | \fBpackage\fP} 36 scope: {\fBcpu\fP | \fBcore\fP | \fBpackage\fP}
36 sample and print the counter for every cpu, core, or package. 37 sample and print the counter for every cpu, core, or package.
@@ -45,12 +46,21 @@ name as necessary to disambiguate it from others is necessary. Note that option
45 'delta' shows the difference in values during the measurement interval. 46 'delta' shows the difference in values during the measurement interval.
46 'percent' shows the delta as a percentage of the cycles elapsed. 47 'percent' shows the delta as a percentage of the cycles elapsed.
47 default: delta 48 default: delta
49
50 name: "name_string"
51 Any string that does not match a key-word above is used
52 as the column header.
48.fi 53.fi
49.PP 54.PP
55\fB--cpu cpu-set\fP limit output to system summary plus the specified cpu-set. If cpu-set is the string "core", then the system summary plus the first CPU in each core are printed -- eg. subsequent HT siblings are not printed. Or if cpu-set is the string "package", then the system summary plus the first CPU in each package is printed. Otherwise, the system summary plus the specified set of CPUs are printed. The cpu-set is ordered from low to high, comma delimited with ".." and "-" permitted to denote a range. eg. 1,2,8,14..17,21-44
56.PP
57\fB--hide column\fP do not show the specified columns. May be invoked multiple times, or with a comma-separated list of column names. Use "--hide sysfs" to hide the sysfs statistics columns as a group.
58.PP
59\fB--show column\fP show only the specified columns. May be invoked multiple times, or with a comma-separated list of column names. Use "--show sysfs" to show the sysfs statistics columns as a group.
60.PP
50\fB--Dump\fP displays the raw counter values. 61\fB--Dump\fP displays the raw counter values.
51.PP 62.PP
52\fB--debug\fP displays additional system configuration information. Invoking this parameter 63\fB--quiet\fP Do not decode and print the system configuration header information.
53more than once may also enable internal turbostat debug information.
54.PP 64.PP
55\fB--interval seconds\fP overrides the default 5.0 second measurement interval. 65\fB--interval seconds\fP overrides the default 5.0 second measurement interval.
56.PP 66.PP
@@ -61,9 +71,7 @@ The file is truncated if it already exists, and it is created if it does not exi
61.PP 71.PP
62\fB--Joules\fP displays energy in Joules, rather than dividing Joules by time to print power in Watts. 72\fB--Joules\fP displays energy in Joules, rather than dividing Joules by time to print power in Watts.
63.PP 73.PP
64\fB--Package\fP limits output to the system summary plus the 1st thread in each Package. 74\fB--list\fP display column header names available for use by --show and --hide, then exit.
65.PP
66\fB--processor\fP limits output to the system summary plus the 1st thread in each processor of each package. Ie. it skips hyper-threaded siblings.
67.PP 75.PP
68\fB--Summary\fP limits output to a 1-line System Summary for each interval. 76\fB--Summary\fP limits output to a 1-line System Summary for each interval.
69.PP 77.PP
@@ -74,24 +82,25 @@ The file is truncated if it already exists, and it is created if it does not exi
74The \fBcommand\fP parameter forks \fBcommand\fP, and upon its exit, 82The \fBcommand\fP parameter forks \fBcommand\fP, and upon its exit,
75displays the statistics gathered since it was forked. 83displays the statistics gathered since it was forked.
76.PP 84.PP
77.SH DEFAULT FIELD DESCRIPTIONS 85.SH ROW DESCRIPTIONS
86The system configuration dump (if --quiet is not used) is followed by statistics. The first row of the statistics labels the content of each column (below). The second row of statistics is the system summary line. The system summary line has a '-' in the columns for the Package, Core, and CPU. The contents of the system summary line depends on the type of column. Columns that count items (eg. IRQ) show the sum across all CPUs in the system. Columns that show a percentage show the average across all CPUs in the system. Columns that dump raw MSR values simply show 0 in the summary. After the system summary row, each row describes a specific Package/Core/CPU. Note that if the --cpu parameter is used to limit which specific CPUs are displayed, turbostat will still collect statistics for all CPUs in the system and will still show the system summary for all CPUs in the system.
87.SH COLUMN DESCRIPTIONS
78.nf 88.nf
89\fBCore\fP processor core number. Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology (HT).
79\fBCPU\fP Linux CPU (logical processor) number. Yes, it is okay that on many systems the CPUs are not listed in numerical order -- for efficiency reasons, turbostat runs in topology order, so HT siblings appear together. 90\fBCPU\fP Linux CPU (logical processor) number. Yes, it is okay that on many systems the CPUs are not listed in numerical order -- for efficiency reasons, turbostat runs in topology order, so HT siblings appear together.
80\fBAVG_MHz\fP number of cycles executed divided by time elapsed. 91\fBPackage\fP processor package number -- not present on systems with a single processor package.
81\fBBusy%\fP percent of the interval that the CPU retired instructions, aka. % of time in "C0" state. 92\fBAvg_MHz\fP number of cycles executed divided by time elapsed. Note that this includes idle-time when 0 instructions are executed.
82\fBBzy_MHz\fP average clock rate while the CPU was busy (in "c0" state). 93\fBBusy%\fP percent of the measurement interval that the CPU executes instructions, aka. % of time in "C0" state.
94\fBBzy_MHz\fP average clock rate while the CPU was not idle (ie. in "c0" state).
83\fBTSC_MHz\fP average MHz that the TSC ran during the entire interval. 95\fBTSC_MHz\fP average MHz that the TSC ran during the entire interval.
84.fi 96\fBIRQ\fP The number of interrupts serviced by that CPU during the measurement interval. The system total line is the sum of interrupts serviced across all CPUs. turbostat parses /proc/interrupts to generate this summary.
85.PP 97\fBSMI\fP The number of System Management Interrupts serviced CPU during the measurement interval. While this counter is actually per-CPU, SMI are triggered on all processors, so the number should be the same for all CPUs.
86.SH DEBUG FIELD DESCRIPTIONS 98\fBC1, C2, C3...\fP The number times Linux requested the C1, C2, C3 idle state during the measurement interval. The system summary line shows the sum for all CPUs. These are C-state names as exported in /sys/devices/system/cpu/cpu*/cpuidle/state*/name. While their names are generic, their attributes are processor specific. They the system description section of output shows what MWAIT sub-states they are mapped to on each system.
87.nf 99\fBC1%, C2%, C3%\fP The residency percentage that Linux requested C1, C2, C3.... The system summary is the average of all CPUs in the system. Note that these are software, reflecting what was requested. The hardware counters reflect what was actually achieved.
88\fBPackage\fP processor package number. 100\fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states. These numbers are from hardware residency counters.
89\fBCore\fP processor core number.
90Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology (HT).
91\fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states.
92\fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor. 101\fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor.
93\fBPkgTtmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor. 102\fBPkgTtmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor.
94\fBPkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7\fP percentage residency in hardware package idle states. 103\fBPkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7\fP percentage residency in hardware package idle states. These numbers are from hardware residency counters.
95\fBPkgWatt\fP Watts consumed by the whole package. 104\fBPkgWatt\fP Watts consumed by the whole package.
96\fBCorWatt\fP Watts consumed by the core part of the package. 105\fBCorWatt\fP Watts consumed by the core part of the package.
97\fBGFXWatt\fP Watts consumed by the Graphics part of the package -- available only on client processors. 106\fBGFXWatt\fP Watts consumed by the Graphics part of the package -- available only on client processors.
@@ -99,51 +108,110 @@ Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading T
99\fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package. 108\fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package.
100\fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM. 109\fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM.
101.fi 110.fi
111.SH TOO MUCH INFORMATION EXAMPLE
112By default, turbostat dumps all possible information -- a system configuration header, followed by columns for all counters.
113This is ideal for remote debugging, use the "--out" option to save everything to a text file, and get that file to the expert helping you debug.
102.PP 114.PP
103.SH PERIODIC EXAMPLE 115When you are not interested in all that information, and there are several ways to see only what you want. First the "--quiet" option will skip the configuration information, and turbostat will show only the counter columns. Second, you can reduce the columns with the "--hide" and "--show" options. If you use the "--show" option, then turbostat will show only the columns you list. If you use the "--hide" option, turbostat will show all columns, except the ones you list.
104Without any parameters, turbostat displays statistics ever 5 seconds. 116.PP
105Periodic output goes to stdout, by default, unless --out is used to specify an output file. 117To find out what columns are available for --show and --hide, the "--list" option is available. For convenience, the special strings "sysfs" can be used to refer to all of the sysfs C-state counters at once:
106The 5-second interval can be changed with th "-i sec" option. 118.nf
107Or a command may be specified as in "FORK EXAMPLE" below. 119sudo ./turbostat --show sysfs --quiet sleep 10
12010.003837 sec
121 C1 C1E C3 C6 C7s C1% C1E% C3% C6% C7s%
122 4 21 2 2 459 0.14 0.82 0.00 0.00 98.93
123 1 17 2 2 130 0.00 0.02 0.00 0.00 99.80
124 0 0 0 0 31 0.00 0.00 0.00 0.00 99.95
125 2 1 0 0 52 1.14 6.49 0.00 0.00 92.21
126 1 2 0 0 52 0.00 0.08 0.00 0.00 99.86
127 0 0 0 0 71 0.00 0.00 0.00 0.00 99.89
128 0 0 0 0 25 0.00 0.00 0.00 0.00 99.96
129 0 0 0 0 74 0.00 0.00 0.00 0.00 99.94
130 0 1 0 0 24 0.00 0.00 0.00 0.00 99.84
131.fi
132.PP
133.SH ONE SHOT COMMAND EXAMPLE
134If turbostat is invoked with a command, it will fork that command
135and output the statistics gathered after the command exits.
136In this case, turbostat output goes to stderr, by default.
137Output can instead be saved to a file using the --out option.
138In this example, the "sleep 10" command is forked, and turbostat waits for it to complete before saving all statistics into "ts.out". Note that "sleep 10" is not part of turbostat, but is simply an example of a command that turbostat can fork. The "ts.out" file is what you want to edit in a very wide window, paste into a spreadsheet, or attach to a bugzilla entry.
139
108.nf 140.nf
109[root@hsw]# ./turbostat 141[root@hsw]# ./turbostat -o ts.out sleep 10
110 CPU Avg_MHz Busy% Bzy_MHz TSC_MHz 142[root@hsw]#
111 - 488 12.51 3898 3498 143.fi
112 0 0 0.01 3885 3498
113 4 3897 99.99 3898 3498
114 1 0 0.00 3861 3498
115 5 0 0.00 3882 3498
116 2 1 0.02 3894 3498
117 6 2 0.06 3898 3498
118 3 0 0.00 3849 3498
119 7 0 0.00 3877 3498
120 144
145.SH PERIODIC INTERVAL EXAMPLE
146Without a command to fork, turbostat displays statistics ever 5 seconds.
147Periodic output goes to stdout, by default, unless --out is used to specify an output file.
148The 5-second interval can be changed with the "-i sec" option.
149.nf
150sudo ./turbostat --quiet --hide sysfs,IRQ,SMI,CoreTmp,PkgTmp,GFX%rc6,GFXMHz,PkgWatt,CorWatt,GFXWatt
151 Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz CPU%c1 CPU%c3 CPU%c6 CPU%c7
152 - - 488 12.52 3900 3498 12.50 0.00 0.00 74.98
153 0 0 5 0.13 3900 3498 99.87 0.00 0.00 0.00
154 0 4 3897 99.99 3900 3498 0.01
155 1 1 0 0.00 3856 3498 0.01 0.00 0.00 99.98
156 1 5 0 0.00 3861 3498 0.01
157 2 2 1 0.02 3889 3498 0.03 0.00 0.00 99.95
158 2 6 0 0.00 3863 3498 0.05
159 3 3 0 0.01 3869 3498 0.02 0.00 0.00 99.97
160 3 7 0 0.00 3878 3498 0.03
161 Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz CPU%c1 CPU%c3 CPU%c6 CPU%c7
162 - - 491 12.59 3900 3498 12.42 0.00 0.00 74.99
163 0 0 27 0.69 3900 3498 99.31 0.00 0.00 0.00
164 0 4 3898 99.99 3900 3498 0.01
165 1 1 0 0.00 3883 3498 0.01 0.00 0.00 99.99
166 1 5 0 0.00 3898 3498 0.01
167 2 2 0 0.01 3889 3498 0.02 0.00 0.00 99.98
168 2 6 0 0.00 3889 3498 0.02
169 3 3 0 0.00 3856 3498 0.01 0.00 0.00 99.99
170 3 7 0 0.00 3897 3498 0.01
121.fi 171.fi
122.SH DEBUG EXAMPLE 172This example also shows the use of the --hide option to skip columns that are not wanted.
123The "--debug" option prints additional system information before measurements: 173Note that cpu4 in this example is 99.99% busy, while the other CPUs are all under 1% busy.
174Notice that cpu4's HT sibling is cpu0, which is under 1% busy, but can get into CPU%c1 only,
175because its cpu4's activity on shared hardware keeps it from entering a deeper C-state.
124 176
125The first row of statistics is a summary for the entire system. 177.SH SYSTEM CONFIGURATION INFORMATION EXAMPLE
126For residency % columns, the summary is a weighted average. 178
127For Temperature columns, the summary is the column maximum. 179By default, turbostat always dumps system configuration information
128For Watts columns, the summary is a system total. 180before taking measurements. In the example above, "--quiet" is used
129Subsequent rows show per-CPU statistics. 181to suppress that output. Here is an example of the configuration information:
130.nf 182.nf
131turbostat version 4.1 10-Feb, 2015 - Len Brown <lenb@kernel.org> 183turbostat version 2017.02.15 - Len Brown <lenb@kernel.org>
132CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3c:3 (6:60:3) 184CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3c:3 (6:60:3)
133CPUID(6): APERF, DTS, PTM, EPB 185CPUID(1): SSE3 MONITOR - EIST TM2 TSC MSR ACPI-TM TM
186CPUID(6): APERF, TURBO, DTS, PTM, No-HWP, No-HWPnotify, No-HWPwindow, No-HWPepp, No-HWPpkg, EPB
187cpu4: MSR_IA32_MISC_ENABLE: 0x00850089 (TCC EIST No-MWAIT PREFETCH TURBO)
188CPUID(7): No-SGX
189cpu4: MSR_MISC_PWR_MGMT: 0x00400000 (ENable-EIST_Coordination DISable-EPB DISable-OOB)
134RAPL: 3121 sec. Joule Counter Range, at 84 Watts 190RAPL: 3121 sec. Joule Counter Range, at 84 Watts
135cpu0: MSR_NHM_PLATFORM_INFO: 0x80838f3012300 191cpu4: MSR_PLATFORM_INFO: 0x80838f3012300
1368 * 100 = 800 MHz max efficiency 1928 * 100.0 = 800.0 MHz max efficiency frequency
13735 * 100 = 3500 MHz TSC frequency 19335 * 100.0 = 3500.0 MHz base frequency
138cpu0: MSR_IA32_POWER_CTL: 0x0004005d (C1E auto-promotion: DISabled) 194cpu4: MSR_IA32_POWER_CTL: 0x0004005d (C1E auto-promotion: DISabled)
139cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e000400 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, UNlocked: pkg-cstate-limit=0: pc0) 195cpu4: MSR_TURBO_RATIO_LIMIT: 0x25262727
140cpu0: MSR_TURBO_RATIO_LIMIT: 0x25262727 19637 * 100.0 = 3700.0 MHz max turbo 4 active cores
14137 * 100 = 3700 MHz max turbo 4 active cores 19738 * 100.0 = 3800.0 MHz max turbo 3 active cores
14238 * 100 = 3800 MHz max turbo 3 active cores 19839 * 100.0 = 3900.0 MHz max turbo 2 active cores
14339 * 100 = 3900 MHz max turbo 2 active cores 19939 * 100.0 = 3900.0 MHz max turbo 1 active cores
14439 * 100 = 3900 MHz max turbo 1 active cores 200cpu4: MSR_CONFIG_TDP_NOMINAL: 0x00000023 (base_ratio=35)
201cpu4: MSR_CONFIG_TDP_LEVEL_1: 0x00000000 ()
202cpu4: MSR_CONFIG_TDP_LEVEL_2: 0x00000000 ()
203cpu4: MSR_CONFIG_TDP_CONTROL: 0x80000000 ( lock=1)
204cpu4: MSR_TURBO_ACTIVATION_RATIO: 0x00000000 (MAX_NON_TURBO_RATIO=0 lock=0)
205cpu4: MSR_PKG_CST_CONFIG_CONTROL: 0x1e000400 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, UNlocked: pkg-cstate-limit=0: pc0)
206cpu4: POLL: CPUIDLE CORE POLL IDLE
207cpu4: C1: MWAIT 0x00
208cpu4: C1E: MWAIT 0x01
209cpu4: C3: MWAIT 0x10
210cpu4: C6: MWAIT 0x20
211cpu4: C7s: MWAIT 0x32
212cpu4: MSR_MISC_FEATURE_CONTROL: 0x00000000 (L2-Prefetch L2-Prefetch-pair L1-Prefetch L1-IP-Prefetch)
145cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced) 213cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced)
146cpu0: MSR_CORE_PERF_LIMIT_REASONS, 0x31200000 (Active: ) (Logged: Auto-HWP, Amps, MultiCoreTurbo, Transitions, ) 214cpu0: MSR_CORE_PERF_LIMIT_REASONS, 0x31200000 (Active: ) (Logged: Transitions, MultiCoreTurbo, Amps, Auto-HWP, )
147cpu0: MSR_GFX_PERF_LIMIT_REASONS, 0x00000000 (Active: ) (Logged: ) 215cpu0: MSR_GFX_PERF_LIMIT_REASONS, 0x00000000 (Active: ) (Logged: )
148cpu0: MSR_RING_PERF_LIMIT_REASONS, 0x0d000000 (Active: ) (Logged: Amps, PkgPwrL1, PkgPwrL2, ) 216cpu0: MSR_RING_PERF_LIMIT_REASONS, 0x0d000000 (Active: ) (Logged: Amps, PkgPwrL1, PkgPwrL2, )
149cpu0: MSR_RAPL_POWER_UNIT: 0x000a0e03 (0.125000 Watts, 0.000061 Joules, 0.000977 sec.) 217cpu0: MSR_RAPL_POWER_UNIT: 0x000a0e03 (0.125000 Watts, 0.000061 Joules, 0.000977 sec.)
@@ -158,23 +226,14 @@ cpu0: MSR_PP1_POLICY: 0
158cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked) 226cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked)
159cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled) 227cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
160cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00641400 (100 C) 228cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00641400 (100 C)
161cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x88340800 (48 C) 229cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x884c0800 (24 C)
162cpu0: MSR_IA32_THERM_STATUS: 0x88340000 (48 C +/- 1) 230cpu0: MSR_IA32_THERM_STATUS: 0x884c0000 (24 C +/- 1)
163cpu1: MSR_IA32_THERM_STATUS: 0x88440000 (32 C +/- 1) 231cpu1: MSR_IA32_THERM_STATUS: 0x88510000 (19 C +/- 1)
164cpu2: MSR_IA32_THERM_STATUS: 0x88450000 (31 C +/- 1) 232cpu2: MSR_IA32_THERM_STATUS: 0x884e0000 (22 C +/- 1)
165cpu3: MSR_IA32_THERM_STATUS: 0x88490000 (27 C +/- 1) 233cpu3: MSR_IA32_THERM_STATUS: 0x88510000 (19 C +/- 1)
166 Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp PkgWatt CorWatt GFXWatt 234cpu4: MSR_PKGC3_IRTL: 0x00008842 (valid, 67584 ns)
167 - - 493 12.64 3898 3498 0 12.64 0.00 0.00 74.72 47 47 21.62 13.74 0.00 235cpu4: MSR_PKGC6_IRTL: 0x00008873 (valid, 117760 ns)
168 0 0 4 0.11 3894 3498 0 99.89 0.00 0.00 0.00 47 47 21.62 13.74 0.00 236cpu4: MSR_PKGC7_IRTL: 0x00008891 (valid, 148480 ns)
169 0 4 3897 99.98 3898 3498 0 0.02
170 1 1 7 0.17 3887 3498 0 0.04 0.00 0.00 99.79 32
171 1 5 0 0.00 3885 3498 0 0.21
172 2 2 29 0.76 3895 3498 0 0.10 0.01 0.01 99.13 32
173 2 6 2 0.06 3896 3498 0 0.80
174 3 3 1 0.02 3832 3498 0 0.03 0.00 0.00 99.95 28
175 3 7 0 0.00 3879 3498 0 0.04
176^C
177
178.fi 237.fi
179The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency 238The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency
180available at the minimum package voltage. The \fBTSC frequency\fP is the base 239available at the minimum package voltage. The \fBTSC frequency\fP is the base
@@ -184,42 +243,22 @@ should be sustainable on all CPUs indefinitely, given nominal power and cooling.
184The remaining rows show what maximum turbo frequency is possible 243The remaining rows show what maximum turbo frequency is possible
185depending on the number of idle cores. Note that not all information is 244depending on the number of idle cores. Note that not all information is
186available on all processors. 245available on all processors.
187.PP 246.SH ADD COUNTER EXAMPLE
188The --debug option adds additional columns to the measurement ouput, including CPU idle power-state residency processor temperature sensor readinds. 247Here we limit turbostat to showing just the CPU number for cpu0 - cpu3.
189See the field definitions above. 248We add a counter showing the 32-bit raw value of MSR 0x199 (MSR_IA32_PERF_CTL),
190.SH FORK EXAMPLE 249labeling it with the column header, "PRF_CTRL", and display it only once,
191If turbostat is invoked with a command, it will fork that command 250afte the conclusion of a 0.1 second sleep.
192and output the statistics gathered after the command exits.
193In this case, turbostat output goes to stderr, by default.
194Output can instead be saved to a file using the --out option.
195eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
196until ^C while the other CPUs are mostly idle:
197
198.nf 251.nf
199root@hsw: turbostat cat /dev/zero > /dev/null 252sudo ./turbostat --quiet --cpu 0-3 --show CPU --add msr0x199,u32,raw,PRF_CTRL sleep .1
200^C 2530.101604 sec
201 CPU Avg_MHz Busy% Bzy_MHz TSC_MHz 254CPU PRF_CTRL
202 - 482 12.51 3854 3498 255- 0x00000000
203 0 0 0.01 1960 3498 2560 0x00000c00
204 4 0 0.00 2128 3498 2571 0x00000800
205 1 0 0.00 3003 3498 2582 0x00000a00
206 5 3854 99.98 3855 3498 2593 0x00000800
207 2 0 0.01 3504 3498
208 6 3 0.08 3884 3498
209 3 0 0.00 2553 3498
210 7 0 0.00 2126 3498
21110.783983 sec
212 260
213.fi 261.fi
214Above the cycle soaker drives cpu5 up its 3.9 GHz turbo limit.
215The first row shows the average MHz and Busy% across all the processors in the system.
216
217Note that the Avg_MHz column reflects the total number of cycles executed
218divided by the measurement interval. If the Busy% column is 100%,
219then the processor was running at that speed the entire interval.
220The Avg_MHz multiplied by the Busy% results in the Bzy_MHz --
221which is the average frequency while the processor was executing --
222not including any non-busy idle time.
223 262
224.SH NOTES 263.SH NOTES
225 264
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index f13f61b065c6..828dccd3f01e 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -49,17 +49,14 @@ FILE *outf;
49int *fd_percpu; 49int *fd_percpu;
50struct timespec interval_ts = {5, 0}; 50struct timespec interval_ts = {5, 0};
51unsigned int debug; 51unsigned int debug;
52unsigned int quiet;
53unsigned int sums_need_wide_columns;
52unsigned int rapl_joules; 54unsigned int rapl_joules;
53unsigned int summary_only; 55unsigned int summary_only;
56unsigned int list_header_only;
54unsigned int dump_only; 57unsigned int dump_only;
55unsigned int do_nhm_cstates;
56unsigned int do_snb_cstates; 58unsigned int do_snb_cstates;
57unsigned int do_knl_cstates; 59unsigned int do_knl_cstates;
58unsigned int do_pc2;
59unsigned int do_pc3;
60unsigned int do_pc6;
61unsigned int do_pc7;
62unsigned int do_c8_c9_c10;
63unsigned int do_skl_residency; 60unsigned int do_skl_residency;
64unsigned int do_slm_cstates; 61unsigned int do_slm_cstates;
65unsigned int use_c1_residency_msr; 62unsigned int use_c1_residency_msr;
@@ -71,25 +68,19 @@ unsigned int units = 1000000; /* MHz etc */
71unsigned int genuine_intel; 68unsigned int genuine_intel;
72unsigned int has_invariant_tsc; 69unsigned int has_invariant_tsc;
73unsigned int do_nhm_platform_info; 70unsigned int do_nhm_platform_info;
71unsigned int no_MSR_MISC_PWR_MGMT;
74unsigned int aperf_mperf_multiplier = 1; 72unsigned int aperf_mperf_multiplier = 1;
75int do_irq = 1;
76int do_smi;
77double bclk; 73double bclk;
78double base_hz; 74double base_hz;
79unsigned int has_base_hz; 75unsigned int has_base_hz;
80double tsc_tweak = 1.0; 76double tsc_tweak = 1.0;
81unsigned int show_pkg;
82unsigned int show_core;
83unsigned int show_cpu;
84unsigned int show_pkg_only; 77unsigned int show_pkg_only;
85unsigned int show_core_only; 78unsigned int show_core_only;
86char *output_buffer, *outp; 79char *output_buffer, *outp;
87unsigned int do_rapl; 80unsigned int do_rapl;
88unsigned int do_dts; 81unsigned int do_dts;
89unsigned int do_ptm; 82unsigned int do_ptm;
90unsigned int do_gfx_rc6_ms;
91unsigned long long gfx_cur_rc6_ms; 83unsigned long long gfx_cur_rc6_ms;
92unsigned int do_gfx_mhz;
93unsigned int gfx_cur_mhz; 84unsigned int gfx_cur_mhz;
94unsigned int tcc_activation_temp; 85unsigned int tcc_activation_temp;
95unsigned int tcc_activation_temp_override; 86unsigned int tcc_activation_temp_override;
@@ -109,6 +100,7 @@ unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
109unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */ 100unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
110unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */ 101unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
111unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */ 102unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
103unsigned int has_misc_feature_control;
112 104
113#define RAPL_PKG (1 << 0) 105#define RAPL_PKG (1 << 0)
114 /* 0x610 MSR_PKG_POWER_LIMIT */ 106 /* 0x610 MSR_PKG_POWER_LIMIT */
@@ -148,34 +140,38 @@ unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
148 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters 140 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
149 */ 141 */
150#define NAME_BYTES 20 142#define NAME_BYTES 20
143#define PATH_BYTES 128
151 144
152int backwards_count; 145int backwards_count;
153char *progname; 146char *progname;
154 147
155cpu_set_t *cpu_present_set, *cpu_affinity_set; 148#define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */
156size_t cpu_present_setsize, cpu_affinity_setsize; 149cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
150size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
151#define MAX_ADDED_COUNTERS 16
157 152
158struct thread_data { 153struct thread_data {
159 unsigned long long tsc; 154 unsigned long long tsc;
160 unsigned long long aperf; 155 unsigned long long aperf;
161 unsigned long long mperf; 156 unsigned long long mperf;
162 unsigned long long c1; 157 unsigned long long c1;
163 unsigned int irq_count; 158 unsigned long long irq_count;
164 unsigned int smi_count; 159 unsigned int smi_count;
165 unsigned int cpu_id; 160 unsigned int cpu_id;
166 unsigned int flags; 161 unsigned int flags;
167#define CPU_IS_FIRST_THREAD_IN_CORE 0x2 162#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
168#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4 163#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
169 unsigned long long counter[1]; 164 unsigned long long counter[MAX_ADDED_COUNTERS];
170} *thread_even, *thread_odd; 165} *thread_even, *thread_odd;
171 166
172struct core_data { 167struct core_data {
173 unsigned long long c3; 168 unsigned long long c3;
174 unsigned long long c6; 169 unsigned long long c6;
175 unsigned long long c7; 170 unsigned long long c7;
171 unsigned long long mc6_us; /* duplicate as per-core for now, even though per module */
176 unsigned int core_temp_c; 172 unsigned int core_temp_c;
177 unsigned int core_id; 173 unsigned int core_id;
178 unsigned long long counter[1]; 174 unsigned long long counter[MAX_ADDED_COUNTERS];
179} *core_even, *core_odd; 175} *core_even, *core_odd;
180 176
181struct pkg_data { 177struct pkg_data {
@@ -200,7 +196,7 @@ struct pkg_data {
200 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */ 196 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
201 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */ 197 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
202 unsigned int pkg_temp_c; 198 unsigned int pkg_temp_c;
203 unsigned long long counter[1]; 199 unsigned long long counter[MAX_ADDED_COUNTERS];
204} *package_even, *package_odd; 200} *package_even, *package_odd;
205 201
206#define ODD_COUNTERS thread_odd, core_odd, package_odd 202#define ODD_COUNTERS thread_odd, core_odd, package_odd
@@ -215,22 +211,27 @@ struct pkg_data {
215#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no) 211#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
216 212
217enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE}; 213enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
218enum counter_type {COUNTER_CYCLES, COUNTER_SECONDS}; 214enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
219enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT}; 215enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
220 216
221struct msr_counter { 217struct msr_counter {
222 unsigned int msr_num; 218 unsigned int msr_num;
223 char name[NAME_BYTES]; 219 char name[NAME_BYTES];
220 char path[PATH_BYTES];
224 unsigned int width; 221 unsigned int width;
225 enum counter_type type; 222 enum counter_type type;
226 enum counter_format format; 223 enum counter_format format;
227 struct msr_counter *next; 224 struct msr_counter *next;
225 unsigned int flags;
226#define FLAGS_HIDE (1 << 0)
227#define FLAGS_SHOW (1 << 1)
228#define SYSFS_PERCPU (1 << 1)
228}; 229};
229 230
230struct sys_counters { 231struct sys_counters {
231 unsigned int thread_counter_bytes; 232 unsigned int added_thread_counters;
232 unsigned int core_counter_bytes; 233 unsigned int added_core_counters;
233 unsigned int package_counter_bytes; 234 unsigned int added_package_counters;
234 struct msr_counter *tp; 235 struct msr_counter *tp;
235 struct msr_counter *cp; 236 struct msr_counter *cp;
236 struct msr_counter *pp; 237 struct msr_counter *pp;
@@ -334,147 +335,333 @@ int get_msr(int cpu, off_t offset, unsigned long long *msr)
334 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset); 335 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
335 336
336 if (retval != sizeof *msr) 337 if (retval != sizeof *msr)
337 err(-1, "msr %d offset 0x%llx read failed", cpu, (unsigned long long)offset); 338 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
338 339
339 return 0; 340 return 0;
340} 341}
341 342
342/* 343/*
343 * Example Format w/ field column widths: 344 * Each string in this array is compared in --show and --hide cmdline.
344 * 345 * Thus, strings that are proper sub-sets must follow their more specific peers.
345 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz IRQ SMI Busy% CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 ThreadC CoreTmp CoreCnt PkgTmp GFXMHz Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt PkgCnt 346 */
346 * 12345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678 347struct msr_counter bic[] = {
348 { 0x0, "Package" },
349 { 0x0, "Avg_MHz" },
350 { 0x0, "Bzy_MHz" },
351 { 0x0, "TSC_MHz" },
352 { 0x0, "IRQ" },
353 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
354 { 0x0, "Busy%" },
355 { 0x0, "CPU%c1" },
356 { 0x0, "CPU%c3" },
357 { 0x0, "CPU%c6" },
358 { 0x0, "CPU%c7" },
359 { 0x0, "ThreadC" },
360 { 0x0, "CoreTmp" },
361 { 0x0, "CoreCnt" },
362 { 0x0, "PkgTmp" },
363 { 0x0, "GFX%rc6" },
364 { 0x0, "GFXMHz" },
365 { 0x0, "Pkg%pc2" },
366 { 0x0, "Pkg%pc3" },
367 { 0x0, "Pkg%pc6" },
368 { 0x0, "Pkg%pc7" },
369 { 0x0, "Pkg%pc8" },
370 { 0x0, "Pkg%pc9" },
371 { 0x0, "Pkg%pc10" },
372 { 0x0, "PkgWatt" },
373 { 0x0, "CorWatt" },
374 { 0x0, "GFXWatt" },
375 { 0x0, "PkgCnt" },
376 { 0x0, "RAMWatt" },
377 { 0x0, "PKG_%" },
378 { 0x0, "RAM_%" },
379 { 0x0, "Pkg_J" },
380 { 0x0, "Cor_J" },
381 { 0x0, "GFX_J" },
382 { 0x0, "RAM_J" },
383 { 0x0, "Core" },
384 { 0x0, "CPU" },
385 { 0x0, "Mod%c6" },
386 { 0x0, "sysfs" },
387};
388
389#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
390#define BIC_Package (1ULL << 0)
391#define BIC_Avg_MHz (1ULL << 1)
392#define BIC_Bzy_MHz (1ULL << 2)
393#define BIC_TSC_MHz (1ULL << 3)
394#define BIC_IRQ (1ULL << 4)
395#define BIC_SMI (1ULL << 5)
396#define BIC_Busy (1ULL << 6)
397#define BIC_CPU_c1 (1ULL << 7)
398#define BIC_CPU_c3 (1ULL << 8)
399#define BIC_CPU_c6 (1ULL << 9)
400#define BIC_CPU_c7 (1ULL << 10)
401#define BIC_ThreadC (1ULL << 11)
402#define BIC_CoreTmp (1ULL << 12)
403#define BIC_CoreCnt (1ULL << 13)
404#define BIC_PkgTmp (1ULL << 14)
405#define BIC_GFX_rc6 (1ULL << 15)
406#define BIC_GFXMHz (1ULL << 16)
407#define BIC_Pkgpc2 (1ULL << 17)
408#define BIC_Pkgpc3 (1ULL << 18)
409#define BIC_Pkgpc6 (1ULL << 19)
410#define BIC_Pkgpc7 (1ULL << 20)
411#define BIC_Pkgpc8 (1ULL << 21)
412#define BIC_Pkgpc9 (1ULL << 22)
413#define BIC_Pkgpc10 (1ULL << 23)
414#define BIC_PkgWatt (1ULL << 24)
415#define BIC_CorWatt (1ULL << 25)
416#define BIC_GFXWatt (1ULL << 26)
417#define BIC_PkgCnt (1ULL << 27)
418#define BIC_RAMWatt (1ULL << 28)
419#define BIC_PKG__ (1ULL << 29)
420#define BIC_RAM__ (1ULL << 30)
421#define BIC_Pkg_J (1ULL << 31)
422#define BIC_Cor_J (1ULL << 32)
423#define BIC_GFX_J (1ULL << 33)
424#define BIC_RAM_J (1ULL << 34)
425#define BIC_Core (1ULL << 35)
426#define BIC_CPU (1ULL << 36)
427#define BIC_Mod_c6 (1ULL << 37)
428#define BIC_sysfs (1ULL << 38)
429
430unsigned long long bic_enabled = 0xFFFFFFFFFFFFFFFFULL;
431unsigned long long bic_present = BIC_sysfs;
432
433#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
434#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
435#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
436
437#define MAX_DEFERRED 16
438char *deferred_skip_names[MAX_DEFERRED];
439int deferred_skip_index;
440
441/*
442 * HIDE_LIST - hide this list of counters, show the rest [default]
443 * SHOW_LIST - show this list of counters, hide the rest
347 */ 444 */
445enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
348 446
349void print_header(void) 447void help(void)
350{ 448{
351 struct msr_counter *mp; 449 fprintf(outf,
450 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
451 "\n"
452 "Turbostat forks the specified COMMAND and prints statistics\n"
453 "when COMMAND completes.\n"
454 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
455 "to print statistics, until interrupted.\n"
456 "--add add a counter\n"
457 " eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
458 "--cpu cpu-set limit output to summary plus cpu-set:\n"
459 " {core | package | j,k,l..m,n-p }\n"
460 "--quiet skip decoding system configuration header\n"
461 "--interval sec Override default 5-second measurement interval\n"
462 "--help print this help message\n"
463 "--list list column headers only\n"
464 "--out file create or truncate \"file\" for all output\n"
465 "--version print version information\n"
466 "\n"
467 "For more help, run \"man turbostat\"\n");
468}
352 469
353 if (show_pkg) 470/*
354 outp += sprintf(outp, "\tPackage"); 471 * bic_lookup
355 if (show_core) 472 * for all the strings in comma separate name_list,
356 outp += sprintf(outp, "\tCore"); 473 * set the approprate bit in return value.
357 if (show_cpu) 474 */
358 outp += sprintf(outp, "\tCPU"); 475unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
359 if (has_aperf) 476{
360 outp += sprintf(outp, "\tAvg_MHz"); 477 int i;
361 if (has_aperf) 478 unsigned long long retval = 0;
362 outp += sprintf(outp, "\tBusy%%");
363 if (has_aperf)
364 outp += sprintf(outp, "\tBzy_MHz");
365 outp += sprintf(outp, "\tTSC_MHz");
366 479
367 if (!debug) 480 while (name_list) {
368 goto done; 481 char *comma;
369 482
370 if (do_irq) 483 comma = strchr(name_list, ',');
371 outp += sprintf(outp, "\tIRQ"); 484
372 if (do_smi) 485 if (comma)
373 outp += sprintf(outp, "\tSMI"); 486 *comma = '\0';
374 487
375 if (do_nhm_cstates) 488 for (i = 0; i < MAX_BIC; ++i) {
376 outp += sprintf(outp, "\tCPU%%c1"); 489 if (!strcmp(name_list, bic[i].name)) {
377 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) 490 retval |= (1ULL << i);
378 outp += sprintf(outp, "\tCPU%%c3"); 491 break;
379 if (do_nhm_cstates) 492 }
380 outp += sprintf(outp, "\tCPU%%c6"); 493 }
381 if (do_snb_cstates) 494 if (i == MAX_BIC) {
382 outp += sprintf(outp, "\tCPU%%c7"); 495 if (mode == SHOW_LIST) {
496 fprintf(stderr, "Invalid counter name: %s\n", name_list);
497 exit(-1);
498 }
499 deferred_skip_names[deferred_skip_index++] = name_list;
500 if (debug)
501 fprintf(stderr, "deferred \"%s\"\n", name_list);
502 if (deferred_skip_index >= MAX_DEFERRED) {
503 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
504 MAX_DEFERRED, name_list);
505 help();
506 exit(1);
507 }
508 }
509
510 name_list = comma;
511 if (name_list)
512 name_list++;
513
514 }
515 return retval;
516}
517
518
519void print_header(char *delim)
520{
521 struct msr_counter *mp;
522 int printed = 0;
523
524 if (DO_BIC(BIC_Package))
525 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
526 if (DO_BIC(BIC_Core))
527 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
528 if (DO_BIC(BIC_CPU))
529 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
530 if (DO_BIC(BIC_Avg_MHz))
531 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
532 if (DO_BIC(BIC_Busy))
533 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
534 if (DO_BIC(BIC_Bzy_MHz))
535 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
536 if (DO_BIC(BIC_TSC_MHz))
537 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
538
539 if (DO_BIC(BIC_IRQ)) {
540 if (sums_need_wide_columns)
541 outp += sprintf(outp, "%s IRQ", (printed++ ? delim : ""));
542 else
543 outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
544 }
545
546 if (DO_BIC(BIC_SMI))
547 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
383 548
384 for (mp = sys.tp; mp; mp = mp->next) { 549 for (mp = sys.tp; mp; mp = mp->next) {
550
385 if (mp->format == FORMAT_RAW) { 551 if (mp->format == FORMAT_RAW) {
386 if (mp->width == 64) 552 if (mp->width == 64)
387 outp += sprintf(outp, "\t%18.18s", mp->name); 553 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
388 else 554 else
389 outp += sprintf(outp, "\t%10.10s", mp->name); 555 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
390 } else { 556 } else {
391 outp += sprintf(outp, "\t%-7.7s", mp->name); 557 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
558 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
559 else
560 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
392 } 561 }
393 } 562 }
394 563
395 if (do_dts) 564 if (DO_BIC(BIC_CPU_c1))
396 outp += sprintf(outp, "\tCoreTmp"); 565 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
566 if (DO_BIC(BIC_CPU_c3) && !do_slm_cstates && !do_knl_cstates)
567 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
568 if (DO_BIC(BIC_CPU_c6))
569 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
570 if (DO_BIC(BIC_CPU_c7))
571 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
572
573 if (DO_BIC(BIC_Mod_c6))
574 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
575
576 if (DO_BIC(BIC_CoreTmp))
577 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
397 578
398 for (mp = sys.cp; mp; mp = mp->next) { 579 for (mp = sys.cp; mp; mp = mp->next) {
399 if (mp->format == FORMAT_RAW) { 580 if (mp->format == FORMAT_RAW) {
400 if (mp->width == 64) 581 if (mp->width == 64)
401 outp += sprintf(outp, "\t%18.18s", mp->name); 582 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
402 else 583 else
403 outp += sprintf(outp, "\t%10.10s", mp->name); 584 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
404 } else { 585 } else {
405 outp += sprintf(outp, "\t%-7.7s", mp->name); 586 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
587 outp += sprintf(outp, "%s%8s", delim, mp->name);
588 else
589 outp += sprintf(outp, "%s%s", delim, mp->name);
406 } 590 }
407 } 591 }
408 592
409 if (do_ptm) 593 if (DO_BIC(BIC_PkgTmp))
410 outp += sprintf(outp, "\tPkgTmp"); 594 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
411 595
412 if (do_gfx_rc6_ms) 596 if (DO_BIC(BIC_GFX_rc6))
413 outp += sprintf(outp, "\tGFX%%rc6"); 597 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
414 598
415 if (do_gfx_mhz) 599 if (DO_BIC(BIC_GFXMHz))
416 outp += sprintf(outp, "\tGFXMHz"); 600 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
417 601
418 if (do_skl_residency) { 602 if (do_skl_residency) {
419 outp += sprintf(outp, "\tTotl%%C0"); 603 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
420 outp += sprintf(outp, "\tAny%%C0"); 604 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
421 outp += sprintf(outp, "\tGFX%%C0"); 605 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
422 outp += sprintf(outp, "\tCPUGFX%%"); 606 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
423 }
424
425 if (do_pc2)
426 outp += sprintf(outp, "\tPkg%%pc2");
427 if (do_pc3)
428 outp += sprintf(outp, "\tPkg%%pc3");
429 if (do_pc6)
430 outp += sprintf(outp, "\tPkg%%pc6");
431 if (do_pc7)
432 outp += sprintf(outp, "\tPkg%%pc7");
433 if (do_c8_c9_c10) {
434 outp += sprintf(outp, "\tPkg%%pc8");
435 outp += sprintf(outp, "\tPkg%%pc9");
436 outp += sprintf(outp, "\tPk%%pc10");
437 } 607 }
438 608
609 if (DO_BIC(BIC_Pkgpc2))
610 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
611 if (DO_BIC(BIC_Pkgpc3))
612 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
613 if (DO_BIC(BIC_Pkgpc6))
614 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
615 if (DO_BIC(BIC_Pkgpc7))
616 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
617 if (DO_BIC(BIC_Pkgpc8))
618 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
619 if (DO_BIC(BIC_Pkgpc9))
620 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
621 if (DO_BIC(BIC_Pkgpc10))
622 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
623
439 if (do_rapl && !rapl_joules) { 624 if (do_rapl && !rapl_joules) {
440 if (do_rapl & RAPL_PKG) 625 if (DO_BIC(BIC_PkgWatt))
441 outp += sprintf(outp, "\tPkgWatt"); 626 outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
442 if (do_rapl & RAPL_CORES_ENERGY_STATUS) 627 if (DO_BIC(BIC_CorWatt))
443 outp += sprintf(outp, "\tCorWatt"); 628 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
444 if (do_rapl & RAPL_GFX) 629 if (DO_BIC(BIC_GFXWatt))
445 outp += sprintf(outp, "\tGFXWatt"); 630 outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
446 if (do_rapl & RAPL_DRAM) 631 if (DO_BIC(BIC_RAMWatt))
447 outp += sprintf(outp, "\tRAMWatt"); 632 outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
448 if (do_rapl & RAPL_PKG_PERF_STATUS) 633 if (DO_BIC(BIC_PKG__))
449 outp += sprintf(outp, "\tPKG_%%"); 634 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
450 if (do_rapl & RAPL_DRAM_PERF_STATUS) 635 if (DO_BIC(BIC_RAM__))
451 outp += sprintf(outp, "\tRAM_%%"); 636 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
452 } else if (do_rapl && rapl_joules) { 637 } else if (do_rapl && rapl_joules) {
453 if (do_rapl & RAPL_PKG) 638 if (DO_BIC(BIC_Pkg_J))
454 outp += sprintf(outp, "\tPkg_J"); 639 outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
455 if (do_rapl & RAPL_CORES_ENERGY_STATUS) 640 if (DO_BIC(BIC_Cor_J))
456 outp += sprintf(outp, "\tCor_J"); 641 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
457 if (do_rapl & RAPL_GFX) 642 if (DO_BIC(BIC_GFX_J))
458 outp += sprintf(outp, "\tGFX_J"); 643 outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
459 if (do_rapl & RAPL_DRAM) 644 if (DO_BIC(BIC_RAM_J))
460 outp += sprintf(outp, "\tRAM_J"); 645 outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
461 if (do_rapl & RAPL_PKG_PERF_STATUS) 646 if (DO_BIC(BIC_PKG__))
462 outp += sprintf(outp, "\tPKG_%%"); 647 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
463 if (do_rapl & RAPL_DRAM_PERF_STATUS) 648 if (DO_BIC(BIC_RAM__))
464 outp += sprintf(outp, "\tRAM_%%"); 649 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
465 } 650 }
466 for (mp = sys.pp; mp; mp = mp->next) { 651 for (mp = sys.pp; mp; mp = mp->next) {
467 if (mp->format == FORMAT_RAW) { 652 if (mp->format == FORMAT_RAW) {
468 if (mp->width == 64) 653 if (mp->width == 64)
469 outp += sprintf(outp, "\t%18.18s", mp->name); 654 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
470 else 655 else
471 outp += sprintf(outp, "\t%10.10s", mp->name); 656 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
472 } else { 657 } else {
473 outp += sprintf(outp, "\t%-7.7s", mp->name); 658 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
659 outp += sprintf(outp, "%s%8s", delim, mp->name);
660 else
661 outp += sprintf(outp, "%s%s", delim, mp->name);
474 } 662 }
475 } 663 }
476 664
477done:
478 outp += sprintf(outp, "\n"); 665 outp += sprintf(outp, "\n");
479} 666}
480 667
@@ -494,10 +681,10 @@ int dump_counters(struct thread_data *t, struct core_data *c,
494 outp += sprintf(outp, "mperf: %016llX\n", t->mperf); 681 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
495 outp += sprintf(outp, "c1: %016llX\n", t->c1); 682 outp += sprintf(outp, "c1: %016llX\n", t->c1);
496 683
497 if (do_irq) 684 if (DO_BIC(BIC_IRQ))
498 outp += sprintf(outp, "IRQ: %08X\n", t->irq_count); 685 outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
499 if (do_smi) 686 if (DO_BIC(BIC_SMI))
500 outp += sprintf(outp, "SMI: %08X\n", t->smi_count); 687 outp += sprintf(outp, "SMI: %d\n", t->smi_count);
501 688
502 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { 689 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
503 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n", 690 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
@@ -516,6 +703,7 @@ int dump_counters(struct thread_data *t, struct core_data *c,
516 outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n", 703 outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
517 i, mp->msr_num, c->counter[i]); 704 i, mp->msr_num, c->counter[i]);
518 } 705 }
706 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
519 } 707 }
520 708
521 if (p) { 709 if (p) {
@@ -527,11 +715,11 @@ int dump_counters(struct thread_data *t, struct core_data *c,
527 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0); 715 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
528 716
529 outp += sprintf(outp, "pc2: %016llX\n", p->pc2); 717 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
530 if (do_pc3) 718 if (DO_BIC(BIC_Pkgpc3))
531 outp += sprintf(outp, "pc3: %016llX\n", p->pc3); 719 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
532 if (do_pc6) 720 if (DO_BIC(BIC_Pkgpc6))
533 outp += sprintf(outp, "pc6: %016llX\n", p->pc6); 721 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
534 if (do_pc7) 722 if (DO_BIC(BIC_Pkgpc7))
535 outp += sprintf(outp, "pc7: %016llX\n", p->pc7); 723 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
536 outp += sprintf(outp, "pc8: %016llX\n", p->pc8); 724 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
537 outp += sprintf(outp, "pc9: %016llX\n", p->pc9); 725 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
@@ -563,10 +751,12 @@ int dump_counters(struct thread_data *t, struct core_data *c,
563int format_counters(struct thread_data *t, struct core_data *c, 751int format_counters(struct thread_data *t, struct core_data *c,
564 struct pkg_data *p) 752 struct pkg_data *p)
565{ 753{
566 double interval_float; 754 double interval_float, tsc;
567 char *fmt8; 755 char *fmt8;
568 int i; 756 int i;
569 struct msr_counter *mp; 757 struct msr_counter *mp;
758 char *delim = "\t";
759 int printed = 0;
570 760
571 /* if showing only 1st thread in core and this isn't one, bail out */ 761 /* if showing only 1st thread in core and this isn't one, bail out */
572 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) 762 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
@@ -576,106 +766,126 @@ int format_counters(struct thread_data *t, struct core_data *c,
576 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) 766 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
577 return 0; 767 return 0;
578 768
769 /*if not summary line and --cpu is used */
770 if ((t != &average.threads) &&
771 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
772 return 0;
773
579 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0; 774 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
580 775
776 tsc = t->tsc * tsc_tweak;
777
581 /* topo columns, print blanks on 1st (average) line */ 778 /* topo columns, print blanks on 1st (average) line */
582 if (t == &average.threads) { 779 if (t == &average.threads) {
583 if (show_pkg) 780 if (DO_BIC(BIC_Package))
584 outp += sprintf(outp, "\t-"); 781 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
585 if (show_core) 782 if (DO_BIC(BIC_Core))
586 outp += sprintf(outp, "\t-"); 783 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
587 if (show_cpu) 784 if (DO_BIC(BIC_CPU))
588 outp += sprintf(outp, "\t-"); 785 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
589 } else { 786 } else {
590 if (show_pkg) { 787 if (DO_BIC(BIC_Package)) {
591 if (p) 788 if (p)
592 outp += sprintf(outp, "\t%d", p->package_id); 789 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
593 else 790 else
594 outp += sprintf(outp, "\t-"); 791 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
595 } 792 }
596 if (show_core) { 793 if (DO_BIC(BIC_Core)) {
597 if (c) 794 if (c)
598 outp += sprintf(outp, "\t%d", c->core_id); 795 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
599 else 796 else
600 outp += sprintf(outp, "\t-"); 797 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
601 } 798 }
602 if (show_cpu) 799 if (DO_BIC(BIC_CPU))
603 outp += sprintf(outp, "\t%d", t->cpu_id); 800 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
604 } 801 }
605 802
606 /* Avg_MHz */ 803 if (DO_BIC(BIC_Avg_MHz))
607 if (has_aperf) 804 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
608 outp += sprintf(outp, "\t%.0f",
609 1.0 / units * t->aperf / interval_float); 805 1.0 / units * t->aperf / interval_float);
610 806
611 /* Busy% */ 807 if (DO_BIC(BIC_Busy))
612 if (has_aperf) 808 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
613 outp += sprintf(outp, "\t%.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
614 809
615 /* Bzy_MHz */ 810 if (DO_BIC(BIC_Bzy_MHz)) {
616 if (has_aperf) {
617 if (has_base_hz) 811 if (has_base_hz)
618 outp += sprintf(outp, "\t%.0f", base_hz / units * t->aperf / t->mperf); 812 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
619 else 813 else
620 outp += sprintf(outp, "\t%.0f", 814 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
621 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float); 815 tsc / units * t->aperf / t->mperf / interval_float);
622 } 816 }
623 817
624 /* TSC_MHz */ 818 if (DO_BIC(BIC_TSC_MHz))
625 outp += sprintf(outp, "\t%.0f", 1.0 * t->tsc/units/interval_float); 819 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
626
627 if (!debug)
628 goto done;
629 820
630 /* IRQ */ 821 /* IRQ */
631 if (do_irq) 822 if (DO_BIC(BIC_IRQ)) {
632 outp += sprintf(outp, "\t%d", t->irq_count); 823 if (sums_need_wide_columns)
824 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
825 else
826 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
827 }
633 828
634 /* SMI */ 829 /* SMI */
635 if (do_smi) 830 if (DO_BIC(BIC_SMI))
636 outp += sprintf(outp, "\t%d", t->smi_count); 831 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
637
638 if (do_nhm_cstates)
639 outp += sprintf(outp, "\t%.2f", 100.0 * t->c1/t->tsc);
640
641 /* print per-core data only for 1st thread in core */
642 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
643 goto done;
644
645 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
646 outp += sprintf(outp, "\t%.2f", 100.0 * c->c3/t->tsc);
647 if (do_nhm_cstates)
648 outp += sprintf(outp, "\t%.2f", 100.0 * c->c6/t->tsc);
649 if (do_snb_cstates)
650 outp += sprintf(outp, "\t%.2f", 100.0 * c->c7/t->tsc);
651 832
833 /* Added counters */
652 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { 834 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
653 if (mp->format == FORMAT_RAW) { 835 if (mp->format == FORMAT_RAW) {
654 if (mp->width == 32) 836 if (mp->width == 32)
655 outp += sprintf(outp, "\t0x%08lx", (unsigned long) t->counter[i]); 837 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
656 else 838 else
657 outp += sprintf(outp, "\t0x%016llx", t->counter[i]); 839 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
658 } else if (mp->format == FORMAT_DELTA) { 840 } else if (mp->format == FORMAT_DELTA) {
659 outp += sprintf(outp, "\t%8lld", t->counter[i]); 841 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
842 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
843 else
844 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
660 } else if (mp->format == FORMAT_PERCENT) { 845 } else if (mp->format == FORMAT_PERCENT) {
661 outp += sprintf(outp, "\t%.2f", 100.0 * t->counter[i]/t->tsc); 846 if (mp->type == COUNTER_USEC)
847 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
848 else
849 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
662 } 850 }
663 } 851 }
664 852
853 /* C1 */
854 if (DO_BIC(BIC_CPU_c1))
855 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
665 856
666 if (do_dts) 857
667 outp += sprintf(outp, "\t%d", c->core_temp_c); 858 /* print per-core data only for 1st thread in core */
859 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
860 goto done;
861
862 if (DO_BIC(BIC_CPU_c3) && !do_slm_cstates && !do_knl_cstates)
863 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
864 if (DO_BIC(BIC_CPU_c6))
865 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
866 if (DO_BIC(BIC_CPU_c7))
867 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
868
869 /* Mod%c6 */
870 if (DO_BIC(BIC_Mod_c6))
871 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
872
873 if (DO_BIC(BIC_CoreTmp))
874 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
668 875
669 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { 876 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
670 if (mp->format == FORMAT_RAW) { 877 if (mp->format == FORMAT_RAW) {
671 if (mp->width == 32) 878 if (mp->width == 32)
672 outp += sprintf(outp, "\t0x%08lx", (unsigned long) c->counter[i]); 879 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
673 else 880 else
674 outp += sprintf(outp, "\t0x%016llx", c->counter[i]); 881 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
675 } else if (mp->format == FORMAT_DELTA) { 882 } else if (mp->format == FORMAT_DELTA) {
676 outp += sprintf(outp, "\t%8lld", c->counter[i]); 883 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
884 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
885 else
886 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
677 } else if (mp->format == FORMAT_PERCENT) { 887 } else if (mp->format == FORMAT_PERCENT) {
678 outp += sprintf(outp, "\t%.2f", 100.0 * c->counter[i]/t->tsc); 888 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
679 } 889 }
680 } 890 }
681 891
@@ -684,95 +894,89 @@ int format_counters(struct thread_data *t, struct core_data *c,
684 goto done; 894 goto done;
685 895
686 /* PkgTmp */ 896 /* PkgTmp */
687 if (do_ptm) 897 if (DO_BIC(BIC_PkgTmp))
688 outp += sprintf(outp, "\t%d", p->pkg_temp_c); 898 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
689 899
690 /* GFXrc6 */ 900 /* GFXrc6 */
691 if (do_gfx_rc6_ms) { 901 if (DO_BIC(BIC_GFX_rc6)) {
692 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */ 902 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */
693 outp += sprintf(outp, "\t**.**"); 903 outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
694 } else { 904 } else {
695 outp += sprintf(outp, "\t%.2f", 905 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
696 p->gfx_rc6_ms / 10.0 / interval_float); 906 p->gfx_rc6_ms / 10.0 / interval_float);
697 } 907 }
698 } 908 }
699 909
700 /* GFXMHz */ 910 /* GFXMHz */
701 if (do_gfx_mhz) 911 if (DO_BIC(BIC_GFXMHz))
702 outp += sprintf(outp, "\t%d", p->gfx_mhz); 912 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
703 913
704 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */ 914 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
705 if (do_skl_residency) { 915 if (do_skl_residency) {
706 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc); 916 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
707 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_any_core_c0/t->tsc); 917 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
708 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc); 918 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
709 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc); 919 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
710 }
711
712 if (do_pc2)
713 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc2/t->tsc);
714 if (do_pc3)
715 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc3/t->tsc);
716 if (do_pc6)
717 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc6/t->tsc);
718 if (do_pc7)
719 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc7/t->tsc);
720 if (do_c8_c9_c10) {
721 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc8/t->tsc);
722 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc9/t->tsc);
723 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc10/t->tsc);
724 } 920 }
725 921
922 if (DO_BIC(BIC_Pkgpc2))
923 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
924 if (DO_BIC(BIC_Pkgpc3))
925 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
926 if (DO_BIC(BIC_Pkgpc6))
927 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
928 if (DO_BIC(BIC_Pkgpc7))
929 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
930 if (DO_BIC(BIC_Pkgpc8))
931 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
932 if (DO_BIC(BIC_Pkgpc9))
933 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
934 if (DO_BIC(BIC_Pkgpc10))
935 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
936
726 /* 937 /*
727 * If measurement interval exceeds minimum RAPL Joule Counter range, 938 * If measurement interval exceeds minimum RAPL Joule Counter range,
728 * indicate that results are suspect by printing "**" in fraction place. 939 * indicate that results are suspect by printing "**" in fraction place.
729 */ 940 */
730 if (interval_float < rapl_joule_counter_range) 941 if (interval_float < rapl_joule_counter_range)
731 fmt8 = "\t%.2f"; 942 fmt8 = "%s%.2f";
732 else 943 else
733 fmt8 = "%6.0f**"; 944 fmt8 = "%6.0f**";
734 945
735 if (do_rapl && !rapl_joules) { 946 if (DO_BIC(BIC_PkgWatt))
736 if (do_rapl & RAPL_PKG) 947 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
737 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float); 948 if (DO_BIC(BIC_CorWatt))
738 if (do_rapl & RAPL_CORES_ENERGY_STATUS) 949 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
739 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float); 950 if (DO_BIC(BIC_GFXWatt))
740 if (do_rapl & RAPL_GFX) 951 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
741 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float); 952 if (DO_BIC(BIC_RAMWatt))
742 if (do_rapl & RAPL_DRAM) 953 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
743 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float); 954 if (DO_BIC(BIC_Pkg_J))
744 if (do_rapl & RAPL_PKG_PERF_STATUS) 955 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
745 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float); 956 if (DO_BIC(BIC_Cor_J))
746 if (do_rapl & RAPL_DRAM_PERF_STATUS) 957 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
747 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float); 958 if (DO_BIC(BIC_GFX_J))
748 } else if (do_rapl && rapl_joules) { 959 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
749 if (do_rapl & RAPL_PKG) 960 if (DO_BIC(BIC_RAM_J))
750 outp += sprintf(outp, fmt8, 961 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
751 p->energy_pkg * rapl_energy_units); 962 if (DO_BIC(BIC_PKG__))
752 if (do_rapl & RAPL_CORES) 963 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
753 outp += sprintf(outp, fmt8, 964 if (DO_BIC(BIC_RAM__))
754 p->energy_cores * rapl_energy_units); 965 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
755 if (do_rapl & RAPL_GFX) 966
756 outp += sprintf(outp, fmt8,
757 p->energy_gfx * rapl_energy_units);
758 if (do_rapl & RAPL_DRAM)
759 outp += sprintf(outp, fmt8,
760 p->energy_dram * rapl_dram_energy_units);
761 if (do_rapl & RAPL_PKG_PERF_STATUS)
762 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
763 if (do_rapl & RAPL_DRAM_PERF_STATUS)
764 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
765 }
766 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) { 967 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
767 if (mp->format == FORMAT_RAW) { 968 if (mp->format == FORMAT_RAW) {
768 if (mp->width == 32) 969 if (mp->width == 32)
769 outp += sprintf(outp, "\t0x%08lx", (unsigned long) p->counter[i]); 970 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
770 else 971 else
771 outp += sprintf(outp, "\t0x%016llx", p->counter[i]); 972 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
772 } else if (mp->format == FORMAT_DELTA) { 973 } else if (mp->format == FORMAT_DELTA) {
773 outp += sprintf(outp, "\t%8lld", p->counter[i]); 974 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
975 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
976 else
977 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
774 } else if (mp->format == FORMAT_PERCENT) { 978 } else if (mp->format == FORMAT_PERCENT) {
775 outp += sprintf(outp, "\t%.2f", 100.0 * p->counter[i]/t->tsc); 979 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
776 } 980 }
777 } 981 }
778 982
@@ -807,7 +1011,7 @@ void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_
807 static int printed; 1011 static int printed;
808 1012
809 if (!printed || !summary_only) 1013 if (!printed || !summary_only)
810 print_header(); 1014 print_header("\t");
811 1015
812 if (topo.num_cpus > 1) 1016 if (topo.num_cpus > 1)
813 format_counters(&average.threads, &average.cores, 1017 format_counters(&average.threads, &average.cores,
@@ -841,11 +1045,11 @@ delta_package(struct pkg_data *new, struct pkg_data *old)
841 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0; 1045 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
842 } 1046 }
843 old->pc2 = new->pc2 - old->pc2; 1047 old->pc2 = new->pc2 - old->pc2;
844 if (do_pc3) 1048 if (DO_BIC(BIC_Pkgpc3))
845 old->pc3 = new->pc3 - old->pc3; 1049 old->pc3 = new->pc3 - old->pc3;
846 if (do_pc6) 1050 if (DO_BIC(BIC_Pkgpc6))
847 old->pc6 = new->pc6 - old->pc6; 1051 old->pc6 = new->pc6 - old->pc6;
848 if (do_pc7) 1052 if (DO_BIC(BIC_Pkgpc7))
849 old->pc7 = new->pc7 - old->pc7; 1053 old->pc7 = new->pc7 - old->pc7;
850 old->pc8 = new->pc8 - old->pc8; 1054 old->pc8 = new->pc8 - old->pc8;
851 old->pc9 = new->pc9 - old->pc9; 1055 old->pc9 = new->pc9 - old->pc9;
@@ -887,6 +1091,7 @@ delta_core(struct core_data *new, struct core_data *old)
887 old->c6 = new->c6 - old->c6; 1091 old->c6 = new->c6 - old->c6;
888 old->c7 = new->c7 - old->c7; 1092 old->c7 = new->c7 - old->c7;
889 old->core_temp_c = new->core_temp_c; 1093 old->core_temp_c = new->core_temp_c;
1094 old->mc6_us = new->mc6_us - old->mc6_us;
890 1095
891 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { 1096 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
892 if (mp->format == FORMAT_RAW) 1097 if (mp->format == FORMAT_RAW)
@@ -916,7 +1121,7 @@ delta_thread(struct thread_data *new, struct thread_data *old,
916 1121
917 old->c1 = new->c1 - old->c1; 1122 old->c1 = new->c1 - old->c1;
918 1123
919 if (has_aperf) { 1124 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
920 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) { 1125 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
921 old->aperf = new->aperf - old->aperf; 1126 old->aperf = new->aperf - old->aperf;
922 old->mperf = new->mperf - old->mperf; 1127 old->mperf = new->mperf - old->mperf;
@@ -941,7 +1146,7 @@ delta_thread(struct thread_data *new, struct thread_data *old,
941 old->c1 = 0; 1146 old->c1 = 0;
942 else { 1147 else {
943 /* normal case, derive c1 */ 1148 /* normal case, derive c1 */
944 old->c1 = old->tsc - old->mperf - core_delta->c3 1149 old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
945 - core_delta->c6 - core_delta->c7; 1150 - core_delta->c6 - core_delta->c7;
946 } 1151 }
947 } 1152 }
@@ -952,10 +1157,10 @@ delta_thread(struct thread_data *new, struct thread_data *old,
952 old->mperf = 1; /* divide by 0 protection */ 1157 old->mperf = 1; /* divide by 0 protection */
953 } 1158 }
954 1159
955 if (do_irq) 1160 if (DO_BIC(BIC_IRQ))
956 old->irq_count = new->irq_count - old->irq_count; 1161 old->irq_count = new->irq_count - old->irq_count;
957 1162
958 if (do_smi) 1163 if (DO_BIC(BIC_SMI))
959 old->smi_count = new->smi_count - old->smi_count; 1164 old->smi_count = new->smi_count - old->smi_count;
960 1165
961 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { 1166 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
@@ -1008,6 +1213,7 @@ void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data
1008 c->c3 = 0; 1213 c->c3 = 0;
1009 c->c6 = 0; 1214 c->c6 = 0;
1010 c->c7 = 0; 1215 c->c7 = 0;
1216 c->mc6_us = 0;
1011 c->core_temp_c = 0; 1217 c->core_temp_c = 0;
1012 1218
1013 p->pkg_wtd_core_c0 = 0; 1219 p->pkg_wtd_core_c0 = 0;
@@ -1016,11 +1222,11 @@ void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data
1016 p->pkg_both_core_gfxe_c0 = 0; 1222 p->pkg_both_core_gfxe_c0 = 0;
1017 1223
1018 p->pc2 = 0; 1224 p->pc2 = 0;
1019 if (do_pc3) 1225 if (DO_BIC(BIC_Pkgpc3))
1020 p->pc3 = 0; 1226 p->pc3 = 0;
1021 if (do_pc6) 1227 if (DO_BIC(BIC_Pkgpc6))
1022 p->pc6 = 0; 1228 p->pc6 = 0;
1023 if (do_pc7) 1229 if (DO_BIC(BIC_Pkgpc7))
1024 p->pc7 = 0; 1230 p->pc7 = 0;
1025 p->pc8 = 0; 1231 p->pc8 = 0;
1026 p->pc9 = 0; 1232 p->pc9 = 0;
@@ -1036,7 +1242,6 @@ void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data
1036 1242
1037 p->gfx_rc6_ms = 0; 1243 p->gfx_rc6_ms = 0;
1038 p->gfx_mhz = 0; 1244 p->gfx_mhz = 0;
1039
1040 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) 1245 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1041 t->counter[i] = 0; 1246 t->counter[i] = 0;
1042 1247
@@ -1073,6 +1278,7 @@ int sum_counters(struct thread_data *t, struct core_data *c,
1073 average.cores.c3 += c->c3; 1278 average.cores.c3 += c->c3;
1074 average.cores.c6 += c->c6; 1279 average.cores.c6 += c->c6;
1075 average.cores.c7 += c->c7; 1280 average.cores.c7 += c->c7;
1281 average.cores.mc6_us += c->mc6_us;
1076 1282
1077 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c); 1283 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1078 1284
@@ -1094,11 +1300,11 @@ int sum_counters(struct thread_data *t, struct core_data *c,
1094 } 1300 }
1095 1301
1096 average.packages.pc2 += p->pc2; 1302 average.packages.pc2 += p->pc2;
1097 if (do_pc3) 1303 if (DO_BIC(BIC_Pkgpc3))
1098 average.packages.pc3 += p->pc3; 1304 average.packages.pc3 += p->pc3;
1099 if (do_pc6) 1305 if (DO_BIC(BIC_Pkgpc6))
1100 average.packages.pc6 += p->pc6; 1306 average.packages.pc6 += p->pc6;
1101 if (do_pc7) 1307 if (DO_BIC(BIC_Pkgpc7))
1102 average.packages.pc7 += p->pc7; 1308 average.packages.pc7 += p->pc7;
1103 average.packages.pc8 += p->pc8; 1309 average.packages.pc8 += p->pc8;
1104 average.packages.pc9 += p->pc9; 1310 average.packages.pc9 += p->pc9;
@@ -1143,9 +1349,13 @@ void compute_average(struct thread_data *t, struct core_data *c,
1143 average.threads.mperf /= topo.num_cpus; 1349 average.threads.mperf /= topo.num_cpus;
1144 average.threads.c1 /= topo.num_cpus; 1350 average.threads.c1 /= topo.num_cpus;
1145 1351
1352 if (average.threads.irq_count > 9999999)
1353 sums_need_wide_columns = 1;
1354
1146 average.cores.c3 /= topo.num_cores; 1355 average.cores.c3 /= topo.num_cores;
1147 average.cores.c6 /= topo.num_cores; 1356 average.cores.c6 /= topo.num_cores;
1148 average.cores.c7 /= topo.num_cores; 1357 average.cores.c7 /= topo.num_cores;
1358 average.cores.mc6_us /= topo.num_cores;
1149 1359
1150 if (do_skl_residency) { 1360 if (do_skl_residency) {
1151 average.packages.pkg_wtd_core_c0 /= topo.num_packages; 1361 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
@@ -1155,11 +1365,11 @@ void compute_average(struct thread_data *t, struct core_data *c,
1155 } 1365 }
1156 1366
1157 average.packages.pc2 /= topo.num_packages; 1367 average.packages.pc2 /= topo.num_packages;
1158 if (do_pc3) 1368 if (DO_BIC(BIC_Pkgpc3))
1159 average.packages.pc3 /= topo.num_packages; 1369 average.packages.pc3 /= topo.num_packages;
1160 if (do_pc6) 1370 if (DO_BIC(BIC_Pkgpc6))
1161 average.packages.pc6 /= topo.num_packages; 1371 average.packages.pc6 /= topo.num_packages;
1162 if (do_pc7) 1372 if (DO_BIC(BIC_Pkgpc7))
1163 average.packages.pc7 /= topo.num_packages; 1373 average.packages.pc7 /= topo.num_packages;
1164 1374
1165 average.packages.pc8 /= topo.num_packages; 1375 average.packages.pc8 /= topo.num_packages;
@@ -1169,16 +1379,29 @@ void compute_average(struct thread_data *t, struct core_data *c,
1169 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { 1379 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1170 if (mp->format == FORMAT_RAW) 1380 if (mp->format == FORMAT_RAW)
1171 continue; 1381 continue;
1382 if (mp->type == COUNTER_ITEMS) {
1383 if (average.threads.counter[i] > 9999999)
1384 sums_need_wide_columns = 1;
1385 continue;
1386 }
1172 average.threads.counter[i] /= topo.num_cpus; 1387 average.threads.counter[i] /= topo.num_cpus;
1173 } 1388 }
1174 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { 1389 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1175 if (mp->format == FORMAT_RAW) 1390 if (mp->format == FORMAT_RAW)
1176 continue; 1391 continue;
1392 if (mp->type == COUNTER_ITEMS) {
1393 if (average.cores.counter[i] > 9999999)
1394 sums_need_wide_columns = 1;
1395 }
1177 average.cores.counter[i] /= topo.num_cores; 1396 average.cores.counter[i] /= topo.num_cores;
1178 } 1397 }
1179 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) { 1398 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1180 if (mp->format == FORMAT_RAW) 1399 if (mp->format == FORMAT_RAW)
1181 continue; 1400 continue;
1401 if (mp->type == COUNTER_ITEMS) {
1402 if (average.packages.counter[i] > 9999999)
1403 sums_need_wide_columns = 1;
1404 }
1182 average.packages.counter[i] /= topo.num_packages; 1405 average.packages.counter[i] /= topo.num_packages;
1183 } 1406 }
1184} 1407}
@@ -1193,6 +1416,60 @@ static unsigned long long rdtsc(void)
1193} 1416}
1194 1417
1195/* 1418/*
1419 * Open a file, and exit on failure
1420 */
1421FILE *fopen_or_die(const char *path, const char *mode)
1422{
1423 FILE *filep = fopen(path, mode);
1424
1425 if (!filep)
1426 err(1, "%s: open failed", path);
1427 return filep;
1428}
1429/*
1430 * snapshot_sysfs_counter()
1431 *
1432 * return snapshot of given counter
1433 */
1434unsigned long long snapshot_sysfs_counter(char *path)
1435{
1436 FILE *fp;
1437 int retval;
1438 unsigned long long counter;
1439
1440 fp = fopen_or_die(path, "r");
1441
1442 retval = fscanf(fp, "%lld", &counter);
1443 if (retval != 1)
1444 err(1, "snapshot_sysfs_counter(%s)", path);
1445
1446 fclose(fp);
1447
1448 return counter;
1449}
1450
1451int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1452{
1453 if (mp->msr_num != 0) {
1454 if (get_msr(cpu, mp->msr_num, counterp))
1455 return -1;
1456 } else {
1457 char path[128];
1458
1459 if (mp->flags & SYSFS_PERCPU) {
1460 sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1461 cpu, mp->path);
1462
1463 *counterp = snapshot_sysfs_counter(path);
1464 } else {
1465 *counterp = snapshot_sysfs_counter(mp->path);
1466 }
1467 }
1468
1469 return 0;
1470}
1471
1472/*
1196 * get_counters(...) 1473 * get_counters(...)
1197 * migrate to cpu 1474 * migrate to cpu
1198 * acquire and record local counters for that cpu 1475 * acquire and record local counters for that cpu
@@ -1213,7 +1490,7 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1213retry: 1490retry:
1214 t->tsc = rdtsc(); /* we are running on local CPU of interest */ 1491 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1215 1492
1216 if (has_aperf) { 1493 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
1217 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time; 1494 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1218 1495
1219 /* 1496 /*
@@ -1269,35 +1546,33 @@ retry:
1269 t->mperf = t->mperf * aperf_mperf_multiplier; 1546 t->mperf = t->mperf * aperf_mperf_multiplier;
1270 } 1547 }
1271 1548
1272 if (do_irq) 1549 if (DO_BIC(BIC_IRQ))
1273 t->irq_count = irqs_per_cpu[cpu]; 1550 t->irq_count = irqs_per_cpu[cpu];
1274 if (do_smi) { 1551 if (DO_BIC(BIC_SMI)) {
1275 if (get_msr(cpu, MSR_SMI_COUNT, &msr)) 1552 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1276 return -5; 1553 return -5;
1277 t->smi_count = msr & 0xFFFFFFFF; 1554 t->smi_count = msr & 0xFFFFFFFF;
1278 } 1555 }
1279 1556 if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
1280 if (use_c1_residency_msr) {
1281 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1)) 1557 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1282 return -6; 1558 return -6;
1283 } 1559 }
1284 1560
1285 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { 1561 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1286 if (get_msr(cpu, mp->msr_num, &t->counter[i])) 1562 if (get_mp(cpu, mp, &t->counter[i]))
1287 return -10; 1563 return -10;
1288 } 1564 }
1289 1565
1290
1291 /* collect core counters only for 1st thread in core */ 1566 /* collect core counters only for 1st thread in core */
1292 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) 1567 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1293 return 0; 1568 return 0;
1294 1569
1295 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) { 1570 if (DO_BIC(BIC_CPU_c3) && !do_slm_cstates && !do_knl_cstates) {
1296 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3)) 1571 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1297 return -6; 1572 return -6;
1298 } 1573 }
1299 1574
1300 if (do_nhm_cstates && !do_knl_cstates) { 1575 if (DO_BIC(BIC_CPU_c6) && !do_knl_cstates) {
1301 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6)) 1576 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1302 return -7; 1577 return -7;
1303 } else if (do_knl_cstates) { 1578 } else if (do_knl_cstates) {
@@ -1305,18 +1580,22 @@ retry:
1305 return -7; 1580 return -7;
1306 } 1581 }
1307 1582
1308 if (do_snb_cstates) 1583 if (DO_BIC(BIC_CPU_c7))
1309 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7)) 1584 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1310 return -8; 1585 return -8;
1311 1586
1312 if (do_dts) { 1587 if (DO_BIC(BIC_Mod_c6))
1588 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
1589 return -8;
1590
1591 if (DO_BIC(BIC_CoreTmp)) {
1313 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr)) 1592 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1314 return -9; 1593 return -9;
1315 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F); 1594 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1316 } 1595 }
1317 1596
1318 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { 1597 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1319 if (get_msr(cpu, mp->msr_num, &c->counter[i])) 1598 if (get_mp(cpu, mp, &c->counter[i]))
1320 return -10; 1599 return -10;
1321 } 1600 }
1322 1601
@@ -1334,26 +1613,35 @@ retry:
1334 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0)) 1613 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1335 return -13; 1614 return -13;
1336 } 1615 }
1337 if (do_pc3) 1616 if (DO_BIC(BIC_Pkgpc3))
1338 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3)) 1617 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1339 return -9; 1618 return -9;
1340 if (do_pc6) 1619 if (DO_BIC(BIC_Pkgpc6)) {
1341 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6)) 1620 if (do_slm_cstates) {
1342 return -10; 1621 if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
1343 if (do_pc2) 1622 return -10;
1623 } else {
1624 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1625 return -10;
1626 }
1627 }
1628
1629 if (DO_BIC(BIC_Pkgpc2))
1344 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2)) 1630 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1345 return -11; 1631 return -11;
1346 if (do_pc7) 1632 if (DO_BIC(BIC_Pkgpc7))
1347 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7)) 1633 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1348 return -12; 1634 return -12;
1349 if (do_c8_c9_c10) { 1635 if (DO_BIC(BIC_Pkgpc8))
1350 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8)) 1636 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1351 return -13; 1637 return -13;
1638 if (DO_BIC(BIC_Pkgpc9))
1352 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9)) 1639 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1353 return -13; 1640 return -13;
1641 if (DO_BIC(BIC_Pkgpc10))
1354 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10)) 1642 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1355 return -13; 1643 return -13;
1356 } 1644
1357 if (do_rapl & RAPL_PKG) { 1645 if (do_rapl & RAPL_PKG) {
1358 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr)) 1646 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1359 return -13; 1647 return -13;
@@ -1384,20 +1672,20 @@ retry:
1384 return -16; 1672 return -16;
1385 p->rapl_dram_perf_status = msr & 0xFFFFFFFF; 1673 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1386 } 1674 }
1387 if (do_ptm) { 1675 if (DO_BIC(BIC_PkgTmp)) {
1388 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr)) 1676 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1389 return -17; 1677 return -17;
1390 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F); 1678 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1391 } 1679 }
1392 1680
1393 if (do_gfx_rc6_ms) 1681 if (DO_BIC(BIC_GFX_rc6))
1394 p->gfx_rc6_ms = gfx_cur_rc6_ms; 1682 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1395 1683
1396 if (do_gfx_mhz) 1684 if (DO_BIC(BIC_GFXMHz))
1397 p->gfx_mhz = gfx_cur_mhz; 1685 p->gfx_mhz = gfx_cur_mhz;
1398 1686
1399 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) { 1687 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1400 if (get_msr(cpu, mp->msr_num, &p->counter[i])) 1688 if (get_mp(cpu, mp, &p->counter[i]))
1401 return -10; 1689 return -10;
1402 } 1690 }
1403 1691
@@ -1433,8 +1721,8 @@ char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
1433int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; 1721int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1434int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; 1722int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1435int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; 1723int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1436int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; 1724int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
1437int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; 1725int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1438int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; 1726int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1439int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; 1727int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1440int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; 1728int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
@@ -1457,11 +1745,11 @@ dump_nhm_platform_info(void)
1457 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr); 1745 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
1458 1746
1459 ratio = (msr >> 40) & 0xFF; 1747 ratio = (msr >> 40) & 0xFF;
1460 fprintf(outf, "%d * %.0f = %.0f MHz max efficiency frequency\n", 1748 fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
1461 ratio, bclk, ratio * bclk); 1749 ratio, bclk, ratio * bclk);
1462 1750
1463 ratio = (msr >> 8) & 0xFF; 1751 ratio = (msr >> 8) & 0xFF;
1464 fprintf(outf, "%d * %.0f = %.0f MHz base frequency\n", 1752 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
1465 ratio, bclk, ratio * bclk); 1753 ratio, bclk, ratio * bclk);
1466 1754
1467 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr); 1755 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
@@ -1483,12 +1771,12 @@ dump_hsw_turbo_ratio_limits(void)
1483 1771
1484 ratio = (msr >> 8) & 0xFF; 1772 ratio = (msr >> 8) & 0xFF;
1485 if (ratio) 1773 if (ratio)
1486 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 18 active cores\n", 1774 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
1487 ratio, bclk, ratio * bclk); 1775 ratio, bclk, ratio * bclk);
1488 1776
1489 ratio = (msr >> 0) & 0xFF; 1777 ratio = (msr >> 0) & 0xFF;
1490 if (ratio) 1778 if (ratio)
1491 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 17 active cores\n", 1779 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
1492 ratio, bclk, ratio * bclk); 1780 ratio, bclk, ratio * bclk);
1493 return; 1781 return;
1494} 1782}
@@ -1505,99 +1793,175 @@ dump_ivt_turbo_ratio_limits(void)
1505 1793
1506 ratio = (msr >> 56) & 0xFF; 1794 ratio = (msr >> 56) & 0xFF;
1507 if (ratio) 1795 if (ratio)
1508 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 16 active cores\n", 1796 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
1509 ratio, bclk, ratio * bclk); 1797 ratio, bclk, ratio * bclk);
1510 1798
1511 ratio = (msr >> 48) & 0xFF; 1799 ratio = (msr >> 48) & 0xFF;
1512 if (ratio) 1800 if (ratio)
1513 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 15 active cores\n", 1801 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
1514 ratio, bclk, ratio * bclk); 1802 ratio, bclk, ratio * bclk);
1515 1803
1516 ratio = (msr >> 40) & 0xFF; 1804 ratio = (msr >> 40) & 0xFF;
1517 if (ratio) 1805 if (ratio)
1518 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 14 active cores\n", 1806 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
1519 ratio, bclk, ratio * bclk); 1807 ratio, bclk, ratio * bclk);
1520 1808
1521 ratio = (msr >> 32) & 0xFF; 1809 ratio = (msr >> 32) & 0xFF;
1522 if (ratio) 1810 if (ratio)
1523 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 13 active cores\n", 1811 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
1524 ratio, bclk, ratio * bclk); 1812 ratio, bclk, ratio * bclk);
1525 1813
1526 ratio = (msr >> 24) & 0xFF; 1814 ratio = (msr >> 24) & 0xFF;
1527 if (ratio) 1815 if (ratio)
1528 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 12 active cores\n", 1816 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
1529 ratio, bclk, ratio * bclk); 1817 ratio, bclk, ratio * bclk);
1530 1818
1531 ratio = (msr >> 16) & 0xFF; 1819 ratio = (msr >> 16) & 0xFF;
1532 if (ratio) 1820 if (ratio)
1533 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 11 active cores\n", 1821 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
1534 ratio, bclk, ratio * bclk); 1822 ratio, bclk, ratio * bclk);
1535 1823
1536 ratio = (msr >> 8) & 0xFF; 1824 ratio = (msr >> 8) & 0xFF;
1537 if (ratio) 1825 if (ratio)
1538 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 10 active cores\n", 1826 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
1539 ratio, bclk, ratio * bclk); 1827 ratio, bclk, ratio * bclk);
1540 1828
1541 ratio = (msr >> 0) & 0xFF; 1829 ratio = (msr >> 0) & 0xFF;
1542 if (ratio) 1830 if (ratio)
1543 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 9 active cores\n", 1831 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
1544 ratio, bclk, ratio * bclk); 1832 ratio, bclk, ratio * bclk);
1545 return; 1833 return;
1546} 1834}
1835int has_turbo_ratio_group_limits(int family, int model)
1836{
1837
1838 if (!genuine_intel)
1839 return 0;
1840
1841 switch (model) {
1842 case INTEL_FAM6_ATOM_GOLDMONT:
1843 case INTEL_FAM6_SKYLAKE_X:
1844 case INTEL_FAM6_ATOM_DENVERTON:
1845 return 1;
1846 }
1847 return 0;
1848}
1547 1849
1548static void 1850static void
1549dump_nhm_turbo_ratio_limits(void) 1851dump_turbo_ratio_limits(int family, int model)
1550{ 1852{
1551 unsigned long long msr; 1853 unsigned long long msr, core_counts;
1552 unsigned int ratio; 1854 unsigned int ratio, group_size;
1553 1855
1554 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr); 1856 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
1555
1556 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr); 1857 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
1557 1858
1859 if (has_turbo_ratio_group_limits(family, model)) {
1860 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
1861 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
1862 } else {
1863 core_counts = 0x0807060504030201;
1864 }
1865
1558 ratio = (msr >> 56) & 0xFF; 1866 ratio = (msr >> 56) & 0xFF;
1867 group_size = (core_counts >> 56) & 0xFF;
1559 if (ratio) 1868 if (ratio)
1560 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 8 active cores\n", 1869 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1561 ratio, bclk, ratio * bclk); 1870 ratio, bclk, ratio * bclk, group_size);
1562 1871
1563 ratio = (msr >> 48) & 0xFF; 1872 ratio = (msr >> 48) & 0xFF;
1873 group_size = (core_counts >> 48) & 0xFF;
1564 if (ratio) 1874 if (ratio)
1565 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 7 active cores\n", 1875 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1566 ratio, bclk, ratio * bclk); 1876 ratio, bclk, ratio * bclk, group_size);
1567 1877
1568 ratio = (msr >> 40) & 0xFF; 1878 ratio = (msr >> 40) & 0xFF;
1879 group_size = (core_counts >> 40) & 0xFF;
1569 if (ratio) 1880 if (ratio)
1570 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 6 active cores\n", 1881 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1571 ratio, bclk, ratio * bclk); 1882 ratio, bclk, ratio * bclk, group_size);
1572 1883
1573 ratio = (msr >> 32) & 0xFF; 1884 ratio = (msr >> 32) & 0xFF;
1885 group_size = (core_counts >> 32) & 0xFF;
1574 if (ratio) 1886 if (ratio)
1575 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 5 active cores\n", 1887 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1576 ratio, bclk, ratio * bclk); 1888 ratio, bclk, ratio * bclk, group_size);
1577 1889
1578 ratio = (msr >> 24) & 0xFF; 1890 ratio = (msr >> 24) & 0xFF;
1891 group_size = (core_counts >> 24) & 0xFF;
1579 if (ratio) 1892 if (ratio)
1580 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 4 active cores\n", 1893 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1581 ratio, bclk, ratio * bclk); 1894 ratio, bclk, ratio * bclk, group_size);
1582 1895
1583 ratio = (msr >> 16) & 0xFF; 1896 ratio = (msr >> 16) & 0xFF;
1897 group_size = (core_counts >> 16) & 0xFF;
1584 if (ratio) 1898 if (ratio)
1585 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 3 active cores\n", 1899 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1586 ratio, bclk, ratio * bclk); 1900 ratio, bclk, ratio * bclk, group_size);
1587 1901
1588 ratio = (msr >> 8) & 0xFF; 1902 ratio = (msr >> 8) & 0xFF;
1903 group_size = (core_counts >> 8) & 0xFF;
1589 if (ratio) 1904 if (ratio)
1590 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 2 active cores\n", 1905 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1591 ratio, bclk, ratio * bclk); 1906 ratio, bclk, ratio * bclk, group_size);
1592 1907
1593 ratio = (msr >> 0) & 0xFF; 1908 ratio = (msr >> 0) & 0xFF;
1909 group_size = (core_counts >> 0) & 0xFF;
1594 if (ratio) 1910 if (ratio)
1595 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 1 active cores\n", 1911 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1596 ratio, bclk, ratio * bclk); 1912 ratio, bclk, ratio * bclk, group_size);
1597 return; 1913 return;
1598} 1914}
1599 1915
1600static void 1916static void
1917dump_atom_turbo_ratio_limits(void)
1918{
1919 unsigned long long msr;
1920 unsigned int ratio;
1921
1922 get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
1923 fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
1924
1925 ratio = (msr >> 0) & 0x3F;
1926 if (ratio)
1927 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
1928 ratio, bclk, ratio * bclk);
1929
1930 ratio = (msr >> 8) & 0x3F;
1931 if (ratio)
1932 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
1933 ratio, bclk, ratio * bclk);
1934
1935 ratio = (msr >> 16) & 0x3F;
1936 if (ratio)
1937 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
1938 ratio, bclk, ratio * bclk);
1939
1940 get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
1941 fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
1942
1943 ratio = (msr >> 24) & 0x3F;
1944 if (ratio)
1945 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
1946 ratio, bclk, ratio * bclk);
1947
1948 ratio = (msr >> 16) & 0x3F;
1949 if (ratio)
1950 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
1951 ratio, bclk, ratio * bclk);
1952
1953 ratio = (msr >> 8) & 0x3F;
1954 if (ratio)
1955 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
1956 ratio, bclk, ratio * bclk);
1957
1958 ratio = (msr >> 0) & 0x3F;
1959 if (ratio)
1960 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
1961 ratio, bclk, ratio * bclk);
1962}
1963
1964static void
1601dump_knl_turbo_ratio_limits(void) 1965dump_knl_turbo_ratio_limits(void)
1602{ 1966{
1603 const unsigned int buckets_no = 7; 1967 const unsigned int buckets_no = 7;
@@ -1652,7 +2016,7 @@ dump_knl_turbo_ratio_limits(void)
1652 for (i = buckets_no - 1; i >= 0; i--) 2016 for (i = buckets_no - 1; i >= 0; i--)
1653 if (i > 0 ? ratio[i] != ratio[i - 1] : 1) 2017 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
1654 fprintf(outf, 2018 fprintf(outf,
1655 "%d * %.0f = %.0f MHz max turbo %d active cores\n", 2019 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1656 ratio[i], bclk, ratio[i] * bclk, cores[i]); 2020 ratio[i], bclk, ratio[i] * bclk, cores[i]);
1657} 2021}
1658 2022
@@ -1661,12 +2025,12 @@ dump_nhm_cst_cfg(void)
1661{ 2025{
1662 unsigned long long msr; 2026 unsigned long long msr;
1663 2027
1664 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr); 2028 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
1665 2029
1666#define SNB_C1_AUTO_UNDEMOTE (1UL << 27) 2030#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1667#define SNB_C3_AUTO_UNDEMOTE (1UL << 28) 2031#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1668 2032
1669 fprintf(outf, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr); 2033 fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
1670 2034
1671 fprintf(outf, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n", 2035 fprintf(outf, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1672 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "", 2036 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
@@ -1810,16 +2174,6 @@ void free_all_buffers(void)
1810 free(irqs_per_cpu); 2174 free(irqs_per_cpu);
1811} 2175}
1812 2176
1813/*
1814 * Open a file, and exit on failure
1815 */
1816FILE *fopen_or_die(const char *path, const char *mode)
1817{
1818 FILE *filep = fopen(path, mode);
1819 if (!filep)
1820 err(1, "%s: open failed", path);
1821 return filep;
1822}
1823 2177
1824/* 2178/*
1825 * Parse a file containing a single int. 2179 * Parse a file containing a single int.
@@ -2148,13 +2502,14 @@ int snapshot_gfx_mhz(void)
2148 */ 2502 */
2149int snapshot_proc_sysfs_files(void) 2503int snapshot_proc_sysfs_files(void)
2150{ 2504{
2151 if (snapshot_proc_interrupts()) 2505 if (DO_BIC(BIC_IRQ))
2152 return 1; 2506 if (snapshot_proc_interrupts())
2507 return 1;
2153 2508
2154 if (do_gfx_rc6_ms) 2509 if (DO_BIC(BIC_GFX_rc6))
2155 snapshot_gfx_rc6_ms(); 2510 snapshot_gfx_rc6_ms();
2156 2511
2157 if (do_gfx_mhz) 2512 if (DO_BIC(BIC_GFXMHz))
2158 snapshot_gfx_mhz(); 2513 snapshot_gfx_mhz();
2159 2514
2160 return 0; 2515 return 0;
@@ -2283,7 +2638,9 @@ void check_permissions()
2283 * MSR_SMI_COUNT 0x00000034 2638 * MSR_SMI_COUNT 0x00000034
2284 * 2639 *
2285 * MSR_PLATFORM_INFO 0x000000ce 2640 * MSR_PLATFORM_INFO 0x000000ce
2286 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 2641 * MSR_PKG_CST_CONFIG_CONTROL 0x000000e2
2642 *
2643 * MSR_MISC_PWR_MGMT 0x000001aa
2287 * 2644 *
2288 * MSR_PKG_C3_RESIDENCY 0x000003f8 2645 * MSR_PKG_C3_RESIDENCY 0x000003f8
2289 * MSR_PKG_C6_RESIDENCY 0x000003f9 2646 * MSR_PKG_C6_RESIDENCY 0x000003f9
@@ -2291,7 +2648,8 @@ void check_permissions()
2291 * MSR_CORE_C6_RESIDENCY 0x000003fd 2648 * MSR_CORE_C6_RESIDENCY 0x000003fd
2292 * 2649 *
2293 * Side effect: 2650 * Side effect:
2294 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL 2651 * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
2652 * sets has_misc_feature_control
2295 */ 2653 */
2296int probe_nhm_msrs(unsigned int family, unsigned int model) 2654int probe_nhm_msrs(unsigned int family, unsigned int model)
2297{ 2655{
@@ -2322,6 +2680,7 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
2322 case INTEL_FAM6_IVYBRIDGE: /* IVB */ 2680 case INTEL_FAM6_IVYBRIDGE: /* IVB */
2323 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */ 2681 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
2324 pkg_cstate_limits = snb_pkg_cstate_limits; 2682 pkg_cstate_limits = snb_pkg_cstate_limits;
2683 has_misc_feature_control = 1;
2325 break; 2684 break;
2326 case INTEL_FAM6_HASWELL_CORE: /* HSW */ 2685 case INTEL_FAM6_HASWELL_CORE: /* HSW */
2327 case INTEL_FAM6_HASWELL_X: /* HSX */ 2686 case INTEL_FAM6_HASWELL_X: /* HSX */
@@ -2336,29 +2695,34 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
2336 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */ 2695 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
2337 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ 2696 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
2338 pkg_cstate_limits = hsw_pkg_cstate_limits; 2697 pkg_cstate_limits = hsw_pkg_cstate_limits;
2698 has_misc_feature_control = 1;
2339 break; 2699 break;
2340 case INTEL_FAM6_SKYLAKE_X: /* SKX */ 2700 case INTEL_FAM6_SKYLAKE_X: /* SKX */
2341 pkg_cstate_limits = skx_pkg_cstate_limits; 2701 pkg_cstate_limits = skx_pkg_cstate_limits;
2702 has_misc_feature_control = 1;
2342 break; 2703 break;
2343 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */ 2704 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
2705 no_MSR_MISC_PWR_MGMT = 1;
2344 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */ 2706 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
2345 pkg_cstate_limits = slv_pkg_cstate_limits; 2707 pkg_cstate_limits = slv_pkg_cstate_limits;
2346 break; 2708 break;
2347 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */ 2709 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */
2348 pkg_cstate_limits = amt_pkg_cstate_limits; 2710 pkg_cstate_limits = amt_pkg_cstate_limits;
2711 no_MSR_MISC_PWR_MGMT = 1;
2349 break; 2712 break;
2350 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */ 2713 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */
2351 case INTEL_FAM6_XEON_PHI_KNM: 2714 case INTEL_FAM6_XEON_PHI_KNM:
2352 pkg_cstate_limits = phi_pkg_cstate_limits; 2715 pkg_cstate_limits = phi_pkg_cstate_limits;
2353 break; 2716 break;
2354 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 2717 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
2718 case INTEL_FAM6_ATOM_GEMINI_LAKE:
2355 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */ 2719 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
2356 pkg_cstate_limits = bxt_pkg_cstate_limits; 2720 pkg_cstate_limits = bxt_pkg_cstate_limits;
2357 break; 2721 break;
2358 default: 2722 default:
2359 return 0; 2723 return 0;
2360 } 2724 }
2361 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr); 2725 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
2362 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF]; 2726 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
2363 2727
2364 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr); 2728 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
@@ -2368,8 +2732,69 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
2368 has_base_hz = 1; 2732 has_base_hz = 1;
2369 return 1; 2733 return 1;
2370} 2734}
2371int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model) 2735/*
2736 * SLV client has support for unique MSRs:
2737 *
2738 * MSR_CC6_DEMOTION_POLICY_CONFIG
2739 * MSR_MC6_DEMOTION_POLICY_CONFIG
2740 */
2741
2742int has_slv_msrs(unsigned int family, unsigned int model)
2372{ 2743{
2744 if (!genuine_intel)
2745 return 0;
2746
2747 switch (model) {
2748 case INTEL_FAM6_ATOM_SILVERMONT1:
2749 case INTEL_FAM6_ATOM_MERRIFIELD:
2750 case INTEL_FAM6_ATOM_MOOREFIELD:
2751 return 1;
2752 }
2753 return 0;
2754}
2755int is_dnv(unsigned int family, unsigned int model)
2756{
2757
2758 if (!genuine_intel)
2759 return 0;
2760
2761 switch (model) {
2762 case INTEL_FAM6_ATOM_DENVERTON:
2763 return 1;
2764 }
2765 return 0;
2766}
2767int is_bdx(unsigned int family, unsigned int model)
2768{
2769
2770 if (!genuine_intel)
2771 return 0;
2772
2773 switch (model) {
2774 case INTEL_FAM6_BROADWELL_X:
2775 case INTEL_FAM6_BROADWELL_XEON_D:
2776 return 1;
2777 }
2778 return 0;
2779}
2780int is_skx(unsigned int family, unsigned int model)
2781{
2782
2783 if (!genuine_intel)
2784 return 0;
2785
2786 switch (model) {
2787 case INTEL_FAM6_SKYLAKE_X:
2788 return 1;
2789 }
2790 return 0;
2791}
2792
2793int has_turbo_ratio_limit(unsigned int family, unsigned int model)
2794{
2795 if (has_slv_msrs(family, model))
2796 return 0;
2797
2373 switch (model) { 2798 switch (model) {
2374 /* Nehalem compatible, but do not include turbo-ratio limit support */ 2799 /* Nehalem compatible, but do not include turbo-ratio limit support */
2375 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ 2800 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
@@ -2381,6 +2806,13 @@ int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
2381 return 1; 2806 return 1;
2382 } 2807 }
2383} 2808}
2809int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
2810{
2811 if (has_slv_msrs(family, model))
2812 return 1;
2813
2814 return 0;
2815}
2384int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model) 2816int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
2385{ 2817{
2386 if (!genuine_intel) 2818 if (!genuine_intel)
@@ -2429,6 +2861,22 @@ int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
2429 return 0; 2861 return 0;
2430 } 2862 }
2431} 2863}
2864int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
2865{
2866 if (!genuine_intel)
2867 return 0;
2868
2869 if (family != 6)
2870 return 0;
2871
2872 switch (model) {
2873 case INTEL_FAM6_ATOM_GOLDMONT:
2874 case INTEL_FAM6_SKYLAKE_X:
2875 return 1;
2876 default:
2877 return 0;
2878 }
2879}
2432int has_config_tdp(unsigned int family, unsigned int model) 2880int has_config_tdp(unsigned int family, unsigned int model)
2433{ 2881{
2434 if (!genuine_intel) 2882 if (!genuine_intel)
@@ -2475,8 +2923,11 @@ dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
2475 if (has_ivt_turbo_ratio_limit(family, model)) 2923 if (has_ivt_turbo_ratio_limit(family, model))
2476 dump_ivt_turbo_ratio_limits(); 2924 dump_ivt_turbo_ratio_limits();
2477 2925
2478 if (has_nhm_turbo_ratio_limit(family, model)) 2926 if (has_turbo_ratio_limit(family, model))
2479 dump_nhm_turbo_ratio_limits(); 2927 dump_turbo_ratio_limits(family, model);
2928
2929 if (has_atom_turbo_ratio_limit(family, model))
2930 dump_atom_turbo_ratio_limits();
2480 2931
2481 if (has_knl_turbo_ratio_limit(family, model)) 2932 if (has_knl_turbo_ratio_limit(family, model))
2482 dump_knl_turbo_ratio_limits(); 2933 dump_knl_turbo_ratio_limits();
@@ -2487,6 +2938,96 @@ dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
2487 dump_nhm_cst_cfg(); 2938 dump_nhm_cst_cfg();
2488} 2939}
2489 2940
2941static void
2942dump_sysfs_cstate_config(void)
2943{
2944 char path[64];
2945 char name_buf[16];
2946 char desc[64];
2947 FILE *input;
2948 int state;
2949 char *sp;
2950
2951 if (!DO_BIC(BIC_sysfs))
2952 return;
2953
2954 for (state = 0; state < 10; ++state) {
2955
2956 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
2957 base_cpu, state);
2958 input = fopen(path, "r");
2959 if (input == NULL)
2960 continue;
2961 fgets(name_buf, sizeof(name_buf), input);
2962
2963 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
2964 sp = strchr(name_buf, '-');
2965 if (!sp)
2966 sp = strchrnul(name_buf, '\n');
2967 *sp = '\0';
2968
2969 fclose(input);
2970
2971 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
2972 base_cpu, state);
2973 input = fopen(path, "r");
2974 if (input == NULL)
2975 continue;
2976 fgets(desc, sizeof(desc), input);
2977
2978 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
2979 fclose(input);
2980 }
2981}
2982static void
2983dump_sysfs_pstate_config(void)
2984{
2985 char path[64];
2986 char driver_buf[64];
2987 char governor_buf[64];
2988 FILE *input;
2989 int turbo;
2990
2991 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
2992 base_cpu);
2993 input = fopen(path, "r");
2994 if (input == NULL) {
2995 fprintf(stderr, "NSFOD %s\n", path);
2996 return;
2997 }
2998 fgets(driver_buf, sizeof(driver_buf), input);
2999 fclose(input);
3000
3001 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3002 base_cpu);
3003 input = fopen(path, "r");
3004 if (input == NULL) {
3005 fprintf(stderr, "NSFOD %s\n", path);
3006 return;
3007 }
3008 fgets(governor_buf, sizeof(governor_buf), input);
3009 fclose(input);
3010
3011 fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3012 fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3013
3014 sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3015 input = fopen(path, "r");
3016 if (input != NULL) {
3017 fscanf(input, "%d", &turbo);
3018 fprintf(outf, "cpufreq boost: %d\n", turbo);
3019 fclose(input);
3020 }
3021
3022 sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3023 input = fopen(path, "r");
3024 if (input != NULL) {
3025 fscanf(input, "%d", &turbo);
3026 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3027 fclose(input);
3028 }
3029}
3030
2490 3031
2491/* 3032/*
2492 * print_epb() 3033 * print_epb()
@@ -2790,15 +3331,40 @@ void rapl_probe(unsigned int family, unsigned int model)
2790 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 3331 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
2791 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */ 3332 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
2792 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO; 3333 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
3334 if (rapl_joules) {
3335 BIC_PRESENT(BIC_Pkg_J);
3336 BIC_PRESENT(BIC_Cor_J);
3337 BIC_PRESENT(BIC_GFX_J);
3338 } else {
3339 BIC_PRESENT(BIC_PkgWatt);
3340 BIC_PRESENT(BIC_CorWatt);
3341 BIC_PRESENT(BIC_GFXWatt);
3342 }
2793 break; 3343 break;
2794 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 3344 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
3345 case INTEL_FAM6_ATOM_GEMINI_LAKE:
2795 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO; 3346 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
3347 if (rapl_joules)
3348 BIC_PRESENT(BIC_Pkg_J);
3349 else
3350 BIC_PRESENT(BIC_PkgWatt);
2796 break; 3351 break;
2797 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ 3352 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
2798 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */ 3353 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
2799 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */ 3354 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
2800 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ 3355 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
2801 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO; 3356 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
3357 BIC_PRESENT(BIC_PKG__);
3358 BIC_PRESENT(BIC_RAM__);
3359 if (rapl_joules) {
3360 BIC_PRESENT(BIC_Pkg_J);
3361 BIC_PRESENT(BIC_Cor_J);
3362 BIC_PRESENT(BIC_RAM_J);
3363 } else {
3364 BIC_PRESENT(BIC_PkgWatt);
3365 BIC_PRESENT(BIC_CorWatt);
3366 BIC_PRESENT(BIC_RAMWatt);
3367 }
2802 break; 3368 break;
2803 case INTEL_FAM6_HASWELL_X: /* HSX */ 3369 case INTEL_FAM6_HASWELL_X: /* HSX */
2804 case INTEL_FAM6_BROADWELL_X: /* BDX */ 3370 case INTEL_FAM6_BROADWELL_X: /* BDX */
@@ -2807,17 +3373,55 @@ void rapl_probe(unsigned int family, unsigned int model)
2807 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ 3373 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
2808 case INTEL_FAM6_XEON_PHI_KNM: 3374 case INTEL_FAM6_XEON_PHI_KNM:
2809 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO; 3375 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
3376 BIC_PRESENT(BIC_PKG__);
3377 BIC_PRESENT(BIC_RAM__);
3378 if (rapl_joules) {
3379 BIC_PRESENT(BIC_Pkg_J);
3380 BIC_PRESENT(BIC_RAM_J);
3381 } else {
3382 BIC_PRESENT(BIC_PkgWatt);
3383 BIC_PRESENT(BIC_RAMWatt);
3384 }
2810 break; 3385 break;
2811 case INTEL_FAM6_SANDYBRIDGE_X: 3386 case INTEL_FAM6_SANDYBRIDGE_X:
2812 case INTEL_FAM6_IVYBRIDGE_X: 3387 case INTEL_FAM6_IVYBRIDGE_X:
2813 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO; 3388 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
3389 BIC_PRESENT(BIC_PKG__);
3390 BIC_PRESENT(BIC_RAM__);
3391 if (rapl_joules) {
3392 BIC_PRESENT(BIC_Pkg_J);
3393 BIC_PRESENT(BIC_Cor_J);
3394 BIC_PRESENT(BIC_RAM_J);
3395 } else {
3396 BIC_PRESENT(BIC_PkgWatt);
3397 BIC_PRESENT(BIC_CorWatt);
3398 BIC_PRESENT(BIC_RAMWatt);
3399 }
2814 break; 3400 break;
2815 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */ 3401 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
2816 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */ 3402 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
2817 do_rapl = RAPL_PKG | RAPL_CORES; 3403 do_rapl = RAPL_PKG | RAPL_CORES;
3404 if (rapl_joules) {
3405 BIC_PRESENT(BIC_Pkg_J);
3406 BIC_PRESENT(BIC_Cor_J);
3407 } else {
3408 BIC_PRESENT(BIC_PkgWatt);
3409 BIC_PRESENT(BIC_CorWatt);
3410 }
2818 break; 3411 break;
2819 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */ 3412 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
2820 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS; 3413 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
3414 BIC_PRESENT(BIC_PKG__);
3415 BIC_PRESENT(BIC_RAM__);
3416 if (rapl_joules) {
3417 BIC_PRESENT(BIC_Pkg_J);
3418 BIC_PRESENT(BIC_Cor_J);
3419 BIC_PRESENT(BIC_RAM_J);
3420 } else {
3421 BIC_PRESENT(BIC_PkgWatt);
3422 BIC_PRESENT(BIC_CorWatt);
3423 BIC_PRESENT(BIC_RAMWatt);
3424 }
2821 break; 3425 break;
2822 default: 3426 default:
2823 return; 3427 return;
@@ -2844,7 +3448,7 @@ void rapl_probe(unsigned int family, unsigned int model)
2844 tdp = get_tdp(model); 3448 tdp = get_tdp(model);
2845 3449
2846 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; 3450 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
2847 if (debug) 3451 if (!quiet)
2848 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp); 3452 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
2849 3453
2850 return; 3454 return;
@@ -2969,11 +3573,9 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2969 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr)) 3573 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2970 return -1; 3574 return -1;
2971 3575
2972 if (debug) { 3576 fprintf(outf, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr,
2973 fprintf(outf, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx " 3577 rapl_power_units, rapl_energy_units, rapl_time_units);
2974 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr, 3578
2975 rapl_power_units, rapl_energy_units, rapl_time_units);
2976 }
2977 if (do_rapl & RAPL_PKG_POWER_INFO) { 3579 if (do_rapl & RAPL_PKG_POWER_INFO) {
2978 3580
2979 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr)) 3581 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
@@ -2994,7 +3596,7 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2994 return -9; 3596 return -9;
2995 3597
2996 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n", 3598 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
2997 cpu, msr, (msr >> 63) & 1 ? "": "UN"); 3599 cpu, msr, (msr >> 63) & 1 ? "" : "UN");
2998 3600
2999 print_power_limit_msr(cpu, msr, "PKG Limit #1"); 3601 print_power_limit_msr(cpu, msr, "PKG Limit #1");
3000 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n", 3602 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
@@ -3020,40 +3622,34 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3020 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr)) 3622 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
3021 return -9; 3623 return -9;
3022 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n", 3624 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
3023 cpu, msr, (msr >> 31) & 1 ? "": "UN"); 3625 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
3024 3626
3025 print_power_limit_msr(cpu, msr, "DRAM Limit"); 3627 print_power_limit_msr(cpu, msr, "DRAM Limit");
3026 } 3628 }
3027 if (do_rapl & RAPL_CORE_POLICY) { 3629 if (do_rapl & RAPL_CORE_POLICY) {
3028 if (debug) { 3630 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
3029 if (get_msr(cpu, MSR_PP0_POLICY, &msr)) 3631 return -7;
3030 return -7;
3031 3632
3032 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF); 3633 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
3033 }
3034 } 3634 }
3035 if (do_rapl & RAPL_CORES_POWER_LIMIT) { 3635 if (do_rapl & RAPL_CORES_POWER_LIMIT) {
3036 if (debug) { 3636 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
3037 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr)) 3637 return -9;
3038 return -9; 3638 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
3039 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n", 3639 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
3040 cpu, msr, (msr >> 31) & 1 ? "": "UN"); 3640 print_power_limit_msr(cpu, msr, "Cores Limit");
3041 print_power_limit_msr(cpu, msr, "Cores Limit");
3042 }
3043 } 3641 }
3044 if (do_rapl & RAPL_GFX) { 3642 if (do_rapl & RAPL_GFX) {
3045 if (debug) { 3643 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
3046 if (get_msr(cpu, MSR_PP1_POLICY, &msr)) 3644 return -8;
3047 return -8;
3048 3645
3049 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF); 3646 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
3050 3647
3051 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr)) 3648 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
3052 return -9; 3649 return -9;
3053 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n", 3650 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
3054 cpu, msr, (msr >> 31) & 1 ? "": "UN"); 3651 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
3055 print_power_limit_msr(cpu, msr, "GFX Limit"); 3652 print_power_limit_msr(cpu, msr, "GFX Limit");
3056 }
3057 } 3653 }
3058 return 0; 3654 return 0;
3059} 3655}
@@ -3090,6 +3686,7 @@ int has_snb_msrs(unsigned int family, unsigned int model)
3090 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ 3686 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
3091 case INTEL_FAM6_SKYLAKE_X: /* SKX */ 3687 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3092 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 3688 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
3689 case INTEL_FAM6_ATOM_GEMINI_LAKE:
3093 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */ 3690 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
3094 return 1; 3691 return 1;
3095 } 3692 }
@@ -3121,6 +3718,7 @@ int has_hsw_msrs(unsigned int family, unsigned int model)
3121 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */ 3718 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
3122 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ 3719 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
3123 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 3720 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
3721 case INTEL_FAM6_ATOM_GEMINI_LAKE:
3124 return 1; 3722 return 1;
3125 } 3723 }
3126 return 0; 3724 return 0;
@@ -3149,8 +3747,6 @@ int has_skl_msrs(unsigned int family, unsigned int model)
3149 return 0; 3747 return 0;
3150} 3748}
3151 3749
3152
3153
3154int is_slm(unsigned int family, unsigned int model) 3750int is_slm(unsigned int family, unsigned int model)
3155{ 3751{
3156 if (!genuine_intel) 3752 if (!genuine_intel)
@@ -3201,7 +3797,8 @@ double slm_bclk(void)
3201 } 3797 }
3202 freq = slm_freq_table[i]; 3798 freq = slm_freq_table[i];
3203 3799
3204 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq); 3800 if (!quiet)
3801 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
3205 3802
3206 return freq; 3803 return freq;
3207} 3804}
@@ -3264,7 +3861,7 @@ int set_temperature_target(struct thread_data *t, struct core_data *c, struct pk
3264 3861
3265 target_c_local = (msr >> 16) & 0xFF; 3862 target_c_local = (msr >> 16) & 0xFF;
3266 3863
3267 if (debug) 3864 if (!quiet)
3268 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n", 3865 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
3269 cpu, msr, target_c_local); 3866 cpu, msr, target_c_local);
3270 3867
@@ -3299,13 +3896,30 @@ void decode_misc_enable_msr(void)
3299 unsigned long long msr; 3896 unsigned long long msr;
3300 3897
3301 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr)) 3898 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
3302 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%s %s %s)\n", 3899 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
3303 base_cpu, msr, 3900 base_cpu, msr,
3304 msr & (1 << 3) ? "TCC" : "", 3901 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
3305 msr & (1 << 16) ? "EIST" : "", 3902 msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
3306 msr & (1 << 18) ? "MONITOR" : ""); 3903 msr & MSR_IA32_MISC_ENABLE_MWAIT ? "No-" : "",
3904 msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
3905 msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
3307} 3906}
3308 3907
3908void decode_misc_feature_control(void)
3909{
3910 unsigned long long msr;
3911
3912 if (!has_misc_feature_control)
3913 return;
3914
3915 if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
3916 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
3917 base_cpu, msr,
3918 msr & (0 << 0) ? "No-" : "",
3919 msr & (1 << 0) ? "No-" : "",
3920 msr & (2 << 0) ? "No-" : "",
3921 msr & (3 << 0) ? "No-" : "");
3922}
3309/* 3923/*
3310 * Decode MSR_MISC_PWR_MGMT 3924 * Decode MSR_MISC_PWR_MGMT
3311 * 3925 *
@@ -3320,6 +3934,9 @@ void decode_misc_pwr_mgmt_msr(void)
3320 if (!do_nhm_platform_info) 3934 if (!do_nhm_platform_info)
3321 return; 3935 return;
3322 3936
3937 if (no_MSR_MISC_PWR_MGMT)
3938 return;
3939
3323 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr)) 3940 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
3324 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n", 3941 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
3325 base_cpu, msr, 3942 base_cpu, msr,
@@ -3327,11 +3944,30 @@ void decode_misc_pwr_mgmt_msr(void)
3327 msr & (1 << 1) ? "EN" : "DIS", 3944 msr & (1 << 1) ? "EN" : "DIS",
3328 msr & (1 << 8) ? "EN" : "DIS"); 3945 msr & (1 << 8) ? "EN" : "DIS");
3329} 3946}
3947/*
3948 * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
3949 *
3950 * This MSRs are present on Silvermont processors,
3951 * Intel Atom processor E3000 series (Baytrail), and friends.
3952 */
3953void decode_c6_demotion_policy_msr(void)
3954{
3955 unsigned long long msr;
3956
3957 if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
3958 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
3959 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
3960
3961 if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
3962 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
3963 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
3964}
3330 3965
3331void process_cpuid() 3966void process_cpuid()
3332{ 3967{
3333 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level; 3968 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
3334 unsigned int fms, family, model, stepping; 3969 unsigned int fms, family, model, stepping;
3970 unsigned int has_turbo;
3335 3971
3336 eax = ebx = ecx = edx = 0; 3972 eax = ebx = ecx = edx = 0;
3337 3973
@@ -3340,7 +3976,7 @@ void process_cpuid()
3340 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e) 3976 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
3341 genuine_intel = 1; 3977 genuine_intel = 1;
3342 3978
3343 if (debug) 3979 if (!quiet)
3344 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ", 3980 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
3345 (char *)&ebx, (char *)&edx, (char *)&ecx); 3981 (char *)&ebx, (char *)&edx, (char *)&ecx);
3346 3982
@@ -3351,7 +3987,7 @@ void process_cpuid()
3351 if (family == 6 || family == 0xf) 3987 if (family == 6 || family == 0xf)
3352 model += ((fms >> 16) & 0xf) << 4; 3988 model += ((fms >> 16) & 0xf) << 4;
3353 3989
3354 if (debug) { 3990 if (!quiet) {
3355 fprintf(outf, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n", 3991 fprintf(outf, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
3356 max_level, family, model, stepping, family, model, stepping); 3992 max_level, family, model, stepping, family, model, stepping);
3357 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s\n", 3993 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s\n",
@@ -3394,8 +4030,18 @@ void process_cpuid()
3394 4030
3395 __cpuid(0x6, eax, ebx, ecx, edx); 4031 __cpuid(0x6, eax, ebx, ecx, edx);
3396 has_aperf = ecx & (1 << 0); 4032 has_aperf = ecx & (1 << 0);
4033 if (has_aperf) {
4034 BIC_PRESENT(BIC_Avg_MHz);
4035 BIC_PRESENT(BIC_Busy);
4036 BIC_PRESENT(BIC_Bzy_MHz);
4037 }
3397 do_dts = eax & (1 << 0); 4038 do_dts = eax & (1 << 0);
4039 if (do_dts)
4040 BIC_PRESENT(BIC_CoreTmp);
4041 has_turbo = eax & (1 << 1);
3398 do_ptm = eax & (1 << 6); 4042 do_ptm = eax & (1 << 6);
4043 if (do_ptm)
4044 BIC_PRESENT(BIC_PkgTmp);
3399 has_hwp = eax & (1 << 7); 4045 has_hwp = eax & (1 << 7);
3400 has_hwp_notify = eax & (1 << 8); 4046 has_hwp_notify = eax & (1 << 8);
3401 has_hwp_activity_window = eax & (1 << 9); 4047 has_hwp_activity_window = eax & (1 << 9);
@@ -3403,10 +4049,11 @@ void process_cpuid()
3403 has_hwp_pkg = eax & (1 << 11); 4049 has_hwp_pkg = eax & (1 << 11);
3404 has_epb = ecx & (1 << 3); 4050 has_epb = ecx & (1 << 3);
3405 4051
3406 if (debug) 4052 if (!quiet)
3407 fprintf(outf, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sHWP, " 4053 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
3408 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n", 4054 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
3409 has_aperf ? "" : "No-", 4055 has_aperf ? "" : "No-",
4056 has_turbo ? "" : "No-",
3410 do_dts ? "" : "No-", 4057 do_dts ? "" : "No-",
3411 do_ptm ? "" : "No-", 4058 do_ptm ? "" : "No-",
3412 has_hwp ? "" : "No-", 4059 has_hwp ? "" : "No-",
@@ -3416,10 +4063,11 @@ void process_cpuid()
3416 has_hwp_pkg ? "" : "No-", 4063 has_hwp_pkg ? "" : "No-",
3417 has_epb ? "" : "No-"); 4064 has_epb ? "" : "No-");
3418 4065
3419 if (debug) 4066 if (!quiet)
3420 decode_misc_enable_msr(); 4067 decode_misc_enable_msr();
3421 4068
3422 if (max_level >= 0x7 && debug) { 4069
4070 if (max_level >= 0x7 && !quiet) {
3423 int has_sgx; 4071 int has_sgx;
3424 4072
3425 ecx = 0; 4073 ecx = 0;
@@ -3445,7 +4093,7 @@ void process_cpuid()
3445 4093
3446 if (ebx_tsc != 0) { 4094 if (ebx_tsc != 0) {
3447 4095
3448 if (debug && (ebx != 0)) 4096 if (!quiet && (ebx != 0))
3449 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n", 4097 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
3450 eax_crystal, ebx_tsc, crystal_hz); 4098 eax_crystal, ebx_tsc, crystal_hz);
3451 4099
@@ -3462,6 +4110,7 @@ void process_cpuid()
3462 crystal_hz = 25000000; /* 25.0 MHz */ 4110 crystal_hz = 25000000; /* 25.0 MHz */
3463 break; 4111 break;
3464 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 4112 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
4113 case INTEL_FAM6_ATOM_GEMINI_LAKE:
3465 crystal_hz = 19200000; /* 19.2 MHz */ 4114 crystal_hz = 19200000; /* 19.2 MHz */
3466 break; 4115 break;
3467 default: 4116 default:
@@ -3470,7 +4119,7 @@ void process_cpuid()
3470 4119
3471 if (crystal_hz) { 4120 if (crystal_hz) {
3472 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal; 4121 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
3473 if (debug) 4122 if (!quiet)
3474 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n", 4123 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
3475 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal); 4124 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
3476 } 4125 }
@@ -3485,7 +4134,7 @@ void process_cpuid()
3485 base_mhz = max_mhz = bus_mhz = edx = 0; 4134 base_mhz = max_mhz = bus_mhz = edx = 0;
3486 4135
3487 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx); 4136 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
3488 if (debug) 4137 if (!quiet)
3489 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n", 4138 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
3490 base_mhz, max_mhz, bus_mhz); 4139 base_mhz, max_mhz, bus_mhz);
3491 } 4140 }
@@ -3493,56 +4142,96 @@ void process_cpuid()
3493 if (has_aperf) 4142 if (has_aperf)
3494 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model); 4143 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
3495 4144
3496 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model); 4145 BIC_PRESENT(BIC_IRQ);
4146 BIC_PRESENT(BIC_TSC_MHz);
4147
4148 if (probe_nhm_msrs(family, model)) {
4149 do_nhm_platform_info = 1;
4150 BIC_PRESENT(BIC_CPU_c1);
4151 BIC_PRESENT(BIC_CPU_c3);
4152 BIC_PRESENT(BIC_CPU_c6);
4153 BIC_PRESENT(BIC_SMI);
4154 }
3497 do_snb_cstates = has_snb_msrs(family, model); 4155 do_snb_cstates = has_snb_msrs(family, model);
4156
4157 if (do_snb_cstates)
4158 BIC_PRESENT(BIC_CPU_c7);
4159
3498 do_irtl_snb = has_snb_msrs(family, model); 4160 do_irtl_snb = has_snb_msrs(family, model);
3499 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2); 4161 if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
3500 do_pc3 = (pkg_cstate_limit >= PCL__3); 4162 BIC_PRESENT(BIC_Pkgpc2);
3501 do_pc6 = (pkg_cstate_limit >= PCL__6); 4163 if (pkg_cstate_limit >= PCL__3)
3502 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7); 4164 BIC_PRESENT(BIC_Pkgpc3);
3503 do_c8_c9_c10 = has_hsw_msrs(family, model); 4165 if (pkg_cstate_limit >= PCL__6)
4166 BIC_PRESENT(BIC_Pkgpc6);
4167 if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
4168 BIC_PRESENT(BIC_Pkgpc7);
4169 if (has_slv_msrs(family, model)) {
4170 BIC_NOT_PRESENT(BIC_Pkgpc2);
4171 BIC_NOT_PRESENT(BIC_Pkgpc3);
4172 BIC_PRESENT(BIC_Pkgpc6);
4173 BIC_NOT_PRESENT(BIC_Pkgpc7);
4174 BIC_PRESENT(BIC_Mod_c6);
4175 use_c1_residency_msr = 1;
4176 }
4177 if (is_dnv(family, model)) {
4178 BIC_PRESENT(BIC_CPU_c1);
4179 BIC_NOT_PRESENT(BIC_CPU_c3);
4180 BIC_NOT_PRESENT(BIC_Pkgpc3);
4181 BIC_NOT_PRESENT(BIC_CPU_c7);
4182 BIC_NOT_PRESENT(BIC_Pkgpc7);
4183 use_c1_residency_msr = 1;
4184 }
4185 if (is_skx(family, model)) {
4186 BIC_NOT_PRESENT(BIC_CPU_c3);
4187 BIC_NOT_PRESENT(BIC_Pkgpc3);
4188 BIC_NOT_PRESENT(BIC_CPU_c7);
4189 BIC_NOT_PRESENT(BIC_Pkgpc7);
4190 }
4191 if (is_bdx(family, model)) {
4192 BIC_NOT_PRESENT(BIC_CPU_c7);
4193 BIC_NOT_PRESENT(BIC_Pkgpc7);
4194 }
4195 if (has_hsw_msrs(family, model)) {
4196 BIC_PRESENT(BIC_Pkgpc8);
4197 BIC_PRESENT(BIC_Pkgpc9);
4198 BIC_PRESENT(BIC_Pkgpc10);
4199 }
3504 do_irtl_hsw = has_hsw_msrs(family, model); 4200 do_irtl_hsw = has_hsw_msrs(family, model);
3505 do_skl_residency = has_skl_msrs(family, model); 4201 do_skl_residency = has_skl_msrs(family, model);
3506 do_slm_cstates = is_slm(family, model); 4202 do_slm_cstates = is_slm(family, model);
3507 do_knl_cstates = is_knl(family, model); 4203 do_knl_cstates = is_knl(family, model);
3508 4204
3509 if (debug) 4205 if (!quiet)
3510 decode_misc_pwr_mgmt_msr(); 4206 decode_misc_pwr_mgmt_msr();
3511 4207
4208 if (!quiet && has_slv_msrs(family, model))
4209 decode_c6_demotion_policy_msr();
4210
3512 rapl_probe(family, model); 4211 rapl_probe(family, model);
3513 perf_limit_reasons_probe(family, model); 4212 perf_limit_reasons_probe(family, model);
3514 4213
3515 if (debug) 4214 if (!quiet)
3516 dump_cstate_pstate_config_info(family, model); 4215 dump_cstate_pstate_config_info(family, model);
3517 4216
4217 if (!quiet)
4218 dump_sysfs_cstate_config();
4219 if (!quiet)
4220 dump_sysfs_pstate_config();
4221
3518 if (has_skl_msrs(family, model)) 4222 if (has_skl_msrs(family, model))
3519 calculate_tsc_tweak(); 4223 calculate_tsc_tweak();
3520 4224
3521 do_gfx_rc6_ms = !access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK); 4225 if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
4226 BIC_PRESENT(BIC_GFX_rc6);
3522 4227
3523 do_gfx_mhz = !access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK); 4228 if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
4229 BIC_PRESENT(BIC_GFXMHz);
3524 4230
3525 return; 4231 if (!quiet)
3526} 4232 decode_misc_feature_control();
3527 4233
3528void help() 4234 return;
3529{
3530 fprintf(outf,
3531 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
3532 "\n"
3533 "Turbostat forks the specified COMMAND and prints statistics\n"
3534 "when COMMAND completes.\n"
3535 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
3536 "to print statistics, until interrupted.\n"
3537 "--add add a counter\n"
3538 " eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
3539 "--debug run in \"debug\" mode\n"
3540 "--interval sec Override default 5-second measurement interval\n"
3541 "--help print this help message\n"
3542 "--out file create or truncate \"file\" for all output\n"
3543 "--version print version information\n"
3544 "\n"
3545 "For more help, run \"man turbostat\"\n");
3546} 4235}
3547 4236
3548 4237
@@ -3579,7 +4268,7 @@ void topology_probe()
3579 topo.max_cpu_num = 0; 4268 topo.max_cpu_num = 0;
3580 for_all_proc_cpus(count_cpus); 4269 for_all_proc_cpus(count_cpus);
3581 if (!summary_only && topo.num_cpus > 1) 4270 if (!summary_only && topo.num_cpus > 1)
3582 show_cpu = 1; 4271 BIC_PRESENT(BIC_CPU);
3583 4272
3584 if (debug > 1) 4273 if (debug > 1)
3585 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num); 4274 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
@@ -3599,6 +4288,15 @@ void topology_probe()
3599 for_all_proc_cpus(mark_cpu_present); 4288 for_all_proc_cpus(mark_cpu_present);
3600 4289
3601 /* 4290 /*
4291 * Validate that all cpus in cpu_subset are also in cpu_present_set
4292 */
4293 for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
4294 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
4295 if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
4296 err(1, "cpu%d not present", i);
4297 }
4298
4299 /*
3602 * Allocate and initialize cpu_affinity_set 4300 * Allocate and initialize cpu_affinity_set
3603 */ 4301 */
3604 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1)); 4302 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
@@ -3639,15 +4337,15 @@ void topology_probe()
3639 if (debug > 1) 4337 if (debug > 1)
3640 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n", 4338 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
3641 max_core_id, topo.num_cores_per_pkg); 4339 max_core_id, topo.num_cores_per_pkg);
3642 if (debug && !summary_only && topo.num_cores_per_pkg > 1) 4340 if (!summary_only && topo.num_cores_per_pkg > 1)
3643 show_core = 1; 4341 BIC_PRESENT(BIC_Core);
3644 4342
3645 topo.num_packages = max_package_id + 1; 4343 topo.num_packages = max_package_id + 1;
3646 if (debug > 1) 4344 if (debug > 1)
3647 fprintf(outf, "max_package_id %d, sizing for %d packages\n", 4345 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
3648 max_package_id, topo.num_packages); 4346 max_package_id, topo.num_packages);
3649 if (debug && !summary_only && topo.num_packages > 1) 4347 if (!summary_only && topo.num_packages > 1)
3650 show_pkg = 1; 4348 BIC_PRESENT(BIC_Package);
3651 4349
3652 topo.num_threads_per_core = max_siblings; 4350 topo.num_threads_per_core = max_siblings;
3653 if (debug > 1) 4351 if (debug > 1)
@@ -3662,7 +4360,7 @@ allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data
3662 int i; 4360 int i;
3663 4361
3664 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg * 4362 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
3665 topo.num_packages, sizeof(struct thread_data) + sys.thread_counter_bytes); 4363 topo.num_packages, sizeof(struct thread_data));
3666 if (*t == NULL) 4364 if (*t == NULL)
3667 goto error; 4365 goto error;
3668 4366
@@ -3671,14 +4369,14 @@ allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data
3671 (*t)[i].cpu_id = -1; 4369 (*t)[i].cpu_id = -1;
3672 4370
3673 *c = calloc(topo.num_cores_per_pkg * topo.num_packages, 4371 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
3674 sizeof(struct core_data) + sys.core_counter_bytes); 4372 sizeof(struct core_data));
3675 if (*c == NULL) 4373 if (*c == NULL)
3676 goto error; 4374 goto error;
3677 4375
3678 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++) 4376 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
3679 (*c)[i].core_id = -1; 4377 (*c)[i].core_id = -1;
3680 4378
3681 *p = calloc(topo.num_packages, sizeof(struct pkg_data) + sys.package_counter_bytes); 4379 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
3682 if (*p == NULL) 4380 if (*p == NULL)
3683 goto error; 4381 goto error;
3684 4382
@@ -3789,24 +4487,24 @@ void turbostat_init()
3789 process_cpuid(); 4487 process_cpuid();
3790 4488
3791 4489
3792 if (debug) 4490 if (!quiet)
3793 for_all_cpus(print_hwp, ODD_COUNTERS); 4491 for_all_cpus(print_hwp, ODD_COUNTERS);
3794 4492
3795 if (debug) 4493 if (!quiet)
3796 for_all_cpus(print_epb, ODD_COUNTERS); 4494 for_all_cpus(print_epb, ODD_COUNTERS);
3797 4495
3798 if (debug) 4496 if (!quiet)
3799 for_all_cpus(print_perf_limit, ODD_COUNTERS); 4497 for_all_cpus(print_perf_limit, ODD_COUNTERS);
3800 4498
3801 if (debug) 4499 if (!quiet)
3802 for_all_cpus(print_rapl, ODD_COUNTERS); 4500 for_all_cpus(print_rapl, ODD_COUNTERS);
3803 4501
3804 for_all_cpus(set_temperature_target, ODD_COUNTERS); 4502 for_all_cpus(set_temperature_target, ODD_COUNTERS);
3805 4503
3806 if (debug) 4504 if (!quiet)
3807 for_all_cpus(print_thermal, ODD_COUNTERS); 4505 for_all_cpus(print_thermal, ODD_COUNTERS);
3808 4506
3809 if (debug && do_irtl_snb) 4507 if (!quiet && do_irtl_snb)
3810 print_irtl(); 4508 print_irtl();
3811} 4509}
3812 4510
@@ -3815,6 +4513,7 @@ int fork_it(char **argv)
3815 pid_t child_pid; 4513 pid_t child_pid;
3816 int status; 4514 int status;
3817 4515
4516 snapshot_proc_sysfs_files();
3818 status = for_all_cpus(get_counters, EVEN_COUNTERS); 4517 status = for_all_cpus(get_counters, EVEN_COUNTERS);
3819 if (status) 4518 if (status)
3820 exit(status); 4519 exit(status);
@@ -3826,6 +4525,7 @@ int fork_it(char **argv)
3826 if (!child_pid) { 4525 if (!child_pid) {
3827 /* child */ 4526 /* child */
3828 execvp(argv[0], argv); 4527 execvp(argv[0], argv);
4528 err(errno, "exec %s", argv[0]);
3829 } else { 4529 } else {
3830 4530
3831 /* parent */ 4531 /* parent */
@@ -3841,6 +4541,7 @@ int fork_it(char **argv)
3841 * n.b. fork_it() does not check for errors from for_all_cpus() 4541 * n.b. fork_it() does not check for errors from for_all_cpus()
3842 * because re-starting is problematic when forking 4542 * because re-starting is problematic when forking
3843 */ 4543 */
4544 snapshot_proc_sysfs_files();
3844 for_all_cpus(get_counters, ODD_COUNTERS); 4545 for_all_cpus(get_counters, ODD_COUNTERS);
3845 gettimeofday(&tv_odd, (struct timezone *)NULL); 4546 gettimeofday(&tv_odd, (struct timezone *)NULL);
3846 timersub(&tv_odd, &tv_even, &tv_delta); 4547 timersub(&tv_odd, &tv_even, &tv_delta);
@@ -3862,6 +4563,7 @@ int get_and_dump_counters(void)
3862{ 4563{
3863 int status; 4564 int status;
3864 4565
4566 snapshot_proc_sysfs_files();
3865 status = for_all_cpus(get_counters, ODD_COUNTERS); 4567 status = for_all_cpus(get_counters, ODD_COUNTERS);
3866 if (status) 4568 if (status)
3867 return status; 4569 return status;
@@ -3876,13 +4578,13 @@ int get_and_dump_counters(void)
3876} 4578}
3877 4579
3878void print_version() { 4580void print_version() {
3879 fprintf(outf, "turbostat version 4.16 24 Dec 2016" 4581 fprintf(outf, "turbostat version 17.02.24"
3880 " - Len Brown <lenb@kernel.org>\n"); 4582 " - Len Brown <lenb@kernel.org>\n");
3881} 4583}
3882 4584
3883int add_counter(unsigned int msr_num, char *name, unsigned int width, 4585int add_counter(unsigned int msr_num, char *path, char *name,
3884 enum counter_scope scope, enum counter_type type, 4586 unsigned int width, enum counter_scope scope,
3885 enum counter_format format) 4587 enum counter_type type, enum counter_format format, int flags)
3886{ 4588{
3887 struct msr_counter *msrp; 4589 struct msr_counter *msrp;
3888 4590
@@ -3894,31 +4596,46 @@ int add_counter(unsigned int msr_num, char *name, unsigned int width,
3894 4596
3895 msrp->msr_num = msr_num; 4597 msrp->msr_num = msr_num;
3896 strncpy(msrp->name, name, NAME_BYTES); 4598 strncpy(msrp->name, name, NAME_BYTES);
4599 if (path)
4600 strncpy(msrp->path, path, PATH_BYTES);
3897 msrp->width = width; 4601 msrp->width = width;
3898 msrp->type = type; 4602 msrp->type = type;
3899 msrp->format = format; 4603 msrp->format = format;
4604 msrp->flags = flags;
3900 4605
3901 switch (scope) { 4606 switch (scope) {
3902 4607
3903 case SCOPE_CPU: 4608 case SCOPE_CPU:
3904 sys.thread_counter_bytes += 64;
3905 msrp->next = sys.tp; 4609 msrp->next = sys.tp;
3906 sys.tp = msrp; 4610 sys.tp = msrp;
3907 sys.thread_counter_bytes += sizeof(unsigned long long); 4611 sys.added_thread_counters++;
4612 if (sys.added_thread_counters > MAX_ADDED_COUNTERS) {
4613 fprintf(stderr, "exceeded max %d added thread counters\n",
4614 MAX_ADDED_COUNTERS);
4615 exit(-1);
4616 }
3908 break; 4617 break;
3909 4618
3910 case SCOPE_CORE: 4619 case SCOPE_CORE:
3911 sys.core_counter_bytes += 64;
3912 msrp->next = sys.cp; 4620 msrp->next = sys.cp;
3913 sys.cp = msrp; 4621 sys.cp = msrp;
3914 sys.core_counter_bytes += sizeof(unsigned long long); 4622 sys.added_core_counters++;
4623 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
4624 fprintf(stderr, "exceeded max %d added core counters\n",
4625 MAX_ADDED_COUNTERS);
4626 exit(-1);
4627 }
3915 break; 4628 break;
3916 4629
3917 case SCOPE_PACKAGE: 4630 case SCOPE_PACKAGE:
3918 sys.package_counter_bytes += 64;
3919 msrp->next = sys.pp; 4631 msrp->next = sys.pp;
3920 sys.pp = msrp; 4632 sys.pp = msrp;
3921 sys.package_counter_bytes += sizeof(unsigned long long); 4633 sys.added_package_counters++;
4634 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
4635 fprintf(stderr, "exceeded max %d added package counters\n",
4636 MAX_ADDED_COUNTERS);
4637 exit(-1);
4638 }
3922 break; 4639 break;
3923 } 4640 }
3924 4641
@@ -3928,7 +4645,8 @@ int add_counter(unsigned int msr_num, char *name, unsigned int width,
3928void parse_add_command(char *add_command) 4645void parse_add_command(char *add_command)
3929{ 4646{
3930 int msr_num = 0; 4647 int msr_num = 0;
3931 char name_buffer[NAME_BYTES]; 4648 char *path = NULL;
4649 char name_buffer[NAME_BYTES] = "";
3932 int width = 64; 4650 int width = 64;
3933 int fail = 0; 4651 int fail = 0;
3934 enum counter_scope scope = SCOPE_CPU; 4652 enum counter_scope scope = SCOPE_CPU;
@@ -3943,6 +4661,11 @@ void parse_add_command(char *add_command)
3943 if (sscanf(add_command, "msr%d", &msr_num) == 1) 4661 if (sscanf(add_command, "msr%d", &msr_num) == 1)
3944 goto next; 4662 goto next;
3945 4663
4664 if (*add_command == '/') {
4665 path = add_command;
4666 goto next;
4667 }
4668
3946 if (sscanf(add_command, "u%d", &width) == 1) { 4669 if (sscanf(add_command, "u%d", &width) == 1) {
3947 if ((width == 32) || (width == 64)) 4670 if ((width == 32) || (width == 64))
3948 goto next; 4671 goto next;
@@ -3968,6 +4691,10 @@ void parse_add_command(char *add_command)
3968 type = COUNTER_SECONDS; 4691 type = COUNTER_SECONDS;
3969 goto next; 4692 goto next;
3970 } 4693 }
4694 if (!strncmp(add_command, "usec", strlen("usec"))) {
4695 type = COUNTER_USEC;
4696 goto next;
4697 }
3971 if (!strncmp(add_command, "raw", strlen("raw"))) { 4698 if (!strncmp(add_command, "raw", strlen("raw"))) {
3972 format = FORMAT_RAW; 4699 format = FORMAT_RAW;
3973 goto next; 4700 goto next;
@@ -3992,36 +4719,26 @@ void parse_add_command(char *add_command)
3992 4719
3993next: 4720next:
3994 add_command = strchr(add_command, ','); 4721 add_command = strchr(add_command, ',');
3995 if (add_command) 4722 if (add_command) {
4723 *add_command = '\0';
3996 add_command++; 4724 add_command++;
4725 }
3997 4726
3998 } 4727 }
3999 if (msr_num == 0) { 4728 if ((msr_num == 0) && (path == NULL)) {
4000 fprintf(stderr, "--add: (msrDDD | msr0xXXX) required\n"); 4729 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
4001 fail++; 4730 fail++;
4002 } 4731 }
4003 4732
4004 /* generate default column header */ 4733 /* generate default column header */
4005 if (*name_buffer == '\0') { 4734 if (*name_buffer == '\0') {
4006 if (format == FORMAT_RAW) { 4735 if (width == 32)
4007 if (width == 32) 4736 sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
4008 sprintf(name_buffer, "msr%d", msr_num); 4737 else
4009 else 4738 sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
4010 sprintf(name_buffer, "MSR%d", msr_num);
4011 } else if (format == FORMAT_DELTA) {
4012 if (width == 32)
4013 sprintf(name_buffer, "cnt%d", msr_num);
4014 else
4015 sprintf(name_buffer, "CNT%d", msr_num);
4016 } else if (format == FORMAT_PERCENT) {
4017 if (width == 32)
4018 sprintf(name_buffer, "msr%d%%", msr_num);
4019 else
4020 sprintf(name_buffer, "MSR%d%%", msr_num);
4021 }
4022 } 4739 }
4023 4740
4024 if (add_counter(msr_num, name_buffer, width, scope, type, format)) 4741 if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
4025 fail++; 4742 fail++;
4026 4743
4027 if (fail) { 4744 if (fail) {
@@ -4029,20 +4746,214 @@ next:
4029 exit(1); 4746 exit(1);
4030 } 4747 }
4031} 4748}
4749
4750int is_deferred_skip(char *name)
4751{
4752 int i;
4753
4754 for (i = 0; i < deferred_skip_index; ++i)
4755 if (!strcmp(name, deferred_skip_names[i]))
4756 return 1;
4757 return 0;
4758}
4759
4760void probe_sysfs(void)
4761{
4762 char path[64];
4763 char name_buf[16];
4764 FILE *input;
4765 int state;
4766 char *sp;
4767
4768 if (!DO_BIC(BIC_sysfs))
4769 return;
4770
4771 for (state = 10; state > 0; --state) {
4772
4773 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
4774 base_cpu, state);
4775 input = fopen(path, "r");
4776 if (input == NULL)
4777 continue;
4778 fgets(name_buf, sizeof(name_buf), input);
4779
4780 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
4781 sp = strchr(name_buf, '-');
4782 if (!sp)
4783 sp = strchrnul(name_buf, '\n');
4784 *sp = '%';
4785 *(sp + 1) = '\0';
4786
4787 fclose(input);
4788
4789 sprintf(path, "cpuidle/state%d/time", state);
4790
4791 if (is_deferred_skip(name_buf))
4792 continue;
4793
4794 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
4795 FORMAT_PERCENT, SYSFS_PERCPU);
4796 }
4797
4798 for (state = 10; state > 0; --state) {
4799
4800 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
4801 base_cpu, state);
4802 input = fopen(path, "r");
4803 if (input == NULL)
4804 continue;
4805 fgets(name_buf, sizeof(name_buf), input);
4806 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
4807 sp = strchr(name_buf, '-');
4808 if (!sp)
4809 sp = strchrnul(name_buf, '\n');
4810 *sp = '\0';
4811 fclose(input);
4812
4813 sprintf(path, "cpuidle/state%d/usage", state);
4814
4815 if (is_deferred_skip(name_buf))
4816 continue;
4817
4818 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
4819 FORMAT_DELTA, SYSFS_PERCPU);
4820 }
4821
4822}
4823
4824
4825/*
4826 * parse cpuset with following syntax
4827 * 1,2,4..6,8-10 and set bits in cpu_subset
4828 */
4829void parse_cpu_command(char *optarg)
4830{
4831 unsigned int start, end;
4832 char *next;
4833
4834 if (!strcmp(optarg, "core")) {
4835 if (cpu_subset)
4836 goto error;
4837 show_core_only++;
4838 return;
4839 }
4840 if (!strcmp(optarg, "package")) {
4841 if (cpu_subset)
4842 goto error;
4843 show_pkg_only++;
4844 return;
4845 }
4846 if (show_core_only || show_pkg_only)
4847 goto error;
4848
4849 cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
4850 if (cpu_subset == NULL)
4851 err(3, "CPU_ALLOC");
4852 cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
4853
4854 CPU_ZERO_S(cpu_subset_size, cpu_subset);
4855
4856 next = optarg;
4857
4858 while (next && *next) {
4859
4860 if (*next == '-') /* no negative cpu numbers */
4861 goto error;
4862
4863 start = strtoul(next, &next, 10);
4864
4865 if (start >= CPU_SUBSET_MAXCPUS)
4866 goto error;
4867 CPU_SET_S(start, cpu_subset_size, cpu_subset);
4868
4869 if (*next == '\0')
4870 break;
4871
4872 if (*next == ',') {
4873 next += 1;
4874 continue;
4875 }
4876
4877 if (*next == '-') {
4878 next += 1; /* start range */
4879 } else if (*next == '.') {
4880 next += 1;
4881 if (*next == '.')
4882 next += 1; /* start range */
4883 else
4884 goto error;
4885 }
4886
4887 end = strtoul(next, &next, 10);
4888 if (end <= start)
4889 goto error;
4890
4891 while (++start <= end) {
4892 if (start >= CPU_SUBSET_MAXCPUS)
4893 goto error;
4894 CPU_SET_S(start, cpu_subset_size, cpu_subset);
4895 }
4896
4897 if (*next == ',')
4898 next += 1;
4899 else if (*next != '\0')
4900 goto error;
4901 }
4902
4903 return;
4904
4905error:
4906 fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
4907 help();
4908 exit(-1);
4909}
4910
4911int shown;
4912/*
4913 * parse_show_hide() - process cmdline to set default counter action
4914 */
4915void parse_show_hide(char *optarg, enum show_hide_mode new_mode)
4916{
4917 /*
4918 * --show: show only those specified
4919 * The 1st invocation will clear and replace the enabled mask
4920 * subsequent invocations can add to it.
4921 */
4922 if (new_mode == SHOW_LIST) {
4923 if (shown == 0)
4924 bic_enabled = bic_lookup(optarg, new_mode);
4925 else
4926 bic_enabled |= bic_lookup(optarg, new_mode);
4927 shown = 1;
4928
4929 return;
4930 }
4931
4932 /*
4933 * --hide: do not show those specified
4934 * multiple invocations simply clear more bits in enabled mask
4935 */
4936 bic_enabled &= ~bic_lookup(optarg, new_mode);
4937
4938}
4939
4032void cmdline(int argc, char **argv) 4940void cmdline(int argc, char **argv)
4033{ 4941{
4034 int opt; 4942 int opt;
4035 int option_index = 0; 4943 int option_index = 0;
4036 static struct option long_options[] = { 4944 static struct option long_options[] = {
4037 {"add", required_argument, 0, 'a'}, 4945 {"add", required_argument, 0, 'a'},
4946 {"cpu", required_argument, 0, 'c'},
4038 {"Dump", no_argument, 0, 'D'}, 4947 {"Dump", no_argument, 0, 'D'},
4039 {"debug", no_argument, 0, 'd'}, 4948 {"debug", no_argument, 0, 'd'}, /* internal, not documented */
4040 {"interval", required_argument, 0, 'i'}, 4949 {"interval", required_argument, 0, 'i'},
4041 {"help", no_argument, 0, 'h'}, 4950 {"help", no_argument, 0, 'h'},
4951 {"hide", required_argument, 0, 'H'}, // meh, -h taken by --help
4042 {"Joules", no_argument, 0, 'J'}, 4952 {"Joules", no_argument, 0, 'J'},
4953 {"list", no_argument, 0, 'l'},
4043 {"out", required_argument, 0, 'o'}, 4954 {"out", required_argument, 0, 'o'},
4044 {"Package", no_argument, 0, 'p'}, 4955 {"quiet", no_argument, 0, 'q'},
4045 {"processor", no_argument, 0, 'p'}, 4956 {"show", required_argument, 0, 's'},
4046 {"Summary", no_argument, 0, 'S'}, 4957 {"Summary", no_argument, 0, 'S'},
4047 {"TCC", required_argument, 0, 'T'}, 4958 {"TCC", required_argument, 0, 'T'},
4048 {"version", no_argument, 0, 'v' }, 4959 {"version", no_argument, 0, 'v' },
@@ -4051,18 +4962,24 @@ void cmdline(int argc, char **argv)
4051 4962
4052 progname = argv[0]; 4963 progname = argv[0];
4053 4964
4054 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:o:PpST:v", 4965 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:o:qST:v",
4055 long_options, &option_index)) != -1) { 4966 long_options, &option_index)) != -1) {
4056 switch (opt) { 4967 switch (opt) {
4057 case 'a': 4968 case 'a':
4058 parse_add_command(optarg); 4969 parse_add_command(optarg);
4059 break; 4970 break;
4971 case 'c':
4972 parse_cpu_command(optarg);
4973 break;
4060 case 'D': 4974 case 'D':
4061 dump_only++; 4975 dump_only++;
4062 break; 4976 break;
4063 case 'd': 4977 case 'd':
4064 debug++; 4978 debug++;
4065 break; 4979 break;
4980 case 'H':
4981 parse_show_hide(optarg, HIDE_LIST);
4982 break;
4066 case 'h': 4983 case 'h':
4067 default: 4984 default:
4068 help(); 4985 help();
@@ -4084,14 +5001,18 @@ void cmdline(int argc, char **argv)
4084 case 'J': 5001 case 'J':
4085 rapl_joules++; 5002 rapl_joules++;
4086 break; 5003 break;
5004 case 'l':
5005 list_header_only++;
5006 quiet++;
5007 break;
4087 case 'o': 5008 case 'o':
4088 outf = fopen_or_die(optarg, "w"); 5009 outf = fopen_or_die(optarg, "w");
4089 break; 5010 break;
4090 case 'P': 5011 case 'q':
4091 show_pkg_only++; 5012 quiet = 1;
4092 break; 5013 break;
4093 case 'p': 5014 case 's':
4094 show_core_only++; 5015 parse_show_hide(optarg, SHOW_LIST);
4095 break; 5016 break;
4096 case 'S': 5017 case 'S':
4097 summary_only++; 5018 summary_only++;
@@ -4113,15 +5034,24 @@ int main(int argc, char **argv)
4113 5034
4114 cmdline(argc, argv); 5035 cmdline(argc, argv);
4115 5036
4116 if (debug) 5037 if (!quiet)
4117 print_version(); 5038 print_version();
4118 5039
5040 probe_sysfs();
5041
4119 turbostat_init(); 5042 turbostat_init();
4120 5043
4121 /* dump counters and exit */ 5044 /* dump counters and exit */
4122 if (dump_only) 5045 if (dump_only)
4123 return get_and_dump_counters(); 5046 return get_and_dump_counters();
4124 5047
5048 /* list header and exit */
5049 if (list_header_only) {
5050 print_header(",");
5051 flush_output_stdout();
5052 return 0;
5053 }
5054
4125 /* 5055 /*
4126 * if any params left, it must be a command to fork 5056 * if any params left, it must be a command to fork
4127 */ 5057 */
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-31 04:45:00 -0500