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-rw-r--r--arch/arm/mach-omap2/powerdomains7xx_data.c65
1 files changed, 0 insertions, 65 deletions
diff --git a/arch/arm/mach-omap2/powerdomains7xx_data.c b/arch/arm/mach-omap2/powerdomains7xx_data.c
index 88107b449710..eb350a673133 100644
--- a/arch/arm/mach-omap2/powerdomains7xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains7xx_data.c
@@ -37,12 +37,6 @@ static struct powerdomain iva_7xx_pwrdm = {
37 .prcm_partition = DRA7XX_PRM_PARTITION, 37 .prcm_partition = DRA7XX_PRM_PARTITION,
38 .pwrsts = PWRSTS_OFF_ON, 38 .pwrsts = PWRSTS_OFF_ON,
39 .banks = 4, 39 .banks = 4,
40 .pwrsts_mem_ret = {
41 [0] = PWRSTS_OFF_RET, /* hwa_mem */
42 [1] = PWRSTS_OFF_RET, /* sl2_mem */
43 [2] = PWRSTS_OFF_RET, /* tcm1_mem */
44 [3] = PWRSTS_OFF_RET, /* tcm2_mem */
45 },
46 .pwrsts_mem_on = { 40 .pwrsts_mem_on = {
47 [0] = PWRSTS_ON, /* hwa_mem */ 41 [0] = PWRSTS_ON, /* hwa_mem */
48 [1] = PWRSTS_ON, /* sl2_mem */ 42 [1] = PWRSTS_ON, /* sl2_mem */
@@ -76,10 +70,6 @@ static struct powerdomain ipu_7xx_pwrdm = {
76 .prcm_partition = DRA7XX_PRM_PARTITION, 70 .prcm_partition = DRA7XX_PRM_PARTITION,
77 .pwrsts = PWRSTS_OFF_ON, 71 .pwrsts = PWRSTS_OFF_ON,
78 .banks = 2, 72 .banks = 2,
79 .pwrsts_mem_ret = {
80 [0] = PWRSTS_OFF_RET, /* aessmem */
81 [1] = PWRSTS_OFF_RET, /* periphmem */
82 },
83 .pwrsts_mem_on = { 73 .pwrsts_mem_on = {
84 [0] = PWRSTS_ON, /* aessmem */ 74 [0] = PWRSTS_ON, /* aessmem */
85 [1] = PWRSTS_ON, /* periphmem */ 75 [1] = PWRSTS_ON, /* periphmem */
@@ -94,9 +84,6 @@ static struct powerdomain dss_7xx_pwrdm = {
94 .prcm_partition = DRA7XX_PRM_PARTITION, 84 .prcm_partition = DRA7XX_PRM_PARTITION,
95 .pwrsts = PWRSTS_OFF_ON, 85 .pwrsts = PWRSTS_OFF_ON,
96 .banks = 1, 86 .banks = 1,
97 .pwrsts_mem_ret = {
98 [0] = PWRSTS_OFF_RET, /* dss_mem */
99 },
100 .pwrsts_mem_on = { 87 .pwrsts_mem_on = {
101 [0] = PWRSTS_ON, /* dss_mem */ 88 [0] = PWRSTS_ON, /* dss_mem */
102 }, 89 },
@@ -110,10 +97,6 @@ static struct powerdomain l4per_7xx_pwrdm = {
110 .prcm_partition = DRA7XX_PRM_PARTITION, 97 .prcm_partition = DRA7XX_PRM_PARTITION,
111 .pwrsts = PWRSTS_ON, 98 .pwrsts = PWRSTS_ON,
112 .banks = 2, 99 .banks = 2,
113 .pwrsts_mem_ret = {
114 [0] = PWRSTS_OFF_RET, /* nonretained_bank */
115 [1] = PWRSTS_OFF_RET, /* retained_bank */
116 },
117 .pwrsts_mem_on = { 100 .pwrsts_mem_on = {
118 [0] = PWRSTS_ON, /* nonretained_bank */ 101 [0] = PWRSTS_ON, /* nonretained_bank */
119 [1] = PWRSTS_ON, /* retained_bank */ 102 [1] = PWRSTS_ON, /* retained_bank */
@@ -128,9 +111,6 @@ static struct powerdomain gpu_7xx_pwrdm = {
128 .prcm_partition = DRA7XX_PRM_PARTITION, 111 .prcm_partition = DRA7XX_PRM_PARTITION,
129 .pwrsts = PWRSTS_OFF_ON, 112 .pwrsts = PWRSTS_OFF_ON,
130 .banks = 1, 113 .banks = 1,
131 .pwrsts_mem_ret = {
132 [0] = PWRSTS_OFF_RET, /* gpu_mem */
133 },
134 .pwrsts_mem_on = { 114 .pwrsts_mem_on = {
135 [0] = PWRSTS_ON, /* gpu_mem */ 115 [0] = PWRSTS_ON, /* gpu_mem */
136 }, 116 },
@@ -144,8 +124,6 @@ static struct powerdomain wkupaon_7xx_pwrdm = {
144 .prcm_partition = DRA7XX_PRM_PARTITION, 124 .prcm_partition = DRA7XX_PRM_PARTITION,
145 .pwrsts = PWRSTS_ON, 125 .pwrsts = PWRSTS_ON,
146 .banks = 1, 126 .banks = 1,
147 .pwrsts_mem_ret = {
148 },
149 .pwrsts_mem_on = { 127 .pwrsts_mem_on = {
150 [0] = PWRSTS_ON, /* wkup_bank */ 128 [0] = PWRSTS_ON, /* wkup_bank */
151 }, 129 },
@@ -158,13 +136,6 @@ static struct powerdomain core_7xx_pwrdm = {
158 .prcm_partition = DRA7XX_PRM_PARTITION, 136 .prcm_partition = DRA7XX_PRM_PARTITION,
159 .pwrsts = PWRSTS_ON, 137 .pwrsts = PWRSTS_ON,
160 .banks = 5, 138 .banks = 5,
161 .pwrsts_mem_ret = {
162 [0] = PWRSTS_OFF_RET, /* core_nret_bank */
163 [1] = PWRSTS_OFF_RET, /* core_ocmram */
164 [2] = PWRSTS_OFF_RET, /* core_other_bank */
165 [3] = PWRSTS_OFF_RET, /* ipu_l2ram */
166 [4] = PWRSTS_OFF_RET, /* ipu_unicache */
167 },
168 .pwrsts_mem_on = { 139 .pwrsts_mem_on = {
169 [0] = PWRSTS_ON, /* core_nret_bank */ 140 [0] = PWRSTS_ON, /* core_nret_bank */
170 [1] = PWRSTS_ON, /* core_ocmram */ 141 [1] = PWRSTS_ON, /* core_ocmram */
@@ -222,9 +193,6 @@ static struct powerdomain vpe_7xx_pwrdm = {
222 .prcm_partition = DRA7XX_PRM_PARTITION, 193 .prcm_partition = DRA7XX_PRM_PARTITION,
223 .pwrsts = PWRSTS_OFF_ON, 194 .pwrsts = PWRSTS_OFF_ON,
224 .banks = 1, 195 .banks = 1,
225 .pwrsts_mem_ret = {
226 [0] = PWRSTS_OFF_RET, /* vpe_bank */
227 },
228 .pwrsts_mem_on = { 196 .pwrsts_mem_on = {
229 [0] = PWRSTS_ON, /* vpe_bank */ 197 [0] = PWRSTS_ON, /* vpe_bank */
230 }, 198 },
@@ -256,11 +224,6 @@ static struct powerdomain l3init_7xx_pwrdm = {
256 .prcm_partition = DRA7XX_PRM_PARTITION, 224 .prcm_partition = DRA7XX_PRM_PARTITION,
257 .pwrsts = PWRSTS_ON, 225 .pwrsts = PWRSTS_ON,
258 .banks = 3, 226 .banks = 3,
259 .pwrsts_mem_ret = {
260 [0] = PWRSTS_OFF_RET, /* gmac_bank */
261 [1] = PWRSTS_OFF_RET, /* l3init_bank1 */
262 [2] = PWRSTS_OFF_RET, /* l3init_bank2 */
263 },
264 .pwrsts_mem_on = { 227 .pwrsts_mem_on = {
265 [0] = PWRSTS_ON, /* gmac_bank */ 228 [0] = PWRSTS_ON, /* gmac_bank */
266 [1] = PWRSTS_ON, /* l3init_bank1 */ 229 [1] = PWRSTS_ON, /* l3init_bank1 */
@@ -276,9 +239,6 @@ static struct powerdomain eve3_7xx_pwrdm = {
276 .prcm_partition = DRA7XX_PRM_PARTITION, 239 .prcm_partition = DRA7XX_PRM_PARTITION,
277 .pwrsts = PWRSTS_OFF_ON, 240 .pwrsts = PWRSTS_OFF_ON,
278 .banks = 1, 241 .banks = 1,
279 .pwrsts_mem_ret = {
280 [0] = PWRSTS_OFF_RET, /* eve3_bank */
281 },
282 .pwrsts_mem_on = { 242 .pwrsts_mem_on = {
283 [0] = PWRSTS_ON, /* eve3_bank */ 243 [0] = PWRSTS_ON, /* eve3_bank */
284 }, 244 },
@@ -292,9 +252,6 @@ static struct powerdomain emu_7xx_pwrdm = {
292 .prcm_partition = DRA7XX_PRM_PARTITION, 252 .prcm_partition = DRA7XX_PRM_PARTITION,
293 .pwrsts = PWRSTS_OFF_ON, 253 .pwrsts = PWRSTS_OFF_ON,
294 .banks = 1, 254 .banks = 1,
295 .pwrsts_mem_ret = {
296 [0] = PWRSTS_OFF_RET, /* emu_bank */
297 },
298 .pwrsts_mem_on = { 255 .pwrsts_mem_on = {
299 [0] = PWRSTS_ON, /* emu_bank */ 256 [0] = PWRSTS_ON, /* emu_bank */
300 }, 257 },
@@ -307,11 +264,6 @@ static struct powerdomain dsp2_7xx_pwrdm = {
307 .prcm_partition = DRA7XX_PRM_PARTITION, 264 .prcm_partition = DRA7XX_PRM_PARTITION,
308 .pwrsts = PWRSTS_OFF_ON, 265 .pwrsts = PWRSTS_OFF_ON,
309 .banks = 3, 266 .banks = 3,
310 .pwrsts_mem_ret = {
311 [0] = PWRSTS_OFF_RET, /* dsp2_edma */
312 [1] = PWRSTS_OFF_RET, /* dsp2_l1 */
313 [2] = PWRSTS_OFF_RET, /* dsp2_l2 */
314 },
315 .pwrsts_mem_on = { 267 .pwrsts_mem_on = {
316 [0] = PWRSTS_ON, /* dsp2_edma */ 268 [0] = PWRSTS_ON, /* dsp2_edma */
317 [1] = PWRSTS_ON, /* dsp2_l1 */ 269 [1] = PWRSTS_ON, /* dsp2_l1 */
@@ -327,11 +279,6 @@ static struct powerdomain dsp1_7xx_pwrdm = {
327 .prcm_partition = DRA7XX_PRM_PARTITION, 279 .prcm_partition = DRA7XX_PRM_PARTITION,
328 .pwrsts = PWRSTS_OFF_ON, 280 .pwrsts = PWRSTS_OFF_ON,
329 .banks = 3, 281 .banks = 3,
330 .pwrsts_mem_ret = {
331 [0] = PWRSTS_OFF_RET, /* dsp1_edma */
332 [1] = PWRSTS_OFF_RET, /* dsp1_l1 */
333 [2] = PWRSTS_OFF_RET, /* dsp1_l2 */
334 },
335 .pwrsts_mem_on = { 282 .pwrsts_mem_on = {
336 [0] = PWRSTS_ON, /* dsp1_edma */ 283 [0] = PWRSTS_ON, /* dsp1_edma */
337 [1] = PWRSTS_ON, /* dsp1_l1 */ 284 [1] = PWRSTS_ON, /* dsp1_l1 */
@@ -347,9 +294,6 @@ static struct powerdomain cam_7xx_pwrdm = {
347 .prcm_partition = DRA7XX_PRM_PARTITION, 294 .prcm_partition = DRA7XX_PRM_PARTITION,
348 .pwrsts = PWRSTS_OFF_ON, 295 .pwrsts = PWRSTS_OFF_ON,
349 .banks = 1, 296 .banks = 1,
350 .pwrsts_mem_ret = {
351 [0] = PWRSTS_OFF_RET, /* vip_bank */
352 },
353 .pwrsts_mem_on = { 297 .pwrsts_mem_on = {
354 [0] = PWRSTS_ON, /* vip_bank */ 298 [0] = PWRSTS_ON, /* vip_bank */
355 }, 299 },
@@ -363,9 +307,6 @@ static struct powerdomain eve4_7xx_pwrdm = {
363 .prcm_partition = DRA7XX_PRM_PARTITION, 307 .prcm_partition = DRA7XX_PRM_PARTITION,
364 .pwrsts = PWRSTS_OFF_ON, 308 .pwrsts = PWRSTS_OFF_ON,
365 .banks = 1, 309 .banks = 1,
366 .pwrsts_mem_ret = {
367 [0] = PWRSTS_OFF_RET, /* eve4_bank */
368 },
369 .pwrsts_mem_on = { 310 .pwrsts_mem_on = {
370 [0] = PWRSTS_ON, /* eve4_bank */ 311 [0] = PWRSTS_ON, /* eve4_bank */
371 }, 312 },
@@ -379,9 +320,6 @@ static struct powerdomain eve2_7xx_pwrdm = {
379 .prcm_partition = DRA7XX_PRM_PARTITION, 320 .prcm_partition = DRA7XX_PRM_PARTITION,
380 .pwrsts = PWRSTS_OFF_ON, 321 .pwrsts = PWRSTS_OFF_ON,
381 .banks = 1, 322 .banks = 1,
382 .pwrsts_mem_ret = {
383 [0] = PWRSTS_OFF_RET, /* eve2_bank */
384 },
385 .pwrsts_mem_on = { 323 .pwrsts_mem_on = {
386 [0] = PWRSTS_ON, /* eve2_bank */ 324 [0] = PWRSTS_ON, /* eve2_bank */
387 }, 325 },
@@ -395,9 +333,6 @@ static struct powerdomain eve1_7xx_pwrdm = {
395 .prcm_partition = DRA7XX_PRM_PARTITION, 333 .prcm_partition = DRA7XX_PRM_PARTITION,
396 .pwrsts = PWRSTS_OFF_ON, 334 .pwrsts = PWRSTS_OFF_ON,
397 .banks = 1, 335 .banks = 1,
398 .pwrsts_mem_ret = {
399 [0] = PWRSTS_OFF_RET, /* eve1_bank */
400 },
401 .pwrsts_mem_on = { 336 .pwrsts_mem_on = {
402 [0] = PWRSTS_ON, /* eve1_bank */ 337 [0] = PWRSTS_ON, /* eve1_bank */
403 }, 338 },
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-01 01:07:05 -0400