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-rw-r--r--arch/x86/events/intel/core.c4
-rw-r--r--arch/x86/events/perf_event.h4
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 35102ecdfc8d..8baa441d8000 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3410,7 +3410,7 @@ tfa_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
3410 /* 3410 /*
3411 * Without TFA we must not use PMC3. 3411 * Without TFA we must not use PMC3.
3412 */ 3412 */
3413 if (!allow_tsx_force_abort && test_bit(3, c->idxmsk)) { 3413 if (!allow_tsx_force_abort && test_bit(3, c->idxmsk) && idx >= 0) {
3414 c = dyn_constraint(cpuc, c, idx); 3414 c = dyn_constraint(cpuc, c, idx);
3415 c->idxmsk64 &= ~(1ULL << 3); 3415 c->idxmsk64 &= ~(1ULL << 3);
3416 c->weight--; 3416 c->weight--;
@@ -4179,7 +4179,7 @@ static struct attribute *intel_pmu_caps_attrs[] = {
4179 NULL 4179 NULL
4180}; 4180};
4181 4181
4182DEVICE_BOOL_ATTR(allow_tsx_force_abort, 0644, allow_tsx_force_abort); 4182static DEVICE_BOOL_ATTR(allow_tsx_force_abort, 0644, allow_tsx_force_abort);
4183 4183
4184static struct attribute *intel_pmu_attrs[] = { 4184static struct attribute *intel_pmu_attrs[] = {
4185 &dev_attr_freeze_on_smi.attr, 4185 &dev_attr_freeze_on_smi.attr,
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index b04ae6c8775e..a75955741c50 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -1033,12 +1033,12 @@ static inline int intel_pmu_init(void)
1033 return 0; 1033 return 0;
1034} 1034}
1035 1035
1036static inline int intel_cpuc_prepare(struct cpu_hw_event *cpuc, int cpu) 1036static inline int intel_cpuc_prepare(struct cpu_hw_events *cpuc, int cpu)
1037{ 1037{
1038 return 0; 1038 return 0;
1039} 1039}
1040 1040
1041static inline void intel_cpuc_finish(struct cpu_hw_event *cpuc) 1041static inline void intel_cpuc_finish(struct cpu_hw_events *cpuc)
1042{ 1042{
1043} 1043}
1044 1044