diff options
-rw-r--r-- | drivers/pci/dwc/pcie-qcom.c | 52 |
1 files changed, 15 insertions, 37 deletions
diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c index a7c12f737690..ed4e75472831 100644 --- a/drivers/pci/dwc/pcie-qcom.c +++ b/drivers/pci/dwc/pcie-qcom.c | |||
@@ -79,6 +79,7 @@ | |||
79 | #define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358 | 79 | #define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358 |
80 | #define SLV_ADDR_SPACE_SZ 0x10000000 | 80 | #define SLV_ADDR_SPACE_SZ 0x10000000 |
81 | 81 | ||
82 | #define QCOM_PCIE_2_1_0_MAX_SUPPLY 3 | ||
82 | struct qcom_pcie_resources_2_1_0 { | 83 | struct qcom_pcie_resources_2_1_0 { |
83 | struct clk *iface_clk; | 84 | struct clk *iface_clk; |
84 | struct clk *core_clk; | 85 | struct clk *core_clk; |
@@ -88,9 +89,7 @@ struct qcom_pcie_resources_2_1_0 { | |||
88 | struct reset_control *ahb_reset; | 89 | struct reset_control *ahb_reset; |
89 | struct reset_control *por_reset; | 90 | struct reset_control *por_reset; |
90 | struct reset_control *phy_reset; | 91 | struct reset_control *phy_reset; |
91 | struct regulator *vdda; | 92 | struct regulator_bulk_data supplies[QCOM_PCIE_2_1_0_MAX_SUPPLY]; |
92 | struct regulator *vdda_phy; | ||
93 | struct regulator *vdda_refclk; | ||
94 | }; | 93 | }; |
95 | 94 | ||
96 | struct qcom_pcie_resources_1_0_0 { | 95 | struct qcom_pcie_resources_1_0_0 { |
@@ -218,18 +217,15 @@ static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie) | |||
218 | struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; | 217 | struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; |
219 | struct dw_pcie *pci = pcie->pci; | 218 | struct dw_pcie *pci = pcie->pci; |
220 | struct device *dev = pci->dev; | 219 | struct device *dev = pci->dev; |
220 | int ret; | ||
221 | 221 | ||
222 | res->vdda = devm_regulator_get(dev, "vdda"); | 222 | res->supplies[0].supply = "vdda"; |
223 | if (IS_ERR(res->vdda)) | 223 | res->supplies[1].supply = "vdda_phy"; |
224 | return PTR_ERR(res->vdda); | 224 | res->supplies[2].supply = "vdda_refclk"; |
225 | 225 | ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(res->supplies), | |
226 | res->vdda_phy = devm_regulator_get(dev, "vdda_phy"); | 226 | res->supplies); |
227 | if (IS_ERR(res->vdda_phy)) | 227 | if (ret) |
228 | return PTR_ERR(res->vdda_phy); | 228 | return ret; |
229 | |||
230 | res->vdda_refclk = devm_regulator_get(dev, "vdda_refclk"); | ||
231 | if (IS_ERR(res->vdda_refclk)) | ||
232 | return PTR_ERR(res->vdda_refclk); | ||
233 | 229 | ||
234 | res->iface_clk = devm_clk_get(dev, "iface"); | 230 | res->iface_clk = devm_clk_get(dev, "iface"); |
235 | if (IS_ERR(res->iface_clk)) | 231 | if (IS_ERR(res->iface_clk)) |
@@ -275,9 +271,7 @@ static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie) | |||
275 | clk_disable_unprepare(res->iface_clk); | 271 | clk_disable_unprepare(res->iface_clk); |
276 | clk_disable_unprepare(res->core_clk); | 272 | clk_disable_unprepare(res->core_clk); |
277 | clk_disable_unprepare(res->phy_clk); | 273 | clk_disable_unprepare(res->phy_clk); |
278 | regulator_disable(res->vdda); | 274 | regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); |
279 | regulator_disable(res->vdda_phy); | ||
280 | regulator_disable(res->vdda_refclk); | ||
281 | } | 275 | } |
282 | 276 | ||
283 | static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) | 277 | static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) |
@@ -288,24 +282,12 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) | |||
288 | u32 val; | 282 | u32 val; |
289 | int ret; | 283 | int ret; |
290 | 284 | ||
291 | ret = regulator_enable(res->vdda); | 285 | ret = regulator_bulk_enable(ARRAY_SIZE(res->supplies), res->supplies); |
292 | if (ret) { | 286 | if (ret < 0) { |
293 | dev_err(dev, "cannot enable vdda regulator\n"); | 287 | dev_err(dev, "cannot enable regulators\n"); |
294 | return ret; | 288 | return ret; |
295 | } | 289 | } |
296 | 290 | ||
297 | ret = regulator_enable(res->vdda_refclk); | ||
298 | if (ret) { | ||
299 | dev_err(dev, "cannot enable vdda_refclk regulator\n"); | ||
300 | goto err_refclk; | ||
301 | } | ||
302 | |||
303 | ret = regulator_enable(res->vdda_phy); | ||
304 | if (ret) { | ||
305 | dev_err(dev, "cannot enable vdda_phy regulator\n"); | ||
306 | goto err_vdda_phy; | ||
307 | } | ||
308 | |||
309 | ret = reset_control_assert(res->ahb_reset); | 291 | ret = reset_control_assert(res->ahb_reset); |
310 | if (ret) { | 292 | if (ret) { |
311 | dev_err(dev, "cannot assert ahb reset\n"); | 293 | dev_err(dev, "cannot assert ahb reset\n"); |
@@ -389,11 +371,7 @@ err_clk_core: | |||
389 | err_clk_phy: | 371 | err_clk_phy: |
390 | clk_disable_unprepare(res->iface_clk); | 372 | clk_disable_unprepare(res->iface_clk); |
391 | err_assert_ahb: | 373 | err_assert_ahb: |
392 | regulator_disable(res->vdda_phy); | 374 | regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); |
393 | err_vdda_phy: | ||
394 | regulator_disable(res->vdda_refclk); | ||
395 | err_refclk: | ||
396 | regulator_disable(res->vdda); | ||
397 | 375 | ||
398 | return ret; | 376 | return ret; |
399 | } | 377 | } |