8 files changed, 63 insertions, 26 deletions

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index fa9565957f9d..3d546c606b43 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -4803,7 +4803,7 @@ struct bonaire_mqd
  */
 static int cik_cp_compute_resume(struct radeon_device *rdev)
 {
-        int r, i, idx;
+        int r, i, j, idx;
         u32 tmp;
         bool use_doorbell = true;
         u64 hqd_gpu_addr;
@@ -4922,7 +4922,7 @@ static int cik_cp_compute_resume(struct radeon_device *rdev)
                 mqd->queue_state.cp_hqd_pq_wptr= 0;
                 if (RREG32(CP_HQD_ACTIVE) & 1) {
                         WREG32(CP_HQD_DEQUEUE_REQUEST, 1);
-                        for (i = 0; i < rdev->usec_timeout; i++) {
+                        for (j = 0; j < rdev->usec_timeout; j++) {
                                 if (!(RREG32(CP_HQD_ACTIVE) & 1))
                                         break;
                                 udelay(1);
@@ -7751,17 +7751,17 @@ static inline u32 cik_get_ih_wptr(struct radeon_device *rdev)
                 wptr = RREG32(IH_RB_WPTR);
 
         if (wptr & RB_OVERFLOW) {
+                wptr &= ~RB_OVERFLOW;
                 /* When a ring buffer overflow happen start parsing interrupt
                  * from the last not overwritten vector (wptr + 16). Hopefully
                  * this should allow us to catchup.
                  */
-                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                        wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                         wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                 tmp = RREG32(IH_RB_CNTL);
                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
                 WREG32(IH_RB_CNTL, tmp);
-                wptr &= ~RB_OVERFLOW;
         }
         return (wptr & rdev->ih.ptr_mask);
 }
@@ -8251,6 +8251,7 @@ restart_ih:
                 /* wptr/rptr are in bytes! */
                 rptr += 16;
                 rptr &= rdev->ih.ptr_mask;
+                WREG32(IH_RB_RPTR, rptr);
         }
         if (queue_hotplug)
                 schedule_work(&rdev->hotplug_work);
@@ -8259,7 +8260,6 @@ restart_ih:
         if (queue_thermal)
                 schedule_work(&rdev->pm.dpm.thermal.work);
         rdev->ih.rptr = rptr;
-        WREG32(IH_RB_RPTR, rdev->ih.rptr);
         atomic_set(&rdev->ih.lock, 0);
 
         /* make sure wptr hasn't changed while processing */
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index dbca60c7d097..e50807c29f69 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4749,17 +4749,17 @@ static u32 evergreen_get_ih_wptr(struct radeon_device *rdev)
                 wptr = RREG32(IH_RB_WPTR);
 
         if (wptr & RB_OVERFLOW) {
+                wptr &= ~RB_OVERFLOW;
                 /* When a ring buffer overflow happen start parsing interrupt
                  * from the last not overwritten vector (wptr + 16). Hopefully
                  * this should allow us to catchup.
                  */
-                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                        wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                         wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                 tmp = RREG32(IH_RB_CNTL);
                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
                 WREG32(IH_RB_CNTL, tmp);
-                wptr &= ~RB_OVERFLOW;
         }
         return (wptr & rdev->ih.ptr_mask);
 }
@@ -5137,6 +5137,7 @@ restart_ih:
                 /* wptr/rptr are in bytes! */
                 rptr += 16;
                 rptr &= rdev->ih.ptr_mask;
+                WREG32(IH_RB_RPTR, rptr);
         }
         if (queue_hotplug)
                 schedule_work(&rdev->hotplug_work);
@@ -5145,7 +5146,6 @@ restart_ih:
         if (queue_thermal && rdev->pm.dpm_enabled)
                 schedule_work(&rdev->pm.dpm.thermal.work);
         rdev->ih.rptr = rptr;
-        WREG32(IH_RB_RPTR, rdev->ih.rptr);
         atomic_set(&rdev->ih.lock, 0);
 
         /* make sure wptr hasn't changed while processing */
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 3cfb50056f7a..ea5c9af722ef 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3792,17 +3792,17 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev)
                 wptr = RREG32(IH_RB_WPTR);
 
         if (wptr & RB_OVERFLOW) {
+                wptr &= ~RB_OVERFLOW;
                 /* When a ring buffer overflow happen start parsing interrupt
                  * from the last not overwritten vector (wptr + 16). Hopefully
                  * this should allow us to catchup.
                  */
-                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                        wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                         wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                 tmp = RREG32(IH_RB_CNTL);
                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
                 WREG32(IH_RB_CNTL, tmp);
-                wptr &= ~RB_OVERFLOW;
         }
         return (wptr & rdev->ih.ptr_mask);
 }
@@ -4048,6 +4048,7 @@ restart_ih:
                 /* wptr/rptr are in bytes! */
                 rptr += 16;
                 rptr &= rdev->ih.ptr_mask;
+                WREG32(IH_RB_RPTR, rptr);
         }
         if (queue_hotplug)
                 schedule_work(&rdev->hotplug_work);
@@ -4056,7 +4057,6 @@ restart_ih:
         if (queue_thermal && rdev->pm.dpm_enabled)
                 schedule_work(&rdev->pm.dpm.thermal.work);
         rdev->ih.rptr = rptr;
-        WREG32(IH_RB_RPTR, rdev->ih.rptr);
         atomic_set(&rdev->ih.lock, 0);
 
         /* make sure wptr hasn't changed while processing */
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5f05b4c84338..3247bfd14410 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -106,6 +106,7 @@ extern int radeon_vm_block_size;
 extern int radeon_deep_color;
 extern int radeon_use_pflipirq;
 extern int radeon_bapm;
+extern int radeon_backlight;
 
 /*
  * Copy from radeon_drv.h so we don't have to include both and have conflicting
diff --g