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-rw-r--r--arch/arm/mach-spear3xx/include/mach/generic.h193
-rw-r--r--arch/arm/mach-spear3xx/spear300.c91
-rw-r--r--arch/arm/mach-spear3xx/spear300_evb.c26
-rw-r--r--arch/arm/mach-spear3xx/spear310.c41
-rw-r--r--arch/arm/mach-spear3xx/spear310_evb.c41
-rw-r--r--arch/arm/mach-spear3xx/spear320.c105
-rw-r--r--arch/arm/mach-spear3xx/spear320_evb.c36
-rw-r--r--arch/arm/mach-spear3xx/spear3xx.c120
8 files changed, 328 insertions, 325 deletions
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index af4cb5b8aa40..8b04f085e8a3 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -60,81 +60,80 @@ void __init spear3xx_init(void);
60#define PMX_TIMER_1_2_MASK (1 << 0) 60#define PMX_TIMER_1_2_MASK (1 << 0)
61 61
62/* pad mux devices */ 62/* pad mux devices */
63extern struct pmx_dev pmx_firda; 63extern struct pmx_dev spear3xx_pmx_firda;
64extern struct pmx_dev pmx_i2c; 64extern struct pmx_dev spear3xx_pmx_i2c;
65extern struct pmx_dev pmx_ssp_cs; 65extern struct pmx_dev spear3xx_pmx_ssp_cs;
66extern struct pmx_dev pmx_ssp; 66extern struct pmx_dev spear3xx_pmx_ssp;
67extern struct pmx_dev pmx_mii; 67extern struct pmx_dev spear3xx_pmx_mii;
68extern struct pmx_dev pmx_gpio_pin0; 68extern struct pmx_dev spear3xx_pmx_gpio_pin0;
69extern struct pmx_dev pmx_gpio_pin1; 69extern struct pmx_dev spear3xx_pmx_gpio_pin1;
70extern struct pmx_dev pmx_gpio_pin2; 70extern struct pmx_dev spear3xx_pmx_gpio_pin2;
71extern struct pmx_dev pmx_gpio_pin3; 71extern struct pmx_dev spear3xx_pmx_gpio_pin3;
72extern struct pmx_dev pmx_gpio_pin4; 72extern struct pmx_dev spear3xx_pmx_gpio_pin4;
73extern struct pmx_dev pmx_gpio_pin5; 73extern struct pmx_dev spear3xx_pmx_gpio_pin5;
74extern struct pmx_dev pmx_uart0_modem; 74extern struct pmx_dev spear3xx_pmx_uart0_modem;
75extern struct pmx_dev pmx_uart0; 75extern struct pmx_dev spear3xx_pmx_uart0;
76extern struct pmx_dev pmx_timer_3_4; 76extern struct pmx_dev spear3xx_pmx_timer_3_4;
77extern struct pmx_dev pmx_timer_1_2; 77extern struct pmx_dev spear3xx_pmx_timer_1_2;
78 78
79#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) 79#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
80/* padmux plgpio devices */ 80/* padmux plgpio devices */
81extern struct pmx_dev pmx_plgpio_0_1; 81extern struct pmx_dev spear3xx_pmx_plgpio_0_1;
82extern struct pmx_dev pmx_plgpio_2_3; 82extern struct pmx_dev spear3xx_pmx_plgpio_2_3;
83extern struct pmx_dev pmx_plgpio_4_5; 83extern struct pmx_dev spear3xx_pmx_plgpio_4_5;
84extern struct pmx_dev pmx_plgpio_6_9; 84extern struct pmx_dev spear3xx_pmx_plgpio_6_9;
85extern struct pmx_dev pmx_plgpio_10_27; 85extern struct pmx_dev spear3xx_pmx_plgpio_10_27;
86extern struct pmx_dev pmx_plgpio_28; 86extern struct pmx_dev spear3xx_pmx_plgpio_28;
87extern struct pmx_dev pmx_plgpio_29; 87extern struct pmx_dev spear3xx_pmx_plgpio_29;
88extern struct pmx_dev pmx_plgpio_30; 88extern struct pmx_dev spear3xx_pmx_plgpio_30;
89extern struct pmx_dev pmx_plgpio_31; 89extern struct pmx_dev spear3xx_pmx_plgpio_31;
90extern struct pmx_dev pmx_plgpio_32; 90extern struct pmx_dev spear3xx_pmx_plgpio_32;
91extern struct pmx_dev pmx_plgpio_33; 91extern struct pmx_dev spear3xx_pmx_plgpio_33;
92extern struct pmx_dev pmx_plgpio_34_36; 92extern struct pmx_dev spear3xx_pmx_plgpio_34_36;
93extern struct pmx_dev pmx_plgpio_37_42; 93extern struct pmx_dev spear3xx_pmx_plgpio_37_42;
94extern struct pmx_dev pmx_plgpio_43_44_47_48; 94extern struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48;
95extern struct pmx_dev pmx_plgpio_45_46_49_50; 95extern struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50;
96#endif 96#endif
97 97
98extern struct pmx_driver pmx_driver;
99
100/* spear300 declarations */ 98/* spear300 declarations */
101#ifdef CONFIG_MACH_SPEAR300 99#ifdef CONFIG_MACH_SPEAR300
102/* Add spear300 machine device structure declarations here */ 100/* Add spear300 machine device structure declarations here */
103extern struct amba_device gpio1_device; 101extern struct amba_device gpio1_device;
104 102
105/* pad mux modes */ 103/* pad mux modes */
106extern struct pmx_mode nand_mode; 104extern struct pmx_mode spear300_nand_mode;
107extern struct pmx_mode nor_mode; 105extern struct pmx_mode spear300_nor_mode;
108extern struct pmx_mode photo_frame_mode; 106extern struct pmx_mode spear300_photo_frame_mode;
109extern struct pmx_mode lend_ip_phone_mode; 107extern struct pmx_mode spear300_lend_ip_phone_mode;
110extern struct pmx_mode hend_ip_phone_mode; 108extern struct pmx_mode spear300_hend_ip_phone_mode;
111extern struct pmx_mode lend_wifi_phone_mode; 109extern struct pmx_mode spear300_lend_wifi_phone_mode;
112extern struct pmx_mode hend_wifi_phone_mode; 110extern struct pmx_mode spear300_hend_wifi_phone_mode;
113extern struct pmx_mode ata_pabx_wi2s_mode; 111extern struct pmx_mode spear300_ata_pabx_wi2s_mode;
114extern struct pmx_mode ata_pabx_i2s_mode; 112extern struct pmx_mode spear300_ata_pabx_i2s_mode;
115extern struct pmx_mode caml_lcdw_mode; 113extern struct pmx_mode spear300_caml_lcdw_mode;
116extern struct pmx_mode camu_lcd_mode; 114extern struct pmx_mode spear300_camu_lcd_mode;
117extern struct pmx_mode camu_wlcd_mode; 115extern struct pmx_mode spear300_camu_wlcd_mode;
118extern struct pmx_mode caml_lcd_mode; 116extern struct pmx_mode spear300_caml_lcd_mode;
119 117
120/* pad mux devices */ 118/* pad mux devices */
121extern struct pmx_dev pmx_fsmc_2_chips; 119extern struct pmx_dev spear300_pmx_fsmc_2_chips;
122extern struct pmx_dev pmx_fsmc_4_chips; 120extern struct pmx_dev spear300_pmx_fsmc_4_chips;
123extern struct pmx_dev pmx_keyboard; 121extern struct pmx_dev spear300_pmx_keyboard;
124extern struct pmx_dev pmx_clcd; 122extern struct pmx_dev spear300_pmx_clcd;
125extern struct pmx_dev pmx_telecom_gpio; 123extern struct pmx_dev spear300_pmx_telecom_gpio;
126extern struct pmx_dev pmx_telecom_tdm; 124extern struct pmx_dev spear300_pmx_telecom_tdm;
127extern struct pmx_dev pmx_telecom_spi_cs_i2c_clk; 125extern struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk;
128extern struct pmx_dev pmx_telecom_camera; 126extern struct pmx_dev spear300_pmx_telecom_camera;
129extern struct pmx_dev pmx_telecom_dac; 127extern struct pmx_dev spear300_pmx_telecom_dac;
130extern struct pmx_dev pmx_telecom_i2s; 128extern struct pmx_dev spear300_pmx_telecom_i2s;
131extern struct pmx_dev pmx_telecom_boot_pins; 129extern struct pmx_dev spear300_pmx_telecom_boot_pins;
132extern struct pmx_dev pmx_telecom_sdhci_4bit; 130extern struct pmx_dev spear300_pmx_telecom_sdhci_4bit;
133extern struct pmx_dev pmx_telecom_sdhci_8bit; 131extern struct pmx_dev spear300_pmx_telecom_sdhci_8bit;
134extern struct pmx_dev pmx_gpio1; 132extern struct pmx_dev spear300_pmx_gpio1;
135 133
136/* Add spear300 machine function declarations here */ 134/* Add spear300 machine function declarations here */
137void __init spear300_init(void); 135void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
136 u8 pmx_dev_count);
138 137
139#endif /* CONFIG_MACH_SPEAR300 */ 138#endif /* CONFIG_MACH_SPEAR300 */
140 139
@@ -143,17 +142,18 @@ void __init spear300_init(void);
143/* Add spear310 machine device structure declarations here */ 142/* Add spear310 machine device structure declarations here */
144 143
145/* pad mux devices */ 144/* pad mux devices */
146extern struct pmx_dev pmx_emi_cs_0_1_4_5; 145extern struct pmx_dev spear310_pmx_emi_cs_0_1_4_5;
147extern struct pmx_dev pmx_emi_cs_2_3; 146extern struct pmx_dev spear310_pmx_emi_cs_2_3;
148extern struct pmx_dev pmx_uart1; 147extern struct pmx_dev spear310_pmx_uart1;
149extern struct pmx_dev pmx_uart2; 148extern struct pmx_dev spear310_pmx_uart2;
150extern struct pmx_dev pmx_uart3_4_5; 149extern struct pmx_dev spear310_pmx_uart3_4_5;
151extern struct pmx_dev pmx_fsmc; 150extern struct pmx_dev spear310_pmx_fsmc;
152extern struct pmx_dev pmx_rs485_0_1; 151extern struct pmx_dev spear310_pmx_rs485_0_1;
153extern struct pmx_dev pmx_tdm0; 152extern struct pmx_dev spear310_pmx_tdm0;
154 153
155/* Add spear310 machine function declarations here */ 154/* Add spear310 machine function declarations here */
156void __init spear310_init(void); 155void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
156 u8 pmx_dev_count);
157 157
158#endif /* CONFIG_MACH_SPEAR310 */ 158#endif /* CONFIG_MACH_SPEAR310 */
159 159
@@ -162,37 +162,38 @@ void __init spear310_init(void);
162/* Add spear320 machine device structure declarations here */ 162/* Add spear320 machine device structure declarations here */
163 163
164/* pad mux modes */ 164/* pad mux modes */
165extern struct pmx_mode auto_net_smii_mode; 165extern struct pmx_mode spear320_auto_net_smii_mode;
166extern struct pmx_mode auto_net_mii_mode; 166extern struct pmx_mode spear320_auto_net_mii_mode;
167extern struct pmx_mode auto_exp_mode; 167extern struct pmx_mode spear320_auto_exp_mode;
168extern struct pmx_mode small_printers_mode; 168extern struct pmx_mode spear320_small_printers_mode;
169 169
170/* pad mux devices */ 170/* pad mux devices */
171extern struct pmx_dev pmx_clcd; 171extern struct pmx_dev spear320_pmx_clcd;
172extern struct pmx_dev pmx_emi; 172extern struct pmx_dev spear320_pmx_emi;
173extern struct pmx_dev pmx_fsmc; 173extern struct pmx_dev spear320_pmx_fsmc;
174extern struct pmx_dev pmx_spp; 174extern struct pmx_dev spear320_pmx_spp;
175extern struct pmx_dev pmx_sdhci; 175extern struct pmx_dev spear320_pmx_sdhci;
176extern struct pmx_dev pmx_i2s; 176extern struct pmx_dev spear320_pmx_i2s;
177extern struct pmx_dev pmx_uart1; 177extern struct pmx_dev spear320_pmx_uart1;
178extern struct pmx_dev pmx_uart1_modem; 178extern struct pmx_dev spear320_pmx_uart1_modem;
179extern struct pmx_dev pmx_uart2; 179extern struct pmx_dev spear320_pmx_uart2;
180extern struct pmx_dev pmx_touchscreen; 180extern struct pmx_dev spear320_pmx_touchscreen;
181extern struct pmx_dev pmx_can; 181extern struct pmx_dev spear320_pmx_can;
182extern struct pmx_dev pmx_sdhci_led; 182extern struct pmx_dev spear320_pmx_sdhci_led;
183extern struct pmx_dev pmx_pwm0; 183extern struct pmx_dev spear320_pmx_pwm0;
184extern struct pmx_dev pmx_pwm1; 184extern struct pmx_dev spear320_pmx_pwm1;
185extern struct pmx_dev pmx_pwm2; 185extern struct pmx_dev spear320_pmx_pwm2;
186extern struct pmx_dev pmx_pwm3; 186extern struct pmx_dev spear320_pmx_pwm3;
187extern struct pmx_dev pmx_ssp1; 187extern struct pmx_dev spear320_pmx_ssp1;
188extern struct pmx_dev pmx_ssp2; 188extern struct pmx_dev spear320_pmx_ssp2;
189extern struct pmx_dev pmx_mii1; 189extern struct pmx_dev spear320_pmx_mii1;
190extern struct pmx_dev pmx_smii0; 190extern struct pmx_dev spear320_pmx_smii0;
191extern struct pmx_dev pmx_smii1; 191extern struct pmx_dev spear320_pmx_smii1;
192extern struct pmx_dev pmx_i2c1; 192extern struct pmx_dev spear320_pmx_i2c1;
193 193
194/* Add spear320 machine function declarations here */ 194/* Add spear320 machine function declarations here */
195void __init spear320_init(void); 195void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
196 u8 pmx_dev_count);
196 197
197#endif /* CONFIG_MACH_SPEAR320 */ 198#endif /* CONFIG_MACH_SPEAR320 */
198 199
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 81a57ce67176..67349b50b18e 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -40,86 +40,86 @@
40#define CAML_LCD_MODE (1 << 12) 40#define CAML_LCD_MODE (1 << 12)
41#define ALL_MODES 0x1FFF 41#define ALL_MODES 0x1FFF
42 42
43struct pmx_mode nand_mode = { 43struct pmx_mode spear300_nand_mode = {
44 .id = NAND_MODE, 44 .id = NAND_MODE,
45 .name = "nand mode", 45 .name = "nand mode",
46 .mask = 0x00, 46 .mask = 0x00,
47}; 47};
48 48
49struct pmx_mode nor_mode = { 49struct pmx_mode spear300_nor_mode = {
50 .id = NOR_MODE, 50 .id = NOR_MODE,
51 .name = "nor mode", 51 .name = "nor mode",
52 .mask = 0x01, 52 .mask = 0x01,
53}; 53};
54 54
55struct pmx_mode photo_frame_mode = { 55struct pmx_mode spear300_photo_frame_mode = {
56 .id = PHOTO_FRAME_MODE, 56 .id = PHOTO_FRAME_MODE,
57 .name = "photo frame mode", 57 .name = "photo frame mode",
58 .mask = 0x02, 58 .mask = 0x02,
59}; 59};
60 60
61struct pmx_mode lend_ip_phone_mode = { 61struct pmx_mode spear300_lend_ip_phone_mode = {
62 .id = LEND_IP_PHONE_MODE, 62 .id = LEND_IP_PHONE_MODE,
63 .name = "lend ip phone mode", 63 .name = "lend ip phone mode",
64 .mask = 0x03, 64 .mask = 0x03,
65}; 65};
66 66
67struct pmx_mode hend_ip_phone_mode = { 67struct pmx_mode spear300_hend_ip_phone_mode = {
68 .id = HEND_IP_PHONE_MODE, 68 .id = HEND_IP_PHONE_MODE,
69 .name = "hend ip phone mode", 69 .name = "hend ip phone mode",
70 .mask = 0x04, 70 .mask = 0x04,
71}; 71};
72 72
73struct pmx_mode lend_wifi_phone_mode = { 73struct pmx_mode spear300_lend_wifi_phone_mode = {
74 .id = LEND_WIFI_PHONE_MODE, 74 .id = LEND_WIFI_PHONE_MODE,
75 .name = "lend wifi phone mode", 75 .name = "lend wifi phone mode",
76 .mask = 0x05, 76 .mask = 0x05,
77}; 77};
78 78
79struct pmx_mode hend_wifi_phone_mode = { 79struct pmx_mode spear300_hend_wifi_phone_mode = {
80 .id = HEND_WIFI_PHONE_MODE, 80 .id = HEND_WIFI_PHONE_MODE,
81 .name = "hend wifi phone mode", 81 .name = "hend wifi phone mode",
82 .mask = 0x06, 82 .mask = 0x06,
83}; 83};
84 84
85struct pmx_mode ata_pabx_wi2s_mode = { 85struct pmx_mode spear300_ata_pabx_wi2s_mode = {
86 .id = ATA_PABX_WI2S_MODE, 86 .id = ATA_PABX_WI2S_MODE,
87 .name = "ata pabx wi2s mode", 87 .name = "ata pabx wi2s mode",
88 .mask = 0x07, 88 .mask = 0x07,
89}; 89};
90 90
91struct pmx_mode ata_pabx_i2s_mode = { 91struct pmx_mode spear300_ata_pabx_i2s_mode = {
92 .id = ATA_PABX_I2S_MODE, 92 .id = ATA_PABX_I2S_MODE,
93 .name = "ata pabx i2s mode", 93 .name = "ata pabx i2s mode",
94 .mask = 0x08, 94 .mask = 0x08,
95}; 95};
96 96
97struct pmx_mode caml_lcdw_mode = { 97struct pmx_mode spear300_caml_lcdw_mode = {
98 .id = CAML_LCDW_MODE, 98 .id = CAML_LCDW_MODE,
99 .name = "caml lcdw mode", 99 .name = "caml lcdw mode",
100 .mask = 0x0C, 100 .mask = 0x0C,
101}; 101};
102 102
103struct pmx_mode camu_lcd_mode = { 103struct pmx_mode spear300_camu_lcd_mode = {
104 .id = CAMU_LCD_MODE, 104 .id = CAMU_LCD_MODE,
105 .name = "camu lcd mode", 105 .name = "camu lcd mode",
106 .mask = 0x0D, 106 .mask = 0x0D,
107}; 107};
108 108
109struct pmx_mode camu_wlcd_mode = { 109struct pmx_mode spear300_camu_wlcd_mode = {
110 .id = CAMU_WLCD_MODE, 110 .id = CAMU_WLCD_MODE,
111 .name = "camu wlcd mode", 111 .name = "camu wlcd mode",
112 .mask = 0x0E, 112 .mask = 0x0E,
113}; 113};
114 114
115struct pmx_mode caml_lcd_mode = { 115struct pmx_mode spear300_caml_lcd_mode = {
116 .id = CAML_LCD_MODE, 116 .id = CAML_LCD_MODE,
117 .name = "caml lcd mode", 117 .name = "caml lcd mode",
118 .mask = 0x0F, 118 .mask = 0x0F,
119}; 119};
120 120
121/* devices */ 121/* devices */
122struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = { 122static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
123 { 123 {
124 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE | 124 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
125 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE, 125 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
@@ -127,14 +127,14 @@ struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
127 }, 127 },
128}; 128};
129 129
130struct pmx_dev pmx_fsmc_2_chips = { 130struct pmx_dev spear300_pmx_fsmc_2_chips = {
131 .name = "fsmc_2_chips", 131 .name = "fsmc_2_chips",
132 .modes = pmx_fsmc_2_chips_modes, 132 .modes = pmx_fsmc_2_chips_modes,
133 .mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes), 133 .mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
134 .enb_on_reset = 1, 134 .enb_on_reset = 1,
135}; 135};
136 136
137struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = { 137static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
138 { 138 {
139 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE | 139 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
140 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE, 140 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
@@ -142,14 +142,14 @@ struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
142 }, 142 },
143}; 143};
144 144
145struct pmx_dev pmx_fsmc_4_chips = { 145struct pmx_dev spear300_pmx_fsmc_4_chips = {
146 .name = "fsmc_4_chips", 146 .name = "fsmc_4_chips",
147 .modes = pmx_fsmc_4_chips_modes, 147 .modes = pmx_fsmc_4_chips_modes,
148 .mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes), 148 .mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
149 .enb_on_reset = 1, 149 .enb_on_reset = 1,
150}; 150};
151 151
152struct pmx_dev_mode pmx_keyboard_modes[] = { 152static struct pmx_dev_mode pmx_keyboard_modes[] = {
153 { 153 {
154 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE | 154 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
155 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE | 155 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
@@ -159,14 +159,14 @@ struct pmx_dev_mode pmx_keyboard_modes[] = {
159 }, 159 },
160}; 160};
161 161
162struct pmx_dev pmx_keyboard = { 162struct pmx_dev spear300_pmx_keyboard = {
163 .name = "keyboard", 163 .name = "keyboard",
164 .modes = pmx_keyboard_modes, 164 .modes = pmx_keyboard_modes,
165 .mode_count = ARRAY_SIZE(pmx_keyboard_modes), 165 .mode_count = ARRAY_SIZE(pmx_keyboard_modes),
166 .enb_on_reset = 1, 166 .enb_on_reset = 1,
167}; 167};
168 168
169struct pmx_dev_mode pmx_clcd_modes[] = { 169static struct pmx_dev_mode pmx_clcd_modes[] = {
170 { 170 {
171 .ids = PHOTO_FRAME_MODE, 171 .ids = PHOTO_FRAME_MODE,
172 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK , 172 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,
@@ -177,14 +177,14 @@ struct pmx_dev_mode pmx_clcd_modes[] = {
177 }, 177 },
178}; 178};
179 179
180struct pmx_dev pmx_clcd = { 180struct pmx_dev spear300_pmx_clcd = {
181 .name = "clcd", 181 .name = "clcd",
182 .modes = pmx_clcd_modes, 182 .modes = pmx_clcd_modes,
183 .mode_count = ARRAY_SIZE(pmx_clcd_modes), 183 .mode_count = ARRAY_SIZE(pmx_clcd_modes),
184 .enb_on_reset = 1, 184 .enb_on_reset = 1,
185}; 185};
186 186
187struct pmx_dev_mode pmx_telecom_gpio_modes[] = { 187static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
188 { 188 {
189 .ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE, 189 .ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
190 .mask = PMX_MII_MASK, 190 .mask = PMX_MII_MASK,
@@ -204,14 +204,14 @@ struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
204 }, 204 },
205}; 205};
206 206
207struct pmx_dev pmx_telecom_gpio = { 207struct pmx_dev spear300_pmx_telecom_gpio = {
208 .name = "telecom_gpio", 208 .name = "telecom_gpio",
209 .modes = pmx_telecom_gpio_modes, 209 .modes = pmx_telecom_gpio_modes,
210 .mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes), 210 .mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
211 .enb_on_reset = 1, 211 .enb_on_reset = 1,
212}; 212};
213 213
214struct pmx_dev_mode pmx_telecom_tdm_modes[] = { 214static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
215 { 215 {
216 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | 216 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
217 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE 217 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
@@ -222,14 +222,14 @@ struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
222 }, 222 },
223}; 223};
224 224
225struct pmx_dev pmx_telecom_tdm = { 225struct pmx_dev spear300_pmx_telecom_tdm = {
226 .name = "telecom_tdm", 226 .name = "telecom_tdm",
227 .modes = pmx_telecom_tdm_modes, 227 .modes = pmx_telecom_tdm_modes,
228 .mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes), 228 .mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
229 .enb_on_reset = 1, 229 .enb_on_reset = 1,
230}; 230};
231 231
232struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = { 232static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
233 { 233 {
234 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE | 234 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
235 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE 235 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE
@@ -239,14 +239,14 @@ struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
239 }, 239 },
240}; 240};
241 241
242struct pmx_dev pmx_telecom_spi_cs_i2c_clk = { 242struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = {
243 .name = "telecom_spi_cs_i2c_clk", 243 .name = "telecom_spi_cs_i2c_clk",
244 .modes = pmx_telecom_spi_cs_i2c_clk_modes, 244 .modes = pmx_telecom_spi_cs_i2c_clk_modes,
245 .mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes), 245 .mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
246 .enb_on_reset = 1, 246 .enb_on_reset = 1,
247}; 247};
248 248
249struct pmx_dev_mode pmx_telecom_camera_modes[] = { 249static struct pmx_dev_mode pmx_telecom_camera_modes[] = {
250 { 250 {
251 .ids = CAML_LCDW_MODE | CAML_LCD_MODE, 251 .ids = CAML_LCDW_MODE | CAML_LCD_MODE,
252 .mask = PMX_MII_MASK, 252 .mask = PMX_MII_MASK,
@@ -256,14 +256,14 @@ struct pmx_dev_mode pmx_telecom_camera_modes[] = {
256 }, 256 },
257}; 257};
258 258
259struct pmx_dev pmx_telecom_camera = { 259struct pmx_dev spear300_pmx_telecom_camera = {
260 .name = "telecom_camera", 260 .name = "telecom_camera",
261 .modes = pmx_telecom_camera_modes, 261 .modes = pmx_telecom_camera_modes,
262 .mode_count = ARRAY_SIZE(pmx_telecom_camera_modes), 262 .mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
263 .enb_on_reset = 1, 263 .enb_on_reset = 1,
264}; 264};
265 265
266struct pmx_dev_mode pmx_telecom_dac_modes[] = { 266static struct pmx_dev_mode pmx_telecom_dac_modes[] = {
267 { 267 {
268 .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE 268 .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
269 | CAMU_WLCD_MODE | CAML_LCD_MODE, 269 | CAMU_WLCD_MODE | CAML_LCD_MODE,
@@ -271,14 +271,14 @@ struct pmx_dev_mode pmx_telecom_dac_modes[] = {
271 }, 271 },
272}; 272};
273 273
274struct pmx_dev pmx_telecom_dac = { 274struct pmx_dev spear300_pmx_telecom_dac = {
275 .name = "telecom_dac", 275 .name = "telecom_dac",
276 .modes = pmx_telecom_dac_modes, 276 .modes = pmx_telecom_dac_modes,
277 .mode_count = ARRAY_SIZE(pmx_telecom_dac_modes), 277 .mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
278 .enb_on_reset = 1, 278 .enb_on_reset = 1,
279}; 279};
280 280
281struct pmx_dev_mode pmx_telecom_i2s_modes[] = { 281static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
282 { 282 {
283 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE 283 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
284 | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE | 284 | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
@@ -288,14 +288,14 @@ struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
288 }, 288 },
289}; 289};
290 290
291struct pmx_dev pmx_telecom_i2s = { 291struct pmx_dev spear300_pmx_telecom_i2s = {
292 .name = "telecom_i2s", 292 .name = "telecom_i2s",
293 .modes = pmx_telecom_i2s_modes, 293 .modes = pmx_telecom_i2s_modes,
294 .mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes), 294 .mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
295 .enb_on_reset = 1, 295 .enb_on_reset = 1,
296}; 296};
297 297
298struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = { 298static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
299 { 299 {
300 .ids = NAND_MODE | NOR_MODE, 300 .ids = NAND_MODE | NOR_MODE,
301 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK | 301 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
@@ -303,14 +303,14 @@ struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
303 }, 303 },
304}; 304};
305 305
306struct pmx_dev pmx_telecom_boot_pins = { 306struct pmx_dev spear300_pmx_telecom_boot_pins = {
307 .name = "telecom_boot_pins", 307 .name = "telecom_boot_pins",
308 .modes = pmx_telecom_boot_pins_modes, 308 .modes = pmx_telecom_boot_pins_modes,
309 .mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes), 309 .mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
310 .enb_on_reset = 1, 310 .enb_on_reset = 1,
311}; 311};
312 312
313struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = { 313static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
314 { 314 {
315 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | 315 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
316 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | 316 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
@@ -323,14 +323,14 @@ struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
323 }, 323 },
324}; 324};
325 325
326struct pmx_dev pmx_telecom_sdhci_4bit = { 326struct pmx_dev spear300_pmx_telecom_sdhci_4bit = {
327 .name = "telecom_sdhci_4bit", 327 .name = "telecom_sdhci_4bit",
328 .modes = pmx_telecom_sdhci_4bit_modes, 328 .modes = pmx_telecom_sdhci_4bit_modes,
329 .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes), 329 .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
330 .enb_on_reset = 1, 330 .enb_on_reset = 1,
331}; 331};
332 332
333struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = { 333static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
334 { 334 {
335 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | 335 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
336 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | 336 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
@@ -342,14 +342,14 @@ struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
342 }, 342 },
343}; 343};
344 344
345struct pmx_dev pmx_telecom_sdhci_8bit = { 345struct pmx_dev spear300_pmx_telecom_sdhci_8bit = {
346 .name = "telecom_sdhci_8bit", 346 .name = "telecom_sdhci_8bit",
347 .modes = pmx_telecom_sdhci_8bit_modes, 347 .modes = pmx_telecom_sdhci_8bit_modes,
348 .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes), 348 .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
349 .enb_on_reset = 1, 349 .enb_on_reset = 1,
350}; 350};
351 351
352struct pmx_dev_mode pmx_gpio1_modes[] = { 352static struct pmx_dev_mode pmx_gpio1_modes[] = {
353 { 353 {
354 .ids = PHOTO_FRAME_MODE, 354 .ids = PHOTO_FRAME_MODE,
355 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK | 355 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
@@ -357,7 +357,7 @@ struct pmx_dev_mode pmx_gpio1_modes[] = {
357 }, 357 },
358}; 358};
359 359
360struct pmx_dev pmx_gpio1 = { 360struct pmx_dev spear300_pmx_gpio1 = {
361 .name = "arm gpio1", 361 .name = "arm gpio1",
362 .modes = pmx_gpio1_modes, 362 .modes = pmx_gpio1_modes,
363 .mode_count = ARRAY_SIZE(pmx_gpio1_modes), 363 .mode_count = ARRAY_SIZE(pmx_gpio1_modes),
@@ -365,7 +365,7 @@ struct pmx_dev pmx_gpio1 = {
365}; 365};
366 366
367/* pmx driver structure */ 367/* pmx driver structure */
368struct pmx_driver pmx_driver = { 368static struct pmx_driver pmx_driver = {
369 .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f}, 369 .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
370 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, 370 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
371}; 371};
@@ -444,7 +444,8 @@ struct amba_device gpio1_device = {
444}; 444};
445 445
446/* spear300 routines */ 446/* spear300 routines */
447void __init spear300_init(void) 447void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
448 u8 pmx_dev_count)
448{ 449{
449 int ret = 0; 450 int ret = 0;
450 451
@@ -460,6 +461,10 @@ void __init spear300_init(void)
460 } 461 }
461 462
462 /* pmx initialization */ 463 /* pmx initialization */
464 pmx_driver.mode = pmx_mode;
465 pmx_driver.devs = pmx_devs;
466 pmx_driver.devs_count = pmx_dev_count;
467
463 pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K); 468 pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);
464 if (pmx_driver.base) { 469 if (pmx_driver.base) {
465 ret = pmx_register(&pmx_driver); 470 ret = pmx_register(&pmx_driver);
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index 42d2253ef540..405ae098cc87 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -19,17 +19,17 @@
19/* padmux devices to enable */ 19/* padmux devices to enable */
20static struct pmx_dev *pmx_devs[] = { 20static struct pmx_dev *pmx_devs[] = {
21 /* spear3xx specific devices */ 21 /* spear3xx specific devices */
22 &pmx_i2c, 22 &spear3xx_pmx_i2c,
23 &pmx_ssp_cs, 23 &spear3xx_pmx_ssp_cs,
24 &pmx_ssp, 24 &spear3xx_pmx_ssp,
25 &pmx_mii, 25 &spear3xx_pmx_mii,
26 &pmx_uart0, 26 &spear3xx_pmx_uart0,
27 27
28 /* spear300 specific devices */ 28 /* spear300 specific devices */
29 &pmx_fsmc_2_chips, 29 &spear300_pmx_fsmc_2_chips,
30 &pmx_clcd, 30 &spear300_pmx_clcd,
31 &pmx_telecom_sdhci_4bit, 31 &spear300_pmx_telecom_sdhci_4bit,
32 &pmx_gpio1, 32 &spear300_pmx_gpio1,
33}; 33};
34 34
35static struct amba_device *amba_devs[] __initdata = { 35static struct amba_device *amba_devs[] __initdata = {
@@ -51,13 +51,9 @@ static void __init spear300_evb_init(void)
51{ 51{
52 unsigned int i; 52 unsigned int i;
53 53
54 /* padmux initialization, must be done before spear300_init */
55 pmx_driver.mode = &photo_frame_mode;
56 pmx_driver.devs = pmx_devs;
57 pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
58
59 /* call spear300 machine init function */ 54 /* call spear300 machine init function */
60 spear300_init(); 55 spear300_init(&spear300_photo_frame_mode, pmx_devs,
56 ARRAY_SIZE(pmx_devs));
61 57
62 /* Add Platform Devices */ 58 /* Add Platform Devices */
63 platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); 59 platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 826c166a76a5..9004cf9f01bf 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -22,112 +22,112 @@
22#define PAD_MUX_CONFIG_REG 0x08 22#define PAD_MUX_CONFIG_REG 0x08
23 23
24/* devices */ 24/* devices */
25struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = { 25static struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = {
26 { 26 {
27 .ids = 0x00, 27 .ids = 0x00,
28 .mask = PMX_TIMER_3_4_MASK, 28 .mask = PMX_TIMER_3_4_MASK,
29 }, 29 },
30}; 30};
31 31
32struct pmx_dev pmx_emi_cs_0_1_4_5 = { 32struct pmx_dev spear310_pmx_emi_cs_0_1_4_5 = {
33 .name = "emi_cs_0_1_4_5", 33 .name = "emi_cs_0_1_4_5",
34 .modes = pmx_emi_cs_0_1_4_5_modes, 34 .modes = pmx_emi_cs_0_1_4_5_modes,
35 .mode_count = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_modes), 35 .mode_count = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_modes),
36 .enb_on_reset = 1, 36 .enb_on_reset = 1,
37}; 37};
38 38
39struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = { 39static struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = {
40 { 40 {
41 .ids = 0x00, 41 .ids = 0x00,
42 .mask = PMX_TIMER_1_2_MASK, 42 .mask = PMX_TIMER_1_2_MASK,
43 }, 43 },
44}; 44};
45 45
46struct pmx_dev pmx_emi_cs_2_3 = { 46struct pmx_dev spear310_pmx_emi_cs_2_3 = {
47 .name = "emi_cs_2_3", 47 .name = "emi_cs_2_3",
48 .modes = pmx_emi_cs_2_3_modes, 48 .modes = pmx_emi_cs_2_3_modes,
49 .mode_count = ARRAY_SIZE(pmx_emi_cs_2_3_modes), 49 .mode_count = ARRAY_SIZE(pmx_emi_cs_2_3_modes),
50 .enb_on_reset = 1, 50 .enb_on_reset = 1,
51}; 51};
52 52
53struct pmx_dev_mode pmx_uart1_modes[] = { 53static struct pmx_dev_mode pmx_uart1_modes[] = {
54 { 54 {
55 .ids = 0x00, 55 .ids = 0x00,
56 .mask = PMX_FIRDA_MASK, 56 .mask = PMX_FIRDA_MASK,
57 }, 57 },
58}; 58};
59 59
60struct pmx_dev pmx_uart1 = { 60struct pmx_dev spear310_pmx_uart1 = {
61 .name = "uart1", 61 .name = "uart1",
62 .modes = pmx_uart1_modes, 62 .modes = pmx_uart1_modes,
63 .mode_count = ARRAY_SIZE(pmx_uart1_modes), 63 .mode_count = ARRAY_SIZE(pmx_uart1_modes),
64 .enb_on_reset = 1, 64 .enb_on_reset = 1,
65}; 65};
66 66
67struct pmx_dev_mode pmx_uart2_modes[] = { 67static struct pmx_dev_mode pmx_uart2_modes[] = {
68 { 68 {
69 .ids = 0x00, 69 .ids = 0x00,
70 .mask = PMX_TIMER_1_2_MASK, 70 .mask = PMX_TIMER_1_2_MASK,
71 }, 71 },
72}; 72};
73 73
74struct pmx_dev pmx_uart2 = { 74struct pmx_dev spear310_pmx_uart2 = {
75 .name = "uart2", 75 .name = "uart2",
76 .modes = pmx_uart2_modes, 76 .modes = pmx_uart2_modes,
77 .mode_count = ARRAY_SIZE(pmx_uart2_modes), 77 .mode_count = ARRAY_SIZE(pmx_uart2_modes),
78 .enb_on_reset = 1, 78 .enb_on_reset = 1,
79}; 79};
80 80
81struct pmx_dev_mode pmx_uart3_4_5_modes[] = { 81static struct pmx_dev_mode pmx_uart3_4_5_modes[] = {
82 { 82 {
83 .ids = 0x00, 83 .ids = 0x00,
84 .mask = PMX_UART0_MODEM_MASK, 84 .mask = PMX_UART0_MODEM_MASK,
85 }, 85 },
86}; 86};
87 87
88struct pmx_dev pmx_uart3_4_5 = { 88struct pmx_dev spear310_pmx_uart3_4_5 = {
89 .name = "uart3_4_5", 89 .name = "uart3_4_5",
90 .modes = pmx_uart3_4_5_modes, 90 .modes = pmx_uart3_4_5_modes,
91 .mode_count = ARRAY_SIZE(pmx_uart3_4_5_modes), 91 .mode_count = ARRAY_SIZE(pmx_uart3_4_5_modes),
92 .enb_on_reset = 1, 92 .enb_on_reset = 1,
93}; 93};
94 94
95struct pmx_dev_mode pmx_fsmc_modes[] = { 95static struct pmx_dev_mode pmx_fsmc_modes[] = {
96 { 96 {
97 .ids = 0x00, 97 .ids = 0x00,
98 .mask = PMX_SSP_CS_MASK, 98 .mask = PMX_SSP_CS_MASK,
99 }, 99 },
100}; 100};
101 101
102struct pmx_dev pmx_fsmc = { 102struct pmx_dev spear310_pmx_fsmc = {
103 .name = "fsmc", 103 .name = "fsmc",
104 .modes = pmx_fsmc_modes, 104 .modes = pmx_fsmc_modes,
105 .mode_count = ARRAY_SIZE(pmx_fsmc_modes), 105 .mode_count = ARRAY_SIZE(pmx_fsmc_modes),
106 .enb_on_reset = 1, 106 .enb_on_reset = 1,
107}; 107};
108 108
109struct pmx_dev_mode pmx_rs485_0_1_modes[] = { 109static struct pmx_dev_mode pmx_rs485_0_1_modes[] = {
110 { 110 {
111 .ids = 0x00, 111 .ids = 0x00,
112 .mask = PMX_MII_MASK, 112 .mask = PMX_MII_MASK,
113 }, 113 },
114}; 114};
115 115
116struct pmx_dev pmx_rs485_0_1 = { 116struct pmx_dev spear310_pmx_rs485_0_1 = {
117 .name = "rs485_0_1", 117 .name = "rs485_0_1",
118 .modes = pmx_rs485_0_1_modes, 118 .modes = pmx_rs485_0_1_modes,
119 .mode_count = ARRAY_SIZE(pmx_rs485_0_1_modes), 119 .mode_count = ARRAY_SIZE(pmx_rs485_0_1_modes),
120 .enb_on_reset = 1, 120 .enb_on_reset = 1,
121}; 121};
122 122
123struct pmx_dev_mode pmx_tdm0_modes[] = { 123static struct pmx_dev_mode pmx_tdm0_modes[] = {
124 { 124 {
125 .ids = 0x00, 125 .ids = 0x00,
126 .mask = PMX_MII_MASK, 126 .mask = PMX_MII_MASK,
127 }, 127 },
128}; 128};
129 129
130struct pmx_dev pmx_tdm0 = { 130struct pmx_dev spear310_pmx_tdm0 = {
131 .name = "tdm0", 131 .name = "tdm0",
132 .modes = pmx_tdm0_modes, 132 .modes = pmx_tdm0_modes,
133 .mode_count = ARRAY_SIZE(pmx_tdm0_modes), 133 .mode_count = ARRAY_SIZE(pmx_tdm0_modes),
@@ -135,7 +135,7 @@ struct pmx_dev pmx_tdm0 = {
135}; 135};
136 136
137/* pmx driver structure */ 137/* pmx driver structure */
138struct pmx_driver pmx_driver = { 138static struct pmx_driver pmx_driver = {
139 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, 139 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
140}; 140};
141 141
@@ -258,7 +258,8 @@ static struct spear_shirq shirq_intrcomm_ras = {
258/* Add spear310 specific devices here */ 258/* Add spear310 specific devices here */
259 259
260/* spear310 routines */ 260/* spear310 routines */
261void __init spear310_init(void) 261void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
262 u8 pmx_dev_count)
262{ 263{
263 void __iomem *base; 264 void __iomem *base;
264 int ret = 0; 265 int ret = 0;
@@ -296,6 +297,10 @@ void __init spear310_init(void)
296 297
297 /* pmx initialization */ 298 /* pmx initialization */
298 pmx_driver.base = base; 299 pmx_driver.base = base;
300 pmx_driver.mode = pmx_mode;
301 pmx_driver.devs = pmx_devs;
302 pmx_driver.devs_count = pmx_dev_count;
303
299 ret = pmx_register(&pmx_driver); 304 ret = pmx_register(&pmx_driver);
300 if (ret) 305 if (ret)
301 printk(KERN_ERR "padmux: registeration failed. err no: %d\n", 306 printk(KERN_ERR "padmux: registeration failed. err no: %d\n",
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 2d7f333bd67b..9d4aadbe24e9 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -19,25 +19,25 @@
19/* padmux devices to enable */ 19/* padmux devices to enable */
20static struct pmx_dev *pmx_devs[] = { 20static struct pmx_dev *pmx_devs[] = {
21 /* spear3xx specific devices */ 21 /* spear3xx specific devices */
22 &pmx_i2c, 22 &spear3xx_pmx_i2c,
23 &pmx_ssp, 23 &spear3xx_pmx_ssp,
24 &pmx_gpio_pin0, 24 &spear3xx_pmx_gpio_pin0,
25 &pmx_gpio_pin1, 25 &spear3xx_pmx_gpio_pin1,
26 &pmx_gpio_pin2, 26 &spear3xx_pmx_gpio_pin2,
27 &pmx_gpio_pin3, 27 &spear3xx_pmx_gpio_pin3,
28 &pmx_gpio_pin4, 28 &spear3xx_pmx_gpio_pin4,
29 &pmx_gpio_pin5, 29 &spear3xx_pmx_gpio_pin5,
30 &pmx_uart0, 30 &spear3xx_pmx_uart0,
31 31
32 /* spear310 specific devices */ 32 /* spear310 specific devices */
33 &pmx_emi_cs_0_1_4_5, 33 &spear310_pmx_emi_cs_0_1_4_5,
34 &pmx_emi_cs_2_3, 34 &spear310_pmx_emi_cs_2_3,
35 &pmx_uart1, 35 &spear310_pmx_uart1,
36 &pmx_uart2, 36 &spear310_pmx_uart2,
37 &pmx_uart3_4_5, 37 &spear310_pmx_uart3_4_5,
38 &pmx_fsmc, 38 &spear310_pmx_fsmc,
39 &pmx_rs485_0_1, 39 &spear310_pmx_rs485_0_1,
40 &pmx_tdm0, 40 &spear310_pmx_tdm0,
41}; 41};
42 42
43static struct amba_device *amba_devs[] __initdata = { 43static struct amba_device *amba_devs[] __initdata = {
@@ -58,13 +58,8 @@ static void __init spear310_evb_init(void)
58{ 58{
59 unsigned int i; 59 unsigned int i;
60 60
61 /* padmux initialization, must be done before spear310_init */
62 pmx_driver.mode = NULL;
63 pmx_driver.devs = pmx_devs;
64 pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
65
66 /* call spear310 machine init function */ 61 /* call spear310 machine init function */
67 spear310_init(); 62 spear310_init(NULL, pmx_devs, ARRAY_SIZE(pmx_devs));
68 63
69 /* Add Platform Devices */ 64 /* Add Platform Devices */
70 platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); 65 platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index ccb745b60106..ee29bef43074 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -29,88 +29,88 @@
29#define SMALL_PRINTERS_MODE (1 << 3) 29#define SMALL_PRINTERS_MODE (1 << 3)
30#define ALL_MODES 0xF 30#define ALL_MODES 0xF
31 31
32struct pmx_mode auto_net_smii_mode = { 32struct pmx_mode spear320_auto_net_smii_mode = {
33 .id = AUTO_NET_SMII_MODE, 33 .id = AUTO_NET_SMII_MODE,
34 .name = "Automation Networking SMII Mode", 34 .name = "Automation Networking SMII Mode",
35 .mask = 0x00, 35 .mask = 0x00,
36}; 36};
37 37
38struct pmx_mode auto_net_mii_mode = { 38struct pmx_mode spear320_auto_net_mii_mode = {
39 .id = AUTO_NET_MII_MODE, 39 .id = AUTO_NET_MII_MODE,
40 .name = "Automation Networking MII Mode", 40 .name = "Automation Networking MII Mode",
41 .mask = 0x01, 41 .mask = 0x01,
42}; 42};
43 43
44struct pmx_mode auto_exp_mode = { 44struct pmx_mode spear320_auto_exp_mode = {
45 .id = AUTO_EXP_MODE, 45 .id = AUTO_EXP_MODE,
46 .name = "Automation Expanded Mode", 46 .name = "Automation Expanded Mode",
47 .mask = 0x02, 47 .mask = 0x02,
48}; 48};
49 49
50struct pmx_mode small_printers_mode = { 50struct pmx_mode spear320_small_printers_mode = {
51 .id = SMALL_PRINTERS_MODE, 51 .id = SMALL_PRINTERS_MODE,
52 .name = "Small Printers Mode", 52 .name = "Small Printers Mode",
53 .mask = 0x03, 53 .mask = 0x03,
54}; 54};
55 55
56/* devices */ 56/* devices */
57struct pmx_dev_mode pmx_clcd_modes[] = { 57static struct pmx_dev_mode pmx_clcd_modes[] = {
58 { 58 {
59 .ids = AUTO_NET_SMII_MODE, 59 .ids = AUTO_NET_SMII_MODE,
60 .mask = 0x0, 60 .mask = 0x0,
61 }, 61 },
62}; 62};
63 63
64struct pmx_dev pmx_clcd = { 64struct pmx_dev spear320_pmx_clcd = {
65 .name = "clcd", 65 .name = "clcd",
66 .modes = pmx_clcd_modes, 66 .modes = pmx_clcd_modes,
67 .mode_count = ARRAY_SIZE(pmx_clcd_modes), 67 .mode_count = ARRAY_SIZE(pmx_clcd_modes),
68 .enb_on_reset = 1, 68 .enb_on_reset = 1,
69}; 69};
70 70
71struct pmx_dev_mode pmx_emi_modes[] = { 71static struct pmx_dev_mode pmx_emi_modes[] = {
72 { 72 {
73 .ids = AUTO_EXP_MODE, 73 .ids = AUTO_EXP_MODE,
74 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK, 74 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
75 }, 75 },
76}; 76};
77 77
78struct pmx_dev pmx_emi = { 78struct pmx_dev spear320_pmx_emi = {
79 .name = "emi", 79 .name = "emi",
80 .modes = pmx_emi_modes, 80 .modes = pmx_emi_modes,
81 .mode_count = ARRAY_SIZE(pmx_emi_modes), 81 .mode_count = ARRAY_SIZE(pmx_emi_modes),
82 .enb_on_reset = 1, 82 .enb_on_reset = 1,
83}; 83};
84 84
85struct pmx_dev_mode pmx_fsmc_modes[] = { 85static struct pmx_dev_mode pmx_fsmc_modes[] = {
86 { 86 {
87 .ids = ALL_MODES, 87 .ids = ALL_MODES,
88 .mask = 0x0, 88 .mask = 0x0,
89 }, 89 },
90}; 90};
91 91
92struct pmx_dev pmx_fsmc = { 92struct pmx_dev spear320_pmx_fsmc = {
93 .name = "fsmc", 93 .name = "fsmc",
94 .modes = pmx_fsmc_modes, 94 .modes = pmx_fsmc_modes,
95 .mode_count = ARRAY_SIZE(pmx_fsmc_modes), 95 .mode_count = ARRAY_SIZE(pmx_fsmc_modes),
96 .enb_on_reset = 1, 96 .enb_on_reset = 1,
97}; 97};
98 98
99struct pmx_dev_mode pmx_spp_modes[] = { 99static struct pmx_dev_mode pmx_spp_modes[] = {
100 { 100 {
101 .ids = SMALL_PRINTERS_MODE, 101 .ids = SMALL_PRINTERS_MODE,
102 .mask = 0x0, 102 .mask = 0x0,
103 }, 103 },
104}; 104};
105 105
106struct pmx_dev pmx_spp = { 106struct pmx_dev spear320_pmx_spp = {
107 .name = "spp", 107 .name = "spp",
108 .modes = pmx_spp_modes, 108 .modes = pmx_spp_modes,
109 .mode_count = ARRAY_SIZE(pmx_spp_modes), 109 .mode_count = ARRAY_SIZE(pmx_spp_modes),
110 .enb_on_reset = 1, 110 .enb_on_reset = 1,
111}; 111};
112 112
113struct pmx_dev_mode pmx_sdhci_modes[] = { 113static struct pmx_dev_mode pmx_sdhci_modes[] = {
114 { 114 {
115 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | 115 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE |
116 SMALL_PRINTERS_MODE, 116 SMALL_PRINTERS_MODE,
@@ -118,42 +118,42 @@ struct pmx_dev_mode pmx_sdhci_modes[] = {
118 }, 118 },
119}; 119};
120 120
121struct pmx_dev pmx_sdhci = { 121struct pmx_dev spear320_pmx_sdhci = {
122 .name = "sdhci", 122 .name = "sdhci",
123 .modes = pmx_sdhci_modes, 123 .modes = pmx_sdhci_modes,
124 .mode_count = ARRAY_SIZE(pmx_sdhci_modes), 124 .mode_count = ARRAY_SIZE(pmx_sdhci_modes),
125 .enb_on_reset = 1, 125 .enb_on_reset = 1,
126}; 126};
127 127
128struct pmx_dev_mode pmx_i2s_modes[] = { 128static struct pmx_dev_mode pmx_i2s_modes[] = {
129 { 129 {
130 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, 130 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
131 .mask = PMX_UART0_MODEM_MASK, 131 .mask = PMX_UART0_MODEM_MASK,
132 }, 132 },
133}; 133};
134 134
135struct pmx_dev pmx_i2s = { 135struct pmx_dev spear320_pmx_i2s = {
136 .name = "i2s", 136 .name = "i2s",
137 .modes = pmx_i2s_modes, 137 .modes = pmx_i2s_modes,
138 .mode_count = ARRAY_SIZE(pmx_i2s_modes), 138 .mode_count = ARRAY_SIZE(pmx_i2s_modes),
139 .enb_on_reset = 1, 139 .enb_on_reset = 1,
140}; 140};
141 141
142struct pmx_dev_mode pmx_uart1_modes[] = { 142static struct pmx_dev_mode pmx_uart1_modes[] = {
143 { 143 {
144 .ids = ALL_MODES, 144 .ids = ALL_MODES,
145 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK, 145 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK,
146 }, 146 },
147}; 147};
148 148
149struct pmx_dev pmx_uart1 = { 149struct pmx_dev spear320_pmx_uart1 = {
150 .name = "uart1", 150 .name = "uart1",
151 .modes = pmx_uart1_modes, 151 .modes = pmx_uart1_modes,
152 .mode_count = ARRAY_SIZE(pmx_uart1_modes), 152 .mode_count = ARRAY_SIZE(pmx_uart1_modes),
153 .enb_on_reset = 1, 153 .enb_on_reset = 1,
154}; 154};
155 155
156struct pmx_dev_mode pmx_uart1_modem_modes[] = { 156static struct pmx_dev_mode pmx_uart1_modem_modes[] = {
157 { 157 {
158 .ids = AUTO_EXP_MODE, 158 .ids = AUTO_EXP_MODE,
159 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | 159 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK |
@@ -165,42 +165,42 @@ struct pmx_dev_mode pmx_uart1_modem_modes[] = {
165 }, 165 },
166}; 166};
167 167
168struct pmx_dev pmx_uart1_modem = { 168struct pmx_dev spear320_pmx_uart1_modem = {
169 .name = "uart1_modem", 169 .name = "uart1_modem",
170 .modes = pmx_uart1_modem_modes, 170 .modes = pmx_uart1_modem_modes,
171 .mode_count = ARRAY_SIZE(pmx_uart1_modem_modes), 171 .mode_count = ARRAY_SIZE(pmx_uart1_modem_modes),
172 .enb_on_reset = 1, 172 .enb_on_reset = 1,
173}; 173};
174 174
175struct pmx_dev_mode pmx_uart2_modes[] = { 175static struct pmx_dev_mode pmx_uart2_modes[] = {
176 { 176 {
177 .ids = ALL_MODES, 177 .ids = ALL_MODES,
178 .mask = PMX_FIRDA_MASK, 178 .mask = PMX_FIRDA_MASK,
179 }, 179 },
180}; 180};
181 181
182struct pmx_dev pmx_uart2 = { 182struct pmx_dev spear320_pmx_uart2 = {
183 .name = "uart2", 183 .name = "uart2",
184 .modes = pmx_uart2_modes, 184 .modes = pmx_uart2_modes,
185 .mode_count = ARRAY_SIZE(pmx_uart2_modes), 185 .mode_count = ARRAY_SIZE(pmx_uart2_modes),
186 .enb_on_reset = 1, 186 .enb_on_reset = 1,
187}; 187};
188 188
189struct pmx_dev_mode pmx_touchscreen_modes[] = { 189static struct pmx_dev_mode pmx_touchscreen_modes[] = {
190 { 190 {
191 .ids = AUTO_NET_SMII_MODE, 191 .ids = AUTO_NET_SMII_MODE,
192 .mask = PMX_SSP_CS_MASK, 192 .mask = PMX_SSP_CS_MASK,
193 }, 193 },
194}; 194};
195 195
196struct pmx_dev pmx_touchscreen = { 196struct pmx_dev spear320_pmx_touchscreen = {
197 .name = "touchscreen", 197 .name = "touchscreen",
198 .modes = pmx_touchscreen_modes, 198 .modes = pmx_touchscreen_modes,
199 .mode_count = ARRAY_SIZE(pmx_touchscreen_modes), 199 .mode_count = ARRAY_SIZE(pmx_touchscreen_modes),
200 .enb_on_reset = 1, 200 .enb_on_reset = 1,
201}; 201};
202 202
203struct pmx_dev_mode pmx_can_modes[] = { 203static struct pmx_dev_mode pmx_can_modes[] = {
204 { 204 {
205 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE, 205 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE,
206 .mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK | 206 .mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
@@ -208,28 +208,28 @@ struct pmx_dev_mode pmx_can_modes[] = {
208 }, 208 },
209}; 209};
210 210
211struct pmx_dev pmx_can = { 211struct pmx_dev spear320_pmx_can = {
212 .name = "can", 212 .name = "can",
213 .modes = pmx_can_modes, 213 .modes = pmx_can_modes,
214 .mode_count = ARRAY_SIZE(pmx_can_modes), 214 .mode_count = ARRAY_SIZE(pmx_can_modes),
215 .enb_on_reset = 1, 215 .enb_on_reset = 1,
216}; 216};
217 217
218struct pmx_dev_mode pmx_sdhci_led_modes[] = { 218static struct pmx_dev_mode pmx_sdhci_led_modes[] = {
219 { 219 {
220 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, 220 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
221 .mask = PMX_SSP_CS_MASK, 221 .mask = PMX_SSP_CS_MASK,
222 }, 222 },
223}; 223};
224 224
225struct pmx_dev pmx_sdhci_led = { 225struct pmx_dev spear320_pmx_sdhci_led = {
226 .name = "sdhci_led", 226 .name = "sdhci_led",
227 .modes = pmx_sdhci_led_modes, 227 .modes = pmx_sdhci_led_modes,
228 .mode_count = ARRAY_SIZE(pmx_sdhci_led_modes), 228 .mode_count = ARRAY_SIZE(pmx_sdhci_led_modes),
229 .enb_on_reset = 1, 229 .enb_on_reset = 1,
230}; 230};
231 231
232struct pmx_dev_mode pmx_pwm0_modes[] = { 232static struct pmx_dev_mode pmx_pwm0_modes[] = {
233 { 233 {
234 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, 234 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
235 .mask = PMX_UART0_MODEM_MASK, 235 .mask = PMX_UART0_MODEM_MASK,
@@ -239,14 +239,14 @@ struct pmx_dev_mode pmx_pwm0_modes[] = {
239 }, 239 },
240}; 240};
241 241
242struct pmx_dev pmx_pwm0 = { 242struct pmx_dev spear320_pmx_pwm0 = {
243 .name = "pwm0", 243 .name = "pwm0",
244 .modes = pmx_pwm0_modes, 244 .modes = pmx_pwm0_modes,
245 .mode_count = ARRAY_SIZE(pmx_pwm0_modes), 245 .mode_count = ARRAY_SIZE(pmx_pwm0_modes),
246 .enb_on_reset = 1, 246 .enb_on_reset = 1,
247}; 247};
248 248
249struct pmx_dev_mode pmx_pwm1_modes[] = { 249static struct pmx_dev_mode pmx_pwm1_modes[] = {
250 { 250 {
251 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, 251 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
252 .mask = PMX_UART0_MODEM_MASK, 252 .mask = PMX_UART0_MODEM_MASK,
@@ -256,14 +256,14 @@ struct pmx_dev_mode pmx_pwm1_modes[] = {
256 }, 256 },
257}; 257};
258 258
259struct pmx_dev pmx_pwm1 = { 259struct pmx_dev spear320_pmx_pwm1 = {
260 .name = "pwm1", 260 .name = "pwm1",
261 .modes = pmx_pwm1_modes, 261 .modes = pmx_pwm1_modes,
262 .mode_count = ARRAY_SIZE(pmx_pwm1_modes), 262 .mode_count = ARRAY_SIZE(pmx_pwm1_modes),
263 .enb_on_reset = 1, 263 .enb_on_reset = 1,
264}; 264};
265 265
266struct pmx_dev_mode pmx_pwm2_modes[] = { 266static struct pmx_dev_mode pmx_pwm2_modes[] = {
267 { 267 {
268 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, 268 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
269 .mask = PMX_SSP_CS_MASK, 269 .mask = PMX_SSP_CS_MASK,
@@ -273,105 +273,105 @@ struct pmx_dev_mode pmx_pwm2_modes[] = {
273 }, 273 },
274}; 274};
275 275
276struct pmx_dev pmx_pwm2 = { 276struct pmx_dev spear320_pmx_pwm2 = {
277 .name = "pwm2", 277 .name = "pwm2",
278 .modes = pmx_pwm2_modes, 278 .modes = pmx_pwm2_modes,
279 .mode_count = ARRAY_SIZE(pmx_pwm2_modes), 279 .mode_count = ARRAY_SIZE(pmx_pwm2_modes),
280 .enb_on_reset = 1, 280 .enb_on_reset = 1,
281}; 281};
282 282
283struct pmx_dev_mode pmx_pwm3_modes[] = { 283static struct pmx_dev_mode pmx_pwm3_modes[] = {
284 { 284 {
285 .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE, 285 .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
286 .mask = PMX_MII_MASK, 286 .mask = PMX_MII_MASK,
287 }, 287 },
288}; 288};
289 289
290struct pmx_dev pmx_pwm3 = { 290struct pmx_dev spear320_pmx_pwm3 = {
291 .name = "pwm3", 291 .name = "pwm3",
292 .modes = pmx_pwm3_modes, 292 .modes = pmx_pwm3_modes,
293 .mode_count = ARRAY_SIZE(pmx_pwm3_modes), 293 .mode_count = ARRAY_SIZE(pmx_pwm3_modes),
294 .enb_on_reset = 1, 294 .enb_on_reset = 1,
295}; 295};
296 296
297struct pmx_dev_mode pmx_ssp1_modes[] = { 297static struct pmx_dev_mode pmx_ssp1_modes[] = {
298 { 298 {
299 .ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE, 299 .ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
300 .mask = PMX_MII_MASK, 300 .mask = PMX_MII_MASK,
301 }, 301 },
302}; 302};
303 303
304struct pmx_dev pmx_ssp1 = { 304struct pmx_dev spear320_pmx_ssp1 = {
305 .name = "ssp1", 305 .name = "ssp1",
306 .modes = pmx_ssp1_modes, 306 .modes = pmx_ssp1_modes,
307 .mode_count = ARRAY_SIZE(pmx_ssp1_modes), 307 .mode_count = ARRAY_SIZE(pmx_ssp1_modes),
308 .enb_on_reset = 1, 308 .enb_on_reset = 1,
309}; 309};
310 310
311struct pmx_dev_mode pmx_ssp2_modes[] = { 311static struct pmx_dev_mode pmx_ssp2_modes[] = {
312 { 312 {
313 .ids = AUTO_NET_SMII_MODE, 313 .ids = AUTO_NET_SMII_MODE,
314 .mask = PMX_MII_MASK, 314 .mask = PMX_MII_MASK,
315 }, 315 },
316}; 316};
317 317
318struct pmx_dev pmx_ssp2 = { 318struct pmx_dev spear320_pmx_ssp2 = {
319 .name = "ssp2", 319 .name = "ssp2",
320 .modes = pmx_ssp2_modes, 320 .modes = pmx_ssp2_modes,
321 .mode_count = ARRAY_SIZE(pmx_ssp2_modes), 321 .mode_count = ARRAY_SIZE(pmx_ssp2_modes),
322 .enb_on_reset = 1, 322 .enb_on_reset = 1,
323}; 323};
324 324
325struct pmx_dev_mode pmx_mii1_modes[] = { 325static struct pmx_dev_mode pmx_mii1_modes[] = {
326 { 326 {
327 .ids = AUTO_NET_MII_MODE, 327 .ids = AUTO_NET_MII_MODE,
328 .mask = 0x0, 328 .mask = 0x0,
329 }, 329 },
330}; 330};
331 331
332struct pmx_dev pmx_mii1 = { 332struct pmx_dev spear320_pmx_mii1 = {
333 .name = "mii1", 333 .name = "mii1",
334 .modes = pmx_mii1_modes, 334 .modes = pmx_mii1_modes,
335 .mode_count = ARRAY_SIZE(pmx_mii1_modes), 335 .mode_count = ARRAY_SIZE(pmx_mii1_modes),
336 .enb_on_reset = 1, 336 .enb_on_reset = 1,
337}; 337};
338 338
339struct pmx_dev_mode pmx_smii0_modes[] = { 339static struct pmx_dev_mode pmx_smii0_modes[] = {
340 { 340 {
341 .ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE, 341 .ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
342 .mask = PMX_MII_MASK, 342 .mask = PMX_MII_MASK,
343 }, 343 },
344}; 344};
345 345
346struct pmx_dev pmx_smii0 = { 346struct pmx_dev spear320_pmx_smii0 = {
347 .name = "smii0", 347 .name = "smii0",
348 .modes = pmx_smii0_modes, 348 .modes = pmx_smii0_modes,
349 .mode_count = ARRAY_SIZE(pmx_smii0_modes), 349 .mode_count = ARRAY_SIZE(pmx_smii0_modes),
350 .enb_on_reset = 1, 350 .enb_on_reset = 1,
351}; 351};
352 352
353struct pmx_dev_mode pmx_smii1_modes[] = { 353static struct pmx_dev_mode pmx_smii1_modes[] = {
354 { 354 {
355 .ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE, 355 .ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE,
356 .mask = PMX_MII_MASK, 356 .mask = PMX_MII_MASK,
357 }, 357 },
358}; 358};
359 359
360struct pmx_dev pmx_smii1 = { 360struct pmx_dev spear320_pmx_smii1 = {
361 .name = "smii1", 361 .name = "smii1",
362 .modes = pmx_smii1_modes, 362 .modes = pmx_smii1_modes,
363 .mode_count = ARRAY_SIZE(pmx_smii1_modes), 363 .mode_count = ARRAY_SIZE(pmx_smii1_modes),
364 .enb_on_reset = 1, 364 .enb_on_reset = 1,
365}; 365};
366 366
367struct pmx_dev_mode pmx_i2c1_modes[] = { 367static struct pmx_dev_mode pmx_i2c1_modes[] = {
368 { 368 {
369 .ids = AUTO_EXP_MODE, 369 .ids = AUTO_EXP_MODE,
370 .mask = 0x0, 370 .mask = 0x0,
371 }, 371 },
372}; 372};
373 373
374struct pmx_dev pmx_i2c1 = { 374struct pmx_dev spear320_pmx_i2c1 = {
375 .name = "i2c1", 375 .name = "i2c1",
376 .modes = pmx_i2c1_modes, 376 .modes = pmx_i2c1_modes,
377 .mode_count = ARRAY_SIZE(pmx_i2c1_modes), 377 .mode_count = ARRAY_SIZE(pmx_i2c1_modes),
@@ -379,7 +379,7 @@ struct pmx_dev pmx_i2c1 = {
379}; 379};
380 380
381/* pmx driver structure */ 381/* pmx driver structure */
382struct pmx_driver pmx_driver = { 382static struct pmx_driver pmx_driver = {
383 .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x00000007}, 383 .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x00000007},
384 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, 384 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
385}; 385};
@@ -511,7 +511,8 @@ static struct spear_shirq shirq_intrcomm_ras = {
511/* Add spear320 specific devices here */ 511/* Add spear320 specific devices here */
512 512
513/* spear320 routines */ 513/* spear320 routines */
514void __init spear320_init(void) 514void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
515 u8 pmx_dev_count)
515{ 516{
516 void __iomem *base; 517 void __iomem *base;
517 int ret = 0; 518 int ret = 0;
@@ -543,6 +544,10 @@ void __init spear320_init(void)
543 544
544 /* pmx initialization */ 545 /* pmx initialization */
545 pmx_driver.base = base; 546 pmx_driver.base = base;
547 pmx_driver.mode = pmx_mode;
548 pmx_driver.devs = pmx_devs;
549 pmx_driver.devs_count = pmx_dev_count;
550
546 ret = pmx_register(&pmx_driver); 551 ret = pmx_register(&pmx_driver);
547 if (ret) 552 if (ret)
548 printk(KERN_ERR "padmux: registeration failed. err no: %d\n", 553 printk(KERN_ERR "padmux: registeration failed. err no: %d\n",
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 8213e4b66c14..7e5f17f66b62 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -19,22 +19,22 @@
19/* padmux devices to enable */ 19/* padmux devices to enable */
20static struct pmx_dev *pmx_devs[] = { 20static struct pmx_dev *pmx_devs[] = {
21 /* spear3xx specific devices */ 21 /* spear3xx specific devices */
22 &pmx_i2c, 22 &spear3xx_pmx_i2c,
23 &pmx_ssp, 23 &spear3xx_pmx_ssp,
24 &pmx_mii, 24 &spear3xx_pmx_mii,
25 &pmx_uart0, 25 &spear3xx_pmx_uart0,
26 26
27 /* spear320 specific devices */ 27 /* spear320 specific devices */
28 &pmx_fsmc, 28 &spear320_pmx_fsmc,
29 &pmx_sdhci, 29 &spear320_pmx_sdhci,
30 &pmx_i2s, 30 &spear320_pmx_i2s,
31 &pmx_uart1, 31 &spear320_pmx_uart1,
32 &pmx_uart2, 32 &spear320_pmx_uart2,
33 &pmx_can, 33 &spear320_pmx_can,
34 &pmx_pwm0, 34 &spear320_pmx_pwm0,
35 &pmx_pwm1, 35 &spear320_pmx_pwm1,
36 &pmx_pwm2, 36 &spear320_pmx_pwm2,
37 &pmx_mii1, 37 &spear320_pmx_mii1,
38}; 38};
39 39
40static struct amba_device *amba_devs[] __initdata = { 40static struct amba_device *amba_devs[] __initdata = {
@@ -55,13 +55,9 @@ static void __init spear320_evb_init(void)
55{ 55{
56 unsigned int i; 56 unsigned int i;
57 57
58 /* padmux initialization, must be done before spear320_init */
59 pmx_driver.mode = &auto_net_mii_mode;
60 pmx_driver.devs = pmx_devs;
61 pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
62
63 /* call spear320 machine init function */ 58 /* call spear320 machine init function */
64 spear320_init(); 59 spear320_init(&spear320_auto_net_mii_mode, pmx_devs,
60 ARRAY_SIZE(pmx_devs));
65 61
66 /* Add Platform Devices */ 62 /* Add Platform Devices */
67 platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); 63 platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 35cb8c72d899..b4378a056294 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -102,210 +102,210 @@ void __init spear3xx_map_io(void)
102 102
103/* pad multiplexing support */ 103/* pad multiplexing support */
104/* devices */ 104/* devices */
105struct pmx_dev_mode pmx_firda_modes[] = { 105static struct pmx_dev_mode pmx_firda_modes[] = {
106 { 106 {
107 .ids = 0xffffffff, 107 .ids = 0xffffffff,
108 .mask = PMX_FIRDA_MASK, 108 .mask = PMX_FIRDA_MASK,
109 }, 109 },
110}; 110};
111 111
112struct pmx_dev pmx_firda = { 112struct pmx_dev spear3xx_pmx_firda = {
113 .name = "firda", 113 .name = "firda",
114 .modes = pmx_firda_modes, 114 .modes = pmx_firda_modes,
115 .mode_count = ARRAY_SIZE(pmx_firda_modes), 115 .mode_count = ARRAY_SIZE(pmx_firda_modes),
116 .enb_on_reset = 0, 116 .enb_on_reset = 0,
117}; 117};
118 118
119struct pmx_dev_mode pmx_i2c_modes[] = { 119static struct pmx_dev_mode pmx_i2c_modes[] = {
120 { 120 {
121 .ids = 0xffffffff, 121 .ids = 0xffffffff,
122 .mask = PMX_I2C_MASK, 122 .mask = PMX_I2C_MASK,
123 }, 123 },
124}; 124};
125 125
126struct pmx_dev pmx_i2c = { 126struct pmx_dev spear3xx_pmx_i2c = {
127 .name = "i2c", 127 .name = "i2c",
128 .modes = pmx_i2c_modes, 128 .modes = pmx_i2c_modes,
129 .mode_count = ARRAY_SIZE(pmx_i2c_modes), 129 .mode_count = ARRAY_SIZE(pmx_i2c_modes),
130 .enb_on_reset = 0, 130 .enb_on_reset = 0,
131}; 131};
132 132
133struct pmx_dev_mode pmx_ssp_cs_modes[] = { 133static struct pmx_dev_mode pmx_ssp_cs_modes[] = {
134 { 134 {
135 .ids = 0xffffffff, 135 .ids = 0xffffffff,
136 .mask = PMX_SSP_CS_MASK, 136 .mask = PMX_SSP_CS_MASK,
137 }, 137 },
138}; 138};
139 139
140struct pmx_dev pmx_ssp_cs = { 140struct pmx_dev spear3xx_pmx_ssp_cs = {
141 .name = "ssp_chip_selects", 141 .name = "ssp_chip_selects",
142 .modes = pmx_ssp_cs_modes, 142 .modes = pmx_ssp_cs_modes,
143 .mode_count = ARRAY_SIZE(pmx_ssp_cs_modes), 143 .mode_count = ARRAY_SIZE(pmx_ssp_cs_modes),
144 .enb_on_reset = 0, 144 .enb_on_reset = 0,
145}; 145};
146 146
147struct pmx_dev_mode pmx_ssp_modes[] = { 147static struct pmx_dev_mode pmx_ssp_modes[] = {
148 { 148 {
149 .ids = 0xffffffff, 149 .ids = 0xffffffff,
150 .mask = PMX_SSP_MASK, 150 .mask = PMX_SSP_MASK,
151 }, 151 },
152}; 152};
153 153
154struct pmx_dev pmx_ssp = { 154struct pmx_dev spear3xx_pmx_ssp = {
155 .name = "ssp", 155 .name = "ssp",
156 .modes = pmx_ssp_modes, 156 .modes = pmx_ssp_modes,
157 .mode_count = ARRAY_SIZE(pmx_ssp_modes), 157 .mode_count = ARRAY_SIZE(pmx_ssp_modes),
158 .enb_on_reset = 0, 158 .enb_on_reset = 0,
159}; 159};
160 160
161struct pmx_dev_mode pmx_mii_modes[] = { 161static struct pmx_dev_mode pmx_mii_modes[] = {
162 { 162 {
163 .ids = 0xffffffff, 163 .ids = 0xffffffff,
164 .mask = PMX_MII_MASK, 164 .mask = PMX_MII_MASK,
165 }, 165 },
166}; 166};
167 167
168struct pmx_dev pmx_mii = { 168struct pmx_dev spear3xx_pmx_mii = {
169 .name = "mii", 169 .name = "mii",
170 .modes = pmx_mii_modes, 170 .modes = pmx_mii_modes,
171 .mode_count = ARRAY_SIZE(pmx_mii_modes), 171 .mode_count = ARRAY_SIZE(pmx_mii_modes),
172 .enb_on_reset = 0, 172 .enb_on_reset = 0,
173}; 173};
174 174
175struct pmx_dev_mode pmx_gpio_pin0_modes[] = { 175static struct pmx_dev_mode pmx_gpio_pin0_modes[] = {
176 { 176 {
177 .ids = 0xffffffff, 177 .ids = 0xffffffff,
178 .mask = PMX_GPIO_PIN0_MASK, 178 .mask = PMX_GPIO_PIN0_MASK,
179 }, 179 },
180}; 180};
181 181
182struct pmx_dev pmx_gpio_pin0 = { 182struct pmx_dev spear3xx_pmx_gpio_pin0 = {
183 .name = "gpio_pin0", 183 .name = "gpio_pin0",
184 .modes = pmx_gpio_pin0_modes, 184 .modes = pmx_gpio_pin0_modes,
185 .mode_count = ARRAY_SIZE(pmx_gpio_pin0_modes), 185 .mode_count = ARRAY_SIZE(pmx_gpio_pin0_modes),
186 .enb_on_reset = 0, 186 .enb_on_reset = 0,
187}; 187};
188 188
189struct pmx_dev_mode pmx_gpio_pin1_modes[] = { 189static struct pmx_dev_mode pmx_gpio_pin1_modes[] = {
190 { 190 {
191 .ids = 0xffffffff, 191 .ids = 0xffffffff,
192 .mask = PMX_GPIO_PIN1_MASK, 192 .mask = PMX_GPIO_PIN1_MASK,
193 }, 193 },
194}; 194};
195 195
196struct pmx_dev pmx_gpio_pin1 = { 196struct pmx_dev spear3xx_pmx_gpio_pin1 = {
197 .name = "gpio_pin1", 197 .name = "gpio_pin1",
198 .modes = pmx_gpio_pin1_modes, 198 .modes = pmx_gpio_pin1_modes,
199 .mode_count = ARRAY_SIZE(pmx_gpio_pin1_modes), 199 .mode_count = ARRAY_SIZE(pmx_gpio_pin1_modes),
200 .enb_on_reset = 0, 200 .enb_on_reset = 0,
201}; 201};
202 202
203struct pmx_dev_mode pmx_gpio_pin2_modes[] = { 203static struct pmx_dev_mode pmx_gpio_pin2_modes[] = {
204 { 204 {
205 .ids = 0xffffffff, 205 .ids = 0xffffffff,
206 .mask = PMX_GPIO_PIN2_MASK, 206 .mask = PMX_GPIO_PIN2_MASK,
207 }, 207 },
208}; 208};
209 209
210struct pmx_dev pmx_gpio_pin2 = { 210struct pmx_dev spear3xx_pmx_gpio_pin2 = {
211 .name = "gpio_pin2", 211 .name = "gpio_pin2",
212 .modes = pmx_gpio_pin2_modes, 212 .modes = pmx_gpio_pin2_modes,
213 .mode_count = ARRAY_SIZE(pmx_gpio_pin2_modes), 213 .mode_count = ARRAY_SIZE(pmx_gpio_pin2_modes),
214 .enb_on_reset = 0, 214 .enb_on_reset = 0,
215}; 215};
216 216
217struct pmx_dev_mode pmx_gpio_pin3_modes[] = { 217static struct pmx_dev_mode pmx_gpio_pin3_modes[] = {
218 { 218 {
219 .ids = 0xffffffff, 219 .ids = 0xffffffff,
220 .mask = PMX_GPIO_PIN3_MASK, 220 .mask = PMX_GPIO_PIN3_MASK,
221 }, 221 },
222}; 222};
223 223
224struct pmx_dev pmx_gpio_pin3 = { 224struct pmx_dev spear3xx_pmx_gpio_pin3 = {
225 .name = "gpio_pin3", 225 .name = "gpio_pin3",
226 .modes = pmx_gpio_pin3_modes, 226 .modes = pmx_gpio_pin3_modes,
227 .mode_count = ARRAY_SIZE(pmx_gpio_pin3_modes), 227 .mode_count = ARRAY_SIZE(pmx_gpio_pin3_modes),
228 .enb_on_reset = 0, 228 .enb_on_reset = 0,
229}; 229};
230 230
231struct pmx_dev_mode pmx_gpio_pin4_modes[] = { 231static struct pmx_dev_mode pmx_gpio_pin4_modes[] = {
232 { 232 {
233 .ids = 0xffffffff, 233 .ids = 0xffffffff,
234 .mask = PMX_GPIO_PIN4_MASK, 234 .mask = PMX_GPIO_PIN4_MASK,
235 }, 235 },
236}; 236};
237 237
238struct pmx_dev pmx_gpio_pin4 = { 238struct pmx_dev spear3xx_pmx_gpio_pin4 = {
239 .name = "gpio_pin4", 239 .name = "gpio_pin4",
240 .modes = pmx_gpio_pin4_modes, 240 .modes = pmx_gpio_pin4_modes,
241 .mode_count = ARRAY_SIZE(pmx_gpio_pin4_modes), 241 .mode_count = ARRAY_SIZE(pmx_gpio_pin4_modes),
242 .enb_on_reset = 0, 242 .enb_on_reset = 0,
243}; 243};
244 244
245struct pmx_dev_mode pmx_gpio_pin5_modes[] = { 245static struct pmx_dev_mode pmx_gpio_pin5_modes[] = {
246 { 246 {
247 .ids = 0xffffffff, 247 .ids = 0xffffffff,
248 .mask = PMX_GPIO_PIN5_MASK, 248 .mask = PMX_GPIO_PIN5_MASK,
249 }, 249 },
250}; 250};
251 251
252struct pmx_dev pmx_gpio_pin5 = { 252struct pmx_dev spear3xx_pmx_gpio_pin5 = {
253 .name = "gpio_pin5", 253 .name = "gpio_pin5",
254 .modes = pmx_gpio_pin5_modes, 254 .modes = pmx_gpio_pin5_modes,
255 .mode_count = ARRAY_SIZE(pmx_gpio_pin5_modes), 255 .mode_count = ARRAY_SIZE(pmx_gpio_pin5_modes),
256 .enb_on_reset = 0, 256 .enb_on_reset = 0,
257}; 257};
258 258
259struct pmx_dev_mode pmx_uart0_modem_modes[] = { 259static struct pmx_dev_mode pmx_uart0_modem_modes[] = {
260 { 260 {
261 .ids = 0xffffffff, 261 .ids = 0xffffffff,
262 .mask = PMX_UART0_MODEM_MASK, 262 .mask = PMX_UART0_MODEM_MASK,
263 }, 263 },
264}; 264};
265 265
266struct pmx_dev pmx_uart0_modem = { 266struct pmx_dev spear3xx_pmx_uart0_modem = {
267 .name = "uart0_modem", 267 .name = "uart0_modem",
268 .modes = pmx_uart0_modem_modes, 268 .modes = pmx_uart0_modem_modes,
269 .mode_count = ARRAY_SIZE(pmx_uart0_modem_modes), 269 .mode_count = ARRAY_SIZE(pmx_uart0_modem_modes),
270 .enb_on_reset = 0, 270 .enb_on_reset = 0,
271}; 271};
272 272
273struct pmx_dev_mode pmx_uart0_modes[] = { 273static struct pmx_dev_mode pmx_uart0_modes[] = {
274 { 274 {
275 .ids = 0xffffffff, 275 .ids = 0xffffffff,
276 .mask = PMX_UART0_MASK, 276 .mask = PMX_UART0_MASK,
277 }, 277 },
278}; 278};
279 279
280struct pmx_dev pmx_uart0 = { 280struct pmx_dev spear3xx_pmx_uart0 = {
281 .name = "uart0", 281 .name = "uart0",
282 .modes = pmx_uart0_modes, 282 .modes = pmx_uart0_modes,
283 .mode_count = ARRAY_SIZE(pmx_uart0_modes), 283 .mode_count = ARRAY_SIZE(pmx_uart0_modes),
284 .enb_on_reset = 0, 284 .enb_on_reset = 0,
285}; 285};
286 286
287struct pmx_dev_mode pmx_timer_3_4_modes[] = { 287static struct pmx_dev_mode pmx_timer_3_4_modes[] = {
288 { 288 {
289 .ids = 0xffffffff, 289 .ids = 0xffffffff,
290 .mask = PMX_TIMER_3_4_MASK, 290 .mask = PMX_TIMER_3_4_MASK,
291 }, 291 },
292}; 292};
293 293
294struct pmx_dev pmx_timer_3_4 = { 294struct pmx_dev spear3xx_pmx_timer_3_4 = {
295 .name = "timer_3_4", 295 .name = "timer_3_4",
296 .modes = pmx_timer_3_4_modes, 296 .modes = pmx_timer_3_4_modes,
297 .mode_count = ARRAY_SIZE(pmx_timer_3_4_modes), 297 .mode_count = ARRAY_SIZE(pmx_timer_3_4_modes),
298 .enb_on_reset = 0, 298 .enb_on_reset = 0,
299}; 299};
300 300
301struct pmx_dev_mode pmx_timer_1_2_modes[] = { 301static struct pmx_dev_mode pmx_timer_1_2_modes[] = {
302 { 302 {
303 .ids = 0xffffffff, 303 .ids = 0xffffffff,
304 .mask = PMX_TIMER_1_2_MASK, 304 .mask = PMX_TIMER_1_2_MASK,
305 }, 305 },
306}; 306};
307 307
308struct pmx_dev pmx_timer_1_2 = { 308struct pmx_dev spear3xx_pmx_timer_1_2 = {
309 .name = "timer_1_2", 309 .name = "timer_1_2",
310 .modes = pmx_timer_1_2_modes, 310 .modes = pmx_timer_1_2_modes,
311 .mode_count = ARRAY_SIZE(pmx_timer_1_2_modes), 311 .mode_count = ARRAY_SIZE(pmx_timer_1_2_modes),
@@ -314,210 +314,210 @@ struct pmx_dev pmx_timer_1_2 = {
314 314
315#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) 315#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
316/* plgpios devices */ 316/* plgpios devices */
317struct pmx_dev_mode pmx_plgpio_0_1_modes[] = { 317static struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {
318 { 318 {
319 .ids = 0x00, 319 .ids = 0x00,
320 .mask = PMX_FIRDA_MASK, 320 .mask = PMX_FIRDA_MASK,
321 }, 321 },
322}; 322};
323 323
324struct pmx_dev pmx_plgpio_0_1 = { 324struct pmx_dev spear3xx_pmx_plgpio_0_1 = {
325 .name = "plgpio 0 and 1", 325 .name = "plgpio 0 and 1",
326 .modes = pmx_plgpio_0_1_modes, 326 .modes = pmx_plgpio_0_1_modes,
327 .mode_count = ARRAY_SIZE(pmx_plgpio_0_1_modes), 327 .mode_count = ARRAY_SIZE(pmx_plgpio_0_1_modes),
328 .enb_on_reset = 1, 328 .enb_on_reset = 1,
329}; 329};
330 330
331struct pmx_dev_mode pmx_plgpio_2_3_modes[] = { 331static struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {
332 { 332 {
333 .ids = 0x00, 333 .ids = 0x00,
334 .mask = PMX_UART0_MASK, 334 .mask = PMX_UART0_MASK,
335 }, 335 },
336}; 336};
337 337
338struct pmx_dev pmx_plgpio_2_3 = { 338struct pmx_dev spear3xx_pmx_plgpio_2_3 = {
339 .name = "plgpio 2 and 3", 339 .name = "plgpio 2 and 3",
340 .modes = pmx_plgpio_2_3_modes, 340 .modes = pmx_plgpio_2_3_modes,
341 .mode_count = ARRAY_SIZE(pmx_plgpio_2_3_modes), 341 .mode_count = ARRAY_SIZE(pmx_plgpio_2_3_modes),
342 .enb_on_reset = 1, 342 .enb_on_reset = 1,
343}; 343};
344 344
345struct pmx_dev_mode pmx_plgpio_4_5_modes[] = { 345static struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {
346 { 346 {
347 .ids = 0x00, 347 .ids = 0x00,
348 .mask = PMX_I2C_MASK, 348 .mask = PMX_I2C_MASK,
349 }, 349 },
350}; 350};
351 351
352struct pmx_dev pmx_plgpio_4_5 = { 352struct pmx_dev spear3xx_pmx_plgpio_4_5 = {
353 .name = "plgpio 4 and 5", 353 .name = "plgpio 4 and 5",
354 .modes = pmx_plgpio_4_5_modes, 354 .modes = pmx_plgpio_4_5_modes,
355 .mode_count = ARRAY_SIZE(pmx_plgpio_4_5_modes), 355 .mode_count = ARRAY_SIZE(pmx_plgpio_4_5_modes),
356 .enb_on_reset = 1, 356 .enb_on_reset = 1,
357}; 357};
358 358
359struct pmx_dev_mode pmx_plgpio_6_9_modes[] = { 359static struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {
360 { 360 {
361 .ids = 0x00, 361 .ids = 0x00,
362 .mask = PMX_SSP_MASK, 362 .mask = PMX_SSP_MASK,
363 }, 363 },
364}; 364};
365 365
366struct pmx_dev pmx_plgpio_6_9 = { 366struct pmx_dev spear3xx_pmx_plgpio_6_9 = {
367 .name = "plgpio 6 to 9", 367 .name = "plgpio 6 to 9",
368 .modes = pmx_plgpio_6_9_modes, 368 .modes = pmx_plgpio_6_9_modes,
369 .mode_count = ARRAY_SIZE(pmx_plgpio_6_9_modes), 369 .mode_count = ARRAY_SIZE(pmx_plgpio_6_9_modes),
370 .enb_on_reset = 1, 370 .enb_on_reset = 1,
371}; 371};
372 372
373struct pmx_dev_mode pmx_plgpio_10_27_modes[] = { 373static struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {
374 { 374 {
375 .ids = 0x00, 375 .ids = 0x00,
376 .mask = PMX_MII_MASK, 376 .mask = PMX_MII_MASK,
377 }, 377 },
378}; 378};
379 379
380struct pmx_dev pmx_plgpio_10_27 = { 380struct pmx_dev spear3xx_pmx_plgpio_10_27 = {
381 .name = "plgpio 10 to 27", 381 .name = "plgpio 10 to 27",
382 .modes = pmx_plgpio_10_27_modes, 382 .modes = pmx_plgpio_10_27_modes,
383 .mode_count = ARRAY_SIZE(pmx_plgpio_10_27_modes), 383 .mode_count = ARRAY_SIZE(pmx_plgpio_10_27_modes),
384 .enb_on_reset = 1, 384 .enb_on_reset = 1,
385}; 385};
386 386
387struct pmx_dev_mode pmx_plgpio_28_modes[] = { 387static struct pmx_dev_mode pmx_plgpio_28_modes[] = {
388 { 388 {
389 .ids = 0x00, 389 .ids = 0x00,
390 .mask = PMX_GPIO_PIN0_MASK, 390 .mask = PMX_GPIO_PIN0_MASK,
391 }, 391 },
392}; 392};
393 393
394struct pmx_dev pmx_plgpio_28 = { 394struct pmx_dev spear3xx_pmx_plgpio_28 = {
395 .name = "plgpio 28", 395 .name = "plgpio 28",
396 .modes = pmx_plgpio_28_modes, 396 .modes = pmx_plgpio_28_modes,
397 .mode_count = ARRAY_SIZE(pmx_plgpio_28_modes), 397 .mode_count = ARRAY_SIZE(pmx_plgpio_28_modes),
398 .enb_on_reset = 1, 398 .enb_on_reset = 1,
399}; 399};
400 400
401struct pmx_dev_mode pmx_plgpio_29_modes[] = { 401static struct pmx_dev_mode pmx_plgpio_29_modes[] = {
402 { 402 {
403 .ids = 0x00, 403 .ids = 0x00,
404 .mask = PMX_GPIO_PIN1_MASK, 404 .mask = PMX_GPIO_PIN1_MASK,
405 }, 405 },
406}; 406};
407 407
408struct pmx_dev pmx_plgpio_29 = { 408struct pmx_dev spear3xx_pmx_plgpio_29 = {
409 .name = "plgpio 29", 409 .name = "plgpio 29",
410 .modes = pmx_plgpio_29_modes, 410 .modes = pmx_plgpio_29_modes,
411 .mode_count = ARRAY_SIZE(pmx_plgpio_29_modes), 411 .mode_count = ARRAY_SIZE(pmx_plgpio_29_modes),
412 .enb_on_reset = 1, 412 .enb_on_reset = 1,
413}; 413};
414 414
415struct pmx_dev_mode pmx_plgpio_30_modes[] = { 415static struct pmx_dev_mode pmx_plgpio_30_modes[] = {
416 { 416 {
417 .ids = 0x00, 417 .ids = 0x00,
418 .mask = PMX_GPIO_PIN2_MASK, 418 .mask = PMX_GPIO_PIN2_MASK,
419 }, 419 },
420}; 420};
421 421
422struct pmx_dev pmx_plgpio_30 = { 422struct pmx_dev spear3xx_pmx_plgpio_30 = {
423 .name = "plgpio 30", 423 .name = "plgpio 30",
424 .modes = pmx_plgpio_30_modes, 424 .modes = pmx_plgpio_30_modes,
425 .mode_count = ARRAY_SIZE(pmx_plgpio_30_modes), 425 .mode_count = ARRAY_SIZE(pmx_plgpio_30_modes),
426 .enb_on_reset = 1, 426 .enb_on_reset = 1,
427}; 427};
428 428
429struct pmx_dev_mode pmx_plgpio_31_modes[] = { 429static struct pmx_dev_mode pmx_plgpio_31_modes[] = {
430 { 430 {
431 .ids = 0x00, 431 .ids = 0x00,
432 .mask = PMX_GPIO_PIN3_MASK, 432 .mask = PMX_GPIO_PIN3_MASK,
433 }, 433 },
434}; 434};
435 435
436struct pmx_dev pmx_plgpio_31 = { 436struct pmx_dev spear3xx_pmx_plgpio_31 = {
437 .name = "plgpio 31", 437 .name = "plgpio 31",
438 .modes = pmx_plgpio_31_modes, 438 .modes = pmx_plgpio_31_modes,
439 .mode_count = ARRAY_SIZE(pmx_plgpio_31_modes), 439 .mode_count = ARRAY_SIZE(pmx_plgpio_31_modes),
440 .enb_on_reset = 1, 440 .enb_on_reset = 1,
441}; 441};
442 442
443struct pmx_dev_mode pmx_plgpio_32_modes[] = { 443static struct pmx_dev_mode pmx_plgpio_32_modes[] = {
444 { 444 {
445 .ids = 0x00, 445 .ids = 0x00,
446 .mask = PMX_GPIO_PIN4_MASK, 446 .mask = PMX_GPIO_PIN4_MASK,
447 }, 447 },
448}; 448};
449 449
450struct pmx_dev pmx_plgpio_32 = { 450struct pmx_dev spear3xx_pmx_plgpio_32 = {
451 .name = "plgpio 32", 451 .name = "plgpio 32",
452 .modes = pmx_plgpio_32_modes, 452 .modes = pmx_plgpio_32_modes,
453 .mode_count = ARRAY_SIZE(pmx_plgpio_32_modes), 453 .mode_count = ARRAY_SIZE(pmx_plgpio_32_modes),
454 .enb_on_reset = 1, 454 .enb_on_reset = 1,
455}; 455};
456 456
457struct pmx_dev_mode pmx_plgpio_33_modes[] = { 457static struct pmx_dev_mode pmx_plgpio_33_modes[] = {
458 { 458 {
459 .ids = 0x00, 459 .ids = 0x00,
460 .mask = PMX_GPIO_PIN5_MASK, 460 .mask = PMX_GPIO_PIN5_MASK,
461 }, 461 },
462}; 462};
463 463
464struct pmx_dev pmx_plgpio_33 = { 464struct pmx_dev spear3xx_pmx_plgpio_33 = {
465 .name = "plgpio 33", 465 .name = "plgpio 33",
466 .modes = pmx_plgpio_33_modes, 466 .modes = pmx_plgpio_33_modes,
467 .mode_count = ARRAY_SIZE(pmx_plgpio_33_modes), 467 .mode_count = ARRAY_SIZE(pmx_plgpio_33_modes),
468 .enb_on_reset = 1, 468 .enb_on_reset = 1,
469}; 469};
470 470
471struct pmx_dev_mode pmx_plgpio_34_36_modes[] = { 471static struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {
472 { 472 {
473 .ids = 0x00, 473 .ids = 0x00,
474 .mask = PMX_SSP_CS_MASK, 474 .mask = PMX_SSP_CS_MASK,
475 }, 475 },
476}; 476};
477 477
478struct pmx_dev pmx_plgpio_34_36 = { 478struct pmx_dev spear3xx_pmx_plgpio_34_36 = {
479 .name = "plgpio 34 to 36", 479 .name = "plgpio 34 to 36",
480 .modes = pmx_plgpio_34_36_modes, 480 .modes = pmx_plgpio_34_36_modes,
481 .mode_count = ARRAY_SIZE(pmx_plgpio_34_36_modes), 481 .mode_count = ARRAY_SIZE(pmx_plgpio_34_36_modes),
482 .enb_on_reset = 1, 482 .enb_on_reset = 1,
483}; 483};
484 484
485struct pmx_dev_mode pmx_plgpio_37_42_modes[] = { 485static struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {
486 { 486 {
487 .ids = 0x00, 487 .ids = 0x00,
488 .mask = PMX_UART0_MODEM_MASK, 488 .mask = PMX_UART0_MODEM_MASK,
489 }, 489 },
490}; 490};
491 491
492struct pmx_dev pmx_plgpio_37_42 = { 492struct pmx_dev spear3xx_pmx_plgpio_37_42 = {
493 .name = "plgpio 37 to 42", 493 .name = "plgpio 37 to 42",
494 .modes = pmx_plgpio_37_42_modes, 494 .modes = pmx_plgpio_37_42_modes,
495 .mode_count = ARRAY_SIZE(pmx_plgpio_37_42_modes), 495 .mode_count = ARRAY_SIZE(pmx_plgpio_37_42_modes),
496 .enb_on_reset = 1, 496 .enb_on_reset = 1,
497}; 497};
498 498
499struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = { 499static struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {
500 { 500 {
501 .ids = 0x00, 501 .ids = 0x00,
502 .mask = PMX_TIMER_1_2_MASK, 502 .mask = PMX_TIMER_1_2_MASK,
503 }, 503 },
504}; 504};
505 505
506struct pmx_dev pmx_plgpio_43_44_47_48 = { 506struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48 = {
507 .name = "plgpio 43, 44, 47 and 48", 507 .name = "plgpio 43, 44, 47 and 48",
508 .modes = pmx_plgpio_43_44_47_48_modes, 508 .modes = pmx_plgpio_43_44_47_48_modes,
509 .mode_count = ARRAY_SIZE(pmx_plgpio_43_44_47_48_modes), 509 .mode_count = ARRAY_SIZE(pmx_plgpio_43_44_47_48_modes),
510 .enb_on_reset = 1, 510 .enb_on_reset = 1,
511}; 511};
512 512
513struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = { 513static struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
514 { 514 {
515 .ids = 0x00, 515 .ids = 0x00,
516 .mask = PMX_TIMER_3_4_MASK, 516 .mask = PMX_TIMER_3_4_MASK,
517 }, 517 },
518}; 518};
519 519
520struct pmx_dev pmx_plgpio_45_46_49_50 = { 520struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50 = {
521 .name = "plgpio 45, 46, 49 and 50", 521 .name = "plgpio 45, 46, 49 and 50",
522 .modes = pmx_plgpio_45_46_49_50_modes, 522 .modes = pmx_plgpio_45_46_49_50_modes,
523 .mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes), 523 .mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes),
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-03 18:53:34 -0500