diff options
| -rw-r--r-- | drivers/gpu/drm/drm_dp_helper.c | 32 | ||||
| -rw-r--r-- | include/drm/drm_dp_helper.h | 2 |
2 files changed, 34 insertions, 0 deletions
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 8f11b8741e42..eae5ef963cb7 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c | |||
| @@ -860,3 +860,35 @@ void drm_dp_aux_unregister(struct drm_dp_aux *aux) | |||
| 860 | i2c_del_adapter(&aux->ddc); | 860 | i2c_del_adapter(&aux->ddc); |
| 861 | } | 861 | } |
| 862 | EXPORT_SYMBOL(drm_dp_aux_unregister); | 862 | EXPORT_SYMBOL(drm_dp_aux_unregister); |
| 863 | |||
| 864 | #define PSR_SETUP_TIME(x) [DP_PSR_SETUP_TIME_ ## x >> DP_PSR_SETUP_TIME_SHIFT] = (x) | ||
| 865 | |||
| 866 | /** | ||
| 867 | * drm_dp_psr_setup_time() - PSR setup in time usec | ||
| 868 | * @psr_cap: PSR capabilities from DPCD | ||
| 869 | * | ||
| 870 | * Returns: | ||
| 871 | * PSR setup time for the panel in microseconds, negative | ||
| 872 | * error code on failure. | ||
| 873 | */ | ||
| 874 | int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]) | ||
| 875 | { | ||
| 876 | static const u16 psr_setup_time_us[] = { | ||
| 877 | PSR_SETUP_TIME(330), | ||
| 878 | PSR_SETUP_TIME(275), | ||
| 879 | PSR_SETUP_TIME(165), | ||
| 880 | PSR_SETUP_TIME(110), | ||
| 881 | PSR_SETUP_TIME(55), | ||
| 882 | PSR_SETUP_TIME(0), | ||
| 883 | }; | ||
| 884 | int i; | ||
| 885 | |||
| 886 | i = (psr_cap[1] & DP_PSR_SETUP_TIME_MASK) >> DP_PSR_SETUP_TIME_SHIFT; | ||
| 887 | if (i >= ARRAY_SIZE(psr_setup_time_us)) | ||
| 888 | return -EINVAL; | ||
| 889 | |||
| 890 | return psr_setup_time_us[i]; | ||
| 891 | } | ||
| 892 | EXPORT_SYMBOL(drm_dp_psr_setup_time); | ||
| 893 | |||
| 894 | #undef PSR_SETUP_TIME | ||
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 72dee1213268..63b8bd502444 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h | |||
| @@ -657,6 +657,8 @@ struct edp_vsc_psr { | |||
| 657 | #define EDP_VSC_PSR_UPDATE_RFB (1<<1) | 657 | #define EDP_VSC_PSR_UPDATE_RFB (1<<1) |
| 658 | #define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2) | 658 | #define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2) |
| 659 | 659 | ||
| 660 | int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]); | ||
| 661 | |||
| 660 | static inline int | 662 | static inline int |
| 661 | drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) | 663 | drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) |
| 662 | { | 664 | { |
