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-rw-r--r--Documentation/Changes2
-rw-r--r--Documentation/devicetree/bindings/arm/amlogic.txt10
-rw-r--r--Documentation/devicetree/bindings/arm/apm/scu.txt17
-rw-r--r--Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt162
-rw-r--r--Documentation/devicetree/bindings/arm/bcm/brcm,nsp.txt34
-rw-r--r--Documentation/devicetree/bindings/arm/cpus.txt2
-rw-r--r--Documentation/devicetree/bindings/arm/fsl.txt16
-rw-r--r--Documentation/devicetree/bindings/arm/gic-v3.txt5
-rw-r--r--Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt4
-rw-r--r--Documentation/devicetree/bindings/arm/idle-states.txt2
-rw-r--r--Documentation/devicetree/bindings/arm/keystone/keystone.txt20
-rw-r--r--Documentation/devicetree/bindings/arm/pmu.txt1
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip.txt11
-rw-r--r--Documentation/devicetree/bindings/arm/samsung-boards.txt27
-rw-r--r--Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt69
-rw-r--r--Documentation/devicetree/bindings/arm/shmobile.txt10
-rw-r--r--Documentation/devicetree/bindings/board/fsl-board.txt (renamed from Documentation/devicetree/bindings/powerpc/fsl/board.txt)14
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,gcc.txt4
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,mmcc.txt4
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt4
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio.txt4
-rw-r--r--Documentation/devicetree/bindings/hwmon/pwm-fan.txt29
-rw-r--r--Documentation/devicetree/bindings/iio/accel/bma180.txt8
-rw-r--r--Documentation/devicetree/bindings/input/cypress,cyapa.txt2
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt20
-rw-r--r--Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt2
-rw-r--r--Documentation/devicetree/bindings/mfd/s2mps11.txt4
-rw-r--r--Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt3
-rw-r--r--Documentation/devicetree/bindings/power/pd-samsung.txt (renamed from Documentation/devicetree/bindings/arm/exynos/power_domain.txt)5
-rw-r--r--Documentation/devicetree/bindings/power_supply/qcom_smbb.txt131
-rw-r--r--Documentation/devicetree/bindings/regulator/pbias-regulator.txt7
-rw-r--r--Documentation/devicetree/bindings/soc/mediatek/scpsys.txt10
-rw-r--r--Documentation/devicetree/bindings/soc/qcom/qcom,smem.txt57
-rw-r--r--Documentation/devicetree/bindings/spi/spi-mt65xx.txt16
-rw-r--r--Documentation/devicetree/bindings/thermal/thermal.txt27
-rw-r--r--Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt8
-rw-r--r--Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt1
-rw-r--r--Documentation/devicetree/bindings/usb/dwc3.txt3
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt3
-rw-r--r--Documentation/gpio/board.txt40
-rw-r--r--Documentation/gpio/consumer.txt3
-rw-r--r--Documentation/hwmon/nct67754
-rw-r--r--Documentation/input/multi-touch-protocol.txt2
-rw-r--r--Documentation/networking/vrf.txt96
-rw-r--r--Documentation/power/pci.txt51
-rw-r--r--Documentation/ptp/testptp.c1
-rw-r--r--Documentation/static-keys.txt4
-rw-r--r--Documentation/sysctl/net.txt16
-rw-r--r--Documentation/thermal/power_allocator.txt2
-rw-r--r--MAINTAINERS57
-rw-r--r--Makefile2
-rw-r--r--arch/alpha/include/asm/io.h4
-rw-r--r--arch/alpha/kernel/irq.c2
-rw-r--r--arch/alpha/kernel/pci.c7
-rw-r--r--arch/alpha/lib/udelay.c1
-rw-r--r--arch/arc/include/asm/Kbuild1
-rw-r--r--arch/arc/kernel/mcip.c2
-rw-r--r--arch/arm/Kconfig26
-rw-r--r--arch/arm/Kconfig.debug3
-rw-r--r--arch/arm/Makefile8
-rw-r--r--arch/arm/boot/dts/Makefile52
-rw-r--r--arch/arm/boot/dts/am335x-base0033.dts48
-rw-r--r--arch/arm/boot/dts/am335x-bone-common.dtsi3
-rw-r--r--arch/arm/boot/dts/am335x-bonegreen.dts53
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts2
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts2
-rw-r--r--arch/arm/boot/dts/am335x-igep0033.dtsi40
-rw-r--r--arch/arm/boot/dts/am335x-phycore-som.dtsi40
-rw-r--r--arch/arm/boot/dts/am335x-wega.dtsi13
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts31
-rw-r--r--arch/arm/boot/dts/am437x-idk-evm.dts2
-rw-r--r--arch/arm/boot/dts/am437x-sk-evm.dts2
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts2
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15.dts163
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts3
-rw-r--r--arch/arm/boot/dts/armada-370-dlink-dns327l.dts3
-rw-r--r--arch/arm/boot/dts/armada-370-mirabox.dts7
-rw-r--r--arch/arm/boot/dts/armada-370-netgear-rn102.dts9
-rw-r--r--arch/arm/boot/dts/armada-370-netgear-rn104.dts9
-rw-r--r--arch/arm/boot/dts/armada-370-rd.dts3
-rw-r--r--arch/arm/boot/dts/armada-370-seagate-nas-2bay.dts36
-rw-r--r--arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts133
-rw-r--r--arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi231
-rw-r--r--arch/arm/boot/dts/armada-370-seagate-personal-cloud-2bay.dts51
-rw-r--r--arch/arm/boot/dts/armada-370-seagate-personal-cloud.dts37
-rw-r--r--arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi178
-rw-r--r--arch/arm/boot/dts/armada-370-synology-ds213j.dts3
-rw-r--r--arch/arm/boot/dts/armada-370.dtsi37
-rw-r--r--arch/arm/boot/dts/armada-375-db.dts4
-rw-r--r--arch/arm/boot/dts/armada-375.dtsi33
-rw-r--r--arch/arm/boot/dts/armada-385-db-ap.dts4
-rw-r--r--arch/arm/boot/dts/armada-385-linksys.dtsi4
-rw-r--r--arch/arm/boot/dts/armada-388-db.dts4
-rw-r--r--arch/arm/boot/dts/armada-388-gp.dts19
-rw-r--r--arch/arm/boot/dts/armada-388-rd.dts4
-rw-r--r--arch/arm/boot/dts/armada-38x.dtsi33
-rw-r--r--arch/arm/boot/dts/armada-xp-axpwifiap.dts4
-rw-r--r--arch/arm/boot/dts/armada-xp-db.dts4
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts4
-rw-r--r--arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts4
-rw-r--r--arch/arm/boot/dts/armada-xp-linksys-mamba.dts4
-rw-r--r--arch/arm/boot/dts/armada-xp-matrix.dts4
-rw-r--r--arch/arm/boot/dts/armada-xp-netgear-rn2120.dts90
-rw-r--r--arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts4
-rw-r--r--arch/arm/boot/dts/armada-xp-synology-ds414.dts4
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi35
-rw-r--r--arch/arm/boot/dts/at91-sama5d2_xplained.dts118
-rw-r--r--arch/arm/boot/dts/at91-sama5d3_xplained.dts2
-rw-r--r--arch/arm/boot/dts/at91-sama5d4_xplained.dts2
-rw-r--r--arch/arm/boot/dts/at91-sama5d4ek.dts27
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi8
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9261.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts2
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9n12ek.dts8
-rw-r--r--arch/arm/boot/dts/at91sam9rl.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9x5ek.dtsi8
-rw-r--r--arch/arm/boot/dts/axp209.dtsi5
-rw-r--r--arch/arm/boot/dts/axp22x.dtsi143
-rw-r--r--arch/arm/boot/dts/bcm-cygnus.dtsi334
-rw-r--r--arch/arm/boot/dts/bcm-nsp.dtsi119
-rw-r--r--arch/arm/boot/dts/bcm4708-netgear-r6250.dts11
-rw-r--r--arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts1
-rw-r--r--arch/arm/boot/dts/bcm4709-netgear-r7000.dts106
-rw-r--r--arch/arm/boot/dts/bcm7445.dtsi84
-rw-r--r--arch/arm/boot/dts/bcm911360_entphn.dts28
-rw-r--r--arch/arm/boot/dts/bcm911360k.dts9
-rw-r--r--arch/arm/boot/dts/bcm958300k.dts44
-rw-r--r--arch/arm/boot/dts/bcm958305k.dts40
-rw-r--r--arch/arm/boot/dts/bcm958625k.dts57
-rw-r--r--arch/arm/boot/dts/bcm9hmidc.dtsi42
-rw-r--r--arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts3
-rw-r--r--arch/arm/boot/dts/berlin2.dtsi23
-rw-r--r--arch/arm/boot/dts/berlin2cd-google-chromecast.dts3
-rw-r--r--arch/arm/boot/dts/berlin2cd.dtsi20
-rw-r--r--arch/arm/boot/dts/berlin2q-marvell-dmp.dts3
-rw-r--r--arch/arm/boot/dts/berlin2q.dtsi23
-rw-r--r--arch/arm/boot/dts/cx92755.dtsi7
-rw-r--r--arch/arm/boot/dts/cx92755_equinox.dts9
-rw-r--r--arch/arm/boot/dts/dm8148-evm.dts4
-rw-r--r--arch/arm/boot/dts/dm8148-t410.dts6
-rw-r--r--arch/arm/boot/dts/dm814x.dtsi8
-rw-r--r--arch/arm/boot/dts/dove.dtsi17
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts222
-rw-r--r--arch/arm/boot/dts/dra7.dtsi65
-rw-r--r--arch/arm/boot/dts/dra72-evm.dts162
-rw-r--r--arch/arm/boot/dts/dra72x.dtsi21
-rw-r--r--arch/arm/boot/dts/dra74x.dtsi51
-rw-r--r--arch/arm/boot/dts/exynos3250-monk.dts9
-rw-r--r--arch/arm/boot/dts/exynos3250-rinato.dts11
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi8
-rw-r--r--arch/arm/boot/dts/exynos4210-origen.dts15
-rw-r--r--arch/arm/boot/dts/exynos4210-smdkv310.dts3
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts31
-rw-r--r--arch/arm/boot/dts/exynos4210-universal_c210.dts44
-rw-r--r--arch/arm/boot/dts/exynos4412-odroid-common.dtsi27
-rw-r--r--arch/arm/boot/dts/exynos4412-odroidu3.dts45
-rw-r--r--arch/arm/boot/dts/exynos4412-odroidx.dts8
-rw-r--r--arch/arm/boot/dts/exynos4412-origen.dts15
-rw-r--r--arch/arm/boot/dts/exynos4412-tiny4412.dts9
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts140
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi1
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts8
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts16
-rw-r--r--arch/arm/boot/dts/exynos5250-snow-common.dtsi684
-rw-r--r--arch/arm/boot/dts/exynos5250-snow-rev5.dts47
-rw-r--r--arch/arm/boot/dts/exynos5250-snow.dts671
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos5420-arndale-octa.dts3
-rw-r--r--arch/arm/boot/dts/exynos5420-peach-pit.dts9
-rw-r--r--arch/arm/boot/dts/exynos5420-smdk5420.dts14
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi61
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi103
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts51
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu3.dts51
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu4.dts48
-rw-r--r--arch/arm/boot/dts/exynos5440-ssdk5440.dts5
-rw-r--r--arch/arm/boot/dts/exynos5800-peach-pi.dts9
-rw-r--r--arch/arm/boot/dts/hi3620-hi4511.dts3
-rw-r--r--arch/arm/boot/dts/hisi-x5hd2-dkb.dts2
-rw-r--r--arch/arm/boot/dts/imx23.dtsi6
-rw-r--r--arch/arm/boot/dts/imx28-evk.dts2
-rw-r--r--arch/arm/boot/dts/imx28-m28evk.dts2
-rw-r--r--arch/arm/boot/dts/imx28.dtsi6
-rw-r--r--arch/arm/boot/dts/imx31.dtsi2
-rw-r--r--arch/arm/boot/dts/imx35.dtsi2
-rw-r--r--arch/arm/boot/dts/imx50-evk.dts2
-rw-r--r--arch/arm/boot/dts/imx53-smd.dts2
-rw-r--r--arch/arm/boot/dts/imx6dl-nit6xlite.dts49
-rw-r--r--arch/arm/boot/dts/imx6dl-nitrogen6x.dts44
-rw-r--r--arch/arm/boot/dts/imx6dl-rex-basic.dts2
-rw-r--r--arch/arm/boot/dts/imx6dl-sabrelite.dts40
-rw-r--r--arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts2
-rw-r--r--arch/arm/boot/dts/imx6q-gw5400-a.dts2
-rw-r--r--arch/arm/boot/dts/imx6q-nitrogen6_max.dts53
-rw-r--r--arch/arm/boot/dts/imx6q-nitrogen6x.dts44
-rw-r--r--arch/arm/boot/dts/imx6q-rex-pro.dts2
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts40
-rw-r--r--arch/arm/boot/dts/imx6qdl-aristainetos.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi630
-rw-r--r--arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi873
-rw-r--r--arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi189
-rw-r--r--arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi6
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabreauto.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabrelite.dtsi118
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6sl-evk.dts2
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi21
-rw-r--r--arch/arm/boot/dts/imx6sx-sdb-reva.dts4
-rw-r--r--arch/arm/boot/dts/imx6sx-sdb.dts4
-rw-r--r--arch/arm/boot/dts/imx6sx-sdb.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6ul-14x14-evk.dts22
-rw-r--r--arch/arm/boot/dts/imx6ul.dtsi29
-rw-r--r--arch/arm/boot/dts/imx7d-pinfunc.h122
-rw-r--r--arch/arm/boot/dts/imx7d-sdb.dts100
-rw-r--r--arch/arm/boot/dts/imx7d.dtsi165
-rw-r--r--arch/arm/boot/dts/k2e-evm.dts2
-rw-r--r--arch/arm/boot/dts/k2e-netcp.dtsi23
-rw-r--r--arch/arm/boot/dts/k2e.dtsi3
-rw-r--r--arch/arm/boot/dts/k2hk-evm.dts2
-rw-r--r--arch/arm/boot/dts/k2hk-netcp.dtsi24
-rw-r--r--arch/arm/boot/dts/k2hk.dtsi3
-rw-r--r--arch/arm/boot/dts/k2l-evm.dts2
-rw-r--r--arch/arm/boot/dts/k2l-netcp.dtsi23
-rw-r--r--arch/arm/boot/dts/k2l.dtsi3
-rw-r--r--arch/arm/boot/dts/keystone.dtsi7
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi29
-rw-r--r--arch/arm/boot/dts/lpc18xx.dtsi134
-rw-r--r--arch/arm/boot/dts/lpc4350-hitex-eval.dts175
-rw-r--r--arch/arm/boot/dts/lpc4357-ea4357-devkit.dts95
-rw-r--r--arch/arm/boot/dts/ls1021a-twr.dts13
-rw-r--r--arch/arm/boot/dts/ls1021a.dtsi44
-rw-r--r--arch/arm/boot/dts/meson.dtsi23
-rw-r--r--arch/arm/boot/dts/meson8b-mxq.dts67
-rw-r--r--arch/arm/boot/dts/meson8b-odroidc1.dts67
-rw-r--r--arch/arm/boot/dts/meson8b.dtsi186
-rw-r--r--arch/arm/boot/dts/mt8127.dtsi27
-rw-r--r--arch/arm/boot/dts/mt8135-evbp1.dts23
-rw-r--r--arch/arm/boot/dts/mt8135.dtsi27
-rw-r--r--arch/arm/boot/dts/nspire.dtsi2
-rw-r--r--arch/arm/boot/dts/omap2420-n8x0-common.dtsi6
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi3
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts2
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts4
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3x.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-evm-common.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-gta04.dtsi10
-rw-r--r--arch/arm/boot/dts/omap3-gta04a5.dts2
-rw-r--r--arch/arm/boot/dts/omap3-igep.dtsi76
-rw-r--r--arch/arm/boot/dts/omap3-igep0020-common.dtsi66
-rw-r--r--arch/arm/boot/dts/omap3-igep0020-rev-f.dts2
-rw-r--r--arch/arm/boot/dts/omap3-igep0020.dts11
-rw-r--r--arch/arm/boot/dts/omap3-igep0030-common.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-igep0030-rev-g.dts2
-rw-r--r--arch/arm/boot/dts/omap3-igep0030.dts2
-rw-r--r--arch/arm/boot/dts/omap3-ldp.dts2
-rw-r--r--arch/arm/boot/dts/omap3-lilly-a83x.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-lilly-dbb056.dts4
-rw-r--r--arch/arm/boot/dts/omap3-n950-n9.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-overo-base.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-pandora-common.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-tao3530.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-zoom3.dts2
-rw-r--r--arch/arm/boot/dts/omap3.dtsi25
-rw-r--r--arch/arm/boot/dts/omap4-panda-common.dtsi4
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts6
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-rw-r--r--tools/testing/selftests/membarrier/Makefile7
-rw-r--r--tools/testing/selftests/membarrier/membarrier_test.c5
-rw-r--r--tools/testing/selftests/mqueue/Makefile10
-rw-r--r--tools/testing/selftests/seccomp/seccomp_bpf.c37
-rw-r--r--tools/testing/selftests/seccomp/test_harness.h7
-rw-r--r--tools/testing/selftests/vm/Makefile9
-rw-r--r--tools/testing/selftests/vm/userfaultfd.c52
-rw-r--r--tools/testing/selftests/x86/entry_from_vm86.c5
-rwxr-xr-xtools/testing/selftests/zram/zram.sh10
-rwxr-xr-xtools/testing/selftests/zram/zram_lib.sh3
-rw-r--r--tools/virtio/Makefile2
-rw-r--r--tools/virtio/asm/barrier.h2
-rw-r--r--tools/virtio/linux/export.h3
-rw-r--r--tools/virtio/linux/kernel.h8
-rw-r--r--virt/kvm/arm/arch_timer.c8
-rw-r--r--virt/kvm/arm/vgic-v3.c2
-rw-r--r--virt/kvm/arm/vgic.c42
-rw-r--r--virt/kvm/coalesced_mmio.h4
-rw-r--r--virt/kvm/eventfd.c124
-rw-r--r--virt/kvm/kvm_main.c27
1586 files changed, 29229 insertions, 11736 deletions
diff --git a/Documentation/Changes b/Documentation/Changes
index 6d8863004858..f447f0516f07 100644
--- a/Documentation/Changes
+++ b/Documentation/Changes
@@ -43,7 +43,7 @@ o udev 081 # udevd --version
43o grub 0.93 # grub --version || grub-install --version 43o grub 0.93 # grub --version || grub-install --version
44o mcelog 0.6 # mcelog --version 44o mcelog 0.6 # mcelog --version
45o iptables 1.4.2 # iptables -V 45o iptables 1.4.2 # iptables -V
46o openssl & libcrypto 1.0.1k # openssl version 46o openssl & libcrypto 1.0.0 # openssl version
47 47
48 48
49Kernel compilation 49Kernel compilation
diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt
index 973884a1bacf..1dfee20eee74 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.txt
+++ b/Documentation/devicetree/bindings/arm/amlogic.txt
@@ -9,6 +9,12 @@ Boards with the Amlogic Meson8 SoC shall have the following properties:
9 Required root node property: 9 Required root node property:
10 compatible: "amlogic,meson8"; 10 compatible: "amlogic,meson8";
11 11
12Boards with the Amlogic Meson8b SoC shall have the following properties:
13 Required root node property:
14 compatible: "amlogic,meson8b";
15
12Board compatible values: 16Board compatible values:
13 - "geniatech,atv1200" 17 - "geniatech,atv1200" (Meson6)
14 - "minix,neo-x8" 18 - "minix,neo-x8" (Meson8)
19 - "tronfy,mxq" (Meson8b)
20 - "hardkernel,odroid-c1" (Meson8b)
diff --git a/Documentation/devicetree/bindings/arm/apm/scu.txt b/Documentation/devicetree/bindings/arm/apm/scu.txt
new file mode 100644
index 000000000000..b45be06625fd
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/apm/scu.txt
@@ -0,0 +1,17 @@
1APM X-GENE SoC series SCU Registers
2
3This system clock unit contain various register that control block resets,
4clock enable/disables, clock divisors and other deepsleep registers.
5
6Properties:
7 - compatible : should contain two values. First value must be:
8 - "apm,xgene-scu"
9 second value must be always "syscon".
10
11 - reg : offset and length of the register set.
12
13Example :
14 scu: system-clk-controller@17000000 {
15 compatible = "apm,xgene-scu","syscon";
16 reg = <0x0 0x17000000 0x0 0x400>;
17 };
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
index 430608ec09f0..0d0c1ae81bed 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
@@ -20,6 +20,25 @@ system control is required:
20 - compatible: "brcm,bcm<chip_id>-hif-cpubiuctrl", "syscon" 20 - compatible: "brcm,bcm<chip_id>-hif-cpubiuctrl", "syscon"
21 - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon" 21 - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"
22 22
23hif-cpubiuctrl node
24-------------------
25SoCs with Broadcom Brahma15 ARM-based CPUs have a specific Bus Interface Unit
26(BIU) block which controls and interfaces the CPU complex to the different
27Memory Controller Ports (MCP), one per memory controller (MEMC). This BIU block
28offers a feature called Write Pairing which consists in collapsing two adjacent
29cache lines into a single (bursted) write transaction towards the memory
30controller (MEMC) to maximize write bandwidth.
31
32Required properties:
33
34 - compatible: must be "brcm,bcm7445-hif-cpubiuctrl", "syscon"
35
36Optional properties:
37
38 - brcm,write-pairing:
39 Boolean property, which when present indicates that the chip
40 supports write-pairing.
41
23example: 42example:
24 rdb { 43 rdb {
25 #address-cells = <1>; 44 #address-cells = <1>;
@@ -35,6 +54,7 @@ example:
35 hif_cpubiuctrl: syscon@3e2400 { 54 hif_cpubiuctrl: syscon@3e2400 {
36 compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon"; 55 compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon";
37 reg = <0x3e2400 0x5b4>; 56 reg = <0x3e2400 0x5b4>;
57 brcm,write-pairing;
38 }; 58 };
39 59
40 hif_continuation: syscon@452000 { 60 hif_continuation: syscon@452000 {
@@ -43,8 +63,7 @@ example:
43 }; 63 };
44 }; 64 };
45 65
46Lastly, nodes that allow for support of SMP initialization and reboot are 66Nodes that allow for support of SMP initialization and reboot are required:
47required:
48 67
49smpboot 68smpboot
50------- 69-------
@@ -95,3 +114,142 @@ example:
95 compatible = "brcm,brcmstb-reboot"; 114 compatible = "brcm,brcmstb-reboot";
96 syscon = <&sun_top_ctrl 0x304 0x308>; 115 syscon = <&sun_top_ctrl 0x304 0x308>;
97 }; 116 };
117
118
119
120Power management
121----------------
122
123For power management (particularly, S2/S3/S5 system suspend), the following SoC
124components are needed:
125
126= Always-On control block (AON CTRL)
127
128This hardware provides control registers for the "always-on" (even in low-power
129modes) hardware, such as the Power Management State Machine (PMSM).
130
131Required properties:
132- compatible : should contain "brcm,brcmstb-aon-ctrl"
133- reg : the register start and length for the AON CTRL block
134
135Example:
136
137aon-ctrl@410000 {
138 compatible = "brcm,brcmstb-aon-ctrl";
139 reg = <0x410000 0x400>;
140};
141
142= Memory controllers
143
144A Broadcom STB SoC typically has a number of independent memory controllers,
145each of which may have several associated hardware blocks, which are versioned
146independently (control registers, DDR PHYs, etc.). One might consider
147describing these controllers as a parent "memory controllers" block, which
148contains N sub-nodes (one for each controller in the system), each of which is
149associated with a number of hardware register resources (e.g., its PHY). See
150the example device tree snippet below.
151
152== MEMC (MEMory Controller)
153
154Represents a single memory controller instance.
155
156Required properties:
157- compatible : should contain "brcm,brcmstb-memc" and "simple-bus"
158
159Should contain subnodes for any of the following relevant hardware resources:
160
161== DDR PHY control
162
163Control registers for this memory controller's DDR PHY.
164
165Required properties:
166- compatible : should contain one of these
167 "brcm,brcmstb-ddr-phy-v225.1"
168 "brcm,brcmstb-ddr-phy-v240.1"
169 "brcm,brcmstb-ddr-phy-v240.2"
170
171- reg : the DDR PHY register range
172
173== DDR SHIMPHY
174
175Control registers for this memory controller's DDR SHIMPHY.
176
177Required properties:
178- compatible : should contain "brcm,brcmstb-ddr-shimphy-v1.0"
179- reg : the DDR SHIMPHY register range
180
181== MEMC DDR control
182
183Sequencer DRAM parameters and control registers. Used for Self-Refresh
184Power-Down (SRPD), among other things.
185
186Required properties:
187- compatible : should contain "brcm,brcmstb-memc-ddr"
188- reg : the MEMC DDR register range
189
190Example:
191
192memory_controllers {
193 ranges;
194 compatible = "simple-bus";
195
196 memc@0 {
197 compatible = "brcm,brcmstb-memc", "simple-bus";
198 ranges;
199
200 ddr-phy@f1106000 {
201 compatible = "brcm,brcmstb-ddr-phy-v240.1";
202 reg = <0xf1106000 0x21c>;
203 };
204
205 shimphy@f1108000 {
206 compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
207 reg = <0xf1108000 0xe4>;
208 };
209
210 memc-ddr@f1102000 {
211 reg = <0xf1102000 0x800>;
212 compatible = "brcm,brcmstb-memc-ddr";
213 };
214 };
215
216 memc@1 {
217 compatible = "brcm,brcmstb-memc", "simple-bus";
218 ranges;
219
220 ddr-phy@f1186000 {
221 compatible = "brcm,brcmstb-ddr-phy-v240.1";
222 reg = <0xf1186000 0x21c>;
223 };
224
225 shimphy@f1188000 {
226 compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
227 reg = <0xf1188000 0xe4>;
228 };
229
230 memc-ddr@f1182000 {
231 reg = <0xf1182000 0x800>;
232 compatible = "brcm,brcmstb-memc-ddr";
233 };
234 };
235
236 memc@2 {
237 compatible = "brcm,brcmstb-memc", "simple-bus";
238 ranges;
239
240 ddr-phy@f1206000 {
241 compatible = "brcm,brcmstb-ddr-phy-v240.1";
242 reg = <0xf1206000 0x21c>;
243 };
244
245 shimphy@f1208000 {
246 compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
247 reg = <0xf1208000 0xe4>;
248 };
249
250 memc-ddr@f1202000 {
251 reg = <0xf1202000 0x800>;
252 compatible = "brcm,brcmstb-memc-ddr";
253 };
254 };
255};
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.txt
new file mode 100644
index 000000000000..eae53e4556be
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.txt
@@ -0,0 +1,34 @@
1Broadcom Northstar Plus device tree bindings
2--------------------------------------------
3
4Broadcom Northstar Plus family of SoCs are used for switching control
5and management applications as well as residential router/gateway
6applications. The SoC features dual core Cortex A9 ARM CPUs, integrating
7several peripheral interfaces including multiple Gigabit Ethernet PHYs,
8DDR3 memory, PCIE Gen-2, USB 2.0 and USB 3.0, serial and NAND flash,
9SATA and several other IO controllers.
10
11Boards with Northstar Plus SoCs shall have the following properties:
12
13Required root node property:
14
15BCM58522
16compatible = "brcm,bcm58522", "brcm,nsp";
17
18BCM58525
19compatible = "brcm,bcm58525", "brcm,nsp";
20
21BCM58535
22compatible = "brcm,bcm58535", "brcm,nsp";
23
24BCM58622
25compatible = "brcm,bcm58622", "brcm,nsp";
26
27BCM58623
28compatible = "brcm,bcm58623", "brcm,nsp";
29
30BCM58625
31compatible = "brcm,bcm58625", "brcm,nsp";
32
33BCM88312
34compatible = "brcm,bcm88312", "brcm,nsp";
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 91e6e5c478d0..3a07a87fef20 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -195,6 +195,8 @@ nodes to be present and contain the properties described below.
195 "marvell,armada-380-smp" 195 "marvell,armada-380-smp"
196 "marvell,armada-390-smp" 196 "marvell,armada-390-smp"
197 "marvell,armada-xp-smp" 197 "marvell,armada-xp-smp"
198 "mediatek,mt6589-smp"
199 "mediatek,mt81xx-tz-smp"
198 "qcom,gcc-msm8660" 200 "qcom,gcc-msm8660"
199 "qcom,kpss-acc-v1" 201 "qcom,kpss-acc-v1"
200 "qcom,kpss-acc-v2" 202 "qcom,kpss-acc-v2"
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index 2a3ba73f0c5c..34c88b0c7ab4 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -128,10 +128,18 @@ Example:
128 reg = <0x0 0x1ee0000 0x0 0x10000>; 128 reg = <0x0 0x1ee0000 0x0 0x10000>;
129 }; 129 };
130 130
131Freescale LS2085A SoC Device Tree Bindings 131Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
132------------------------------------------ 132----------------------------------------------------------------
133 133
134LS2085A ARMv8 based Simulator model 134LS2080A ARMv8 based Simulator model
135Required root node properties: 135Required root node properties:
136 - compatible = "fsl,ls2085a-simu", "fsl,ls2085a"; 136 - compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
137
138LS2080A ARMv8 based QDS Board
139Required root node properties:
140 - compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
141
142LS2080A ARMv8 based RDB Board
143Required root node properties:
144 - compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
137 145
diff --git a/Documentation/devicetree/bindings/arm/gic-v3.txt b/Documentation/devicetree/bindings/arm/gic-v3.txt
index ddfade40ac59..7803e77d85cb 100644
--- a/Documentation/devicetree/bindings/arm/gic-v3.txt
+++ b/Documentation/devicetree/bindings/arm/gic-v3.txt
@@ -57,6 +57,8 @@ used to route Message Signalled Interrupts (MSI) to the CPUs.
57These nodes must have the following properties: 57These nodes must have the following properties:
58- compatible : Should at least contain "arm,gic-v3-its". 58- compatible : Should at least contain "arm,gic-v3-its".
59- msi-controller : Boolean property. Identifies the node as an MSI controller 59- msi-controller : Boolean property. Identifies the node as an MSI controller
60- #msi-cells: Must be <1>. The single msi-cell is the DeviceID of the device
61 which will generate the MSI.
60- reg: Specifies the base physical address and size of the ITS 62- reg: Specifies the base physical address and size of the ITS
61 registers. 63 registers.
62 64
@@ -83,6 +85,7 @@ Examples:
83 gic-its@2c200000 { 85 gic-its@2c200000 {
84 compatible = "arm,gic-v3-its"; 86 compatible = "arm,gic-v3-its";
85 msi-controller; 87 msi-controller;
88 #msi-cells = <1>;
86 reg = <0x0 0x2c200000 0 0x200000>; 89 reg = <0x0 0x2c200000 0 0x200000>;
87 }; 90 };
88 }; 91 };
@@ -107,12 +110,14 @@ Examples:
107 gic-its@2c200000 { 110 gic-its@2c200000 {
108 compatible = "arm,gic-v3-its"; 111 compatible = "arm,gic-v3-its";
109 msi-controller; 112 msi-controller;
113 #msi-cells = <1>;
110 reg = <0x0 0x2c200000 0 0x200000>; 114 reg = <0x0 0x2c200000 0 0x200000>;
111 }; 115 };
112 116
113 gic-its@2c400000 { 117 gic-its@2c400000 {
114 compatible = "arm,gic-v3-its"; 118 compatible = "arm,gic-v3-its";
115 msi-controller; 119 msi-controller;
120 #msi-cells = <1>;
116 reg = <0x0 0x2c400000 0 0x200000>; 121 reg = <0x0 0x2c400000 0 0x200000>;
117 }; 122 };
118 }; 123 };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index c733e28e18e5..3504dcae44ae 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -20,6 +20,10 @@ HiKey Board
20Required root node properties: 20Required root node properties:
21 - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; 21 - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
22 22
23HiP05 D02 Board
24Required root node properties:
25 - compatible = "hisilicon,hip05-d02";
26
23Hisilicon system controller 27Hisilicon system controller
24 28
25Required properties: 29Required properties:
diff --git a/Documentation/devicetree/bindings/arm/idle-states.txt b/Documentation/devicetree/bindings/arm/idle-states.txt
index a8274eabae2e..b8e41c148a3c 100644
--- a/Documentation/devicetree/bindings/arm/idle-states.txt
+++ b/Documentation/devicetree/bindings/arm/idle-states.txt
@@ -497,7 +497,7 @@ cpus {
497 }; 497 };
498 498
499 idle-states { 499 idle-states {
500 entry-method = "arm,psci"; 500 entry-method = "psci";
501 501
502 CPU_RETENTION_0_0: cpu-retention-0-0 { 502 CPU_RETENTION_0_0: cpu-retention-0-0 {
503 compatible = "arm,idle-state"; 503 compatible = "arm,idle-state";
diff --git a/Documentation/devicetree/bindings/arm/keystone/keystone.txt b/Documentation/devicetree/bindings/arm/keystone/keystone.txt
index 59d7a46f85eb..3090a8a008c0 100644
--- a/Documentation/devicetree/bindings/arm/keystone/keystone.txt
+++ b/Documentation/devicetree/bindings/arm/keystone/keystone.txt
@@ -9,12 +9,26 @@ Required properties:
9 the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550 9 the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550
10 type UART should use the specified compatible for those devices. 10 type UART should use the specified compatible for those devices.
11 11
12SoC families:
13
14- Keystone 2 generic SoC:
15 compatible = "ti,keystone"
16
17SoCs:
18
19- Keystone 2 Hawking/Kepler
20 compatible = "ti,k2hk", "ti,keystone"
21- Keystone 2 Lamarr
22 compatible = "ti,k2l", "ti,keystone"
23- Keystone 2 Edison
24 compatible = "ti,k2e", "ti,keystone"
25
12Boards: 26Boards:
13- Keystone 2 Hawking/Kepler EVM 27- Keystone 2 Hawking/Kepler EVM
14 compatible = "ti,k2hk-evm","ti,keystone" 28 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone"
15 29
16- Keystone 2 Lamarr EVM 30- Keystone 2 Lamarr EVM
17 compatible = "ti,k2l-evm","ti,keystone" 31 compatible = "ti,k2l-evm", "ti, k2l", "ti,keystone"
18 32
19- Keystone 2 Edison EVM 33- Keystone 2 Edison EVM
20 compatible = "ti,k2e-evm","ti,keystone" 34 compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone"
diff --git a/Documentation/devicetree/bindings/arm/pmu.txt b/Documentation/devicetree/bindings/arm/pmu.txt
index 435251fa9ce0..80625ae59e08 100644
--- a/Documentation/devicetree/bindings/arm/pmu.txt
+++ b/Documentation/devicetree/bindings/arm/pmu.txt
@@ -7,6 +7,7 @@ representation in the device tree should be done as under:-
7Required properties: 7Required properties:
8 8
9- compatible : should be one of 9- compatible : should be one of
10 "apm,potenza-pmu"
10 "arm,armv8-pmuv3" 11 "arm,armv8-pmuv3"
11 "arm,cortex-a17-pmu" 12 "arm,cortex-a17-pmu"
12 "arm,cortex-a15-pmu" 13 "arm,cortex-a15-pmu"
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index af58cd74aeff..8e985dd2f181 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -17,6 +17,10 @@ Rockchip platforms device tree bindings
17 Required root node properties: 17 Required root node properties:
18 - compatible = "radxa,rock", "rockchip,rk3188"; 18 - compatible = "radxa,rock", "rockchip,rk3188";
19 19
20- Radxa Rock2 Square board:
21 Required root node properties:
22 - compatible = "radxa,rock2-square", "rockchip,rk3288";
23
20- Firefly Firefly-RK3288 board: 24- Firefly Firefly-RK3288 board:
21 Required root node properties: 25 Required root node properties:
22 - compatible = "firefly,firefly-rk3288", "rockchip,rk3288"; 26 - compatible = "firefly,firefly-rk3288", "rockchip,rk3288";
@@ -31,6 +35,13 @@ Rockchip platforms device tree bindings
31 Required root node properties: 35 Required root node properties:
32 - compatible = "netxeon,r89", "rockchip,rk3288"; 36 - compatible = "netxeon,r89", "rockchip,rk3288";
33 37
38- Google Jaq (Haier Chromebook 11 and more):
39 Required root node properties:
40 - compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
41 "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
42 "google,veyron-jaq-rev1", "google,veyron-jaq",
43 "google,veyron", "rockchip,rk3288";
44
34- Google Jerry (Hisense Chromebook C11 and more): 45- Google Jerry (Hisense Chromebook C11 and more):
35 Required root node properties: 46 Required root node properties:
36 - compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6", 47 - compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
diff --git a/Documentation/devicetree/bindings/arm/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung-boards.txt
deleted file mode 100644
index 43589d2466a7..000000000000
--- a/Documentation/devicetree/bindings/arm/samsung-boards.txt
+++ /dev/null
@@ -1,27 +0,0 @@
1* Samsung's Exynos SoC based boards
2
3Required root node properties:
4 - compatible = should be one or more of the following.
5 - "samsung,monk" - for Exynos3250-based Samsung Simband board.
6 - "samsung,rinato" - for Exynos3250-based Samsung Gear2 board.
7 - "samsung,smdkv310" - for Exynos4210-based Samsung SMDKV310 eval board.
8 - "samsung,trats" - for Exynos4210-based Tizen Reference board.
9 - "samsung,universal_c210" - for Exynos4210-based Samsung board.
10 - "samsung,smdk4412", - for Exynos4412-based Samsung SMDK4412 eval board.
11 - "samsung,trats2" - for Exynos4412-based Tizen Reference board.
12 - "samsung,smdk5250" - for Exynos5250-based Samsung SMDK5250 eval board.
13 - "samsung,xyref5260" - for Exynos5260-based Samsung board.
14 - "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
15 - "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
16 - "samsung,sd5v1" - for Exynos5440-based Samsung board.
17 - "samsung,ssdk5440" - for Exynos5440-based Samsung board.
18
19Optional:
20 - firmware node, specifying presence and type of secure firmware:
21 - compatible: only "samsung,secure-firmware" is currently supported
22 - reg: address of non-secure SYSRAM used for communication with firmware
23
24 firmware@0203F000 {
25 compatible = "samsung,secure-firmware";
26 reg = <0x0203F000 0x1000>;
27 };
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
new file mode 100644
index 000000000000..12129c011c8f
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
@@ -0,0 +1,69 @@
1* Samsung's Exynos SoC based boards
2
3Required root node properties:
4 - compatible = should be one or more of the following.
5 - "samsung,monk" - for Exynos3250-based Samsung Simband board.
6 - "samsung,rinato" - for Exynos3250-based Samsung Gear2 board.
7 - "samsung,smdkv310" - for Exynos4210-based Samsung SMDKV310 eval board.
8 - "samsung,trats" - for Exynos4210-based Tizen Reference board.
9 - "samsung,universal_c210" - for Exynos4210-based Samsung board.
10 - "samsung,smdk4412", - for Exynos4412-based Samsung SMDK4412 eval board.
11 - "samsung,trats2" - for Exynos4412-based Tizen Reference board.
12 - "samsung,smdk5250" - for Exynos5250-based Samsung SMDK5250 eval board.
13 - "samsung,xyref5260" - for Exynos5260-based Samsung board.
14 - "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
15 - "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
16 - "samsung,sd5v1" - for Exynos5440-based Samsung board.
17 - "samsung,ssdk5440" - for Exynos5440-based Samsung board.
18
19* Other companies Exynos SoC based
20 * FriendlyARM
21 - "friendlyarm,tiny4412" - for Exynos4412-based FriendlyARM
22 TINY4412 board.
23
24 * Google
25 - "google,pi" - for Exynos5800-based Google Peach Pi
26 Rev 10+ board,
27 also: "google,pi-rev16", "google,pi-rev15", "google,pi-rev14",
28 "google,pi-rev13", "google,pi-rev12", "google,pi-rev11",
29 "google,pi-rev10", "google,peach".
30
31 - "google,pit" - for Exynos5420-based Google Peach Pit
32 Rev 6+ (Exynos5420),
33 also: "google,pit-rev16", "google,pit-rev15", "google,pit-rev14",
34 "google,pit-rev13", "google,pit-rev12", "google,pit-rev11",
35 "google,pit-rev10", "google,pit-rev9", "google,pit-rev8",
36 "google,pit-rev7", "google,pit-rev6", "google,peach".
37
38 - "google,snow-rev4" - for Exynos5250-based Google Snow board,
39 also: "google,snow"
40 - "google,snow-rev5" - for Exynos5250-based Google Snow
41 Rev 5+ board.
42 - "google,spring" - for Exynos5250-based Google Spring board.
43
44 * Hardkernel
45 - "hardkernel,odroid-u3" - for Exynos4412-based Hardkernel Odroid U3.
46 - "hardkernel,odroid-x" - for Exynos4412-based Hardkernel Odroid X.
47 - "hardkernel,odroid-x2" - for Exynos4412-based Hardkernel Odroid X2.
48 - "hardkernel,odroid-xu3" - for Exynos5422-based Hardkernel Odroid XU3.
49 - "hardkernel,odroid-xu3-lite" - for Exynos5422-based Hardkernel
50 Odroid XU3 Lite board.
51 - "hardkernel,odroid-xu4" - for Exynos5422-based Hardkernel Odroid XU4.
52
53 * Insignal
54 - "insignal,arndale" - for Exynos5250-based Insignal Arndale board.
55 - "insignal,arndale-octa" - for Exynos5420-based Insignal Arndale
56 Octa board.
57 - "insignal,origen" - for Exynos4210-based Insignal Origen board.
58 - "insignal,origen4412 - for Exynos4412-based Insignal Origen board.
59
60
61Optional nodes:
62 - firmware node, specifying presence and type of secure firmware:
63 - compatible: only "samsung,secure-firmware" is currently supported
64 - reg: address of non-secure SYSRAM used for communication with firmware
65
66 firmware@0203F000 {
67 compatible = "samsung,secure-firmware";
68 reg = <0x0203F000 0x1000>;
69 };
diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
index c4f19b2e7dd9..40bb9007cd0d 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -39,8 +39,6 @@ Boards:
39 compatible = "renesas,armadillo800eva" 39 compatible = "renesas,armadillo800eva"
40 - BOCK-W 40 - BOCK-W
41 compatible = "renesas,bockw", "renesas,r8a7778" 41 compatible = "renesas,bockw", "renesas,r8a7778"
42 - BOCK-W - Reference Device Tree Implementation
43 compatible = "renesas,bockw-reference", "renesas,r8a7778"
44 - Genmai (RTK772100BC00000BR) 42 - Genmai (RTK772100BC00000BR)
45 compatible = "renesas,genmai", "renesas,r7s72100" 43 compatible = "renesas,genmai", "renesas,r7s72100"
46 - Gose 44 - Gose
@@ -57,7 +55,7 @@ Boards:
57 compatible = "renesas,lager", "renesas,r8a7790" 55 compatible = "renesas,lager", "renesas,r8a7790"
58 - Marzen 56 - Marzen
59 compatible = "renesas,marzen", "renesas,r8a7779" 57 compatible = "renesas,marzen", "renesas,r8a7779"
60 58 - Porter (M2-LCDP)
61Note: Reference Device Tree Implementations are temporary implementations 59 compatible = "renesas,porter", "renesas,r8a7791"
62 to ease the migration from platform devices to Device Tree, and are 60 - SILK (RTP0RC7794LCB00011S)
63 intended to be removed in the future. 61 compatible = "renesas,silk", "renesas,r8a7794"
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/board.txt b/Documentation/devicetree/bindings/board/fsl-board.txt
index cff38bdbc0e4..fb7b03ec2071 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/board.txt
+++ b/Documentation/devicetree/bindings/board/fsl-board.txt
@@ -21,11 +21,14 @@ Example:
21 21
22This is the memory-mapped registers for on board FPGA. 22This is the memory-mapped registers for on board FPGA.
23 23
24Required properities: 24Required properties:
25- compatible: should be a board-specific string followed by a string 25- compatible: should be a board-specific string followed by a string
26 indicating the type of FPGA. Example: 26 indicating the type of FPGA. Example:
27 "fsl,<board>-fpga", "fsl,fpga-pixis" 27 "fsl,<board>-fpga", "fsl,fpga-pixis", or
28 "fsl,<board>-fpga", "fsl,fpga-qixis"
28- reg: should contain the address and the length of the FPGA register set. 29- reg: should contain the address and the length of the FPGA register set.
30
31Optional properties:
29- interrupt-parent: should specify phandle for the interrupt controller. 32- interrupt-parent: should specify phandle for the interrupt controller.
30- interrupts: should specify event (wakeup) IRQ. 33- interrupts: should specify event (wakeup) IRQ.
31 34
@@ -38,6 +41,13 @@ Example (P1022DS):
38 interrupts = <8 8 0 0>; 41 interrupts = <8 8 0 0>;
39 }; 42 };
40 43
44Example (LS2080A-RDB):
45
46 cpld@3,0 {
47 compatible = "fsl,ls2080ardb-fpga", "fsl,fpga-qixis";
48 reg = <0x3 0 0x10000>;
49 };
50
41* Freescale BCSR GPIO banks 51* Freescale BCSR GPIO banks
42 52
43Some BCSR registers act as simple GPIO controllers, each such 53Some BCSR registers act as simple GPIO controllers, each such
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
index 54c23f34f194..152dfaab2575 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
@@ -18,10 +18,14 @@ Required properties :
18- #clock-cells : shall contain 1 18- #clock-cells : shall contain 1
19- #reset-cells : shall contain 1 19- #reset-cells : shall contain 1
20 20
21Optional properties :
22- #power-domain-cells : shall contain 1
23
21Example: 24Example:
22 clock-controller@900000 { 25 clock-controller@900000 {
23 compatible = "qcom,gcc-msm8960"; 26 compatible = "qcom,gcc-msm8960";
24 reg = <0x900000 0x4000>; 27 reg = <0x900000 0x4000>;
25 #clock-cells = <1>; 28 #clock-cells = <1>;
26 #reset-cells = <1>; 29 #reset-cells = <1>;
30 #power-domain-cells = <1>;
27 }; 31 };
diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.txt b/Documentation/devicetree/bindings/clock/qcom,mmcc.txt
index 29ebf84d25af..34e7614d5074 100644
--- a/Documentation/devicetree/bindings/clock/qcom,mmcc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.txt
@@ -14,10 +14,14 @@ Required properties :
14- #clock-cells : shall contain 1 14- #clock-cells : shall contain 1
15- #reset-cells : shall contain 1 15- #reset-cells : shall contain 1
16 16
17Optional properties :
18- #power-domain-cells : shall contain 1
19
17Example: 20Example:
18 clock-controller@4000000 { 21 clock-controller@4000000 {
19 compatible = "qcom,mmcc-msm8960"; 22 compatible = "qcom,mmcc-msm8960";
20 reg = <0x4000000 0x1000>; 23 reg = <0x4000000 0x1000>;
21 #clock-cells = <1>; 24 #clock-cells = <1>;
22 #reset-cells = <1>; 25 #reset-cells = <1>;
26 #power-domain-cells = <1>;
23 }; 27 };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index 805ddcd79a57..f2455c50533d 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -1,9 +1,9 @@
1* Freescale MPC512x/MPC8xxx GPIO controller 1* Freescale MPC512x/MPC8xxx/Layerscape GPIO controller
2 2
3Required properties: 3Required properties:
4- compatible : Should be "fsl,<soc>-gpio" 4- compatible : Should be "fsl,<soc>-gpio"
5 The following <soc>s are known to be supported: 5 The following <soc>s are known to be supported:
6 mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq 6 mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq.
7- reg : Address and length of the register set for the device 7- reg : Address and length of the register set for the device
8- interrupts : Should be the port interrupt shared by all 32 pins. 8- interrupts : Should be the port interrupt shared by all 32 pins.
9- #gpio-cells : Should be two. The first cell is the pin number and 9- #gpio-cells : Should be two. The first cell is the pin number and
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
index 5788d5cf1252..82d40e2505f6 100644
--- a/Documentation/devicetree/bindings/gpio/gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio.txt
@@ -16,7 +16,9 @@ properties, each containing a 'gpio-list':
16GPIO properties should be named "[<name>-]gpios", with <name> being the purpose 16GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
17of this GPIO for the device. While a non-existent <name> is considered valid 17of this GPIO for the device. While a non-existent <name> is considered valid
18for compatibility reasons (resolving to the "gpios" property), it is not allowed 18for compatibility reasons (resolving to the "gpios" property), it is not allowed
19for new bindings. 19for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
20bindings use it, but are only supported for compatibility reasons and should not
21be used for newer bindings since it has been deprecated.
20 22
21GPIO properties can contain one or more GPIO phandles, but only in exceptional 23GPIO properties can contain one or more GPIO phandles, but only in exceptional
22cases should they contain more than one. If your device uses several GPIOs with 24cases should they contain more than one. If your device uses several GPIOs with
diff --git a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
index 610757ce4492..c6d533202d3e 100644
--- a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
+++ b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
@@ -3,10 +3,35 @@ Bindings for a fan connected to the PWM lines
3Required properties: 3Required properties:
4- compatible : "pwm-fan" 4- compatible : "pwm-fan"
5- pwms : the PWM that is used to control the PWM fan 5- pwms : the PWM that is used to control the PWM fan
6- cooling-levels : PWM duty cycle values in a range from 0 to 255
7 which correspond to thermal cooling states
6 8
7Example: 9Example:
8 pwm-fan { 10 fan0: pwm-fan {
9 compatible = "pwm-fan"; 11 compatible = "pwm-fan";
10 status = "okay"; 12 cooling-min-state = <0>;
13 cooling-max-state = <3>;
14 #cooling-cells = <2>;
11 pwms = <&pwm 0 10000 0>; 15 pwms = <&pwm 0 10000 0>;
16 cooling-levels = <0 102 170 230>;
12 }; 17 };
18
19 thermal-zones {
20 cpu_thermal: cpu-thermal {
21 thermal-sensors = <&tmu 0>;
22 polling-delay-passive = <0>;
23 polling-delay = <0>;
24 trips {
25 cpu_alert1: cpu-alert1 {
26 temperature = <100000>; /* millicelsius */
27 hysteresis = <2000>; /* millicelsius */
28 type = "passive";
29 };
30 };
31 cooling-maps {
32 map0 {
33 trip = <&cpu_alert1>;
34 cooling-device = <&fan0 0 1>;
35 };
36 };
37 };
diff --git a/Documentation/devicetree/bindings/iio/accel/bma180.txt b/Documentation/devicetree/bindings/iio/accel/bma180.txt
index c5933573e0f6..4a3679d54457 100644
--- a/Documentation/devicetree/bindings/iio/accel/bma180.txt
+++ b/Documentation/devicetree/bindings/iio/accel/bma180.txt
@@ -1,10 +1,11 @@
1* Bosch BMA180 triaxial acceleration sensor 1* Bosch BMA180 / BMA250 triaxial acceleration sensor
2 2
3http://omapworld.com/BMA180_111_1002839.pdf 3http://omapworld.com/BMA180_111_1002839.pdf
4http://ae-bst.resource.bosch.com/media/products/dokumente/bma250/bst-bma250-ds002-05.pdf
4 5
5Required properties: 6Required properties:
6 7
7 - compatible : should be "bosch,bma180" 8 - compatible : should be "bosch,bma180" or "bosch,bma250"
8 - reg : the I2C address of the sensor 9 - reg : the I2C address of the sensor
9 10
10Optional properties: 11Optional properties:
@@ -13,6 +14,9 @@ Optional properties:
13 14
14 - interrupts : interrupt mapping for GPIO IRQ, it should by configured with 15 - interrupts : interrupt mapping for GPIO IRQ, it should by configured with
15 flags IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING 16 flags IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING
17 For the bma250 the first interrupt listed must be the one
18 connected to the INT1 pin, the second (optional) interrupt
19 listed must be the one connected to the INT2 pin.
16 20
17Example: 21Example:
18 22
diff --git a/Documentation/devicetree/bindings/input/cypress,cyapa.txt b/Documentation/devicetree/bindings/input/cypress,cyapa.txt
index 635a3b036630..8d91ba9ff2fd 100644
--- a/Documentation/devicetree/bindings/input/cypress,cyapa.txt
+++ b/Documentation/devicetree/bindings/input/cypress,cyapa.txt
@@ -25,7 +25,7 @@ Example:
25 /* Cypress Gen3 touchpad */ 25 /* Cypress Gen3 touchpad */
26 touchpad@67 { 26 touchpad@67 {
27 compatible = "cypress,cyapa"; 27 compatible = "cypress,cyapa";
28 reg = <0x24>; 28 reg = <0x67>;
29 interrupt-parent = <&gpio>; 29 interrupt-parent = <&gpio>;
30 interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO 2 */ 30 interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO 2 */
31 wakeup-source; 31 wakeup-source;
diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt
index 391717a68f3b..ec96b1f01478 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt
@@ -4,8 +4,8 @@ The MISC interrupt controller is a secondary controller for lower priority
4interrupt. 4interrupt.
5 5
6Required Properties: 6Required Properties:
7- compatible: has to be "qca,<soctype>-cpu-intc", "qca,ar7100-misc-intc" 7- compatible: has to be "qca,<soctype>-cpu-intc", "qca,ar7100-misc-intc" or
8 as fallback 8 "qca,<soctype>-cpu-intc", "qca,ar7240-misc-intc"
9- reg: Base address and size of the controllers memory area 9- reg: Base address and size of the controllers memory area
10- interrupt-parent: phandle of the parent interrupt controller. 10- interrupt-parent: phandle of the parent interrupt controller.
11- interrupts: Interrupt specifier for the controllers interrupt. 11- interrupts: Interrupt specifier for the controllers interrupt.
@@ -13,6 +13,9 @@ Required Properties:
13- #interrupt-cells : Specifies the number of cells needed to encode interrupt 13- #interrupt-cells : Specifies the number of cells needed to encode interrupt
14 source, should be 1 14 source, should be 1
15 15
16Compatible fallback depends on the SoC. Use ar7100 for ar71xx and ar913x,
17use ar7240 for all other SoCs.
18
16Please refer to interrupts.txt in this directory for details of the common 19Please refer to interrupts.txt in this directory for details of the common
17Interrupt Controllers bindings used by client devices. 20Interrupt Controllers bindings used by client devices.
18 21
@@ -28,3 +31,16 @@ Example:
28 interrupt-controller; 31 interrupt-controller;
29 #interrupt-cells = <1>; 32 #interrupt-cells = <1>;
30 }; 33 };
34
35Another example:
36
37 interrupt-controller@18060010 {
38 compatible = "qca,ar9331-misc-intc", qca,ar7240-misc-intc";
39 reg = <0x18060010 0x4>;
40
41 interrupt-parent = <&cpuintc>;
42 interrupts = <6>;
43
44 interrupt-controller;
45 #interrupt-cells = <1>;
46 };
diff --git a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt
index 729543c47046..bc620fe32a70 100644
--- a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt
+++ b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt
@@ -47,7 +47,7 @@ Required properties:
47- clocks: Required if the System MMU is needed to gate its clock. 47- clocks: Required if the System MMU is needed to gate its clock.
48- power-domains: Required if the System MMU is needed to gate its power. 48- power-domains: Required if the System MMU is needed to gate its power.
49 Please refer to the following document: 49 Please refer to the following document:
50 Documentation/devicetree/bindings/arm/exynos/power_domain.txt 50 Documentation/devicetree/bindings/power/pd-samsung.txt
51 51
52Examples: 52Examples:
53 gsc_0: gsc@13e00000 { 53 gsc_0: gsc@13e00000 {
diff --git a/Documentation/devicetree/bindings/mfd/s2mps11.txt b/Documentation/devicetree/bindings/mfd/s2mps11.txt
index 57a045016fca..90eaef393325 100644
--- a/Documentation/devicetree/bindings/mfd/s2mps11.txt
+++ b/Documentation/devicetree/bindings/mfd/s2mps11.txt
@@ -15,6 +15,10 @@ Optional properties:
15- interrupt-parent: Specifies the phandle of the interrupt controller to which 15- interrupt-parent: Specifies the phandle of the interrupt controller to which
16 the interrupts from s2mps11 are delivered to. 16 the interrupts from s2mps11 are delivered to.
17- interrupts: Interrupt specifiers for interrupt sources. 17- interrupts: Interrupt specifiers for interrupt sources.
18- samsung,s2mps11-acokb-ground: Indicates that ACOKB pin of S2MPS11 PMIC is
19 connected to the ground so the PMIC must manually set PWRHOLD bit in CTRL1
20 register to turn off the power. Usually the ACOKB is pulled up to VBATT so
21 when PWRHOLD pin goes low, the rising ACOKB will trigger power off.
18 22
19Optional nodes: 23Optional nodes:
20- clocks: s2mps11, s2mps13 and s5m8767 provide three(AP/CP/BT) buffered 32.768 24- clocks: s2mps11, s2mps13 and s5m8767 provide three(AP/CP/BT) buffered 32.768
diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
index d8ef5bf50f11..7fab84b33531 100644
--- a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
+++ b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
@@ -7,7 +7,8 @@ OHCI and EHCI controllers.
7 7
8Required properties: 8Required properties:
9- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC; 9- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
10 "renesas,pci-r8a7791" for the R8A7791 SoC. 10 "renesas,pci-r8a7791" for the R8A7791 SoC;
11 "renesas,pci-r8a7794" for the R8A7794 SoC.
11- reg: A list of physical regions to access the device: the first is 12- reg: A list of physical regions to access the device: the first is
12 the operational registers for the OHCI/EHCI controllers and the 13 the operational registers for the OHCI/EHCI controllers and the
13 second is for the bridge configuration and control registers. 14 second is for the bridge configuration and control registers.
diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/power/pd-samsung.txt
index e151057d92f0..4e947372a693 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/power/pd-samsung.txt
@@ -43,9 +43,8 @@ Example:
43 mfc_pd: power-domain@10044060 { 43 mfc_pd: power-domain@10044060 {
44 compatible = "samsung,exynos4210-pd"; 44 compatible = "samsung,exynos4210-pd";
45 reg = <0x10044060 0x20>; 45 reg = <0x10044060 0x20>;
46 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>, 46 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>;
47 <&clock CLK_MOUT_USER_ACLK333>; 47 clock-names = "oscclk", "clk0";
48 clock-names = "oscclk", "pclk0", "clk0";
49 #power-domain-cells = <0>; 48 #power-domain-cells = <0>;
50 }; 49 };
51 50
diff --git a/Documentation/devicetree/bindings/power_supply/qcom_smbb.txt b/Documentation/devicetree/bindings/power_supply/qcom_smbb.txt
new file mode 100644
index 000000000000..65b88fac854b
--- /dev/null
+++ b/Documentation/devicetree/bindings/power_supply/qcom_smbb.txt
@@ -0,0 +1,131 @@
1Qualcomm Switch-Mode Battery Charger and Boost
2
3PROPERTIES
4- compatible:
5 Usage: required
6 Value type: <stringlist>
7 Description: Must be one of:
8 - "qcom,pm8941-charger"
9
10- reg:
11 Usage: required
12 Value type: <prop-encoded-array>
13 Description: Base address of registers for SMBB block
14
15- interrupts:
16 Usage: required
17 Value type: <prop-encoded-array>
18 Description: The format of the specifier is defined by the binding document
19 describing the node's interrupt parent. Must contain one
20 specifier for each of the following interrupts, in order:
21 - charge done
22 - charge fast mode
23 - charge trickle mode
24 - battery temperature ok
25 - battery present
26 - charger disconnected
27 - USB-in valid
28 - DC-in valid
29
30- interrupt-names:
31 Usage: required
32 Value type: <stringlist>
33 Description: Must contain the following list, strictly ordered:
34 "chg-done",
35 "chg-fast",
36 "chg-trkl",
37 "bat-temp-ok",
38 "bat-present",
39 "chg-gone",
40 "usb-valid",
41 "dc-valid"
42
43- qcom,fast-charge-current-limit:
44 Usage: optional (default: 1A, or pre-configured value)
45 Value type: <u32>; uA; range [100mA : 3A]
46 Description: Maximum charge current; May be clamped to safety limits.
47
48- qcom,fast-charge-low-threshold-voltage:
49 Usage: optional (default: 3.2V, or pre-configured value)
50 Value type: <u32>; uV; range [2.1V : 3.6V]
51 Description: Battery voltage limit above which fast charging may operate;
52 Below this value linear or switch-mode auto-trickle-charging
53 will operate.
54
55- qcom,fast-charge-high-threshold-voltage:
56 Usage: optional (default: 4.2V, or pre-configured value)
57 Value type: <u32>; uV; range [3.24V : 5V]
58 Description: Battery voltage limit below which fast charging may operate;
59 The fast charger will attempt to charge the battery to this
60 voltage. May be clamped to safety limits.
61
62- qcom,fast-charge-safe-voltage:
63 Usage: optional (default: 4.2V, or pre-configured value)
64 Value type: <u32>; uV; range [3.24V : 5V]
65 Description: Maximum safe battery voltage; May be pre-set by bootloader, in
66 which case, setting this will harmlessly fail. The property
67 'fast-charge-high-watermark' will be clamped by this value.
68
69- qcom,fast-charge-safe-current:
70 Usage: optional (default: 1A, or pre-configured value)
71 Value type: <u32>; uA; range [100mA : 3A]
72 Description: Maximum safe battery charge current; May pre-set by bootloader,
73 in which case, setting this will harmlessly fail. The property
74 'qcom,fast-charge-current-limit' will be clamped by this value.
75
76- qcom,auto-recharge-threshold-voltage:
77 Usage: optional (default: 4.1V, or pre-configured value)
78 Value type: <u32>; uV; range [3.24V : 5V]
79 Description: Battery voltage limit below which auto-recharge functionality
80 will restart charging after end-of-charge; The high cutoff
81 limit for auto-recharge is 5% above this value.
82
83- qcom,minimum-input-voltage:
84 Usage: optional (default: 4.3V, or pre-configured value)
85 Value type: <u32>; uV; range [4.2V : 9.6V]
86 Description: Input voltage level above which charging may operate
87
88- qcom,dc-current-limit:
89 Usage: optional (default: 100mA, or pre-configured value)
90 Value type: <u32>; uA; range [100mA : 2.5A]
91 Description: Default DC charge current limit
92
93- qcom,disable-dc:
94 Usage: optional (default: false)
95 Value type: boolean: <u32> or <empty>
96 Description: Disable DC charger
97
98- qcom,jeita-extended-temp-range:
99 Usage: optional (default: false)
100 Value type: boolean: <u32> or <empty>
101 Description: Enable JEITA extended temperature range; This does *not*
102 adjust the maximum charge voltage or current in the extended
103 temperature range. It only allows charging when the battery
104 is in the extended temperature range. Voltage/current
105 regulation must be done externally to fully comply with
106 the JEITA safety guidelines if this flag is set.
107
108EXAMPLE
109charger@1000 {
110 compatible = "qcom,pm8941-charger";
111 reg = <0x1000 0x700>;
112 interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>,
113 <0x0 0x10 5 IRQ_TYPE_EDGE_BOTH>,
114 <0x0 0x10 4 IRQ_TYPE_EDGE_BOTH>,
115 <0x0 0x12 1 IRQ_TYPE_EDGE_BOTH>,
116 <0x0 0x12 0 IRQ_TYPE_EDGE_BOTH>,
117 <0x0 0x13 2 IRQ_TYPE_EDGE_BOTH>,
118 <0x0 0x13 1 IRQ_TYPE_EDGE_BOTH>,
119 <0x0 0x14 1 IRQ_TYPE_EDGE_BOTH>;
120 interrupt-names = "chg-done",
121 "chg-fast",
122 "chg-trkl",
123 "bat-temp-ok",
124 "bat-present",
125 "chg-gone",
126 "usb-valid",
127 "dc-valid";
128
129 qcom,fast-charge-current-limit = <1000000>;
130 qcom,dc-charge-current-limit = <1000000>;
131};
diff --git a/Documentation/devicetree/bindings/regulator/pbias-regulator.txt b/Documentation/devicetree/bindings/regulator/pbias-regulator.txt
index 32aa26f1e434..acbcb452a69a 100644
--- a/Documentation/devicetree/bindings/regulator/pbias-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/pbias-regulator.txt
@@ -2,7 +2,12 @@ PBIAS internal regulator for SD card dual voltage i/o pads on OMAP SoCs.
2 2
3Required properties: 3Required properties:
4- compatible: 4- compatible:
5 - "ti,pbias-omap" for OMAP2, OMAP3, OMAP4, OMAP5, DRA7. 5 - should be "ti,pbias-dra7" for DRA7
6 - should be "ti,pbias-omap2" for OMAP2
7 - should be "ti,pbias-omap3" for OMAP3
8 - should be "ti,pbias-omap4" for OMAP4
9 - should be "ti,pbias-omap5" for OMAP5
10 - "ti,pbias-omap" is deprecated
6- reg: pbias register offset from syscon base and size of pbias register. 11- reg: pbias register offset from syscon base and size of pbias register.
7- syscon : phandle of the system control module 12- syscon : phandle of the system control module
8- regulator-name : should be 13- regulator-name : should be
diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
index c0511142b39c..a6c8afc8385a 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
@@ -17,9 +17,9 @@ Required properties:
17- reg: Address range of the SCPSYS unit 17- reg: Address range of the SCPSYS unit
18- infracfg: must contain a phandle to the infracfg controller 18- infracfg: must contain a phandle to the infracfg controller
19- clock, clock-names: clocks according to the common clock binding. 19- clock, clock-names: clocks according to the common clock binding.
20 The clocks needed "mm" and "mfg". These are the 20 The clocks needed "mm", "mfg", "venc" and "venc_lt".
21 clocks which hardware needs to be enabled before 21 These are the clocks which hardware needs to be enabled
22 enabling certain power domains. 22 before enabling certain power domains.
23 23
24Example: 24Example:
25 25
@@ -30,7 +30,9 @@ Example:
30 infracfg = <&infracfg>; 30 infracfg = <&infracfg>;
31 clocks = <&clk26m>, 31 clocks = <&clk26m>,
32 <&topckgen CLK_TOP_MM_SEL>; 32 <&topckgen CLK_TOP_MM_SEL>;
33 clock-names = "mfg", "mm"; 33 <&topckgen CLK_TOP_VENC_SEL>,
34 <&topckgen CLK_TOP_VENC_LT_SEL>;
35 clock-names = "mfg", "mm", "venc", "venc_lt";
34 }; 36 };
35 37
36Example consumer: 38Example consumer:
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smem.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smem.txt
new file mode 100644
index 000000000000..9326cdf6e1b1
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smem.txt
@@ -0,0 +1,57 @@
1Qualcomm Shared Memory Manager binding
2
3This binding describes the Qualcomm Shared Memory Manager, used to share data
4between various subsystems and OSes in Qualcomm platforms.
5
6- compatible:
7 Usage: required
8 Value type: <stringlist>
9 Definition: must be:
10 "qcom,smem"
11
12- memory-region:
13 Usage: required
14 Value type: <prop-encoded-array>
15 Definition: handle to memory reservation for main SMEM memory region.
16
17- qcom,rpm-msg-ram:
18 Usage: required
19 Value type: <prop-encoded-array>
20 Definition: handle to RPM message memory resource
21
22- hwlocks:
23 Usage: required
24 Value type: <prop-encoded-array>
25 Definition: reference to a hwspinlock used to protect allocations from
26 the shared memory
27
28= EXAMPLE
29The following example shows the SMEM setup for MSM8974, with a main SMEM region
30at 0xfa00000 and the RPM message ram at 0xfc428000:
31
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
35 ranges;
36
37 smem_region: smem@fa00000 {
38 reg = <0xfa00000 0x200000>;
39 no-map;
40 };
41 };
42
43 smem@fa00000 {
44 compatible = "qcom,smem";
45
46 memory-region = <&smem_region>;
47 qcom,rpm-msg-ram = <&rpm_msg_ram>;
48
49 hwlocks = <&tcsr_mutex 3>;
50 };
51
52 soc {
53 rpm_msg_ram: memory@fc428000 {
54 compatible = "qcom,rpm-msg-ram";
55 reg = <0xfc428000 0x4000>;
56 };
57 };
diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
index dcefc438272f..6160ffbcb3d3 100644
--- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -15,17 +15,18 @@ Required properties:
15- interrupts: Should contain spi interrupt 15- interrupts: Should contain spi interrupt
16 16
17- clocks: phandles to input clocks. 17- clocks: phandles to input clocks.
18 The first should be <&topckgen CLK_TOP_SPI_SEL>. 18 The first should be one of the following. It's PLL.
19 The second should be one of the following.
20 - <&clk26m>: specify parent clock 26MHZ. 19 - <&clk26m>: specify parent clock 26MHZ.
21 - <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ. 20 - <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ.
22 It's the default one. 21 It's the default one.
23 - <&topckgen CLK_TOP_SYSPLL4_D2>: specify parent clock 78MHZ. 22 - <&topckgen CLK_TOP_SYSPLL4_D2>: specify parent clock 78MHZ.
24 - <&topckgen CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ. 23 - <&topckgen CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
25 - <&topckgen CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ. 24 - <&topckgen CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
25 The second should be <&topckgen CLK_TOP_SPI_SEL>. It's clock mux.
26 The third is <&pericfg CLK_PERI_SPI0>. It's clock gate.
26 27
27- clock-names: shall be "spi-clk" for the controller clock, and 28- clock-names: shall be "parent-clk" for the parent clock, "sel-clk" for the
28 "parent-clk" for the parent clock. 29 muxes clock, and "spi-clk" for the clock gate.
29 30
30Optional properties: 31Optional properties:
31- mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi 32- mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
@@ -44,8 +45,11 @@ spi: spi@1100a000 {
44 #size-cells = <0>; 45 #size-cells = <0>;
45 reg = <0 0x1100a000 0 0x1000>; 46 reg = <0 0x1100a000 0 0x1000>;
46 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>; 47 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
47 clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>; 48 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
48 clock-names = "spi-clk", "parent-clk"; 49 <&topckgen CLK_TOP_SPI_SEL>,
50 <&pericfg CLK_PERI_SPI0>;
51 clock-names = "parent-clk", "sel-clk", "spi-clk";
52
49 mediatek,pad-select = <0>; 53 mediatek,pad-select = <0>;
50 status = "disabled"; 54 status = "disabled";
51}; 55};
diff --git a/Documentation/devicetree/bindings/thermal/thermal.txt b/Documentation/devicetree/bindings/thermal/thermal.txt
index 8a49362dea6e..41b817f7b670 100644
--- a/Documentation/devicetree/bindings/thermal/thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/thermal.txt
@@ -55,19 +55,11 @@ of heat dissipation). For example a fan's cooling states correspond to
55the different fan speeds possible. Cooling states are referred to by 55the different fan speeds possible. Cooling states are referred to by
56single unsigned integers, where larger numbers mean greater heat 56single unsigned integers, where larger numbers mean greater heat
57dissipation. The precise set of cooling states associated with a device 57dissipation. The precise set of cooling states associated with a device
58(as referred to be the cooling-min-state and cooling-max-state 58(as referred to by the cooling-min-level and cooling-max-level
59properties) should be defined in a particular device's binding. 59properties) should be defined in a particular device's binding.
60For more examples of cooling devices, refer to the example sections below. 60For more examples of cooling devices, refer to the example sections below.
61 61
62Required properties: 62Required properties:
63- cooling-min-state: An integer indicating the smallest
64 Type: unsigned cooling state accepted. Typically 0.
65 Size: one cell
66
67- cooling-max-state: An integer indicating the largest
68 Type: unsigned cooling state accepted.
69 Size: one cell
70
71- #cooling-cells: Used to provide cooling device specific information 63- #cooling-cells: Used to provide cooling device specific information
72 Type: unsigned while referring to it. Must be at least 2, in order 64 Type: unsigned while referring to it. Must be at least 2, in order
73 Size: one cell to specify minimum and maximum cooling state used 65 Size: one cell to specify minimum and maximum cooling state used
@@ -77,6 +69,15 @@ Required properties:
77 See Cooling device maps section below for more details 69 See Cooling device maps section below for more details
78 on how consumers refer to cooling devices. 70 on how consumers refer to cooling devices.
79 71
72Optional properties:
73- cooling-min-level: An integer indicating the smallest
74 Type: unsigned cooling state accepted. Typically 0.
75 Size: one cell
76
77- cooling-max-level: An integer indicating the largest
78 Type: unsigned cooling state accepted.
79 Size: one cell
80
80* Trip points 81* Trip points
81 82
82The trip node is a node to describe a point in the temperature domain 83The trip node is a node to describe a point in the temperature domain
@@ -225,8 +226,8 @@ cpus {
225 396000 950000 226 396000 950000
226 198000 850000 227 198000 850000
227 >; 228 >;
228 cooling-min-state = <0>; 229 cooling-min-level = <0>;
229 cooling-max-state = <3>; 230 cooling-max-level = <3>;
230 #cooling-cells = <2>; /* min followed by max */ 231 #cooling-cells = <2>; /* min followed by max */
231 }; 232 };
232 ... 233 ...
@@ -240,8 +241,8 @@ cpus {
240 */ 241 */
241 fan0: fan@0x48 { 242 fan0: fan@0x48 {
242 ... 243 ...
243 cooling-min-state = <0>; 244 cooling-min-level = <0>;
244 cooling-max-state = <9>; 245 cooling-max-level = <9>;
245 #cooling-cells = <2>; /* min followed by max */ 246 #cooling-cells = <2>; /* min followed by max */
246 }; 247 };
247}; 248};
diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
index 53a3029b7589..64083bc5633c 100644
--- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
+++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
@@ -3,10 +3,12 @@ Mediatek MT6577, MT6572 and MT6589 Timers
3 3
4Required properties: 4Required properties:
5- compatible should contain: 5- compatible should contain:
6 * "mediatek,mt6589-timer" for MT6589 compatible timers
7 * "mediatek,mt6580-timer" for MT6580 compatible timers 6 * "mediatek,mt6580-timer" for MT6580 compatible timers
8 * "mediatek,mt6577-timer" for all compatible timers (MT6589, MT6580, 7 * "mediatek,mt6589-timer" for MT6589 compatible timers
9 MT6577) 8 * "mediatek,mt8127-timer" for MT8127 compatible timers
9 * "mediatek,mt8135-timer" for MT8135 compatible timers
10 * "mediatek,mt8173-timer" for MT8173 compatible timers
11 * "mediatek,mt6577-timer" for MT6577 and all above compatible timers
10- reg: Should contain location and length for timers register. 12- reg: Should contain location and length for timers register.
11- clocks: Clocks driving the timer hardware. This list should include two 13- clocks: Clocks driving the timer hardware. This list should include two
12 clocks. The order is system clock and as second clock the RTC clock. 14 clocks. The order is system clock and as second clock the RTC clock.
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
index d71ef07bca5d..a057b75ba4b5 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
@@ -6,6 +6,7 @@ Required properties:
6 "lsi,zevio-usb" 6 "lsi,zevio-usb"
7 "qcom,ci-hdrc" 7 "qcom,ci-hdrc"
8 "chipidea,usb2" 8 "chipidea,usb2"
9 "xlnx,zynq-usb-2.20a"
9- reg: base address and length of the registers 10- reg: base address and length of the registers
10- interrupts: interrupt for the USB controller 11- interrupts: interrupt for the USB controller
11 12
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 0815eac5b185..9f64f69d153a 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -1,6 +1,7 @@
1synopsys DWC3 CORE 1synopsys DWC3 CORE
2 2
3DWC3- USB3 CONTROLLER 3DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
4 as described in 'usb/generic.txt'
4 5
5Required properties: 6Required properties:
6 - compatible: must be "snps,dwc3" 7 - compatible: must be "snps,dwc3"
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index ac5f0c34ae00..dbfe839c201a 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -34,6 +34,7 @@ avago Avago Technologies
34avic Shanghai AVIC Optoelectronics Co., Ltd. 34avic Shanghai AVIC Optoelectronics Co., Ltd.
35axis Axis Communications AB 35axis Axis Communications AB
36bosch Bosch Sensortec GmbH 36bosch Bosch Sensortec GmbH
37boundary Boundary Devices Inc.
37brcm Broadcom Corporation 38brcm Broadcom Corporation
38buffalo Buffalo, Inc. 39buffalo Buffalo, Inc.
39calxeda Calxeda 40calxeda Calxeda
@@ -203,6 +204,7 @@ sitronix Sitronix Technology Corporation
203skyworks Skyworks Solutions, Inc. 204skyworks Skyworks Solutions, Inc.
204smsc Standard Microsystems Corporation 205smsc Standard Microsystems Corporation
205snps Synopsys, Inc. 206snps Synopsys, Inc.
207socionext Socionext Inc.
206solidrun SolidRun 208solidrun SolidRun
207solomon Solomon Systech Limited 209solomon Solomon Systech Limited
208sony Sony Corporation 210sony Sony Corporation
@@ -221,6 +223,7 @@ toradex Toradex AG
221toshiba Toshiba Corporation 223toshiba Toshiba Corporation
222toumaz Toumaz 224toumaz Toumaz
223tplink TP-LINK Technologies Co., Ltd. 225tplink TP-LINK Technologies Co., Ltd.
226tronfy Tronfy
224truly Truly Semiconductors Limited 227truly Truly Semiconductors Limited
225usi Universal Scientific Industrial Co., Ltd. 228usi Universal Scientific Industrial Co., Ltd.
226v3 V3 Semiconductor 229v3 V3 Semiconductor
diff --git a/Documentation/gpio/board.txt b/Documentation/gpio/board.txt
index b80606de545a..f59c43b6411b 100644
--- a/Documentation/gpio/board.txt
+++ b/Documentation/gpio/board.txt
@@ -21,8 +21,8 @@ exact way to do it depends on the GPIO controller providing the GPIOs, see the
21device tree bindings for your controller. 21device tree bindings for your controller.
22 22
23GPIOs mappings are defined in the consumer device's node, in a property named 23GPIOs mappings are defined in the consumer device's node, in a property named
24<function>-gpios, where <function> is the function the driver will request 24either <function>-gpios or <function>-gpio, where <function> is the function
25through gpiod_get(). For example: 25the driver will request through gpiod_get(). For example:
26 26
27 foo_device { 27 foo_device {
28 compatible = "acme,foo"; 28 compatible = "acme,foo";
@@ -31,7 +31,7 @@ through gpiod_get(). For example:
31 <&gpio 16 GPIO_ACTIVE_HIGH>, /* green */ 31 <&gpio 16 GPIO_ACTIVE_HIGH>, /* green */
32 <&gpio 17 GPIO_ACTIVE_HIGH>; /* blue */ 32 <&gpio 17 GPIO_ACTIVE_HIGH>; /* blue */
33 33
34 power-gpios = <&gpio 1 GPIO_ACTIVE_LOW>; 34 power-gpio = <&gpio 1 GPIO_ACTIVE_LOW>;
35 }; 35 };
36 36
37This property will make GPIOs 15, 16 and 17 available to the driver under the 37This property will make GPIOs 15, 16 and 17 available to the driver under the
@@ -39,15 +39,24 @@ This property will make GPIOs 15, 16 and 17 available to the driver under the
39 39
40 struct gpio_desc *red, *green, *blue, *power; 40 struct gpio_desc *red, *green, *blue, *power;
41 41
42 red = gpiod_get_index(dev, "led", 0); 42 red = gpiod_get_index(dev, "led", 0, GPIOD_OUT_HIGH);
43 green = gpiod_get_index(dev, "led", 1); 43 green = gpiod_get_index(dev, "led", 1, GPIOD_OUT_HIGH);
44 blue = gpiod_get_index(dev, "led", 2); 44 blue = gpiod_get_index(dev, "led", 2, GPIOD_OUT_HIGH);
45 45
46 power = gpiod_get(dev, "power"); 46 power = gpiod_get(dev, "power", GPIOD_OUT_HIGH);
47 47
48The led GPIOs will be active-high, while the power GPIO will be active-low (i.e. 48The led GPIOs will be active-high, while the power GPIO will be active-low (i.e.
49gpiod_is_active_low(power) will be true). 49gpiod_is_active_low(power) will be true).
50 50
51The second parameter of the gpiod_get() functions, the con_id string, has to be
52the <function>-prefix of the GPIO suffixes ("gpios" or "gpio", automatically
53looked up by the gpiod functions internally) used in the device tree. With above
54"led-gpios" example, use the prefix without the "-" as con_id parameter: "led".
55
56Internally, the GPIO subsystem prefixes the GPIO suffix ("gpios" or "gpio")
57with the string passed in con_id to get the resulting string
58(snprintf(... "%s-%s", con_id, gpio_suffixes[]).
59
51ACPI 60ACPI
52---- 61----
53ACPI also supports function names for GPIOs in a similar fashion to DT. 62ACPI also supports function names for GPIOs in a similar fashion to DT.
@@ -142,13 +151,14 @@ The driver controlling "foo.0" will then be able to obtain its GPIOs as follows:
142 151
143 struct gpio_desc *red, *green, *blue, *power; 152 struct gpio_desc *red, *green, *blue, *power;
144 153
145 red = gpiod_get_index(dev, "led", 0); 154 red = gpiod_get_index(dev, "led", 0, GPIOD_OUT_HIGH);
146 green = gpiod_get_index(dev, "led", 1); 155 green = gpiod_get_index(dev, "led", 1, GPIOD_OUT_HIGH);
147 blue = gpiod_get_index(dev, "led", 2); 156 blue = gpiod_get_index(dev, "led", 2, GPIOD_OUT_HIGH);
148 157
149 power = gpiod_get(dev, "power"); 158 power = gpiod_get(dev, "power", GPIOD_OUT_HIGH);
150 gpiod_direction_output(power, 1);
151 159
152Since the "power" GPIO is mapped as active-low, its actual signal will be 0 160Since the "led" GPIOs are mapped as active-high, this example will switch their
153after this code. Contrary to the legacy integer GPIO interface, the active-low 161signals to 1, i.e. enabling the LEDs. And for the "power" GPIO, which is mapped
154property is handled during mapping and is thus transparent to GPIO consumers. 162as active-low, its actual signal will be 0 after this code. Contrary to the legacy
163integer GPIO interface, the active-low property is handled during mapping and is
164thus transparent to GPIO consumers.
diff --git a/Documentation/gpio/consumer.txt b/Documentation/gpio/consumer.txt
index a206639454ab..e000502fde20 100644
--- a/Documentation/gpio/consumer.txt
+++ b/Documentation/gpio/consumer.txt
@@ -39,6 +39,9 @@ device that displays digits), an additional index argument can be specified:
39 const char *con_id, unsigned int idx, 39 const char *con_id, unsigned int idx,
40 enum gpiod_flags flags) 40 enum gpiod_flags flags)
41 41
42For a more detailed description of the con_id parameter in the DeviceTree case
43see Documentation/gpio/board.txt
44
42The flags parameter is used to optionally specify a direction and initial value 45The flags parameter is used to optionally specify a direction and initial value
43for the GPIO. Values can be: 46for the GPIO. Values can be:
44 47
diff --git a/Documentation/hwmon/nct6775 b/Documentation/hwmon/nct6775
index f0dd3d2fec96..76add4c9cd68 100644
--- a/Documentation/hwmon/nct6775
+++ b/Documentation/hwmon/nct6775
@@ -32,6 +32,10 @@ Supported chips:
32 Prefix: 'nct6792' 32 Prefix: 'nct6792'
33 Addresses scanned: ISA address retrieved from Super I/O registers 33 Addresses scanned: ISA address retrieved from Super I/O registers
34 Datasheet: Available from Nuvoton upon request 34 Datasheet: Available from Nuvoton upon request
35 * Nuvoton NCT6793D
36 Prefix: 'nct6793'
37 Addresses scanned: ISA address retrieved from Super I/O registers
38 Datasheet: Available from Nuvoton upon request
35 39
36Authors: 40Authors:
37 Guenter Roeck <linux@roeck-us.net> 41 Guenter Roeck <linux@roeck-us.net>
diff --git a/Documentation/input/multi-touch-protocol.txt b/Documentation/input/multi-touch-protocol.txt
index b85d000faeb4..c51f1146f3bd 100644
--- a/Documentation/input/multi-touch-protocol.txt
+++ b/Documentation/input/multi-touch-protocol.txt
@@ -361,7 +361,7 @@ For win8 devices with both T and C coordinates, the position mapping is
361 ABS_MT_POSITION_X := T_X 361 ABS_MT_POSITION_X := T_X
362 ABS_MT_POSITION_Y := T_Y 362 ABS_MT_POSITION_Y := T_Y
363 ABS_MT_TOOL_X := C_X 363 ABS_MT_TOOL_X := C_X
364 ABS_MT_TOOL_X := C_Y 364 ABS_MT_TOOL_Y := C_Y
365 365
366Unfortunately, there is not enough information to specify both the touching 366Unfortunately, there is not enough information to specify both the touching
367ellipse and the tool ellipse, so one has to resort to approximations. One 367ellipse and the tool ellipse, so one has to resort to approximations. One
diff --git a/Documentation/networking/vrf.txt b/Documentation/networking/vrf.txt
new file mode 100644
index 000000000000..031ef4a63485
--- /dev/null
+++ b/Documentation/networking/vrf.txt
@@ -0,0 +1,96 @@
1Virtual Routing and Forwarding (VRF)
2====================================
3The VRF device combined with ip rules provides the ability to create virtual
4routing and forwarding domains (aka VRFs, VRF-lite to be specific) in the
5Linux network stack. One use case is the multi-tenancy problem where each
6tenant has their own unique routing tables and in the very least need
7different default gateways.
8
9Processes can be "VRF aware" by binding a socket to the VRF device. Packets
10through the socket then use the routing table associated with the VRF
11device. An important feature of the VRF device implementation is that it
12impacts only Layer 3 and above so L2 tools (e.g., LLDP) are not affected
13(ie., they do not need to be run in each VRF). The design also allows
14the use of higher priority ip rules (Policy Based Routing, PBR) to take
15precedence over the VRF device rules directing specific traffic as desired.
16
17In addition, VRF devices allow VRFs to be nested within namespaces. For
18example network namespaces provide separation of network interfaces at L1
19(Layer 1 separation), VLANs on the interfaces within a namespace provide
20L2 separation and then VRF devices provide L3 separation.
21
22Design
23------
24A VRF device is created with an associated route table. Network interfaces
25are then enslaved to a VRF device:
26
27 +-----------------------------+
28 | vrf-blue | ===> route table 10
29 +-----------------------------+
30 | | |
31 +------+ +------+ +-------------+
32 | eth1 | | eth2 | ... | bond1 |
33 +------+ +------+ +-------------+
34 | |
35 +------+ +------+
36 | eth8 | | eth9 |
37 +------+ +------+
38
39Packets received on an enslaved device and are switched to the VRF device
40using an rx_handler which gives the impression that packets flow through
41the VRF device. Similarly on egress routing rules are used to send packets
42to the VRF device driver before getting sent out the actual interface. This
43allows tcpdump on a VRF device to capture all packets into and out of the
44VRF as a whole.[1] Similiarly, netfilter [2] and tc rules can be applied
45using the VRF device to specify rules that apply to the VRF domain as a whole.
46
47[1] Packets in the forwarded state do not flow through the device, so those
48 packets are not seen by tcpdump. Will revisit this limitation in a
49 future release.
50
51[2] Iptables on ingress is limited to NF_INET_PRE_ROUTING only with skb->dev
52 set to real ingress device and egress is limited to NF_INET_POST_ROUTING.
53 Will revisit this limitation in a future release.
54
55
56Setup
57-----
581. VRF device is created with an association to a FIB table.
59 e.g, ip link add vrf-blue type vrf table 10
60 ip link set dev vrf-blue up
61
622. Rules are added that send lookups to the associated FIB table when the
63 iif or oif is the VRF device. e.g.,
64 ip ru add oif vrf-blue table 10
65 ip ru add iif vrf-blue table 10
66
67 Set the default route for the table (and hence default route for the VRF).
68 e.g, ip route add table 10 prohibit default
69
703. Enslave L3 interfaces to a VRF device.
71 e.g, ip link set dev eth1 master vrf-blue
72
73 Local and connected routes for enslaved devices are automatically moved to
74 the table associated with VRF device. Any additional routes depending on
75 the enslaved device will need to be reinserted following the enslavement.
76
774. Additional VRF routes are added to associated table.
78 e.g., ip route add table 10 ...
79
80
81Applications
82------------
83Applications that are to work within a VRF need to bind their socket to the
84VRF device:
85
86 setsockopt(sd, SOL_SOCKET, SO_BINDTODEVICE, dev, strlen(dev)+1);
87
88or to specify the output device using cmsg and IP_PKTINFO.
89
90
91Limitations
92-----------
93VRF device currently only works for IPv4. Support for IPv6 is under development.
94
95Index of original ingress interface is not available via cmsg. Will address
96soon.
diff --git a/Documentation/power/pci.txt b/Documentation/power/pci.txt
index 62328d76b55b..b0e911e0e8f5 100644
--- a/Documentation/power/pci.txt
+++ b/Documentation/power/pci.txt
@@ -979,20 +979,45 @@ every time right after the runtime_resume() callback has returned
979(alternatively, the runtime_suspend() callback will have to check if the 979(alternatively, the runtime_suspend() callback will have to check if the
980device should really be suspended and return -EAGAIN if that is not the case). 980device should really be suspended and return -EAGAIN if that is not the case).
981 981
982The runtime PM of PCI devices is disabled by default. It is also blocked by 982The runtime PM of PCI devices is enabled by default by the PCI core. PCI
983pci_pm_init() that runs the pm_runtime_forbid() helper function. If a PCI 983device drivers do not need to enable it and should not attempt to do so.
984driver implements the runtime PM callbacks and intends to use the runtime PM 984However, it is blocked by pci_pm_init() that runs the pm_runtime_forbid()
985framework provided by the PM core and the PCI subsystem, it should enable this 985helper function. In addition to that, the runtime PM usage counter of
986feature by executing the pm_runtime_enable() helper function. However, the 986each PCI device is incremented by local_pci_probe() before executing the
987driver should not call the pm_runtime_allow() helper function unblocking 987probe callback provided by the device's driver.
988the runtime PM of the device. Instead, it should allow user space or some 988
989platform-specific code to do that (user space can do it via sysfs), although 989If a PCI driver implements the runtime PM callbacks and intends to use the
990once it has called pm_runtime_enable(), it must be prepared to handle the 990runtime PM framework provided by the PM core and the PCI subsystem, it needs
991to decrement the device's runtime PM usage counter in its probe callback
992function. If it doesn't do that, the counter will always be different from
993zero for the device and it will never be runtime-suspended. The simplest
994way to do that is by calling pm_runtime_put_noidle(), but if the driver
995wants to schedule an autosuspend right away, for example, it may call
996pm_runtime_put_autosuspend() instead for this purpose. Generally, it
997just needs to call a function that decrements the devices usage counter
998from its probe routine to make runtime PM work for the device.
999
1000It is important to remember that the driver's runtime_suspend() callback
1001may be executed right after the usage counter has been decremented, because
1002user space may already have cuased the pm_runtime_allow() helper function
1003unblocking the runtime PM of the device to run via sysfs, so the driver must
1004be prepared to cope with that.
1005
1006The driver itself should not call pm_runtime_allow(), though. Instead, it
1007should let user space or some platform-specific code do that (user space can
1008do it via sysfs as stated above), but it must be prepared to handle the
991runtime PM of the device correctly as soon as pm_runtime_allow() is called 1009runtime PM of the device correctly as soon as pm_runtime_allow() is called
992(which may happen at any time). [It also is possible that user space causes 1010(which may happen at any time, even before the driver is loaded).
993pm_runtime_allow() to be called via sysfs before the driver is loaded, so in 1011
994fact the driver has to be prepared to handle the runtime PM of the device as 1012When the driver's remove callback runs, it has to balance the decrementation
995soon as it calls pm_runtime_enable().] 1013of the device's runtime PM usage counter at the probe time. For this reason,
1014if it has decremented the counter in its probe callback, it must run
1015pm_runtime_get_noresume() in its remove callback. [Since the core carries
1016out a runtime resume of the device and bumps up the device's usage counter
1017before running the driver's remove callback, the runtime PM of the device
1018is effectively disabled for the duration of the remove execution and all
1019runtime PM helper functions incrementing the device's usage counter are
1020then effectively equivalent to pm_runtime_get_noresume().]
996 1021
997The runtime PM framework works by processing requests to suspend or resume 1022The runtime PM framework works by processing requests to suspend or resume
998devices, or to check if they are idle (in which cases it is reasonable to 1023devices, or to check if they are idle (in which cases it is reasonable to
diff --git a/Documentation/ptp/testptp.c b/Documentation/ptp/testptp.c
index 2bc8abc57fa0..6c6247aaa7b9 100644
--- a/Documentation/ptp/testptp.c
+++ b/Documentation/ptp/testptp.c
@@ -18,6 +18,7 @@
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */ 19 */
20#define _GNU_SOURCE 20#define _GNU_SOURCE
21#define __SANE_USERSPACE_TYPES__ /* For PPC64, to get LL64 types */
21#include <errno.h> 22#include <errno.h>
22#include <fcntl.h> 23#include <fcntl.h>
23#include <inttypes.h> 24#include <inttypes.h>
diff --git a/Documentation/static-keys.txt b/Documentation/static-keys.txt
index f4cb0b2d5cd7..477927becacb 100644
--- a/Documentation/static-keys.txt
+++ b/Documentation/static-keys.txt
@@ -15,8 +15,8 @@ The updated API replacements are:
15 15
16DEFINE_STATIC_KEY_TRUE(key); 16DEFINE_STATIC_KEY_TRUE(key);
17DEFINE_STATIC_KEY_FALSE(key); 17DEFINE_STATIC_KEY_FALSE(key);
18static_key_likely() 18static_branch_likely()
19statick_key_unlikely() 19static_branch_unlikely()
20 20
210) Abstract 210) Abstract
22 22
diff --git a/Documentation/sysctl/net.txt b/Documentation/sysctl/net.txt
index 6294b5186ae5..809ab6efcc74 100644
--- a/Documentation/sysctl/net.txt
+++ b/Documentation/sysctl/net.txt
@@ -54,13 +54,15 @@ default_qdisc
54-------------- 54--------------
55 55
56The default queuing discipline to use for network devices. This allows 56The default queuing discipline to use for network devices. This allows
57overriding the default queue discipline of pfifo_fast with an 57overriding the default of pfifo_fast with an alternative. Since the default
58alternative. Since the default queuing discipline is created with the 58queuing discipline is created without additional parameters so is best suited
59no additional parameters so is best suited to queuing disciplines that 59to queuing disciplines that work well without configuration like stochastic
60work well without configuration like stochastic fair queue (sfq), 60fair queue (sfq), CoDel (codel) or fair queue CoDel (fq_codel). Don't use
61CoDel (codel) or fair queue CoDel (fq_codel). Don't use queuing disciplines 61queuing disciplines like Hierarchical Token Bucket or Deficit Round Robin
62like Hierarchical Token Bucket or Deficit Round Robin which require setting 62which require setting up classes and bandwidths. Note that physical multiqueue
63up classes and bandwidths. 63interfaces still use mq as root qdisc, which in turn uses this default for its
64leaves. Virtual devices (like e.g. lo or veth) ignore this setting and instead
65default to noqueue.
64Default: pfifo_fast 66Default: pfifo_fast
65 67
66busy_read 68busy_read
diff --git a/Documentation/thermal/power_allocator.txt b/Documentation/thermal/power_allocator.txt
index c3797b529991..a1ce2235f121 100644
--- a/Documentation/thermal/power_allocator.txt
+++ b/Documentation/thermal/power_allocator.txt
@@ -4,7 +4,7 @@ Power allocator governor tunables
4Trip points 4Trip points
5----------- 5-----------
6 6
7The governor requires the following two passive trip points: 7The governor works optimally with the following two passive trip points:
8 8
91. "switch on" trip point: temperature above which the governor 91. "switch on" trip point: temperature above which the governor
10 control loop starts operating. This is the first passive trip 10 control loop starts operating. This is the first passive trip
diff --git a/MAINTAINERS b/MAINTAINERS
index 7ba7ab749c85..e729b52b7345 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -615,9 +615,8 @@ F: Documentation/hwmon/fam15h_power
615F: drivers/hwmon/fam15h_power.c 615F: drivers/hwmon/fam15h_power.c
616 616
617AMD GEODE CS5536 USB DEVICE CONTROLLER DRIVER 617AMD GEODE CS5536 USB DEVICE CONTROLLER DRIVER
618M: Thomas Dahlmann <dahlmann.thomas@arcor.de>
619L: linux-geode@lists.infradead.org (moderated for non-subscribers) 618L: linux-geode@lists.infradead.org (moderated for non-subscribers)
620S: Supported 619S: Orphan
621F: drivers/usb/gadget/udc/amd5536udc.* 620F: drivers/usb/gadget/udc/amd5536udc.*
622 621
623AMD GEODE PROCESSOR/CHIPSET SUPPORT 622AMD GEODE PROCESSOR/CHIPSET SUPPORT
@@ -789,6 +788,11 @@ S: Maintained
789F: drivers/net/appletalk/ 788F: drivers/net/appletalk/
790F: net/appletalk/ 789F: net/appletalk/
791 790
791APPLIED MICRO (APM) X-GENE DEVICE TREE SUPPORT
792M: Duc Dang <dhdang@apm.com>
793S: Supported
794F: arch/arm64/boot/dts/apm/
795
792APPLIED MICRO (APM) X-GENE SOC ETHERNET DRIVER 796APPLIED MICRO (APM) X-GENE SOC ETHERNET DRIVER
793M: Iyappan Subramanian <isubramanian@apm.com> 797M: Iyappan Subramanian <isubramanian@apm.com>
794M: Keyur Chudgar <kchudgar@apm.com> 798M: Keyur Chudgar <kchudgar@apm.com>
@@ -808,6 +812,13 @@ S: Maintained
808F: drivers/video/fbdev/arcfb.c 812F: drivers/video/fbdev/arcfb.c
809F: drivers/video/fbdev/core/fb_defio.c 813F: drivers/video/fbdev/core/fb_defio.c
810 814
815ARCNET NETWORK LAYER
816M: Michael Grzeschik <m.grzeschik@pengutronix.de>
817L: netdev@vger.kernel.org
818S: Maintained
819F: drivers/net/arcnet/
820F: include/uapi/linux/if_arcnet.h
821
811ARM MFM AND FLOPPY DRIVERS 822ARM MFM AND FLOPPY DRIVERS
812M: Ian Molton <spyro@f2s.com> 823M: Ian Molton <spyro@f2s.com>
813S: Maintained 824S: Maintained
@@ -1439,6 +1450,10 @@ F: drivers/*/*s3c2410*
1439F: drivers/*/*/*s3c2410* 1450F: drivers/*/*/*s3c2410*
1440F: drivers/spi/spi-s3c* 1451F: drivers/spi/spi-s3c*
1441F: sound/soc/samsung/* 1452F: sound/soc/samsung/*
1453F: Documentation/arm/Samsung/
1454F: Documentation/devicetree/bindings/arm/samsung/
1455F: Documentation/devicetree/bindings/sram/samsung-sram.txt
1456F: Documentation/devicetree/bindings/power/pd-samsung.txt
1442N: exynos 1457N: exynos
1443 1458
1444ARM/SAMSUNG MOBILE MACHINE SUPPORT 1459ARM/SAMSUNG MOBILE MACHINE SUPPORT
@@ -1485,8 +1500,6 @@ F: arch/arm/boot/dts/emev2*
1485F: arch/arm/boot/dts/r7s* 1500F: arch/arm/boot/dts/r7s*
1486F: arch/arm/boot/dts/r8a* 1501F: arch/arm/boot/dts/r8a*
1487F: arch/arm/boot/dts/sh* 1502F: arch/arm/boot/dts/sh*
1488F: arch/arm/configs/bockw_defconfig
1489F: arch/arm/configs/marzen_defconfig
1490F: arch/arm/configs/shmobile_defconfig 1503F: arch/arm/configs/shmobile_defconfig
1491F: arch/arm/include/debug/renesas-scif.S 1504F: arch/arm/include/debug/renesas-scif.S
1492F: arch/arm/mach-shmobile/ 1505F: arch/arm/mach-shmobile/
@@ -3394,7 +3407,6 @@ F: drivers/staging/dgnc/
3394 3407
3395DIGI EPCA PCI PRODUCTS 3408DIGI EPCA PCI PRODUCTS
3396M: Lidza Louina <lidza.louina@gmail.com> 3409M: Lidza Louina <lidza.louina@gmail.com>
3397M: Mark Hounschell <markh@compro.net>
3398M: Daeseok Youn <daeseok.youn@gmail.com> 3410M: Daeseok Youn <daeseok.youn@gmail.com>
3399L: driverdev-devel@linuxdriverproject.org 3411L: driverdev-devel@linuxdriverproject.org
3400S: Maintained 3412S: Maintained
@@ -5952,7 +5964,7 @@ F: virt/kvm/
5952KERNEL VIRTUAL MACHINE (KVM) FOR AMD-V 5964KERNEL VIRTUAL MACHINE (KVM) FOR AMD-V
5953M: Joerg Roedel <joro@8bytes.org> 5965M: Joerg Roedel <joro@8bytes.org>
5954L: kvm@vger.kernel.org 5966L: kvm@vger.kernel.org
5955W: http://kvm.qumranet.com 5967W: http://www.linux-kvm.org/
5956S: Maintained 5968S: Maintained
5957F: arch/x86/include/asm/svm.h 5969F: arch/x86/include/asm/svm.h
5958F: arch/x86/kvm/svm.c 5970F: arch/x86/kvm/svm.c
@@ -5960,7 +5972,7 @@ F: arch/x86/kvm/svm.c
5960KERNEL VIRTUAL MACHINE (KVM) FOR POWERPC 5972KERNEL VIRTUAL MACHINE (KVM) FOR POWERPC
5961M: Alexander Graf <agraf@suse.com> 5973M: Alexander Graf <agraf@suse.com>
5962L: kvm-ppc@vger.kernel.org 5974L: kvm-ppc@vger.kernel.org
5963W: http://kvm.qumranet.com 5975W: http://www.linux-kvm.org/
5964T: git git://github.com/agraf/linux-2.6.git 5976T: git git://github.com/agraf/linux-2.6.git
5965S: Supported 5977S: Supported
5966F: arch/powerpc/include/asm/kvm* 5978F: arch/powerpc/include/asm/kvm*
@@ -6452,11 +6464,11 @@ F: drivers/hwmon/ltc4261.c
6452LTP (Linux Test Project) 6464LTP (Linux Test Project)
6453M: Mike Frysinger <vapier@gentoo.org> 6465M: Mike Frysinger <vapier@gentoo.org>
6454M: Cyril Hrubis <chrubis@suse.cz> 6466M: Cyril Hrubis <chrubis@suse.cz>
6455M: Wanlong Gao <gaowanlong@cn.fujitsu.com> 6467M: Wanlong Gao <wanlong.gao@gmail.com>
6456M: Jan Stancek <jstancek@redhat.com> 6468M: Jan Stancek <jstancek@redhat.com>
6457M: Stanislav Kholmanskikh <stanislav.kholmanskikh@oracle.com> 6469M: Stanislav Kholmanskikh <stanislav.kholmanskikh@oracle.com>
6458M: Alexey Kodanev <alexey.kodanev@oracle.com> 6470M: Alexey Kodanev <alexey.kodanev@oracle.com>
6459L: ltp-list@lists.sourceforge.net (subscribers-only) 6471L: ltp@lists.linux.it (subscribers-only)
6460W: http://linux-test-project.github.io/ 6472W: http://linux-test-project.github.io/
6461T: git git://github.com/linux-test-project/ltp.git 6473T: git git://github.com/linux-test-project/ltp.git
6462S: Maintained 6474S: Maintained
@@ -8500,7 +8512,6 @@ F: Documentation/networking/LICENSE.qla3xxx
8500F: drivers/net/ethernet/qlogic/qla3xxx.* 8512F: drivers/net/ethernet/qlogic/qla3xxx.*
8501 8513
8502QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER 8514QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER
8503M: Shahed Shaikh <shahed.shaikh@qlogic.com>
8504M: Dept-GELinuxNICDev@qlogic.com 8515M: Dept-GELinuxNICDev@qlogic.com
8505L: netdev@vger.kernel.org 8516L: netdev@vger.kernel.org
8506S: Supported 8517S: Supported
@@ -9904,8 +9915,8 @@ F: drivers/staging/media/lirc/
9904STAGING - LUSTRE PARALLEL FILESYSTEM 9915STAGING - LUSTRE PARALLEL FILESYSTEM
9905M: Oleg Drokin <oleg.drokin@intel.com> 9916M: Oleg Drokin <oleg.drokin@intel.com>
9906M: Andreas Dilger <andreas.dilger@intel.com> 9917M: Andreas Dilger <andreas.dilger@intel.com>
9907L: HPDD-discuss@lists.01.org (moderated for non-subscribers) 9918L: lustre-devel@lists.lustre.org (moderated for non-subscribers)
9908W: http://lustre.opensfs.org/ 9919W: http://wiki.lustre.org/
9909S: Maintained 9920S: Maintained
9910F: drivers/staging/lustre 9921F: drivers/staging/lustre
9911 9922
@@ -10338,6 +10349,16 @@ F: include/uapi/linux/thermal.h
10338F: include/linux/cpu_cooling.h 10349F: include/linux/cpu_cooling.h
10339F: Documentation/devicetree/bindings/thermal/ 10350F: Documentation/devicetree/bindings/thermal/
10340 10351
10352THERMAL/CPU_COOLING
10353M: Amit Daniel Kachhap <amit.kachhap@gmail.com>
10354M: Viresh Kumar <viresh.kumar@linaro.org>
10355M: Javi Merino <javi.merino@arm.com>
10356L: linux-pm@vger.kernel.org
10357S: Supported
10358F: Documentation/thermal/cpu-cooling-api.txt
10359F: drivers/thermal/cpu_cooling.c
10360F: include/linux/cpu_cooling.h
10361
10341THINGM BLINK(1) USB RGB LED DRIVER 10362THINGM BLINK(1) USB RGB LED DRIVER
10342M: Vivien Didelot <vivien.didelot@savoirfairelinux.com> 10363M: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
10343S: Maintained 10364S: Maintained
@@ -11187,7 +11208,7 @@ F: drivers/vlynq/vlynq.c
11187F: include/linux/vlynq.h 11208F: include/linux/vlynq.h
11188 11209
11189VME SUBSYSTEM 11210VME SUBSYSTEM
11190M: Martyn Welch <martyn.welch@ge.com> 11211M: Martyn Welch <martyn@welchs.me.uk>
11191M: Manohar Vanga <manohar.vanga@gmail.com> 11212M: Manohar Vanga <manohar.vanga@gmail.com>
11192M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 11213M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
11193L: devel@driverdev.osuosl.org 11214L: devel@driverdev.osuosl.org
@@ -11239,7 +11260,6 @@ VOLTAGE AND CURRENT REGULATOR FRAMEWORK
11239M: Liam Girdwood <lgirdwood@gmail.com> 11260M: Liam Girdwood <lgirdwood@gmail.com>
11240M: Mark Brown <broonie@kernel.org> 11261M: Mark Brown <broonie@kernel.org>
11241L: linux-kernel@vger.kernel.org 11262L: linux-kernel@vger.kernel.org
11242W: http://opensource.wolfsonmicro.com/node/15
11243W: http://www.slimlogic.co.uk/?p=48 11263W: http://www.slimlogic.co.uk/?p=48
11244T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git 11264T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
11245S: Supported 11265S: Supported
@@ -11253,6 +11273,7 @@ L: netdev@vger.kernel.org
11253S: Maintained 11273S: Maintained
11254F: drivers/net/vrf.c 11274F: drivers/net/vrf.c
11255F: include/net/vrf.h 11275F: include/net/vrf.h
11276F: Documentation/networking/vrf.txt
11256 11277
11257VT1211 HARDWARE MONITOR DRIVER 11278VT1211 HARDWARE MONITOR DRIVER
11258M: Juerg Haefliger <juergh@gmail.com> 11279M: Juerg Haefliger <juergh@gmail.com>
@@ -11368,17 +11389,15 @@ WM97XX TOUCHSCREEN DRIVERS
11368M: Mark Brown <broonie@kernel.org> 11389M: Mark Brown <broonie@kernel.org>
11369M: Liam Girdwood <lrg@slimlogic.co.uk> 11390M: Liam Girdwood <lrg@slimlogic.co.uk>
11370L: linux-input@vger.kernel.org 11391L: linux-input@vger.kernel.org
11371T: git git://opensource.wolfsonmicro.com/linux-2.6-touch 11392W: https://github.com/CirrusLogic/linux-drivers/wiki
11372W: http://opensource.wolfsonmicro.com/node/7
11373S: Supported 11393S: Supported
11374F: drivers/input/touchscreen/*wm97* 11394F: drivers/input/touchscreen/*wm97*
11375F: include/linux/wm97xx.h 11395F: include/linux/wm97xx.h
11376 11396
11377WOLFSON MICROELECTRONICS DRIVERS 11397WOLFSON MICROELECTRONICS DRIVERS
11378L: patches@opensource.wolfsonmicro.com 11398L: patches@opensource.wolfsonmicro.com
11379T: git git://opensource.wolfsonmicro.com/linux-2.6-asoc 11399T: git https://github.com/CirrusLogic/linux-drivers.git
11380T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus 11400W: https://github.com/CirrusLogic/linux-drivers/wiki
11381W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices
11382S: Supported 11401S: Supported
11383F: Documentation/hwmon/wm83?? 11402F: Documentation/hwmon/wm83??
11384F: arch/arm/mach-s3c64xx/mach-crag6410* 11403F: arch/arm/mach-s3c64xx/mach-crag6410*
diff --git a/Makefile b/Makefile
index 1a132ea43ca5..fd46821e428d 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
1VERSION = 4 1VERSION = 4
2PATCHLEVEL = 3 2PATCHLEVEL = 3
3SUBLEVEL = 0 3SUBLEVEL = 0
4EXTRAVERSION = -rc1 4EXTRAVERSION = -rc4
5NAME = Hurr durr I'ma sheep 5NAME = Hurr durr I'ma sheep
6 6
7# *DOCUMENTATION* 7# *DOCUMENTATION*
diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h
index f05bdb4b1cb9..ff4049155c84 100644
--- a/arch/alpha/include/asm/io.h
+++ b/arch/alpha/include/asm/io.h
@@ -297,7 +297,9 @@ static inline void __iomem * ioremap_nocache(unsigned long offset,
297 unsigned long size) 297 unsigned long size)
298{ 298{
299 return ioremap(offset, size); 299 return ioremap(offset, size);
300} 300}
301
302#define ioremap_uc ioremap_nocache
301 303
302static inline void iounmap(volatile void __iomem *addr) 304static inline void iounmap(volatile void __iomem *addr)
303{ 305{
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index 2804648c8ff4..2d6efcff3bf3 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -117,6 +117,6 @@ handle_irq(int irq)
117 } 117 }
118 118
119 irq_enter(); 119 irq_enter();
120 generic_handle_irq_desc(irq, desc); 120 generic_handle_irq_desc(desc);
121 irq_exit(); 121 irq_exit();
122} 122}
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c
index cded02c890aa..5f387ee5b5c5 100644
--- a/arch/alpha/kernel/pci.c
+++ b/arch/alpha/kernel/pci.c
@@ -242,7 +242,12 @@ pci_restore_srm_config(void)
242 242
243void pcibios_fixup_bus(struct pci_bus *bus) 243void pcibios_fixup_bus(struct pci_bus *bus)
244{ 244{
245 struct pci_dev *dev; 245 struct pci_dev *dev = bus->self;
246
247 if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
248 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
249 pci_read_bridge_bases(bus);
250 }
246 251
247 list_for_each_entry(dev, &bus->devices, bus_list) { 252 list_for_each_entry(dev, &bus->devices, bus_list) {
248 pdev_save_srm_config(dev); 253 pdev_save_srm_config(dev);
diff --git a/arch/alpha/lib/udelay.c b/arch/alpha/lib/udelay.c
index 69d52aa37bae..f2d81ff38aa6 100644
--- a/arch/alpha/lib/udelay.c
+++ b/arch/alpha/lib/udelay.c
@@ -30,6 +30,7 @@ __delay(int loops)
30 " bgt %0,1b" 30 " bgt %0,1b"
31 : "=&r" (tmp), "=r" (loops) : "1"(loops)); 31 : "=&r" (tmp), "=r" (loops) : "1"(loops));
32} 32}
33EXPORT_SYMBOL(__delay);
33 34
34#ifdef CONFIG_SMP 35#ifdef CONFIG_SMP
35#define LPJ cpu_data[smp_processor_id()].loops_per_jiffy 36#define LPJ cpu_data[smp_processor_id()].loops_per_jiffy
diff --git a/arch/arc/include/asm/Kbuild b/arch/arc/include/asm/Kbuild
index 7611b10a2d23..0b10ef2a4372 100644
--- a/arch/arc/include/asm/Kbuild
+++ b/arch/arc/include/asm/Kbuild
@@ -48,4 +48,5 @@ generic-y += types.h
48generic-y += ucontext.h 48generic-y += ucontext.h
49generic-y += user.h 49generic-y += user.h
50generic-y += vga.h 50generic-y += vga.h
51generic-y += word-at-a-time.h
51generic-y += xor.h 52generic-y += xor.h
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index d9e44b62df05..4ffd1855f1bd 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -252,7 +252,7 @@ static struct irq_chip idu_irq_chip = {
252 252
253static int idu_first_irq; 253static int idu_first_irq;
254 254
255static void idu_cascade_isr(unsigned int __core_irq, struct irq_desc *desc) 255static void idu_cascade_isr(struct irq_desc *desc)
256{ 256{
257 struct irq_domain *domain = irq_desc_get_handler_data(desc); 257 struct irq_domain *domain = irq_desc_get_handler_data(desc);
258 unsigned int core_irq = irq_desc_get_irq(desc); 258 unsigned int core_irq = irq_desc_get_irq(desc);
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 72ad724c67ae..471a3670cd3e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -621,28 +621,6 @@ config ARCH_PXA
621 help 621 help
622 Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 622 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
623 623
624config ARCH_SHMOBILE_LEGACY
625 bool "Renesas ARM SoCs (non-multiplatform)"
626 select ARCH_SHMOBILE
627 select ARM_PATCH_PHYS_VIRT if MMU
628 select CLKDEV_LOOKUP
629 select CPU_V7
630 select GENERIC_CLOCKEVENTS
631 select HAVE_ARM_SCU if SMP
632 select HAVE_ARM_TWD if SMP
633 select HAVE_SMP
634 select MIGHT_HAVE_CACHE_L2X0
635 select MULTI_IRQ_HANDLER
636 select NO_IOPORT_MAP
637 select PINCTRL
638 select PM_GENERIC_DOMAINS if PM
639 select SH_CLK_CPG
640 select SPARSE_IRQ
641 help
642 Support for Renesas ARM SoC platforms using a non-multiplatform
643 kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
644 and RZ families.
645
646config ARCH_RPC 624config ARCH_RPC
647 bool "RiscPC" 625 bool "RiscPC"
648 select ARCH_ACORN 626 select ARCH_ACORN
@@ -1534,7 +1512,6 @@ config HZ_FIXED
1534 default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \ 1512 default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
1535 ARCH_S5PV210 || ARCH_EXYNOS4 1513 ARCH_S5PV210 || ARCH_EXYNOS4
1536 default 128 if SOC_AT91RM9200 1514 default 128 if SOC_AT91RM9200
1537 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
1538 default 0 1515 default 0
1539 1516
1540choice 1517choice
@@ -1752,8 +1729,7 @@ config ARM_MODULE_PLTS
1752source "mm/Kconfig" 1729source "mm/Kconfig"
1753 1730
1754config FORCE_MAX_ZONEORDER 1731config FORCE_MAX_ZONEORDER
1755 int "Maximum zone order" if ARCH_SHMOBILE_LEGACY 1732 int "Maximum zone order"
1756 range 11 64 if ARCH_SHMOBILE_LEGACY
1757 default "12" if SOC_AM33XX 1733 default "12" if SOC_AM33XX
1758 default "9" if SA1111 || ARCH_EFM32 1734 default "9" if SA1111 || ARCH_EFM32
1759 default "11" 1735 default "11"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 0cfd7f947f6b..40a3c25c1e0d 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1621,8 +1621,7 @@ config DEBUG_UNCOMPRESS
1621config UNCOMPRESS_INCLUDE 1621config UNCOMPRESS_INCLUDE
1622 string 1622 string
1623 default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM || \ 1623 default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM || \
1624 PLAT_SAMSUNG || ARM_SINGLE_ARMV7M || \ 1624 PLAT_SAMSUNG || ARM_SINGLE_ARMV7M
1625 ARCH_SHMOBILE_LEGACY
1626 default "mach/uncompress.h" 1625 default "mach/uncompress.h"
1627 1626
1628config EARLY_PRINTK 1627config EARLY_PRINTK
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 7451b447cc2d..2c2b28ee4811 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -54,6 +54,14 @@ AS += -EL
54LD += -EL 54LD += -EL
55endif 55endif
56 56
57#
58# The Scalar Replacement of Aggregates (SRA) optimization pass in GCC 4.9 and
59# later may result in code being generated that handles signed short and signed
60# char struct members incorrectly. So disable it.
61# (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932)
62#
63KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra)
64
57# This selects which instruction set is used. 65# This selects which instruction set is used.
58# Note that GCC does not numerically define an architecture version 66# Note that GCC does not numerically define an architecture version
59# macro, but instead defines a whole series of macros which makes 67# macro, but instead defines a whole series of macros which makes
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index aaaf299775f9..1a8d79944013 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
74 bcm47081-buffalo-wzr-900dhp.dtb \ 74 bcm47081-buffalo-wzr-900dhp.dtb \
75 bcm4709-asus-rt-ac87u.dtb \ 75 bcm4709-asus-rt-ac87u.dtb \
76 bcm4709-buffalo-wxr-1900dhp.dtb \ 76 bcm4709-buffalo-wxr-1900dhp.dtb \
77 bcm4709-netgear-r7000.dtb \
77 bcm4709-netgear-r8000.dtb 78 bcm4709-netgear-r8000.dtb
78dtb-$(CONFIG_ARCH_BCM_63XX) += \ 79dtb-$(CONFIG_ARCH_BCM_63XX) += \
79 bcm963138dvt.dtb 80 bcm963138dvt.dtb
@@ -85,6 +86,8 @@ dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \
85dtb-$(CONFIG_ARCH_BCM_MOBILE) += \ 86dtb-$(CONFIG_ARCH_BCM_MOBILE) += \
86 bcm28155-ap.dtb \ 87 bcm28155-ap.dtb \
87 bcm21664-garnet.dtb 88 bcm21664-garnet.dtb
89dtb-$(CONFIG_ARCH_BCM_NSP) += \
90 bcm958625k.dtb
88dtb-$(CONFIG_ARCH_BERLIN) += \ 91dtb-$(CONFIG_ARCH_BERLIN) += \
89 berlin2-sony-nsz-gs7.dtb \ 92 berlin2-sony-nsz-gs7.dtb \
90 berlin2cd-google-chromecast.dtb \ 93 berlin2cd-google-chromecast.dtb \
@@ -117,6 +120,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
117 exynos5250-arndale.dtb \ 120 exynos5250-arndale.dtb \
118 exynos5250-smdk5250.dtb \ 121 exynos5250-smdk5250.dtb \
119 exynos5250-snow.dtb \ 122 exynos5250-snow.dtb \
123 exynos5250-snow-rev5.dtb \
120 exynos5250-spring.dtb \ 124 exynos5250-spring.dtb \
121 exynos5260-xyref5260.dtb \ 125 exynos5260-xyref5260.dtb \
122 exynos5410-smdk5410.dtb \ 126 exynos5410-smdk5410.dtb \
@@ -125,6 +129,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
125 exynos5420-smdk5420.dtb \ 129 exynos5420-smdk5420.dtb \
126 exynos5422-odroidxu3.dtb \ 130 exynos5422-odroidxu3.dtb \
127 exynos5422-odroidxu3-lite.dtb \ 131 exynos5422-odroidxu3-lite.dtb \
132 exynos5422-odroidxu4.dtb \
128 exynos5440-sd5v1.dtb \ 133 exynos5440-sd5v1.dtb \
129 exynos5440-ssdk5440.dtb \ 134 exynos5440-ssdk5440.dtb \
130 exynos5800-peach-pi.dtb 135 exynos5800-peach-pi.dtb
@@ -229,6 +234,9 @@ dtb-$(CONFIG_ARCH_MMP) += \
229 pxa168-aspenite.dtb \ 234 pxa168-aspenite.dtb \
230 pxa910-dkb.dtb \ 235 pxa910-dkb.dtb \
231 mmp2-brownstone.dtb 236 mmp2-brownstone.dtb
237dtb-$(CONFIG_MACH_MESON8B) += \
238 meson8b-mxq.dtb \
239 meson8b-odroidc1.dtb
232dtb-$(CONFIG_ARCH_MOXART) += \ 240dtb-$(CONFIG_ARCH_MOXART) += \
233 moxart-uc7112lx.dtb 241 moxart-uc7112lx.dtb
234dtb-$(CONFIG_SOC_IMX1) += \ 242dtb-$(CONFIG_SOC_IMX1) += \
@@ -286,6 +294,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
286 imx6dl-gw551x.dtb \ 294 imx6dl-gw551x.dtb \
287 imx6dl-gw552x.dtb \ 295 imx6dl-gw552x.dtb \
288 imx6dl-hummingboard.dtb \ 296 imx6dl-hummingboard.dtb \
297 imx6dl-nit6xlite.dtb \
289 imx6dl-nitrogen6x.dtb \ 298 imx6dl-nitrogen6x.dtb \
290 imx6dl-phytec-pbab01.dtb \ 299 imx6dl-phytec-pbab01.dtb \
291 imx6dl-rex-basic.dtb \ 300 imx6dl-rex-basic.dtb \
@@ -315,6 +324,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
315 imx6q-gw552x.dtb \ 324 imx6q-gw552x.dtb \
316 imx6q-hummingboard.dtb \ 325 imx6q-hummingboard.dtb \
317 imx6q-nitrogen6x.dtb \ 326 imx6q-nitrogen6x.dtb \
327 imx6q-nitrogen6_max.dtb \
318 imx6q-phytec-pbab01.dtb \ 328 imx6q-phytec-pbab01.dtb \
319 imx6q-rex-pro.dtb \ 329 imx6q-rex-pro.dtb \
320 imx6q-sabreauto.dtb \ 330 imx6q-sabreauto.dtb \
@@ -448,6 +458,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
448 am335x-base0033.dtb \ 458 am335x-base0033.dtb \
449 am335x-bone.dtb \ 459 am335x-bone.dtb \
450 am335x-boneblack.dtb \ 460 am335x-boneblack.dtb \
461 am335x-bonegreen.dtb \
451 am335x-sl50.dtb \ 462 am335x-sl50.dtb \
452 am335x-evm.dtb \ 463 am335x-evm.dtb \
453 am335x-evmsk.dtb \ 464 am335x-evmsk.dtb \
@@ -472,6 +483,7 @@ dtb-$(CONFIG_SOC_AM43XX) += \
472 am437x-gp-evm.dtb 483 am437x-gp-evm.dtb
473dtb-$(CONFIG_SOC_OMAP5) += \ 484dtb-$(CONFIG_SOC_OMAP5) += \
474 omap5-cm-t54.dtb \ 485 omap5-cm-t54.dtb \
486 omap5-igep0050.dtb \
475 omap5-sbc-t54.dtb \ 487 omap5-sbc-t54.dtb \
476 omap5-uevm.dtb 488 omap5-uevm.dtb
477dtb-$(CONFIG_SOC_DRA7XX) += \ 489dtb-$(CONFIG_SOC_DRA7XX) += \
@@ -508,7 +520,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
508 rk3288-evb-rk808.dtb \ 520 rk3288-evb-rk808.dtb \
509 rk3288-firefly-beta.dtb \ 521 rk3288-firefly-beta.dtb \
510 rk3288-firefly.dtb \ 522 rk3288-firefly.dtb \
523 rk3288-popmetal.dtb \
511 rk3288-r89.dtb \ 524 rk3288-r89.dtb \
525 rk3288-rock2-square.dtb \
526 rk3288-veyron-jaq.dtb \
512 rk3288-veyron-jerry.dtb \ 527 rk3288-veyron-jerry.dtb \
513 rk3288-veyron-minnie.dtb \ 528 rk3288-veyron-minnie.dtb \
514 rk3288-veyron-pinky.dtb \ 529 rk3288-veyron-pinky.dtb \
@@ -524,9 +539,6 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
524 s5pv210-smdkc110.dtb \ 539 s5pv210-smdkc110.dtb \
525 s5pv210-smdkv210.dtb \ 540 s5pv210-smdkv210.dtb \
526 s5pv210-torbreck.dtb 541 s5pv210-torbreck.dtb
527dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \
528 r8a7778-bockw.dtb \
529 r8a7778-bockw-reference.dtb
530dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \ 542dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
531 emev2-kzm9d.dtb \ 543 emev2-kzm9d.dtb \
532 r7s72100-genmai.dtb \ 544 r7s72100-genmai.dtb \
@@ -537,6 +549,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
537 r8a7790-lager.dtb \ 549 r8a7790-lager.dtb \
538 r8a7791-henninger.dtb \ 550 r8a7791-henninger.dtb \
539 r8a7791-koelsch.dtb \ 551 r8a7791-koelsch.dtb \
552 r8a7791-porter.dtb \
540 r8a7793-gose.dtb \ 553 r8a7793-gose.dtb \
541 r8a7794-alt.dtb \ 554 r8a7794-alt.dtb \
542 r8a7794-silk.dtb \ 555 r8a7794-silk.dtb \
@@ -579,24 +592,32 @@ dtb-$(CONFIG_MACH_SUN4I) += \
579 sun4i-a10-gemei-g9.dtb \ 592 sun4i-a10-gemei-g9.dtb \
580 sun4i-a10-hackberry.dtb \ 593 sun4i-a10-hackberry.dtb \
581 sun4i-a10-hyundai-a7hd.dtb \ 594 sun4i-a10-hyundai-a7hd.dtb \
595 sun4i-a10-inet1.dtb \
582 sun4i-a10-inet97fv2.dtb \ 596 sun4i-a10-inet97fv2.dtb \
583 sun4i-a10-itead-iteaduino-plus.dts \ 597 sun4i-a10-inet9f-rev03.dtb \
598 sun4i-a10-itead-iteaduino-plus.dtb \
584 sun4i-a10-jesurun-q5.dtb \ 599 sun4i-a10-jesurun-q5.dtb \
585 sun4i-a10-marsboard.dtb \ 600 sun4i-a10-marsboard.dtb \
586 sun4i-a10-mini-xplus.dtb \ 601 sun4i-a10-mini-xplus.dtb \
587 sun4i-a10-mk802.dtb \ 602 sun4i-a10-mk802.dtb \
588 sun4i-a10-mk802ii.dtb \ 603 sun4i-a10-mk802ii.dtb \
589 sun4i-a10-olinuxino-lime.dtb \ 604 sun4i-a10-olinuxino-lime.dtb \
590 sun4i-a10-pcduino.dtb 605 sun4i-a10-pcduino.dtb \
606 sun4i-a10-pcduino2.dtb
591dtb-$(CONFIG_MACH_SUN5I) += \ 607dtb-$(CONFIG_MACH_SUN5I) += \
608 sun5i-a10s-auxtek-t003.dtb \
592 sun5i-a10s-auxtek-t004.dtb \ 609 sun5i-a10s-auxtek-t004.dtb \
593 sun5i-a10s-mk802.dtb \ 610 sun5i-a10s-mk802.dtb \
594 sun5i-a10s-olinuxino-micro.dtb \ 611 sun5i-a10s-olinuxino-micro.dtb \
595 sun5i-a10s-r7-tv-dongle.dtb \ 612 sun5i-a10s-r7-tv-dongle.dtb \
613 sun5i-a10s-wobo-i5.dtb \
596 sun5i-a13-hsg-h702.dtb \ 614 sun5i-a13-hsg-h702.dtb \
615 sun5i-a13-inet-98v-rev2.dtb \
597 sun5i-a13-olinuxino.dtb \ 616 sun5i-a13-olinuxino.dtb \
598 sun5i-a13-olinuxino-micro.dtb \ 617 sun5i-a13-olinuxino-micro.dtb \
599 sun5i-a13-utoo-p66.dtb 618 sun5i-a13-q8-tablet.dtb \
619 sun5i-a13-utoo-p66.dtb \
620 sun5i-r8-chip.dtb
600dtb-$(CONFIG_MACH_SUN6I) += \ 621dtb-$(CONFIG_MACH_SUN6I) += \
601 sun6i-a31-app4-evb1.dtb \ 622 sun6i-a31-app4-evb1.dtb \
602 sun6i-a31-colombus.dtb \ 623 sun6i-a31-colombus.dtb \
@@ -604,7 +625,9 @@ dtb-$(CONFIG_MACH_SUN6I) += \
604 sun6i-a31-i7.dtb \ 625 sun6i-a31-i7.dtb \
605 sun6i-a31-m9.dtb \ 626 sun6i-a31-m9.dtb \
606 sun6i-a31-mele-a1000g-quad.dtb \ 627 sun6i-a31-mele-a1000g-quad.dtb \
607 sun6i-a31s-cs908.dtb 628 sun6i-a31s-cs908.dtb \
629 sun6i-a31s-sinovoip-bpi-m2.dtb \
630 sun6i-a31s-yones-toptech-bs1078-v2.dtb
608dtb-$(CONFIG_MACH_SUN7I) += \ 631dtb-$(CONFIG_MACH_SUN7I) += \
609 sun7i-a20-bananapi.dtb \ 632 sun7i-a20-bananapi.dtb \
610 sun7i-a20-bananapro.dtb \ 633 sun7i-a20-bananapro.dtb \
@@ -614,6 +637,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
614 sun7i-a20-i12-tvbox.dtb \ 637 sun7i-a20-i12-tvbox.dtb \
615 sun7i-a20-m3.dtb \ 638 sun7i-a20-m3.dtb \
616 sun7i-a20-mk808c.dtb \ 639 sun7i-a20-mk808c.dtb \
640 sun7i-a20-olimex-som-evb.dtb \
617 sun7i-a20-olinuxino-lime.dtb \ 641 sun7i-a20-olinuxino-lime.dtb \
618 sun7i-a20-olinuxino-lime2.dtb \ 642 sun7i-a20-olinuxino-lime2.dtb \
619 sun7i-a20-olinuxino-micro.dtb \ 643 sun7i-a20-olinuxino-micro.dtb \
@@ -621,14 +645,18 @@ dtb-$(CONFIG_MACH_SUN7I) += \
621 sun7i-a20-orangepi-mini.dtb \ 645 sun7i-a20-orangepi-mini.dtb \
622 sun7i-a20-pcduino3.dtb \ 646 sun7i-a20-pcduino3.dtb \
623 sun7i-a20-pcduino3-nano.dtb \ 647 sun7i-a20-pcduino3-nano.dtb \
624 sun7i-a20-wexler-tab7200.dtb 648 sun7i-a20-wexler-tab7200.dtb \
649 sun7i-a20-wits-pro-a20-dkt.dtb
625dtb-$(CONFIG_MACH_SUN8I) += \ 650dtb-$(CONFIG_MACH_SUN8I) += \
626 sun8i-a23-evb.dtb \ 651 sun8i-a23-evb.dtb \
652 sun8i-a23-gt90h-v4.dtb \
627 sun8i-a23-ippo-q8h-v5.dtb \ 653 sun8i-a23-ippo-q8h-v5.dtb \
628 sun8i-a23-ippo-q8h-v1.2.dtb \ 654 sun8i-a23-ippo-q8h-v1.2.dtb \
655 sun8i-a23-q8-tablet.dtb \
629 sun8i-a33-et-q8-v1.6.dtb \ 656 sun8i-a33-et-q8-v1.6.dtb \
630 sun8i-a33-ga10h-v1.1.dtb \ 657 sun8i-a33-ga10h-v1.1.dtb \
631 sun8i-a33-ippo-q8h-v1.2.dtb \ 658 sun8i-a33-ippo-q8h-v1.2.dtb \
659 sun8i-a33-q8-tablet.dtb \
632 sun8i-a33-sinlinx-sina33.dtb 660 sun8i-a33-sinlinx-sina33.dtb
633dtb-$(CONFIG_MACH_SUN9I) += \ 661dtb-$(CONFIG_MACH_SUN9I) += \
634 sun9i-a80-optimus.dtb \ 662 sun9i-a80-optimus.dtb \
@@ -674,7 +702,9 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \
674 uniphier-ph1-ld6b-ref.dtb \ 702 uniphier-ph1-ld6b-ref.dtb \
675 uniphier-ph1-pro4-ref.dtb \ 703 uniphier-ph1-pro4-ref.dtb \
676 uniphier-ph1-sld3-ref.dtb \ 704 uniphier-ph1-sld3-ref.dtb \
677 uniphier-ph1-sld8-ref.dtb 705 uniphier-ph1-sld8-ref.dtb \
706 uniphier-proxstream2-gentil.dtb \
707 uniphier-proxstream2-vodka.dtb
678dtb-$(CONFIG_ARCH_VERSATILE) += \ 708dtb-$(CONFIG_ARCH_VERSATILE) += \
679 versatile-ab.dtb \ 709 versatile-ab.dtb \
680 versatile-pb.dtb 710 versatile-pb.dtb
@@ -704,6 +734,10 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
704 armada-370-netgear-rn102.dtb \ 734 armada-370-netgear-rn102.dtb \
705 armada-370-netgear-rn104.dtb \ 735 armada-370-netgear-rn104.dtb \
706 armada-370-rd.dtb \ 736 armada-370-rd.dtb \
737 armada-370-seagate-nas-2bay.dtb \
738 armada-370-seagate-nas-4bay.dtb \
739 armada-370-seagate-personal-cloud.dtb \
740 armada-370-seagate-personal-cloud-2bay.dtb \
707 armada-370-synology-ds213j.dtb 741 armada-370-synology-ds213j.dtb
708dtb-$(CONFIG_MACH_ARMADA_375) += \ 742dtb-$(CONFIG_MACH_ARMADA_375) += \
709 armada-375-db.dtb 743 armada-375-db.dtb
diff --git a/arch/arm/boot/dts/am335x-base0033.dts b/arch/arm/boot/dts/am335x-base0033.dts
index 72a9b3fc4251..58a05f7d0b7c 100644
--- a/arch/arm/boot/dts/am335x-base0033.dts
+++ b/arch/arm/boot/dts/am335x-base0033.dts
@@ -46,39 +46,39 @@
46&am33xx_pinmux { 46&am33xx_pinmux {
47 nxp_hdmi_pins: pinmux_nxp_hdmi_pins { 47 nxp_hdmi_pins: pinmux_nxp_hdmi_pins {
48 pinctrl-single,pins = < 48 pinctrl-single,pins = <
49 0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */ 49 AM33XX_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */
50 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0 */ 50 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0 */
51 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1 */ 51 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1 */
52 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2 */ 52 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2 */
53 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3 */ 53 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3 */
54 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4 */ 54 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4 */
55 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5 */ 55 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5 */
56 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6 */ 56 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6 */
57 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7 */ 57 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7 */
58 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8 */ 58 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8 */
59 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9 */ 59 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9 */
60 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10 */ 60 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10 */
61 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11 */ 61 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11 */
62 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12 */ 62 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12 */
63 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13 */ 63 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13 */
64 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14 */ 64 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14 */
65 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15 */ 65 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15 */
66 0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync */ 66 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync */
67 0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync */ 67 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync */
68 0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk */ 68 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk */
69 0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en */ 69 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en */
70 >; 70 >;
71 }; 71 };
72 nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins { 72 nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins {
73 pinctrl-single,pins = < 73 pinctrl-single,pins = <
74 0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */ 74 AM33XX_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */
75 >; 75 >;
76 }; 76 };
77 77
78 leds_base_pins: pinmux_leds_base_pins { 78 leds_base_pins: pinmux_leds_base_pins {
79 pinctrl-single,pins = < 79 pinctrl-single,pins = <
80 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ 80 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
81 0x88 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2_0 */ 81 AM33XX_IOPAD(0x888, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2_0 */
82 >; 82 >;
83 }; 83 };
84}; 84};
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index fec78349c1f3..5d370d54bd30 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -383,8 +383,7 @@
383 bus-width = <0x4>; 383 bus-width = <0x4>;
384 pinctrl-names = "default"; 384 pinctrl-names = "default";
385 pinctrl-0 = <&mmc1_pins>; 385 pinctrl-0 = <&mmc1_pins>;
386 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 386 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
387 cd-inverted;
388}; 387};
389 388
390&aes { 389&aes {
diff --git a/arch/arm/boot/dts/am335x-bonegreen.dts b/arch/arm/boot/dts/am335x-bonegreen.dts
new file mode 100644
index 000000000000..0f65bdaaa583
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bonegreen.dts
@@ -0,0 +1,53 @@
1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "am33xx.dtsi"
11#include "am335x-bone-common.dtsi"
12
13/ {
14 model = "TI AM335x BeagleBone Green";
15 compatible = "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
16};
17
18&ldo3_reg {
19 regulator-min-microvolt = <1800000>;
20 regulator-max-microvolt = <1800000>;
21 regulator-always-on;
22};
23
24&mmc1 {
25 vmmc-supply = <&vmmcsd_fixed>;
26};
27
28&mmc2 {
29 vmmc-supply = <&vmmcsd_fixed>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&emmc_pins>;
32 bus-width = <8>;
33 status = "okay";
34};
35
36&am33xx_pinmux {
37 uart2_pins: uart2_pins {
38 pinctrl-single,pins = <
39 0x150 (PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
40 0x154 (PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
41 >;
42 };
43};
44
45&uart2 {
46 pinctrl-names = "default";
47 pinctrl-0 = <&uart2_pins>;
48 status = "okay";
49};
50
51&rtc {
52 system-power-controller;
53};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 1942a5c8132d..d9d00ab863a2 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -737,7 +737,7 @@
737 bus-width = <4>; 737 bus-width = <4>;
738 pinctrl-names = "default"; 738 pinctrl-names = "default";
739 pinctrl-0 = <&mmc1_pins>; 739 pinctrl-0 = <&mmc1_pins>;
740 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 740 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
741}; 741};
742 742
743&mmc3 { 743&mmc3 {
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 315bb02c9920..89442e98a837 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -647,7 +647,7 @@
647 bus-width = <4>; 647 bus-width = <4>;
648 pinctrl-names = "default"; 648 pinctrl-names = "default";
649 pinctrl-0 = <&mmc1_pins>; 649 pinctrl-0 = <&mmc1_pins>;
650 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 650 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
651}; 651};
652 652
653&sham { 653&sham {
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index c0e1135256cc..54f113546ecc 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -56,41 +56,41 @@
56&am33xx_pinmux { 56&am33xx_pinmux {
57 i2c0_pins: pinmux_i2c0_pins { 57 i2c0_pins: pinmux_i2c0_pins {
58 pinctrl-single,pins = < 58 pinctrl-single,pins = <
59 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 59 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
60 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 60 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
61 >; 61 >;
62 }; 62 };
63 63
64 nandflash_pins: pinmux_nandflash_pins { 64 nandflash_pins: pinmux_nandflash_pins {
65 pinctrl-single,pins = < 65 pinctrl-single,pins = <
66 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ 66 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
67 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ 67 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
68 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ 68 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
69 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ 69 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
70 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ 70 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
71 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ 71 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
72 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ 72 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
73 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ 73 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
74 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ 74 AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
75 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ 75 AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
76 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ 76 AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
77 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ 77 AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
78 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ 78 AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
79 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ 79 AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
80 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ 80 AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
81 >; 81 >;
82 }; 82 };
83 83
84 uart0_pins: pinmux_uart0_pins { 84 uart0_pins: pinmux_uart0_pins {
85 pinctrl-single,pins = < 85 pinctrl-single,pins = <
86 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 86 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
87 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 87 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
88 >; 88 >;
89 }; 89 };
90 90
91 leds_pins: pinmux_leds_pins { 91 leds_pins: pinmux_leds_pins {
92 pinctrl-single,pins = < 92 pinctrl-single,pins = <
93 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ 93 AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
94 >; 94 >;
95 }; 95 };
96}; 96};
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 4d28fc3aac69..2f43e458ea4a 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -29,8 +29,17 @@
29 reg = <0x80000000 0x10000000>; /* 256 MB */ 29 reg = <0x80000000 0x10000000>; /* 256 MB */
30 }; 30 };
31 31
32 vbat: fixedregulator@0 { 32 regulators {
33 compatible = "regulator-fixed"; 33 compatible = "simple-bus";
34
35 vcc5v: fixedregulator@0 {
36 compatible = "regulator-fixed";
37 regulator-name = "vcc5v";
38 regulator-min-microvolt = <5000000>;
39 regulator-max-microvolt = <5000000>;
40 regulator-boot-on;
41 regulator-always-on;
42 };
34 }; 43 };
35}; 44};
36 45
@@ -233,14 +242,14 @@
233#include "tps65910.dtsi" 242#include "tps65910.dtsi"
234 243
235&tps { 244&tps {
236 vcc1-supply = <&vbat>; 245 vcc1-supply = <&vcc5v>;
237 vcc2-supply = <&vbat>; 246 vcc2-supply = <&vcc5v>;
238 vcc3-supply = <&vbat>; 247 vcc3-supply = <&vcc5v>;
239 vcc4-supply = <&vbat>; 248 vcc4-supply = <&vcc5v>;
240 vcc5-supply = <&vbat>; 249 vcc5-supply = <&vcc5v>;
241 vcc6-supply = <&vbat>; 250 vcc6-supply = <&vcc5v>;
242 vcc7-supply = <&vbat>; 251 vcc7-supply = <&vcc5v>;
243 vccio-supply = <&vbat>; 252 vccio-supply = <&vcc5v>;
244 253
245 regulators { 254 regulators {
246 vrtc_reg: regulator@0 { 255 vrtc_reg: regulator@0 {
@@ -252,10 +261,10 @@
252 }; 261 };
253 262
254 vdd1_reg: regulator@2 { 263 vdd1_reg: regulator@2 {
255 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 264 /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
256 regulator-name = "vdd_mpu"; 265 regulator-name = "vdd_mpu";
257 regulator-min-microvolt = <912500>; 266 regulator-min-microvolt = <912500>;
258 regulator-max-microvolt = <1312500>; 267 regulator-max-microvolt = <1378000>;
259 regulator-boot-on; 268 regulator-boot-on;
260 regulator-always-on; 269 regulator-always-on;
261 }; 270 };
@@ -311,13 +320,6 @@
311 }; 320 };
312}; 321};
313 322
314&vbat {
315 regulator-name = "vbat";
316 regulator-min-microvolt = <5000000>;
317 regulator-max-microvolt = <5000000>;
318 regulator-boot-on;
319};
320
321/* SPI Busses */ 323/* SPI Busses */
322&am33xx_pinmux { 324&am33xx_pinmux {
323 spi0_pins: pinmux_spi0 { 325 spi0_pins: pinmux_spi0 {
diff --git a/arch/arm/boot/dts/am335x-wega.dtsi b/arch/arm/boot/dts/am335x-wega.dtsi
index 5e541bd1b45a..2cecb3951e1b 100644
--- a/arch/arm/boot/dts/am335x-wega.dtsi
+++ b/arch/arm/boot/dts/am335x-wega.dtsi
@@ -11,6 +11,17 @@
11 model = "Phytec AM335x phyBOARD-WEGA"; 11 model = "Phytec AM335x phyBOARD-WEGA";
12 compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx"; 12 compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
13 13
14 regulators {
15 compatible = "simple-bus";
16
17 vcc3v3: fixedregulator@1 {
18 compatible = "regulator-fixed";
19 regulator-name = "vcc3v3";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
22 regulator-boot-on;
23 };
24 };
14}; 25};
15 26
16/* CAN Busses */ 27/* CAN Busses */
@@ -80,7 +91,7 @@
80}; 91};
81 92
82&mmc1 { 93&mmc1 {
83 vmmc-supply = <&vmmc_reg>; 94 vmmc-supply = <&vcc3v3>;
84 bus-width = <4>; 95 bus-width = <4>;
85 pinctrl-names = "default"; 96 pinctrl-names = "default";
86 pinctrl-0 = <&mmc1_pins>; 97 pinctrl-0 = <&mmc1_pins>;
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 22038f21f228..d2450ab0a380 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -304,6 +304,13 @@
304 >; 304 >;
305 }; 305 };
306 306
307 dcan0_sleep: dcan0_sleep_pins {
308 pinctrl-single,pins = <
309 0x178 (PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_ctsn.gpio0_12 */
310 0x17c (PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rtsn.gpio0_13 */
311 >;
312 };
313
307 dcan1_default: dcan1_default_pins { 314 dcan1_default: dcan1_default_pins {
308 pinctrl-single,pins = < 315 pinctrl-single,pins = <
309 0x180 (PIN_OUTPUT | MUX_MODE2) /* uart1_rxd.d_can1_tx */ 316 0x180 (PIN_OUTPUT | MUX_MODE2) /* uart1_rxd.d_can1_tx */
@@ -311,6 +318,13 @@
311 >; 318 >;
312 }; 319 };
313 320
321 dcan1_sleep: dcan1_sleep_pins {
322 pinctrl-single,pins = <
323 0x180 (PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rxd.gpio0_14 */
324 0x184 (PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_txd.gpio0_15 */
325 >;
326 };
327
314 vpfe0_pins_default: vpfe0_pins_default { 328 vpfe0_pins_default: vpfe0_pins_default {
315 pinctrl-single,pins = < 329 pinctrl-single,pins = <
316 0x1B0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/ 330 0x1B0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
@@ -581,8 +595,17 @@
581 595
582 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 596 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
583 597
598 /*
599 * 0x264 represents the offset of padconf register of
600 * gpio3_22 from am43xx_pinmux base.
601 */
602 interrupts-extended = <&gpio3 22 IRQ_TYPE_NONE>,
603 <&am43xx_pinmux 0x264>;
604 interrupt-names = "tsc", "wakeup";
605
584 touchscreen-size-x = <1024>; 606 touchscreen-size-x = <1024>;
585 touchscreen-size-y = <600>; 607 touchscreen-size-y = <600>;
608 wakeup-source;
586 }; 609 };
587 610
588 ov2659@30 { 611 ov2659@30 {
@@ -689,7 +712,7 @@
689 bus-width = <4>; 712 bus-width = <4>;
690 pinctrl-names = "default"; 713 pinctrl-names = "default";
691 pinctrl-0 = <&mmc1_pins>; 714 pinctrl-0 = <&mmc1_pins>;
692 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 715 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
693}; 716};
694 717
695/* eMMC sits on mmc2 */ 718/* eMMC sits on mmc2 */
@@ -886,14 +909,16 @@
886}; 909};
887 910
888&dcan0 { 911&dcan0 {
889 pinctrl-names = "default"; 912 pinctrl-names = "default", "sleep";
890 pinctrl-0 = <&dcan0_default>; 913 pinctrl-0 = <&dcan0_default>;
914 pinctrl-1 = <&dcan0_sleep>;
891 status = "okay"; 915 status = "okay";
892}; 916};
893 917
894&dcan1 { 918&dcan1 {
895 pinctrl-names = "default"; 919 pinctrl-names = "default", "sleep";
896 pinctrl-0 = <&dcan1_default>; 920 pinctrl-0 = <&dcan1_default>;
921 pinctrl-1 = <&dcan1_sleep>;
897 status = "okay"; 922 status = "okay";
898}; 923};
899 924
diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts
index af25801418b4..337fb91ee74c 100644
--- a/arch/arm/boot/dts/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/am437x-idk-evm.dts
@@ -325,7 +325,7 @@
325 pinctrl-1 = <&mmc1_pins_sleep>; 325 pinctrl-1 = <&mmc1_pins_sleep>;
326 vmmc-supply = <&v3_3d>; 326 vmmc-supply = <&v3_3d>;
327 bus-width = <4>; 327 bus-width = <4>;
328 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 328 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
329}; 329};
330 330
331&qspi { 331&qspi {
diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts
index 7da7c2da4af1..1582fdbeaf76 100644
--- a/arch/arm/boot/dts/am437x-sk-evm.dts
+++ b/arch/arm/boot/dts/am437x-sk-evm.dts
@@ -563,7 +563,7 @@
563 563
564 vmmc-supply = <&dcdc4>; 564 vmmc-supply = <&dcdc4>;
565 bus-width = <4>; 565 bus-width = <4>;
566 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 566 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
567}; 567};
568 568
569&usb2_phy1 { 569&usb2_phy1 {
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 86c2dfbe8875..47954ed990f8 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -376,7 +376,7 @@
376 bus-width = <4>; 376 bus-width = <4>;
377 pinctrl-names = "default"; 377 pinctrl-names = "default";
378 pinctrl-0 = <&mmc1_pins>; 378 pinctrl-0 = <&mmc1_pins>;
379 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 379 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
380}; 380};
381 381
382&mac { 382&mac {
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 3a05b94f59ed..341ec8825c51 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -35,6 +35,14 @@
35 regulator-max-microvolt = <3300000>; 35 regulator-max-microvolt = <3300000>;
36 }; 36 };
37 37
38 aic_dvdd: fixedregulator-aic_dvdd {
39 compatible = "regulator-fixed";
40 regulator-name = "aic_dvdd_fixed";
41 vin-supply = <&vdd_3v3>;
42 regulator-min-microvolt = <1800000>;
43 regulator-max-microvolt = <1800000>;
44 };
45
38 vtt_fixed: fixedregulator-vtt { 46 vtt_fixed: fixedregulator-vtt {
39 /* TPS51200 */ 47 /* TPS51200 */
40 compatible = "regulator-fixed"; 48 compatible = "regulator-fixed";
@@ -98,13 +106,6 @@
98 pinctrl-0 = <&extcon_usb1_pins>; 106 pinctrl-0 = <&extcon_usb1_pins>;
99 }; 107 };
100 108
101 extcon_usb2: extcon_usb2 {
102 compatible = "linux,extcon-usb-gpio";
103 id-gpio = <&gpio7 24 GPIO_ACTIVE_HIGH>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&extcon_usb2_pins>;
106 };
107
108 hdmi0: connector { 109 hdmi0: connector {
109 compatible = "hdmi-connector"; 110 compatible = "hdmi-connector";
110 label = "hdmi"; 111 label = "hdmi";
@@ -149,6 +150,32 @@
149 }; 150 };
150 }; 151 };
151 }; 152 };
153
154 sound0: sound@0 {
155 compatible = "simple-audio-card";
156 simple-audio-card,name = "BeagleBoard-X15";
157 simple-audio-card,widgets =
158 "Line", "Line Out",
159 "Line", "Line In";
160 simple-audio-card,routing =
161 "Line Out", "LLOUT",
162 "Line Out", "RLOUT",
163 "MIC2L", "Line In",
164 "MIC2R", "Line In";
165 simple-audio-card,format = "dsp_b";
166 simple-audio-card,bitclock-master = <&sound0_master>;
167 simple-audio-card,frame-master = <&sound0_master>;
168 simple-audio-card,bitclock-inversion;
169
170 simple-audio-card,cpu {
171 sound-dai = <&mcasp3>;
172 };
173
174 sound0_master: simple-audio-card,codec {
175 sound-dai = <&tlv320aic3104>;
176 clocks = <&clkout2_clk>;
177 };
178 };
152}; 179};
153 180
154&dra7_pmx_core { 181&dra7_pmx_core {
@@ -326,12 +353,6 @@
326 >; 353 >;
327 }; 354 };
328 355
329 extcon_usb2_pins: extcon_usb2_pins {
330 pinctrl-single,pins = <
331 0x3e8 (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_ctsn.gpio7_24 */
332 >;
333 };
334
335 tpd12s015_pins: pinmux_tpd12s015_pins { 356 tpd12s015_pins: pinmux_tpd12s015_pins {
336 pinctrl-single,pins = < 357 pinctrl-single,pins = <
337 0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */ 358 0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
@@ -339,6 +360,36 @@
339 0x370 (PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */ 360 0x370 (PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
340 >; 361 >;
341 }; 362 };
363
364 clkout2_pins_default: clkout2_pins_default {
365 pinctrl-single,pins = <
366 0x294 (PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
367 >;
368 };
369
370 clkout2_pins_sleep: clkout2_pins_sleep {
371 pinctrl-single,pins = <
372 0x294 (PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
373 >;
374 };
375
376 mcasp3_pins_default: mcasp3_pins_default {
377 pinctrl-single,pins = <
378 0x324 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
379 0x328 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
380 0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
381 0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
382 >;
383 };
384
385 mcasp3_pins_sleep: mcasp3_pins_sleep {
386 pinctrl-single,pins = <
387 0x324 (PIN_INPUT | MUX_MODE15)
388 0x328 (PIN_INPUT | MUX_MODE15)
389 0x32c (PIN_INPUT | MUX_MODE15)
390 0x330 (PIN_INPUT | MUX_MODE15)
391 >;
392 };
342}; 393};
343 394
344&i2c1 { 395&i2c1 {
@@ -432,7 +483,7 @@
432 }; 483 };
433 484
434 ldo3_reg: ldo3 { 485 ldo3_reg: ldo3 {
435 /* VDDA_1V8_PHY */ 486 /* VDDA_1V8_PHYA */
436 regulator-name = "ldo3"; 487 regulator-name = "ldo3";
437 regulator-min-microvolt = <1800000>; 488 regulator-min-microvolt = <1800000>;
438 regulator-max-microvolt = <1800000>; 489 regulator-max-microvolt = <1800000>;
@@ -440,6 +491,15 @@
440 regulator-boot-on; 491 regulator-boot-on;
441 }; 492 };
442 493
494 ldo4_reg: ldo4 {
495 /* VDDA_1V8_PHYB */
496 regulator-name = "ldo4";
497 regulator-min-microvolt = <1800000>;
498 regulator-max-microvolt = <1800000>;
499 regulator-always-on;
500 regulator-boot-on;
501 };
502
443 ldo9_reg: ldo9 { 503 ldo9_reg: ldo9 {
444 /* VDD_RTC */ 504 /* VDD_RTC */
445 regulator-name = "ldo9"; 505 regulator-name = "ldo9";
@@ -495,6 +555,14 @@
495 gpio-controller; 555 gpio-controller;
496 #gpio-cells = <2>; 556 #gpio-cells = <2>;
497 }; 557 };
558
559 extcon_usb2: tps659038_usb {
560 compatible = "ti,palmas-usb-vid";
561 ti,enable-vbus-detection;
562 ti,enable-id-detection;
563 id-gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>;
564 };
565
498 }; 566 };
499 567
500 tmp102: tmp102@48 { 568 tmp102: tmp102@48 {
@@ -506,6 +574,22 @@
506 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 574 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
507 #thermal-sensor-cells = <1>; 575 #thermal-sensor-cells = <1>;
508 }; 576 };
577
578 tlv320aic3104: tlv320aic3104@18 {
579 #sound-dai-cells = <0>;
580 compatible = "ti,tlv320aic3104";
581 reg = <0x18>;
582 pinctrl-names = "default", "sleep";
583 pinctrl-0 = <&clkout2_pins_default>;
584 pinctrl-1 = <&clkout2_pins_sleep>;
585 status = "okay";
586 adc-settle-ms = <40>;
587
588 AVDD-supply = <&vdd_3v3>;
589 IOVDD-supply = <&vdd_3v3>;
590 DRVDD-supply = <&vdd_3v3>;
591 DVDD-supply = <&aic_dvdd>;
592 };
509}; 593};
510 594
511&i2c3 { 595&i2c3 {
@@ -517,7 +601,8 @@
517 mcp_rtc: rtc@6f { 601 mcp_rtc: rtc@6f {
518 compatible = "microchip,mcp7941x"; 602 compatible = "microchip,mcp7941x";
519 reg = <0x6f>; 603 reg = <0x6f>;
520 interrupts = <GIC_SPI 2 IRQ_TYPE_EDGE_RISING>; /* IRQ_SYS_1N */ 604 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
605 <&dra7_pmx_core 0x424>;
521 606
522 pinctrl-names = "default"; 607 pinctrl-names = "default";
523 pinctrl-0 = <&mcp79410_pins_default>; 608 pinctrl-0 = <&mcp79410_pins_default>;
@@ -579,9 +664,8 @@
579 pinctrl-0 = <&mmc1_pins_default>; 664 pinctrl-0 = <&mmc1_pins_default>;
580 665
581 vmmc-supply = <&ldo1_reg>; 666 vmmc-supply = <&ldo1_reg>;
582 vmmc_aux-supply = <&vdd_3v3>;
583 bus-width = <4>; 667 bus-width = <4>;
584 cd-gpios = <&gpio6 27 0>; /* gpio 219 */ 668 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
585}; 669};
586 670
587&mmc2 { 671&mmc2 {
@@ -623,6 +707,14 @@
623}; 707};
624 708
625&usb2 { 709&usb2 {
710 /*
711 * Stand alone usage is peripheral only.
712 * However, with some resistor modifications
713 * this port can be used via expansion connectors
714 * as "host" or "dual-role". If so, provide
715 * the necessary dr_mode override in the expansion
716 * board's DT.
717 */
626 dr_mode = "peripheral"; 718 dr_mode = "peripheral";
627}; 719};
628 720
@@ -681,7 +773,7 @@
681 773
682&hdmi { 774&hdmi {
683 status = "ok"; 775 status = "ok";
684 vdda-supply = <&ldo3_reg>; 776 vdda-supply = <&ldo4_reg>;
685 777
686 pinctrl-names = "default"; 778 pinctrl-names = "default";
687 pinctrl-0 = <&hdmi_pins>; 779 pinctrl-0 = <&hdmi_pins>;
@@ -696,3 +788,38 @@
696&pcie1 { 788&pcie1 {
697 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; 789 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
698}; 790};
791
792&mcasp3 {
793 #sound-dai-cells = <0>;
794 pinctrl-names = "default", "sleep";
795 pinctrl-0 = <&mcasp3_pins_default>;
796 pinctrl-1 = <&mcasp3_pins_sleep>;
797 status = "okay";
798
799 op-mode = <0>; /* MCASP_IIS_MODE */
800 tdm-slots = <2>;
801 /* 4 serializers */
802 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
803 1 2 0 0
804 >;
805};
806
807&mailbox5 {
808 status = "okay";
809 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
810 status = "okay";
811 };
812 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
813 status = "okay";
814 };
815};
816
817&mailbox6 {
818 status = "okay";
819 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
820 status = "okay";
821 };
822 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
823 status = "okay";
824 };
825};
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 03542f7b5b94..bb280de511da 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -74,7 +74,8 @@
74 74
75 soc { 75 soc {
76 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 76 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
77 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; 77 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
78 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
78 79
79 internal-regs { 80 internal-regs {
80 serial@12000 { 81 serial@12000 {
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
index af4dc548c1c0..e2a363b1dd8a 100644
--- a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -69,7 +69,8 @@
69 69
70 soc { 70 soc {
71 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 71 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
72 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; 72 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
73 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
73 74
74 pcie-controller { 75 pcie-controller {
75 status = "okay"; 76 status = "okay";
diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts
index 0f40d5da28c3..3aa980ad64f0 100644
--- a/arch/arm/boot/dts/armada-370-mirabox.dts
+++ b/arch/arm/boot/dts/armada-370-mirabox.dts
@@ -61,7 +61,8 @@
61 61
62 soc { 62 soc {
63 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 63 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
64 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; 64 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
65 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
65 66
66 pcie-controller { 67 pcie-controller {
67 status = "okay"; 68 status = "okay";
@@ -138,6 +139,10 @@
138 phy-mode = "rgmii-id"; 139 phy-mode = "rgmii-id";
139 }; 140 };
140 141
142 crypto@90000 {
143 status = "okay";
144 };
145
141 mvsdio@d4000 { 146 mvsdio@d4000 {
142 pinctrl-0 = <&sdio_pins3>; 147 pinctrl-0 = <&sdio_pins3>;
143 pinctrl-names = "default"; 148 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
index a31207860f34..5555875f44f9 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
@@ -63,7 +63,8 @@
63 63
64 soc { 64 soc {
65 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 65 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
66 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; 66 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
67 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
67 68
68 pcie-controller { 69 pcie-controller {
69 status = "okay"; 70 status = "okay";
@@ -82,6 +83,12 @@
82 }; 83 };
83 84
84 internal-regs { 85 internal-regs {
86
87 /* RTC is provided by Intersil ISL12057 I2C RTC chip */
88 rtc@10300 {
89 status = "disabled";
90 };
91
85 serial@12000 { 92 serial@12000 {
86 status = "okay"; 93 status = "okay";
87 }; 94 };
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn104.dts b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
index 00540f292979..78b563c02f3c 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
@@ -63,7 +63,8 @@
63 63
64 soc { 64 soc {
65 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 65 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
66 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; 66 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
67 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
67 68
68 pcie-controller { 69 pcie-controller {
69 status = "okay"; 70 status = "okay";
@@ -82,6 +83,12 @@
82 }; 83 };
83 84
84 internal-regs { 85 internal-regs {
86
87 /* RTC is provided by Intersil ISL12057 I2C RTC chip */
88 rtc@10300 {
89 status = "disabled";
90 };
91
85 serial@12000 { 92 serial@12000 {
86 status = "okay"; 93 status = "okay";
87 }; 94 };
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index 19475e68b8e9..fbef730e8d37 100644
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -74,7 +74,8 @@
74 74
75 soc { 75 soc {
76 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 76 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
77 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; 77 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
78 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
78 79
79 pcie-controller { 80 pcie-controller {
80 status = "okay"; 81 status = "okay";
diff --git a/arch/arm/boot/dts/armada-370-seagate-nas-2bay.dts b/arch/arm/boot/dts/armada-370-seagate-nas-2bay.dts
new file mode 100644
index 000000000000..fef0110a8d8a
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-seagate-nas-2bay.dts
@@ -0,0 +1,36 @@
1/*
2 * Device Tree file for Seagate NAS 2-Bay (Armada 370 SoC).
3 *
4 * Copyright (C) 2015 Seagate
5 *
6 * Author: Vincent Donnefort <vdonnefort@gmail.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13/*
14 * Here are some information allowing to identify the device:
15 *
16 * Product name : Seagate NAS 2-Bay
17 * Code name (board/PCB) : Dart 2-Bay
18 * Model name (case sticker) : SRPD20
19 * Material desc (product spec) : STCTxxxxxxx
20 */
21
22/dts-v1/;
23#include "armada-370-seagate-nas-xbay.dtsi"
24
25/ {
26 model = "Seagate NAS 2-Bay (Dart, SRPD20)";
27 compatible = "seagate,dart-2", "marvell,armada370", "marvell,armada-370-xp";
28
29 gpio-fan {
30 gpio-fan,speed-map =
31 < 0 3
32 950 2
33 1400 1
34 1800 0>;
35 };
36};
diff --git a/arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts b/arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts
new file mode 100644
index 000000000000..ae2e1fe50ef6
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts
@@ -0,0 +1,133 @@
1/*
2 * Device Tree file for Seagate NAS 4-Bay (Armada 370 SoC).
3 *
4 * Copyright (C) 2015 Seagate
5 *
6 * Author: Vincent Donnefort <vdonnefort@gmail.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13/*
14 * Here are some information allowing to identify the device:
15 *
16 * Product name : Seagate NAS 4-Bay
17 * Code name (board/PCB) : Dart 4-Bay
18 * Model name (case sticker) : SRPD40
19 * Material desc (product spec) : STCUxxxxxxx
20 */
21
22/dts-v1/;
23#include "armada-370-seagate-nas-xbay.dtsi"
24#include <dt-bindings/leds/leds-ns2.h>
25
26/ {
27 model = "Seagate NAS 4-Bay (Dart, SRPD40)";
28 compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
29
30 soc {
31 pcie-controller {
32 /* SATA AHCI controller 88SE9170 */
33 pcie@1,0 {
34 status = "okay";
35 };
36 };
37
38 internal-regs {
39 mdio {
40 phy1: ethernet-phy@1 {
41 reg = <1>;
42 };
43 };
44
45 ethernet@74000 {
46 status = "okay";
47 pinctrl-0 = <&ge1_rgmii_pins>;
48 pinctrl-names = "default";
49 phy = <&phy1>;
50 phy-mode = "rgmii-id";
51 };
52
53 i2c@11000 {
54 /* I2C GPIO expander (PCA9554A) */
55 pca9554: pca9554@21 {
56 compatible = "nxp,pca9554";
57 reg = <0x21>;
58 #gpio-cells = <2>;
59 gpio-controller;
60 };
61 };
62 };
63 };
64
65 regulators {
66 regulator@3 {
67 compatible = "regulator-fixed";
68 reg = <3>;
69 regulator-name = "SATA2 power";
70 regulator-min-microvolt = <5000000>;
71 regulator-max-microvolt = <5000000>;
72 enable-active-high;
73 regulator-always-on;
74 regulator-boot-on;
75 gpio = <&pca9554 6 GPIO_ACTIVE_HIGH>;
76 };
77 regulator@4 {
78 compatible = "regulator-fixed";
79 reg = <4>;
80 regulator-name = "SATA3 power";
81 regulator-min-microvolt = <5000000>;
82 regulator-max-microvolt = <5000000>;
83 enable-active-high;
84 regulator-always-on;
85 regulator-boot-on;
86 gpio = <&pca9554 7 GPIO_ACTIVE_HIGH>;
87 };
88 };
89
90 gpio-leds {
91 red-sata2 {
92 label = "dart:red:sata2";
93 gpios = <&pca9554 0 GPIO_ACTIVE_LOW>;
94 };
95 red-sata3 {
96 label = "dart:red:sata3";
97 gpios = <&pca9554 3 GPIO_ACTIVE_LOW>;
98 };
99 };
100
101 leds-ns2 {
102 compatible = "lacie,ns2-leds";
103
104 white-sata2 {
105 label = "dart:white:sata2";
106 cmd-gpio = <&pca9554 1 GPIO_ACTIVE_HIGH>;
107 slow-gpio = <&pca9554 2 GPIO_ACTIVE_HIGH>;
108 num-modes = <4>;
109 modes-map = <NS_V2_LED_SATA 0 0
110 NS_V2_LED_OFF 0 1
111 NS_V2_LED_ON 1 0
112 NS_V2_LED_ON 1 1>;
113 };
114 white-sata3 {
115 label = "dart:white:sata3";
116 cmd-gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
117 slow-gpio = <&pca9554 5 GPIO_ACTIVE_HIGH>;
118 num-modes = <4>;
119 modes-map = <NS_V2_LED_SATA 0 0
120 NS_V2_LED_OFF 0 1
121 NS_V2_LED_ON 1 0
122 NS_V2_LED_ON 1 1>;
123 };
124 };
125
126 gpio-fan {
127 gpio-fan,speed-map =
128 < 0 3
129 800 2
130 1050 1
131 1300 0>;
132 };
133};
diff --git a/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi b/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi
new file mode 100644
index 000000000000..3036e25c5992
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi
@@ -0,0 +1,231 @@
1/*
2 * Device Tree common file for the Seagate NAS 2 and 4-bay (Armada 370 SoC).
3 *
4 * Copyright (C) 2015 Seagate
5 *
6 * Author: Vincent Donnefort <vdonnefort@gmail.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13/*
14 * TODO: add support for the white SATA LEDs associated with HDD 0 and 1.
15 */
16
17#include "armada-370.dtsi"
18#include <dt-bindings/gpio/gpio.h>
19#include <dt-bindings/input/input.h>
20
21/ {
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 memory {
27 device_type = "memory";
28 reg = <0x00000000 0x20000000>; /* 512 MB */
29 };
30
31 soc {
32 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
33 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
34
35 pcie-controller {
36 status = "okay";
37
38 /* USB 3.0 bridge ASM1042A */
39 pcie@2,0 {
40 status = "okay";
41 };
42 };
43
44 internal-regs {
45 serial@12000 {
46 status = "okay";
47 };
48
49 sata@a0000 {
50 nr-ports = <2>;
51 status = "okay";
52 };
53
54 mdio {
55 pinctrl-0 = <&mdio_pins>;
56 pinctrl-names = "default";
57
58 phy0: ethernet-phy@0 {
59 reg = <0>;
60 };
61 };
62
63 ethernet@70000 {
64 status = "okay";
65 pinctrl-0 = <&ge0_rgmii_pins>;
66 pinctrl-names = "default";
67 phy = <&phy0>;
68 phy-mode = "rgmii-id";
69 };
70
71 i2c@11000 {
72 status = "okay";
73 pinctrl-0 = <&i2c0_pins>;
74 pinctrl-names = "default";
75 clock-frequency = <100000>;
76
77 /* RTC - NXP 8563T (second source) */
78 rtc@51 {
79 compatible = "nxp,pcf8563";
80 reg = <0x51>;
81 interrupts = <110>;
82 };
83 /* RTC - MCP7940NT */
84 rtc@6f {
85 compatible = "microchip,mcp7941x";
86 reg = <0x6f>;
87 interrupts = <110>;
88 };
89 };
90
91 nand@d0000 {
92 status = "okay";
93 num-cs = <1>;
94 marvell,nand-keep-config;
95 marvell,nand-enable-arbiter;
96 nand-on-flash-bbt;
97 nand-ecc-strength = <4>;
98 nand-ecc-step-size = <512>;
99
100 partition@0 {
101 label = "u-boot";
102 reg = <0x0 0x300000>;
103 };
104 partition@300000 {
105 label = "device-tree";
106 reg = <0x300000 0x20000>;
107 };
108 partition@320000 {
109 label = "linux";
110 reg = <0x320000 0x2000000>;
111 };
112 partition@2320000 {
113 label = "rootfs";
114 reg = <0x2320000 0xdce0000>;
115 };
116 };
117 };
118
119 };
120
121 regulators {
122 compatible = "simple-bus";
123 #address-cells = <1>;
124 #size-cells = <0>;
125 pinctrl-names = "default";
126
127 regulator@1 {
128 compatible = "regulator-fixed";
129 reg = <1>;
130 regulator-name = "SATA0 power";
131 regulator-min-microvolt = <5000000>;
132 regulator-max-microvolt = <5000000>;
133 enable-active-high;
134 regulator-always-on;
135 regulator-boot-on;
136 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
137 };
138 regulator@2 {
139 compatible = "regulator-fixed";
140 reg = <2>;
141 regulator-name = "SATA1 power";
142 regulator-min-microvolt = <5000000>;
143 regulator-max-microvolt = <5000000>;
144 enable-active-high;
145 regulator-always-on;
146 regulator-boot-on;
147 gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
148 };
149 };
150
151 gpio-fan {
152 compatible = "gpio-fan";
153 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH
154 &gpio2 1 GPIO_ACTIVE_HIGH>;
155 };
156
157 gpio-keys {
158 compatible = "gpio-keys";
159 #address-cells = <1>;
160 #size-cells = <0>;
161
162 button@1 {
163 label = "Power button";
164 linux,code = <KEY_POWER>;
165 gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
166 debounce-interval = <100>;
167 };
168 button@2 {
169 label = "Backup button";
170 linux,code = <KEY_OPTION>;
171 gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
172 debounce-interval = <100>;
173 };
174 button@3 {
175 label = "Reset Button";
176 linux,code = <KEY_RESTART>;
177 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
178 debounce-interval = <100>;
179 };
180 };
181
182 gpio-leds {
183 compatible = "gpio-leds";
184
185 white-power {
186 label = "dart:white:power";
187 gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
188 linux,default-trigger = "timer";
189
190 };
191 red-power {
192 label = "dart:red:power";
193 gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
194 };
195 red-sata0 {
196 label = "dart:red:sata0";
197 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
198 };
199 red-sata1 {
200 label = "dart:red:sata1";
201 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
202 };
203 };
204
205 gpio_poweroff {
206 compatible = "gpio-poweroff";
207 gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
208 };
209};
210
211&pinctrl {
212 pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>;
213 pinctrl-names = "default";
214
215 hdd0_led_sata_pin: hdd0-led-sata-pin {
216 marvell,pins = "mpp48";
217 marvell,function = "sata1";
218 };
219 hdd0_led_gpio_pin: hdd0-led-gpio-pin {
220 marvell,pins = "mpp48";
221 marvell,function = "gpio";
222 };
223 hdd1_led_sata_pin: hdd1-led-sata-pin {
224 marvell,pins = "mpp57";
225 marvell,function = "sata0";
226 };
227 hdd1_led_gpio_pin: hdd1-led-gpio-pin {
228 marvell,pins = "mpp57";
229 marvell,function = "gpio";
230 };
231};
diff --git a/arch/arm/boot/dts/armada-370-seagate-personal-cloud-2bay.dts b/arch/arm/boot/dts/armada-370-seagate-personal-cloud-2bay.dts
new file mode 100644
index 000000000000..3c91f9821c89
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-seagate-personal-cloud-2bay.dts
@@ -0,0 +1,51 @@
1/*
2 * Device Tree file for Seagate Personal Cloud NAS 2-Bay (Armada 370 SoC).
3 *
4 * Copyright (C) 2015 Seagate
5 *
6 * Author: Simon Guinot <simon.guinot@sequanux.org>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13/*
14 * Here are some information allowing to identify the device:
15 *
16 * Product name : Seagate Personal Cloud 2-Bay
17 * Code name (board/PCB) : Cumulus Max
18 * Model name (case sticker) : SRN22C
19 * Material desc (product spec) : STCSxxxxxxx
20 */
21
22/dts-v1/;
23#include "armada-370-seagate-personal-cloud.dtsi"
24
25/ {
26 model = "Seagate Personal Cloud 2-Bay (Cumulus, SRN22C)";
27 compatible = "seagate,cumulus-max", "marvell,armada370", "marvell,armada-370-xp";
28
29 soc {
30 internal-regs {
31 sata@a0000 {
32 status = "okay";
33 nr-ports = <2>;
34 };
35 };
36 };
37
38 regulators {
39 regulator@2 {
40 compatible = "regulator-fixed";
41 reg = <2>;
42 regulator-name = "SATA1 power";
43 regulator-min-microvolt = <5000000>;
44 regulator-max-microvolt = <5000000>;
45 enable-active-high;
46 regulator-always-on;
47 regulator-boot-on;
48 gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
49 };
50 };
51};
diff --git a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dts b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dts
new file mode 100644
index 000000000000..aad39e97af43
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dts
@@ -0,0 +1,37 @@
1/*
2 * Device Tree file for Seagate Personal Cloud NAS (Armada 370 SoC).
3 *
4 * Copyright (C) 2015 Seagate
5 *
6 * Author: Simon Guinot <simon.guinot@sequanux.org>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13/*
14 * Here are some information allowing to identify the device:
15 *
16 * Product name : Seagate Personal Cloud
17 * Code name (board/PCB) : Cumulus
18 * Model name (case sticker) : SRN21C
19 * Material desc (product spec) : STCRxxxxxxx
20 */
21
22/dts-v1/;
23#include "armada-370-seagate-personal-cloud.dtsi"
24
25/ {
26 model = "Seagate Personal Cloud (Cumulus, SRN21C)";
27 compatible = "seagate,cumulus", "marvell,armada370", "marvell,armada-370-xp";
28
29 soc {
30 internal-regs {
31 sata@a0000 {
32 status = "okay";
33 nr-ports = <1>;
34 };
35 };
36 };
37};
diff --git a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
new file mode 100644
index 000000000000..1aba08e4377c
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
@@ -0,0 +1,178 @@
1/*
2 * Device Tree common file for the Seagate Personal Cloud NAS 1 and 2-Bay
3 * (Armada 370 SoC).
4 *
5 * Copyright (C) 2015 Seagate
6 *
7 * Author: Simon Guinot <simon.guinot@sequanux.org>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14/*
15 * TODO: add support for the white SATA LED.
16 */
17
18#include "armada-370.dtsi"
19#include <dt-bindings/gpio/gpio.h>
20#include <dt-bindings/input/input.h>
21
22/ {
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 memory {
28 device_type = "memory";
29 reg = <0x00000000 0x20000000>; /* 512 MB */
30 };
31
32 soc {
33 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
34 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
35
36 pcie-controller {
37 status = "okay";
38
39 /* USB 3.0 Bridge ASM1042A */
40 pcie@1,0 {
41 status = "okay";
42 };
43 };
44
45 internal-regs {
46 coherency-fabric@20200 {
47 broken-idle;
48 };
49
50 serial@12000 {
51 status = "okay";
52 };
53
54 mdio {
55 pinctrl-0 = <&mdio_pins>;
56 pinctrl-names = "default";
57
58 phy0: ethernet-phy@0 {
59 reg = <0>;
60 };
61 };
62
63 ethernet@74000 {
64 status = "okay";
65 pinctrl-0 = <&ge1_rgmii_pins>;
66 pinctrl-names = "default";
67 phy = <&phy0>;
68 phy-mode = "rgmii-id";
69 };
70
71 spi@10600 {
72 status = "okay";
73 pinctrl-0 = <&spi0_pins2>;
74 pinctrl-names = "default";
75
76 spi-flash@0 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 /* MX25L8006E */
80 compatible = "mxicy,mx25l8005", "jedec,spi-nor";
81 reg = <0>; /* Chip select 0 */
82 spi-max-frequency = <50000000>;
83
84 partition@0 {
85 label = "u-boot";
86 reg = <0x0 0x100000>;
87 };
88 };
89 };
90
91 usb@50000 {
92 status = "okay";
93 };
94 };
95 };
96
97 regulators {
98 compatible = "simple-bus";
99 #address-cells = <1>;
100 #size-cells = <0>;
101
102 regulator@0 {
103 compatible = "regulator-fixed";
104 reg = <0>;
105 regulator-name = "USB Power";
106 regulator-min-microvolt = <5000000>;
107 regulator-max-microvolt = <5000000>;
108 regulator-always-on;
109 regulator-boot-on;
110 gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
111 };
112 regulator@1 {
113 compatible = "regulator-fixed";
114 reg = <1>;
115 regulator-name = "SATA0 power";
116 regulator-min-microvolt = <5000000>;
117 regulator-max-microvolt = <5000000>;
118 enable-active-high;
119 regulator-always-on;
120 regulator-boot-on;
121 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
122 };
123 };
124
125 gpio-keys {
126 compatible = "gpio-keys";
127 #address-cells = <1>;
128 #size-cells = <0>;
129
130 button@1 {
131 label = "Power button";
132 linux,code = <KEY_POWER>;
133 gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
134 debounce-interval = <100>;
135 };
136 button@2 {
137 label = "Reset Button";
138 linux,code = <KEY_RESTART>;
139 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
140 debounce-interval = <100>;
141 };
142 button@3 {
143 label = "USB VBUS error";
144 linux,code = <KEY_UNKNOWN>;
145 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
146 debounce-interval = <100>;
147 };
148 };
149
150 gpio-leds {
151 compatible = "gpio-leds";
152
153 red-sata0 {
154 label = "cumulus:red:sata0";
155 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
156 default-state = "off";
157 };
158 };
159
160 gpio_poweroff {
161 compatible = "gpio-poweroff";
162 gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
163 };
164};
165
166&pinctrl {
167 pinctrl-0 = <&sata_led_pin>;
168 pinctrl-names = "default";
169
170 sata_led_pin: sata-led-pin {
171 marvell,pins = "mpp60";
172 marvell,function = "sata0";
173 };
174 gpio_led_pin: gpio-led-pin {
175 marvell,pins = "mpp60";
176 marvell,function = "gpio";
177 };
178};
diff --git a/arch/arm/boot/dts/armada-370-synology-ds213j.dts b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
index 4f4924362bf0..836bcc07afc5 100644
--- a/arch/arm/boot/dts/armada-370-synology-ds213j.dts
+++ b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
@@ -77,7 +77,8 @@
77 77
78 soc { 78 soc {
79 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 79 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
80 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; 80 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
81 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
81 82
82 internal-regs { 83 internal-regs {
83 84
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 53a1a5abe147..3b06aa835448 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -256,6 +256,11 @@
256 reg = <0x20800 0x8>; 256 reg = <0x20800 0x8>;
257 }; 257 };
258 258
259 cpu-config@21000 {
260 compatible = "marvell,armada-370-cpu-config";
261 reg = <0x21000 0x8>;
262 };
263
259 audio_controller: audio-controller@30000 { 264 audio_controller: audio-controller@30000 {
260 #sound-dai-cells = <1>; 265 #sound-dai-cells = <1>;
261 compatible = "marvell,armada370-audio"; 266 compatible = "marvell,armada370-audio";
@@ -319,6 +324,38 @@
319 ethernet@74000 { 324 ethernet@74000 {
320 compatible = "marvell,armada-370-neta"; 325 compatible = "marvell,armada-370-neta";
321 }; 326 };
327
328 crypto@90000 {
329 compatible = "marvell,armada-370-crypto";
330 reg = <0x90000 0x10000>;
331 reg-names = "regs";
332 interrupts = <48>;
333 clocks = <&gateclk 23>;
334 clock-names = "cesa0";
335 marvell,crypto-srams = <&crypto_sram>;
336 marvell,crypto-sram-size = <0x7e0>;
337 };
338 };
339
340 crypto_sram: sa-sram {
341 compatible = "mmio-sram";
342 reg = <MBUS_ID(0x09, 0x01) 0 0x800>;
343 reg-names = "sram";
344 clocks = <&gateclk 23>;
345 #address-cells = <1>;
346 #size-cells = <1>;
347 ranges = <0 MBUS_ID(0x09, 0x01) 0 0x800>;
348
349 /*
350 * The Armada 370 has an erratum preventing the use of
351 * the standard workflow for CPU idle support (relying
352 * on the BootROM code to enter/exit idle state).
353 * Reserve some amount of the crypto SRAM to put the
354 * cpuidle workaround.
355 */
356 idle-sram@0 {
357 reg = <0x0 0x20>;
358 };
322 }; 359 };
323 }; 360 };
324}; 361};
diff --git a/arch/arm/boot/dts/armada-375-db.dts b/arch/arm/boot/dts/armada-375-db.dts
index 5711b97e876c..cded5f0a262d 100644
--- a/arch/arm/boot/dts/armada-375-db.dts
+++ b/arch/arm/boot/dts/armada-375-db.dts
@@ -65,7 +65,9 @@
65 65
66 soc { 66 soc {
67 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 67 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
68 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 68 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
69 MBUS_ID(0x09, 0x09) 0 0xf1100000 0x10000
70 MBUS_ID(0x09, 0x05) 0 0xf1110000 0x10000>;
69 71
70 internal-regs { 72 internal-regs {
71 spi@10600 { 73 spi@10600 {
diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi
index e9a381741ce1..7ccce7529b0c 100644
--- a/arch/arm/boot/dts/armada-375.dtsi
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -513,6 +513,21 @@
513 }; 513 };
514 }; 514 };
515 515
516 crypto@90000 {
517 compatible = "marvell,armada-375-crypto";
518 reg = <0x90000 0x10000>;
519 reg-names = "regs";
520 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
521 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
522 clocks = <&gateclk 30>, <&gateclk 31>,
523 <&gateclk 28>, <&gateclk 29>;
524 clock-names = "cesa0", "cesa1",
525 "cesaz0", "cesaz1";
526 marvell,crypto-srams = <&crypto_sram0>,
527 <&crypto_sram1>;
528 marvell,crypto-sram-size = <0x800>;
529 };
530
516 sata@a0000 { 531 sata@a0000 {
517 compatible = "marvell,orion-sata"; 532 compatible = "marvell,orion-sata";
518 reg = <0xa0000 0x5000>; 533 reg = <0xa0000 0x5000>;
@@ -619,5 +634,23 @@
619 }; 634 };
620 635
621 }; 636 };
637
638 crypto_sram0: sa-sram0 {
639 compatible = "mmio-sram";
640 reg = <MBUS_ID(0x09, 0x09) 0 0x800>;
641 clocks = <&gateclk 30>;
642 #address-cells = <1>;
643 #size-cells = <1>;
644 ranges = <0 MBUS_ID(0x09, 0x09) 0 0x800>;
645 };
646
647 crypto_sram1: sa-sram1 {
648 compatible = "mmio-sram";
649 reg = <MBUS_ID(0x09, 0x05) 0 0x800>;
650 clocks = <&gateclk 31>;
651 #address-cells = <1>;
652 #size-cells = <1>;
653 ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>;
654 };
622 }; 655 };
623}; 656};
diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts
index 89f5a95954ed..4de813c236bf 100644
--- a/arch/arm/boot/dts/armada-385-db-ap.dts
+++ b/arch/arm/boot/dts/armada-385-db-ap.dts
@@ -59,7 +59,9 @@
59 59
60 soc { 60 soc {
61 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 61 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
62 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 62 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
63 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
64 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
63 65
64 internal-regs { 66 internal-regs {
65 spi1: spi@10680 { 67 spi1: spi@10680 {
diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi
index 74a9c6b54fa7..3710755c6d76 100644
--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
@@ -57,7 +57,9 @@
57 57
58 soc { 58 soc {
59 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 59 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
60 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 60 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
61 MBUS_ID(0x09, 0x09) 0 0xf1100000 0x10000
62 MBUS_ID(0x09, 0x05) 0 0xf1110000 0x10000>;
61 63
62 internal-regs { 64 internal-regs {
63 65
diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts
index 91ac8c118f37..ff47af57f091 100644
--- a/arch/arm/boot/dts/armada-388-db.dts
+++ b/arch/arm/boot/dts/armada-388-db.dts
@@ -64,7 +64,9 @@
64 64
65 soc { 65 soc {
66 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 66 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
67 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 67 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
68 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
69 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
68 70
69 internal-regs { 71 internal-regs {
70 spi@10600 { 72 spi@10600 {
diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts
index 353c92532e7a..a633be3defda 100644
--- a/arch/arm/boot/dts/armada-388-gp.dts
+++ b/arch/arm/boot/dts/armada-388-gp.dts
@@ -58,7 +58,9 @@
58 58
59 soc { 59 soc {
60 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 60 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
61 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 61 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
62 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
63 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
62 64
63 internal-regs { 65 internal-regs {
64 spi@10600 { 66 spi@10600 {
@@ -205,8 +207,21 @@
205 sdhci@d8000 { 207 sdhci@d8000 {
206 pinctrl-names = "default"; 208 pinctrl-names = "default";
207 pinctrl-0 = <&sdhci_pins>; 209 pinctrl-0 = <&sdhci_pins>;
208 cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
209 no-1-8-v; 210 no-1-8-v;
211 /*
212 * A388-GP board v1.5 and higher replace
213 * hitherto card detection method based on GPIO
214 * with the one using DAT3 pin. As they are
215 * incompatible, software-based polling is
216 * enabled with 'broken-cd' property. For boards
217 * older than v1.5 it can be replaced with:
218 * 'cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;',
219 * whereas for the newer ones following can be
220 * used instead:
221 * 'dat3-cd;'
222 * 'cd-inverted;'
223 */
224 broken-cd;
210 wp-inverted; 225 wp-inverted;
211 bus-width = <8>; 226 bus-width = <8>;
212 status = "okay"; 227 status = "okay";
diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts
index b657b1687e5f..853f9735cc70 100644
--- a/arch/arm/boot/dts/armada-388-rd.dts
+++ b/arch/arm/boot/dts/armada-388-rd.dts
@@ -65,7 +65,9 @@
65 65
66 soc { 66 soc {
67 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 67 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
68 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 68 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
69 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
70 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
69 71
70 internal-regs { 72 internal-regs {
71 spi@10600 { 73 spi@10600 {
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index f9f2347d9995..c6a0e9d7f1a9 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -509,6 +509,21 @@
509 clocks = <&gateclk 4>; 509 clocks = <&gateclk 4>;
510 }; 510 };
511 511
512 crypto@90000 {
513 compatible = "marvell,armada-38x-crypto";
514 reg = <0x90000 0x10000>;
515 reg-names = "regs";
516 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
517 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
518 clocks = <&gateclk 23>, <&gateclk 21>,
519 <&gateclk 14>, <&gateclk 16>;
520 clock-names = "cesa0", "cesa1",
521 "cesaz0", "cesaz1";
522 marvell,crypto-srams = <&crypto_sram0>,
523 <&crypto_sram1>;
524 marvell,crypto-sram-size = <0x800>;
525 };
526
512 rtc@a3800 { 527 rtc@a3800 {
513 compatible = "marvell,armada-380-rtc"; 528 compatible = "marvell,armada-380-rtc";
514 reg = <0xa3800 0x20>, <0x184a0 0x0c>; 529 reg = <0xa3800 0x20>, <0x184a0 0x0c>;
@@ -584,6 +599,24 @@
584 status = "disabled"; 599 status = "disabled";
585 }; 600 };
586 }; 601 };
602
603 crypto_sram0: sa-sram0 {
604 compatible = "mmio-sram";
605 reg = <MBUS_ID(0x09, 0x19) 0 0x800>;
606 clocks = <&gateclk 23>;
607 #address-cells = <1>;
608 #size-cells = <1>;
609 ranges = <0 MBUS_ID(0x09, 0x19) 0 0x800>;
610 };
611
612 crypto_sram1: sa-sram1 {
613 compatible = "mmio-sram";
614 reg = <MBUS_ID(0x09, 0x15) 0 0x800>;
615 clocks = <&gateclk 21>;
616 #address-cells = <1>;
617 #size-cells = <1>;
618 ranges = <0 MBUS_ID(0x09, 0x15) 0 0x800>;
619 };
587 }; 620 };
588 621
589 clocks { 622 clocks {
diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
index 60bbfe32bb80..23fc670c0427 100644
--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
@@ -69,7 +69,9 @@
69 69
70 soc { 70 soc {
71 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 71 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
72 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 72 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
73 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
74 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
73 75
74 pcie-controller { 76 pcie-controller {
75 status = "okay"; 77 status = "okay";
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 7dd900f158be..f774101416a5 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -75,7 +75,9 @@
75 soc { 75 soc {
76 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 76 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
77 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 77 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
78 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>; 78 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
79 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
80 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
79 81
80 devbus-bootcs { 82 devbus-bootcs {
81 status = "okay"; 83 status = "okay";
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index bf724ca96a33..4878d7353069 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -94,7 +94,9 @@
94 soc { 94 soc {
95 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 95 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
96 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 96 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
97 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>; 97 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
98 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
99 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
98 100
99 devbus-bootcs { 101 devbus-bootcs {
100 status = "okay"; 102 status = "okay";
diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
index 06a6a6c1fdf7..58b500873bfd 100644
--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
@@ -64,7 +64,9 @@
64 64
65 soc { 65 soc {
66 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 66 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
67 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 67 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
68 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
69 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
68 70
69 pcie-controller { 71 pcie-controller {
70 status = "okay"; 72 status = "okay";
diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
index fdd187c55aa5..6e9820e141f8 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -69,7 +69,9 @@
69 69
70 soc { 70 soc {
71 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 71 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
72 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 72 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
73 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
74 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
73 75
74 pcie-controller { 76 pcie-controller {
75 status = "okay"; 77 status = "okay";
diff --git a/arch/arm/boot/dts/armada-xp-matrix.dts b/arch/arm/boot/dts/armada-xp-matrix.dts
index f894bc83e957..6ab33837a2b6 100644
--- a/arch/arm/boot/dts/armada-xp-matrix.dts
+++ b/arch/arm/boot/dts/armada-xp-matrix.dts
@@ -67,7 +67,9 @@
67 67
68 soc { 68 soc {
69 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 69 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
70 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 70 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
71 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
72 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
71 73
72 internal-regs { 74 internal-regs {
73 serial@12000 { 75 serial@12000 {
diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
index 1516fc2627f9..6fe8972de0a2 100644
--- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
+++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
@@ -63,7 +63,9 @@
63 63
64 soc { 64 soc {
65 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 65 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
66 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 66 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
67 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
68 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
67 69
68 pcie-controller { 70 pcie-controller {
69 status = "okay"; 71 status = "okay";
@@ -88,41 +90,10 @@
88 }; 90 };
89 91
90 internal-regs { 92 internal-regs {
91 /* Two rear eSATA ports */
92 sata@a0000 {
93 nr-ports = <2>;
94 status = "okay";
95 };
96
97 serial@12000 {
98 status = "okay";
99 };
100
101 mdio {
102 phy0: ethernet-phy@0 { /* Marvell 88E1318 */
103 reg = <0>;
104 };
105
106 phy1: ethernet-phy@1 { /* Marvell 88E1318 */
107 reg = <1>;
108 };
109 };
110
111 ethernet@70000 {
112 status = "okay";
113 phy = <&phy0>;
114 phy-mode = "rgmii-id";
115 };
116 93
117 ethernet@74000 { 94 /* RTC is provided by Intersil ISL12057 I2C RTC chip */
118 status = "okay"; 95 rtc@10300 {
119 phy = <&phy1>; 96 status = "disabled";
120 phy-mode = "rgmii-id";
121 };
122
123 /* Front USB 2.0 port */
124 usb@50000 {
125 status = "okay";
126 }; 97 };
127 98
128 i2c@11000 { 99 i2c@11000 {
@@ -130,12 +101,6 @@
130 clock-frequency = <400000>; 101 clock-frequency = <400000>;
131 status = "okay"; 102 status = "okay";
132 103
133 isl12057: isl12057@68 {
134 compatible = "isil,isl12057";
135 reg = <0x68>;
136 isil,irq2-can-wakeup-machine;
137 };
138
139 /* Controller for rear fan #1 of 3 (Protechnic 104 /* Controller for rear fan #1 of 3 (Protechnic
140 * MGT4012XB-O20, 8000RPM) near eSATA port */ 105 * MGT4012XB-O20, 8000RPM) near eSATA port */
141 g762_fan1: g762@3e { 106 g762_fan1: g762@3e {
@@ -172,6 +137,49 @@
172 compatible = "gmt,g751"; 137 compatible = "gmt,g751";
173 reg = <0x4c>; 138 reg = <0x4c>;
174 }; 139 };
140
141 isl12057: isl12057@68 {
142 compatible = "isil,isl12057";
143 reg = <0x68>;
144 isil,irq2-can-wakeup-machine;
145 };
146 };
147
148 serial@12000 {
149 status = "okay";
150 };
151
152 /* Front USB 2.0 port */
153 usb@50000 {
154 status = "okay";
155 };
156
157 mdio {
158 phy0: ethernet-phy@0 { /* Marvell 88E1318 */
159 reg = <0>;
160 };
161
162 phy1: ethernet-phy@1 { /* Marvell 88E1318 */
163 reg = <1>;
164 };
165 };
166
167 ethernet@70000 {
168 status = "okay";
169 phy = <&phy0>;
170 phy-mode = "rgmii-id";
171 };
172
173 ethernet@74000 {
174 status = "okay";
175 phy = <&phy1>;
176 phy-mode = "rgmii-id";
177 };
178
179 /* Two rear eSATA ports */
180 sata@a0000 {
181 nr-ports = <2>;
182 status = "okay";
175 }; 183 };
176 184
177 nand@d0000 { 185 nand@d0000 {
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index 990e8a2100f0..a5db17782e08 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -65,7 +65,9 @@
65 soc { 65 soc {
66 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 66 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
67 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 67 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
68 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000>; 68 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000
69 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
70 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
69 71
70 devbus-bootcs { 72 devbus-bootcs {
71 status = "okay"; 73 status = "okay";
diff --git a/arch/arm/boot/dts/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
index 20267ad2f61e..2391b11dc546 100644
--- a/arch/arm/boot/dts/armada-xp-synology-ds414.dts
+++ b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
@@ -77,7 +77,9 @@
77 77
78 soc { 78 soc {
79 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 79 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
80 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 80 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
81 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
82 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
81 83
82 pcie-controller { 84 pcie-controller {
83 status = "okay"; 85 status = "okay";
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 3de9b761cc1a..be23196829bb 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -184,6 +184,11 @@
184 reg = <0x20800 0x20>; 184 reg = <0x20800 0x20>;
185 }; 185 };
186 186
187 cpu-config@21000 {
188 compatible = "marvell,armada-xp-cpu-config";
189 reg = <0x21000 0x8>;
190 };
191
187 eth2: ethernet@30000 { 192 eth2: ethernet@30000 {
188 compatible = "marvell,armada-xp-neta"; 193 compatible = "marvell,armada-xp-neta";
189 reg = <0x30000 0x4000>; 194 reg = <0x30000 0x4000>;
@@ -236,6 +241,18 @@
236 compatible = "marvell,armada-xp-neta"; 241 compatible = "marvell,armada-xp-neta";
237 }; 242 };
238 243
244 crypto@90000 {
245 compatible = "marvell,armada-xp-crypto";
246 reg = <0x90000 0x10000>;
247 reg-names = "regs";
248 interrupts = <48>, <49>;
249 clocks = <&gateclk 23>, <&gateclk 23>;
250 clock-names = "cesa0", "cesa1";
251 marvell,crypto-srams = <&crypto_sram0>,
252 <&crypto_sram1>;
253 marvell,crypto-sram-size = <0x800>;
254 };
255
239 xor@f0900 { 256 xor@f0900 {
240 compatible = "marvell,orion-xor"; 257 compatible = "marvell,orion-xor";
241 reg = <0xF0900 0x100 258 reg = <0xF0900 0x100
@@ -256,6 +273,24 @@
256 }; 273 };
257 }; 274 };
258 }; 275 };
276
277 crypto_sram0: sa-sram0 {
278 compatible = "mmio-sram";
279 reg = <MBUS_ID(0x09, 0x09) 0 0x800>;
280 clocks = <&gateclk 23>;
281 #address-cells = <1>;
282 #size-cells = <1>;
283 ranges = <0 MBUS_ID(0x09, 0x09) 0 0x800>;
284 };
285
286 crypto_sram1: sa-sram1 {
287 compatible = "mmio-sram";
288 reg = <MBUS_ID(0x09, 0x05) 0 0x800>;
289 clocks = <&gateclk 23>;
290 #address-cells = <1>;
291 #size-cells = <1>;
292 ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>;
293 };
259 }; 294 };
260 295
261 clocks { 296 clocks {
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index e8d63afdb135..e07c2b206beb 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -44,6 +44,7 @@
44 */ 44 */
45/dts-v1/; 45/dts-v1/;
46#include "sama5d2.dtsi" 46#include "sama5d2.dtsi"
47#include "sama5d2-pinfunc.h"
47 48
48/ { 49/ {
49 model = "Atmel SAMA5D2 Xplained"; 50 model = "Atmel SAMA5D2 Xplained";
@@ -92,6 +93,8 @@
92 93
93 apb { 94 apb {
94 spi0: spi@f8000000 { 95 spi0: spi@f8000000 {
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_spi0_default>;
95 status = "okay"; 98 status = "okay";
96 99
97 m25p80@0 { 100 m25p80@0 {
@@ -102,25 +105,92 @@
102 }; 105 };
103 106
104 macb0: ethernet@f8008000 { 107 macb0: ethernet@f8008000 {
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_macb0_default>;
105 phy-mode = "rmii"; 110 phy-mode = "rmii";
106 status = "okay"; 111 status = "okay";
107 }; 112 };
108 113
109 uart1: serial@f8020000 { 114 uart1: serial@f8020000 {
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_uart1_default>;
110 status = "okay"; 117 status = "okay";
111 }; 118 };
112 119
113 i2c0: i2c@f8028000 { 120 i2c0: i2c@f8028000 {
114 dmas = <0>, <0>; 121 dmas = <0>, <0>;
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_i2c0_default>;
115 status = "okay"; 124 status = "okay";
125
126 pmic: act8865@5b {
127 compatible = "active-semi,act8865";
128 reg = <0x5b>;
129 active-semi,vsel-high;
130 status = "okay";
131
132 regulators {
133 vdd_1v35_reg: DCDC_REG1 {
134 regulator-name = "VDD_1V35";
135 regulator-min-microvolt = <1350000>;
136 regulator-max-microvolt = <1350000>;
137 regulator-always-on;
138 };
139
140 vdd_1v2_reg: DCDC_REG2 {
141 regulator-name = "VDD_1V2";
142 regulator-min-microvolt = <1100000>;
143 regulator-max-microvolt = <1300000>;
144 regulator-always-on;
145 };
146
147 vdd_3v3_reg: DCDC_REG3 {
148 regulator-name = "VDD_3V3";
149 regulator-min-microvolt = <3300000>;
150 regulator-max-microvolt = <3300000>;
151 regulator-always-on;
152 };
153
154 vdd_fuse_reg: LDO_REG1 {
155 regulator-name = "VDD_FUSE";
156 regulator-min-microvolt = <2500000>;
157 regulator-max-microvolt = <2500000>;
158 regulator-always-on;
159 };
160
161 vdd_3v3_lp_reg: LDO_REG2 {
162 regulator-name = "VDD_3V3_LP";
163 regulator-min-microvolt = <3300000>;
164 regulator-max-microvolt = <3300000>;
165 regulator-always-on;
166 };
167
168 vdd_led_reg: LDO_REG3 {
169 regulator-name = "VDD_LED";
170 regulator-min-microvolt = <3300000>;
171 regulator-max-microvolt = <3300000>;
172 regulator-always-on;
173 };
174
175 vdd_sdhc_1v8_reg: LDO_REG4 {
176 regulator-name = "VDD_SDHC_1V8";
177 regulator-min-microvolt = <1800000>;
178 regulator-max-microvolt = <1800000>;
179 };
180 };
181 };
116 }; 182 };
117 183
118 uart3: serial@fc008000 { 184 uart3: serial@fc008000 {
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_uart3_default>;
119 status = "okay"; 187 status = "okay";
120 }; 188 };
121 189
122 i2c1: i2c@fc028000 { 190 i2c1: i2c@fc028000 {
123 dmas = <0>, <0>; 191 dmas = <0>, <0>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_i2c1_default>;
124 status = "okay"; 194 status = "okay";
125 195
126 at24@54 { 196 at24@54 {
@@ -129,6 +199,54 @@
129 pagesize = <16>; 199 pagesize = <16>;
130 }; 200 };
131 }; 201 };
202
203 pinctrl@fc038000 {
204 pinctrl_i2c0_default: i2c0_default {
205 pinmux = <PIN_PD21__TWD0>,
206 <PIN_PD22__TWCK0>;
207 bias-disable;
208 };
209
210 pinctrl_i2c1_default: i2c1_default {
211 pinmux = <PIN_PD4__TWD1>,
212 <PIN_PD5__TWCK1>;
213 bias-disable;
214 };
215
216 pinctrl_macb0_default: macb0_default {
217 pinmux = <PIN_PB14__GTXCK>,
218 <PIN_PB15__GTXEN>,
219 <PIN_PB16__GRXDV>,
220 <PIN_PB17__GRXER>,
221 <PIN_PB18__GRX0>,
222 <PIN_PB19__GRX1>,
223 <PIN_PB20__GTX0>,
224 <PIN_PB21__GTX1>,
225 <PIN_PB22__GMDC>,
226 <PIN_PB23__GMDIO>;
227 bias-disable;
228 };
229
230 pinctrl_spi0_default: spi0_default {
231 pinmux = <PIN_PA14__SPI0_SPCK>,
232 <PIN_PA15__SPI0_MOSI>,
233 <PIN_PA16__SPI0_MISO>,
234 <PIN_PA17__SPI0_NPCS0>;
235 bias-disable;
236 };
237
238 pinctrl_uart1_default: uart1_default {
239 pinmux = <PIN_PD2__URXD1>,
240 <PIN_PD3__UTXD1>;
241 bias-disable;
242 };
243
244 pinctrl_uart3_default: uart3_default {
245 pinmux = <PIN_PB11__URXD3>,
246 <PIN_PB12__UTXD3>;
247 bias-disable;
248 };
249 };
132 }; 250 };
133 }; 251 };
134}; 252};
diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
index d81474e0bcd6..8488ac53d22d 100644
--- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
@@ -76,7 +76,7 @@
76 pmic: act8865@5b { 76 pmic: act8865@5b {
77 compatible = "active-semi,act8865"; 77 compatible = "active-semi,act8865";
78 reg = <0x5b>; 78 reg = <0x5b>;
79 status = "okay"; 79 status = "disabled";
80 80
81 regulators { 81 regulators {
82 vcc_1v8_reg: DCDC_REG1 { 82 vcc_1v8_reg: DCDC_REG1 {
diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
index 07f46963335b..45371a1b61b3 100644
--- a/arch/arm/boot/dts/at91-sama5d4_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
@@ -246,7 +246,7 @@
246 d8 { 246 d8 {
247 label = "d8"; 247 label = "d8";
248 gpios = <&pioD 30 GPIO_ACTIVE_HIGH>; 248 gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
249 status = "disabled"; 249 default-state = "on";
250 }; 250 };
251 251
252 d10 { 252 d10 {
diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts b/arch/arm/boot/dts/at91-sama5d4ek.dts
index 49a59c7e4a5d..6d272c0125e3 100644
--- a/arch/arm/boot/dts/at91-sama5d4ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d4ek.dts
@@ -148,6 +148,25 @@
148 clocks = <&pck2>; 148 clocks = <&pck2>;
149 clock-names = "mclk"; 149 clock-names = "mclk";
150 }; 150 };
151
152 qt1070:keyboard@1b {
153 compatible = "qt1070";
154 reg = <0x1b>;
155 interrupt-parent = <&pioE>;
156 interrupts = <25 0x0>;
157 pinctrl-names = "default";
158 pinctrl-0 = <&pinctrl_qt1070_irq>;
159 wakeup-source;
160 };
161
162 atmel_mxt_ts@4c {
163 compatible = "atmel,atmel_mxt_ts";
164 reg = <0x4c>;
165 interrupt-parent = <&pioE>;
166 interrupts = <24 0x0>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_mxt_ts>;
169 };
151 }; 170 };
152 171
153 macb0: ethernet@f8020000 { 172 macb0: ethernet@f8020000 {
@@ -204,6 +223,14 @@
204 atmel,pins = 223 atmel,pins =
205 <AT91_PIOE 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE13 gpio */ 224 <AT91_PIOE 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE13 gpio */
206 }; 225 };
226 pinctrl_qt1070_irq: qt1070_irq {
227 atmel,pins =
228 <AT91_PIOE 25 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
229 };
230 pinctrl_mxt_ts: mxt_irq {
231 atmel,pins =
232 <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
233 };
207 }; 234 };
208 }; 235 };
209 }; 236 };
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 60edd8baebb8..f6cb7a80a2f5 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -97,7 +97,7 @@
97 }; 97 };
98 98
99 pmc: pmc@fffffc00 { 99 pmc: pmc@fffffc00 {
100 compatible = "atmel,at91rm9200-pmc"; 100 compatible = "atmel,at91rm9200-pmc", "syscon";
101 reg = <0xfffffc00 0x100>; 101 reg = <0xfffffc00 0x100>;
102 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 102 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
103 interrupt-controller; 103 interrupt-controller;
@@ -426,7 +426,7 @@
426 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 426 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
427 clocks = <&ssc0_clk>; 427 clocks = <&ssc0_clk>;
428 clock-names = "pclk"; 428 clock-names = "pclk";
429 status = "disable"; 429 status = "disabled";
430 }; 430 };
431 431
432 ssc1: ssc@fffd4000 { 432 ssc1: ssc@fffd4000 {
@@ -437,7 +437,7 @@
437 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 437 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
438 clocks = <&ssc1_clk>; 438 clocks = <&ssc1_clk>;
439 clock-names = "pclk"; 439 clock-names = "pclk";
440 status = "disable"; 440 status = "disabled";
441 }; 441 };
442 442
443 ssc2: ssc@fffd8000 { 443 ssc2: ssc@fffd8000 {
@@ -448,7 +448,7 @@
448 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; 448 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
449 clocks = <&ssc2_clk>; 449 clocks = <&ssc2_clk>;
450 clock-names = "pclk"; 450 clock-names = "pclk";
451 status = "disable"; 451 status = "disabled";
452 }; 452 };
453 453
454 macb0: ethernet@fffbc000 { 454 macb0: ethernet@fffbc000 {
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index be9c027ddd97..d4884dd1c243 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -100,7 +100,7 @@
100 }; 100 };
101 101
102 pmc: pmc@fffffc00 { 102 pmc: pmc@fffffc00 {
103 compatible = "atmel,at91sam9260-pmc"; 103 compatible = "atmel,at91sam9260-pmc", "syscon";
104 reg = <0xfffffc00 0x100>; 104 reg = <0xfffffc00 0x100>;
105 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 105 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
106 interrupt-controller; 106 interrupt-controller;
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index ce1e3e94a40c..5e09de4eb9cd 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -568,7 +568,7 @@
568 }; 568 };
569 569
570 pmc: pmc@fffffc00 { 570 pmc: pmc@fffffc00 {
571 compatible = "atmel,at91rm9200-pmc"; 571 compatible = "atmel,at91rm9200-pmc", "syscon";
572 reg = <0xfffffc00 0x100>; 572 reg = <0xfffffc00 0x100>;
573 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 573 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
574 interrupt-controller; 574 interrupt-controller;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index f1f5fa3a9e6e..93446420af25 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -93,7 +93,7 @@
93 }; 93 };
94 94
95 pmc: pmc@fffffc00 { 95 pmc: pmc@fffffc00 {
96 compatible = "atmel,at91rm9200-pmc"; 96 compatible = "atmel,at91rm9200-pmc", "syscon";
97 reg = <0xfffffc00 0x100>; 97 reg = <0xfffffc00 0x100>;
98 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 98 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
99 interrupt-controller; 99 interrupt-controller;
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 18b8b9e29704..af8b708ac312 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -114,7 +114,7 @@
114 }; 114 };
115 115
116 pmc: pmc@fffffc00 { 116 pmc: pmc@fffffc00 {
117 compatible = "atmel,at91sam9g45-pmc"; 117 compatible = "atmel,at91sam9g45-pmc", "syscon";
118 reg = <0xfffffc00 0x100>; 118 reg = <0xfffffc00 0x100>;
119 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 119 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
120 interrupt-controller; 120 interrupt-controller;
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index d1ae60a855d4..9d16ef8453c5 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -198,6 +198,8 @@
198 isi_0: endpoint { 198 isi_0: endpoint {
199 remote-endpoint = <&ov2640_0>; 199 remote-endpoint = <&ov2640_0>;
200 bus-width = <8>; 200 bus-width = <8>;
201 vsync-active = <1>;
202 hsync-active = <1>;
201 }; 203 };
202 }; 204 };
203 }; 205 };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 32bc9a189db0..95569a87b6c9 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -97,7 +97,7 @@
97 }; 97 };
98 98
99 pmc: pmc@fffffc00 { 99 pmc: pmc@fffffc00 {
100 compatible = "atmel,at91sam9n12-pmc"; 100 compatible = "atmel,at91sam9n12-pmc", "syscon";
101 reg = <0xfffffc00 0x200>; 101 reg = <0xfffffc00 0x200>;
102 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 102 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
103 interrupt-controller; 103 interrupt-controller;
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index efa75064d38a..acf3451a332d 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -71,10 +71,6 @@
71 }; 71 };
72 }; 72 };
73 73
74 i2c1: i2c@f8014000 {
75 status = "okay";
76 };
77
78 mmc0: mmc@f0008000 { 74 mmc0: mmc@f0008000 {
79 pinctrl-0 = < 75 pinctrl-0 = <
80 &pinctrl_board_mmc0 76 &pinctrl_board_mmc0
@@ -204,13 +200,13 @@
204 }; 200 };
205 201
206 d9 { 202 d9 {
207 label = "d6"; 203 label = "d9";
208 gpios = <&pioB 5 GPIO_ACTIVE_LOW>; 204 gpios = <&pioB 5 GPIO_ACTIVE_LOW>;
209 linux,default-trigger = "nand-disk"; 205 linux,default-trigger = "nand-disk";
210 }; 206 };
211 207
212 d10 { 208 d10 {
213 label = "d7"; 209 label = "d10";
214 gpios = <&pioB 6 GPIO_ACTIVE_HIGH>; 210 gpios = <&pioB 6 GPIO_ACTIVE_HIGH>;
215 linux,default-trigger = "heartbeat"; 211 linux,default-trigger = "heartbeat";
216 }; 212 };
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index a0b90aedd3b8..6d829db4e887 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -814,7 +814,7 @@
814 }; 814 };
815 815
816 pmc: pmc@fffffc00 { 816 pmc: pmc@fffffc00 {
817 compatible = "atmel,at91sam9g45-pmc"; 817 compatible = "atmel,at91sam9g45-pmc", "syscon";
818 reg = <0xfffffc00 0x100>; 818 reg = <0xfffffc00 0x100>;
819 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 819 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
820 interrupt-controller; 820 interrupt-controller;
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 747d8f070a5c..0827d594b1f0 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -68,7 +68,7 @@
68 adc_op_clk: adc_op_clk{ 68 adc_op_clk: adc_op_clk{
69 compatible = "fixed-clock"; 69 compatible = "fixed-clock";
70 #clock-cells = <0>; 70 #clock-cells = <0>;
71 clock-frequency = <5000000>; 71 clock-frequency = <1000000>;
72 }; 72 };
73 }; 73 };
74 74
@@ -105,7 +105,7 @@
105 }; 105 };
106 106
107 pmc: pmc@fffffc00 { 107 pmc: pmc@fffffc00 {
108 compatible = "atmel,at91sam9x5-pmc"; 108 compatible = "atmel,at91sam9x5-pmc", "syscon";
109 reg = <0xfffffc00 0x100>; 109 reg = <0xfffffc00 0x100>;
110 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 110 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
111 interrupt-controller; 111 interrupt-controller;
@@ -1043,6 +1043,7 @@
1043 atmel,adc-channels-used = <0xffff>; 1043 atmel,adc-channels-used = <0xffff>;
1044 atmel,adc-vref = <3300>; 1044 atmel,adc-vref = <3300>;
1045 atmel,adc-startup-time = <40>; 1045 atmel,adc-startup-time = <40>;
1046 atmel,adc-sample-hold-time = <11>;
1046 atmel,adc-res = <8 10>; 1047 atmel,adc-res = <8 10>;
1047 atmel,adc-res-names = "lowres", "highres"; 1048 atmel,adc-res-names = "lowres", "highres";
1048 atmel,adc-use-res = "highres"; 1049 atmel,adc-use-res = "highres";
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
index d237c462dfc6..52425a4ca97e 100644
--- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -66,6 +66,8 @@
66 isi_0: endpoint@0 { 66 isi_0: endpoint@0 {
67 remote-endpoint = <&ov2640_0>; 67 remote-endpoint = <&ov2640_0>;
68 bus-width = <8>; 68 bus-width = <8>;
69 vsync-active = <1>;
70 hsync-active = <1>;
69 }; 71 };
70 }; 72 };
71 }; 73 };
@@ -100,6 +102,12 @@
100 }; 102 };
101 }; 103 };
102 104
105 adc0: adc@f804c000 {
106 atmel,adc-ts-wires = <4>;
107 atmel,adc-ts-pressure-threshold = <10000>;
108 status = "okay";
109 };
110
103 pinctrl@fffff400 { 111 pinctrl@fffff400 {
104 camera_sensor { 112 camera_sensor {
105 pinctrl_pck0_as_isi_mck: pck0_as_isi_mck-0 { 113 pinctrl_pck0_as_isi_mck: pck0_as_isi_mck-0 {
diff --git a/arch/arm/boot/dts/axp209.dtsi b/arch/arm/boot/dts/axp209.dtsi
index 24c935c72e5e..051ab3ba9a65 100644
--- a/arch/arm/boot/dts/axp209.dtsi
+++ b/arch/arm/boot/dts/axp209.dtsi
@@ -89,4 +89,9 @@
89 regulator-name = "ldo5"; 89 regulator-name = "ldo5";
90 }; 90 };
91 }; 91 };
92
93 usb_power_supply: usb_power_supply {
94 compatible = "x-powers,axp202-usb-power-supply";
95 status = "disabled";
96 };
92}; 97};
diff --git a/arch/arm/boot/dts/axp22x.dtsi b/arch/arm/boot/dts/axp22x.dtsi
new file mode 100644
index 000000000000..76302f58c478
--- /dev/null
+++ b/arch/arm/boot/dts/axp22x.dtsi
@@ -0,0 +1,143 @@
1/*
2 * Copyright 2015 Chen-Yu Tsai
3 *
4 * Chen-Yu Tsai <wens@csie.org>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/*
46 * AXP221/221s/223 Integrated Power Management Chip
47 * http://www.x-powers.com/product/AXP22X.php
48 * http://dl.linux-sunxi.org/AXP/AXP221%20Datasheet%20V1.2%2020130326%20.pdf
49 */
50
51&axp22x {
52 interrupt-controller;
53 #interrupt-cells = <1>;
54
55 regulators {
56 /* Default work frequency for buck regulators */
57 x-powers,dcdc-freq = <3000>;
58
59 reg_dcdc1: dcdc1 {
60 regulator-name = "dcdc1";
61 };
62
63 reg_dcdc2: dcdc2 {
64 regulator-name = "dcdc2";
65 };
66
67 reg_dcdc3: dcdc3 {
68 regulator-name = "dcdc3";
69 };
70
71 reg_dcdc4: dcdc4 {
72 regulator-name = "dcdc4";
73 };
74
75 reg_dcdc5: dcdc5 {
76 regulator-name = "dcdc5";
77 };
78
79 reg_dc1sw: dc1sw {
80 regulator-name = "dc1sw";
81 };
82
83 reg_dc5ldo: dc5ldo {
84 regulator-name = "dc5ldo";
85 };
86
87 reg_aldo1: aldo1 {
88 regulator-name = "aldo1";
89 };
90
91 reg_aldo2: aldo2 {
92 regulator-name = "aldo2";
93 };
94
95 reg_aldo3: aldo3 {
96 regulator-name = "aldo3";
97 };
98
99 reg_dldo1: dldo1 {
100 regulator-name = "dldo1";
101 };
102
103 reg_dldo2: dldo2 {
104 regulator-name = "dldo2";
105 };
106
107 reg_dldo3: dldo3 {
108 regulator-name = "dldo3";
109 };
110
111 reg_dldo4: dldo4 {
112 regulator-name = "dldo4";
113 };
114
115 reg_eldo1: eldo1 {
116 regulator-name = "eldo1";
117 };
118
119 reg_eldo2: eldo2 {
120 regulator-name = "eldo2";
121 };
122
123 reg_eldo3: eldo3 {
124 regulator-name = "eldo3";
125 };
126
127 reg_ldo_io0: ldo_io0 {
128 regulator-name = "ldo_io0";
129 };
130
131 reg_ldo_io1: ldo_io1 {
132 regulator-name = "ldo_io1";
133 };
134
135 reg_rtc_ldo: rtc_ldo {
136 /* RTC_LDO is a fixed, always-on regulator */
137 regulator-always-on;
138 regulator-min-microvolt = <3000000>;
139 regulator-max-microvolt = <3000000>;
140 regulator-name = "rtc_ldo";
141 };
142 };
143};
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index e1ac07a16f92..2778533502d9 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -32,6 +32,7 @@
32 32
33#include <dt-bindings/interrupt-controller/arm-gic.h> 33#include <dt-bindings/interrupt-controller/arm-gic.h>
34#include <dt-bindings/interrupt-controller/irq.h> 34#include <dt-bindings/interrupt-controller/irq.h>
35#include <dt-bindings/clock/bcm-cygnus.h>
35 36
36#include "skeleton.dtsi" 37#include "skeleton.dtsi"
37 38
@@ -54,197 +55,212 @@
54 55
55 /include/ "bcm-cygnus-clock.dtsi" 56 /include/ "bcm-cygnus-clock.dtsi"
56 57
57 pinctrl: pinctrl@0x0301d0c8 { 58 core {
58 compatible = "brcm,cygnus-pinmux"; 59 compatible = "simple-bus";
59 reg = <0x0301d0c8 0x30>, 60 ranges = <0x00000000 0x19000000 0x1000000>;
60 <0x0301d24c 0x2c>; 61 #address-cells = <1>;
61 }; 62 #size-cells = <1>;
62
63 gpio_crmu: gpio@03024800 {
64 compatible = "brcm,cygnus-crmu-gpio";
65 reg = <0x03024800 0x50>,
66 <0x03024008 0x18>;
67 #gpio-cells = <2>;
68 gpio-controller;
69 };
70
71 gpio_ccm: gpio@1800a000 {
72 compatible = "brcm,cygnus-ccm-gpio";
73 reg = <0x1800a000 0x50>,
74 <0x0301d164 0x20>;
75 #gpio-cells = <2>;
76 gpio-controller;
77 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
78 interrupt-controller;
79 };
80 63
81 gpio_asiu: gpio@180a5000 { 64 timer@20200 {
82 compatible = "brcm,cygnus-asiu-gpio"; 65 compatible = "arm,cortex-a9-global-timer";
83 reg = <0x180a5000 0x668>; 66 reg = <0x20200 0x100>;
84 #gpio-cells = <2>; 67 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
85 gpio-controller; 68 clocks = <&periph_clk>;
69 };
86 70
87 pinmux = <&pinctrl>; 71 gic: interrupt-controller@21000 {
72 compatible = "arm,cortex-a9-gic";
73 #interrupt-cells = <3>;
74 #address-cells = <0>;
75 interrupt-controller;
76 reg = <0x21000 0x1000>,
77 <0x20100 0x100>;
78 };
88 79
89 interrupt-controller; 80 L2: l2-cache {
90 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 81 compatible = "arm,pl310-cache";
82 reg = <0x22000 0x1000>;
83 cache-unified;
84 cache-level = <2>;
85 };
91 }; 86 };
92 87
93 amba { 88 axi {
89 compatible = "simple-bus";
90 ranges;
94 #address-cells = <1>; 91 #address-cells = <1>;
95 #size-cells = <1>; 92 #size-cells = <1>;
96 compatible = "arm,amba-bus", "simple-bus";
97 interrupt-parent = <&gic>;
98 ranges;
99 93
100 wdt@18009000 { 94 pinctrl: pinctrl@0x0301d0c8 {
101 compatible = "arm,sp805" , "arm,primecell"; 95 compatible = "brcm,cygnus-pinmux";
102 reg = <0x18009000 0x1000>; 96 reg = <0x0301d0c8 0x30>,
103 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 97 <0x0301d24c 0x2c>;
104 clocks = <&axi81_clk>;
105 clock-names = "apb_pclk";
106 }; 98 };
107 };
108 99
109 i2c0: i2c@18008000 { 100 gpio_crmu: gpio@03024800 {
110 compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c"; 101 compatible = "brcm,cygnus-crmu-gpio";
111 reg = <0x18008000 0x100>; 102 reg = <0x03024800 0x50>,
112 #address-cells = <1>; 103 <0x03024008 0x18>;
113 #size-cells = <0>; 104 #gpio-cells = <2>;
114 interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>; 105 gpio-controller;
115 clock-frequency = <100000>; 106 };
116 status = "disabled";
117 };
118 107
119 i2c1: i2c@1800b000 { 108 i2c0: i2c@18008000 {
120 compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c"; 109 compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
121 reg = <0x1800b000 0x100>; 110 reg = <0x18008000 0x100>;
122 #address-cells = <1>; 111 #address-cells = <1>;
123 #size-cells = <0>; 112 #size-cells = <0>;
124 interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>; 113 interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
125 clock-frequency = <100000>; 114 clock-frequency = <100000>;
126 status = "disabled"; 115 status = "disabled";
127 }; 116 };
128 117
129 pcie0: pcie@18012000 { 118 wdt0: wdt@18009000 {
130 compatible = "brcm,iproc-pcie"; 119 compatible = "arm,sp805" , "arm,primecell";
131 reg = <0x18012000 0x1000>; 120 reg = <0x18009000 0x1000>;
121 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
122 clocks = <&axi81_clk>;
123 clock-names = "apb_pclk";
124 };
132 125
133 #interrupt-cells = <1>; 126 gpio_ccm: gpio@1800a000 {
134 interrupt-map-mask = <0 0 0 0>; 127 compatible = "brcm,cygnus-ccm-gpio";
135 interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>; 128 reg = <0x1800a000 0x50>,
129 <0x0301d164 0x20>;
130 #gpio-cells = <2>;
131 gpio-controller;
132 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
133 interrupt-controller;
134 };
136 135
137 linux,pci-domain = <0>; 136 i2c1: i2c@1800b000 {
137 compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
138 reg = <0x1800b000 0x100>;
139 #address-cells = <1>;
140 #size-cells = <0>;
141 interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
142 clock-frequency = <100000>;
143 status = "disabled";
144 };
138 145
139 bus-range = <0x00 0xff>; 146 pcie0: pcie@18012000 {
147 compatible = "brcm,iproc-pcie";
148 reg = <0x18012000 0x1000>;
140 149
141 #address-cells = <3>; 150 #interrupt-cells = <1>;
142 #size-cells = <2>; 151 interrupt-map-mask = <0 0 0 0>;
143 device_type = "pci"; 152 interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
144 ranges = <0x81000000 0 0 0x28000000 0 0x00010000
145 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
146 153
147 status = "disabled"; 154 linux,pci-domain = <0>;
148 };
149 155
150 pcie1: pcie@18013000 { 156 bus-range = <0x00 0xff>;
151 compatible = "brcm,iproc-pcie";
152 reg = <0x18013000 0x1000>;
153 157
154 #interrupt-cells = <1>; 158 #address-cells = <3>;
155 interrupt-map-mask = <0 0 0 0>; 159 #size-cells = <2>;
156 interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>; 160 device_type = "pci";
161 ranges = <0x81000000 0 0 0x28000000 0 0x00010000
162 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
157 163
158 linux,pci-domain = <1>; 164 status = "disabled";
165 };
159 166
160 bus-range = <0x00 0xff>; 167 pcie1: pcie@18013000 {
168 compatible = "brcm,iproc-pcie";
169 reg = <0x18013000 0x1000>;
161 170
162 #address-cells = <3>; 171 #interrupt-cells = <1>;
163 #size-cells = <2>; 172 interrupt-map-mask = <0 0 0 0>;
164 device_type = "pci"; 173 interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
165 ranges = <0x81000000 0 0 0x48000000 0 0x00010000
166 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
167 174
168 status = "disabled"; 175 linux,pci-domain = <1>;
169 };
170 176
171 uart0: serial@18020000 { 177 bus-range = <0x00 0xff>;
172 compatible = "snps,dw-apb-uart";
173 reg = <0x18020000 0x100>;
174 reg-shift = <2>;
175 reg-io-width = <4>;
176 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
177 clocks = <&axi81_clk>;
178 clock-frequency = <100000000>;
179 status = "disabled";
180 };
181 178
182 uart1: serial@18021000 { 179 #address-cells = <3>;
183 compatible = "snps,dw-apb-uart"; 180 #size-cells = <2>;
184 reg = <0x18021000 0x100>; 181 device_type = "pci";
185 reg-shift = <2>; 182 ranges = <0x81000000 0 0 0x48000000 0 0x00010000
186 reg-io-width = <4>; 183 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
187 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
188 clocks = <&axi81_clk>;
189 clock-frequency = <100000000>;
190 status = "disabled";
191 };
192 184
193 uart2: serial@18022000 { 185 status = "disabled";
194 compatible = "snps,dw-apb-uart"; 186 };
195 reg = <0x18020000 0x100>;
196 reg-shift = <2>;
197 reg-io-width = <4>;
198 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
199 clocks = <&axi81_clk>;
200 clock-frequency = <100000000>;
201 status = "disabled";
202 };
203 187
204 uart3: serial@18023000 { 188 uart0: serial@18020000 {
205 compatible = "snps,dw-apb-uart"; 189 compatible = "snps,dw-apb-uart";
206 reg = <0x18023000 0x100>; 190 reg = <0x18020000 0x100>;
207 reg-shift = <2>; 191 reg-shift = <2>;
208 reg-io-width = <4>; 192 reg-io-width = <4>;
209 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 193 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
210 clocks = <&axi81_clk>; 194 clocks = <&axi81_clk>;
211 clock-frequency = <100000000>; 195 clock-frequency = <100000000>;
212 status = "disabled"; 196 status = "disabled";
213 }; 197 };
214 198
215 nand: nand@18046000 { 199 uart1: serial@18021000 {
216 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand"; 200 compatible = "snps,dw-apb-uart";
217 reg = <0x18046000 0x600>, <0xf8105408 0x600>, <0x18046f00 0x20>; 201 reg = <0x18021000 0x100>;
218 reg-names = "nand", "iproc-idm", "iproc-ext"; 202 reg-shift = <2>;
219 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 203 reg-io-width = <4>;
204 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
205 clocks = <&axi81_clk>;
206 clock-frequency = <100000000>;
207 status = "disabled";
208 };
220 209
221 #address-cells = <1>; 210 uart2: serial@18022000 {
222 #size-cells = <0>; 211 compatible = "snps,dw-apb-uart";
212 reg = <0x18020000 0x100>;
213 reg-shift = <2>;
214 reg-io-width = <4>;
215 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
216 clocks = <&axi81_clk>;
217 clock-frequency = <100000000>;
218 status = "disabled";
219 };
223 220
224 brcm,nand-has-wp; 221 uart3: serial@18023000 {
225 }; 222 compatible = "snps,dw-apb-uart";
223 reg = <0x18023000 0x100>;
224 reg-shift = <2>;
225 reg-io-width = <4>;
226 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
227 clocks = <&axi81_clk>;
228 clock-frequency = <100000000>;
229 status = "disabled";
230 };
226 231
227 gic: interrupt-controller@19021000 { 232 nand: nand@18046000 {
228 compatible = "arm,cortex-a9-gic"; 233 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
229 #interrupt-cells = <3>; 234 reg = <0x18046000 0x600>, <0xf8105408 0x600>,
230 #address-cells = <0>; 235 <0x18046f00 0x20>;
231 interrupt-controller; 236 reg-names = "nand", "iproc-idm", "iproc-ext";
232 reg = <0x19021000 0x1000>, 237 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
233 <0x19020100 0x100>;
234 };
235 238
236 L2: l2-cache { 239 #address-cells = <1>;
237 compatible = "arm,pl310-cache"; 240 #size-cells = <0>;
238 reg = <0x19022000 0x1000>;
239 cache-unified;
240 cache-level = <2>;
241 };
242 241
243 timer@19020200 { 242 brcm,nand-has-wp;
244 compatible = "arm,cortex-a9-global-timer"; 243 };
245 reg = <0x19020200 0x100>;
246 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
247 clocks = <&periph_clk>;
248 };
249 244
245 gpio_asiu: gpio@180a5000 {
246 compatible = "brcm,cygnus-asiu-gpio";
247 reg = <0x180a5000 0x668>;
248 #gpio-cells = <2>;
249 gpio-controller;
250
251 pinmux = <&pinctrl>;
252
253 interrupt-controller;
254 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
255 };
256
257 touchscreen: tsc@180a6000 {
258 compatible = "brcm,iproc-touchscreen";
259 reg = <0x180a6000 0x40>;
260 clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
261 clock-names = "tsc_clk";
262 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
263 status = "disabled";
264 };
265 };
250}; 266};
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
new file mode 100644
index 000000000000..58aca277e4a7
--- /dev/null
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -0,0 +1,119 @@
1/*
2 * BSD LICENSE
3 *
4 * Copyright(c) 2015 Broadcom Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Broadcom Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <dt-bindings/interrupt-controller/arm-gic.h>
34#include <dt-bindings/interrupt-controller/irq.h>
35
36#include "skeleton.dtsi"
37
38/ {
39 compatible = "brcm,nsp";
40 model = "Broadcom Northstar Plus SoC";
41 interrupt-parent = <&gic>;
42
43 mpcore {
44 compatible = "simple-bus";
45 ranges = <0x00000000 0x19020000 0x00003000>;
46 #address-cells = <1>;
47 #size-cells = <1>;
48
49 cpus {
50 #address-cells = <1>;
51 #size-cells = <0>;
52
53 cpu@0 {
54 device_type = "cpu";
55 compatible = "arm,cortex-a9";
56 next-level-cache = <&L2>;
57 reg = <0x0>;
58 };
59 };
60
61 L2: l2-cache {
62 compatible = "arm,pl310-cache";
63 reg = <0x2000 0x1000>;
64 cache-unified;
65 cache-level = <2>;
66 };
67
68 gic: interrupt-controller@19021000 {
69 compatible = "arm,cortex-a9-gic";
70 #interrupt-cells = <3>;
71 #address-cells = <0>;
72 interrupt-controller;
73 reg = <0x1000 0x1000>,
74 <0x0100 0x100>;
75 };
76
77 timer@19020200 {
78 compatible = "arm,cortex-a9-global-timer";
79 reg = <0x0200 0x100>;
80 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
81 clocks = <&periph_clk>;
82 };
83 };
84
85 clocks {
86 #address-cells = <1>;
87 #size-cells = <1>;
88 ranges;
89
90 periph_clk: periph_clk {
91 compatible = "fixed-clock";
92 #clock-cells = <0>;
93 clock-frequency = <500000000>;
94 };
95 };
96
97 axi {
98 compatible = "simple-bus";
99 ranges = <0x00000000 0x18000000 0x00001000>;
100 #address-cells = <1>;
101 #size-cells = <1>;
102
103 uart0: serial@18000300 {
104 compatible = "ns16550a";
105 reg = <0x0300 0x100>;
106 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
107 clock-frequency = <62499840>;
108 status = "disabled";
109 };
110
111 uart1: serial@18000400 {
112 compatible = "ns16550a";
113 reg = <0x0400 0x100>;
114 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
115 clock-frequency = <62499840>;
116 status = "disabled";
117 };
118 };
119};
diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
index 64b8d10ccff8..ca92bba6a8c5 100644
--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
@@ -24,6 +24,17 @@
24 reg = <0x00000000 0x08000000>; 24 reg = <0x00000000 0x08000000>;
25 }; 25 };
26 26
27 axi@18000000 {
28 usb3@23000 {
29 reg = <0x00023000 0x1000>;
30
31 #address-cells = <1>;
32 #size-cells = <1>;
33
34 vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
35 };
36 };
37
27 leds { 38 leds {
28 compatible = "gpio-leds"; 39 compatible = "gpio-leds";
29 40
diff --git a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
index aedf3c426e1f..8ade7def2e8a 100644
--- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
@@ -10,6 +10,7 @@
10/dts-v1/; 10/dts-v1/;
11 11
12#include "bcm4708.dtsi" 12#include "bcm4708.dtsi"
13#include "bcm5301x-nand-cs0-bch8.dtsi"
13 14
14/ { 15/ {
15 compatible = "asus,rt-ac87u", "brcm,bcm4709", "brcm,bcm4708"; 16 compatible = "asus,rt-ac87u", "brcm,bcm4709", "brcm,bcm4708";
diff --git a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
new file mode 100644
index 000000000000..a22ed144040b
--- /dev/null
+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
@@ -0,0 +1,106 @@
1/*
2 * Broadcom BCM470X / BCM5301X ARM platform code.
3 * DTS for Netgear R7000
4 *
5 * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
6 *
7 * Licensed under the GNU/GPL. See COPYING for details.
8 */
9
10/dts-v1/;
11
12#include "bcm4708.dtsi"
13#include "bcm5301x-nand-cs0-bch8.dtsi"
14
15/ {
16 compatible = "netgear,r7000", "brcm,bcm4709", "brcm,bcm4708";
17 model = "Netgear R7000";
18
19 chosen {
20 bootargs = "console=ttyS0,115200";
21 };
22
23 memory {
24 reg = <0x00000000 0x08000000>;
25 };
26
27 leds {
28 compatible = "gpio-leds";
29
30 power-white {
31 label = "bcm53xx:white:power";
32 gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
33 linux,default-trigger = "default-on";
34 };
35
36 power-amber {
37 label = "bcm53xx:amber:power";
38 gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
39 linux,default-trigger = "default-off";
40 };
41
42 5ghz {
43 label = "bcm53xx:white:5ghz";
44 gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>;
45 linux,default-trigger = "default-off";
46 };
47
48 2ghz {
49 label = "bcm53xx:white:2ghz";
50 gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
51 linux,default-trigger = "default-off";
52 };
53
54 wps {
55 label = "bcm53xx:white:wps";
56 gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>;
57 linux,default-trigger = "default-off";
58 };
59
60 wireless {
61 label = "bcm53xx:white:wireless";
62 gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
63 linux,default-trigger = "default-off";
64 };
65
66 usb3 {
67 label = "bcm53xx:white:usb3";
68 gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
69 linux,default-trigger = "default-off";
70 };
71
72 usb2 {
73 label = "bcm53xx:white:usb2";
74 gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
75 linux,default-trigger = "default-off";
76 };
77 };
78
79 gpio-keys {
80 compatible = "gpio-keys";
81 #address-cells = <1>;
82 #size-cells = <0>;
83
84 wps {
85 label = "WPS";
86 linux,code = <KEY_WPS_BUTTON>;
87 gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
88 };
89
90 rfkill {
91 label = "WiFi";
92 linux,code = <KEY_RFKILL>;
93 gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
94 };
95
96 restart {
97 label = "Reset";
98 linux,code = <KEY_RESTART>;
99 gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
100 };
101 };
102};
103
104&uart0 {
105 status = "okay";
106};
diff --git a/arch/arm/boot/dts/bcm7445.dtsi b/arch/arm/boot/dts/bcm7445.dtsi
index 3b6b17560687..4791321969b3 100644
--- a/arch/arm/boot/dts/bcm7445.dtsi
+++ b/arch/arm/boot/dts/bcm7445.dtsi
@@ -143,6 +143,12 @@
143 brcm,irq-can-wake; 143 brcm,irq-can-wake;
144 }; 144 };
145 145
146 aon-ctrl@410000 {
147 compatible = "brcm,brcmstb-aon-ctrl";
148 reg = <0x410000 0x200>, <0x410200 0x400>;
149 reg-names = "aon-ctrl", "aon-sram";
150 };
151
146 nand: nand@3e2800 { 152 nand: nand@3e2800 {
147 status = "disabled"; 153 status = "disabled";
148 #address-cells = <1>; 154 #address-cells = <1>;
@@ -219,6 +225,84 @@
219 225
220 }; 226 };
221 227
228 memory_controllers {
229 compatible = "simple-bus";
230 ranges = <0x0 0x0 0xf1100000 0x200000>;
231 #address-cells = <1>;
232 #size-cells = <1>;
233
234 memc@0 {
235 compatible = "brcm,brcmstb-memc", "simple-bus";
236 #address-cells = <1>;
237 #size-cells = <1>;
238 ranges = <0x0 0x0 0x80000>;
239
240 memc-ddr@2000 {
241 compatible = "brcm,brcmstb-memc-ddr";
242 reg = <0x2000 0x800>;
243 };
244
245 ddr-phy@6000 {
246 compatible = "brcm,brcmstb-ddr-phy-v240.1";
247 reg = <0x6000 0x21c>;
248 };
249
250 shimphy@8000 {
251 compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
252 reg = <0x8000 0xe4>;
253 };
254 };
255
256 memc@1 {
257 compatible = "brcm,brcmstb-memc", "simple-bus";
258 #address-cells = <1>;
259 #size-cells = <1>;
260 ranges = <0x0 0x80000 0x80000>;
261
262 memc-ddr@2000 {
263 compatible = "brcm,brcmstb-memc-ddr";
264 reg = <0x2000 0x800>;
265 };
266
267 ddr-phy@6000 {
268 compatible = "brcm,brcmstb-ddr-phy-v240.1";
269 reg = <0x6000 0x21c>;
270 };
271
272 shimphy@8000 {
273 compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
274 reg = <0x8000 0xe4>;
275 };
276 };
277
278 memc@2 {
279 compatible = "brcm,brcmstb-memc", "simple-bus";
280 #address-cells = <1>;
281 #size-cells = <1>;
282 ranges = <0x0 0x100000 0x80000>;
283
284 memc-ddr@2000 {
285 compatible = "brcm,brcmstb-memc-ddr";
286 reg = <0x2000 0x800>;
287 };
288
289 ddr-phy@6000 {
290 compatible = "brcm,brcmstb-ddr-phy-v240.1";
291 reg = <0x6000 0x21c>;
292 };
293
294 shimphy@8000 {
295 compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
296 reg = <0x8000 0xe4>;
297 };
298 };
299 };
300
301 sram@ffe00000 {
302 compatible = "brcm,boot-sram", "mmio-sram";
303 reg = <0x0 0xffe00000 0x0 0x10000>;
304 };
305
222 smpboot { 306 smpboot {
223 compatible = "brcm,brcmstb-smpboot"; 307 compatible = "brcm,brcmstb-smpboot";
224 syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>; 308 syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>;
diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts
index 7db484323fd6..8b3800f46288 100644
--- a/arch/arm/boot/dts/bcm911360_entphn.dts
+++ b/arch/arm/boot/dts/bcm911360_entphn.dts
@@ -39,19 +39,11 @@
39 model = "Cygnus Enterprise Phone (BCM911360_ENTPHN)"; 39 model = "Cygnus Enterprise Phone (BCM911360_ENTPHN)";
40 compatible = "brcm,bcm11360", "brcm,cygnus"; 40 compatible = "brcm,bcm11360", "brcm,cygnus";
41 41
42 aliases {
43 serial0 = &uart3;
44 };
45
46 chosen { 42 chosen {
47 stdout-path = &uart3; 43 stdout-path = &uart3;
48 bootargs = "console=ttyS0,115200"; 44 bootargs = "console=ttyS0,115200";
49 }; 45 };
50 46
51 uart3: serial@18023000 {
52 status = "okay";
53 };
54
55 gpio_keys { 47 gpio_keys {
56 compatible = "gpio-keys"; 48 compatible = "gpio-keys";
57 #address-cells = <1>; 49 #address-cells = <1>;
@@ -64,3 +56,23 @@
64 }; 56 };
65 }; 57 };
66}; 58};
59
60&uart3 {
61 status = "okay";
62};
63
64&nand {
65 nandcs@1 {
66 compatible = "brcm,nandcs";
67 reg = <0>;
68 nand-on-flash-bbt;
69
70 #address-cells = <1>;
71 #size-cells = <1>;
72
73 nand-ecc-strength = <24>;
74 nand-ecc-step-size = <1024>;
75
76 brcm,nand-oob-sector-size = <27>;
77 };
78};
diff --git a/arch/arm/boot/dts/bcm911360k.dts b/arch/arm/boot/dts/bcm911360k.dts
index 9658d4f62d59..091c73a46e08 100644
--- a/arch/arm/boot/dts/bcm911360k.dts
+++ b/arch/arm/boot/dts/bcm911360k.dts
@@ -43,11 +43,10 @@
43 }; 43 };
44 44
45 chosen { 45 chosen {
46 stdout-path = &uart3; 46 stdout-path = "serial0:115200n8";
47 bootargs = "console=ttyS0,115200";
48 }; 47 };
48};
49 49
50 uart3: serial@18023000 { 50&uart3 {
51 status = "okay"; 51 status = "okay";
52 };
53}; 52};
diff --git a/arch/arm/boot/dts/bcm958300k.dts b/arch/arm/boot/dts/bcm958300k.dts
index 2f63052f9d48..b4a1392bd5a6 100644
--- a/arch/arm/boot/dts/bcm958300k.dts
+++ b/arch/arm/boot/dts/bcm958300k.dts
@@ -33,6 +33,7 @@
33/dts-v1/; 33/dts-v1/;
34 34
35#include "bcm-cygnus.dtsi" 35#include "bcm-cygnus.dtsi"
36#include "bcm9hmidc.dtsi"
36 37
37/ { 38/ {
38 model = "Cygnus SVK (BCM958300K)"; 39 model = "Cygnus SVK (BCM958300K)";
@@ -43,35 +44,34 @@
43 }; 44 };
44 45
45 chosen { 46 chosen {
46 stdout-path = &uart3; 47 stdout-path = "serial0:115200n8";
47 bootargs = "console=ttyS0,115200";
48 }; 48 };
49};
49 50
50 pcie0: pcie@18012000 { 51&pcie0 {
51 status = "okay"; 52 status = "okay";
52 }; 53};
53 54
54 pcie1: pcie@18013000 { 55&pcie1 {
55 status = "okay"; 56 status = "okay";
56 }; 57};
57 58
58 uart3: serial@18023000 { 59&uart3 {
59 status = "okay"; 60 status = "okay";
60 }; 61};
61 62
62 nand: nand@18046000 { 63&nand {
63 nandcs@1 { 64 nandcs@1 {
64 compatible = "brcm,nandcs"; 65 compatible = "brcm,nandcs";
65 reg = <0>; 66 reg = <0>;
66 nand-on-flash-bbt; 67 nand-on-flash-bbt;
67 68
68 #address-cells = <1>; 69 #address-cells = <1>;
69 #size-cells = <1>; 70 #size-cells = <1>;
70 71
71 nand-ecc-strength = <24>; 72 nand-ecc-strength = <24>;
72 nand-ecc-step-size = <1024>; 73 nand-ecc-step-size = <1024>;
73 74
74 brcm,nand-oob-sector-size = <27>; 75 brcm,nand-oob-sector-size = <27>;
75 };
76 }; 76 };
77}; 77};
diff --git a/arch/arm/boot/dts/bcm958305k.dts b/arch/arm/boot/dts/bcm958305k.dts
index 56b429abbedb..3378683321d3 100644
--- a/arch/arm/boot/dts/bcm958305k.dts
+++ b/arch/arm/boot/dts/bcm958305k.dts
@@ -33,6 +33,7 @@
33/dts-v1/; 33/dts-v1/;
34 34
35#include "bcm-cygnus.dtsi" 35#include "bcm-cygnus.dtsi"
36#include "bcm9hmidc.dtsi"
36 37
37/ { 38/ {
38 model = "Cygnus Wireless Audio (BCM958305K)"; 39 model = "Cygnus Wireless Audio (BCM958305K)";
@@ -43,11 +44,42 @@
43 }; 44 };
44 45
45 chosen { 46 chosen {
46 stdout-path = &uart3; 47 stdout-path = "serial0:115200n8";
47 bootargs = "console=ttyS0,115200";
48 }; 48 };
49};
50
51&i2c0 {
52 status = "okay";
53};
54
55&i2c1 {
56 status = "okay";
57};
58
59&pcie0 {
60 status = "okay";
61};
62
63&pcie1 {
64 status = "okay";
65};
66
67&uart3 {
68 status = "okay";
69};
70
71&nand {
72 nandcs@1 {
73 compatible = "brcm,nandcs";
74 reg = <0>;
75 nand-on-flash-bbt;
76
77 #address-cells = <1>;
78 #size-cells = <1>;
79
80 nand-ecc-strength = <24>;
81 nand-ecc-step-size = <1024>;
49 82
50 uart3: serial@18023000 { 83 brcm,nand-oob-sector-size = <27>;
51 status = "okay";
52 }; 84 };
53}; 85};
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
new file mode 100644
index 000000000000..16303dbd35df
--- /dev/null
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -0,0 +1,57 @@
1/*
2 * BSD LICENSE
3 *
4 * Copyright(c) 2015 Broadcom Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Broadcom Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/dts-v1/;
34
35#include "bcm-nsp.dtsi"
36
37/ {
38 model = "NorthStar Plus SVK (BCM958625K)";
39 compatible = "brcm,bcm58625", "brcm,nsp";
40
41 aliases {
42 serial0 = &uart0;
43 serial1 = &uart1;
44 };
45
46 chosen {
47 stdout-path = "serial0:115200n8";
48 };
49};
50
51&uart0 {
52 status = "okay";
53};
54
55&uart1 {
56 status = "okay";
57};
diff --git a/arch/arm/boot/dts/bcm9hmidc.dtsi b/arch/arm/boot/dts/bcm9hmidc.dtsi
new file mode 100644
index 000000000000..65397c088335
--- /dev/null
+++ b/arch/arm/boot/dts/bcm9hmidc.dtsi
@@ -0,0 +1,42 @@
1/*
2 * BSD LICENSE
3 *
4 * Copyright(c) 2015 Broadcom Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Broadcom Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/*
34 * Broadcom human machine interface daughter card (bcm9hmidc) installed on
35 * bcm958300k/bcm958305k boards
36 */
37
38&touchscreen {
39 touchscreen-inverted-x;
40 touchscreen-inverted-y;
41 status = "okay";
42};
diff --git a/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts b/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
index 5c99fb3a4d10..3c0907b87fd6 100644
--- a/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
+++ b/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
@@ -45,7 +45,8 @@
45 compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin"; 45 compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
46 46
47 chosen { 47 chosen {
48 bootargs = "console=ttyS0,115200 earlyprintk"; 48 bootargs = "earlyprintk";
49 stdout-path = "serial0:115200n8";
49 }; 50 };
50 51
51 memory { 52 memory {
diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
index ef811de09908..eaadac3bdd44 100644
--- a/arch/arm/boot/dts/berlin2.dtsi
+++ b/arch/arm/boot/dts/berlin2.dtsi
@@ -47,6 +47,12 @@
47 model = "Marvell Armada 1500 (BG2) SoC"; 47 model = "Marvell Armada 1500 (BG2) SoC";
48 compatible = "marvell,berlin2", "marvell,berlin"; 48 compatible = "marvell,berlin2", "marvell,berlin";
49 49
50 aliases {
51 serial0 = &uart0;
52 serial1 = &uart1;
53 serial2 = &uart2;
54 };
55
50 cpus { 56 cpus {
51 #address-cells = <1>; 57 #address-cells = <1>;
52 #size-cells = <0>; 58 #size-cells = <0>;
@@ -57,6 +63,16 @@
57 device_type = "cpu"; 63 device_type = "cpu";
58 next-level-cache = <&l2>; 64 next-level-cache = <&l2>;
59 reg = <0>; 65 reg = <0>;
66
67 clocks = <&chip_clk CLKID_CPU>;
68 clock-latency = <100000>;
69 operating-points = <
70 /* kHz uV */
71 1200000 1200000
72 1000000 1200000
73 800000 1200000
74 600000 1200000
75 >;
60 }; 76 };
61 77
62 cpu@1 { 78 cpu@1 {
@@ -404,6 +420,13 @@
404 }; 420 };
405 }; 421 };
406 422
423 pwm: pwm@f20000 {
424 compatible = "marvell,berlin-pwm";
425 reg = <0xf20000 0x40>;
426 clocks = <&chip_clk CLKID_CFG>;
427 #pwm-cells = <3>;
428 };
429
407 apb@fc0000 { 430 apb@fc0000 {
408 compatible = "simple-bus"; 431 compatible = "simple-bus";
409 #address-cells = <1>; 432 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/berlin2cd-google-chromecast.dts b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
index 772165ad0a52..8ba8b50ce997 100644
--- a/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
+++ b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
@@ -46,7 +46,8 @@
46 compatible = "google,chromecast", "marvell,berlin2cd", "marvell,berlin"; 46 compatible = "google,chromecast", "marvell,berlin2cd", "marvell,berlin";
47 47
48 chosen { 48 chosen {
49 bootargs = "console=ttyS0,115200 earlyprintk"; 49 bootargs = "earlyprintk";
50 stdout-path = "serial0:115200n8";
50 }; 51 };
51 52
52 memory { 53 memory {
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index 900213d78a32..b16df157214d 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -47,6 +47,11 @@
47 model = "Marvell Armada 1500-mini (BG2CD) SoC"; 47 model = "Marvell Armada 1500-mini (BG2CD) SoC";
48 compatible = "marvell,berlin2cd", "marvell,berlin"; 48 compatible = "marvell,berlin2cd", "marvell,berlin";
49 49
50 aliases {
51 serial0 = &uart0;
52 serial1 = &uart1;
53 };
54
50 cpus { 55 cpus {
51 #address-cells = <1>; 56 #address-cells = <1>;
52 #size-cells = <0>; 57 #size-cells = <0>;
@@ -56,6 +61,14 @@
56 device_type = "cpu"; 61 device_type = "cpu";
57 next-level-cache = <&l2>; 62 next-level-cache = <&l2>;
58 reg = <0>; 63 reg = <0>;
64
65 clocks = <&chip_clk CLKID_CPU>;
66 clock-latency = <100000>;
67 operating-points = <
68 /* kHz uV */
69 800000 1200000
70 600000 1200000
71 >;
59 }; 72 };
60 }; 73 };
61 74
@@ -368,6 +381,13 @@
368 status = "disabled"; 381 status = "disabled";
369 }; 382 };
370 383
384 pwm: pwm@f20000 {
385 compatible = "marvell,berlin-pwm";
386 reg = <0xf20000 0x40>;
387 clocks = <&chip_clk CLKID_CFG>;
388 #pwm-cells = <3>;
389 };
390
371 apb@fc0000 { 391 apb@fc0000 {
372 compatible = "simple-bus"; 392 compatible = "simple-bus";
373 #address-cells = <1>; 393 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
index 4a749e5b3b44..da28c9704a9d 100644
--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -49,7 +49,8 @@
49 }; 49 };
50 50
51 choosen { 51 choosen {
52 bootargs = "console=ttyS0,115200 earlyprintk"; 52 bootargs = "earlyprintk";
53 stdout-path = "serial0:115200n8";
53 }; 54 };
54 55
55 regulators { 56 regulators {
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 63a48490e2f9..d996e8b8e130 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -43,6 +43,11 @@
43 model = "Marvell Armada 1500 pro (BG2-Q) SoC"; 43 model = "Marvell Armada 1500 pro (BG2-Q) SoC";
44 compatible = "marvell,berlin2q", "marvell,berlin"; 44 compatible = "marvell,berlin2q", "marvell,berlin";
45 45
46 aliases {
47 serial0 = &uart0;
48 serial1 = &uart1;
49 };
50
46 cpus { 51 cpus {
47 #address-cells = <1>; 52 #address-cells = <1>;
48 #size-cells = <0>; 53 #size-cells = <0>;
@@ -53,6 +58,17 @@
53 device_type = "cpu"; 58 device_type = "cpu";
54 next-level-cache = <&l2>; 59 next-level-cache = <&l2>;
55 reg = <0>; 60 reg = <0>;
61
62 clocks = <&chip_clk CLKID_CPU>;
63 clock-latency = <100000>;
64 /* Can be modified by the bootloader */
65 operating-points = <
66 /* kHz uV */
67 1200000 1200000
68 1000000 1200000
69 800000 1200000
70 600000 1200000
71 >;
56 }; 72 };
57 73
58 cpu@1 { 74 cpu@1 {
@@ -477,6 +493,13 @@
477 status = "disabled"; 493 status = "disabled";
478 }; 494 };
479 495
496 pwm: pwm@f20000 {
497 compatible = "marvell,berlin-pwm";
498 reg = <0xf20000 0x40>;
499 clocks = <&chip_clk CLKID_CFG>;
500 #pwm-cells = <3>;
501 };
502
480 apb@fc0000 { 503 apb@fc0000 {
481 compatible = "simple-bus"; 504 compatible = "simple-bus";
482 #address-cells = <1>; 505 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/cx92755.dtsi b/arch/arm/boot/dts/cx92755.dtsi
index df4c6f1f93f9..a5a23c376418 100644
--- a/arch/arm/boot/dts/cx92755.dtsi
+++ b/arch/arm/boot/dts/cx92755.dtsi
@@ -95,6 +95,13 @@
95 timeout-sec = <15>; 95 timeout-sec = <15>;
96 }; 96 };
97 97
98 pinctrl: pinctrl@f0000e20 {
99 compatible = "cnxt,cx92755-pinctrl";
100 reg = <0xf0000e20 0x100>;
101 gpio-controller;
102 #gpio-cells = <2>;
103 };
104
98 uc_regs: syscon@f00003a0 { 105 uc_regs: syscon@f00003a0 {
99 compatible = "cnxt,cx92755-uc", "syscon"; 106 compatible = "cnxt,cx92755-uc", "syscon";
100 reg = <0xf00003a0 0x10>; 107 reg = <0xf00003a0 0x10>;
diff --git a/arch/arm/boot/dts/cx92755_equinox.dts b/arch/arm/boot/dts/cx92755_equinox.dts
index 5da00806c41e..026f556c8c50 100644
--- a/arch/arm/boot/dts/cx92755_equinox.dts
+++ b/arch/arm/boot/dts/cx92755_equinox.dts
@@ -70,8 +70,17 @@
70 70
71&uart0 { 71&uart0 {
72 status = "okay"; 72 status = "okay";
73 pinctrl-0 = <&uart0_default>;
74 pinctrl-names = "default";
73}; 75};
74 76
75&i2c { 77&i2c {
76 status = "okay"; 78 status = "okay";
77}; 79};
80
81&pinctrl {
82 uart0_default: uart0_active {
83 pins = "GP_O0", "GP_O1";
84 function = "client_b";
85 };
86};
diff --git a/arch/arm/boot/dts/dm8148-evm.dts b/arch/arm/boot/dts/dm8148-evm.dts
index 92bacd3c8fab..109fd4711647 100644
--- a/arch/arm/boot/dts/dm8148-evm.dts
+++ b/arch/arm/boot/dts/dm8148-evm.dts
@@ -19,10 +19,10 @@
19 19
20&cpsw_emac0 { 20&cpsw_emac0 {
21 phy_id = <&davinci_mdio>, <0>; 21 phy_id = <&davinci_mdio>, <0>;
22 phy-mode = "mii"; 22 phy-mode = "rgmii";
23}; 23};
24 24
25&cpsw_emac1 { 25&cpsw_emac1 {
26 phy_id = <&davinci_mdio>, <1>; 26 phy_id = <&davinci_mdio>, <1>;
27 phy-mode = "mii"; 27 phy-mode = "rgmii";
28}; 28};
diff --git a/arch/arm/boot/dts/dm8148-t410.dts b/arch/arm/boot/dts/dm8148-t410.dts
index 8c4bbc7573df..79838dd8dee7 100644
--- a/arch/arm/boot/dts/dm8148-t410.dts
+++ b/arch/arm/boot/dts/dm8148-t410.dts
@@ -8,7 +8,7 @@
8#include "dm814x.dtsi" 8#include "dm814x.dtsi"
9 9
10/ { 10/ {
11 model = "DM8148 EVM"; 11 model = "HP t410 Smart Zero Client";
12 compatible = "hp,t410", "ti,dm8148"; 12 compatible = "hp,t410", "ti,dm8148";
13 13
14 memory { 14 memory {
@@ -19,10 +19,10 @@
19 19
20&cpsw_emac0 { 20&cpsw_emac0 {
21 phy_id = <&davinci_mdio>, <0>; 21 phy_id = <&davinci_mdio>, <0>;
22 phy-mode = "mii"; 22 phy-mode = "rgmii";
23}; 23};
24 24
25&cpsw_emac1 { 25&cpsw_emac1 {
26 phy_id = <&davinci_mdio>, <1>; 26 phy_id = <&davinci_mdio>, <1>;
27 phy-mode = "mii"; 27 phy-mode = "rgmii";
28}; 28};
diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi
index 972c9c9e885b..7988b42e5764 100644
--- a/arch/arm/boot/dts/dm814x.dtsi
+++ b/arch/arm/boot/dts/dm814x.dtsi
@@ -181,9 +181,9 @@
181 ti,hwmods = "timer3"; 181 ti,hwmods = "timer3";
182 }; 182 };
183 183
184 control: control@160000 { 184 control: control@140000 {
185 compatible = "ti,dm814-scm", "simple-bus"; 185 compatible = "ti,dm814-scm", "simple-bus";
186 reg = <0x160000 0x16d000>; 186 reg = <0x140000 0x16d000>;
187 #address-cells = <1>; 187 #address-cells = <1>;
188 #size-cells = <1>; 188 #size-cells = <1>;
189 ranges = <0 0x160000 0x16d000>; 189 ranges = <0 0x160000 0x16d000>;
@@ -321,9 +321,9 @@
321 mac-address = [ 00 00 00 00 00 00 ]; 321 mac-address = [ 00 00 00 00 00 00 ];
322 }; 322 };
323 323
324 phy_sel: cpsw-phy-sel@0x48160650 { 324 phy_sel: cpsw-phy-sel@48140650 {
325 compatible = "ti,am3352-cpsw-phy-sel"; 325 compatible = "ti,am3352-cpsw-phy-sel";
326 reg= <0x48160650 0x4>; 326 reg= <0x48140650 0x4>;
327 reg-names = "gmii-sel"; 327 reg-names = "gmii-sel";
328 }; 328 };
329 }; 329 };
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 179121630ad7..cd58c2e62757 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -263,12 +263,13 @@
263 }; 263 };
264 264
265 crypto: crypto-engine@30000 { 265 crypto: crypto-engine@30000 {
266 compatible = "marvell,orion-crypto"; 266 compatible = "marvell,dove-crypto";
267 reg = <0x30000 0x10000>, 267 reg = <0x30000 0x10000>;
268 <0xffffe000 0x800>; 268 reg-names = "regs";
269 reg-names = "regs", "sram";
270 interrupts = <31>; 269 interrupts = <31>;
271 clocks = <&gate_clk 15>; 270 clocks = <&gate_clk 15>;
271 marvell,crypto-srams = <&crypto_sram>;
272 marvell,crypto-sram-size = <0x800>;
272 status = "okay"; 273 status = "okay";
273 }; 274 };
274 275
@@ -767,6 +768,14 @@
767 interrupts = <47>; 768 interrupts = <47>;
768 status = "disabled"; 769 status = "disabled";
769 }; 770 };
771
772 crypto_sram: sa-sram@ffffe000 {
773 compatible = "mmio-sram";
774 reg = <0xffffe000 0x800>;
775 clocks = <&gate_clk 15>;
776 #address-cells = <1>;
777 #size-cells = <1>;
778 };
770 }; 779 };
771 }; 780 };
772}; 781};
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index a6c82e5b64fe..864f60020124 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -9,6 +9,8 @@
9 9
10#include "dra74x.dtsi" 10#include "dra74x.dtsi"
11#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/clk/ti-dra7-atl.h>
13#include <dt-bindings/input/input.h>
12 14
13/ { 15/ {
14 model = "TI DRA742"; 16 model = "TI DRA742";
@@ -28,13 +30,22 @@
28 gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>; 30 gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
29 }; 31 };
30 32
31 mmc2_3v3: fixedregulator-mmc2 { 33 evm_3v3_sw: fixedregulator-evm_3v3_sw {
32 compatible = "regulator-fixed"; 34 compatible = "regulator-fixed";
33 regulator-name = "mmc2_3v3"; 35 regulator-name = "evm_3v3_sw";
34 regulator-min-microvolt = <3300000>; 36 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>; 37 regulator-max-microvolt = <3300000>;
36 }; 38 };
37 39
40 aic_dvdd: fixedregulator-aic_dvdd {
41 /* TPS77018DBVT */
42 compatible = "regulator-fixed";
43 regulator-name = "aic_dvdd";
44 vin-supply = <&evm_3v3_sw>;
45 regulator-min-microvolt = <1800000>;
46 regulator-max-microvolt = <1800000>;
47 };
48
38 extcon_usb1: extcon_usb1 { 49 extcon_usb1: extcon_usb1 {
39 compatible = "linux,extcon-usb-gpio"; 50 compatible = "linux,extcon-usb-gpio";
40 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; 51 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
@@ -55,6 +66,86 @@
55 enable-active-high; 66 enable-active-high;
56 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; 67 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
57 }; 68 };
69
70 sound0: sound@0 {
71 compatible = "simple-audio-card";
72 simple-audio-card,name = "DRA7xx-EVM";
73 simple-audio-card,widgets =
74 "Headphone", "Headphone Jack",
75 "Line", "Line Out",
76 "Microphone", "Mic Jack",
77 "Line", "Line In";
78 simple-audio-card,routing =
79 "Headphone Jack", "HPLOUT",
80 "Headphone Jack", "HPROUT",
81 "Line Out", "LLOUT",
82 "Line Out", "RLOUT",
83 "MIC3L", "Mic Jack",
84 "MIC3R", "Mic Jack",
85 "Mic Jack", "Mic Bias",
86 "LINE1L", "Line In",
87 "LINE1R", "Line In";
88 simple-audio-card,format = "dsp_b";
89 simple-audio-card,bitclock-master = <&sound0_master>;
90 simple-audio-card,frame-master = <&sound0_master>;
91 simple-audio-card,bitclock-inversion;
92
93 sound0_master: simple-audio-card,cpu {
94 sound-dai = <&mcasp3>;
95 system-clock-frequency = <5644800>;
96 };
97
98 simple-audio-card,codec {
99 sound-dai = <&tlv320aic3106>;
100 clocks = <&atl_clkin2_ck>;
101 };
102 };
103
104 leds {
105 compatible = "gpio-leds";
106 led@0 {
107 label = "dra7:usr1";
108 gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>;
109 default-state = "off";
110 };
111
112 led@1 {
113 label = "dra7:usr2";
114 gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>;
115 default-state = "off";
116 };
117
118 led@2 {
119 label = "dra7:usr3";
120 gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>;
121 default-state = "off";
122 };
123
124 led@3 {
125 label = "dra7:usr4";
126 gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>;
127 default-state = "off";
128 };
129 };
130
131 gpio_keys {
132 compatible = "gpio-keys";
133 #address-cells = <1>;
134 #size-cells = <0>;
135 autorepeat;
136
137 USER1 {
138 label = "btnUser1";
139 linux,code = <BTN_0>;
140 gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>;
141 };
142
143 USER2 {
144 label = "btnUser2";
145 linux,code = <BTN_1>;
146 gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>;
147 };
148 };
58}; 149};
59 150
60&dra7_pmx_core { 151&dra7_pmx_core {
@@ -283,6 +374,31 @@
283 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */ 374 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
284 >; 375 >;
285 }; 376 };
377
378 atl_pins: pinmux_atl_pins {
379 pinctrl-single,pins = <
380 0x298 (PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */
381 0x29c (PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */
382 >;
383 };
384
385 mcasp3_pins: pinmux_mcasp3_pins {
386 pinctrl-single,pins = <
387 0x324 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
388 0x328 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
389 0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
390 0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */
391 >;
392 };
393
394 mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
395 pinctrl-single,pins = <
396 0x324 (MUX_MODE15)
397 0x328 (MUX_MODE15)
398 0x32c (MUX_MODE15)
399 0x330 (MUX_MODE15)
400 >;
401 };
286}; 402};
287 403
288&i2c1 { 404&i2c1 {
@@ -410,6 +526,17 @@
410 }; 526 };
411 }; 527 };
412 528
529 pcf_lcd: gpio@20 {
530 compatible = "nxp,pcf8575";
531 reg = <0x20>;
532 gpio-controller;
533 #gpio-cells = <2>;
534 interrupt-parent = <&gpio6>;
535 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
536 interrupt-controller;
537 #interrupt-cells = <2>;
538 };
539
413 pcf_gpio_21: gpio@21 { 540 pcf_gpio_21: gpio@21 {
414 compatible = "ti,pcf8575"; 541 compatible = "ti,pcf8575";
415 reg = <0x21>; 542 reg = <0x21>;
@@ -422,6 +549,20 @@
422 #interrupt-cells = <2>; 549 #interrupt-cells = <2>;
423 }; 550 };
424 551
552 tlv320aic3106: tlv320aic3106@19 {
553 #sound-dai-cells = <0>;
554 compatible = "ti,tlv320aic3106";
555 reg = <0x19>;
556 adc-settle-ms = <40>;
557 ai3x-micbias-vg = <1>; /* 2.0V */
558 status = "okay";
559
560 /* Regulators */
561 AVDD-supply = <&evm_3v3_sw>;
562 IOVDD-supply = <&evm_3v3_sw>;
563 DRVDD-supply = <&evm_3v3_sw>;
564 DVDD-supply = <&aic_dvdd>;
565 };
425}; 566};
426 567
427&i2c2 { 568&i2c2 {
@@ -429,6 +570,20 @@
429 pinctrl-names = "default"; 570 pinctrl-names = "default";
430 pinctrl-0 = <&i2c2_pins>; 571 pinctrl-0 = <&i2c2_pins>;
431 clock-frequency = <400000>; 572 clock-frequency = <400000>;
573
574 pcf_hdmi: gpio@26 {
575 compatible = "nxp,pcf8575";
576 reg = <0x26>;
577 gpio-controller;
578 #gpio-cells = <2>;
579 p1 {
580 /* vin6_sel_s0: high: VIN6, low: audio */
581 gpio-hog;
582 gpios = <1 GPIO_ACTIVE_HIGH>;
583 output-low;
584 line-name = "vin6_sel_s0";
585 };
586 };
432}; 587};
433 588
434&i2c3 { 589&i2c3 {
@@ -479,12 +634,12 @@
479 * SDCD signal is not being used here - using the fact that GPIO mode 634 * SDCD signal is not being used here - using the fact that GPIO mode
480 * is always hardwired. 635 * is always hardwired.
481 */ 636 */
482 cd-gpios = <&gpio6 27 0>; 637 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
483}; 638};
484 639
485&mmc2 { 640&mmc2 {
486 status = "okay"; 641 status = "okay";
487 vmmc-supply = <&mmc2_3v3>; 642 vmmc-supply = <&evm_3v3_sw>;
488 bus-width = <8>; 643 bus-width = <8>;
489}; 644};
490 645
@@ -707,3 +862,62 @@
707 pinctrl-1 = <&dcan1_pins_sleep>; 862 pinctrl-1 = <&dcan1_pins_sleep>;
708 pinctrl-2 = <&dcan1_pins_default>; 863 pinctrl-2 = <&dcan1_pins_default>;
709}; 864};
865
866&atl {
867 pinctrl-names = "default";
868 pinctrl-0 = <&atl_pins>;
869
870 assigned-clocks = <&abe_dpll_sys_clk_mux>,
871 <&atl_gfclk_mux>,
872 <&dpll_abe_ck>,
873 <&dpll_abe_m2x2_ck>,
874 <&atl_clkin2_ck>;
875 assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
876 assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
877
878 status = "okay";
879
880 atl2 {
881 bws = <DRA7_ATL_WS_MCASP2_FSX>;
882 aws = <DRA7_ATL_WS_MCASP3_FSX>;
883 };
884};
885
886&mcasp3 {
887 #sound-dai-cells = <0>;
888 pinctrl-names = "default", "sleep";
889 pinctrl-0 = <&mcasp3_pins>;
890 pinctrl-1 = <&mcasp3_sleep_pins>;
891
892 assigned-clocks = <&mcasp3_ahclkx_mux>;
893 assigned-clock-parents = <&atl_clkin2_ck>;
894
895 status = "okay";
896
897 op-mode = <0>; /* MCASP_IIS_MODE */
898 tdm-slots = <2>;
899 /* 4 serializer */
900 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
901 1 2 0 0
902 >;
903};
904
905&mailbox5 {
906 status = "okay";
907 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
908 status = "okay";
909 };
910 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
911 status = "okay";
912 };
913};
914
915&mailbox6 {
916 status = "okay";
917 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
918 status = "okay";
919 };
920 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
921 status = "okay";
922 };
923};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5d65db9ebc2b..a635f363d831 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -120,9 +120,10 @@
120 reg = <0x0 0x1400>; 120 reg = <0x0 0x1400>;
121 #address-cells = <1>; 121 #address-cells = <1>;
122 #size-cells = <1>; 122 #size-cells = <1>;
123 ranges = <0 0x0 0x1400>;
123 124
124 pbias_regulator: pbias_regulator { 125 pbias_regulator: pbias_regulator {
125 compatible = "ti,pbias-omap"; 126 compatible = "ti,pbias-dra7", "ti,pbias-omap";
126 reg = <0xe00 0x4>; 127 reg = <0xe00 0x4>;
127 syscon = <&scm_conf>; 128 syscon = <&scm_conf>;
128 pbias_mmc_reg: pbias_mmc_omap5 { 129 pbias_mmc_reg: pbias_mmc_omap5 {
@@ -291,6 +292,11 @@
291 #thermal-sensor-cells = <1>; 292 #thermal-sensor-cells = <1>;
292 }; 293 };
293 294
295 dsp1_system: dsp_system@40d00000 {
296 compatible = "syscon";
297 reg = <0x40d00000 0x100>;
298 };
299
294 sdma: dma-controller@4a056000 { 300 sdma: dma-controller@4a056000 {
295 compatible = "ti,omap4430-sdma"; 301 compatible = "ti,omap4430-sdma";
296 reg = <0x4a056000 0x1000>; 302 reg = <0x4a056000 0x1000>;
@@ -910,6 +916,46 @@
910 status = "disabled"; 916 status = "disabled";
911 }; 917 };
912 918
919 mmu0_dsp1: mmu@40d01000 {
920 compatible = "ti,dra7-dsp-iommu";
921 reg = <0x40d01000 0x100>;
922 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
923 ti,hwmods = "mmu0_dsp1";
924 #iommu-cells = <0>;
925 ti,syscon-mmuconfig = <&dsp1_system 0x0>;
926 status = "disabled";
927 };
928
929 mmu1_dsp1: mmu@40d02000 {
930 compatible = "ti,dra7-dsp-iommu";
931 reg = <0x40d02000 0x100>;
932 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
933 ti,hwmods = "mmu1_dsp1";
934 #iommu-cells = <0>;
935 ti,syscon-mmuconfig = <&dsp1_system 0x1>;
936 status = "disabled";
937 };
938
939 mmu_ipu1: mmu@58882000 {
940 compatible = "ti,dra7-iommu";
941 reg = <0x58882000 0x100>;
942 interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
943 ti,hwmods = "mmu_ipu1";
944 #iommu-cells = <0>;
945 ti,iommu-bus-err-back;
946 status = "disabled";
947 };
948
949 mmu_ipu2: mmu@55082000 {
950 compatible = "ti,dra7-iommu";
951 reg = <0x55082000 0x100>;
952 interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;
953 ti,hwmods = "mmu_ipu2";
954 #iommu-cells = <0>;
955 ti,iommu-bus-err-back;
956 status = "disabled";
957 };
958
913 abb_mpu: regulator-abb-mpu { 959 abb_mpu: regulator-abb-mpu {
914 compatible = "ti,abb-v3"; 960 compatible = "ti,abb-v3";
915 regulator-name = "abb_mpu"; 961 regulator-name = "abb_mpu";
@@ -1403,6 +1449,21 @@
1403 status = "disabled"; 1449 status = "disabled";
1404 }; 1450 };
1405 1451
1452 mcasp3: mcasp@48468000 {
1453 compatible = "ti,dra7-mcasp-audio";
1454 ti,hwmods = "mcasp3";
1455 reg = <0x48468000 0x2000>;
1456 reg-names = "mpu";
1457 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
1458 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1459 interrupt-names = "tx", "rx";
1460 dmas = <&sdma_xbar 133>, <&sdma_xbar 132>;
1461 dma-names = "tx", "rx";
1462 clocks = <&mcasp3_ahclkx_mux>;
1463 clock-names = "fck";
1464 status = "disabled";
1465 };
1466
1406 crossbar_mpu: crossbar@4a002a48 { 1467 crossbar_mpu: crossbar@4a002a48 {
1407 compatible = "ti,irq-crossbar"; 1468 compatible = "ti,irq-crossbar";
1408 reg = <0x4a002a48 0x130>; 1469 reg = <0x4a002a48 0x130>;
@@ -1417,7 +1478,7 @@
1417 ti,irqs-safe-map = <0>; 1478 ti,irqs-safe-map = <0>;
1418 }; 1479 };
1419 1480
1420 mac: ethernet@4a100000 { 1481 mac: ethernet@48484000 {
1421 compatible = "ti,dra7-cpsw","ti,cpsw"; 1482 compatible = "ti,dra7-cpsw","ti,cpsw";
1422 ti,hwmods = "gmac"; 1483 ti,hwmods = "gmac";
1423 clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>; 1484 clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>;
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 6f6bd98c98df..d6104d5f0c01 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -9,6 +9,7 @@
9 9
10#include "dra72x.dtsi" 10#include "dra72x.dtsi"
11#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/clk/ti-dra7-atl.h>
12 13
13/ { 14/ {
14 model = "TI DRA722"; 15 model = "TI DRA722";
@@ -30,6 +31,15 @@
30 regulator-max-microvolt = <3300000>; 31 regulator-max-microvolt = <3300000>;
31 }; 32 };
32 33
34 aic_dvdd: fixedregulator-aic_dvdd {
35 /* TPS77018DBVT */
36 compatible = "regulator-fixed";
37 regulator-name = "aic_dvdd";
38 vin-supply = <&evm_3v3>;
39 regulator-min-microvolt = <1800000>;
40 regulator-max-microvolt = <1800000>;
41 };
42
33 evm_3v3_sd: fixedregulator-sd { 43 evm_3v3_sd: fixedregulator-sd {
34 compatible = "regulator-fixed"; 44 compatible = "regulator-fixed";
35 regulator-name = "evm_3v3_sd"; 45 regulator-name = "evm_3v3_sd";
@@ -93,6 +103,40 @@
93 }; 103 };
94 }; 104 };
95 }; 105 };
106
107 sound0: sound@0 {
108 compatible = "simple-audio-card";
109 simple-audio-card,name = "DRA7xx-EVM";
110 simple-audio-card,widgets =
111 "Headphone", "Headphone Jack",
112 "Line", "Line Out",
113 "Microphone", "Mic Jack",
114 "Line", "Line In";
115 simple-audio-card,routing =
116 "Headphone Jack", "HPLOUT",
117 "Headphone Jack", "HPROUT",
118 "Line Out", "LLOUT",
119 "Line Out", "RLOUT",
120 "MIC3L", "Mic Jack",
121 "MIC3R", "Mic Jack",
122 "Mic Jack", "Mic Bias",
123 "LINE1L", "Line In",
124 "LINE1R", "Line In";
125 simple-audio-card,format = "dsp_b";
126 simple-audio-card,bitclock-master = <&sound0_master>;
127 simple-audio-card,frame-master = <&sound0_master>;
128 simple-audio-card,bitclock-inversion;
129
130 sound0_master: simple-audio-card,cpu {
131 sound-dai = <&mcasp3>;
132 system-clock-frequency = <5644800>;
133 };
134
135 simple-audio-card,codec {
136 sound-dai = <&tlv320aic3106>;
137 clocks = <&atl_clkin2_ck>;
138 };
139 };
96}; 140};
97 141
98&dra7_pmx_core { 142&dra7_pmx_core {
@@ -110,6 +154,13 @@
110 >; 154 >;
111 }; 155 };
112 156
157 i2c5_pins: pinmux_i2c5_pins {
158 pinctrl-single,pins = <
159 0x2b4 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
160 0x2b8 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
161 >;
162 };
163
113 nand_default: nand_default { 164 nand_default: nand_default {
114 pinctrl-single,pins = < 165 pinctrl-single,pins = <
115 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */ 166 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
@@ -220,6 +271,31 @@
220 0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */ 271 0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
221 >; 272 >;
222 }; 273 };
274
275 atl_pins: pinmux_atl_pins {
276 pinctrl-single,pins = <
277 0x298 (PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */
278 0x29c (PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */
279 >;
280 };
281
282 mcasp3_pins: pinmux_mcasp3_pins {
283 pinctrl-single,pins = <
284 0x324 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
285 0x328 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
286 0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
287 0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */
288 >;
289 };
290
291 mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
292 pinctrl-single,pins = <
293 0x324 (PIN_INPUT_PULLDOWN | MUX_MODE15)
294 0x328 (PIN_INPUT_PULLDOWN | MUX_MODE15)
295 0x32c (PIN_INPUT_PULLDOWN | MUX_MODE15)
296 0x330 (PIN_INPUT_PULLDOWN | MUX_MODE15)
297 >;
298 };
223}; 299};
224 300
225&i2c1 { 301&i2c1 {
@@ -353,12 +429,21 @@
353 interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 429 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
354 interrupt-controller; 430 interrupt-controller;
355 #interrupt-cells = <2>; 431 #interrupt-cells = <2>;
432 };
356 433
357 cpsw_sel_s0 { 434 tlv320aic3106: tlv320aic3106@19 {
358 gpio-hog; 435 #sound-dai-cells = <0>;
359 gpios = <4 GPIO_ACTIVE_HIGH>; 436 compatible = "ti,tlv320aic3106";
360 output-low; 437 reg = <0x19>;
361 }; 438 adc-settle-ms = <40>;
439 ai3x-micbias-vg = <1>; /* 2.0V */
440 status = "okay";
441
442 /* Regulators */
443 AVDD-supply = <&evm_3v3>;
444 IOVDD-supply = <&evm_3v3>;
445 DRVDD-supply = <&evm_3v3>;
446 DVDD-supply = <&aic_dvdd>;
362 }; 447 };
363}; 448};
364 449
@@ -380,6 +465,14 @@
380 * VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6 465 * VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6
381 */ 466 */
382 lines-initial-states = <0x0f2b>; 467 lines-initial-states = <0x0f2b>;
468
469 p1 {
470 /* vin6_sel_s0: high: VIN6, low: audio */
471 gpio-hog;
472 gpios = <1 GPIO_ACTIVE_HIGH>;
473 output-low;
474 line-name = "vin6_sel_s0";
475 };
383 }; 476 };
384}; 477};
385 478
@@ -514,7 +607,7 @@
514 * SDCD signal is not being used here - using the fact that GPIO mode 607 * SDCD signal is not being used here - using the fact that GPIO mode
515 * is a viable alternative 608 * is a viable alternative
516 */ 609 */
517 cd-gpios = <&gpio6 27 0>; 610 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
518 max-frequency = <192000000>; 611 max-frequency = <192000000>;
519}; 612};
520 613
@@ -590,6 +683,7 @@
590 pinctrl-0 = <&cpsw_default>; 683 pinctrl-0 = <&cpsw_default>;
591 pinctrl-1 = <&cpsw_sleep>; 684 pinctrl-1 = <&cpsw_sleep>;
592 slaves = <1>; 685 slaves = <1>;
686 mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>;
593}; 687};
594 688
595&cpsw_emac0 { 689&cpsw_emac0 {
@@ -695,3 +789,59 @@
695 }; 789 };
696 }; 790 };
697}; 791};
792
793&atl {
794 pinctrl-names = "default";
795 pinctrl-0 = <&atl_pins>;
796
797 assigned-clocks = <&abe_dpll_sys_clk_mux>,
798 <&atl_gfclk_mux>,
799 <&dpll_abe_ck>,
800 <&dpll_abe_m2x2_ck>,
801 <&atl_clkin2_ck>;
802 assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
803 assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
804
805 status = "okay";
806
807 atl2 {
808 bws = <DRA7_ATL_WS_MCASP2_FSX>;
809 aws = <DRA7_ATL_WS_MCASP3_FSX>;
810 };
811};
812
813&mcasp3 {
814 #sound-dai-cells = <0>;
815 pinctrl-names = "default", "sleep";
816 pinctrl-0 = <&mcasp3_pins>;
817 pinctrl-1 = <&mcasp3_sleep_pins>;
818
819 assigned-clocks = <&mcasp3_ahclkx_mux>;
820 assigned-clock-parents = <&atl_clkin2_ck>;
821
822 status = "okay";
823
824 op-mode = <0>; /* MCASP_IIS_MODE */
825 tdm-slots = <2>;
826 /* 4 serializer */
827 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
828 1 2 0 0
829 >;
830};
831
832&mailbox5 {
833 status = "okay";
834 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
835 status = "okay";
836 };
837 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
838 status = "okay";
839 };
840};
841
842&mailbox6 {
843 status = "okay";
844 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
845 status = "okay";
846 };
847};
diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi
index eaca143faa77..70a217050a4c 100644
--- a/arch/arm/boot/dts/dra72x.dtsi
+++ b/arch/arm/boot/dts/dra72x.dtsi
@@ -45,3 +45,24 @@
45 <&dss_video1_clk>; 45 <&dss_video1_clk>;
46 clock-names = "fck", "video1_clk"; 46 clock-names = "fck", "video1_clk";
47}; 47};
48
49&mailbox5 {
50 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
51 ti,mbox-tx = <6 2 2>;
52 ti,mbox-rx = <4 2 2>;
53 status = "disabled";
54 };
55 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
56 ti,mbox-tx = <5 2 2>;
57 ti,mbox-rx = <1 2 2>;
58 status = "disabled";
59 };
60};
61
62&mailbox6 {
63 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
64 ti,mbox-tx = <6 2 2>;
65 ti,mbox-rx = <4 2 2>;
66 status = "disabled";
67 };
68};
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index feea98e0a4b5..8bcc47db1cd1 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -52,6 +52,11 @@
52 }; 52 };
53 53
54 ocp { 54 ocp {
55 dsp2_system: dsp_system@41500000 {
56 compatible = "syscon";
57 reg = <0x41500000 0x100>;
58 };
59
55 omap_dwc3_4: omap_dwc3_4@48940000 { 60 omap_dwc3_4: omap_dwc3_4@48940000 {
56 compatible = "ti,dwc3"; 61 compatible = "ti,dwc3";
57 ti,hwmods = "usb_otg_ss4"; 62 ti,hwmods = "usb_otg_ss4";
@@ -76,6 +81,26 @@
76 dr_mode = "otg"; 81 dr_mode = "otg";
77 }; 82 };
78 }; 83 };
84
85 mmu0_dsp2: mmu@41501000 {
86 compatible = "ti,dra7-dsp-iommu";
87 reg = <0x41501000 0x100>;
88 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
89 ti,hwmods = "mmu0_dsp2";
90 #iommu-cells = <0>;
91 ti,syscon-mmuconfig = <&dsp2_system 0x0>;
92 status = "disabled";
93 };
94
95 mmu1_dsp2: mmu@41502000 {
96 compatible = "ti,dra7-dsp-iommu";
97 reg = <0x41502000 0x100>;
98 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
99 ti,hwmods = "mmu1_dsp2";
100 #iommu-cells = <0>;
101 ti,syscon-mmuconfig = <&dsp2_system 0x1>;
102 status = "disabled";
103 };
79 }; 104 };
80}; 105};
81 106
@@ -93,3 +118,29 @@
93 <&dss_video2_clk>; 118 <&dss_video2_clk>;
94 clock-names = "fck", "video1_clk", "video2_clk"; 119 clock-names = "fck", "video1_clk", "video2_clk";
95}; 120};
121
122&mailbox5 {
123 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
124 ti,mbox-tx = <6 2 2>;
125 ti,mbox-rx = <4 2 2>;
126 status = "disabled";
127 };
128 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
129 ti,mbox-tx = <5 2 2>;
130 ti,mbox-rx = <1 2 2>;
131 status = "disabled";
132 };
133};
134
135&mailbox6 {
136 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
137 ti,mbox-tx = <6 2 2>;
138 ti,mbox-rx = <4 2 2>;
139 status = "disabled";
140 };
141 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
142 ti,mbox-tx = <5 2 2>;
143 ti,mbox-rx = <1 2 2>;
144 status = "disabled";
145 };
146};
diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts
index 540a0adf2be6..443a35085846 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -52,13 +52,13 @@
52 regulator-name = "V_EMMC_2.8V-fixed"; 52 regulator-name = "V_EMMC_2.8V-fixed";
53 regulator-min-microvolt = <2800000>; 53 regulator-min-microvolt = <2800000>;
54 regulator-max-microvolt = <2800000>; 54 regulator-max-microvolt = <2800000>;
55 gpio = <&gpk0 2 0>; 55 gpio = <&gpk0 2 GPIO_ACTIVE_HIGH>;
56 enable-active-high; 56 enable-active-high;
57 }; 57 };
58 58
59 i2c_max77836: i2c-gpio-0 { 59 i2c_max77836: i2c-gpio-0 {
60 compatible = "i2c-gpio"; 60 compatible = "i2c-gpio";
61 gpios = <&gpd0 2 0>, <&gpd0 3 0>; 61 gpios = <&gpd0 2 GPIO_ACTIVE_HIGH>, <&gpd0 3 GPIO_ACTIVE_HIGH>;
62 #address-cells = <1>; 62 #address-cells = <1>;
63 #size-cells = <0>; 63 #size-cells = <0>;
64 64
@@ -161,6 +161,7 @@
161}; 161};
162 162
163&exynos_usbphy { 163&exynos_usbphy {
164 vbus-supply = <&safeout_reg>;
164 status = "okay"; 165 status = "okay";
165}; 166};
166 167
@@ -266,14 +267,14 @@
266 regulator-name = "V_EMMC_1.8V"; 267 regulator-name = "V_EMMC_1.8V";
267 regulator-min-microvolt = <1800000>; 268 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <1800000>; 269 regulator-max-microvolt = <1800000>;
269 samsung,ext-control-gpios = <&gpk0 2 0>; 270 samsung,ext-control-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
270 }; 271 };
271 272
272 ldo12_reg: LDO12 { 273 ldo12_reg: LDO12 {
273 regulator-name = "V_EMMC_2.8V"; 274 regulator-name = "V_EMMC_2.8V";
274 regulator-min-microvolt = <2800000>; 275 regulator-min-microvolt = <2800000>;
275 regulator-max-microvolt = <2800000>; 276 regulator-max-microvolt = <2800000>;
276 samsung,ext-control-gpios = <&gpk0 2 0>; 277 samsung,ext-control-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
277 }; 278 };
278 279
279 ldo13_reg: LDO13 { 280 ldo13_reg: LDO13 {
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts
index 41a5fafb9aa9..3e64d5dcdd60 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -49,7 +49,7 @@
49 49
50 i2c_max77836: i2c-gpio-0 { 50 i2c_max77836: i2c-gpio-0 {
51 compatible = "i2c-gpio"; 51 compatible = "i2c-gpio";
52 gpios = <&gpd0 2 0>, <&gpd0 3 0>; 52 gpios = <&gpd0 2 GPIO_ACTIVE_HIGH>, <&gpd0 3 GPIO_ACTIVE_HIGH>;
53 #address-cells = <1>; 53 #address-cells = <1>;
54 #size-cells = <0>; 54 #size-cells = <0>;
55 55
@@ -153,6 +153,7 @@
153 153
154&exynos_usbphy { 154&exynos_usbphy {
155 status = "okay"; 155 status = "okay";
156 vbus-supply = <&safeout_reg>;
156}; 157};
157 158
158&hsotg { 159&hsotg {
@@ -188,8 +189,8 @@
188 reg = <0>; 189 reg = <0>;
189 vdd3-supply = <&ldo16_reg>; 190 vdd3-supply = <&ldo16_reg>;
190 vci-supply = <&ldo20_reg>; 191 vci-supply = <&ldo20_reg>;
191 reset-gpios = <&gpe0 1 0>; 192 reset-gpios = <&gpe0 1 GPIO_ACTIVE_HIGH>;
192 te-gpios = <&gpx0 6 0>; 193 te-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
193 power-on-delay= <30>; 194 power-on-delay= <30>;
194 power-off-delay= <120>; 195 power-off-delay= <120>;
195 reset-delay = <5>; 196 reset-delay = <5>;
@@ -368,14 +369,14 @@
368 regulator-name = "V_EMMC_1.8V"; 369 regulator-name = "V_EMMC_1.8V";
369 regulator-min-microvolt = <1800000>; 370 regulator-min-microvolt = <1800000>;
370 regulator-max-microvolt = <1800000>; 371 regulator-max-microvolt = <1800000>;
371 samsung,ext-control-gpios = <&gpk0 2 0>; 372 samsung,ext-control-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
372 }; 373 };
373 374
374 ldo12_reg: LDO12 { 375 ldo12_reg: LDO12 {
375 regulator-name = "V_EMMC_2.8V"; 376 regulator-name = "V_EMMC_2.8V";
376 regulator-min-microvolt = <2800000>; 377 regulator-min-microvolt = <2800000>;
377 regulator-max-microvolt = <2800000>; 378 regulator-max-microvolt = <2800000>;
378 samsung,ext-control-gpios = <&gpk0 2 0>; 379 samsung,ext-control-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
379 }; 380 };
380 381
381 ldo13_reg: LDO13 { 382 ldo13_reg: LDO13 {
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 033def482fc3..2f30d632f1cc 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -333,7 +333,7 @@
333 }; 333 };
334 334
335 mshc_0: mshc@12510000 { 335 mshc_0: mshc@12510000 {
336 compatible = "samsung,exynos5250-dw-mshc"; 336 compatible = "samsung,exynos5420-dw-mshc";
337 reg = <0x12510000 0x1000>; 337 reg = <0x12510000 0x1000>;
338 interrupts = <0 142 0>; 338 interrupts = <0 142 0>;
339 clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>; 339 clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
@@ -345,7 +345,7 @@
345 }; 345 };
346 346
347 mshc_1: mshc@12520000 { 347 mshc_1: mshc@12520000 {
348 compatible = "samsung,exynos5250-dw-mshc"; 348 compatible = "samsung,exynos5420-dw-mshc";
349 reg = <0x12520000 0x1000>; 349 reg = <0x12520000 0x1000>;
350 interrupts = <0 143 0>; 350 interrupts = <0 143 0>;
351 clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>; 351 clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 98c0a368b777..3184e10f260a 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -431,6 +431,8 @@
431 interrupts = <0 52 0>; 431 interrupts = <0 52 0>;
432 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; 432 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
433 clock-names = "uart", "clk_uart_baud0"; 433 clock-names = "uart", "clk_uart_baud0";
434 dmas = <&pdma0 15>, <&pdma0 16>;
435 dma-names = "rx", "tx";
434 status = "disabled"; 436 status = "disabled";
435 }; 437 };
436 438
@@ -440,6 +442,8 @@
440 interrupts = <0 53 0>; 442 interrupts = <0 53 0>;
441 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; 443 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
442 clock-names = "uart", "clk_uart_baud0"; 444 clock-names = "uart", "clk_uart_baud0";
445 dmas = <&pdma1 15>, <&pdma1 16>;
446 dma-names = "rx", "tx";
443 status = "disabled"; 447 status = "disabled";
444 }; 448 };
445 449
@@ -449,6 +453,8 @@
449 interrupts = <0 54 0>; 453 interrupts = <0 54 0>;
450 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; 454 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
451 clock-names = "uart", "clk_uart_baud0"; 455 clock-names = "uart", "clk_uart_baud0";
456 dmas = <&pdma0 17>, <&pdma0 18>;
457 dma-names = "rx", "tx";
452 status = "disabled"; 458 status = "disabled";
453 }; 459 };
454 460
@@ -458,6 +464,8 @@
458 interrupts = <0 55 0>; 464 interrupts = <0 55 0>;
459 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; 465 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
460 clock-names = "uart", "clk_uart_baud0"; 466 clock-names = "uart", "clk_uart_baud0";
467 dmas = <&pdma1 17>, <&pdma1 18>;
468 dma-names = "rx", "tx";
461 status = "disabled"; 469 status = "disabled";
462 }; 470 };
463 471
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index e050d85cdacd..b8f866991bdd 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -16,6 +16,7 @@
16 16
17/dts-v1/; 17/dts-v1/;
18#include "exynos4210.dtsi" 18#include "exynos4210.dtsi"
19#include <dt-bindings/gpio/gpio.h>
19#include <dt-bindings/input/input.h> 20#include <dt-bindings/input/input.h>
20 21
21/ { 22/ {
@@ -45,7 +46,7 @@
45 regulator-name = "VMEM_VDD_2.8V"; 46 regulator-name = "VMEM_VDD_2.8V";
46 regulator-min-microvolt = <2800000>; 47 regulator-min-microvolt = <2800000>;
47 regulator-max-microvolt = <2800000>; 48 regulator-max-microvolt = <2800000>;
48 gpio = <&gpx1 1 0>; 49 gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
49 enable-active-high; 50 enable-active-high;
50 }; 51 };
51 }; 52 };
@@ -57,35 +58,35 @@
57 58
58 up { 59 up {
59 label = "Up"; 60 label = "Up";
60 gpios = <&gpx2 0 1>; 61 gpios = <&gpx2 0 GPIO_ACTIVE_LOW>;
61 linux,code = <KEY_UP>; 62 linux,code = <KEY_UP>;
62 gpio-key,wakeup; 63 gpio-key,wakeup;
63 }; 64 };
64 65
65 down { 66 down {
66 label = "Down"; 67 label = "Down";
67 gpios = <&gpx2 1 1>; 68 gpios = <&gpx2 1 GPIO_ACTIVE_LOW>;
68 linux,code = <KEY_DOWN>; 69 linux,code = <KEY_DOWN>;
69 gpio-key,wakeup; 70 gpio-key,wakeup;
70 }; 71 };
71 72
72 back { 73 back {
73 label = "Back"; 74 label = "Back";
74 gpios = <&gpx1 7 1>; 75 gpios = <&gpx1 7 GPIO_ACTIVE_LOW>;
75 linux,code = <KEY_BACK>; 76 linux,code = <KEY_BACK>;
76 gpio-key,wakeup; 77 gpio-key,wakeup;
77 }; 78 };
78 79
79 home { 80 home {
80 label = "Home"; 81 label = "Home";
81 gpios = <&gpx1 6 1>; 82 gpios = <&gpx1 6 GPIO_ACTIVE_LOW>;
82 linux,code = <KEY_HOME>; 83 linux,code = <KEY_HOME>;
83 gpio-key,wakeup; 84 gpio-key,wakeup;
84 }; 85 };
85 86
86 menu { 87 menu {
87 label = "Menu"; 88 label = "Menu";
88 gpios = <&gpx1 5 1>; 89 gpios = <&gpx1 5 GPIO_ACTIVE_LOW>;
89 linux,code = <KEY_MENU>; 90 linux,code = <KEY_MENU>;
90 gpio-key,wakeup; 91 gpio-key,wakeup;
91 }; 92 };
@@ -94,7 +95,7 @@
94 leds { 95 leds {
95 compatible = "gpio-leds"; 96 compatible = "gpio-leds";
96 status { 97 status {
97 gpios = <&gpx1 3 1>; 98 gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
98 linux,default-trigger = "heartbeat"; 99 linux,default-trigger = "heartbeat";
99 }; 100 };
100 }; 101 };
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 043b03caff8f..bc1448ba95d3 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -16,6 +16,7 @@
16 16
17/dts-v1/; 17/dts-v1/;
18#include "exynos4210.dtsi" 18#include "exynos4210.dtsi"
19#include <dt-bindings/gpio/gpio.h>
19 20
20/ { 21/ {
21 model = "Samsung smdkv310 evaluation board based on Exynos4210"; 22 model = "Samsung smdkv310 evaluation board based on Exynos4210";
@@ -182,7 +183,7 @@
182}; 183};
183 184
184&spi_2 { 185&spi_2 {
185 cs-gpios = <&gpc1 2 0>; 186 cs-gpios = <&gpc1 2 GPIO_ACTIVE_HIGH>;
186 status = "okay"; 187 status = "okay";
187 188
188 w25x80@0 { 189 w25x80@0 {
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index ba34886f8b65..a50be640f1b0 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -14,6 +14,7 @@
14 14
15/dts-v1/; 15/dts-v1/;
16#include "exynos4210.dtsi" 16#include "exynos4210.dtsi"
17#include <dt-bindings/gpio/gpio.h>
17 18
18/ { 19/ {
19 model = "Samsung Trats based on Exynos4210"; 20 model = "Samsung Trats based on Exynos4210";
@@ -39,7 +40,7 @@
39 regulator-name = "VMEM_VDD_2.8V"; 40 regulator-name = "VMEM_VDD_2.8V";
40 regulator-min-microvolt = <2800000>; 41 regulator-min-microvolt = <2800000>;
41 regulator-max-microvolt = <2800000>; 42 regulator-max-microvolt = <2800000>;
42 gpio = <&gpk0 2 0>; 43 gpio = <&gpk0 2 GPIO_ACTIVE_HIGH>;
43 enable-active-high; 44 enable-active-high;
44 }; 45 };
45 46
@@ -48,7 +49,7 @@
48 regulator-name = "TSP_FIXED_VOLTAGES"; 49 regulator-name = "TSP_FIXED_VOLTAGES";
49 regulator-min-microvolt = <2800000>; 50 regulator-min-microvolt = <2800000>;
50 regulator-max-microvolt = <2800000>; 51 regulator-max-microvolt = <2800000>;
51 gpio = <&gpl0 3 0>; 52 gpio = <&gpl0 3 GPIO_ACTIVE_HIGH>;
52 enable-active-high; 53 enable-active-high;
53 }; 54 };
54 55
@@ -57,7 +58,7 @@
57 regulator-name = "8M_AF_2.8V_EN"; 58 regulator-name = "8M_AF_2.8V_EN";
58 regulator-min-microvolt = <2800000>; 59 regulator-min-microvolt = <2800000>;
59 regulator-max-microvolt = <2800000>; 60 regulator-max-microvolt = <2800000>;
60 gpio = <&gpk1 1 0>; 61 gpio = <&gpk1 1 GPIO_ACTIVE_HIGH>;
61 enable-active-high; 62 enable-active-high;
62 }; 63 };
63 64
@@ -66,7 +67,7 @@
66 regulator-name = "CAM_IO_EN"; 67 regulator-name = "CAM_IO_EN";
67 regulator-min-microvolt = <2800000>; 68 regulator-min-microvolt = <2800000>;
68 regulator-max-microvolt = <2800000>; 69 regulator-max-microvolt = <2800000>;
69 gpio = <&gpe2 1 0>; 70 gpio = <&gpe2 1 GPIO_ACTIVE_HIGH>;
70 enable-active-high; 71 enable-active-high;
71 }; 72 };
72 73
@@ -75,7 +76,7 @@
75 regulator-name = "8M_1.2V_EN"; 76 regulator-name = "8M_1.2V_EN";
76 regulator-min-microvolt = <1200000>; 77 regulator-min-microvolt = <1200000>;
77 regulator-max-microvolt = <1200000>; 78 regulator-max-microvolt = <1200000>;
78 gpio = <&gpe2 5 0>; 79 gpio = <&gpe2 5 GPIO_ACTIVE_HIGH>;
79 enable-active-high; 80 enable-active-high;
80 }; 81 };
81 82
@@ -84,7 +85,7 @@
84 regulator-name = "VT_CORE_1.5V"; 85 regulator-name = "VT_CORE_1.5V";
85 regulator-min-microvolt = <1500000>; 86 regulator-min-microvolt = <1500000>;
86 regulator-max-microvolt = <1500000>; 87 regulator-max-microvolt = <1500000>;
87 gpio = <&gpe2 2 0>; 88 gpio = <&gpe2 2 GPIO_ACTIVE_HIGH>;
88 enable-active-high; 89 enable-active-high;
89 }; 90 };
90 }; 91 };
@@ -93,21 +94,21 @@
93 compatible = "gpio-keys"; 94 compatible = "gpio-keys";
94 95
95 vol-down-key { 96 vol-down-key {
96 gpios = <&gpx2 1 1>; 97 gpios = <&gpx2 1 GPIO_ACTIVE_LOW>;
97 linux,code = <114>; 98 linux,code = <114>;
98 label = "volume down"; 99 label = "volume down";
99 debounce-interval = <10>; 100 debounce-interval = <10>;
100 }; 101 };
101 102
102 vol-up-key { 103 vol-up-key {
103 gpios = <&gpx2 0 1>; 104 gpios = <&gpx2 0 GPIO_ACTIVE_LOW>;
104 linux,code = <115>; 105 linux,code = <115>;
105 label = "volume up"; 106 label = "volume up";
106 debounce-interval = <10>; 107 debounce-interval = <10>;
107 }; 108 };
108 109
109 power-key { 110 power-key {
110 gpios = <&gpx2 7 1>; 111 gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
111 linux,code = <116>; 112 linux,code = <116>;
112 label = "power"; 113 label = "power";
113 debounce-interval = <10>; 114 debounce-interval = <10>;
@@ -115,7 +116,7 @@
115 }; 116 };
116 117
117 ok-key { 118 ok-key {
118 gpios = <&gpx3 5 1>; 119 gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
119 linux,code = <352>; 120 linux,code = <352>;
120 label = "ok"; 121 label = "ok";
121 debounce-interval = <10>; 122 debounce-interval = <10>;
@@ -218,7 +219,7 @@
218 compatible = "samsung,s6e8aa0"; 219 compatible = "samsung,s6e8aa0";
219 vdd3-supply = <&vcclcd_reg>; 220 vdd3-supply = <&vcclcd_reg>;
220 vci-supply = <&vlcd_reg>; 221 vci-supply = <&vlcd_reg>;
221 reset-gpios = <&gpy4 5 0>; 222 reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>;
222 power-on-delay= <50>; 223 power-on-delay= <50>;
223 reset-delay = <100>; 224 reset-delay = <100>;
224 init-delay = <100>; 225 init-delay = <100>;
@@ -251,6 +252,7 @@
251 252
252&exynos_usbphy { 253&exynos_usbphy {
253 status = "okay"; 254 status = "okay";
255 vbus-supply = <&safe1_sreg>;
254}; 256};
255 257
256&fimd { 258&fimd {
@@ -304,9 +306,9 @@
304 max8997,pmic-ignore-gpiodvs-side-effect; 306 max8997,pmic-ignore-gpiodvs-side-effect;
305 max8997,pmic-buck125-default-dvs-idx = <0>; 307 max8997,pmic-buck125-default-dvs-idx = <0>;
306 308
307 max8997,pmic-buck125-dvs-gpios = <&gpx0 5 0>, 309 max8997,pmic-buck125-dvs-gpios = <&gpx0 5 GPIO_ACTIVE_HIGH>,
308 <&gpx0 6 0>, 310 <&gpx0 6 GPIO_ACTIVE_HIGH>,
309 <&gpl0 0 0>; 311 <&gpl0 0 GPIO_ACTIVE_HIGH>;
310 312
311 max8997,pmic-buck1-dvs-voltage = <1350000>, <1300000>, 313 max8997,pmic-buck1-dvs-voltage = <1350000>, <1300000>,
312 <1250000>, <1200000>, 314 <1250000>, <1200000>,
@@ -448,7 +450,6 @@
448 450
449 safe1_sreg: ESAFEOUT1 { 451 safe1_sreg: ESAFEOUT1 {
450 regulator-name = "SAFEOUT1"; 452 regulator-name = "SAFEOUT1";
451 regulator-always-on;
452 }; 453 };
453 454
454 safe2_sreg: ESAFEOUT2 { 455 safe2_sreg: ESAFEOUT2 {
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index eb379526e234..81b7ec7b3e31 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -14,6 +14,7 @@
14 14
15/dts-v1/; 15/dts-v1/;
16#include "exynos4210.dtsi" 16#include "exynos4210.dtsi"
17#include <dt-bindings/gpio/gpio.h>
17 18
18/ { 19/ {
19 model = "Samsung Universal C210 based on Exynos4210 rev0"; 20 model = "Samsung Universal C210 based on Exynos4210 rev0";
@@ -65,7 +66,7 @@
65 regulator-name = "VMEM_VDD_2_8V"; 66 regulator-name = "VMEM_VDD_2_8V";
66 regulator-min-microvolt = <2800000>; 67 regulator-min-microvolt = <2800000>;
67 regulator-max-microvolt = <2800000>; 68 regulator-max-microvolt = <2800000>;
68 gpio = <&gpe1 3 0>; 69 gpio = <&gpe1 3 GPIO_ACTIVE_HIGH>;
69 enable-active-high; 70 enable-active-high;
70 }; 71 };
71 72
@@ -73,21 +74,21 @@
73 compatible = "gpio-keys"; 74 compatible = "gpio-keys";
74 75
75 vol-up-key { 76 vol-up-key {
76 gpios = <&gpx2 0 1>; 77 gpios = <&gpx2 0 GPIO_ACTIVE_LOW>;
77 linux,code = <115>; 78 linux,code = <115>;
78 label = "volume up"; 79 label = "volume up";
79 debounce-interval = <1>; 80 debounce-interval = <1>;
80 }; 81 };
81 82
82 vol-down-key { 83 vol-down-key {
83 gpios = <&gpx2 1 1>; 84 gpios = <&gpx2 1 GPIO_ACTIVE_LOW>;
84 linux,code = <114>; 85 linux,code = <114>;
85 label = "volume down"; 86 label = "volume down";
86 debounce-interval = <1>; 87 debounce-interval = <1>;
87 }; 88 };
88 89
89 config-key { 90 config-key {
90 gpios = <&gpx2 2 1>; 91 gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
91 linux,code = <171>; 92 linux,code = <171>;
92 label = "config"; 93 label = "config";
93 debounce-interval = <1>; 94 debounce-interval = <1>;
@@ -95,14 +96,14 @@
95 }; 96 };
96 97
97 camera-key { 98 camera-key {
98 gpios = <&gpx2 3 1>; 99 gpios = <&gpx2 3 GPIO_ACTIVE_LOW>;
99 linux,code = <212>; 100 linux,code = <212>;
100 label = "camera"; 101 label = "camera";
101 debounce-interval = <1>; 102 debounce-interval = <1>;
102 }; 103 };
103 104
104 power-key { 105 power-key {
105 gpios = <&gpx2 7 1>; 106 gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
106 linux,code = <116>; 107 linux,code = <116>;
107 label = "power"; 108 label = "power";
108 debounce-interval = <1>; 109 debounce-interval = <1>;
@@ -110,7 +111,7 @@
110 }; 111 };
111 112
112 ok-key { 113 ok-key {
113 gpios = <&gpx3 5 1>; 114 gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
114 linux,code = <352>; 115 linux,code = <352>;
115 label = "ok"; 116 label = "ok";
116 debounce-interval = <1>; 117 debounce-interval = <1>;
@@ -122,7 +123,7 @@
122 regulator-name = "TSP_2_8V"; 123 regulator-name = "TSP_2_8V";
123 regulator-min-microvolt = <2800000>; 124 regulator-min-microvolt = <2800000>;
124 regulator-max-microvolt = <2800000>; 125 regulator-max-microvolt = <2800000>;
125 gpio = <&gpe2 3 0>; 126 gpio = <&gpe2 3 GPIO_ACTIVE_HIGH>;
126 enable-active-high; 127 enable-active-high;
127 }; 128 };
128 129
@@ -131,17 +132,17 @@
131 #address-cells = <1>; 132 #address-cells = <1>;
132 #size-cells = <0>; 133 #size-cells = <0>;
133 134
134 gpio-sck = <&gpy3 1 0>; 135 gpio-sck = <&gpy3 1 GPIO_ACTIVE_HIGH>;
135 gpio-mosi = <&gpy3 3 0>; 136 gpio-mosi = <&gpy3 3 GPIO_ACTIVE_HIGH>;
136 num-chipselects = <1>; 137 num-chipselects = <1>;
137 cs-gpios = <&gpy4 3 0>; 138 cs-gpios = <&gpy4 3 GPIO_ACTIVE_HIGH>;
138 139
139 lcd@0 { 140 lcd@0 {
140 compatible = "samsung,ld9040"; 141 compatible = "samsung,ld9040";
141 reg = <0>; 142 reg = <0>;
142 vdd3-supply = <&ldo7_reg>; 143 vdd3-supply = <&ldo7_reg>;
143 vci-supply = <&ldo17_reg>; 144 vci-supply = <&ldo17_reg>;
144 reset-gpios = <&gpy4 5 0>; 145 reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>;
145 spi-max-frequency = <1200000>; 146 spi-max-frequency = <1200000>;
146 spi-cpol; 147 spi-cpol;
147 spi-cpha; 148 spi-cpha;
@@ -218,13 +219,13 @@
218 regulator-name = "HDMI_5V"; 219 regulator-name = "HDMI_5V";
219 regulator-min-microvolt = <5000000>; 220 regulator-min-microvolt = <5000000>;
220 regulator-max-microvolt = <5000000>; 221 regulator-max-microvolt = <5000000>;
221 gpio = <&gpe0 1 0>; 222 gpio = <&gpe0 1 GPIO_ACTIVE_HIGH>;
222 enable-active-high; 223 enable-active-high;
223 }; 224 };
224 225
225 hdmi_ddc: i2c-ddc { 226 hdmi_ddc: i2c-ddc {
226 compatible = "i2c-gpio"; 227 compatible = "i2c-gpio";
227 gpios = <&gpe4 2 0 &gpe4 3 0>; 228 gpios = <&gpe4 2 GPIO_ACTIVE_HIGH &gpe4 3 GPIO_ACTIVE_HIGH>;
228 i2c-gpio,delay-us = <100>; 229 i2c-gpio,delay-us = <100>;
229 #address-cells = <1>; 230 #address-cells = <1>;
230 #size-cells = <0>; 231 #size-cells = <0>;
@@ -248,6 +249,7 @@
248 249
249&exynos_usbphy { 250&exynos_usbphy {
250 status = "okay"; 251 status = "okay";
252 vbus-supply = <&safeout1_reg>;
251}; 253};
252 254
253&fimd { 255&fimd {
@@ -267,7 +269,7 @@
267}; 269};
268 270
269&hdmi { 271&hdmi {
270 hpd-gpio = <&gpx3 7 0>; 272 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
271 pinctrl-names = "default"; 273 pinctrl-names = "default";
272 pinctrl-0 = <&hdmi_hpd>; 274 pinctrl-0 = <&hdmi_hpd>;
273 hdmi-en-supply = <&hdmi_en>; 275 hdmi-en-supply = <&hdmi_en>;
@@ -311,7 +313,8 @@
311 compatible = "maxim,max8952"; 313 compatible = "maxim,max8952";
312 reg = <0x60>; 314 reg = <0x60>;
313 315
314 max8952,vid-gpios = <&gpx0 3 0>, <&gpx0 4 0>; 316 max8952,vid-gpios = <&gpx0 3 GPIO_ACTIVE_HIGH>,
317 <&gpx0 4 GPIO_ACTIVE_HIGH>;
315 max8952,default-mode = <0>; 318 max8952,default-mode = <0>;
316 max8952,dvs-mode-microvolt = <1250000>, <1200000>, 319 max8952,dvs-mode-microvolt = <1250000>, <1200000>,
317 <1050000>, <950000>; 320 <1050000>, <950000>;
@@ -330,13 +333,13 @@
330 reg = <0x66>; 333 reg = <0x66>;
331 334
332 max8998,pmic-buck1-default-dvs-idx = <0>; 335 max8998,pmic-buck1-default-dvs-idx = <0>;
333 max8998,pmic-buck1-dvs-gpios = <&gpx0 5 0>, 336 max8998,pmic-buck1-dvs-gpios = <&gpx0 5 GPIO_ACTIVE_HIGH>,
334 <&gpx0 6 0>; 337 <&gpx0 6 GPIO_ACTIVE_HIGH>;
335 max8998,pmic-buck1-dvs-voltage = <1100000>, <1000000>, 338 max8998,pmic-buck1-dvs-voltage = <1100000>, <1000000>,
336 <1100000>, <1000000>; 339 <1100000>, <1000000>;
337 340
338 max8998,pmic-buck2-default-dvs-idx = <0>; 341 max8998,pmic-buck2-default-dvs-idx = <0>;
339 max8998,pmic-buck2-dvs-gpio = <&gpe2 0 0>; 342 max8998,pmic-buck2-dvs-gpio = <&gpe2 0 GPIO_ACTIVE_HIGH>;
340 max8998,pmic-buck2-dvs-voltage = <1200000>, <1100000>; 343 max8998,pmic-buck2-dvs-voltage = <1200000>, <1100000>;
341 344
342 regulators { 345 regulators {
@@ -486,7 +489,6 @@
486 489
487 safeout1_reg: ESAFEOUT1 { 490 safeout1_reg: ESAFEOUT1 {
488 regulator-name = "SAFEOUT1"; 491 regulator-name = "SAFEOUT1";
489 regulator-always-on;
490 }; 492 };
491 493
492 safeout2_reg: ESAFEOUT2 { 494 safeout2_reg: ESAFEOUT2 {
@@ -551,7 +553,7 @@
551 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; 553 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
552 pinctrl-names = "default"; 554 pinctrl-names = "default";
553 vmmc-supply = <&ldo5_reg>; 555 vmmc-supply = <&ldo5_reg>;
554 cd-gpios = <&gpx3 4 0>; 556 cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
555 cd-inverted; 557 cd-inverted;
556 status = "okay"; 558 status = "okay";
557}; 559};
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index db52841297a5..edf0fc8db6ff 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -11,6 +11,7 @@
11#include <dt-bindings/input/input.h> 11#include <dt-bindings/input/input.h>
12#include <dt-bindings/clock/maxim,max77686.h> 12#include <dt-bindings/clock/maxim,max77686.h>
13#include "exynos4412.dtsi" 13#include "exynos4412.dtsi"
14#include <dt-bindings/gpio/gpio.h>
14 15
15/ { 16/ {
16 chosen { 17 chosen {
@@ -30,7 +31,7 @@
30 power_key { 31 power_key {
31 interrupt-parent = <&gpx1>; 32 interrupt-parent = <&gpx1>;
32 interrupts = <3 0>; 33 interrupts = <3 0>;
33 gpios = <&gpx1 3 1>; 34 gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
34 linux,code = <KEY_POWER>; 35 linux,code = <KEY_POWER>;
35 label = "power key"; 36 label = "power key";
36 debounce-interval = <10>; 37 debounce-interval = <10>;
@@ -70,7 +71,7 @@
70 pinctrl-0 = <&sd1_cd>; 71 pinctrl-0 = <&sd1_cd>;
71 pinctrl-names = "default"; 72 pinctrl-names = "default";
72 compatible = "mmc-pwrseq-emmc"; 73 compatible = "mmc-pwrseq-emmc";
73 reset-gpios = <&gpk1 2 1>; 74 reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
74 }; 75 };
75 76
76 camera { 77 camera {
@@ -181,7 +182,7 @@
181}; 182};
182 183
183&hdmi { 184&hdmi {
184 hpd-gpio = <&gpx3 7 0>; 185 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
185 pinctrl-names = "default"; 186 pinctrl-names = "default";
186 pinctrl-0 = <&hdmi_hpd>; 187 pinctrl-0 = <&hdmi_hpd>;
187 vdd-supply = <&ldo8_reg>; 188 vdd-supply = <&ldo8_reg>;
@@ -199,8 +200,6 @@
199}; 200};
200 201
201&i2c_0 { 202&i2c_0 {
202 pinctrl-0 = <&i2c0_bus>;
203 pinctrl-names = "default";
204 samsung,i2c-sda-delay = <100>; 203 samsung,i2c-sda-delay = <100>;
205 samsung,i2c-max-bus-freq = <400000>; 204 samsung,i2c-max-bus-freq = <400000>;
206 status = "okay"; 205 status = "okay";
@@ -209,9 +208,9 @@
209 compatible = "smsc,usb3503"; 208 compatible = "smsc,usb3503";
210 reg = <0x08>; 209 reg = <0x08>;
211 210
212 intn-gpios = <&gpx3 0 0>; 211 intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
213 connect-gpios = <&gpx3 4 0>; 212 connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
214 reset-gpios = <&gpx3 5 0>; 213 reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
215 initial-mode = <1>; 214 initial-mode = <1>;
216 }; 215 };
217 216
@@ -276,15 +275,13 @@
276 regulator-always-on; 275 regulator-always-on;
277 }; 276 };
278 277
279 ldo8_reg: ldo@8 { 278 ldo8_reg: LDO8 {
280 regulator-compatible = "LDO8";
281 regulator-name = "VDD10_HDMI_1.0V"; 279 regulator-name = "VDD10_HDMI_1.0V";
282 regulator-min-microvolt = <1000000>; 280 regulator-min-microvolt = <1000000>;
283 regulator-max-microvolt = <1000000>; 281 regulator-max-microvolt = <1000000>;
284 }; 282 };
285 283
286 ldo10_reg: ldo@10 { 284 ldo10_reg: LDO10 {
287 regulator-compatible = "LDO10";
288 regulator-name = "VDDQ_MIPIHSI_1.8V"; 285 regulator-name = "VDDQ_MIPIHSI_1.8V";
289 regulator-min-microvolt = <1800000>; 286 regulator-min-microvolt = <1800000>;
290 regulator-max-microvolt = <1800000>; 287 regulator-max-microvolt = <1800000>;
@@ -424,8 +421,6 @@
424}; 421};
425 422
426&i2c_1 { 423&i2c_1 {
427 pinctrl-names = "default";
428 pinctrl-0 = <&i2c1_bus>;
429 status = "okay"; 424 status = "okay";
430 max98090: max98090@10 { 425 max98090: max98090@10 {
431 compatible = "maxim,max98090"; 426 compatible = "maxim,max98090";
@@ -440,8 +435,6 @@
440 435
441&i2c_2 { 436&i2c_2 {
442 status = "okay"; 437 status = "okay";
443 pinctrl-names = "default";
444 pinctrl-0 = <&i2c2_bus>;
445}; 438};
446 439
447&i2c_8 { 440&i2c_8 {
@@ -490,7 +483,7 @@
490 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; 483 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
491 pinctrl-names = "default"; 484 pinctrl-names = "default";
492 vmmc-supply = <&ldo4_reg &ldo21_reg>; 485 vmmc-supply = <&ldo4_reg &ldo21_reg>;
493 cd-gpios = <&gpk2 2 0>; 486 cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
494 cd-inverted; 487 cd-inverted;
495 status = "okay"; 488 status = "okay";
496}; 489};
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index 8632f35c6c26..646ff0bd001a 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -27,11 +27,54 @@
27 compatible = "gpio-leds"; 27 compatible = "gpio-leds";
28 led1 { 28 led1 {
29 label = "led1:heart"; 29 label = "led1:heart";
30 gpios = <&gpc1 0 1>; 30 gpios = <&gpc1 0 GPIO_ACTIVE_LOW>;
31 default-state = "on"; 31 default-state = "on";
32 linux,default-trigger = "heartbeat"; 32 linux,default-trigger = "heartbeat";
33 }; 33 };
34 }; 34 };
35
36 fan0: pwm-fan {
37 compatible = "pwm-fan";
38 pwms = <&pwm 0 10000 0>;
39 cooling-min-state = <0>;
40 cooling-max-state = <3>;
41 #cooling-cells = <2>;
42 cooling-levels = <0 102 170 230>;
43 };
44
45 thermal-zones {
46 cpu_thermal: cpu-thermal {
47 cooling-maps {
48 map0 {
49 trip = <&cpu_alert1>;
50 cooling-device = <&cpu0 7 7>;
51 };
52 map1 {
53 trip = <&cpu_alert2>;
54 cooling-device = <&cpu0 13 13>;
55 };
56 map2 {
57 trip = <&cpu_alert0>;
58 cooling-device = <&fan0 0 1>;
59 };
60 map3 {
61 trip = <&cpu_alert1>;
62 cooling-device = <&fan0 1 2>;
63 };
64 map4 {
65 trip = <&cpu_alert2>;
66 cooling-device = <&fan0 2 3>;
67 };
68 };
69 };
70 };
71};
72
73&pwm {
74 pinctrl-0 = <&pwm0_out>;
75 pinctrl-names = "default";
76 samsung,pwm-outputs = <0>;
77 status = "okay";
35}; 78};
36 79
37&usb3503 { 80&usb3503 {
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 679ac103ebf6..b44bb682e976 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -26,13 +26,13 @@
26 compatible = "gpio-leds"; 26 compatible = "gpio-leds";
27 led1 { 27 led1 {
28 label = "led1:heart"; 28 label = "led1:heart";
29 gpios = <&gpc1 0 1>; 29 gpios = <&gpc1 0 GPIO_ACTIVE_LOW>;
30 default-state = "on"; 30 default-state = "on";
31 linux,default-trigger = "heartbeat"; 31 linux,default-trigger = "heartbeat";
32 }; 32 };
33 led2 { 33 led2 {
34 label = "led2:mmc0"; 34 label = "led2:mmc0";
35 gpios = <&gpc1 2 1>; 35 gpios = <&gpc1 2 GPIO_ACTIVE_LOW>;
36 default-state = "on"; 36 default-state = "on";
37 linux,default-trigger = "mmc0"; 37 linux,default-trigger = "mmc0";
38 }; 38 };
@@ -44,7 +44,7 @@
44 home_key { 44 home_key {
45 interrupt-parent = <&gpx2>; 45 interrupt-parent = <&gpx2>;
46 interrupts = <2 0>; 46 interrupts = <2 0>;
47 gpios = <&gpx2 2 0>; 47 gpios = <&gpx2 2 GPIO_ACTIVE_HIGH>;
48 linux,code = <KEY_HOME>; 48 linux,code = <KEY_HOME>;
49 label = "home key"; 49 label = "home key";
50 debounce-interval = <10>; 50 debounce-interval = <10>;
@@ -57,7 +57,7 @@
57 regulator-name = "p3v3_en"; 57 regulator-name = "p3v3_en";
58 regulator-min-microvolt = <3300000>; 58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>; 59 regulator-max-microvolt = <3300000>;
60 gpio = <&gpa1 1 1>; 60 gpio = <&gpa1 1 GPIO_ACTIVE_LOW>;
61 enable-active-high; 61 enable-active-high;
62 regulator-always-on; 62 regulator-always-on;
63 }; 63 };
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index 9d528af68c1a..c8d86af2fb98 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -14,6 +14,7 @@
14 14
15/dts-v1/; 15/dts-v1/;
16#include "exynos4412.dtsi" 16#include "exynos4412.dtsi"
17#include <dt-bindings/gpio/gpio.h>
17#include <dt-bindings/input/input.h> 18#include <dt-bindings/input/input.h>
18 19
19/ { 20/ {
@@ -45,7 +46,7 @@
45 regulator-name = "VMEM_VDD_2.8V"; 46 regulator-name = "VMEM_VDD_2.8V";
46 regulator-min-microvolt = <2800000>; 47 regulator-min-microvolt = <2800000>;
47 regulator-max-microvolt = <2800000>; 48 regulator-max-microvolt = <2800000>;
48 gpio = <&gpx1 1 0>; 49 gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
49 enable-active-high; 50 enable-active-high;
50 }; 51 };
51 }; 52 };
@@ -107,13 +108,13 @@
107 108
108 s5m8767,pmic-buck-default-dvs-idx = <3>; 109 s5m8767,pmic-buck-default-dvs-idx = <3>;
109 110
110 s5m8767,pmic-buck-dvs-gpios = <&gpx2 3 0>, 111 s5m8767,pmic-buck-dvs-gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>,
111 <&gpx2 4 0>, 112 <&gpx2 4 GPIO_ACTIVE_HIGH>,
112 <&gpx2 5 0>; 113 <&gpx2 5 GPIO_ACTIVE_HIGH>;
113 114
114 s5m8767,pmic-buck-ds-gpios = <&gpm3 5 0>, 115 s5m8767,pmic-buck-ds-gpios = <&gpm3 5 GPIO_ACTIVE_HIGH>,
115 <&gpm3 6 0>, 116 <&gpm3 6 GPIO_ACTIVE_HIGH>,
116 <&gpm3 7 0>; 117 <&gpm3 7 GPIO_ACTIVE_HIGH>;
117 118
118 s5m8767,pmic-buck2-dvs-voltage = <1250000>, <1200000>, 119 s5m8767,pmic-buck2-dvs-voltage = <1250000>, <1200000>,
119 <1200000>, <1200000>, 120 <1200000>, <1200000>,
diff --git a/arch/arm/boot/dts/exynos4412-tiny4412.dts b/arch/arm/boot/dts/exynos4412-tiny4412.dts
index 525684ca8dc0..4840bbdaa9ec 100644
--- a/arch/arm/boot/dts/exynos4412-tiny4412.dts
+++ b/arch/arm/boot/dts/exynos4412-tiny4412.dts
@@ -13,6 +13,7 @@
13 13
14/dts-v1/; 14/dts-v1/;
15#include "exynos4412.dtsi" 15#include "exynos4412.dtsi"
16#include <dt-bindings/gpio/gpio.h>
16 17
17/ { 18/ {
18 model = "FriendlyARM TINY4412 board based on Exynos4412"; 19 model = "FriendlyARM TINY4412 board based on Exynos4412";
@@ -31,26 +32,26 @@
31 32
32 led1 { 33 led1 {
33 label = "led1"; 34 label = "led1";
34 gpios = <&gpm4 0 1>; 35 gpios = <&gpm4 0 GPIO_ACTIVE_LOW>;
35 default-state = "off"; 36 default-state = "off";
36 linux,default-trigger = "heartbeat"; 37 linux,default-trigger = "heartbeat";
37 }; 38 };
38 39
39 led2 { 40 led2 {
40 label = "led2"; 41 label = "led2";
41 gpios = <&gpm4 1 1>; 42 gpios = <&gpm4 1 GPIO_ACTIVE_LOW>;
42 default-state = "off"; 43 default-state = "off";
43 }; 44 };
44 45
45 led3 { 46 led3 {
46 label = "led3"; 47 label = "led3";
47 gpios = <&gpm4 2 1>; 48 gpios = <&gpm4 2 GPIO_ACTIVE_LOW>;
48 default-state = "off"; 49 default-state = "off";
49 }; 50 };
50 51
51 led4 { 52 led4 {
52 label = "led4"; 53 label = "led4";
53 gpios = <&gpm4 3 1>; 54 gpios = <&gpm4 3 GPIO_ACTIVE_LOW>;
54 default-state = "off"; 55 default-state = "off";
55 linux,default-trigger = "mmc0"; 56 linux,default-trigger = "mmc0";
56 }; 57 };
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 2a1ebb76ebe0..40a474c4374b 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -65,7 +65,7 @@
65 regulator-name = "CAM_SENSOR_A"; 65 regulator-name = "CAM_SENSOR_A";
66 regulator-min-microvolt = <2800000>; 66 regulator-min-microvolt = <2800000>;
67 regulator-max-microvolt = <2800000>; 67 regulator-max-microvolt = <2800000>;
68 gpio = <&gpm0 2 0>; 68 gpio = <&gpm0 2 GPIO_ACTIVE_HIGH>;
69 enable-active-high; 69 enable-active-high;
70 }; 70 };
71 71
@@ -74,7 +74,7 @@
74 regulator-name = "LCD_VDD_2.2V"; 74 regulator-name = "LCD_VDD_2.2V";
75 regulator-min-microvolt = <2200000>; 75 regulator-min-microvolt = <2200000>;
76 regulator-max-microvolt = <2200000>; 76 regulator-max-microvolt = <2200000>;
77 gpio = <&gpc0 1 0>; 77 gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>;
78 enable-active-high; 78 enable-active-high;
79 }; 79 };
80 80
@@ -83,7 +83,7 @@
83 regulator-name = "CAM_AF"; 83 regulator-name = "CAM_AF";
84 regulator-min-microvolt = <2800000>; 84 regulator-min-microvolt = <2800000>;
85 regulator-max-microvolt = <2800000>; 85 regulator-max-microvolt = <2800000>;
86 gpio = <&gpm0 4 0>; 86 gpio = <&gpm0 4 GPIO_ACTIVE_HIGH>;
87 enable-active-high; 87 enable-active-high;
88 }; 88 };
89 89
@@ -92,7 +92,7 @@
92 regulator-name = "LED_A_3.0V"; 92 regulator-name = "LED_A_3.0V";
93 regulator-min-microvolt = <3000000>; 93 regulator-min-microvolt = <3000000>;
94 regulator-max-microvolt = <3000000>; 94 regulator-max-microvolt = <3000000>;
95 gpio = <&gpj0 5 0>; 95 gpio = <&gpj0 5 GPIO_ACTIVE_HIGH>;
96 enable-active-high; 96 enable-active-high;
97 }; 97 };
98 }; 98 };
@@ -101,21 +101,21 @@
101 compatible = "gpio-keys"; 101 compatible = "gpio-keys";
102 102
103 key-down { 103 key-down {
104 gpios = <&gpx3 3 1>; 104 gpios = <&gpx3 3 GPIO_ACTIVE_LOW>;
105 linux,code = <114>; 105 linux,code = <114>;
106 label = "volume down"; 106 label = "volume down";
107 debounce-interval = <10>; 107 debounce-interval = <10>;
108 }; 108 };
109 109
110 key-up { 110 key-up {
111 gpios = <&gpx2 2 1>; 111 gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
112 linux,code = <115>; 112 linux,code = <115>;
113 label = "volume up"; 113 label = "volume up";
114 debounce-interval = <10>; 114 debounce-interval = <10>;
115 }; 115 };
116 116
117 key-power { 117 key-power {
118 gpios = <&gpx2 7 1>; 118 gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
119 linux,code = <116>; 119 linux,code = <116>;
120 label = "power"; 120 label = "power";
121 debounce-interval = <10>; 121 debounce-interval = <10>;
@@ -123,7 +123,7 @@
123 }; 123 };
124 124
125 key-ok { 125 key-ok {
126 gpios = <&gpx0 1 1>; 126 gpios = <&gpx0 1 GPIO_ACTIVE_LOW>;
127 linux,code = <139>; 127 linux,code = <139>;
128 label = "ok"; 128 label = "ok";
129 debounce-inteval = <10>; 129 debounce-inteval = <10>;
@@ -198,7 +198,7 @@
198 198
199 i2c_ak8975: i2c-gpio-0 { 199 i2c_ak8975: i2c-gpio-0 {
200 compatible = "i2c-gpio"; 200 compatible = "i2c-gpio";
201 gpios = <&gpy2 4 0>, <&gpy2 5 0>; 201 gpios = <&gpy2 4 GPIO_ACTIVE_HIGH>, <&gpy2 5 GPIO_ACTIVE_HIGH>;
202 i2c-gpio,delay-us = <2>; 202 i2c-gpio,delay-us = <2>;
203 #address-cells = <1>; 203 #address-cells = <1>;
204 #size-cells = <0>; 204 #size-cells = <0>;
@@ -207,13 +207,13 @@
207 ak8975@0c { 207 ak8975@0c {
208 compatible = "asahi-kasei,ak8975"; 208 compatible = "asahi-kasei,ak8975";
209 reg = <0x0c>; 209 reg = <0x0c>;
210 gpios = <&gpj0 7 0>; 210 gpios = <&gpj0 7 GPIO_ACTIVE_HIGH>;
211 }; 211 };
212 }; 212 };
213 213
214 i2c_cm36651: i2c-gpio-2 { 214 i2c_cm36651: i2c-gpio-2 {
215 compatible = "i2c-gpio"; 215 compatible = "i2c-gpio";
216 gpios = <&gpf0 0 1>, <&gpf0 1 1>; 216 gpios = <&gpf0 0 GPIO_ACTIVE_LOW>, <&gpf0 1 GPIO_ACTIVE_LOW>;
217 i2c-gpio,delay-us = <2>; 217 i2c-gpio,delay-us = <2>;
218 #address-cells = <1>; 218 #address-cells = <1>;
219 #size-cells = <0>; 219 #size-cells = <0>;
@@ -359,7 +359,7 @@
359 reg = <0>; 359 reg = <0>;
360 vdd3-supply = <&lcd_vdd3_reg>; 360 vdd3-supply = <&lcd_vdd3_reg>;
361 vci-supply = <&ldo25_reg>; 361 vci-supply = <&ldo25_reg>;
362 reset-gpios = <&gpy4 5 0>; 362 reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>;
363 power-on-delay= <50>; 363 power-on-delay= <50>;
364 reset-delay = <100>; 364 reset-delay = <100>;
365 init-delay = <100>; 365 init-delay = <100>;
@@ -391,6 +391,7 @@
391}; 391};
392 392
393&exynos_usbphy { 393&exynos_usbphy {
394 vbus-supply = <&esafeout1_reg>;
394 status = "okay"; 395 status = "okay";
395}; 396};
396 397
@@ -446,7 +447,7 @@
446 clocks = <&camera 1>; 447 clocks = <&camera 1>;
447 clock-names = "extclk"; 448 clock-names = "extclk";
448 samsung,camclk-out = <1>; 449 samsung,camclk-out = <1>;
449 gpios = <&gpm1 6 0>; 450 gpios = <&gpm1 6 GPIO_ACTIVE_HIGH>;
450 451
451 port { 452 port {
452 is_s5k6a3_ep: endpoint { 453 is_s5k6a3_ep: endpoint {
@@ -488,8 +489,8 @@
488 s5c73m3@3c { 489 s5c73m3@3c {
489 compatible = "samsung,s5c73m3"; 490 compatible = "samsung,s5c73m3";
490 reg = <0x3c>; 491 reg = <0x3c>;
491 standby-gpios = <&gpm0 1 1>; /* ISP_STANDBY */ 492 standby-gpios = <&gpm0 1 GPIO_ACTIVE_LOW>; /* ISP_STANDBY */
492 xshutdown-gpios = <&gpf1 3 1>; /* ISP_RESET */ 493 xshutdown-gpios = <&gpf1 3 GPIO_ACTIVE_LOW>; /* ISP_RESET */
493 vdd-int-supply = <&buck9_reg>; 494 vdd-int-supply = <&buck9_reg>;
494 vddio-cis-supply = <&ldo9_reg>; 495 vddio-cis-supply = <&ldo9_reg>;
495 vdda-supply = <&ldo17_reg>; 496 vdda-supply = <&ldo17_reg>;
@@ -564,16 +565,14 @@
564 #clock-cells = <1>; 565 #clock-cells = <1>;
565 566
566 voltage-regulators { 567 voltage-regulators {
567 ldo1_reg: ldo1 { 568 ldo1_reg: LDO1 {
568 regulator-compatible = "LDO1";
569 regulator-name = "VALIVE_1.0V_AP"; 569 regulator-name = "VALIVE_1.0V_AP";
570 regulator-min-microvolt = <1000000>; 570 regulator-min-microvolt = <1000000>;
571 regulator-max-microvolt = <1000000>; 571 regulator-max-microvolt = <1000000>;
572 regulator-always-on; 572 regulator-always-on;
573 }; 573 };
574 574
575 ldo2_reg: ldo2 { 575 ldo2_reg: LDO2 {
576 regulator-compatible = "LDO2";
577 regulator-name = "VM1M2_1.2V_AP"; 576 regulator-name = "VM1M2_1.2V_AP";
578 regulator-min-microvolt = <1200000>; 577 regulator-min-microvolt = <1200000>;
579 regulator-max-microvolt = <1200000>; 578 regulator-max-microvolt = <1200000>;
@@ -583,32 +582,28 @@
583 }; 582 };
584 }; 583 };
585 584
586 ldo3_reg: ldo3 { 585 ldo3_reg: LDO3 {
587 regulator-compatible = "LDO3";
588 regulator-name = "VCC_1.8V_AP"; 586 regulator-name = "VCC_1.8V_AP";
589 regulator-min-microvolt = <1800000>; 587 regulator-min-microvolt = <1800000>;
590 regulator-max-microvolt = <1800000>; 588 regulator-max-microvolt = <1800000>;
591 regulator-always-on; 589 regulator-always-on;
592 }; 590 };
593 591
594 ldo4_reg: ldo4 { 592 ldo4_reg: LDO4 {
595 regulator-compatible = "LDO4";
596 regulator-name = "VCC_2.8V_AP"; 593 regulator-name = "VCC_2.8V_AP";
597 regulator-min-microvolt = <2800000>; 594 regulator-min-microvolt = <2800000>;
598 regulator-max-microvolt = <2800000>; 595 regulator-max-microvolt = <2800000>;
599 regulator-always-on; 596 regulator-always-on;
600 }; 597 };
601 598
602 ldo5_reg: ldo5 { 599 ldo5_reg: LDO5 {
603 regulator-compatible = "LDO5";
604 regulator-name = "VCC_1.8V_IO"; 600 regulator-name = "VCC_1.8V_IO";
605 regulator-min-microvolt = <1800000>; 601 regulator-min-microvolt = <1800000>;
606 regulator-max-microvolt = <1800000>; 602 regulator-max-microvolt = <1800000>;
607 regulator-always-on; 603 regulator-always-on;
608 }; 604 };
609 605
610 ldo6_reg: ldo6 { 606 ldo6_reg: LDO6 {
611 regulator-compatible = "LDO6";
612 regulator-name = "VMPLL_1.0V_AP"; 607 regulator-name = "VMPLL_1.0V_AP";
613 regulator-min-microvolt = <1000000>; 608 regulator-min-microvolt = <1000000>;
614 regulator-max-microvolt = <1000000>; 609 regulator-max-microvolt = <1000000>;
@@ -618,8 +613,7 @@
618 }; 613 };
619 }; 614 };
620 615
621 ldo7_reg: ldo7 { 616 ldo7_reg: LDO7 {
622 regulator-compatible = "LDO7";
623 regulator-name = "VPLL_1.0V_AP"; 617 regulator-name = "VPLL_1.0V_AP";
624 regulator-min-microvolt = <1000000>; 618 regulator-min-microvolt = <1000000>;
625 regulator-max-microvolt = <1000000>; 619 regulator-max-microvolt = <1000000>;
@@ -629,8 +623,7 @@
629 }; 623 };
630 }; 624 };
631 625
632 ldo8_reg: ldo8 { 626 ldo8_reg: LDO8 {
633 regulator-compatible = "LDO8";
634 regulator-name = "VMIPI_1.0V"; 627 regulator-name = "VMIPI_1.0V";
635 regulator-min-microvolt = <1000000>; 628 regulator-min-microvolt = <1000000>;
636 regulator-max-microvolt = <1000000>; 629 regulator-max-microvolt = <1000000>;
@@ -639,15 +632,13 @@
639 }; 632 };
640 }; 633 };
641 634
642 ldo9_reg: ldo9 { 635 ldo9_reg: LDO9 {
643 regulator-compatible = "LDO9";
644 regulator-name = "CAM_ISP_MIPI_1.2V"; 636 regulator-name = "CAM_ISP_MIPI_1.2V";
645 regulator-min-microvolt = <1200000>; 637 regulator-min-microvolt = <1200000>;
646 regulator-max-microvolt = <1200000>; 638 regulator-max-microvolt = <1200000>;
647 }; 639 };
648 640
649 ldo10_reg: ldo10 { 641 ldo10_reg: LDO10 {
650 regulator-compatible = "LDO10";
651 regulator-name = "VMIPI_1.8V"; 642 regulator-name = "VMIPI_1.8V";
652 regulator-min-microvolt = <1800000>; 643 regulator-min-microvolt = <1800000>;
653 regulator-max-microvolt = <1800000>; 644 regulator-max-microvolt = <1800000>;
@@ -656,8 +647,7 @@
656 }; 647 };
657 }; 648 };
658 649
659 ldo11_reg: ldo11 { 650 ldo11_reg: LDO11 {
660 regulator-compatible = "LDO11";
661 regulator-name = "VABB1_1.95V"; 651 regulator-name = "VABB1_1.95V";
662 regulator-min-microvolt = <1950000>; 652 regulator-min-microvolt = <1950000>;
663 regulator-max-microvolt = <1950000>; 653 regulator-max-microvolt = <1950000>;
@@ -667,8 +657,7 @@
667 }; 657 };
668 }; 658 };
669 659
670 ldo12_reg: ldo12 { 660 ldo12_reg: LDO12 {
671 regulator-compatible = "LDO12";
672 regulator-name = "VUOTG_3.0V"; 661 regulator-name = "VUOTG_3.0V";
673 regulator-min-microvolt = <3000000>; 662 regulator-min-microvolt = <3000000>;
674 regulator-max-microvolt = <3000000>; 663 regulator-max-microvolt = <3000000>;
@@ -677,15 +666,13 @@
677 }; 666 };
678 }; 667 };
679 668
680 ldo13_reg: ldo13 { 669 ldo13_reg: LDO13 {
681 regulator-compatible = "LDO13";
682 regulator-name = "NFC_AVDD_1.8V"; 670 regulator-name = "NFC_AVDD_1.8V";
683 regulator-min-microvolt = <1800000>; 671 regulator-min-microvolt = <1800000>;
684 regulator-max-microvolt = <1800000>; 672 regulator-max-microvolt = <1800000>;
685 }; 673 };
686 674
687 ldo14_reg: ldo14 { 675 ldo14_reg: LDO14 {
688 regulator-compatible = "LDO14";
689 regulator-name = "VABB2_1.95V"; 676 regulator-name = "VABB2_1.95V";
690 regulator-min-microvolt = <1950000>; 677 regulator-min-microvolt = <1950000>;
691 regulator-max-microvolt = <1950000>; 678 regulator-max-microvolt = <1950000>;
@@ -695,8 +682,7 @@
695 }; 682 };
696 }; 683 };
697 684
698 ldo15_reg: ldo15 { 685 ldo15_reg: LDO15 {
699 regulator-compatible = "LDO15";
700 regulator-name = "VHSIC_1.0V"; 686 regulator-name = "VHSIC_1.0V";
701 regulator-min-microvolt = <1000000>; 687 regulator-min-microvolt = <1000000>;
702 regulator-max-microvolt = <1000000>; 688 regulator-max-microvolt = <1000000>;
@@ -705,8 +691,7 @@
705 }; 691 };
706 }; 692 };
707 693
708 ldo16_reg: ldo16 { 694 ldo16_reg: LDO16 {
709 regulator-compatible = "LDO16";
710 regulator-name = "VHSIC_1.8V"; 695 regulator-name = "VHSIC_1.8V";
711 regulator-min-microvolt = <1800000>; 696 regulator-min-microvolt = <1800000>;
712 regulator-max-microvolt = <1800000>; 697 regulator-max-microvolt = <1800000>;
@@ -715,80 +700,69 @@
715 }; 700 };
716 }; 701 };
717 702
718 ldo17_reg: ldo17 { 703 ldo17_reg: LDO17 {
719 regulator-compatible = "LDO17";
720 regulator-name = "CAM_SENSOR_CORE_1.2V"; 704 regulator-name = "CAM_SENSOR_CORE_1.2V";
721 regulator-min-microvolt = <1200000>; 705 regulator-min-microvolt = <1200000>;
722 regulator-max-microvolt = <1200000>; 706 regulator-max-microvolt = <1200000>;
723 }; 707 };
724 708
725 ldo18_reg: ldo18 { 709 ldo18_reg: LDO18 {
726 regulator-compatible = "LDO18";
727 regulator-name = "CAM_ISP_SEN_IO_1.8V"; 710 regulator-name = "CAM_ISP_SEN_IO_1.8V";
728 regulator-min-microvolt = <1800000>; 711 regulator-min-microvolt = <1800000>;
729 regulator-max-microvolt = <1800000>; 712 regulator-max-microvolt = <1800000>;
730 }; 713 };
731 714
732 ldo19_reg: ldo19 { 715 ldo19_reg: LDO19 {
733 regulator-compatible = "LDO19";
734 regulator-name = "VT_CAM_1.8V"; 716 regulator-name = "VT_CAM_1.8V";
735 regulator-min-microvolt = <1800000>; 717 regulator-min-microvolt = <1800000>;
736 regulator-max-microvolt = <1800000>; 718 regulator-max-microvolt = <1800000>;
737 }; 719 };
738 720
739 ldo20_reg: ldo20 { 721 ldo20_reg: LDO20 {
740 regulator-compatible = "LDO20";
741 regulator-name = "VDDQ_PRE_1.8V"; 722 regulator-name = "VDDQ_PRE_1.8V";
742 regulator-min-microvolt = <1800000>; 723 regulator-min-microvolt = <1800000>;
743 regulator-max-microvolt = <1800000>; 724 regulator-max-microvolt = <1800000>;
744 }; 725 };
745 726
746 ldo21_reg: ldo21 { 727 ldo21_reg: LDO21 {
747 regulator-compatible = "LDO21";
748 regulator-name = "VTF_2.8V"; 728 regulator-name = "VTF_2.8V";
749 regulator-min-microvolt = <2800000>; 729 regulator-min-microvolt = <2800000>;
750 regulator-max-microvolt = <2800000>; 730 regulator-max-microvolt = <2800000>;
751 maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>; 731 maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>;
752 }; 732 };
753 733
754 ldo22_reg: ldo22 { 734 ldo22_reg: LDO22 {
755 regulator-compatible = "LDO22";
756 regulator-name = "VMEM_VDD_2.8V"; 735 regulator-name = "VMEM_VDD_2.8V";
757 regulator-min-microvolt = <2800000>; 736 regulator-min-microvolt = <2800000>;
758 regulator-max-microvolt = <2800000>; 737 regulator-max-microvolt = <2800000>;
759 maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; 738 maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
760 }; 739 };
761 740
762 ldo23_reg: ldo23 { 741 ldo23_reg: LDO23 {
763 regulator-compatible = "LDO23";
764 regulator-name = "TSP_AVDD_3.3V"; 742 regulator-name = "TSP_AVDD_3.3V";
765 regulator-min-microvolt = <3300000>; 743 regulator-min-microvolt = <3300000>;
766 regulator-max-microvolt = <3300000>; 744 regulator-max-microvolt = <3300000>;
767 }; 745 };
768 746
769 ldo24_reg: ldo24 { 747 ldo24_reg: LDO24 {
770 regulator-compatible = "LDO24";
771 regulator-name = "TSP_VDD_1.8V"; 748 regulator-name = "TSP_VDD_1.8V";
772 regulator-min-microvolt = <1800000>; 749 regulator-min-microvolt = <1800000>;
773 regulator-max-microvolt = <1800000>; 750 regulator-max-microvolt = <1800000>;
774 }; 751 };
775 752
776 ldo25_reg: ldo25 { 753 ldo25_reg: LDO25 {
777 regulator-compatible = "LDO25";
778 regulator-name = "LCD_VCC_3.3V"; 754 regulator-name = "LCD_VCC_3.3V";
779 regulator-min-microvolt = <2800000>; 755 regulator-min-microvolt = <2800000>;
780 regulator-max-microvolt = <2800000>; 756 regulator-max-microvolt = <2800000>;
781 }; 757 };
782 758
783 ldo26_reg: ldo26 { 759 ldo26_reg: LDO26 {
784 regulator-compatible = "LDO26";
785 regulator-name = "MOTOR_VCC_3.0V"; 760 regulator-name = "MOTOR_VCC_3.0V";
786 regulator-min-microvolt = <3000000>; 761 regulator-min-microvolt = <3000000>;
787 regulator-max-microvolt = <3000000>; 762 regulator-max-microvolt = <3000000>;
788 }; 763 };
789 764
790 buck1_reg: buck1 { 765 buck1_reg: BUCK1 {
791 regulator-compatible = "BUCK1";
792 regulator-name = "vdd_mif"; 766 regulator-name = "vdd_mif";
793 regulator-min-microvolt = <850000>; 767 regulator-min-microvolt = <850000>;
794 regulator-max-microvolt = <1100000>; 768 regulator-max-microvolt = <1100000>;
@@ -799,8 +773,7 @@
799 }; 773 };
800 }; 774 };
801 775
802 buck2_reg: buck2 { 776 buck2_reg: BUCK2 {
803 regulator-compatible = "BUCK2";
804 regulator-name = "vdd_arm"; 777 regulator-name = "vdd_arm";
805 regulator-min-microvolt = <850000>; 778 regulator-min-microvolt = <850000>;
806 regulator-max-microvolt = <1500000>; 779 regulator-max-microvolt = <1500000>;
@@ -811,8 +784,7 @@
811 }; 784 };
812 }; 785 };
813 786
814 buck3_reg: buck3 { 787 buck3_reg: BUCK3 {
815 regulator-compatible = "BUCK3";
816 regulator-name = "vdd_int"; 788 regulator-name = "vdd_int";
817 regulator-min-microvolt = <850000>; 789 regulator-min-microvolt = <850000>;
818 regulator-max-microvolt = <1150000>; 790 regulator-max-microvolt = <1150000>;
@@ -823,8 +795,7 @@
823 }; 795 };
824 }; 796 };
825 797
826 buck4_reg: buck4 { 798 buck4_reg: BUCK4 {
827 regulator-compatible = "BUCK4";
828 regulator-name = "vdd_g3d"; 799 regulator-name = "vdd_g3d";
829 regulator-min-microvolt = <850000>; 800 regulator-min-microvolt = <850000>;
830 regulator-max-microvolt = <1150000>; 801 regulator-max-microvolt = <1150000>;
@@ -834,40 +805,35 @@
834 }; 805 };
835 }; 806 };
836 807
837 buck5_reg: buck5 { 808 buck5_reg: BUCK5 {
838 regulator-compatible = "BUCK5";
839 regulator-name = "VMEM_1.2V_AP"; 809 regulator-name = "VMEM_1.2V_AP";
840 regulator-min-microvolt = <1200000>; 810 regulator-min-microvolt = <1200000>;
841 regulator-max-microvolt = <1200000>; 811 regulator-max-microvolt = <1200000>;
842 regulator-always-on; 812 regulator-always-on;
843 }; 813 };
844 814
845 buck6_reg: buck6 { 815 buck6_reg: BUCK6 {
846 regulator-compatible = "BUCK6";
847 regulator-name = "VCC_SUB_1.35V"; 816 regulator-name = "VCC_SUB_1.35V";
848 regulator-min-microvolt = <1350000>; 817 regulator-min-microvolt = <1350000>;
849 regulator-max-microvolt = <1350000>; 818 regulator-max-microvolt = <1350000>;
850 regulator-always-on; 819 regulator-always-on;
851 }; 820 };
852 821
853 buck7_reg: buck7 { 822 buck7_reg: BUCK7 {
854 regulator-compatible = "BUCK7";
855 regulator-name = "VCC_SUB_2.0V"; 823 regulator-name = "VCC_SUB_2.0V";
856 regulator-min-microvolt = <2000000>; 824 regulator-min-microvolt = <2000000>;
857 regulator-max-microvolt = <2000000>; 825 regulator-max-microvolt = <2000000>;
858 regulator-always-on; 826 regulator-always-on;
859 }; 827 };
860 828
861 buck8_reg: buck8 { 829 buck8_reg: BUCK8 {
862 regulator-compatible = "BUCK8";
863 regulator-name = "VMEM_VDDF_3.0V"; 830 regulator-name = "VMEM_VDDF_3.0V";
864 regulator-min-microvolt = <2850000>; 831 regulator-min-microvolt = <2850000>;
865 regulator-max-microvolt = <2850000>; 832 regulator-max-microvolt = <2850000>;
866 maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; 833 maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
867 }; 834 };
868 835
869 buck9_reg: buck9 { 836 buck9_reg: BUCK9 {
870 regulator-compatible = "BUCK9";
871 regulator-name = "CAM_ISP_CORE_1.2V"; 837 regulator-name = "CAM_ISP_CORE_1.2V";
872 regulator-min-microvolt = <1000000>; 838 regulator-min-microvolt = <1000000>;
873 regulator-max-microvolt = <1200000>; 839 regulator-max-microvolt = <1200000>;
@@ -1276,7 +1242,7 @@
1276 1242
1277&sdhci_2 { 1243&sdhci_2 {
1278 bus-width = <4>; 1244 bus-width = <4>;
1279 cd-gpios = <&gpx3 4 0>; 1245 cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
1280 cd-inverted; 1246 cd-inverted;
1281 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; 1247 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
1282 pinctrl-names = "default"; 1248 pinctrl-names = "default";
@@ -1303,7 +1269,7 @@
1303&spi_1 { 1269&spi_1 {
1304 pinctrl-names = "default"; 1270 pinctrl-names = "default";
1305 pinctrl-0 = <&spi1_bus>; 1271 pinctrl-0 = <&spi1_bus>;
1306 cs-gpios = <&gpb 5 0>; 1272 cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>;
1307 status = "okay"; 1273 status = "okay";
1308 1274
1309 s5c73m3_spi: s5c73m3 { 1275 s5c73m3_spi: s5c73m3 {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index ca0e3c15977f..294cfe40388d 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -98,6 +98,7 @@
98 opp-hz = /bits/ 64 <800000000>; 98 opp-hz = /bits/ 64 <800000000>;
99 opp-microvolt = <1000000>; 99 opp-microvolt = <1000000>;
100 clock-latency-ns = <200000>; 100 clock-latency-ns = <200000>;
101 opp-suspend;
101 }; 102 };
102 opp07 { 103 opp07 {
103 opp-hz = /bits/ 64 <900000000>; 104 opp-hz = /bits/ 64 <900000000>;
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index db3f65f3eb45..c000532c1444 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -129,10 +129,6 @@
129 samsung,color-depth = <1>; 129 samsung,color-depth = <1>;
130 samsung,link-rate = <0x0a>; 130 samsung,link-rate = <0x0a>;
131 samsung,lane-count = <4>; 131 samsung,lane-count = <4>;
132};
133
134&fimd {
135 status = "okay";
136 132
137 display-timings { 133 display-timings {
138 native-mode = <&timing0>; 134 native-mode = <&timing0>;
@@ -152,6 +148,10 @@
152 }; 148 };
153}; 149};
154 150
151&fimd {
152 status = "okay";
153};
154
155&hdmi { 155&hdmi {
156 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_LOW>; 156 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_LOW>;
157 vdd_osc-supply = <&ldo10_reg>; 157 vdd_osc-supply = <&ldo10_reg>;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 15aea760c1da..66da0d1d9d8a 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -89,14 +89,6 @@
89 pinctrl-names = "default"; 89 pinctrl-names = "default";
90 pinctrl-0 = <&dp_hpd>; 90 pinctrl-0 = <&dp_hpd>;
91 status = "okay"; 91 status = "okay";
92};
93
94&ehci {
95 samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
96};
97
98&fimd {
99 status = "okay";
100 92
101 display-timings { 93 display-timings {
102 native-mode = <&timing0>; 94 native-mode = <&timing0>;
@@ -116,6 +108,14 @@
116 }; 108 };
117}; 109};
118 110
111&ehci {
112 samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
113};
114
115&fimd {
116 status = "okay";
117};
118
119&hdmi { 119&hdmi {
120 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 120 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
121}; 121};
diff --git a/arch/arm/boot/dts/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
new file mode 100644
index 000000000000..0a7f408824d8
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
@@ -0,0 +1,684 @@
1/*
2 * Google Snow board device tree source
3 *
4 * Copyright (c) 2012 Google, Inc
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/clock/maxim,max77686.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/input/input.h>
15#include "exynos5250.dtsi"
16
17/ {
18 aliases {
19 i2c104 = &i2c_104;
20 };
21
22 memory {
23 reg = <0x40000000 0x80000000>;
24 };
25
26 chosen {
27 bootargs = "console=tty1";
28 stdout-path = "serial3:115200n8";
29 };
30
31 gpio-keys {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&power_key_irq &lid_irq>;
35
36 power {
37 label = "Power";
38 gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
39 linux,code = <KEY_POWER>;
40 gpio-key,wakeup;
41 };
42
43 lid-switch {
44 label = "Lid";
45 gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
46 linux,input-type = <5>; /* EV_SW */
47 linux,code = <0>; /* SW_LID */
48 debounce-interval = <1>;
49 gpio-key,wakeup;
50 };
51 };
52
53 vbat: vbat-fixed-regulator {
54 compatible = "regulator-fixed";
55 regulator-name = "vbat-supply";
56 regulator-boot-on;
57 };
58
59 i2c-arbitrator {
60 compatible = "i2c-arb-gpio-challenge";
61 #address-cells = <1>;
62 #size-cells = <0>;
63
64 i2c-parent = <&{/i2c@12CA0000}>;
65
66 our-claim-gpio = <&gpf0 3 GPIO_ACTIVE_LOW>;
67 their-claim-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>;
68 slew-delay-us = <10>;
69 wait-retry-us = <3000>;
70 wait-free-us = <50000>;
71
72 pinctrl-names = "default";
73 pinctrl-0 = <&arb_our_claim &arb_their_claim>;
74
75 /* Use ID 104 as a hint that we're on physical bus 4 */
76 i2c_104: i2c@0 {
77 reg = <0>;
78 #address-cells = <1>;
79 #size-cells = <0>;
80
81 battery: sbs-battery@b {
82 compatible = "sbs,sbs-battery";
83 reg = <0xb>;
84 sbs,poll-retry-count = <1>;
85 };
86
87 cros_ec: embedded-controller {
88 compatible = "google,cros-ec-i2c";
89 reg = <0x1e>;
90 interrupts = <6 IRQ_TYPE_NONE>;
91 interrupt-parent = <&gpx1>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&ec_irq>;
94 wakeup-source;
95 };
96
97 power-regulator {
98 compatible = "ti,tps65090";
99 reg = <0x48>;
100
101 /*
102 * Config irq to disable internal pulls
103 * even though we run in polling mode.
104 */
105 pinctrl-names = "default";
106 pinctrl-0 = <&tps65090_irq>;
107
108 vsys1-supply = <&vbat>;
109 vsys2-supply = <&vbat>;
110 vsys3-supply = <&vbat>;
111 infet1-supply = <&vbat>;
112 infet2-supply = <&vbat>;
113 infet3-supply = <&vbat>;
114 infet4-supply = <&vbat>;
115 infet5-supply = <&vbat>;
116 infet6-supply = <&vbat>;
117 infet7-supply = <&vbat>;
118 vsys-l1-supply = <&vbat>;
119 vsys-l2-supply = <&vbat>;
120
121 regulators {
122 dcdc1 {
123 ti,enable-ext-control;
124 };
125 dcdc2 {
126 ti,enable-ext-control;
127 };
128 dcdc3 {
129 ti,enable-ext-control;
130 };
131 fet1: fet1 {
132 regulator-name = "vcd_led";
133 ti,overcurrent-wait = <3>;
134 };
135 tps65090_fet2: fet2 {
136 regulator-name = "video_mid";
137 regulator-always-on;
138 ti,overcurrent-wait = <3>;
139 };
140 fet3 {
141 regulator-name = "wwan_r";
142 regulator-always-on;
143 ti,overcurrent-wait = <3>;
144 };
145 fet4 {
146 regulator-name = "sdcard";
147 ti,overcurrent-wait = <3>;
148 };
149 fet5 {
150 regulator-name = "camout";
151 regulator-always-on;
152 ti,overcurrent-wait = <3>;
153 };
154 fet6: fet6 {
155 regulator-name = "lcd_vdd";
156 ti,overcurrent-wait = <3>;
157 };
158 tps65090_fet7: fet7 {
159 regulator-name = "video_mid_1a";
160 regulator-always-on;
161 ti,overcurrent-wait = <3>;
162 };
163 ldo1 {
164 };
165 ldo2 {
166 };
167 };
168
169 charger {
170 compatible = "ti,tps65090-charger";
171 };
172 };
173 };
174 };
175
176 sound {
177 samsung,i2s-controller = <&i2s0>;
178 };
179
180 usb3_vbus_reg: regulator-usb3 {
181 compatible = "regulator-fixed";
182 regulator-name = "P5.0V_USB3CON";
183 regulator-min-microvolt = <5000000>;
184 regulator-max-microvolt = <5000000>;
185 gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
186 pinctrl-names = "default";
187 pinctrl-0 = <&usb3_vbus_en>;
188 enable-active-high;
189 };
190
191 fixed-rate-clocks {
192 xxti {
193 compatible = "samsung,clock-xxti";
194 clock-frequency = <24000000>;
195 };
196 };
197
198 backlight: backlight {
199 compatible = "pwm-backlight";
200 pwms = <&pwm 0 1000000 0>;
201 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
202 default-brightness-level = <7>;
203 enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
204 power-supply = <&fet1>;
205 pinctrl-0 = <&pwm0_out>;
206 pinctrl-names = "default";
207 };
208
209 panel: panel {
210 compatible = "auo,b116xw03";
211 power-supply = <&fet6>;
212 backlight = <&backlight>;
213
214 port {
215 panel_in: endpoint {
216 remote-endpoint = <&bridge_out>;
217 };
218 };
219 };
220
221 mmc3_pwrseq: mmc3_pwrseq {
222 compatible = "mmc-pwrseq-simple";
223 reset-gpios = <&gpx0 2 GPIO_ACTIVE_LOW>, /* WIFI_RSTn */
224 <&gpx0 1 GPIO_ACTIVE_LOW>; /* WIFI_EN */
225 clocks = <&max77686 MAX77686_CLK_PMIC>;
226 clock-names = "ext_clock";
227 };
228};
229
230&cpu0 {
231 cpu0-supply = <&buck2_reg>;
232};
233
234&dp {
235 status = "okay";
236 pinctrl-names = "default";
237 pinctrl-0 = <&dp_hpd>;
238 samsung,color-space = <0>;
239 samsung,dynamic-range = <0>;
240 samsung,ycbcr-coeff = <0>;
241 samsung,color-depth = <1>;
242 samsung,link-rate = <0x0a>;
243 samsung,lane-count = <2>;
244 samsung,hpd-gpio = <&gpx0 7 GPIO_ACTIVE_HIGH>;
245
246 ports {
247 port@0 {
248 dp_out: endpoint {
249 remote-endpoint = <&bridge_in>;
250 };
251 };
252 };
253};
254
255&ehci {
256 samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
257};
258
259&fimd {
260 status = "okay";
261 samsung,invert-vclk;
262};
263
264&hdmi {
265 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
266 pinctrl-names = "default";
267 pinctrl-0 = <&hdmi_hpd_irq>;
268 phy = <&hdmiphy>;
269 ddc = <&i2c_2>;
270 hdmi-en-supply = <&tps65090_fet7>;
271 vdd-supply = <&ldo8_reg>;
272 vdd_osc-supply = <&ldo10_reg>;
273 vdd_pll-supply = <&ldo8_reg>;
274};
275
276&i2c_0 {
277 status = "okay";
278 samsung,i2c-sda-delay = <100>;
279 samsung,i2c-max-bus-freq = <378000>;
280
281 max77686: max77686@09 {
282 compatible = "maxim,max77686";
283 interrupt-parent = <&gpx3>;
284 interrupts = <2 IRQ_TYPE_NONE>;
285 pinctrl-names = "default";
286 pinctrl-0 = <&max77686_irq>;
287 wakeup-source;
288 reg = <0x09>;
289 #clock-cells = <1>;
290
291 voltage-regulators {
292 ldo1_reg: LDO1 {
293 regulator-name = "P1.0V_LDO_OUT1";
294 regulator-min-microvolt = <1000000>;
295 regulator-max-microvolt = <1000000>;
296 regulator-always-on;
297 };
298
299 ldo2_reg: LDO2 {
300 regulator-name = "P1.8V_LDO_OUT2";
301 regulator-min-microvolt = <1800000>;
302 regulator-max-microvolt = <1800000>;
303 regulator-always-on;
304 };
305
306 ldo3_reg: LDO3 {
307 regulator-name = "P1.8V_LDO_OUT3";
308 regulator-min-microvolt = <1800000>;
309 regulator-max-microvolt = <1800000>;
310 regulator-always-on;
311 };
312
313 ldo7_reg: LDO7 {
314 regulator-name = "P1.1V_LDO_OUT7";
315 regulator-min-microvolt = <1100000>;
316 regulator-max-microvolt = <1100000>;
317 regulator-always-on;
318 };
319
320 ldo8_reg: LDO8 {
321 regulator-name = "P1.0V_LDO_OUT8";
322 regulator-min-microvolt = <1000000>;
323 regulator-max-microvolt = <1000000>;
324 regulator-always-on;
325 };
326
327 ldo10_reg: LDO10 {
328 regulator-name = "P1.8V_LDO_OUT10";
329 regulator-min-microvolt = <1800000>;
330 regulator-max-microvolt = <1800000>;
331 regulator-always-on;
332 };
333
334 ldo12_reg: LDO12 {
335 regulator-name = "P3.0V_LDO_OUT12";
336 regulator-min-microvolt = <3000000>;
337 regulator-max-microvolt = <3000000>;
338 regulator-always-on;
339 };
340
341 ldo14_reg: LDO14 {
342 regulator-name = "P1.8V_LDO_OUT14";
343 regulator-min-microvolt = <1800000>;
344 regulator-max-microvolt = <1800000>;
345 regulator-always-on;
346 };
347
348 ldo15_reg: LDO15 {
349 regulator-name = "P1.0V_LDO_OUT15";
350 regulator-min-microvolt = <1000000>;
351 regulator-max-microvolt = <1000000>;
352 regulator-always-on;
353 };
354
355 ldo16_reg: LDO16 {
356 regulator-name = "P1.8V_LDO_OUT16";
357 regulator-min-microvolt = <1800000>;
358 regulator-max-microvolt = <1800000>;
359 regulator-always-on;
360 };
361
362 buck1_reg: BUCK1 {
363 regulator-name = "vdd_mif";
364 regulator-min-microvolt = <950000>;
365 regulator-max-microvolt = <1300000>;
366 regulator-always-on;
367 regulator-boot-on;
368 };
369
370 buck2_reg: BUCK2 {
371 regulator-name = "vdd_arm";
372 regulator-min-microvolt = <850000>;
373 regulator-max-microvolt = <1350000>;
374 regulator-always-on;
375 regulator-boot-on;
376 };
377
378 buck3_reg: BUCK3 {
379 regulator-name = "vdd_int";
380 regulator-min-microvolt = <900000>;
381 regulator-max-microvolt = <1200000>;
382 regulator-always-on;
383 regulator-boot-on;
384 };
385
386 buck4_reg: BUCK4 {
387 regulator-name = "vdd_g3d";
388 regulator-min-microvolt = <850000>;
389 regulator-max-microvolt = <1300000>;
390 regulator-always-on;
391 regulator-boot-on;
392 };
393
394 buck5_reg: BUCK5 {
395 regulator-name = "P1.8V_BUCK_OUT5";
396 regulator-min-microvolt = <1800000>;
397 regulator-max-microvolt = <1800000>;
398 regulator-always-on;
399 regulator-boot-on;
400 };
401
402 buck6_reg: BUCK6 {
403 regulator-name = "P1.35V_BUCK_OUT6";
404 regulator-min-microvolt = <1350000>;
405 regulator-max-microvolt = <1350000>;
406 regulator-always-on;
407 };
408
409 buck7_reg: BUCK7 {
410 regulator-name = "P2.0V_BUCK_OUT7";
411 regulator-min-microvolt = <2000000>;
412 regulator-max-microvolt = <2000000>;
413 regulator-always-on;
414 };
415
416 buck8_reg: BUCK8 {
417 regulator-name = "P2.85V_BUCK_OUT8";
418 regulator-min-microvolt = <2850000>;
419 regulator-max-microvolt = <2850000>;
420 regulator-always-on;
421 };
422 };
423 };
424};
425
426&i2c_1 {
427 status = "okay";
428 samsung,i2c-sda-delay = <100>;
429 samsung,i2c-max-bus-freq = <378000>;
430
431 trackpad {
432 reg = <0x67>;
433 compatible = "cypress,cyapa";
434 interrupts = <2 IRQ_TYPE_NONE>;
435 interrupt-parent = <&gpx1>;
436 wakeup-source;
437 };
438};
439
440/*
441 * Disabled pullups since external part has its own pullups and
442 * double-pulling gets us out of spec in some cases.
443 */
444&i2c2_bus {
445 samsung,pin-pud = <0>;
446};
447
448&i2c_2 {
449 status = "okay";
450 samsung,i2c-sda-delay = <100>;
451 samsung,i2c-max-bus-freq = <66000>;
452
453 hdmiddc@50 {
454 compatible = "samsung,exynos4210-hdmiddc";
455 reg = <0x50>;
456 };
457};
458
459&i2c_3 {
460 status = "okay";
461 samsung,i2c-sda-delay = <100>;
462 samsung,i2c-max-bus-freq = <66000>;
463};
464
465&i2c_4 {
466 status = "okay";
467 samsung,i2c-sda-delay = <100>;
468 samsung,i2c-max-bus-freq = <66000>;
469};
470
471&i2c_5 {
472 status = "okay";
473 samsung,i2c-sda-delay = <100>;
474 samsung,i2c-max-bus-freq = <66000>;
475};
476
477&i2c_7 {
478 status = "okay";
479 samsung,i2c-sda-delay = <100>;
480 samsung,i2c-max-bus-freq = <66000>;
481
482 ptn3460: lvds-bridge@20 {
483 compatible = "nxp,ptn3460";
484 reg = <0x20>;
485 powerdown-gpios = <&gpy2 5 GPIO_ACTIVE_HIGH>;
486 reset-gpios = <&gpx1 5 GPIO_ACTIVE_HIGH>;
487 edid-emulation = <5>;
488
489 ports {
490 port@0 {
491 bridge_out: endpoint {
492 remote-endpoint = <&panel_in>;
493 };
494 };
495
496 port@1 {
497 bridge_in: endpoint {
498 remote-endpoint = <&dp_out>;
499 };
500 };
501 };
502 };
503};
504
505&i2c_8 {
506 status = "okay";
507 samsung,i2c-sda-delay = <100>;
508 samsung,i2c-max-bus-freq = <378000>;
509
510 hdmiphy: hdmiphy@38 {
511 compatible = "samsung,exynos4212-hdmiphy";
512 reg = <0x38>;
513 };
514};
515
516&i2s0 {
517 status = "okay";
518};
519
520&mmc_0 {
521 status = "okay";
522 num-slots = <1>;
523 broken-cd;
524 card-detect-delay = <200>;
525 samsung,dw-mshc-ciu-div = <3>;
526 samsung,dw-mshc-sdr-timing = <2 3>;
527 samsung,dw-mshc-ddr-timing = <1 2>;
528 pinctrl-names = "default";
529 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>;
530 bus-width = <8>;
531 cap-mmc-highspeed;
532};
533
534&mmc_2 {
535 status = "okay";
536 num-slots = <1>;
537 card-detect-delay = <200>;
538 samsung,dw-mshc-ciu-div = <3>;
539 samsung,dw-mshc-sdr-timing = <2 3>;
540 samsung,dw-mshc-ddr-timing = <1 2>;
541 pinctrl-names = "default";
542 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
543 bus-width = <4>;
544 wp-gpios = <&gpc2 1 GPIO_ACTIVE_HIGH>;
545 cap-sd-highspeed;
546};
547
548/*
549 * On Snow we've got SIP WiFi and so can keep drive strengths low to
550 * reduce EMI.
551 */
552&mmc_3 {
553 status = "okay";
554 num-slots = <1>;
555 broken-cd;
556 cap-sdio-irq;
557 keep-power-in-suspend;
558 card-detect-delay = <200>;
559 samsung,dw-mshc-ciu-div = <3>;
560 samsung,dw-mshc-sdr-timing = <2 3>;
561 samsung,dw-mshc-ddr-timing = <1 2>;
562 pinctrl-names = "default";
563 pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4 &wifi_en &wifi_rst>;
564 bus-width = <4>;
565 cap-sd-highspeed;
566 mmc-pwrseq = <&mmc3_pwrseq>;
567};
568
569&pinctrl_0 {
570 wifi_en: wifi-en {
571 samsung,pins = "gpx0-1";
572 samsung,pin-function = <1>;
573 samsung,pin-pud = <0>;
574 samsung,pin-drv = <0>;
575 };
576
577 wifi_rst: wifi-rst {
578 samsung,pins = "gpx0-2";
579 samsung,pin-function = <1>;
580 samsung,pin-pud = <0>;
581 samsung,pin-drv = <0>;
582 };
583
584 power_key_irq: power-key-irq {
585 samsung,pins = "gpx1-3";
586 samsung,pin-function = <0xf>;
587 samsung,pin-pud = <0>;
588 samsung,pin-drv = <0>;
589 };
590
591 ec_irq: ec-irq {
592 samsung,pins = "gpx1-6";
593 samsung,pin-function = <0>;
594 samsung,pin-pud = <0>;
595 samsung,pin-drv = <0>;
596 };
597
598 tps65090_irq: tps65090-irq {
599 samsung,pins = "gpx2-6";
600 samsung,pin-function = <0>;
601 samsung,pin-pud = <0>;
602 samsung,pin-drv = <0>;
603 };
604
605 usb3_vbus_en: usb3-vbus-en {
606 samsung,pins = "gpx2-7";
607 samsung,pin-function = <1>;
608 samsung,pin-pud = <0>;
609 samsung,pin-drv = <0>;
610 };
611
612 max77686_irq: max77686-irq {
613 samsung,pins = "gpx3-2";
614 samsung,pin-function = <0>;
615 samsung,pin-pud = <0>;
616 samsung,pin-drv = <0>;
617 };
618
619 lid_irq: lid-irq {
620 samsung,pins = "gpx3-5";
621 samsung,pin-function = <0xf>;
622 samsung,pin-pud = <0>;
623 samsung,pin-drv = <0>;
624 };
625
626 hdmi_hpd_irq: hdmi-hpd-irq {
627 samsung,pins = "gpx3-7";
628 samsung,pin-function = <0>;
629 samsung,pin-pud = <1>;
630 samsung,pin-drv = <0>;
631 };
632};
633
634&pinctrl_1 {
635 arb_their_claim: arb-their-claim {
636 samsung,pins = "gpe0-4";
637 samsung,pin-function = <0>;
638 samsung,pin-pud = <3>;
639 samsung,pin-drv = <0>;
640 };
641
642 arb_our_claim: arb-our-claim {
643 samsung,pins = "gpf0-3";
644 samsung,pin-function = <1>;
645 samsung,pin-pud = <0>;
646 samsung,pin-drv = <0>;
647 };
648};
649
650&rtc {
651 status = "okay";
652 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
653 clock-names = "rtc", "rtc_src";
654};
655
656&sd3_bus4 {
657 samsung,pin-drv = <0>;
658};
659
660&sd3_clk {
661 samsung,pin-drv = <0>;
662};
663
664&sd3_cmd {
665 samsung,pin-pud = <3>;
666 samsung,pin-drv = <0>;
667};
668
669&spi_1 {
670 status = "okay";
671 samsung,spi-src-clk = <0>;
672 num-cs = <1>;
673 cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>;
674};
675
676&usbdrd_dwc3 {
677 dr_mode = "host";
678};
679
680&usbdrd_phy {
681 vbus-supply = <&usb3_vbus_reg>;
682};
683
684#include "cros-ec-keyboard.dtsi"
diff --git a/arch/arm/boot/dts/exynos5250-snow-rev5.dts b/arch/arm/boot/dts/exynos5250-snow-rev5.dts
new file mode 100644
index 000000000000..f811dc800660
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-snow-rev5.dts
@@ -0,0 +1,47 @@
1/*
2 * Google Snow Rev 5+ board device tree source
3 *
4 * Copyright (c) 2012 Google, Inc
5 * Copyright (c) 2015 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/dts-v1/;
14#include "exynos5250-snow-common.dtsi"
15
16/ {
17 model = "Google Snow Rev 5+";
18 compatible = "google,snow-rev5", "samsung,exynos5250",
19 "samsung,exynos5";
20
21 sound {
22 compatible = "google,snow-audio-max98090";
23
24 samsung,model = "Snow-I2S-MAX98090";
25 samsung,audio-codec = <&max98090>;
26 };
27};
28
29&i2c_7 {
30 max98090: codec@10 {
31 compatible = "maxim,max98090";
32 reg = <0x10>;
33 interrupts = <4 IRQ_TYPE_NONE>;
34 interrupt-parent = <&gpx0>;
35 pinctrl-names = "default";
36 pinctrl-0 = <&max98090_irq>;
37 };
38};
39
40&pinctrl_0 {
41 max98090_irq: max98090-irq {
42 samsung,pins = "gpx0-4";
43 samsung,pin-function = <0>;
44 samsung,pin-pud = <0>;
45 samsung,pin-drv = <0>;
46 };
47};
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index 0720caab5511..995c7ce6c12b 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -9,698 +9,35 @@
9 */ 9 */
10 10
11/dts-v1/; 11/dts-v1/;
12#include <dt-bindings/gpio/gpio.h> 12#include "exynos5250-snow-common.dtsi"
13#include <dt-bindings/clock/maxim,max77686.h>
14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/input/input.h>
16#include "exynos5250.dtsi"
17 13
18/ { 14/ {
19 model = "Google Snow"; 15 model = "Google Snow";
20 compatible = "google,snow", "samsung,exynos5250", "samsung,exynos5"; 16 compatible = "google,snow-rev4", "google,snow", "samsung,exynos5250",
21 17 "samsung,exynos5";
22 aliases {
23 i2c104 = &i2c_104;
24 };
25
26 memory {
27 reg = <0x40000000 0x80000000>;
28 };
29
30 chosen {
31 bootargs = "console=tty1";
32 stdout-path = "serial3:115200n8";
33 };
34
35 gpio-keys {
36 compatible = "gpio-keys";
37 pinctrl-names = "default";
38 pinctrl-0 = <&power_key_irq &lid_irq>;
39
40 power {
41 label = "Power";
42 gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
43 linux,code = <KEY_POWER>;
44 gpio-key,wakeup;
45 };
46
47 lid-switch {
48 label = "Lid";
49 gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
50 linux,input-type = <5>; /* EV_SW */
51 linux,code = <0>; /* SW_LID */
52 debounce-interval = <1>;
53 gpio-key,wakeup;
54 };
55 };
56
57 vbat: vbat-fixed-regulator {
58 compatible = "regulator-fixed";
59 regulator-name = "vbat-supply";
60 regulator-boot-on;
61 };
62
63 i2c-arbitrator {
64 compatible = "i2c-arb-gpio-challenge";
65 #address-cells = <1>;
66 #size-cells = <0>;
67
68 i2c-parent = <&{/i2c@12CA0000}>;
69
70 our-claim-gpio = <&gpf0 3 GPIO_ACTIVE_LOW>;
71 their-claim-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>;
72 slew-delay-us = <10>;
73 wait-retry-us = <3000>;
74 wait-free-us = <50000>;
75
76 pinctrl-names = "default";
77 pinctrl-0 = <&arb_our_claim &arb_their_claim>;
78
79 /* Use ID 104 as a hint that we're on physical bus 4 */
80 i2c_104: i2c@0 {
81 reg = <0>;
82 #address-cells = <1>;
83 #size-cells = <0>;
84
85 battery: sbs-battery@b {
86 compatible = "sbs,sbs-battery";
87 reg = <0xb>;
88 sbs,poll-retry-count = <1>;
89 };
90
91 cros_ec: embedded-controller {
92 compatible = "google,cros-ec-i2c";
93 reg = <0x1e>;
94 interrupts = <6 IRQ_TYPE_NONE>;
95 interrupt-parent = <&gpx1>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&ec_irq>;
98 wakeup-source;
99 };
100
101 power-regulator {
102 compatible = "ti,tps65090";
103 reg = <0x48>;
104
105 /*
106 * Config irq to disable internal pulls
107 * even though we run in polling mode.
108 */
109 pinctrl-names = "default";
110 pinctrl-0 = <&tps65090_irq>;
111
112 vsys1-supply = <&vbat>;
113 vsys2-supply = <&vbat>;
114 vsys3-supply = <&vbat>;
115 infet1-supply = <&vbat>;
116 infet2-supply = <&vbat>;
117 infet3-supply = <&vbat>;
118 infet4-supply = <&vbat>;
119 infet5-supply = <&vbat>;
120 infet6-supply = <&vbat>;
121 infet7-supply = <&vbat>;
122 vsys-l1-supply = <&vbat>;
123 vsys-l2-supply = <&vbat>;
124
125 regulators {
126 dcdc1 {
127 ti,enable-ext-control;
128 };
129 dcdc2 {
130 ti,enable-ext-control;
131 };
132 dcdc3 {
133 ti,enable-ext-control;
134 };
135 fet1: fet1 {
136 regulator-name = "vcd_led";
137 ti,overcurrent-wait = <3>;
138 };
139 tps65090_fet2: fet2 {
140 regulator-name = "video_mid";
141 regulator-always-on;
142 ti,overcurrent-wait = <3>;
143 };
144 fet3 {
145 regulator-name = "wwan_r";
146 regulator-always-on;
147 ti,overcurrent-wait = <3>;
148 };
149 fet4 {
150 regulator-name = "sdcard";
151 ti,overcurrent-wait = <3>;
152 };
153 fet5 {
154 regulator-name = "camout";
155 regulator-always-on;
156 ti,overcurrent-wait = <3>;
157 };
158 fet6: fet6 {
159 regulator-name = "lcd_vdd";
160 ti,overcurrent-wait = <3>;
161 };
162 tps65090_fet7: fet7 {
163 regulator-name = "video_mid_1a";
164 regulator-always-on;
165 ti,overcurrent-wait = <3>;
166 };
167 ldo1 {
168 };
169 ldo2 {
170 };
171 };
172
173 charger {
174 compatible = "ti,tps65090-charger";
175 };
176 };
177 };
178 };
179 18
180 sound { 19 sound {
181 compatible = "google,snow-audio-max98095"; 20 compatible = "google,snow-audio-max98095";
182 21
183 samsung,model = "Snow-I2S-MAX98095"; 22 samsung,model = "Snow-I2S-MAX98095";
184 samsung,i2s-controller = <&i2s0>;
185 samsung,audio-codec = <&max98095>; 23 samsung,audio-codec = <&max98095>;
186 }; 24 };
187
188 usb3_vbus_reg: regulator-usb3 {
189 compatible = "regulator-fixed";
190 regulator-name = "P5.0V_USB3CON";
191 regulator-min-microvolt = <5000000>;
192 regulator-max-microvolt = <5000000>;
193 gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
194 pinctrl-names = "default";
195 pinctrl-0 = <&usb3_vbus_en>;
196 enable-active-high;
197 };
198
199 fixed-rate-clocks {
200 xxti {
201 compatible = "samsung,clock-xxti";
202 clock-frequency = <24000000>;
203 };
204 };
205
206 backlight: backlight {
207 compatible = "pwm-backlight";
208 pwms = <&pwm 0 1000000 0>;
209 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
210 default-brightness-level = <7>;
211 enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
212 power-supply = <&fet1>;
213 pinctrl-0 = <&pwm0_out>;
214 pinctrl-names = "default";
215 };
216
217 panel: panel {
218 compatible = "auo,b116xw03";
219 power-supply = <&fet6>;
220 backlight = <&backlight>;
221
222 port {
223 panel_in: endpoint {
224 remote-endpoint = <&bridge_out>;
225 };
226 };
227 };
228
229 mmc3_pwrseq: mmc3_pwrseq {
230 compatible = "mmc-pwrseq-simple";
231 reset-gpios = <&gpx0 2 GPIO_ACTIVE_LOW>, /* WIFI_RSTn */
232 <&gpx0 1 GPIO_ACTIVE_LOW>; /* WIFI_EN */
233 clocks = <&max77686 MAX77686_CLK_PMIC>;
234 clock-names = "ext_clock";
235 };
236};
237
238&cpu0 {
239 cpu0-supply = <&buck2_reg>;
240};
241
242&dp {
243 status = "okay";
244 pinctrl-names = "default";
245 pinctrl-0 = <&dp_hpd>;
246 samsung,color-space = <0>;
247 samsung,dynamic-range = <0>;
248 samsung,ycbcr-coeff = <0>;
249 samsung,color-depth = <1>;
250 samsung,link-rate = <0x0a>;
251 samsung,lane-count = <2>;
252 samsung,hpd-gpio = <&gpx0 7 GPIO_ACTIVE_HIGH>;
253
254 ports {
255 port@0 {
256 dp_out: endpoint {
257 remote-endpoint = <&bridge_in>;
258 };
259 };
260 };
261};
262
263&ehci {
264 samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
265};
266
267&fimd {
268 status = "okay";
269 samsung,invert-vclk;
270};
271
272&hdmi {
273 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&hdmi_hpd_irq>;
276 phy = <&hdmiphy>;
277 ddc = <&i2c_2>;
278 hdmi-en-supply = <&tps65090_fet7>;
279 vdd-supply = <&ldo8_reg>;
280 vdd_osc-supply = <&ldo10_reg>;
281 vdd_pll-supply = <&ldo8_reg>;
282};
283
284&i2c_0 {
285 status = "okay";
286 samsung,i2c-sda-delay = <100>;
287 samsung,i2c-max-bus-freq = <378000>;
288
289 max77686: max77686@09 {
290 compatible = "maxim,max77686";
291 interrupt-parent = <&gpx3>;
292 interrupts = <2 IRQ_TYPE_NONE>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&max77686_irq>;
295 wakeup-source;
296 reg = <0x09>;
297 #clock-cells = <1>;
298
299 voltage-regulators {
300 ldo1_reg: LDO1 {
301 regulator-name = "P1.0V_LDO_OUT1";
302 regulator-min-microvolt = <1000000>;
303 regulator-max-microvolt = <1000000>;
304 regulator-always-on;
305 };
306
307 ldo2_reg: LDO2 {
308 regulator-name = "P1.8V_LDO_OUT2";
309 regulator-min-microvolt = <1800000>;
310 regulator-max-microvolt = <1800000>;
311 regulator-always-on;
312 };
313
314 ldo3_reg: LDO3 {
315 regulator-name = "P1.8V_LDO_OUT3";
316 regulator-min-microvolt = <1800000>;
317 regulator-max-microvolt = <1800000>;
318 regulator-always-on;
319 };
320
321 ldo7_reg: LDO7 {
322 regulator-name = "P1.1V_LDO_OUT7";
323 regulator-min-microvolt = <1100000>;
324 regulator-max-microvolt = <1100000>;
325 regulator-always-on;
326 };
327
328 ldo8_reg: LDO8 {
329 regulator-name = "P1.0V_LDO_OUT8";
330 regulator-min-microvolt = <1000000>;
331 regulator-max-microvolt = <1000000>;
332 regulator-always-on;
333 };
334
335 ldo10_reg: LDO10 {
336 regulator-name = "P1.8V_LDO_OUT10";
337 regulator-min-microvolt = <1800000>;
338 regulator-max-microvolt = <1800000>;
339 regulator-always-on;
340 };
341
342 ldo12_reg: LDO12 {
343 regulator-name = "P3.0V_LDO_OUT12";
344 regulator-min-microvolt = <3000000>;
345 regulator-max-microvolt = <3000000>;
346 regulator-always-on;
347 };
348
349 ldo14_reg: LDO14 {
350 regulator-name = "P1.8V_LDO_OUT14";
351 regulator-min-microvolt = <1800000>;
352 regulator-max-microvolt = <1800000>;
353 regulator-always-on;
354 };
355
356 ldo15_reg: LDO15 {
357 regulator-name = "P1.0V_LDO_OUT15";
358 regulator-min-microvolt = <1000000>;
359 regulator-max-microvolt = <1000000>;
360 regulator-always-on;
361 };
362
363 ldo16_reg: LDO16 {
364 regulator-name = "P1.8V_LDO_OUT16";
365 regulator-min-microvolt = <1800000>;
366 regulator-max-microvolt = <1800000>;
367 regulator-always-on;
368 };
369
370 buck1_reg: BUCK1 {
371 regulator-name = "vdd_mif";
372 regulator-min-microvolt = <950000>;
373 regulator-max-microvolt = <1300000>;
374 regulator-always-on;
375 regulator-boot-on;
376 };
377
378 buck2_reg: BUCK2 {
379 regulator-name = "vdd_arm";
380 regulator-min-microvolt = <850000>;
381 regulator-max-microvolt = <1350000>;
382 regulator-always-on;
383 regulator-boot-on;
384 };
385
386 buck3_reg: BUCK3 {
387 regulator-name = "vdd_int";
388 regulator-min-microvolt = <900000>;
389 regulator-max-microvolt = <1200000>;
390 regulator-always-on;
391 regulator-boot-on;
392 };
393
394 buck4_reg: BUCK4 {
395 regulator-name = "vdd_g3d";
396 regulator-min-microvolt = <850000>;
397 regulator-max-microvolt = <1300000>;
398 regulator-always-on;
399 regulator-boot-on;
400 };
401
402 buck5_reg: BUCK5 {
403 regulator-name = "P1.8V_BUCK_OUT5";
404 regulator-min-microvolt = <1800000>;
405 regulator-max-microvolt = <1800000>;
406 regulator-always-on;
407 regulator-boot-on;
408 };
409
410 buck6_reg: BUCK6 {
411 regulator-name = "P1.35V_BUCK_OUT6";
412 regulator-min-microvolt = <1350000>;
413 regulator-max-microvolt = <1350000>;
414 regulator-always-on;
415 };
416
417 buck7_reg: BUCK7 {
418 regulator-name = "P2.0V_BUCK_OUT7";
419 regulator-min-microvolt = <2000000>;
420 regulator-max-microvolt = <2000000>;
421 regulator-always-on;
422 };
423
424 buck8_reg: BUCK8 {
425 regulator-name = "P2.85V_BUCK_OUT8";
426 regulator-min-microvolt = <2850000>;
427 regulator-max-microvolt = <2850000>;
428 regulator-always-on;
429 };
430 };
431 };
432};
433
434&i2c_1 {
435 status = "okay";
436 samsung,i2c-sda-delay = <100>;
437 samsung,i2c-max-bus-freq = <378000>;
438
439 trackpad {
440 reg = <0x67>;
441 compatible = "cypress,cyapa";
442 interrupts = <2 IRQ_TYPE_NONE>;
443 interrupt-parent = <&gpx1>;
444 wakeup-source;
445 };
446};
447
448/*
449 * Disabled pullups since external part has its own pullups and
450 * double-pulling gets us out of spec in some cases.
451 */
452&i2c2_bus {
453 samsung,pin-pud = <0>;
454};
455
456&i2c_2 {
457 status = "okay";
458 samsung,i2c-sda-delay = <100>;
459 samsung,i2c-max-bus-freq = <66000>;
460
461 hdmiddc@50 {
462 compatible = "samsung,exynos4210-hdmiddc";
463 reg = <0x50>;
464 };
465};
466
467&i2c_3 {
468 status = "okay";
469 samsung,i2c-sda-delay = <100>;
470 samsung,i2c-max-bus-freq = <66000>;
471};
472
473&i2c_4 {
474 status = "okay";
475 samsung,i2c-sda-delay = <100>;
476 samsung,i2c-max-bus-freq = <66000>;
477};
478
479&i2c_5 {
480 status = "okay";
481 samsung,i2c-sda-delay = <100>;
482 samsung,i2c-max-bus-freq = <66000>;
483}; 25};
484 26
485&i2c_7 { 27&i2c_7 {
486 status = "okay";
487 samsung,i2c-sda-delay = <100>;
488 samsung,i2c-max-bus-freq = <66000>;
489
490 ptn3460: lvds-bridge@20 {
491 compatible = "nxp,ptn3460";
492 reg = <0x20>;
493 powerdown-gpios = <&gpy2 5 GPIO_ACTIVE_HIGH>;
494 reset-gpios = <&gpx1 5 GPIO_ACTIVE_HIGH>;
495 edid-emulation = <5>;
496
497 ports {
498 port@0 {
499 bridge_out: endpoint {
500 remote-endpoint = <&panel_in>;
501 };
502 };
503
504 port@1 {
505 bridge_in: endpoint {
506 remote-endpoint = <&dp_out>;
507 };
508 };
509 };
510 };
511
512 max98095: codec@11 { 28 max98095: codec@11 {
513 compatible = "maxim,max98095"; 29 compatible = "maxim,max98095";
514 reg = <0x11>; 30 reg = <0x11>;
515 pinctrl-0 = <&max98095_en>;
516 pinctrl-names = "default"; 31 pinctrl-names = "default";
32 pinctrl-0 = <&max98095_en>;
517 }; 33 };
518}; 34};
519 35
520&i2c_8 {
521 status = "okay";
522 samsung,i2c-sda-delay = <100>;
523 samsung,i2c-max-bus-freq = <378000>;
524
525 hdmiphy: hdmiphy@38 {
526 compatible = "samsung,exynos4212-hdmiphy";
527 reg = <0x38>;
528 };
529};
530
531&i2s0 {
532 status = "okay";
533};
534
535&mmc_0 {
536 status = "okay";
537 num-slots = <1>;
538 broken-cd;
539 card-detect-delay = <200>;
540 samsung,dw-mshc-ciu-div = <3>;
541 samsung,dw-mshc-sdr-timing = <2 3>;
542 samsung,dw-mshc-ddr-timing = <1 2>;
543 pinctrl-names = "default";
544 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>;
545 bus-width = <8>;
546 cap-mmc-highspeed;
547};
548
549&mmc_2 {
550 status = "okay";
551 num-slots = <1>;
552 card-detect-delay = <200>;
553 samsung,dw-mshc-ciu-div = <3>;
554 samsung,dw-mshc-sdr-timing = <2 3>;
555 samsung,dw-mshc-ddr-timing = <1 2>;
556 pinctrl-names = "default";
557 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
558 bus-width = <4>;
559 wp-gpios = <&gpc2 1 GPIO_ACTIVE_HIGH>;
560 cap-sd-highspeed;
561};
562
563/*
564 * On Snow we've got SIP WiFi and so can keep drive strengths low to
565 * reduce EMI.
566 */
567&mmc_3 {
568 status = "okay";
569 num-slots = <1>;
570 broken-cd;
571 cap-sdio-irq;
572 keep-power-in-suspend;
573 card-detect-delay = <200>;
574 samsung,dw-mshc-ciu-div = <3>;
575 samsung,dw-mshc-sdr-timing = <2 3>;
576 samsung,dw-mshc-ddr-timing = <1 2>;
577 pinctrl-names = "default";
578 pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4 &wifi_en &wifi_rst>;
579 bus-width = <4>;
580 cap-sd-highspeed;
581 mmc-pwrseq = <&mmc3_pwrseq>;
582};
583
584&pinctrl_0 { 36&pinctrl_0 {
585 wifi_en: wifi-en {
586 samsung,pins = "gpx0-1";
587 samsung,pin-function = <1>;
588 samsung,pin-pud = <0>;
589 samsung,pin-drv = <0>;
590 };
591
592 wifi_rst: wifi-rst {
593 samsung,pins = "gpx0-2";
594 samsung,pin-function = <1>;
595 samsung,pin-pud = <0>;
596 samsung,pin-drv = <0>;
597 };
598
599 power_key_irq: power-key-irq {
600 samsung,pins = "gpx1-3";
601 samsung,pin-function = <0xf>;
602 samsung,pin-pud = <0>;
603 samsung,pin-drv = <0>;
604 };
605
606 ec_irq: ec-irq {
607 samsung,pins = "gpx1-6";
608 samsung,pin-function = <0>;
609 samsung,pin-pud = <0>;
610 samsung,pin-drv = <0>;
611 };
612
613 max98095_en: max98095-en { 37 max98095_en: max98095-en {
614 samsung,pins = "gpx1-7"; 38 samsung,pins = "gpx1-7";
615 samsung,pin-function = <0>; 39 samsung,pin-function = <0>;
616 samsung,pin-pud = <3>; 40 samsung,pin-pud = <3>;
617 samsung,pin-drv = <0>; 41 samsung,pin-drv = <0>;
618 }; 42 };
619
620 tps65090_irq: tps65090-irq {
621 samsung,pins = "gpx2-6";
622 samsung,pin-function = <0>;
623 samsung,pin-pud = <0>;
624 samsung,pin-drv = <0>;
625 };
626
627 usb3_vbus_en: usb3-vbus-en {
628 samsung,pins = "gpx2-7";
629 samsung,pin-function = <1>;
630 samsung,pin-pud = <0>;
631 samsung,pin-drv = <0>;
632 };
633
634 max77686_irq: max77686-irq {
635 samsung,pins = "gpx3-2";
636 samsung,pin-function = <0>;
637 samsung,pin-pud = <0>;
638 samsung,pin-drv = <0>;
639 };
640
641 lid_irq: lid-irq {
642 samsung,pins = "gpx3-5";
643 samsung,pin-function = <0xf>;
644 samsung,pin-pud = <0>;
645 samsung,pin-drv = <0>;
646 };
647
648 hdmi_hpd_irq: hdmi-hpd-irq {
649 samsung,pins = "gpx3-7";
650 samsung,pin-function = <0>;
651 samsung,pin-pud = <1>;
652 samsung,pin-drv = <0>;
653 };
654};
655
656&pinctrl_1 {
657 arb_their_claim: arb-their-claim {
658 samsung,pins = "gpe0-4";
659 samsung,pin-function = <0>;
660 samsung,pin-pud = <3>;
661 samsung,pin-drv = <0>;
662 };
663
664 arb_our_claim: arb-our-claim {
665 samsung,pins = "gpf0-3";
666 samsung,pin-function = <1>;
667 samsung,pin-pud = <0>;
668 samsung,pin-drv = <0>;
669 };
670}; 43};
671
672&rtc {
673 status = "okay";
674 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
675 clock-names = "rtc", "rtc_src";
676};
677
678&sd3_bus4 {
679 samsung,pin-drv = <0>;
680};
681
682&sd3_clk {
683 samsung,pin-drv = <0>;
684};
685
686&sd3_cmd {
687 samsung,pin-pud = <3>;
688 samsung,pin-drv = <0>;
689};
690
691&spi_1 {
692 status = "okay";
693 samsung,spi-src-clk = <0>;
694 num-cs = <1>;
695 cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>;
696};
697
698&usbdrd_dwc3 {
699 dr_mode = "host";
700};
701
702&usbdrd_phy {
703 vbus-supply = <&usb3_vbus_reg>;
704};
705
706#include "cros-ec-keyboard.dtsi"
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b24610ea8c2a..88b9cf5f226f 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -130,6 +130,10 @@
130 compatible = "samsung,exynos4210-pd"; 130 compatible = "samsung,exynos4210-pd";
131 reg = <0x100440A0 0x20>; 131 reg = <0x100440A0 0x20>;
132 #power-domain-cells = <0>; 132 #power-domain-cells = <0>;
133 clocks = <&clock CLK_FIN_PLL>,
134 <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
135 <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
136 clock-names = "oscclk", "clk0", "clk1";
133 }; 137 };
134 138
135 clock: clock-controller@10010000 { 139 clock: clock-controller@10010000 {
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index eeb4ac22cfce..4ecef6981d5c 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -11,6 +11,7 @@
11 11
12/dts-v1/; 12/dts-v1/;
13#include "exynos5420.dtsi" 13#include "exynos5420.dtsi"
14#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/interrupt-controller/irq.h> 15#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/input/input.h> 16#include <dt-bindings/input/input.h>
16#include <dt-bindings/clock/samsung,s2mps11.h> 17#include <dt-bindings/clock/samsung,s2mps11.h>
@@ -44,7 +45,7 @@
44 45
45 wakeup { 46 wakeup {
46 label = "SW-TACT1"; 47 label = "SW-TACT1";
47 gpios = <&gpx2 7 1>; 48 gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
48 linux,code = <KEY_WAKEUP>; 49 linux,code = <KEY_WAKEUP>;
49 gpio-key,wakeup; 50 gpio-key,wakeup;
50 }; 51 };
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 8f4d76c5e11c..e722c22b2ba9 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -94,7 +94,7 @@
94 regulator-name = "P5.0V_USB3CON0"; 94 regulator-name = "P5.0V_USB3CON0";
95 regulator-min-microvolt = <5000000>; 95 regulator-min-microvolt = <5000000>;
96 regulator-max-microvolt = <5000000>; 96 regulator-max-microvolt = <5000000>;
97 gpio = <&gph0 0 0>; 97 gpio = <&gph0 0 GPIO_ACTIVE_HIGH>;
98 pinctrl-names = "default"; 98 pinctrl-names = "default";
99 pinctrl-0 = <&usb300_vbus_en>; 99 pinctrl-0 = <&usb300_vbus_en>;
100 enable-active-high; 100 enable-active-high;
@@ -105,7 +105,7 @@
105 regulator-name = "P5.0V_USB3CON1"; 105 regulator-name = "P5.0V_USB3CON1";
106 regulator-min-microvolt = <5000000>; 106 regulator-min-microvolt = <5000000>;
107 regulator-max-microvolt = <5000000>; 107 regulator-max-microvolt = <5000000>;
108 gpio = <&gph0 1 0>; 108 gpio = <&gph0 1 GPIO_ACTIVE_HIGH>;
109 pinctrl-names = "default"; 109 pinctrl-names = "default";
110 pinctrl-0 = <&usb301_vbus_en>; 110 pinctrl-0 = <&usb301_vbus_en>;
111 enable-active-high; 111 enable-active-high;
@@ -153,7 +153,7 @@
153 samsung,color-depth = <1>; 153 samsung,color-depth = <1>;
154 samsung,link-rate = <0x06>; 154 samsung,link-rate = <0x06>;
155 samsung,lane-count = <2>; 155 samsung,lane-count = <2>;
156 samsung,hpd-gpio = <&gpx2 6 0>; 156 samsung,hpd-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
157 157
158 ports { 158 ports {
159 port@0 { 159 port@0 {
@@ -925,7 +925,7 @@
925 status = "okay"; 925 status = "okay";
926 num-cs = <1>; 926 num-cs = <1>;
927 samsung,spi-src-clk = <0>; 927 samsung,spi-src-clk = <0>;
928 cs-gpios = <&gpb1 2 0>; 928 cs-gpios = <&gpb1 2 GPIO_ACTIVE_HIGH>;
929 929
930 cros_ec: cros-ec@0 { 930 cros_ec: cros-ec@0 {
931 compatible = "google,cros-ec-spi"; 931 compatible = "google,cros-ec-spi";
@@ -935,6 +935,7 @@
935 pinctrl-0 = <&ec_spi_cs &ec_irq>; 935 pinctrl-0 = <&ec_spi_cs &ec_irq>;
936 reg = <0>; 936 reg = <0>;
937 spi-max-frequency = <3125000>; 937 spi-max-frequency = <3125000>;
938 google,has-vbc-nvram;
938 939
939 controller-data { 940 controller-data {
940 samsung,spi-feedback-delay = <1>; 941 samsung,spi-feedback-delay = <1>;
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index 98871f972c8a..ac35aefd320f 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -11,6 +11,7 @@
11 11
12/dts-v1/; 12/dts-v1/;
13#include "exynos5420.dtsi" 13#include "exynos5420.dtsi"
14#include <dt-bindings/gpio/gpio.h>
14 15
15/ { 16/ {
16 model = "Samsung SMDK5420 board based on EXYNOS5420"; 17 model = "Samsung SMDK5420 board based on EXYNOS5420";
@@ -69,7 +70,7 @@
69 regulator-name = "VBUS0"; 70 regulator-name = "VBUS0";
70 regulator-min-microvolt = <5000000>; 71 regulator-min-microvolt = <5000000>;
71 regulator-max-microvolt = <5000000>; 72 regulator-max-microvolt = <5000000>;
72 gpio = <&gpg0 5 0>; 73 gpio = <&gpg0 5 GPIO_ACTIVE_HIGH>;
73 pinctrl-names = "default"; 74 pinctrl-names = "default";
74 pinctrl-0 = <&usb300_vbus_en>; 75 pinctrl-0 = <&usb300_vbus_en>;
75 enable-active-high; 76 enable-active-high;
@@ -80,7 +81,7 @@
80 regulator-name = "VBUS1"; 81 regulator-name = "VBUS1";
81 regulator-min-microvolt = <5000000>; 82 regulator-min-microvolt = <5000000>;
82 regulator-max-microvolt = <5000000>; 83 regulator-max-microvolt = <5000000>;
83 gpio = <&gpg1 4 0>; 84 gpio = <&gpg1 4 GPIO_ACTIVE_HIGH>;
84 pinctrl-names = "default"; 85 pinctrl-names = "default";
85 pinctrl-0 = <&usb301_vbus_en>; 86 pinctrl-0 = <&usb301_vbus_en>;
86 enable-active-high; 87 enable-active-high;
@@ -98,10 +99,7 @@
98 samsung,link-rate = <0x0a>; 99 samsung,link-rate = <0x0a>;
99 samsung,lane-count = <4>; 100 samsung,lane-count = <4>;
100 status = "okay"; 101 status = "okay";
101};
102 102
103&fimd {
104 status = "okay";
105 display-timings { 103 display-timings {
106 native-mode = <&timing0>; 104 native-mode = <&timing0>;
107 timing0: timing@0 { 105 timing0: timing@0 {
@@ -118,9 +116,13 @@
118 }; 116 };
119}; 117};
120 118
119&fimd {
120 status = "okay";
121};
122
121&hdmi { 123&hdmi {
122 status = "okay"; 124 status = "okay";
123 hpd-gpio = <&gpx3 7 0>; 125 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
124 pinctrl-names = "default"; 126 pinctrl-names = "default";
125 pinctrl-0 = <&hdmi_hpd_irq>; 127 pinctrl-0 = <&hdmi_hpd_irq>;
126}; 128};
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi
new file mode 100644
index 000000000000..9493923ec652
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi
@@ -0,0 +1,61 @@
1/*
2 * Hardkernel Odroid XU3 Audio Codec device tree source
3 *
4 * Copyright (c) 2015 Krzysztof Kozlowski
5 * Copyright (c) 2014 Collabora Ltd.
6 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
7 * http://www.samsung.com
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14/ {
15 sound: sound {
16 compatible = "simple-audio-card";
17
18 simple-audio-card,name = "Odroid-XU3";
19 simple-audio-card,widgets =
20 "Headphone", "Headphone Jack",
21 "Speakers", "Speakers";
22 simple-audio-card,routing =
23 "Headphone Jack", "HPL",
24 "Headphone Jack", "HPR",
25 "Headphone Jack", "MICBIAS",
26 "IN1", "Headphone Jack",
27 "Speakers", "SPKL",
28 "Speakers", "SPKR";
29
30 simple-audio-card,format = "i2s";
31 simple-audio-card,bitclock-master = <&link0_codec>;
32 simple-audio-card,frame-master = <&link0_codec>;
33
34 simple-audio-card,cpu {
35 sound-dai = <&i2s0 0>;
36 system-clock-frequency = <19200000>;
37 };
38
39 link0_codec: simple-audio-card,codec {
40 sound-dai = <&max98090>;
41 clocks = <&i2s0 CLK_I2S_CDCLK>;
42 };
43 };
44};
45
46&hsi2c_5 {
47 status = "okay";
48 max98090: max98090@10 {
49 compatible = "maxim,max98090";
50 reg = <0x10>;
51 interrupt-parent = <&gpx3>;
52 interrupts = <2 0>;
53 clocks = <&i2s0 CLK_I2S_CDCLK>;
54 clock-names = "mclk";
55 #sound-dai-cells = <0>;
56 };
57};
58
59&i2s0 {
60 status = "okay";
61};
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 79ffdfe712aa..1af5bdc2bdb1 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -43,71 +43,7 @@
43 pinctrl-0 = <&emmc_nrst_pin>; 43 pinctrl-0 = <&emmc_nrst_pin>;
44 pinctrl-names = "default"; 44 pinctrl-names = "default";
45 compatible = "mmc-pwrseq-emmc"; 45 compatible = "mmc-pwrseq-emmc";
46 reset-gpios = <&gpd1 0 1>; 46 reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>;
47 };
48
49 pwmleds {
50 compatible = "pwm-leds";
51
52 greenled {
53 label = "green:mmc0";
54 pwms = <&pwm 1 2000000 0>;
55 pwm-names = "pwm1";
56 /*
57 * Green LED is much brighter than the others
58 * so limit its max brightness
59 */
60 max_brightness = <127>;
61 linux,default-trigger = "mmc0";
62 };
63
64 blueled {
65 label = "blue:heartbeat";
66 pwms = <&pwm 2 2000000 0>;
67 pwm-names = "pwm2";
68 max_brightness = <255>;
69 linux,default-trigger = "heartbeat";
70 };
71 };
72
73 gpioleds {
74 compatible = "gpio-leds";
75 redled {
76 label = "red:microSD";
77 gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>;
78 default-state = "off";
79 linux,default-trigger = "mmc1";
80 };
81 };
82
83 sound: sound {
84 compatible = "simple-audio-card";
85
86 simple-audio-card,name = "Odroid-XU3";
87 simple-audio-card,widgets =
88 "Headphone", "Headphone Jack",
89 "Speakers", "Speakers";
90 simple-audio-card,routing =
91 "Headphone Jack", "HPL",
92 "Headphone Jack", "HPR",
93 "Headphone Jack", "MICBIAS",
94 "IN1", "Headphone Jack",
95 "Speakers", "SPKL",
96 "Speakers", "SPKR";
97
98 simple-audio-card,format = "i2s";
99 simple-audio-card,bitclock-master = <&link0_codec>;
100 simple-audio-card,frame-master = <&link0_codec>;
101
102 simple-audio-card,cpu {
103 sound-dai = <&i2s0 0>;
104 system-clock-frequency = <19200000>;
105 };
106
107 link0_codec: simple-audio-card,codec {
108 sound-dai = <&max98090>;
109 clocks = <&i2s0 CLK_I2S_CDCLK>;
110 };
111 }; 47 };
112 48
113 fan0: pwm-fan { 49 fan0: pwm-fan {
@@ -138,7 +74,7 @@
138 74
139&hdmi { 75&hdmi {
140 status = "okay"; 76 status = "okay";
141 hpd-gpio = <&gpx3 7 0>; 77 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
142 pinctrl-names = "default"; 78 pinctrl-names = "default";
143 pinctrl-0 = <&hdmi_hpd_irq>; 79 pinctrl-0 = <&hdmi_hpd_irq>;
144 80
@@ -160,6 +96,7 @@
160 s2mps11,buck2-ramp-enable = <1>; 96 s2mps11,buck2-ramp-enable = <1>;
161 s2mps11,buck3-ramp-enable = <1>; 97 s2mps11,buck3-ramp-enable = <1>;
162 s2mps11,buck4-ramp-enable = <1>; 98 s2mps11,buck4-ramp-enable = <1>;
99 samsung,s2mps11-acokb-ground;
163 100
164 interrupt-parent = <&gpx0>; 101 interrupt-parent = <&gpx0>;
165 interrupts = <4 IRQ_TYPE_EDGE_FALLING>; 102 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
@@ -375,19 +312,6 @@
375 }; 312 };
376}; 313};
377 314
378&hsi2c_5 {
379 status = "okay";
380 max98090: max98090@10 {
381 compatible = "maxim,max98090";
382 reg = <0x10>;
383 interrupt-parent = <&gpx3>;
384 interrupts = <2 0>;
385 clocks = <&i2s0 CLK_I2S_CDCLK>;
386 clock-names = "mclk";
387 #sound-dai-cells = <0>;
388 };
389};
390
391&i2c_2 { 315&i2c_2 {
392 samsung,i2c-sda-delay = <100>; 316 samsung,i2c-sda-delay = <100>;
393 samsung,i2c-max-bus-freq = <66000>; 317 samsung,i2c-max-bus-freq = <66000>;
@@ -399,10 +323,6 @@
399 }; 323 };
400}; 324};
401 325
402&i2s0 {
403 status = "okay";
404};
405
406&mfc { 326&mfc {
407 samsung,mfc-r = <0x43000000 0x800000>; 327 samsung,mfc-r = <0x43000000 0x800000>;
408 samsung,mfc-l = <0x51000000 0x800000>; 328 samsung,mfc-l = <0x51000000 0x800000>;
@@ -463,19 +383,6 @@
463 }; 383 };
464}; 384};
465 385
466&pwm {
467 /*
468 * PWM 0 -- fan
469 * PWM 1 -- Green LED
470 * PWM 2 -- Blue LED
471 * PWM 3 -- on MIPI connector for backlight
472 */
473 pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>;
474 pinctrl-names = "default";
475 samsung,pwm-outputs = <0>;
476 status = "okay";
477};
478
479&tmu_cpu0 { 386&tmu_cpu0 {
480 vtmu-supply = <&ldo7_reg>; 387 vtmu-supply = <&ldo7_reg>;
481 status = "okay"; 388 status = "okay";
@@ -511,9 +418,7 @@
511 dr_mode = "host"; 418 dr_mode = "host";
512}; 419};
513 420
514&usbdrd_dwc3_1 { 421/* usbdrd_dwc3_1 mode customized in each board */
515 dr_mode = "otg";
516};
517 422
518&usbdrd3_0 { 423&usbdrd3_0 {
519 vdd33-supply = <&ldo9_reg>; 424 vdd33-supply = <&ldo9_reg>;
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
index c06882bbb822..b1b36081f343 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
@@ -13,8 +13,59 @@
13 13
14/dts-v1/; 14/dts-v1/;
15#include "exynos5422-odroidxu3-common.dtsi" 15#include "exynos5422-odroidxu3-common.dtsi"
16#include "exynos5422-odroidxu3-audio.dtsi"
16 17
17/ { 18/ {
18 model = "Hardkernel Odroid XU3 Lite"; 19 model = "Hardkernel Odroid XU3 Lite";
19 compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5"; 20 compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5";
21
22 pwmleds {
23 compatible = "pwm-leds";
24
25 greenled {
26 label = "green:mmc0";
27 pwms = <&pwm 1 2000000 0>;
28 pwm-names = "pwm1";
29 /*
30 * Green LED is much brighter than the others
31 * so limit its max brightness
32 */
33 max_brightness = <127>;
34 linux,default-trigger = "mmc0";
35 };
36
37 blueled {
38 label = "blue:heartbeat";
39 pwms = <&pwm 2 2000000 0>;
40 pwm-names = "pwm2";
41 max_brightness = <255>;
42 linux,default-trigger = "heartbeat";
43 };
44 };
45
46 gpioleds {
47 compatible = "gpio-leds";
48 redled {
49 label = "red:microSD";
50 gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>;
51 default-state = "off";
52 linux,default-trigger = "mmc1";
53 };
54 };
55};
56
57&pwm {
58 /*
59 * PWM 0 -- fan
60 * PWM 1 -- Green LED
61 * PWM 2 -- Blue LED
62 * PWM 3 -- on MIPI connector for backlight
63 */
64 pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>;
65 pinctrl-names = "default";
66 status = "okay";
67};
68
69&usbdrd_dwc3_1 {
70 dr_mode = "otg";
20}; 71};
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index 78e6a502f320..0c0bbdbfd85f 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -12,10 +12,45 @@
12 12
13/dts-v1/; 13/dts-v1/;
14#include "exynos5422-odroidxu3-common.dtsi" 14#include "exynos5422-odroidxu3-common.dtsi"
15#include "exynos5422-odroidxu3-audio.dtsi"
15 16
16/ { 17/ {
17 model = "Hardkernel Odroid XU3"; 18 model = "Hardkernel Odroid XU3";
18 compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5"; 19 compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5";
20
21 pwmleds {
22 compatible = "pwm-leds";
23
24 greenled {
25 label = "green:mmc0";
26 pwms = <&pwm 1 2000000 0>;
27 pwm-names = "pwm1";
28 /*
29 * Green LED is much brighter than the others
30 * so limit its max brightness
31 */
32 max_brightness = <127>;
33 linux,default-trigger = "mmc0";
34 };
35
36 blueled {
37 label = "blue:heartbeat";
38 pwms = <&pwm 2 2000000 0>;
39 pwm-names = "pwm2";
40 max_brightness = <255>;
41 linux,default-trigger = "heartbeat";
42 };
43 };
44
45 gpioleds {
46 compatible = "gpio-leds";
47 redled {
48 label = "red:microSD";
49 gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>;
50 default-state = "off";
51 linux,default-trigger = "mmc1";
52 };
53 };
19}; 54};
20 55
21&i2c_0 { 56&i2c_0 {
@@ -49,3 +84,19 @@
49 shunt-resistor = <10000>; 84 shunt-resistor = <10000>;
50 }; 85 };
51}; 86};
87
88&pwm {
89 /*
90 * PWM 0 -- fan
91 * PWM 1 -- Green LED
92 * PWM 2 -- Blue LED
93 * PWM 3 -- on MIPI connector for backlight
94 */
95 pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>;
96 pinctrl-names = "default";
97 status = "okay";
98};
99
100&usbdrd_dwc3_1 {
101 dr_mode = "otg";
102};
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
new file mode 100644
index 000000000000..2faf88627a48
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
@@ -0,0 +1,48 @@
1/*
2 * Hardkernel Odroid XU4 board device tree source
3 *
4 * Copyright (c) 2015 Krzysztof Kozlowski
5 * Copyright (c) 2014 Collabora Ltd.
6 * Copyright (c) 2013-2015 Samsung Electronics Co., Ltd.
7 * http://www.samsung.com
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14/dts-v1/;
15#include "exynos5422-odroidxu3-common.dtsi"
16
17/ {
18 model = "Hardkernel Odroid XU4";
19 compatible = "hardkernel,odroid-xu4", "samsung,exynos5800", \
20 "samsung,exynos5";
21
22 pwmleds {
23 compatible = "pwm-leds";
24
25 blueled {
26 label = "blue:heartbeat";
27 pwms = <&pwm 2 2000000 0>;
28 pwm-names = "pwm2";
29 max_brightness = <255>;
30 linux,default-trigger = "heartbeat";
31 };
32 };
33};
34
35&pwm {
36 /*
37 * PWM 0 -- fan
38 * PWM 2 -- Blue LED
39 */
40 pinctrl-0 = <&pwm0_out &pwm2_out>;
41 pinctrl-names = "default";
42 samsung,pwm-outputs = <0>, <2>;
43 status = "okay";
44};
45
46&usbdrd_dwc3_1 {
47 dr_mode = "host";
48};
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
index e4443f4e6572..6a0d802e87c8 100644
--- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
+++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
@@ -11,6 +11,7 @@
11 11
12/dts-v1/; 12/dts-v1/;
13#include "exynos5440.dtsi" 13#include "exynos5440.dtsi"
14#include <dt-bindings/gpio/gpio.h>
14 15
15/ { 16/ {
16 model = "SAMSUNG SSDK5440 board based on EXYNOS5440"; 17 model = "SAMSUNG SSDK5440 board based on EXYNOS5440";
@@ -29,12 +30,12 @@
29}; 30};
30 31
31&pcie_0 { 32&pcie_0 {
32 reset-gpio = <&pin_ctrl 5 0>; 33 reset-gpio = <&pin_ctrl 5 GPIO_ACTIVE_HIGH>;
33 status = "okay"; 34 status = "okay";
34}; 35};
35 36
36&pcie_1 { 37&pcie_1 {
37 reset-gpio = <&pin_ctrl 22 0>; 38 reset-gpio = <&pin_ctrl 22 GPIO_ACTIVE_HIGH>;
38 status = "okay"; 39 status = "okay";
39}; 40};
40 41
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 7d5b386b5ae6..56275a6f9fca 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -94,7 +94,7 @@
94 regulator-name = "P5.0V_USB3CON0"; 94 regulator-name = "P5.0V_USB3CON0";
95 regulator-min-microvolt = <5000000>; 95 regulator-min-microvolt = <5000000>;
96 regulator-max-microvolt = <5000000>; 96 regulator-max-microvolt = <5000000>;
97 gpio = <&gph0 0 0>; 97 gpio = <&gph0 0 GPIO_ACTIVE_HIGH>;
98 pinctrl-names = "default"; 98 pinctrl-names = "default";
99 pinctrl-0 = <&usb300_vbus_en>; 99 pinctrl-0 = <&usb300_vbus_en>;
100 enable-active-high; 100 enable-active-high;
@@ -105,7 +105,7 @@
105 regulator-name = "P5.0V_USB3CON1"; 105 regulator-name = "P5.0V_USB3CON1";
106 regulator-min-microvolt = <5000000>; 106 regulator-min-microvolt = <5000000>;
107 regulator-max-microvolt = <5000000>; 107 regulator-max-microvolt = <5000000>;
108 gpio = <&gph0 1 0>; 108 gpio = <&gph0 1 GPIO_ACTIVE_HIGH>;
109 pinctrl-names = "default"; 109 pinctrl-names = "default";
110 pinctrl-0 = <&usb301_vbus_en>; 110 pinctrl-0 = <&usb301_vbus_en>;
111 enable-active-high; 111 enable-active-high;
@@ -147,7 +147,7 @@
147 samsung,color-depth = <1>; 147 samsung,color-depth = <1>;
148 samsung,link-rate = <0x0a>; 148 samsung,link-rate = <0x0a>;
149 samsung,lane-count = <2>; 149 samsung,lane-count = <2>;
150 samsung,hpd-gpio = <&gpx2 6 0>; 150 samsung,hpd-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
151 panel = <&panel>; 151 panel = <&panel>;
152}; 152};
153 153
@@ -888,7 +888,7 @@
888 status = "okay"; 888 status = "okay";
889 num-cs = <1>; 889 num-cs = <1>;
890 samsung,spi-src-clk = <0>; 890 samsung,spi-src-clk = <0>;
891 cs-gpios = <&gpb1 2 0>; 891 cs-gpios = <&gpb1 2 GPIO_ACTIVE_HIGH>;
892 892
893 cros_ec: cros-ec@0 { 893 cros_ec: cros-ec@0 {
894 compatible = "google,cros-ec-spi"; 894 compatible = "google,cros-ec-spi";
@@ -898,6 +898,7 @@
898 pinctrl-0 = <&ec_spi_cs &ec_irq>; 898 pinctrl-0 = <&ec_spi_cs &ec_irq>;
899 reg = <0>; 899 reg = <0>;
900 spi-max-frequency = <3125000>; 900 spi-max-frequency = <3125000>;
901 google,has-vbc-nvram;
901 902
902 controller-data { 903 controller-data {
903 samsung,spi-feedback-delay = <1>; 904 samsung,spi-feedback-delay = <1>;
diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts b/arch/arm/boot/dts/hi3620-hi4511.dts
index fe623928f687..a579fbf13b5f 100644
--- a/arch/arm/boot/dts/hi3620-hi4511.dts
+++ b/arch/arm/boot/dts/hi3620-hi4511.dts
@@ -16,7 +16,8 @@
16 compatible = "hisilicon,hi3620-hi4511"; 16 compatible = "hisilicon,hi3620-hi4511";
17 17
18 chosen { 18 chosen {
19 bootargs = "console=ttyAMA0,115200 root=/dev/ram0 earlyprintk"; 19 bootargs = "root=/dev/ram0";
20 stdout-path = "serial0:115200n8";
20 }; 21 };
21 22
22 memory { 23 memory {
diff --git a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
index 721b09238f58..d13af8437d10 100644
--- a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
+++ b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
@@ -15,7 +15,7 @@
15 compatible = "hisilicon,hix5hd2"; 15 compatible = "hisilicon,hix5hd2";
16 16
17 chosen { 17 chosen {
18 bootargs = "console=ttyAMA0,115200 earlyprintk"; 18 stdout-path = "serial0:115200n8";
19 }; 19 };
20 20
21 cpus { 21 cpus {
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index b995333ea22b..1c6c07538a78 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -383,9 +383,11 @@
383 }; 383 };
384 384
385 ocotp@8002c000 { 385 ocotp@8002c000 {
386 compatible = "fsl,ocotp"; 386 compatible = "fsl,imx23-ocotp", "fsl,ocotp";
387 #address-cells = <1>;
388 #size-cells = <1>;
387 reg = <0x8002c000 0x2000>; 389 reg = <0x8002c000 0x2000>;
388 status = "disabled"; 390 clocks = <&clks 15>;
389 }; 391 };
390 392
391 axi-ahb@8002e000 { 393 axi-ahb@8002e000 {
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index 279249b8c3f3..e3ef94ac159f 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -57,7 +57,7 @@
57 flash: m25p80@0 { 57 flash: m25p80@0 {
58 #address-cells = <1>; 58 #address-cells = <1>;
59 #size-cells = <1>; 59 #size-cells = <1>;
60 compatible = "sst,sst25vf016b"; 60 compatible = "sst,sst25vf016b", "jedec,spi-nor";
61 spi-max-frequency = <40000000>; 61 spi-max-frequency = <40000000>;
62 reg = <0>; 62 reg = <0>;
63 }; 63 };
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index e35cc6ba3ca6..8d04e57039bc 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -41,7 +41,7 @@
41 flash: m25p80@0 { 41 flash: m25p80@0 {
42 #address-cells = <1>; 42 #address-cells = <1>;
43 #size-cells = <1>; 43 #size-cells = <1>;
44 compatible = "m25p80"; 44 compatible = "m25p80", "jedec,spi-nor";
45 spi-max-frequency = <40000000>; 45 spi-max-frequency = <40000000>;
46 reg = <0>; 46 reg = <0>;
47 }; 47 };
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 4e073e854742..c5b57d4adade 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -936,9 +936,11 @@
936 }; 936 };
937 937
938 ocotp: ocotp@8002c000 { 938 ocotp: ocotp@8002c000 {
939 compatible = "fsl,ocotp"; 939 compatible = "fsl,imx28-ocotp", "fsl,ocotp";
940 #address-cells = <1>;
941 #size-cells = <1>;
940 reg = <0x8002c000 0x2000>; 942 reg = <0x8002c000 0x2000>;
941 status = "disabled"; 943 clocks = <&clks 25>;
942 }; 944 };
943 945
944 axi-ahb@8002e000 { 946 axi-ahb@8002e000 {
diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi
index c34f82581248..5fdb222636a7 100644
--- a/arch/arm/boot/dts/imx31.dtsi
+++ b/arch/arm/boot/dts/imx31.dtsi
@@ -25,7 +25,7 @@
25 #size-cells = <0>; 25 #size-cells = <0>;
26 26
27 cpu { 27 cpu {
28 compatible = "arm,arm1136"; 28 compatible = "arm,arm1136jf-s";
29 device_type = "cpu"; 29 device_type = "cpu";
30 }; 30 };
31 }; 31 };
diff --git a/arch/arm/boot/dts/imx35.dtsi b/arch/arm/boot/dts/imx35.dtsi
index e6540b5cfa4c..ed3dc3391d1c 100644
--- a/arch/arm/boot/dts/imx35.dtsi
+++ b/arch/arm/boot/dts/imx35.dtsi
@@ -29,7 +29,7 @@
29 #size-cells = <0>; 29 #size-cells = <0>;
30 30
31 cpu { 31 cpu {
32 compatible = "arm,arm1136"; 32 compatible = "arm,arm1136jf-s";
33 device_type = "cpu"; 33 device_type = "cpu";
34 }; 34 };
35 }; 35 };
diff --git a/arch/arm/boot/dts/imx50-evk.dts b/arch/arm/boot/dts/imx50-evk.dts
index 1b22512c91bd..27d763c7a307 100644
--- a/arch/arm/boot/dts/imx50-evk.dts
+++ b/arch/arm/boot/dts/imx50-evk.dts
@@ -33,7 +33,7 @@
33 flash: m25p32@1 { 33 flash: m25p32@1 {
34 #address-cells = <1>; 34 #address-cells = <1>;
35 #size-cells = <1>; 35 #size-cells = <1>;
36 compatible = "m25p32", "m25p80"; 36 compatible = "m25p32", "jedec,spi-nor";
37 spi-max-frequency = <25000000>; 37 spi-max-frequency = <25000000>;
38 reg = <1>; 38 reg = <1>;
39 39
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index fc89ce1e5763..542ab9e697fb 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -76,7 +76,7 @@
76 flash: m25p32@1 { 76 flash: m25p32@1 {
77 #address-cells = <1>; 77 #address-cells = <1>;
78 #size-cells = <1>; 78 #size-cells = <1>;
79 compatible = "st,m25p32", "st,m25p"; 79 compatible = "st,m25p32", "st,m25p", "jedec,spi-nor";
80 spi-max-frequency = <20000000>; 80 spi-max-frequency = <20000000>;
81 reg = <1>; 81 reg = <1>;
82 82
diff --git a/arch/arm/boot/dts/imx6dl-nit6xlite.dts b/arch/arm/boot/dts/imx6dl-nit6xlite.dts
new file mode 100644
index 000000000000..e0161e46195c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-nit6xlite.dts
@@ -0,0 +1,49 @@
1/*
2 * Copyright 2015 Boundary Devices, Inc.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41/dts-v1/;
42
43#include "imx6dl.dtsi"
44#include "imx6qdl-nit6xlite.dtsi"
45
46/ {
47 model = "Boundary Devices i.MX6 Solo Nitrogen6_Lite Board";
48 compatible = "boundary,imx6dl-nit6xlite", "fsl,imx6dl";
49};
diff --git a/arch/arm/boot/dts/imx6dl-nitrogen6x.dts b/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
index 5f4d33ccc4b3..8398f979b912 100644
--- a/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
+++ b/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
@@ -3,12 +3,42 @@
3 * Copyright 2012 Freescale Semiconductor, Inc. 3 * Copyright 2012 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd. 4 * Copyright 2011 Linaro Ltd.
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * This file is dual-licensed: you can use it either under the terms
7 * License. You may obtain a copy of the GNU General Public License 7 * of the GPL or the X11 license, at your option. Note that this dual
8 * Version 2 or later at the following locations: 8 * licensing only applies to this file, and not this project as a
9 * whole.
9 * 10 *
10 * http://www.opensource.org/licenses/gpl-license.html 11 * a) This file is free software; you can redistribute it and/or
11 * http://www.gnu.org/copyleft/gpl.html 12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
15 * This file is distributed in the hope that it will be useful
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
12 */ 42 */
13 43
14/dts-v1/; 44/dts-v1/;
@@ -16,6 +46,6 @@
16#include "imx6qdl-nitrogen6x.dtsi" 46#include "imx6qdl-nitrogen6x.dtsi"
17 47
18/ { 48/ {
19 model = "Freescale i.MX6 DualLite Nitrogen6x Board"; 49 model = "Boundary Devices i.MX6 DualLite Nitrogen6x Board";
20 compatible = "fsl,imx6dl-nitrogen6x", "fsl,imx6dl"; 50 compatible = "boundary,imx6dl-nitrogen6x", "fsl,imx6dl";
21}; 51};
diff --git a/arch/arm/boot/dts/imx6dl-rex-basic.dts b/arch/arm/boot/dts/imx6dl-rex-basic.dts
index b13845c2823b..c3a14a4330a2 100644
--- a/arch/arm/boot/dts/imx6dl-rex-basic.dts
+++ b/arch/arm/boot/dts/imx6dl-rex-basic.dts
@@ -23,7 +23,7 @@
23 23
24&ecspi3 { 24&ecspi3 {
25 flash: m25p80@0 { 25 flash: m25p80@0 {
26 compatible = "sst,sst25vf016b"; 26 compatible = "sst,sst25vf016b", "jedec,spi-nor";
27 spi-max-frequency = <20000000>; 27 spi-max-frequency = <20000000>;
28 reg = <0>; 28 reg = <0>;
29 }; 29 };
diff --git a/arch/arm/boot/dts/imx6dl-sabrelite.dts b/arch/arm/boot/dts/imx6dl-sabrelite.dts
index 2de04479dc35..0f06ca5c9146 100644
--- a/arch/arm/boot/dts/imx6dl-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6dl-sabrelite.dts
@@ -2,12 +2,42 @@
2 * Copyright 2011 Freescale Semiconductor, Inc. 2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd. 3 * Copyright 2011 Linaro Ltd.
4 * 4 *
5 * The code contained herein is licensed under the GNU General Public 5 * This file is dual-licensed: you can use it either under the terms
6 * License. You may obtain a copy of the GNU General Public License 6 * of the GPL or the X11 license, at your option. Note that this dual
7 * Version 2 or later at the following locations: 7 * licensing only applies to this file, and not this project as a
8 * whole.
8 * 9 *
9 * http://www.opensource.org/licenses/gpl-license.html 10 * a) This file is free software; you can redistribute it and/or
10 * http://www.gnu.org/copyleft/gpl.html 11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
11 */ 41 */
12 42
13/dts-v1/; 43/dts-v1/;
diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index 4fa254347798..364578d707a5 100644
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -109,7 +109,7 @@
109 status = "okay"; 109 status = "okay";
110 110
111 flash: m25p80@0 { 111 flash: m25p80@0 {
112 compatible = "m25p80"; 112 compatible = "m25p80", "jedec,spi-nor";
113 spi-max-frequency = <40000000>; 113 spi-max-frequency = <40000000>;
114 reg = <0>; 114 reg = <0>;
115 }; 115 };
diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts
index 822ffb231c57..58adf176425a 100644
--- a/arch/arm/boot/dts/imx6q-gw5400-a.dts
+++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
@@ -145,7 +145,7 @@
145 status = "okay"; 145 status = "okay";
146 146
147 flash: m25p80@0 { 147 flash: m25p80@0 {
148 compatible = "sst,w25q256"; 148 compatible = "sst,w25q256", "jedec,spi-nor";
149 spi-max-frequency = <30000000>; 149 spi-max-frequency = <30000000>;
150 reg = <0>; 150 reg = <0>;
151 }; 151 };
diff --git a/arch/arm/boot/dts/imx6q-nitrogen6_max.dts b/arch/arm/boot/dts/imx6q-nitrogen6_max.dts
new file mode 100644
index 000000000000..d417457ca6db
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-nitrogen6_max.dts
@@ -0,0 +1,53 @@
1/*
2 * Copyright 2015 Boundary Devices, Inc.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41/dts-v1/;
42
43#include "imx6q.dtsi"
44#include "imx6qdl-nitrogen6_max.dtsi"
45
46/ {
47 model = "Boundary Devices i.MX6 Quad Nitrogen6_MAX Board";
48 compatible = "boundary,imx6q-nitrogen6_max", "fsl,imx6q";
49};
50
51&sata {
52 status = "okay";
53};
diff --git a/arch/arm/boot/dts/imx6q-nitrogen6x.dts b/arch/arm/boot/dts/imx6q-nitrogen6x.dts
index a57866b2e97e..d1686339dc48 100644
--- a/arch/arm/boot/dts/imx6q-nitrogen6x.dts
+++ b/arch/arm/boot/dts/imx6q-nitrogen6x.dts
@@ -3,12 +3,42 @@
3 * Copyright 2012 Freescale Semiconductor, Inc. 3 * Copyright 2012 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd. 4 * Copyright 2011 Linaro Ltd.
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * This file is dual-licensed: you can use it either under the terms
7 * License. You may obtain a copy of the GNU General Public License 7 * of the GPL or the X11 license, at your option. Note that this dual
8 * Version 2 or later at the following locations: 8 * licensing only applies to this file, and not this project as a
9 * whole.
9 * 10 *
10 * http://www.opensource.org/licenses/gpl-license.html 11 * a) This file is free software; you can redistribute it and/or
11 * http://www.gnu.org/copyleft/gpl.html 12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
15 * This file is distributed in the hope that it will be useful
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
12 */ 42 */
13 43
14/dts-v1/; 44/dts-v1/;
@@ -16,8 +46,8 @@
16#include "imx6qdl-nitrogen6x.dtsi" 46#include "imx6qdl-nitrogen6x.dtsi"
17 47
18/ { 48/ {
19 model = "Freescale i.MX6 Quad Nitrogen6x Board"; 49 model = "Boundary Devices i.MX6 Quad Nitrogen6x Board";
20 compatible = "fsl,imx6q-nitrogen6x", "fsl,imx6q"; 50 compatible = "boundary,imx6q-nitrogen6x", "fsl,imx6q";
21}; 51};
22 52
23&sata { 53&sata {
diff --git a/arch/arm/boot/dts/imx6q-rex-pro.dts b/arch/arm/boot/dts/imx6q-rex-pro.dts
index 3c2852b16f78..90ea61ae04e9 100644
--- a/arch/arm/boot/dts/imx6q-rex-pro.dts
+++ b/arch/arm/boot/dts/imx6q-rex-pro.dts
@@ -23,7 +23,7 @@
23 23
24&ecspi3 { 24&ecspi3 {
25 flash: m25p80@0 { 25 flash: m25p80@0 {
26 compatible = "sst,sst25vf032b"; 26 compatible = "sst,sst25vf032b", "jedec,spi-nor";
27 spi-max-frequency = <20000000>; 27 spi-max-frequency = <20000000>;
28 reg = <0>; 28 reg = <0>;
29 }; 29 };
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 96e4688be77c..66d10d8d534c 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -2,12 +2,42 @@
2 * Copyright 2011 Freescale Semiconductor, Inc. 2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd. 3 * Copyright 2011 Linaro Ltd.
4 * 4 *
5 * The code contained herein is licensed under the GNU General Public 5 * This file is dual-licensed: you can use it either under the terms
6 * License. You may obtain a copy of the GNU General Public License 6 * of the GPL or the X11 license, at your option. Note that this dual
7 * Version 2 or later at the following locations: 7 * licensing only applies to this file, and not this project as a
8 * whole.
8 * 9 *
9 * http://www.opensource.org/licenses/gpl-license.html 10 * a) This file is free software; you can redistribute it and/or
10 * http://www.gnu.org/copyleft/gpl.html 11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
11 */ 41 */
12 42
13/dts-v1/; 43/dts-v1/;
diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
index f4d6ae564ead..ecbc6eba6a2c 100644
--- a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
@@ -109,7 +109,7 @@
109 flash: m25p80@0 { 109 flash: m25p80@0 {
110 #address-cells = <1>; 110 #address-cells = <1>;
111 #size-cells = <1>; 111 #size-cells = <1>;
112 compatible = "micron,n25q128a11"; 112 compatible = "micron,n25q128a11", "jedec,spi-nor";
113 spi-max-frequency = <20000000>; 113 spi-max-frequency = <20000000>;
114 reg = <0>; 114 reg = <0>;
115 }; 115 };
diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
index a47a0399a172..7d81100e7d47 100644
--- a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
@@ -141,7 +141,7 @@
141 flash: m25p80@1 { 141 flash: m25p80@1 {
142 #address-cells = <1>; 142 #address-cells = <1>;
143 #size-cells = <1>; 143 #size-cells = <1>;
144 compatible = "micron,n25q128a11"; 144 compatible = "micron,n25q128a11", "jedec,spi-nor";
145 spi-max-frequency = <20000000>; 145 spi-max-frequency = <20000000>;
146 reg = <1>; 146 reg = <1>;
147 }; 147 };
diff --git a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
index 45e7c39e80d5..da1341d47b14 100644
--- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
@@ -38,7 +38,7 @@
38 flash: m25p80@0 { 38 flash: m25p80@0 {
39 #address-cells = <1>; 39 #address-cells = <1>;
40 #size-cells = <1>; 40 #size-cells = <1>;
41 compatible = "sst,sst25vf040b", "m25p80"; 41 compatible = "sst,sst25vf040b", "jedec,spi-nor";
42 spi-max-frequency = <20000000>; 42 spi-max-frequency = <20000000>;
43 reg = <0>; 43 reg = <0>;
44 }; 44 };
diff --git a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
new file mode 100644
index 000000000000..24d7d3f18464
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
@@ -0,0 +1,630 @@
1/*
2 * Copyright 2015 Boundary Devices, Inc.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41#include <dt-bindings/gpio/gpio.h>
42#include <dt-bindings/input/input.h>
43
44/ {
45 chosen {
46 stdout-path = &uart2;
47 };
48
49 memory {
50 reg = <0x10000000 0x20000000>;
51 };
52
53 regulators {
54 compatible = "simple-bus";
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 reg_2p5v: regulator@0 {
59 compatible = "regulator-fixed";
60 reg = <0>;
61 regulator-name = "2P5V";
62 regulator-min-microvolt = <2500000>;
63 regulator-max-microvolt = <2500000>;
64 regulator-always-on;
65 };
66
67 reg_3p3v: regulator@1 {
68 compatible = "regulator-fixed";
69 reg = <1>;
70 regulator-name = "3P3V";
71 regulator-min-microvolt = <3300000>;
72 regulator-max-microvolt = <3300000>;
73 regulator-always-on;
74 };
75
76 reg_usb_otg_vbus: regulator@2 {
77 compatible = "regulator-fixed";
78 reg = <2>;
79 regulator-name = "usb_otg_vbus";
80 regulator-min-microvolt = <5000000>;
81 regulator-max-microvolt = <5000000>;
82 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
83 enable-active-high;
84 };
85
86 reg_wlan_vmmc: regulator@3 {
87 compatible = "regulator-fixed";
88 reg = <3>;
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_wlan_vmmc>;
91 regulator-name = "reg_wlan_vmmc";
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>;
95 startup-delay-us = <70000>;
96 enable-active-high;
97 };
98 };
99
100 bt_rfkill {
101 compatible = "rfkill-gpio";
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_bt_rfkill>;
104 gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
105 name = "bt_rfkill";
106 type = <2>;
107 };
108
109 gpio-keys {
110 compatible = "gpio-keys";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_gpio_keys>;
113
114 home {
115 label = "Home";
116 gpios = <&gpio7 13 IRQ_TYPE_LEVEL_LOW>;
117 linux,code = <102>;
118 };
119
120 back {
121 label = "Back";
122 gpios = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>;
123 linux,code = <158>;
124 };
125 };
126
127 leds {
128 compatible = "gpio-leds";
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_leds>;
131
132 j14-pin1 {
133 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
134 retain-state-suspended;
135 default-state = "off";
136 };
137
138 j14-pin3 {
139 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
140 retain-state-suspended;
141 default-state = "off";
142 };
143
144 j14-pins8-9 {
145 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
146 retain-state-suspended;
147 default-state = "off";
148 };
149
150 j46-pin2 {
151 gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
152 retain-state-suspended;
153 default-state = "off";
154 };
155
156 j46-pin3 {
157 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
158 retain-state-suspended;
159 default-state = "off";
160 };
161 };
162
163 backlight_lcd {
164 compatible = "pwm-backlight";
165 pwms = <&pwm1 0 5000000>;
166 brightness-levels = <0 4 8 16 32 64 128 255>;
167 default-brightness-level = <7>;
168 power-supply = <&reg_3p3v>;
169 status = "okay";
170 };
171
172 backlight_lvds0: backlight_lvds0 {
173 compatible = "pwm-backlight";
174 pwms = <&pwm4 0 5000000>;
175 brightness-levels = <0 4 8 16 32 64 128 255>;
176 default-brightness-level = <7>;
177 power-supply = <&reg_3p3v>;
178 status = "okay";
179 };
180
181 panel_lvds0 {
182 compatible = "hannstar,hsd100pxn1";
183 backlight = <&backlight_lvds0>;
184
185 port {
186 panel_in_lvds0: endpoint {
187 remote-endpoint = <&lvds0_out>;
188 };
189 };
190 };
191
192 sound {
193 compatible = "fsl,imx6dl-nit6xlite-sgtl5000",
194 "fsl,imx-audio-sgtl5000";
195 model = "imx6dl-nit6xlite-sgtl5000";
196 ssi-controller = <&ssi1>;
197 audio-codec = <&codec>;
198 audio-routing =
199 "MIC_IN", "Mic Jack",
200 "Mic Jack", "Mic Bias",
201 "Headphone Jack", "HP_OUT";
202 mux-int-port = <1>;
203 mux-ext-port = <3>;
204 };
205};
206
207&audmux {
208 pinctrl-names = "default";
209 pinctrl-0 = <&pinctrl_audmux>;
210 status = "okay";
211};
212
213&clks {
214 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
215 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
216 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
217 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
218};
219
220&ecspi1 {
221 fsl,spi-num-chipselects = <1>;
222 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
223 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_ecspi1>;
225 status = "okay";
226
227 flash: m25p80@0 {
228 compatible = "microchip,sst25vf016b";
229 spi-max-frequency = <20000000>;
230 reg = <0>;
231 };
232};
233
234&fec {
235 pinctrl-names = "default";
236 pinctrl-0 = <&pinctrl_enet>;
237 phy-mode = "rgmii";
238 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
239 txen-skew-ps = <0>;
240 txc-skew-ps = <3000>;
241 rxdv-skew-ps = <0>;
242 rxc-skew-ps = <3000>;
243 rxd0-skew-ps = <0>;
244 rxd1-skew-ps = <0>;
245 rxd2-skew-ps = <0>;
246 rxd3-skew-ps = <0>;
247 txd0-skew-ps = <0>;
248 txd1-skew-ps = <0>;
249 txd2-skew-ps = <0>;
250 txd3-skew-ps = <0>;
251 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
252 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
253 status = "okay";
254};
255
256&hdmi {
257 ddc-i2c-bus = <&i2c2>;
258 status = "okay";
259};
260
261&i2c1 {
262 clock-frequency = <100000>;
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_i2c1>;
265 status = "okay";
266
267 codec: sgtl5000@0a {
268 compatible = "fsl,sgtl5000";
269 pinctrl-names = "default";
270 pinctrl-0 = <&pinctrl_sgtl5000>;
271 reg = <0x0a>;
272 clocks = <&clks 201>;
273 VDDA-supply = <&reg_2p5v>;
274 VDDIO-supply = <&reg_3p3v>;
275 };
276};
277
278&i2c2 {
279 clock-frequency = <100000>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&pinctrl_i2c2>;
282 status = "okay";
283};
284
285&i2c3 {
286 clock-frequency = <100000>;
287 pinctrl-names = "default";
288 pinctrl-0 = <&pinctrl_i2c3>;
289 status = "okay";
290
291 touchscreen@04 {
292 compatible = "eeti,egalax_ts";
293 reg = <0x04>;
294 interrupt-parent = <&gpio1>;
295 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
296 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
297 };
298
299 touchscreen@38 {
300 compatible = "edt,edt-ft5x06";
301 reg = <0x38>;
302 interrupt-parent = <&gpio1>;
303 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
304 };
305
306 rtc@6f {
307 compatible = "isil,isl1208";
308 pinctrl-names = "default";
309 pinctrl-0 = <&pinctrl_rtc>;
310 reg = <0x6f>;
311 interrupts-extended = <&gpio2 26 IRQ_TYPE_LEVEL_LOW>;
312 };
313};
314
315&iomuxc {
316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_j10>;
318 pinctrl-1 = <&pinctrl_j28>;
319
320 imx6dl-nit6xlite {
321 pinctrl_audmux: audmuxgrp {
322 fsl,pins = <
323 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
324 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
325 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
326 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
327 >;
328 };
329
330 pinctrl_bt_rfkill: bt_rfkillgrp {
331 fsl,pins = <
332 /* BT wake */
333 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
334 /* BT reset */
335 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x0b0b0
336 /* BT reg en */
337 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
338 /* BT host wake irq */
339 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x100b0
340 >;
341 };
342
343 pinctrl_ecspi1: ecspi1grp {
344 fsl,pins = <
345 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
346 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
347 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
348 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
349 >;
350 };
351
352 pinctrl_enet: enetgrp {
353 fsl,pins = <
354 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
355 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
356 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
357 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
358 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
359 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
360 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
361 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
362 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
363 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
364 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
365 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
366 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
367 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
368 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
369 /* Phy reset */
370 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0
371 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
372 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
373 >;
374 };
375
376 pinctrl_gpio_keys: gpio_keysgrp {
377 fsl,pins = <
378 /* Home Button: J14 pin 5 */
379 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
380 /* Back Button: J14 pin 7 */
381 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
382 >;
383 };
384
385 pinctrl_i2c1: i2c1grp {
386 fsl,pins = <
387 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
388 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
389 >;
390 };
391
392 pinctrl_i2c2: i2c2grp {
393 fsl,pins = <
394 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
395 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
396 >;
397 };
398
399 pinctrl_i2c3: i2c3grp {
400 fsl,pins = <
401 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
402 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
403 /* Touch IRQ: J7 pin 4 */
404 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
405 /* tcs2004 IRQ */
406 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0
407 /* tsc2004 reset */
408 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x0b0b0
409 >;
410 };
411
412 pinctrl_j10: j10grp {
413 fsl,pins = <
414 /* Broadcom WiFi module pins */
415 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
416 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
417 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
418 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
419 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0
420 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
421 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
422 >;
423 };
424
425 pinctrl_j28: j28grp {
426 fsl,pins = <
427 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
428 >;
429 };
430
431 pinctrl_leds: ledsgrp {
432 fsl,pins = <
433 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x0b0b0
434 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x0b0b0
435 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x030b0
436 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0b0b0
437 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0b0b0
438 >;
439 };
440
441 pinctrl_pwm1: pwm1grp {
442 fsl,pins = <
443 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
444 >;
445 };
446
447 pinctrl_pwm3: pwm3grp {
448 fsl,pins = <
449 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
450 >;
451 };
452
453 pinctrl_pwm4: pwm4grp {
454 fsl,pins = <
455 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
456 >;
457 };
458
459 pinctrl_wlan_vmmc: wlan_vmmcgrp {
460 fsl,pins = <
461 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x030b0
462 >;
463 };
464
465 pinctrl_rtc: rtcgrp {
466 fsl,pins = <
467 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b0
468 >;
469 };
470
471 pinctrl_sgtl5000: sgtl5000grp {
472 fsl,pins = <
473 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
474 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
475 >;
476 };
477
478 pinctrl_uart1: uart1grp {
479 fsl,pins = <
480 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
481 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
482 >;
483 };
484
485 pinctrl_uart2: uart2grp {
486 fsl,pins = <
487 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
488 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
489 >;
490 };
491
492 pinctrl_uart3: uart3grp {
493 fsl,pins = <
494 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
495 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
496 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
497 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
498 >;
499 };
500
501 pinctrl_usbotg: usbotggrp {
502 fsl,pins = <
503 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
504 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
505 /* power enable, high active */
506 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
507 >;
508 };
509
510 pinctrl_usdhc2: usdhc2grp {
511 fsl,pins = <
512 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
513 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
514 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
515 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
516 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
517 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
518 >;
519 };
520
521 pinctrl_usdhc3: usdhc3grp {
522 fsl,pins = <
523 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
524 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
525 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
526 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
527 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
528 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
529 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
530 >;
531 };
532 };
533};
534
535&ldb {
536 status = "okay";
537
538 lvds-channel@0 {
539 fsl,data-mapping = "spwg";
540 fsl,data-width = <18>;
541 status = "okay";
542
543 port@4 {
544 reg = <4>;
545
546 lvds0_out: endpoint {
547 remote-endpoint = <&panel_in_lvds0>;
548 };
549 };
550 };
551};
552
553&pcie {
554 status = "okay";
555};
556
557&pwm1 {
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_pwm1>;
560 status = "okay";
561};
562
563&pwm3 {
564 pinctrl-names = "default";
565 pinctrl-0 = <&pinctrl_pwm3>;
566 status = "okay";
567};
568
569&pwm4 {
570 pinctrl-names = "default";
571 pinctrl-0 = <&pinctrl_pwm4>;
572 status = "okay";
573};
574
575&ssi1 {
576 status = "okay";
577};
578
579&uart1 {
580 pinctrl-names = "default";
581 pinctrl-0 = <&pinctrl_uart1>;
582 status = "okay";
583};
584
585&uart2 {
586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_uart2>;
588 status = "okay";
589};
590
591&uart3 {
592 pinctrl-names = "default";
593 pinctrl-0 = <&pinctrl_uart3>;
594 fsl,uart-has-rtscts;
595 status = "okay";
596};
597
598&usbh1 {
599 status = "okay";
600};
601
602&usbotg {
603 vbus-supply = <&reg_usb_otg_vbus>;
604 pinctrl-names = "default";
605 pinctrl-0 = <&pinctrl_usbotg>;
606 disable-over-current;
607 status = "okay";
608};
609
610&usdhc2 {
611 pinctrl-names = "default";
612 pinctrl-0 = <&pinctrl_usdhc2>;
613 bus-width = <4>;
614 non-removable;
615 vmmc-supply = <&reg_3p3v>;
616 vqmmc-supply = <&reg_wlan_vmmc>;
617 vqmmc-1-8-v;
618 ocr-limit = <0x180>; /* 1.65v - 2.1v */
619 cap-power-off-card;
620 keep-power-in-suspend;
621 status = "okay";
622};
623
624&usdhc3 {
625 pinctrl-names = "default";
626 pinctrl-0 = <&pinctrl_usdhc3>;
627 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
628 vmmc-supply = <&reg_3p3v>;
629 status = "okay";
630};
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
new file mode 100644
index 000000000000..a35d54fd9cd3
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
@@ -0,0 +1,873 @@
1/*
2 * Copyright 2015 Boundary Devices, Inc.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41#include <dt-bindings/gpio/gpio.h>
42#include <dt-bindings/input/input.h>
43
44/ {
45 chosen {
46 stdout-path = &uart2;
47 };
48
49 memory {
50 reg = <0x10000000 0xF0000000>;
51 };
52
53 regulators {
54 compatible = "simple-bus";
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 reg_1p8v: regulator@0 {
59 compatible = "regulator-fixed";
60 reg = <0>;
61 regulator-name = "1P8V";
62 regulator-min-microvolt = <1800000>;
63 regulator-max-microvolt = <1800000>;
64 regulator-always-on;
65 };
66
67 reg_2p5v: regulator@1 {
68 compatible = "regulator-fixed";
69 reg = <1>;
70 regulator-name = "2P5V";
71 regulator-min-microvolt = <2500000>;
72 regulator-max-microvolt = <2500000>;
73 regulator-always-on;
74 };
75
76 reg_3p3v: regulator@2 {
77 compatible = "regulator-fixed";
78 reg = <2>;
79 regulator-name = "3P3V";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 regulator-always-on;
83 };
84
85 reg_usb_otg_vbus: regulator@3 {
86 compatible = "regulator-fixed";
87 reg = <3>;
88 regulator-name = "usb_otg_vbus";
89 regulator-min-microvolt = <5000000>;
90 regulator-max-microvolt = <5000000>;
91 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
92 enable-active-high;
93 };
94
95 reg_usb_h1_vbus: regulator@4 {
96 compatible = "regulator-fixed";
97 reg = <4>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_usbh1>;
100 regulator-name = "usb_h1_vbus";
101 regulator-min-microvolt = <3300000>;
102 regulator-max-microvolt = <3300000>;
103 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
104 enable-active-high;
105 };
106
107 reg_wlan_vmmc: regulator@5 {
108 compatible = "regulator-fixed";
109 reg = <5>;
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_wlan_vmmc>;
112 regulator-name = "reg_wlan_vmmc";
113 regulator-min-microvolt = <3300000>;
114 regulator-max-microvolt = <3300000>;
115 gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
116 startup-delay-us = <70000>;
117 enable-active-high;
118 };
119
120 reg_can_xcvr: regulator@6 {
121 compatible = "regulator-fixed";
122 reg = <6>;
123 regulator-name = "CAN XCVR";
124 regulator-min-microvolt = <3300000>;
125 regulator-max-microvolt = <3300000>;
126 pinctrl-names = "default";
127 pinctrl-0 = <&pinctrl_can_xcvr>;
128 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
129 };
130 };
131
132 gpio-keys {
133 compatible = "gpio-keys";
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_gpio_keys>;
136
137 power {
138 label = "Power Button";
139 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
140 linux,code = <KEY_POWER>;
141 gpio-key,wakeup;
142 };
143
144 menu {
145 label = "Menu";
146 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
147 linux,code = <KEY_MENU>;
148 };
149
150 home {
151 label = "Home";
152 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
153 linux,code = <KEY_HOME>;
154 };
155
156 back {
157 label = "Back";
158 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
159 linux,code = <KEY_BACK>;
160 };
161
162 volume-up {
163 label = "Volume Up";
164 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
165 linux,code = <KEY_VOLUMEUP>;
166 };
167
168 volume-down {
169 label = "Volume Down";
170 gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
171 linux,code = <KEY_VOLUMEDOWN>;
172 };
173 };
174
175 i2cmux@2 {
176 compatible = "i2c-mux-gpio";
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_i2c2mux>;
179 #address-cells = <1>;
180 #size-cells = <0>;
181 mux-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH
182 &gpio4 15 GPIO_ACTIVE_HIGH>;
183 i2c-parent = <&i2c2>;
184 idle-state = <0>;
185
186 i2c2@1 {
187 reg = <1>;
188 #address-cells = <1>;
189 #size-cells = <0>;
190 };
191
192 i2c2@2 {
193 reg = <2>;
194 #address-cells = <1>;
195 #size-cells = <0>;
196 };
197 };
198
199 i2cmux@3 {
200 compatible = "i2c-mux-gpio";
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_i2c3mux>;
203 #address-cells = <1>;
204 #size-cells = <0>;
205 mux-gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
206 i2c-parent = <&i2c3>;
207 idle-state = <0>;
208
209 i2c3@1 {
210 reg = <1>;
211 #address-cells = <1>;
212 #size-cells = <0>;
213 };
214 };
215
216 leds {
217 compatible = "gpio-leds";
218
219 speaker-enable {
220 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
221 retain-state-suspended;
222 default-state = "off";
223 };
224
225 ttymxc4-rs232 {
226 gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;
227 retain-state-suspended;
228 default-state = "on";
229 };
230 };
231
232 backlight_lcd: backlight_lcd {
233 compatible = "pwm-backlight";
234 pwms = <&pwm1 0 5000000>;
235 brightness-levels = <0 4 8 16 32 64 128 255>;
236 default-brightness-level = <7>;
237 power-supply = <&reg_3p3v>;
238 status = "okay";
239 };
240
241 backlight_lvds0: backlight_lvds0 {
242 compatible = "pwm-backlight";
243 pwms = <&pwm4 0 5000000>;
244 brightness-levels = <0 4 8 16 32 64 128 255>;
245 default-brightness-level = <7>;
246 power-supply = <&reg_3p3v>;
247 status = "okay";
248 };
249
250 backlight_lvds1: backlight_lvds1 {
251 compatible = "pwm-backlight";
252 pwms = <&pwm2 0 5000000>;
253 brightness-levels = <0 4 8 16 32 64 128 255>;
254 default-brightness-level = <7>;
255 power-supply = <&reg_3p3v>;
256 status = "okay";
257 };
258
259 lcd_display: display@di0 {
260 compatible = "fsl,imx-parallel-display";
261 #address-cells = <1>;
262 #size-cells = <0>;
263 interface-pix-fmt = "bgr666";
264 pinctrl-names = "default";
265 pinctrl-0 = <&pinctrl_j15>;
266 status = "okay";
267
268 port@0 {
269 reg = <0>;
270
271 lcd_display_in: endpoint {
272 remote-endpoint = <&ipu1_di0_disp0>;
273 };
274 };
275
276 port@1 {
277 reg = <1>;
278
279 lcd_display_out: endpoint {
280 remote-endpoint = <&lcd_panel_in>;
281 };
282 };
283 };
284
285 panel_lcd {
286 compatible = "okaya,rs800480t-7x0gp";
287 backlight = <&backlight_lcd>;
288
289 port {
290 lcd_panel_in: endpoint {
291 remote-endpoint = <&lcd_display_out>;
292 };
293 };
294 };
295
296 panel_lvds0 {
297 compatible = "hannstar,hsd100pxn1";
298 backlight = <&backlight_lvds0>;
299
300 port {
301 panel_in_lvds0: endpoint {
302 remote-endpoint = <&lvds0_out>;
303 };
304 };
305 };
306
307 panel_lvds1 {
308 compatible = "hannstar,hsd100pxn1";
309 backlight = <&backlight_lvds1>;
310
311 port {
312 panel_in_lvds1: endpoint {
313 remote-endpoint = <&lvds1_out>;
314 };
315 };
316 };
317
318 sound {
319 compatible = "fsl,imx6q-nitrogen6_max-sgtl5000",
320 "fsl,imx-audio-sgtl5000";
321 model = "imx6q-nitrogen6_max-sgtl5000";
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_sgtl5000>;
324 ssi-controller = <&ssi1>;
325 audio-codec = <&codec>;
326 audio-routing =
327 "MIC_IN", "Mic Jack",
328 "Mic Jack", "Mic Bias",
329 "Headphone Jack", "HP_OUT";
330 mux-int-port = <1>;
331 mux-ext-port = <3>;
332 };
333};
334
335&audmux {
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_audmux>;
338 status = "okay";
339};
340
341&can1 {
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_can1>;
344 xceiver-supply = <&reg_can_xcvr>;
345 status = "okay";
346};
347
348&clks {
349 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
350 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
351 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
352 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
353};
354
355&ecspi1 {
356 fsl,spi-num-chipselects = <1>;
357 cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
358 pinctrl-names = "default";
359 pinctrl-0 = <&pinctrl_ecspi1>;
360 status = "okay";
361
362 flash: m25p80@0 {
363 compatible = "microchip,sst25vf016b";
364 spi-max-frequency = <20000000>;
365 reg = <0>;
366 };
367};
368
369&fec {
370 pinctrl-names = "default";
371 pinctrl-0 = <&pinctrl_enet>;
372 phy-mode = "rgmii";
373 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
374 txen-skew-ps = <0>;
375 txc-skew-ps = <3000>;
376 rxdv-skew-ps = <0>;
377 rxc-skew-ps = <3000>;
378 rxd0-skew-ps = <0>;
379 rxd1-skew-ps = <0>;
380 rxd2-skew-ps = <0>;
381 rxd3-skew-ps = <0>;
382 txd0-skew-ps = <0>;
383 txd1-skew-ps = <0>;
384 txd2-skew-ps = <0>;
385 txd3-skew-ps = <0>;
386 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
387 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
388 status = "okay";
389};
390
391&hdmi {
392 ddc-i2c-bus = <&i2c2>;
393 status = "okay";
394};
395
396&i2c1 {
397 clock-frequency = <100000>;
398 pinctrl-names = "default";
399 pinctrl-0 = <&pinctrl_i2c1>;
400 status = "okay";
401
402 codec: sgtl5000@0a {
403 compatible = "fsl,sgtl5000";
404 reg = <0x0a>;
405 clocks = <&clks 201>;
406 VDDA-supply = <&reg_2p5v>;
407 VDDIO-supply = <&reg_3p3v>;
408 };
409
410 rtc: rtc@68 {
411 compatible = "st,rv4162";
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_rv4162>;
414 reg = <0x68>;
415 interrupts-extended = <&gpio4 6 IRQ_TYPE_LEVEL_LOW>;
416 };
417};
418
419&i2c2 {
420 clock-frequency = <100000>;
421 pinctrl-names = "default";
422 pinctrl-0 = <&pinctrl_i2c2>;
423 status = "okay";
424};
425
426&i2c3 {
427 clock-frequency = <100000>;
428 pinctrl-names = "default";
429 pinctrl-0 = <&pinctrl_i2c3>;
430 status = "okay";
431
432 touchscreen@04 {
433 compatible = "eeti,egalax_ts";
434 reg = <0x04>;
435 interrupt-parent = <&gpio1>;
436 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
437 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
438 };
439
440 touchscreen@38 {
441 compatible = "edt,edt-ft5x06";
442 reg = <0x38>;
443 interrupt-parent = <&gpio1>;
444 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
445 };
446};
447
448&iomuxc {
449 imx6q-nitrogen6_max {
450 pinctrl_audmux: audmuxgrp {
451 fsl,pins = <
452 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
453 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
454 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
455 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
456 >;
457 };
458
459 pinctrl_can1: can1grp {
460 fsl,pins = <
461 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
462 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
463 >;
464 };
465
466 pinctrl_can_xcvr: can-xcvrgrp {
467 fsl,pins = <
468 /* Flexcan XCVR enable */
469 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
470 >;
471 };
472
473 pinctrl_ecspi1: ecspi1grp {
474 fsl,pins = <
475 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
476 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
477 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
478 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
479 >;
480 };
481
482 pinctrl_enet: enetgrp {
483 fsl,pins = <
484 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
485 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
486 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
487 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
488 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
489 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
490 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
491 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
492 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
493 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
494 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
495 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
496 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
497 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
498 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
499 /* Phy reset */
500 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0
501 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
502 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
503 >;
504 };
505
506 pinctrl_gpio_keys: gpio_keysgrp {
507 fsl,pins = <
508 /* Power Button */
509 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
510 /* Menu Button */
511 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
512 /* Home Button */
513 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
514 /* Back Button */
515 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
516 /* Volume Up Button */
517 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
518 /* Volume Down Button */
519 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0
520 >;
521 };
522
523 pinctrl_i2c1: i2c1grp {
524 fsl,pins = <
525 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
526 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
527 >;
528 };
529
530 pinctrl_i2c2: i2c2grp {
531 fsl,pins = <
532 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
533 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
534 >;
535 };
536
537 pinctrl_i2c2mux: i2c2muxgrp {
538 fsl,pins = <
539 /* ov5642 camera i2c enable */
540 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x000b0
541 /* ov5640_mipi camera i2c enable */
542 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0
543 >;
544 };
545
546 pinctrl_i2c3: i2c3grp {
547 fsl,pins = <
548 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
549 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
550 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
551 >;
552 };
553
554 pinctrl_i2c3mux: i2c3muxgrp {
555 fsl,pins = <
556 /* PCIe I2C enable */
557 MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x000b0
558 >;
559 };
560
561 pinctrl_j15: j15grp {
562 fsl,pins = <
563 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
564 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
565 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
566 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
567 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
568 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
569 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
570 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
571 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
572 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
573 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
574 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
575 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
576 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
577 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
578 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
579 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
580 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
581 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
582 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
583 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
584 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
585 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
586 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
587 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
588 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
589 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
590 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
591 >;
592 };
593
594 pinctrl_pcie: pciegrp {
595 fsl,pins = <
596 /* PCIe reset */
597 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x000b0
598 >;
599 };
600
601 pinctrl_pwm1: pwm1grp {
602 fsl,pins = <
603 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
604 >;
605 };
606
607 pinctrl_pwm2: pwm2grp {
608 fsl,pins = <
609 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
610 >;
611 };
612
613 pinctrl_pwm3: pwm3grp {
614 fsl,pins = <
615 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
616 >;
617 };
618
619 pinctrl_pwm4: pwm4grp {
620 fsl,pins = <
621 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
622 >;
623 };
624
625 pinctrl_rv4162: rv4162grp {
626 fsl,pins = <
627 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
628 >;
629 };
630
631 pinctrl_sgtl5000: sgtl5000grp {
632 fsl,pins = <
633 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
634 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
635 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
636 >;
637 };
638
639 pinctrl_uart1: uart1grp {
640 fsl,pins = <
641 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
642 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
643 >;
644 };
645
646 pinctrl_uart2: uart2grp {
647 fsl,pins = <
648 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
649 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
650 >;
651 };
652
653 pinctrl_uart5: uart5grp {
654 fsl,pins = <
655 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x130b1
656 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x030b1
657 /* RS485 RX Enable: pull up */
658 MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b1
659 /* RS485 DEN: pull down */
660 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x030b1
661 /* RS485/!RS232 Select: pull down (rs232) */
662 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x030b1
663 /* ON: pull down */
664 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x030b1
665 >;
666 };
667
668 pinctrl_usbh1: usbh1grp {
669 fsl,pins = <
670 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x0b0b0
671 >;
672 };
673
674 pinctrl_usbotg: usbotggrp {
675 fsl,pins = <
676 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
677 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
678 /* power enable, high active */
679 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
680 >;
681 };
682
683 pinctrl_usdhc2: usdhc2grp {
684 fsl,pins = <
685 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
686 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
687 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
688 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
689 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
690 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
691 >;
692 };
693
694 pinctrl_usdhc3: usdhc3grp {
695 fsl,pins = <
696 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
697 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
698 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
699 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
700 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
701 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
702 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x100b0
703 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
704 >;
705 };
706
707 pinctrl_usdhc4: usdhc4grp {
708 fsl,pins = <
709 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
710 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
711 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
712 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
713 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
714 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
715 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
716 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
717 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
718 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
719 >;
720 };
721
722 pinctrl_wlan_vmmc: wlan_vmmcgrp {
723 fsl,pins = <
724 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0
725 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
726 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0
727 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
728 >;
729 };
730 };
731};
732
733&ipu1_di0_disp0 {
734 remote-endpoint = <&lcd_display_in>;
735};
736
737&ldb {
738 status = "okay";
739
740 lvds-channel@0 {
741 fsl,data-mapping = "spwg";
742 fsl,data-width = <18>;
743 status = "okay";
744
745 port@4 {
746 reg = <4>;
747
748 lvds0_out: endpoint {
749 remote-endpoint = <&panel_in_lvds0>;
750 };
751 };
752 };
753
754 lvds-channel@1 {
755 fsl,data-mapping = "spwg";
756 fsl,data-width = <18>;
757 status = "okay";
758
759 port@4 {
760 reg = <4>;
761
762 lvds1_out: endpoint {
763 remote-endpoint = <&panel_in_lvds1>;
764 };
765 };
766 };
767};
768
769&pcie {
770 pinctrl-names = "default";
771 pinctrl-0 = <&pinctrl_pcie>;
772 reset-gpio = <&gpio6 31 GPIO_ACTIVE_LOW>;
773 status = "okay";
774};
775
776&pwm1 {
777 pinctrl-names = "default";
778 pinctrl-0 = <&pinctrl_pwm1>;
779 status = "okay";
780};
781
782&pwm2 {
783 pinctrl-names = "default";
784 pinctrl-0 = <&pinctrl_pwm2>;
785 status = "okay";
786};
787
788&pwm3 {
789 pinctrl-names = "default";
790 pinctrl-0 = <&pinctrl_pwm3>;
791 status = "okay";
792};
793
794&pwm4 {
795 pinctrl-names = "default";
796 pinctrl-0 = <&pinctrl_pwm4>;
797 status = "okay";
798};
799
800&ssi1 {
801 status = "okay";
802};
803
804&uart1 {
805 pinctrl-names = "default";
806 pinctrl-0 = <&pinctrl_uart1>;
807 status = "okay";
808};
809
810&uart2 {
811 pinctrl-names = "default";
812 pinctrl-0 = <&pinctrl_uart2>;
813 status = "okay";
814};
815
816&uart5 {
817 pinctrl-names = "default";
818 pinctrl-0 = <&pinctrl_uart5>;
819 status = "okay";
820};
821
822&usbh1 {
823 vbus-supply = <&reg_usb_h1_vbus>;
824 status = "okay";
825};
826
827&usbotg {
828 vbus-supply = <&reg_usb_otg_vbus>;
829 pinctrl-names = "default";
830 pinctrl-0 = <&pinctrl_usbotg>;
831 disable-over-current;
832 status = "okay";
833};
834
835&usdhc2 {
836 pinctrl-names = "default";
837 pinctrl-0 = <&pinctrl_usdhc2>;
838 bus-width = <4>;
839 non-removable;
840 vmmc-supply = <&reg_wlan_vmmc>;
841 cap-power-off-card;
842 keep-power-in-suspend;
843 status = "okay";
844
845 #address-cells = <1>;
846 #size-cells = <0>;
847 wlcore: wlcore@2 {
848 compatible = "ti,wl1271";
849 reg = <2>;
850 interrupt-parent = <&gpio6>;
851 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
852 ref-clock-frequency = <38400000>;
853 };
854};
855
856&usdhc3 {
857 pinctrl-names = "default";
858 pinctrl-0 = <&pinctrl_usdhc3>;
859 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
860 bus-width = <4>;
861 vmmc-supply = <&reg_3p3v>;
862 status = "okay";
863};
864
865&usdhc4 {
866 pinctrl-names = "default";
867 pinctrl-0 = <&pinctrl_usdhc4>;
868 bus-width = <8>;
869 non-removable;
870 vmmc-supply = <&reg_1p8v>;
871 keep-power-in-suspend;
872 status = "okay";
873};
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 340bc8e42650..caeed56b74a3 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -3,12 +3,42 @@
3 * Copyright 2011 Freescale Semiconductor, Inc. 3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd. 4 * Copyright 2011 Linaro Ltd.
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * This file is dual-licensed: you can use it either under the terms
7 * License. You may obtain a copy of the GNU General Public License 7 * of the GPL or the X11 license, at your option. Note that this dual
8 * Version 2 or later at the following locations: 8 * licensing only applies to this file, and not this project as a
9 * whole.
9 * 10 *
10 * http://www.opensource.org/licenses/gpl-license.html 11 * a) This file is free software; you can redistribute it and/or
11 * http://www.gnu.org/copyleft/gpl.html 12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
15 * This file is distributed in the hope that it will be useful
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
12 */ 42 */
13#include <dt-bindings/gpio/gpio.h> 43#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/input/input.h> 44#include <dt-bindings/input/input.h>
@@ -65,6 +95,19 @@
65 pinctrl-0 = <&pinctrl_can_xcvr>; 95 pinctrl-0 = <&pinctrl_can_xcvr>;
66 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; 96 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
67 }; 97 };
98
99 reg_wlan_vmmc: regulator@4 {
100 compatible = "regulator-fixed";
101 reg = <4>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_wlan_vmmc>;
104 regulator-name = "reg_wlan_vmmc";
105 regulator-min-microvolt = <3300000>;
106 regulator-max-microvolt = <3300000>;
107 gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
108 startup-delay-us = <70000>;
109 enable-active-high;
110 };
68 }; 111 };
69 112
70 gpio-keys { 113 gpio-keys {
@@ -124,7 +167,7 @@
124 mux-ext-port = <3>; 167 mux-ext-port = <3>;
125 }; 168 };
126 169
127 backlight_lcd { 170 backlight_lcd: backlight_lcd {
128 compatible = "pwm-backlight"; 171 compatible = "pwm-backlight";
129 pwms = <&pwm1 0 5000000>; 172 pwms = <&pwm1 0 5000000>;
130 brightness-levels = <0 4 8 16 32 64 128 255>; 173 brightness-levels = <0 4 8 16 32 64 128 255>;
@@ -142,6 +185,43 @@
142 status = "okay"; 185 status = "okay";
143 }; 186 };
144 187
188 lcd_display: display@di0 {
189 compatible = "fsl,imx-parallel-display";
190 #address-cells = <1>;
191 #size-cells = <0>;
192 interface-pix-fmt = "bgr666";
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_j15>;
195 status = "okay";
196
197 port@0 {
198 reg = <0>;
199
200 lcd_display_in: endpoint {
201 remote-endpoint = <&ipu1_di0_disp0>;
202 };
203 };
204
205 port@1 {
206 reg = <1>;
207
208 lcd_display_out: endpoint {
209 remote-endpoint = <&lcd_panel_in>;
210 };
211 };
212 };
213
214 lcd_panel {
215 compatible = "okaya,rs800480t-7x0gp";
216 backlight = <&backlight_lcd>;
217
218 port {
219 lcd_panel_in: endpoint {
220 remote-endpoint = <&lcd_display_out>;
221 };
222 };
223 };
224
145 panel { 225 panel {
146 compatible = "hannstar,hsd100pxn1"; 226 compatible = "hannstar,hsd100pxn1";
147 backlight = <&backlight_lvds>; 227 backlight = <&backlight_lvds>;
@@ -182,7 +262,7 @@
182 status = "okay"; 262 status = "okay";
183 263
184 flash: m25p80@0 { 264 flash: m25p80@0 {
185 compatible = "sst,sst25vf016b"; 265 compatible = "sst,sst25vf016b", "jedec,spi-nor";
186 spi-max-frequency = <20000000>; 266 spi-max-frequency = <20000000>;
187 reg = <0>; 267 reg = <0>;
188 }; 268 };
@@ -247,6 +327,21 @@
247 pinctrl-names = "default"; 327 pinctrl-names = "default";
248 pinctrl-0 = <&pinctrl_i2c3>; 328 pinctrl-0 = <&pinctrl_i2c3>;
249 status = "okay"; 329 status = "okay";
330
331 touchscreen@04 {
332 compatible = "eeti,egalax_ts";
333 reg = <0x04>;
334 interrupt-parent = <&gpio1>;
335 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
336 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
337 };
338
339 touchscreen@38 {
340 compatible = "edt,edt-ft5x06";
341 reg = <0x38>;
342 interrupt-parent = <&gpio1>;
343 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
344 };
250}; 345};
251 346
252&iomuxc { 347&iomuxc {
@@ -258,6 +353,7 @@
258 fsl,pins = < 353 fsl,pins = <
259 /* SGTL5000 sys_mclk */ 354 /* SGTL5000 sys_mclk */
260 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0 355 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
356 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
261 >; 357 >;
262 }; 358 };
263 359
@@ -354,6 +450,39 @@
354 >; 450 >;
355 }; 451 };
356 452
453 pinctrl_j15: j15grp {
454 fsl,pins = <
455 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
456 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
457 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
458 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
459 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
460 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
461 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
462 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
463 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
464 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
465 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
466 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
467 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
468 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
469 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
470 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
471 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
472 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
473 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
474 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
475 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
476 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
477 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
478 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
479 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
480 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
481 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
482 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
483 >;
484 };
485
357 pinctrl_pwm1: pwm1grp { 486 pinctrl_pwm1: pwm1grp {
358 fsl,pins = < 487 fsl,pins = <
359 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 488 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
@@ -395,6 +524,18 @@
395 >; 524 >;
396 }; 525 };
397 526
527 pinctrl_usdhc2: usdhc2grp {
528 fsl,pins = <
529 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
530 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
531 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
532 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
533 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
534 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
535 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
536 >;
537 };
538
398 pinctrl_usdhc3: usdhc3grp { 539 pinctrl_usdhc3: usdhc3grp {
399 fsl,pins = < 540 fsl,pins = <
400 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 541 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
@@ -418,9 +559,22 @@
418 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */ 559 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
419 >; 560 >;
420 }; 561 };
562
563 pinctrl_wlan_vmmc: wlan_vmmcgrp {
564 fsl,pins = <
565 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0
566 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
567 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0
568 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
569 >;
570 };
421 }; 571 };
422}; 572};
423 573
574&ipu1_di0_disp0 {
575 remote-endpoint = <&lcd_display_in>;
576};
577
424&ldb { 578&ldb {
425 status = "okay"; 579 status = "okay";
426 580
@@ -489,6 +643,27 @@
489 status = "okay"; 643 status = "okay";
490}; 644};
491 645
646&usdhc2 {
647 pinctrl-names = "default";
648 pinctrl-0 = <&pinctrl_usdhc2>;
649 bus-width = <4>;
650 non-removable;
651 vmmc-supply = <&reg_wlan_vmmc>;
652 cap-power-off-card;
653 keep-power-in-suspend;
654 status = "okay";
655
656 #address-cells = <1>;
657 #size-cells = <0>;
658 wlcore: wlcore@2 {
659 compatible = "ti,wl1271";
660 reg = <2>;
661 interrupt-parent = <&gpio6>;
662 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
663 ref-clock-frequency = <38400000>;
664 };
665};
666
492&usdhc3 { 667&usdhc3 {
493 pinctrl-names = "default"; 668 pinctrl-names = "default";
494 pinctrl-0 = <&pinctrl_usdhc3>; 669 pinctrl-0 = <&pinctrl_usdhc3>;
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index 9e6ecd99b472..d6d98d426384 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -12,7 +12,7 @@
12#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/gpio/gpio.h>
13 13
14/ { 14/ {
15 model = "Phytec phyFLEX-i.MX6 Ouad"; 15 model = "Phytec phyFLEX-i.MX6 Quad";
16 compatible = "phytec,imx6q-pfla02", "fsl,imx6q"; 16 compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
17 17
18 memory { 18 memory {
@@ -80,7 +80,7 @@
80 cs-gpios = <&gpio4 24 0>; 80 cs-gpios = <&gpio4 24 0>;
81 81
82 flash@0 { 82 flash@0 {
83 compatible = "m25p80"; 83 compatible = "m25p80", "jedec,spi-nor";
84 spi-max-frequency = <20000000>; 84 spi-max-frequency = <20000000>;
85 reg = <0>; 85 reg = <0>;
86 }; 86 };
@@ -373,7 +373,7 @@
373}; 373};
374 374
375&pcie { 375&pcie {
376 pinctrl-name = "default"; 376 pinctrl-names = "default";
377 pinctrl-0 = <&pinctrl_pcie>; 377 pinctrl-0 = <&pinctrl_pcie>;
378 reset-gpio = <&gpio4 17 0>; 378 reset-gpio = <&gpio4 17 0>;
379 status = "disabled"; 379 status = "disabled";
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index c37bb9ff9fac..8263fc18a7d9 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -133,7 +133,7 @@
133 flash: m25p80@0 { 133 flash: m25p80@0 {
134 #address-cells = <1>; 134 #address-cells = <1>;
135 #size-cells = <1>; 135 #size-cells = <1>;
136 compatible = "st,m25p32"; 136 compatible = "st,m25p32", "jedec,spi-nor";
137 spi-max-frequency = <20000000>; 137 spi-max-frequency = <20000000>;
138 reg = <0>; 138 reg = <0>;
139 }; 139 };
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index ce4c7313f509..1a69a3420ac8 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -2,12 +2,42 @@
2 * Copyright 2011 Freescale Semiconductor, Inc. 2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd. 3 * Copyright 2011 Linaro Ltd.
4 * 4 *
5 * The code contained herein is licensed under the GNU General Public 5 * This file is dual-licensed: you can use it either under the terms
6 * License. You may obtain a copy of the GNU General Public License 6 * of the GPL or the X11 license, at your option. Note that this dual
7 * Version 2 or later at the following locations: 7 * licensing only applies to this file, and not this project as a
8 * whole.
8 * 9 *
9 * http://www.opensource.org/licenses/gpl-license.html 10 * a) This file is free software; you can redistribute it and/or
10 * http://www.gnu.org/copyleft/gpl.html 11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
11 */ 41 */
12#include <dt-bindings/gpio/gpio.h> 42#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h> 43#include <dt-bindings/input/input.h>
@@ -123,7 +153,7 @@
123 mux-ext-port = <4>; 153 mux-ext-port = <4>;
124 }; 154 };
125 155
126 backlight_lcd { 156 backlight_lcd: backlight_lcd {
127 compatible = "pwm-backlight"; 157 compatible = "pwm-backlight";
128 pwms = <&pwm1 0 5000000>; 158 pwms = <&pwm1 0 5000000>;
129 brightness-levels = <0 4 8 16 32 64 128 255>; 159 brightness-levels = <0 4 8 16 32 64 128 255>;
@@ -141,6 +171,43 @@
141 status = "okay"; 171 status = "okay";
142 }; 172 };
143 173
174 lcd_display: display@di0 {
175 compatible = "fsl,imx-parallel-display";
176 #address-cells = <1>;
177 #size-cells = <0>;
178 interface-pix-fmt = "bgr666";
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_j15>;
181 status = "okay";
182
183 port@0 {
184 reg = <0>;
185
186 lcd_display_in: endpoint {
187 remote-endpoint = <&ipu1_di0_disp0>;
188 };
189 };
190
191 port@1 {
192 reg = <1>;
193
194 lcd_display_out: endpoint {
195 remote-endpoint = <&lcd_panel_in>;
196 };
197 };
198 };
199
200 lcd_panel {
201 compatible = "okaya,rs800480t-7x0gp";
202 backlight = <&backlight_lcd>;
203
204 port {
205 lcd_panel_in: endpoint {
206 remote-endpoint = <&lcd_display_out>;
207 };
208 };
209 };
210
144 panel { 211 panel {
145 compatible = "hannstar,hsd100pxn1"; 212 compatible = "hannstar,hsd100pxn1";
146 backlight = <&backlight_lvds>; 213 backlight = <&backlight_lvds>;
@@ -181,7 +248,7 @@
181 status = "okay"; 248 status = "okay";
182 249
183 flash: m25p80@0 { 250 flash: m25p80@0 {
184 compatible = "sst,sst25vf016b"; 251 compatible = "sst,sst25vf016b", "jedec,spi-nor";
185 spi-max-frequency = <20000000>; 252 spi-max-frequency = <20000000>;
186 reg = <0>; 253 reg = <0>;
187 }; 254 };
@@ -348,6 +415,39 @@
348 >; 415 >;
349 }; 416 };
350 417
418 pinctrl_j15: j15grp {
419 fsl,pins = <
420 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
421 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
422 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
423 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
424 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
425 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
426 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
427 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
428 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
429 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
430 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
431 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
432 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
433 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
434 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
435 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
436 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
437 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
438 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
439 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
440 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
441 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
442 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
443 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
444 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
445 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
446 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
447 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
448 >;
449 };
450
351 pinctrl_pwm1: pwm1grp { 451 pinctrl_pwm1: pwm1grp {
352 fsl,pins = < 452 fsl,pins = <
353 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 453 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
@@ -416,6 +516,10 @@
416 }; 516 };
417}; 517};
418 518
519&ipu1_di0_disp0 {
520 remote-endpoint = <&lcd_display_in>;
521};
522
419&ldb { 523&ldb {
420 status = "okay"; 524 status = "okay";
421 525
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 2c07d3a86b61..a6d445c17779 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -158,7 +158,7 @@
158 flash: m25p80@0 { 158 flash: m25p80@0 {
159 #address-cells = <1>; 159 #address-cells = <1>;
160 #size-cells = <1>; 160 #size-cells = <1>;
161 compatible = "st,m25p32"; 161 compatible = "st,m25p32", "jedec,spi-nor";
162 spi-max-frequency = <20000000>; 162 spi-max-frequency = <20000000>;
163 reg = <0>; 163 reg = <0>;
164 }; 164 };
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index e716e6f301c6..2b6cc8bf3c5c 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -218,16 +218,16 @@
218 dmas = <&sdma 14 18 0>, 218 dmas = <&sdma 14 18 0>,
219 <&sdma 15 18 0>; 219 <&sdma 15 18 0>;
220 dma-names = "rx", "tx"; 220 dma-names = "rx", "tx";
221 clocks = <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_OSC>, 221 clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,
222 <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_DUMMY>, 222 <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>,
223 <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>, 223 <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>,
224 <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>, 224 <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_MLB>,
225 <&clks IMX6QDL_CLK_DUMMY>; 225 <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>;
226 clock-names = "core", "rxtx0", 226 clock-names = "core", "rxtx0",
227 "rxtx1", "rxtx2", 227 "rxtx1", "rxtx2",
228 "rxtx3", "rxtx4", 228 "rxtx3", "rxtx4",
229 "rxtx5", "rxtx6", 229 "rxtx5", "rxtx6",
230 "rxtx7"; 230 "rxtx7", "dma";
231 status = "disabled"; 231 status = "disabled";
232 }; 232 };
233 233
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index b84dff2e94ea..be118820e9f7 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -126,7 +126,7 @@
126 flash: m25p80@0 { 126 flash: m25p80@0 {
127 #address-cells = <1>; 127 #address-cells = <1>;
128 #size-cells = <1>; 128 #size-cells = <1>;
129 compatible = "st,m25p32"; 129 compatible = "st,m25p32", "jedec,spi-nor";
130 spi-max-frequency = <20000000>; 130 spi-max-frequency = <20000000>;
131 reg = <0>; 131 reg = <0>;
132 }; 132 };
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 320a27f8889e..d8ba99f1d87b 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -135,8 +135,24 @@
135 ranges; 135 ranges;
136 136
137 spdif: spdif@02004000 { 137 spdif: spdif@02004000 {
138 compatible = "fsl,imx6sl-spdif",
139 "fsl,imx35-spdif";
138 reg = <0x02004000 0x4000>; 140 reg = <0x02004000 0x4000>;
139 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; 141 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
142 dmas = <&sdma 14 18 0>,
143 <&sdma 15 18 0>;
144 dma-names = "rx", "tx";
145 clocks = <&clks IMX6SL_CLK_SPDIF_GCLK>, <&clks IMX6SL_CLK_OSC>,
146 <&clks IMX6SL_CLK_SPDIF>, <&clks IMX6SL_CLK_DUMMY>,
147 <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_DUMMY>,
148 <&clks IMX6SL_CLK_IPG>, <&clks IMX6SL_CLK_DUMMY>,
149 <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_SPBA>;
150 clock-names = "core", "rxtx0",
151 "rxtx1", "rxtx2",
152 "rxtx3", "rxtx4",
153 "rxtx5", "rxtx6",
154 "rxtx7", "dma";
155 status = "disabled";
140 }; 156 };
141 157
142 ecspi1: ecspi@02008000 { 158 ecspi1: ecspi@02008000 {
@@ -670,8 +686,11 @@
670 }; 686 };
671 687
672 dcp: dcp@020fc000 { 688 dcp: dcp@020fc000 {
689 compatible = "fsl,imx6sl-dcp", "fsl,imx28-dcp";
673 reg = <0x020fc000 0x4000>; 690 reg = <0x020fc000 0x4000>;
674 interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>; 691 interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,
692 <0 100 IRQ_TYPE_LEVEL_HIGH>,
693 <0 101 IRQ_TYPE_LEVEL_HIGH>;
675 }; 694 };
676 }; 695 };
677 696
diff --git a/arch/arm/boot/dts/imx6sx-sdb-reva.dts b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
index c76b87cba275..71005478cdf0 100644
--- a/arch/arm/boot/dts/imx6sx-sdb-reva.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
@@ -129,7 +129,7 @@
129 reg = <0>; 129 reg = <0>;
130 #address-cells = <1>; 130 #address-cells = <1>;
131 #size-cells = <1>; 131 #size-cells = <1>;
132 compatible = "spansion,s25fl128s"; 132 compatible = "spansion,s25fl128s", "jedec,spi-nor";
133 spi-max-frequency = <66000000>; 133 spi-max-frequency = <66000000>;
134 }; 134 };
135 135
@@ -137,7 +137,7 @@
137 reg = <1>; 137 reg = <1>;
138 #address-cells = <1>; 138 #address-cells = <1>;
139 #size-cells = <1>; 139 #size-cells = <1>;
140 compatible = "spansion,s25fl128s"; 140 compatible = "spansion,s25fl128s", "jedec,spi-nor";
141 spi-max-frequency = <66000000>; 141 spi-max-frequency = <66000000>;
142 }; 142 };
143}; 143};
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index 0bfc4e7865b2..0ad164ab5729 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -130,7 +130,7 @@
130 flash0: n25q256a@0 { 130 flash0: n25q256a@0 {
131 #address-cells = <1>; 131 #address-cells = <1>;
132 #size-cells = <1>; 132 #size-cells = <1>;
133 compatible = "micron,n25q256a"; 133 compatible = "micron,n25q256a", "jedec,spi-nor";
134 spi-max-frequency = <29000000>; 134 spi-max-frequency = <29000000>;
135 reg = <0>; 135 reg = <0>;
136 }; 136 };
@@ -138,7 +138,7 @@
138 flash1: n25q256a@1 { 138 flash1: n25q256a@1 {
139 #address-cells = <1>; 139 #address-cells = <1>;
140 #size-cells = <1>; 140 #size-cells = <1>;
141 compatible = "micron,n25q256a"; 141 compatible = "micron,n25q256a", "jedec,spi-nor";
142 spi-max-frequency = <29000000>; 142 spi-max-frequency = <29000000>;
143 reg = <1>; 143 reg = <1>;
144 }; 144 };
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi
index ac88c3467078..94ac4005d9cd 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dtsi
+++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi
@@ -114,7 +114,7 @@
114 regulator-name = "peri_3v3"; 114 regulator-name = "peri_3v3";
115 regulator-min-microvolt = <3300000>; 115 regulator-min-microvolt = <3300000>;
116 regulator-max-microvolt = <3300000>; 116 regulator-max-microvolt = <3300000>;
117 gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; 117 gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
118 enable-active-high; 118 enable-active-high;
119 regulator-always-on; 119 regulator-always-on;
120 }; 120 };
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index c94f2ea2316e..167f77b3bd43 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -211,7 +211,7 @@
211 dmas = <&sdma 14 18 0>, 211 dmas = <&sdma 14 18 0>,
212 <&sdma 15 18 0>; 212 <&sdma 15 18 0>;
213 dma-names = "rx", "tx"; 213 dma-names = "rx", "tx";
214 clocks = <&clks IMX6SX_CLK_SPDIF>, 214 clocks = <&clks IMX6SX_CLK_SPDIF_GCLK>,
215 <&clks IMX6SX_CLK_OSC>, 215 <&clks IMX6SX_CLK_OSC>,
216 <&clks IMX6SX_CLK_SPDIF>, 216 <&clks IMX6SX_CLK_SPDIF>,
217 <&clks 0>, <&clks 0>, <&clks 0>, 217 <&clks 0>, <&clks 0>, <&clks 0>,
diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dts b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
index 25746b122ea6..6aaa5ec3d846 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-evk.dts
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
@@ -87,6 +87,19 @@
87 }; 87 };
88}; 88};
89 89
90&snvs_poweroff {
91 status = "okay";
92};
93
94&tsc {
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_tsc>;
97 xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
98 measure-delay-time = <0xffff>;
99 pre-charge-time = <0xfff>;
100 status = "okay";
101};
102
90&uart1 { 103&uart1 {
91 pinctrl-names = "default"; 104 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_uart1>; 105 pinctrl-0 = <&pinctrl_uart1>;
@@ -277,6 +290,15 @@
277 >; 290 >;
278 }; 291 };
279 292
293 pinctrl_tsc: tscgrp {
294 fsl,pins = <
295 MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
296 MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
297 MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
298 MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
299 >;
300 };
301
280 pinctrl_uart1: uart1grp { 302 pinctrl_uart1: uart1grp {
281 fsl,pins = < 303 fsl,pins = <
282 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 304 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 09edbedfd908..d00e994bdbd2 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -135,6 +135,11 @@
135 status = "disabled"; 135 status = "disabled";
136 }; 136 };
137 137
138 ocram: sram@00900000 {
139 compatible = "mmio-sram";
140 reg = <0x00900000 0x20000>;
141 };
142
138 aips1: aips-bus@02000000 { 143 aips1: aips-bus@02000000 {
139 compatible = "fsl,aips-bus", "simple-bus"; 144 compatible = "fsl,aips-bus", "simple-bus";
140 #address-cells = <1>; 145 #address-cells = <1>;
@@ -424,6 +429,14 @@
424 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 429 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
425 }; 430 };
426 431
432 snvs_poweroff: snvs-poweroff {
433 compatible = "syscon-poweroff";
434 regmap = <&snvs>;
435 offset = <0x38>;
436 mask = <0x60>;
437 status = "disabled";
438 };
439
427 snvs_pwrkey: snvs-powerkey { 440 snvs_pwrkey: snvs-powerkey {
428 compatible = "fsl,sec-v4.0-pwrkey"; 441 compatible = "fsl,sec-v4.0-pwrkey";
429 regmap = <&snvs>; 442 regmap = <&snvs>;
@@ -571,6 +584,17 @@
571 status = "disabled"; 584 status = "disabled";
572 }; 585 };
573 586
587 tsc: tsc@02040000 {
588 compatible = "fsl,imx6ul-tsc";
589 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
590 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
591 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&clks IMX6UL_CLK_IPG>,
593 <&clks IMX6UL_CLK_ADC2>;
594 clock-names = "tsc", "adc";
595 status = "disabled";
596 };
597
574 usdhc1: usdhc@02190000 { 598 usdhc1: usdhc@02190000 {
575 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; 599 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
576 reg = <0x02190000 0x4000>; 600 reg = <0x02190000 0x4000>;
@@ -625,6 +649,11 @@
625 status = "disabled"; 649 status = "disabled";
626 }; 650 };
627 651
652 mmdc: mmdc@021b0000 {
653 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
654 reg = <0x021b0000 0x4000>;
655 };
656
628 qspi: qspi@021e0000 { 657 qspi: qspi@021e0000 {
629 #address-cells = <1>; 658 #address-cells = <1>;
630 #size-cells = <0>; 659 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/imx7d-pinfunc.h b/arch/arm/boot/dts/imx7d-pinfunc.h
index a8d81497edb3..eeda78347619 100644
--- a/arch/arm/boot/dts/imx7d-pinfunc.h
+++ b/arch/arm/boot/dts/imx7d-pinfunc.h
@@ -15,6 +15,122 @@
15 * <mux_reg conf_reg input_reg mux_mode input_val> 15 * <mux_reg conf_reg input_reg mux_mode input_val>
16 */ 16 */
17 17
18#define MX7D_PAD_GPIO1_IO00__GPIO1_IO0 0x0000 0x0030 0x0000 0x0 0x0
19#define MX7D_PAD_GPIO1_IO00__PWM4_OUT 0x0000 0x0030 0x0000 0x1 0x0
20#define MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_ANY 0x0000 0x0030 0x0000 0x2 0x0
21#define MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x0000 0x0030 0x0000 0x3 0x0
22#define MX7D_PAD_GPIO1_IO00__WDOD1_WDOG__RST_B_DEB 0x0000 0x0030 0x0000 0x4 0x0
23#define MX7D_PAD_GPIO1_IO01__GPIO1_IO1 0x0004 0x0034 0x0000 0x0 0x0
24#define MX7D_PAD_GPIO1_IO01__PWM1_OUT 0x0004 0x0034 0x0000 0x1 0x0
25#define MX7D_PAD_GPIO1_IO01__CCM_ENET_REF_CLK3 0x0004 0x0034 0x0000 0x2 0x0
26#define MX7D_PAD_GPIO1_IO01__SAI1_MCLK 0x0004 0x0034 0x0000 0x3 0x0
27#define MX7D_PAD_GPIO1_IO01__ANATOP_24M_OUT 0x0004 0x0034 0x0000 0x4 0x0
28#define MX7D_PAD_GPIO1_IO01__OBSERVE0_OUT 0x0004 0x0034 0x0000 0x6 0x0
29#define MX7D_PAD_GPIO1_IO02__GPIO1_IO2 0x0008 0x0038 0x0000 0x0 0x0
30#define MX7D_PAD_GPIO1_IO02__PWM2_OUT 0x0008 0x0038 0x0000 0x1 0x0
31#define MX7D_PAD_GPIO1_IO02__CCM_ENET_REF_CLK1 0x0008 0x0038 0x0564 0x2 0x3
32#define MX7D_PAD_GPIO1_IO02__SAI2_MCLK 0x0008 0x0038 0x0000 0x3 0x0
33#define MX7D_PAD_GPIO1_IO02__CCM_CLKO1 0x0008 0x0038 0x0000 0x5 0x0
34#define MX7D_PAD_GPIO1_IO02__OBSERVE1_OUT 0x0008 0x0038 0x0000 0x6 0x0
35#define MX7D_PAD_GPIO1_IO02__USB_OTG1_ID 0x0008 0x0038 0x0734 0x7 0x3
36#define MX7D_PAD_GPIO1_IO03__GPIO1_IO3 0x000C 0x003C 0x0000 0x0 0x0
37#define MX7D_PAD_GPIO1_IO03__PWM3_OUT 0x000C 0x003C 0x0000 0x1 0x0
38#define MX7D_PAD_GPIO1_IO03__CCM_ENET_REF_CLK2 0x000C 0x003C 0x0570 0x2 0x3
39#define MX7D_PAD_GPIO1_IO03__SAI3_MCLK 0x000C 0x003C 0x0000 0x3 0x0
40#define MX7D_PAD_GPIO1_IO03__CCM_CLKO2 0x000C 0x003C 0x0000 0x5 0x0
41#define MX7D_PAD_GPIO1_IO03__OBSERVE2_OUT 0x000C 0x003C 0x0000 0x6 0x0
42#define MX7D_PAD_GPIO1_IO03__USB_OTG2_ID 0x000C 0x003C 0x0730 0x7 0x3
43#define MX7D_PAD_GPIO1_IO04__GPIO1_IO4 0x0010 0x0040 0x0000 0x0 0x0
44#define MX7D_PAD_GPIO1_IO04__USB_OTG1_OC 0x0010 0x0040 0x072C 0x1 0x1
45#define MX7D_PAD_GPIO1_IO04__FLEXTIMER1_CH4 0x0010 0x0040 0x0594 0x2 0x1
46#define MX7D_PAD_GPIO1_IO04__UART5_CTS_B 0x0010 0x0040 0x0710 0x3 0x4
47#define MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x0010 0x0040 0x05D4 0x4 0x2
48#define MX7D_PAD_GPIO1_IO04__OBSERVE3_OUT 0x0010 0x0040 0x0000 0x6 0x0
49#define MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x0014 0x0044 0x0000 0x0 0x0
50#define MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR 0x0014 0x0044 0x0000 0x1 0x0
51#define MX7D_PAD_GPIO1_IO05__FLEXTIMER1_CH5 0x0014 0x0044 0x0598 0x2 0x1
52#define MX7D_PAD_GPIO1_IO05__UART5_RTS_B 0x0014 0x0044 0x0710 0x3 0x5
53#define MX7D_PAD_GPIO1_IO05__I2C1_SDA 0x0014 0x0044 0x05D8 0x4 0x2
54#define MX7D_PAD_GPIO1_IO05__OBSERVE4_OUT 0x0014 0x0044 0x0000 0x6 0x0
55#define MX7D_PAD_GPIO1_IO06__GPIO1_IO6 0x0018 0x0048 0x0000 0x0 0x0
56#define MX7D_PAD_GPIO1_IO06__USB_OTG2_OC 0x0018 0x0048 0x0728 0x1 0x1
57#define MX7D_PAD_GPIO1_IO06__FLEXTIMER1_CH6 0x0018 0x0048 0x059C 0x2 0x1
58#define MX7D_PAD_GPIO1_IO06__UART5_RX_DATA 0x0018 0x0048 0x0714 0x3 0x4
59#define MX7D_PAD_GPIO1_IO06__I2C2_SCL 0x0018 0x0048 0x05DC 0x4 0x2
60#define MX7D_PAD_GPIO1_IO06__CCM_WAIT 0x0018 0x0048 0x0000 0x5 0x0
61#define MX7D_PAD_GPIO1_IO06__KPP_ROW4 0x0018 0x0048 0x0624 0x6 0x1
62#define MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x001C 0x004C 0x0000 0x0 0x0
63#define MX7D_PAD_GPIO1_IO07__USB_OTG2_PWR 0x001C 0x004C 0x0000 0x1 0x0
64#define MX7D_PAD_GPIO1_IO07__FLEXTIMER1_CH7 0x001C 0x004C 0x05A0 0x2 0x1
65#define MX7D_PAD_GPIO1_IO07__UART5_TX_DATA 0x001C 0x004C 0x0714 0x3 0x5
66#define MX7D_PAD_GPIO1_IO07__I2C2_SDA 0x001C 0x004C 0x05E0 0x4 0x2
67#define MX7D_PAD_GPIO1_IO07__CCM_STOP 0x001C 0x004C 0x0000 0x5 0x0
68#define MX7D_PAD_GPIO1_IO07__KPP_COL4 0x001C 0x004C 0x0604 0x6 0x1
69#define MX7D_PAD_GPIO1_IO08__GPIO1_IO8 0x0014 0x026C 0x0000 0x0 0x0
70#define MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x0014 0x026C 0x0000 0x1 0x0
71#define MX7D_PAD_GPIO1_IO08__WDOG1_WDOG_B 0x0014 0x026C 0x0000 0x2 0x0
72#define MX7D_PAD_GPIO1_IO08__UART3_DCE_RX 0x0014 0x026C 0x0704 0x3 0x0
73#define MX7D_PAD_GPIO1_IO08__UART3_DTE_TX 0x0014 0x026C 0x0000 0x3 0x0
74#define MX7D_PAD_GPIO1_IO08__I2C3_SCL 0x0014 0x026C 0x05E4 0x4 0x0
75#define MX7D_PAD_GPIO1_IO08__KPP_COL5 0x0014 0x026C 0x0608 0x6 0x0
76#define MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x0014 0x026C 0x0000 0x7 0x0
77#define MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x0018 0x0270 0x0000 0x0 0x0
78#define MX7D_PAD_GPIO1_IO09__SD1_LCTL 0x0018 0x0270 0x0000 0x1 0x0
79#define MX7D_PAD_GPIO1_IO09__CCM_ENET_REF_CLK3 0x0018 0x0270 0x0000 0x2 0x0
80#define MX7D_PAD_GPIO1_IO09__UART3_DCE_TX 0x0018 0x0270 0x0000 0x3 0x0
81#define MX7D_PAD_GPIO1_IO09__UART3_DTE_RX 0x0018 0x0270 0x0704 0x3 0x1
82#define MX7D_PAD_GPIO1_IO09__I2C3_SDA 0x0018 0x0270 0x05E8 0x4 0x0
83#define MX7D_PAD_GPIO1_IO09__CCM_PMIC_READY 0x0018 0x0270 0x04F4 0x5 0x0
84#define MX7D_PAD_GPIO1_IO09__KPP_ROW5 0x0018 0x0270 0x0628 0x6 0x0
85#define MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x0018 0x0270 0x0000 0x7 0x0
86#define MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x001C 0x0274 0x0000 0x0 0x0
87#define MX7D_PAD_GPIO1_IO10__SD2_LCTL 0x001C 0x0274 0x0000 0x1 0x0
88#define MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x001C 0x0274 0x0568 0x2 0x0
89#define MX7D_PAD_GPIO1_IO10__UART3_DCE_RTS 0x001C 0x0274 0x0700 0x3 0x0
90#define MX7D_PAD_GPIO1_IO10__UART3_DTE_CTS 0x001C 0x0274 0x0000 0x3 0x0
91#define MX7D_PAD_GPIO1_IO10__I2C4_SCL 0x001C 0x0274 0x05EC 0x4 0x0
92#define MX7D_PAD_GPIO1_IO10__FLEXTIMER1_PHA 0x001C 0x0274 0x05A4 0x5 0x0
93#define MX7D_PAD_GPIO1_IO10__KPP_COL6 0x001C 0x0274 0x060C 0x6 0x0
94#define MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x001C 0x0274 0x0000 0x7 0x0
95#define MX7D_PAD_GPIO1_IO11__GPIO1_IO11 0x0020 0x0278 0x0000 0x0 0x0
96#define MX7D_PAD_GPIO1_IO11__SD3_LCTL 0x0020 0x0278 0x0000 0x1 0x0
97#define MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x0020 0x0278 0x0000 0x2 0x0
98#define MX7D_PAD_GPIO1_IO11__UART3_DCE_CTS 0x0020 0x0278 0x0000 0x3 0x0
99#define MX7D_PAD_GPIO1_IO11__UART3_DTE_RTS 0x0020 0x0278 0x0700 0x3 0x1
100#define MX7D_PAD_GPIO1_IO11__I2C4_SDA 0x0020 0x0278 0x05F0 0x4 0x0
101#define MX7D_PAD_GPIO1_IO11__FLEXTIMER1_PHB 0x0020 0x0278 0x05A8 0x5 0x0
102#define MX7D_PAD_GPIO1_IO11__KPP_ROW6 0x0020 0x0278 0x062C 0x6 0x0
103#define MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x0020 0x0278 0x0000 0x7 0x0
104#define MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0024 0x027C 0x0000 0x0 0x0
105#define MX7D_PAD_GPIO1_IO12__SD2_VSELECT 0x0024 0x027C 0x0000 0x1 0x0
106#define MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x0024 0x027C 0x0564 0x2 0x0
107#define MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x0024 0x027C 0x04DC 0x3 0x0
108#define MX7D_PAD_GPIO1_IO12__CM4_NMI 0x0024 0x027C 0x0000 0x4 0x0
109#define MX7D_PAD_GPIO1_IO12__CCM_EXT_CLK1 0x0024 0x027C 0x04E4 0x5 0x0
110#define MX7D_PAD_GPIO1_IO12__SNVS_VIO_5 0x0024 0x027C 0x0000 0x6 0x0
111#define MX7D_PAD_GPIO1_IO12__USB_OTG1_ID 0x0024 0x027C 0x0734 0x7 0x0
112#define MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x0028 0x0280 0x0000 0x0 0x0
113#define MX7D_PAD_GPIO1_IO13__SD3_VSELECT 0x0028 0x0280 0x0000 0x1 0x0
114#define MX7D_PAD_GPIO1_IO13__CCM_ENET_REF_CLK2 0x0028 0x0280 0x0570 0x2 0x0
115#define MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x0028 0x0280 0x0000 0x3 0x0
116#define MX7D_PAD_GPIO1_IO13__CCM_PMIC_READY 0x0028 0x0280 0x04F4 0x4 0x1
117#define MX7D_PAD_GPIO1_IO13__CCM_EXT_CLK2 0x0028 0x0280 0x04E8 0x5 0x0
118#define MX7D_PAD_GPIO1_IO13__SNVS_VIO_5_CTL 0x0028 0x0280 0x0000 0x6 0x0
119#define MX7D_PAD_GPIO1_IO13__USB_OTG2_ID 0x0028 0x0280 0x0730 0x7 0x0
120#define MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x002C 0x0284 0x0000 0x0 0x0
121#define MX7D_PAD_GPIO1_IO14__SD3_CD_B 0x002C 0x0284 0x0738 0x1 0x0
122#define MX7D_PAD_GPIO1_IO14__ENET2_MDIO 0x002C 0x0284 0x0574 0x2 0x0
123#define MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x002C 0x0284 0x04E0 0x3 0x0
124#define MX7D_PAD_GPIO1_IO14__WDOG3_WDOG_B 0x002C 0x0284 0x0000 0x4 0x0
125#define MX7D_PAD_GPIO1_IO14__CCM_EXT_CLK3 0x002C 0x0284 0x04EC 0x5 0x0
126#define MX7D_PAD_GPIO1_IO14__SDMA_EXT_EVENT0 0x002C 0x0284 0x06D8 0x6 0x0
127#define MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x0030 0x0288 0x0000 0x0 0x0
128#define MX7D_PAD_GPIO1_IO15__SD3_WP 0x0030 0x0288 0x073C 0x1 0x0
129#define MX7D_PAD_GPIO1_IO15__ENET2_MDC 0x0030 0x0288 0x0000 0x2 0x0
130#define MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x0030 0x0288 0x0000 0x3 0x0
131#define MX7D_PAD_GPIO1_IO15__WDOG4_WDOG_B 0x0030 0x0288 0x0000 0x4 0x0
132#define MX7D_PAD_GPIO1_IO15__CCM_EXT_CLK4 0x0030 0x0288 0x04F0 0x5 0x0
133#define MX7D_PAD_GPIO1_IO15__SDMA_EXT_EVENT1 0x0030 0x0288 0x06DC 0x6 0x0
18#define MX7D_PAD_EPDC_DATA00__EPDC_DATA0 0x0034 0x02A4 0x0000 0x0 0x0 134#define MX7D_PAD_EPDC_DATA00__EPDC_DATA0 0x0034 0x02A4 0x0000 0x0 0x0
19#define MX7D_PAD_EPDC_DATA00__SIM1_PORT2_TRXD 0x0034 0x02A4 0x0000 0x1 0x0 135#define MX7D_PAD_EPDC_DATA00__SIM1_PORT2_TRXD 0x0034 0x02A4 0x0000 0x1 0x0
20#define MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x0034 0x02A4 0x0000 0x2 0x0 136#define MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x0034 0x02A4 0x0000 0x2 0x0
@@ -453,7 +569,7 @@
453#define MX7D_PAD_LCD_DATA23__EIM_ADDR26 0x0124 0x0394 0x0000 0x4 0x0 569#define MX7D_PAD_LCD_DATA23__EIM_ADDR26 0x0124 0x0394 0x0000 0x4 0x0
454#define MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x0124 0x0394 0x0000 0x5 0x0 570#define MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x0124 0x0394 0x0000 0x5 0x0
455#define MX7D_PAD_LCD_DATA23__I2C4_SDA 0x0124 0x0394 0x05F0 0x6 0x1 571#define MX7D_PAD_LCD_DATA23__I2C4_SDA 0x0124 0x0394 0x05F0 0x6 0x1
456#define MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x0128 0x0398 0x0000 0x0 0x0 572#define MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x0128 0x0398 0x06F4 0x0 0x0
457#define MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x0128 0x0398 0x0000 0x0 0x0 573#define MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x0128 0x0398 0x0000 0x0 0x0
458#define MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x0128 0x0398 0x05D4 0x1 0x0 574#define MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x0128 0x0398 0x05D4 0x1 0x0
459#define MX7D_PAD_UART1_RX_DATA__CCM_PMIC_READY 0x0128 0x0398 0x0000 0x2 0x0 575#define MX7D_PAD_UART1_RX_DATA__CCM_PMIC_READY 0x0128 0x0398 0x0000 0x2 0x0
@@ -469,7 +585,7 @@
469#define MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT 0x012C 0x039C 0x0000 0x4 0x0 585#define MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT 0x012C 0x039C 0x0000 0x4 0x0
470#define MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 0x012C 0x039C 0x0000 0x5 0x0 586#define MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 0x012C 0x039C 0x0000 0x5 0x0
471#define MX7D_PAD_UART1_TX_DATA__ENET1_MDC 0x012C 0x039C 0x0000 0x6 0x0 587#define MX7D_PAD_UART1_TX_DATA__ENET1_MDC 0x012C 0x039C 0x0000 0x6 0x0
472#define MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX 0x0130 0x03A0 0x0000 0x0 0x0 588#define MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX 0x0130 0x03A0 0x06FC 0x0 0x2
473#define MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x0130 0x03A0 0x0000 0x0 0x0 589#define MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x0130 0x03A0 0x0000 0x0 0x0
474#define MX7D_PAD_UART2_RX_DATA__I2C2_SCL 0x0130 0x03A0 0x05DC 0x1 0x0 590#define MX7D_PAD_UART2_RX_DATA__I2C2_SCL 0x0130 0x03A0 0x05DC 0x1 0x0
475#define MX7D_PAD_UART2_RX_DATA__SAI3_RX_BCLK 0x0130 0x03A0 0x0000 0x2 0x0 591#define MX7D_PAD_UART2_RX_DATA__SAI3_RX_BCLK 0x0130 0x03A0 0x0000 0x2 0x0
@@ -501,7 +617,7 @@
501#define MX7D_PAD_UART3_TX_DATA__ENET1_1588_EVENT0_OUT 0x013C 0x03AC 0x0000 0x4 0x0 617#define MX7D_PAD_UART3_TX_DATA__ENET1_1588_EVENT0_OUT 0x013C 0x03AC 0x0000 0x4 0x0
502#define MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x013C 0x03AC 0x0000 0x5 0x0 618#define MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x013C 0x03AC 0x0000 0x5 0x0
503#define MX7D_PAD_UART3_TX_DATA__SD2_LCTL 0x013C 0x03AC 0x0000 0x6 0x0 619#define MX7D_PAD_UART3_TX_DATA__SD2_LCTL 0x013C 0x03AC 0x0000 0x6 0x0
504#define MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x0140 0x03B0 0x0000 0x0 0x0 620#define MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x0140 0x03B0 0x0700 0x0 0x2
505#define MX7D_PAD_UART3_RTS_B__UART3_DTE_CTS 0x0140 0x03B0 0x0000 0x0 0x0 621#define MX7D_PAD_UART3_RTS_B__UART3_DTE_CTS 0x0140 0x03B0 0x0000 0x0 0x0
506#define MX7D_PAD_UART3_RTS_B__USB_OTG2_OC 0x0140 0x03B0 0x0728 0x1 0x0 622#define MX7D_PAD_UART3_RTS_B__USB_OTG2_OC 0x0140 0x03B0 0x0728 0x1 0x0
507#define MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0 0x0140 0x03B0 0x0000 0x2 0x0 623#define MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0 0x0140 0x03B0 0x0000 0x2 0x0
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index fdd1d7c9a5cc..432aaf5d5ef7 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -101,6 +101,45 @@
101 arm-supply = <&sw1a_reg>; 101 arm-supply = <&sw1a_reg>;
102}; 102};
103 103
104&fec1 {
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_enet1>;
107 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
108 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
109 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
110 assigned-clock-rates = <0>, <100000000>;
111 phy-mode = "rgmii";
112 phy-handle = <&ethphy0>;
113 fsl,magic-packet;
114 status = "okay";
115
116 mdio {
117 #address-cells = <1>;
118 #size-cells = <0>;
119
120 ethphy0: ethernet-phy@0 {
121 reg = <0>;
122 };
123
124 ethphy1: ethernet-phy@1 {
125 reg = <1>;
126 };
127 };
128};
129
130&fec2 {
131 pinctrl-names = "default";
132 pinctrl-0 = <&pinctrl_enet2>;
133 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
134 <&clks IMX7D_ENET2_TIME_ROOT_CLK>;
135 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
136 assigned-clock-rates = <0>, <100000000>;
137 phy-mode = "rgmii";
138 phy-handle = <&ethphy1>;
139 fsl,magic-packet;
140 status = "okay";
141};
142
104&i2c1 { 143&i2c1 {
105 pinctrl-names = "default"; 144 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_i2c1>; 145 pinctrl-0 = <&pinctrl_i2c1>;
@@ -231,6 +270,17 @@
231 status = "okay"; 270 status = "okay";
232}; 271};
233 272
273&usbotg1 {
274 vbus-supply = <&reg_usb_otg1_vbus>;
275 status = "okay";
276};
277
278&usbotg2 {
279 vbus-supply = <&reg_usb_otg2_vbus>;
280 dr_mode = "host";
281 status = "okay";
282};
283
234&usdhc1 { 284&usdhc1 {
235 pinctrl-names = "default"; 285 pinctrl-names = "default";
236 pinctrl-0 = <&pinctrl_usdhc1>; 286 pinctrl-0 = <&pinctrl_usdhc1>;
@@ -241,11 +291,60 @@
241 status = "okay"; 291 status = "okay";
242}; 292};
243 293
294&usdhc3 {
295 pinctrl-names = "default", "state_100mhz", "state_200mhz";
296 pinctrl-0 = <&pinctrl_usdhc3>;
297 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
298 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
299 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
300 assigned-clock-rates = <400000000>;
301 bus-width = <8>;
302 fsl,tuning-step = <2>;
303 non-removable;
304 status = "okay";
305};
306
244&iomuxc { 307&iomuxc {
245 pinctrl-names = "default"; 308 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_hog>; 309 pinctrl-0 = <&pinctrl_hog>;
247 310
248 imx7d-sdb { 311 imx7d-sdb {
312 pinctrl_enet1: enet1grp {
313 fsl,pins = <
314 MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x3
315 MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x3
316 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
317 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
318 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
319 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
320 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
321 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
322 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
323 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
324 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
325 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
326 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
327 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
328 >;
329 };
330
331 pinctrl_enet2: enet2grp {
332 fsl,pins = <
333 MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x1
334 MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x1
335 MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x1
336 MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x1
337 MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x1
338 MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x1
339 MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x1
340 MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x1
341 MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x1
342 MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x1
343 MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x1
344 MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1
345 >;
346 };
347
249 pinctrl_hog: hoggrp { 348 pinctrl_hog: hoggrp {
250 fsl,pins = < 349 fsl,pins = <
251 MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 350 MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
@@ -281,7 +380,6 @@
281 >; 380 >;
282 }; 381 };
283 382
284
285 pinctrl_uart1: uart1grp { 383 pinctrl_uart1: uart1grp {
286 fsl,pins = < 384 fsl,pins = <
287 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79 385 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index b738ce0f9d9b..4ed0eea4cf1d 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -446,6 +446,12 @@
446 status = "disabled"; 446 status = "disabled";
447 }; 447 };
448 448
449 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
450 compatible = "fsl,imx7d-iomuxc-lpsr";
451 reg = <0x302c0000 0x10000>;
452 fsl,input-sel = <&iomuxc>;
453 };
454
449 gpt1: gpt@302d0000 { 455 gpt1: gpt@302d0000 {
450 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; 456 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
451 reg = <0x302d0000 0x10000>; 457 reg = <0x302d0000 0x10000>;
@@ -570,6 +576,58 @@
570 }; 576 };
571 }; 577 };
572 578
579 aips2: aips-bus@30400000 {
580 compatible = "fsl,aips-bus", "simple-bus";
581 #address-cells = <1>;
582 #size-cells = <1>;
583 reg = <0x30400000 0x400000>;
584 ranges;
585
586 pwm1: pwm@30660000 {
587 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
588 reg = <0x30660000 0x10000>;
589 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&clks IMX7D_PWM1_ROOT_CLK>,
591 <&clks IMX7D_PWM1_ROOT_CLK>;
592 clock-names = "ipg", "per";
593 #pwm-cells = <2>;
594 status = "disabled";
595 };
596
597 pwm2: pwm@30670000 {
598 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
599 reg = <0x30670000 0x10000>;
600 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
601 clocks = <&clks IMX7D_PWM2_ROOT_CLK>,
602 <&clks IMX7D_PWM2_ROOT_CLK>;
603 clock-names = "ipg", "per";
604 #pwm-cells = <2>;
605 status = "disabled";
606 };
607
608 pwm3: pwm@30680000 {
609 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
610 reg = <0x30680000 0x10000>;
611 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
612 clocks = <&clks IMX7D_PWM3_ROOT_CLK>,
613 <&clks IMX7D_PWM3_ROOT_CLK>;
614 clock-names = "ipg", "per";
615 #pwm-cells = <2>;
616 status = "disabled";
617 };
618
619 pwm4: pwm@30690000 {
620 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
621 reg = <0x30690000 0x10000>;
622 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
623 clocks = <&clks IMX7D_PWM4_ROOT_CLK>,
624 <&clks IMX7D_PWM4_ROOT_CLK>;
625 clock-names = "ipg", "per";
626 #pwm-cells = <2>;
627 status = "disabled";
628 };
629 };
630
573 aips3: aips-bus@30800000 { 631 aips3: aips-bus@30800000 {
574 compatible = "fsl,aips-bus", "simple-bus"; 632 compatible = "fsl,aips-bus", "simple-bus";
575 #address-cells = <1>; 633 #address-cells = <1>;
@@ -694,6 +752,77 @@
694 status = "disabled"; 752 status = "disabled";
695 }; 753 };
696 754
755 usbotg1: usb@30b10000 {
756 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
757 reg = <0x30b10000 0x200>;
758 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
759 clocks = <&clks IMX7D_USB_CTRL_CLK>;
760 fsl,usbphy = <&usbphynop1>;
761 fsl,usbmisc = <&usbmisc1 0>;
762 phy-clkgate-delay-us = <400>;
763 status = "disabled";
764 };
765
766 usbotg2: usb@30b20000 {
767 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
768 reg = <0x30b20000 0x200>;
769 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
770 clocks = <&clks IMX7D_USB_CTRL_CLK>;
771 fsl,usbphy = <&usbphynop2>;
772 fsl,usbmisc = <&usbmisc2 0>;
773 phy-clkgate-delay-us = <400>;
774 status = "disabled";
775 };
776
777 usbh: usb@30b30000 {
778 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
779 reg = <0x30b30000 0x200>;
780 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
781 clocks = <&clks IMX7D_USB_CTRL_CLK>;
782 fsl,usbphy = <&usbphynop3>;
783 fsl,usbmisc = <&usbmisc3 0>;
784 phy_type = "hsic";
785 dr_mode = "host";
786 phy-clkgate-delay-us = <400>;
787 status = "disabled";
788 };
789
790 usbmisc1: usbmisc@30b10200 {
791 #index-cells = <1>;
792 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
793 reg = <0x30b10200 0x200>;
794 };
795
796 usbmisc2: usbmisc@30b20200 {
797 #index-cells = <1>;
798 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
799 reg = <0x30b20200 0x200>;
800 };
801
802 usbmisc3: usbmisc@30b30200 {
803 #index-cells = <1>;
804 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
805 reg = <0x30b30200 0x200>;
806 };
807
808 usbphynop1: usbphynop1 {
809 compatible = "usb-nop-xceiv";
810 clocks = <&clks IMX7D_USB_PHY1_CLK>;
811 clock-names = "main_clk";
812 };
813
814 usbphynop2: usbphynop2 {
815 compatible = "usb-nop-xceiv";
816 clocks = <&clks IMX7D_USB_PHY2_CLK>;
817 clock-names = "main_clk";
818 };
819
820 usbphynop3: usbphynop3 {
821 compatible = "usb-nop-xceiv";
822 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
823 clock-names = "main_clk";
824 };
825
697 usdhc1: usdhc@30b40000 { 826 usdhc1: usdhc@30b40000 {
698 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; 827 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
699 reg = <0x30b40000 0x10000>; 828 reg = <0x30b40000 0x10000>;
@@ -729,6 +858,42 @@
729 bus-width = <4>; 858 bus-width = <4>;
730 status = "disabled"; 859 status = "disabled";
731 }; 860 };
861
862 fec1: ethernet@30be0000 {
863 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
864 reg = <0x30be0000 0x10000>;
865 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
867 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
868 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
869 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
870 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
871 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
872 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
873 clock-names = "ipg", "ahb", "ptp",
874 "enet_clk_ref", "enet_out";
875 fsl,num-tx-queues=<3>;
876 fsl,num-rx-queues=<3>;
877 status = "disabled";
878 };
879
880 fec2: ethernet@30bf0000 {
881 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
882 reg = <0x30bf0000 0x10000>;
883 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
884 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
885 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
886 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
887 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
888 <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
889 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
890 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
891 clock-names = "ipg", "ahb", "ptp",
892 "enet_clk_ref", "enet_out";
893 fsl,num-tx-queues=<3>;
894 fsl,num-rx-queues=<3>;
895 status = "disabled";
896 };
732 }; 897 };
733 }; 898 };
734}; 899};
diff --git a/arch/arm/boot/dts/k2e-evm.dts b/arch/arm/boot/dts/k2e-evm.dts
index 50c83c21d911..b7e99807f5c2 100644
--- a/arch/arm/boot/dts/k2e-evm.dts
+++ b/arch/arm/boot/dts/k2e-evm.dts
@@ -13,7 +13,7 @@
13#include "k2e.dtsi" 13#include "k2e.dtsi"
14 14
15/ { 15/ {
16 compatible = "ti,k2e-evm","ti,keystone"; 16 compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
17 model = "Texas Instruments Keystone 2 Edison EVM"; 17 model = "Texas Instruments Keystone 2 Edison EVM";
18 18
19 soc { 19 soc {
diff --git a/arch/arm/boot/dts/k2e-netcp.dtsi b/arch/arm/boot/dts/k2e-netcp.dtsi
index b13b3c94e7fc..ac990f679725 100644
--- a/arch/arm/boot/dts/k2e-netcp.dtsi
+++ b/arch/arm/boot/dts/k2e-netcp.dtsi
@@ -72,7 +72,17 @@ qmss: qmss@2a40000 {
72 qalloc-by-id; 72 qalloc-by-id;
73 }; 73 };
74 }; 74 };
75 accumulator {
76 acc-low-0 {
77 qrange = <480 32>;
78 accumulator = <0 47 16 2 50>;
79 interrupts = <0 226 0xf01>;
80 multi-queue;
81 qalloc-by-id;
82 };
83 };
75 }; 84 };
85
76 descriptor-regions { 86 descriptor-regions {
77 #address-cells = <1>; 87 #address-cells = <1>;
78 #size-cells = <1>; 88 #size-cells = <1>;
@@ -83,6 +93,19 @@ qmss: qmss@2a40000 {
83 link-index = <0x4000>; 93 link-index = <0x4000>;
84 }; 94 };
85 }; 95 };
96
97 pdsps {
98 #address-cells = <1>;
99 #size-cells = <1>;
100 ranges;
101 pdsp0@0x2a10000 {
102 reg = <0x2a10000 0x1000 /*iram */
103 0x2a0f000 0x100 /*reg*/
104 0x2a0c000 0x3c8 /*intd */
105 0x2a20000 0x4000>; /*cmd*/
106 id = <0>;
107 };
108 };
86}; /* qmss */ 109}; /* qmss */
87 110
88knav_dmas: knav_dmas@0 { 111knav_dmas: knav_dmas@0 {
diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
index 675fb8e492c6..1097dada56d2 100644
--- a/arch/arm/boot/dts/k2e.dtsi
+++ b/arch/arm/boot/dts/k2e.dtsi
@@ -9,6 +9,9 @@
9 */ 9 */
10 10
11/ { 11/ {
12 compatible = "ti,k2e", "ti,keystone";
13 model = "Texas Instruments Keystone 2 Edison SoC";
14
12 cpus { 15 cpus {
13 #address-cells = <1>; 16 #address-cells = <1>;
14 #size-cells = <0>; 17 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/k2hk-evm.dts b/arch/arm/boot/dts/k2hk-evm.dts
index 660ebf58d547..8161bf53271b 100644
--- a/arch/arm/boot/dts/k2hk-evm.dts
+++ b/arch/arm/boot/dts/k2hk-evm.dts
@@ -13,7 +13,7 @@
13#include "k2hk.dtsi" 13#include "k2hk.dtsi"
14 14
15/ { 15/ {
16 compatible = "ti,k2hk-evm","ti,keystone"; 16 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
17 model = "Texas Instruments Keystone 2 Kepler/Hawking EVM"; 17 model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
18 18
19 soc { 19 soc {
diff --git a/arch/arm/boot/dts/k2hk-netcp.dtsi b/arch/arm/boot/dts/k2hk-netcp.dtsi
index 77a32c3c17e4..f86d6ddb832b 100644
--- a/arch/arm/boot/dts/k2hk-netcp.dtsi
+++ b/arch/arm/boot/dts/k2hk-netcp.dtsi
@@ -47,6 +47,7 @@ qmss: qmss@2a40000 {
47 "region", "push", "pop"; 47 "region", "push", "pop";
48 }; 48 };
49 }; 49 };
50
50 queue-pools { 51 queue-pools {
51 qpend { 52 qpend {
52 qpend-0 { 53 qpend-0 {
@@ -88,7 +89,17 @@ qmss: qmss@2a40000 {
88 qalloc-by-id; 89 qalloc-by-id;
89 }; 90 };
90 }; 91 };
92 accumulator {
93 acc-low-0 {
94 qrange = <480 32>;
95 accumulator = <0 47 16 2 50>;
96 interrupts = <0 226 0xf01>;
97 multi-queue;
98 qalloc-by-id;
99 };
100 };
91 }; 101 };
102
92 descriptor-regions { 103 descriptor-regions {
93 #address-cells = <1>; 104 #address-cells = <1>;
94 #size-cells = <1>; 105 #size-cells = <1>;
@@ -99,6 +110,19 @@ qmss: qmss@2a40000 {
99 link-index = <0x4000>; 110 link-index = <0x4000>;
100 }; 111 };
101 }; 112 };
113
114 pdsps {
115 #address-cells = <1>;
116 #size-cells = <1>;
117 ranges;
118 pdsp0@0x2a10000 {
119 reg = <0x2a10000 0x1000 /*iram */
120 0x2a0f000 0x100 /*reg*/
121 0x2a0c000 0x3c8 /*intd */
122 0x2a20000 0x4000>; /*cmd*/
123 id = <0>;
124 };
125 };
102}; /* qmss */ 126}; /* qmss */
103 127
104knav_dmas: knav_dmas@0 { 128knav_dmas: knav_dmas@0 {
diff --git a/arch/arm/boot/dts/k2hk.dtsi b/arch/arm/boot/dts/k2hk.dtsi
index d0810a5f2968..ada4c7ac96e7 100644
--- a/arch/arm/boot/dts/k2hk.dtsi
+++ b/arch/arm/boot/dts/k2hk.dtsi
@@ -9,6 +9,9 @@
9 */ 9 */
10 10
11/ { 11/ {
12 compatible = "ti,k2hk", "ti,keystone";
13 model = "Texas Instruments Keystone 2 Kepler/Hawking SoC";
14
12 cpus { 15 cpus {
13 #address-cells = <1>; 16 #address-cells = <1>;
14 #size-cells = <0>; 17 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/k2l-evm.dts b/arch/arm/boot/dts/k2l-evm.dts
index 9a69a6b55374..00861244d788 100644
--- a/arch/arm/boot/dts/k2l-evm.dts
+++ b/arch/arm/boot/dts/k2l-evm.dts
@@ -13,7 +13,7 @@
13#include "k2l.dtsi" 13#include "k2l.dtsi"
14 14
15/ { 15/ {
16 compatible = "ti,k2l-evm","ti,keystone"; 16 compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone";
17 model = "Texas Instruments Keystone 2 Lamarr EVM"; 17 model = "Texas Instruments Keystone 2 Lamarr EVM";
18 18
19 soc { 19 soc {
diff --git a/arch/arm/boot/dts/k2l-netcp.dtsi b/arch/arm/boot/dts/k2l-netcp.dtsi
index 6b95284d11d4..01aef230773d 100644
--- a/arch/arm/boot/dts/k2l-netcp.dtsi
+++ b/arch/arm/boot/dts/k2l-netcp.dtsi
@@ -72,7 +72,16 @@ qmss: qmss@2a40000 {
72 qalloc-by-id; 72 qalloc-by-id;
73 }; 73 };
74 }; 74 };
75 accumulator {
76 acc-low-0 {
77 qrange = <480 32>;
78 accumulator = <0 47 16 2 50>;
79 interrupts = <0 226 0xf01>;
80 multi-queue;
81 };
82 };
75 }; 83 };
84
76 descriptor-regions { 85 descriptor-regions {
77 #address-cells = <1>; 86 #address-cells = <1>;
78 #size-cells = <1>; 87 #size-cells = <1>;
@@ -83,6 +92,20 @@ qmss: qmss@2a40000 {
83 link-index = <0x4000>; 92 link-index = <0x4000>;
84 }; 93 };
85 }; 94 };
95
96 pdsps {
97 #address-cells = <1>;
98 #size-cells = <1>;
99 ranges;
100 pdsp0@0x2a10000 {
101 reg = <0x2a10000 0x1000 /*iram */
102 0x2a0f000 0x100 /*reg*/
103 0x2a0c000 0x3c8 /*intd */
104 0x2a20000 0x4000>; /*cmd*/
105 id = <0>;
106 };
107 };
108
86}; /* qmss */ 109}; /* qmss */
87 110
88knav_dmas: knav_dmas@0 { 111knav_dmas: knav_dmas@0 {
diff --git a/arch/arm/boot/dts/k2l.dtsi b/arch/arm/boot/dts/k2l.dtsi
index 49fd414f680c..4446da72b0ae 100644
--- a/arch/arm/boot/dts/k2l.dtsi
+++ b/arch/arm/boot/dts/k2l.dtsi
@@ -9,6 +9,9 @@
9 */ 9 */
10 10
11/ { 11/ {
12 compatible = "ti,k2l", "ti,keystone";
13 model = "Texas Instruments Keystone 2 Lamarr SoC";
14
12 cpus { 15 cpus {
13 #address-cells = <1>; 16 #address-cells = <1>;
14 #size-cells = <0>; 17 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 72816d65f7ec..3f272826f537 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -12,6 +12,7 @@
12#include "skeleton.dtsi" 12#include "skeleton.dtsi"
13 13
14/ { 14/ {
15 compatible = "ti,keystone";
15 model = "Texas Instruments Keystone 2 SoC"; 16 model = "Texas Instruments Keystone 2 SoC";
16 #address-cells = <2>; 17 #address-cells = <2>;
17 #size-cells = <2>; 18 #size-cells = <2>;
@@ -136,7 +137,7 @@
136 }; 137 };
137 138
138 spi0: spi@21000400 { 139 spi0: spi@21000400 {
139 compatible = "ti,dm6441-spi"; 140 compatible = "ti,keystone-spi", "ti,dm6441-spi";
140 reg = <0x21000400 0x200>; 141 reg = <0x21000400 0x200>;
141 num-cs = <4>; 142 num-cs = <4>;
142 ti,davinci-spi-intr-line = <0>; 143 ti,davinci-spi-intr-line = <0>;
@@ -147,7 +148,7 @@
147 }; 148 };
148 149
149 spi1: spi@21000600 { 150 spi1: spi@21000600 {
150 compatible = "ti,dm6441-spi"; 151 compatible = "ti,keystone-spi", "ti,dm6441-spi";
151 reg = <0x21000600 0x200>; 152 reg = <0x21000600 0x200>;
152 num-cs = <4>; 153 num-cs = <4>;
153 ti,davinci-spi-intr-line = <0>; 154 ti,davinci-spi-intr-line = <0>;
@@ -158,7 +159,7 @@
158 }; 159 };
159 160
160 spi2: spi@21000800 { 161 spi2: spi@21000800 {
161 compatible = "ti,dm6441-spi"; 162 compatible = "ti,keystone-spi", "ti,dm6441-spi";
162 reg = <0x21000800 0x200>; 163 reg = <0x21000800 0x200>;
163 num-cs = <4>; 164 num-cs = <4>;
164 ti,davinci-spi-intr-line = <0>; 165 ti,davinci-spi-intr-line = <0>;
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 464f09a1a4a5..7b5a4a18f49c 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -40,16 +40,6 @@
40 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */ 40 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
41 pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */ 41 pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
42 42
43 cesa: crypto@0301 {
44 compatible = "marvell,orion-crypto";
45 reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>,
46 <MBUS_ID(0x03, 0x01) 0 0x800>;
47 reg-names = "regs", "sram";
48 interrupts = <22>;
49 clocks = <&gate_clk 17>;
50 status = "okay";
51 };
52
53 nand: nand@012f { 43 nand: nand@012f {
54 #address-cells = <1>; 44 #address-cells = <1>;
55 #size-cells = <1>; 45 #size-cells = <1>;
@@ -65,6 +55,14 @@
65 pinctrl-names = "default"; 55 pinctrl-names = "default";
66 status = "disabled"; 56 status = "disabled";
67 }; 57 };
58
59 crypto_sram: sa-sram@0301 {
60 compatible = "mmio-sram";
61 reg = <MBUS_ID(0x03, 0x01) 0x0 0x800>;
62 clocks = <&gate_clk 17>;
63 #address-cells = <1>;
64 #size-cells = <1>;
65 };
68 }; 66 };
69 67
70 ocp@f1000000 { 68 ocp@f1000000 {
@@ -252,6 +250,17 @@
252 status = "okay"; 250 status = "okay";
253 }; 251 };
254 252
253 cesa: crypto@30000 {
254 compatible = "marvell,kirkwood-crypto";
255 reg = <0x30000 0x10000>;
256 reg-names = "regs";
257 interrupts = <22>;
258 clocks = <&gate_clk 17>;
259 marvell,crypto-srams = <&crypto_sram>;
260 marvell,crypto-sram-size = <0x800>;
261 status = "okay";
262 };
263
255 usb0: ehci@50000 { 264 usb0: ehci@50000 {
256 compatible = "marvell,orion-ehci"; 265 compatible = "marvell,orion-ehci";
257 reg = <0x50000 0x1000>; 266 reg = <0x50000 0x1000>;
diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi
index 2c569a6ddc9a..52591d83e8cd 100644
--- a/arch/arm/boot/dts/lpc18xx.dtsi
+++ b/arch/arm/boot/dts/lpc18xx.dtsi
@@ -68,6 +68,46 @@
68 }; 68 };
69 69
70 soc { 70 soc {
71 sct_pwm: pwm@40000000 {
72 compatible = "nxp,lpc1850-sct-pwm";
73 reg = <0x40000000 0x1000>;
74 clocks =<&ccu1 CLK_CPU_SCT>;
75 clock-names = "pwm";
76 resets = <&rgu 37>;
77 #pwm-cells = <3>;
78 status = "disabled";
79 };
80
81 dmac: dma-controller@40002000 {
82 compatible = "arm,pl080", "arm,primecell";
83 arm,primecell-periphid = <0x00041080>;
84 reg = <0x40002000 0x1000>;
85 interrupts = <2>;
86 clocks = <&ccu1 CLK_CPU_DMA>;
87 clock-names = "apb_pclk";
88 resets = <&rgu 19>;
89 #dma-cells = <2>;
90 dma-channels = <8>;
91 dma-requests = <16>;
92 lli-bus-interface-ahb1;
93 lli-bus-interface-ahb2;
94 mem-bus-interface-ahb1;
95 mem-bus-interface-ahb2;
96 memcpy-burst-size = <256>;
97 memcpy-bus-width = <32>;
98 };
99
100 spifi: flash-controller@40003000 {
101 compatible = "nxp,lpc1773-spifi";
102 reg = <0x40003000 0x1000>, <0x14000000 0x4000000>;
103 reg-names = "spifi", "flash";
104 interrupts = <30>;
105 clocks = <&ccu1 CLK_SPIFI>, <&ccu1 CLK_CPU_SPIFI>;
106 clock-names = "spifi", "reg";
107 resets = <&rgu 53>;
108 status = "disabled";
109 };
110
71 mmcsd: mmcsd@40004000 { 111 mmcsd: mmcsd@40004000 {
72 compatible = "snps,dw-mshc"; 112 compatible = "snps,dw-mshc";
73 reg = <0x40004000 0x1000>; 113 reg = <0x40004000 0x1000>;
@@ -75,6 +115,7 @@
75 num-slots = <1>; 115 num-slots = <1>;
76 clocks = <&ccu2 CLK_SDIO>, <&ccu1 CLK_CPU_SDIO>; 116 clocks = <&ccu2 CLK_SDIO>, <&ccu1 CLK_CPU_SDIO>;
77 clock-names = "ciu", "biu"; 117 clock-names = "ciu", "biu";
118 resets = <&rgu 20>;
78 status = "disabled"; 119 status = "disabled";
79 }; 120 };
80 121
@@ -83,6 +124,7 @@
83 reg = <0x40006100 0x100>; 124 reg = <0x40006100 0x100>;
84 interrupts = <8>; 125 interrupts = <8>;
85 clocks = <&ccu1 CLK_CPU_USB0>; 126 clocks = <&ccu1 CLK_CPU_USB0>;
127 resets = <&rgu 17>;
86 phys = <&usb0_otg_phy>; 128 phys = <&usb0_otg_phy>;
87 phy-names = "usb"; 129 phy-names = "usb";
88 has-transaction-translator; 130 has-transaction-translator;
@@ -94,6 +136,7 @@
94 reg = <0x40007100 0x100>; 136 reg = <0x40007100 0x100>;
95 interrupts = <9>; 137 interrupts = <9>;
96 clocks = <&ccu1 CLK_CPU_USB1>; 138 clocks = <&ccu1 CLK_CPU_USB1>;
139 resets = <&rgu 18>;
97 status = "disabled"; 140 status = "disabled";
98 }; 141 };
99 142
@@ -102,6 +145,7 @@
102 reg = <0x40005000 0x1000>; 145 reg = <0x40005000 0x1000>;
103 clocks = <&ccu1 CLK_CPU_EMCDIV>, <&ccu1 CLK_CPU_EMC>; 146 clocks = <&ccu1 CLK_CPU_EMCDIV>, <&ccu1 CLK_CPU_EMC>;
104 clock-names = "mpmcclk", "apb_pclk"; 147 clock-names = "mpmcclk", "apb_pclk";
148 resets = <&rgu 21>;
105 #address-cells = <2>; 149 #address-cells = <2>;
106 #size-cells = <1>; 150 #size-cells = <1>;
107 ranges = <0 0 0x1c000000 0x1000000 151 ranges = <0 0 0x1c000000 0x1000000
@@ -118,6 +162,7 @@
118 interrupt-names = "combined"; 162 interrupt-names = "combined";
119 clocks = <&cgu BASE_LCD_CLK>, <&ccu1 CLK_CPU_LCD>; 163 clocks = <&cgu BASE_LCD_CLK>, <&ccu1 CLK_CPU_LCD>;
120 clock-names = "clcdclk", "apb_pclk"; 164 clock-names = "clcdclk", "apb_pclk";
165 resets = <&rgu 16>;
121 status = "disabled"; 166 status = "disabled";
122 }; 167 };
123 168
@@ -128,6 +173,8 @@
128 interrupt-names = "macirq"; 173 interrupt-names = "macirq";
129 clocks = <&ccu1 CLK_CPU_ETHERNET>; 174 clocks = <&ccu1 CLK_CPU_ETHERNET>;
130 clock-names = "stmmaceth"; 175 clock-names = "stmmaceth";
176 resets = <&rgu 22>;
177 reset-names = "stmmaceth";
131 status = "disabled"; 178 status = "disabled";
132 }; 179 };
133 180
@@ -135,12 +182,20 @@
135 compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd"; 182 compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
136 reg = <0x40043000 0x1000>; 183 reg = <0x40043000 0x1000>;
137 clocks = <&ccu1 CLK_CPU_CREG>; 184 clocks = <&ccu1 CLK_CPU_CREG>;
185 resets = <&rgu 5>;
138 186
139 usb0_otg_phy: phy@004 { 187 usb0_otg_phy: phy@004 {
140 compatible = "nxp,lpc1850-usb-otg-phy"; 188 compatible = "nxp,lpc1850-usb-otg-phy";
141 clocks = <&ccu1 CLK_USB0>; 189 clocks = <&ccu1 CLK_USB0>;
142 #phy-cells = <0>; 190 #phy-cells = <0>;
143 }; 191 };
192
193 dmamux: dma-mux@11c {
194 compatible = "nxp,lpc1850-dmamux";
195 #dma-cells = <3>;
196 dma-requests = <64>;
197 dma-masters = <&dmac>;
198 };
144 }; 199 };
145 200
146 cgu: clock-controller@40050000 { 201 cgu: clock-controller@40050000 {
@@ -178,6 +233,22 @@
178 "base_ssp0_clk", "base_sdio_clk"; 233 "base_ssp0_clk", "base_sdio_clk";
179 }; 234 };
180 235
236 rgu: reset-controller@40053000 {
237 compatible = "nxp,lpc1850-rgu";
238 reg = <0x40053000 0x1000>;
239 clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_BUS>;
240 clock-names = "delay", "reg";
241 #reset-cells = <1>;
242 };
243
244 watchdog@40080000 {
245 compatible = "nxp,lpc1850-wwdt";
246 reg = <0x40080000 0x24>;
247 interrupts = <49>;
248 clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_WWDT>;
249 clock-names = "wdtclk", "reg";
250 };
251
181 uart0: serial@40081000 { 252 uart0: serial@40081000 {
182 compatible = "nxp,lpc1850-uart", "ns16550a"; 253 compatible = "nxp,lpc1850-uart", "ns16550a";
183 reg = <0x40081000 0x1000>; 254 reg = <0x40081000 0x1000>;
@@ -185,6 +256,12 @@
185 interrupts = <24>; 256 interrupts = <24>;
186 clocks = <&ccu2 CLK_APB0_UART0>, <&ccu1 CLK_CPU_UART0>; 257 clocks = <&ccu2 CLK_APB0_UART0>, <&ccu1 CLK_CPU_UART0>;
187 clock-names = "uartclk", "reg"; 258 clock-names = "uartclk", "reg";
259 resets = <&rgu 44>;
260 dmas = <&dmamux 1 1 2
261 &dmamux 2 1 2
262 &dmamux 11 2 2
263 &dmamux 12 2 2>;
264 dma-names = "tx", "rx", "tx", "rx";
188 status = "disabled"; 265 status = "disabled";
189 }; 266 };
190 267
@@ -195,6 +272,10 @@
195 interrupts = <25>; 272 interrupts = <25>;
196 clocks = <&ccu2 CLK_APB0_UART1>, <&ccu1 CLK_CPU_UART1>; 273 clocks = <&ccu2 CLK_APB0_UART1>, <&ccu1 CLK_CPU_UART1>;
197 clock-names = "uartclk", "reg"; 274 clock-names = "uartclk", "reg";
275 resets = <&rgu 45>;
276 dmas = <&dmamux 3 1 2
277 &dmamux 4 1 2>;
278 dma-names = "tx", "rx";
198 status = "disabled"; 279 status = "disabled";
199 }; 280 };
200 281
@@ -204,6 +285,10 @@
204 interrupts = <22>; 285 interrupts = <22>;
205 clocks = <&ccu2 CLK_APB0_SSP0>, <&ccu1 CLK_CPU_SSP0>; 286 clocks = <&ccu2 CLK_APB0_SSP0>, <&ccu1 CLK_CPU_SSP0>;
206 clock-names = "sspclk", "apb_pclk"; 287 clock-names = "sspclk", "apb_pclk";
288 resets = <&rgu 50>;
289 dmas = <&dmamux 9 0 2
290 &dmamux 10 0 2>;
291 dma-names = "rx", "tx";
207 #address-cells = <1>; 292 #address-cells = <1>;
208 #size-cells = <0>; 293 #size-cells = <0>;
209 status = "disabled"; 294 status = "disabled";
@@ -215,6 +300,7 @@
215 interrupts = <12>; 300 interrupts = <12>;
216 clocks = <&ccu1 CLK_CPU_TIMER0>; 301 clocks = <&ccu1 CLK_CPU_TIMER0>;
217 clock-names = "timerclk"; 302 clock-names = "timerclk";
303 resets = <&rgu 32>;
218 }; 304 };
219 305
220 timer1: timer@40085000 { 306 timer1: timer@40085000 {
@@ -223,6 +309,7 @@
223 interrupts = <13>; 309 interrupts = <13>;
224 clocks = <&ccu1 CLK_CPU_TIMER1>; 310 clocks = <&ccu1 CLK_CPU_TIMER1>;
225 clock-names = "timerclk"; 311 clock-names = "timerclk";
312 resets = <&rgu 33>;
226 }; 313 };
227 314
228 pinctrl: pinctrl@40086000 { 315 pinctrl: pinctrl@40086000 {
@@ -231,11 +318,23 @@
231 clocks = <&ccu1 CLK_CPU_SCU>; 318 clocks = <&ccu1 CLK_CPU_SCU>;
232 }; 319 };
233 320
321 i2c0: i2c@400a1000 {
322 compatible = "nxp,lpc1788-i2c";
323 reg = <0x400a1000 0x1000>;
324 interrupts = <18>;
325 clocks = <&ccu1 CLK_APB1_I2C0>;
326 resets = <&rgu 48>;
327 #address-cells = <1>;
328 #size-cells = <0>;
329 status = "disabled";
330 };
331
234 can1: can@400a4000 { 332 can1: can@400a4000 {
235 compatible = "bosch,c_can"; 333 compatible = "bosch,c_can";
236 reg = <0x400a4000 0x1000>; 334 reg = <0x400a4000 0x1000>;
237 interrupts = <43>; 335 interrupts = <43>;
238 clocks = <&ccu1 CLK_APB1_CAN1>; 336 clocks = <&ccu1 CLK_APB1_CAN1>;
337 resets = <&rgu 54>;
239 status = "disabled"; 338 status = "disabled";
240 }; 339 };
241 340
@@ -246,6 +345,10 @@
246 interrupts = <26>; 345 interrupts = <26>;
247 clocks = <&ccu2 CLK_APB2_UART2>, <&ccu1 CLK_CPU_UART2>; 346 clocks = <&ccu2 CLK_APB2_UART2>, <&ccu1 CLK_CPU_UART2>;
248 clock-names = "uartclk", "reg"; 347 clock-names = "uartclk", "reg";
348 resets = <&rgu 46>;
349 dmas = <&dmamux 5 1 2
350 &dmamux 6 1 2>;
351 dma-names = "tx", "rx";
249 status = "disabled"; 352 status = "disabled";
250 }; 353 };
251 354
@@ -256,6 +359,12 @@
256 interrupts = <27>; 359 interrupts = <27>;
257 clocks = <&ccu2 CLK_APB2_UART3>, <&ccu1 CLK_CPU_UART3>; 360 clocks = <&ccu2 CLK_APB2_UART3>, <&ccu1 CLK_CPU_UART3>;
258 clock-names = "uartclk", "reg"; 361 clock-names = "uartclk", "reg";
362 resets = <&rgu 47>;
363 dmas = <&dmamux 7 1 2
364 &dmamux 8 1 2
365 &dmamux 13 3 2
366 &dmamux 14 3 2>;
367 dma-names = "tx", "rx", "rx", "tx";
259 status = "disabled"; 368 status = "disabled";
260 }; 369 };
261 370
@@ -265,6 +374,7 @@
265 interrupts = <14>; 374 interrupts = <14>;
266 clocks = <&ccu1 CLK_CPU_TIMER2>; 375 clocks = <&ccu1 CLK_CPU_TIMER2>;
267 clock-names = "timerclk"; 376 clock-names = "timerclk";
377 resets = <&rgu 34>;
268 }; 378 };
269 379
270 timer3: timer@400c4000 { 380 timer3: timer@400c4000 {
@@ -273,6 +383,7 @@
273 interrupts = <15>; 383 interrupts = <15>;
274 clocks = <&ccu1 CLK_CPU_TIMER3>; 384 clocks = <&ccu1 CLK_CPU_TIMER3>;
275 clock-names = "timerclk"; 385 clock-names = "timerclk";
386 resets = <&rgu 35>;
276 }; 387 };
277 388
278 ssp1: spi@400c5000 { 389 ssp1: spi@400c5000 {
@@ -281,6 +392,28 @@
281 interrupts = <23>; 392 interrupts = <23>;
282 clocks = <&ccu2 CLK_APB2_SSP1>, <&ccu1 CLK_CPU_SSP1>; 393 clocks = <&ccu2 CLK_APB2_SSP1>, <&ccu1 CLK_CPU_SSP1>;
283 clock-names = "sspclk", "apb_pclk"; 394 clock-names = "sspclk", "apb_pclk";
395 resets = <&rgu 51>;
396 dmas = <&dmamux 11 2 2
397 &dmamux 12 2 2
398 &dmamux 3 3 2
399 &dmamux 4 3 2
400 &dmamux 5 2 2
401 &dmamux 6 2 2
402 &dmamux 13 2 2
403 &dmamux 14 2 2>;
404 dma-names = "rx", "tx", "tx", "rx",
405 "tx", "rx", "rx", "tx";
406 #address-cells = <1>;
407 #size-cells = <0>;
408 status = "disabled";
409 };
410
411 i2c1: i2c@400e0000 {
412 compatible = "nxp,lpc1788-i2c";
413 reg = <0x400e0000 0x1000>;
414 interrupts = <19>;
415 clocks = <&ccu1 CLK_APB3_I2C1>;
416 resets = <&rgu 49>;
284 #address-cells = <1>; 417 #address-cells = <1>;
285 #size-cells = <0>; 418 #size-cells = <0>;
286 status = "disabled"; 419 status = "disabled";
@@ -291,6 +424,7 @@
291 reg = <0x400e2000 0x1000>; 424 reg = <0x400e2000 0x1000>;
292 interrupts = <51>; 425 interrupts = <51>;
293 clocks = <&ccu1 CLK_APB3_CAN0>; 426 clocks = <&ccu1 CLK_APB3_CAN0>;
427 resets = <&rgu 55>;
294 status = "disabled"; 428 status = "disabled";
295 }; 429 };
296 430
diff --git a/arch/arm/boot/dts/lpc4350-hitex-eval.dts b/arch/arm/boot/dts/lpc4350-hitex-eval.dts
index 32bc7ff4eb2a..022d495432c1 100644
--- a/arch/arm/boot/dts/lpc4350-hitex-eval.dts
+++ b/arch/arm/boot/dts/lpc4350-hitex-eval.dts
@@ -15,6 +15,9 @@
15#include "lpc18xx.dtsi" 15#include "lpc18xx.dtsi"
16#include "lpc4350.dtsi" 16#include "lpc4350.dtsi"
17 17
18#include "dt-bindings/input/input.h"
19#include "dt-bindings/gpio/gpio.h"
20
18/ { 21/ {
19 model = "Hitex LPC4350 Evaluation Board"; 22 model = "Hitex LPC4350 Evaluation Board";
20 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350"; 23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
@@ -34,6 +37,88 @@
34 device_type = "memory"; 37 device_type = "memory";
35 reg = <0x28000000 0x800000>; /* 8 MB */ 38 reg = <0x28000000 0x800000>; /* 8 MB */
36 }; 39 };
40
41 pca_buttons {
42 compatible = "gpio-keys-polled";
43 #address-cells = <1>;
44 #size-cells = <0>;
45 poll-interval = <100>;
46 autorepeat;
47
48 button@0 {
49 label = "joy:right";
50 linux,code = <KEY_RIGHT>;
51 gpios = <&pca_gpio 8 GPIO_ACTIVE_LOW>;
52 };
53
54 button@1 {
55 label = "joy:up";
56 linux,code = <KEY_UP>;
57 gpios = <&pca_gpio 9 GPIO_ACTIVE_LOW>;
58 };
59
60
61 button@2 {
62 label = "joy:enter";
63 linux,code = <KEY_ENTER>;
64 gpios = <&pca_gpio 10 GPIO_ACTIVE_LOW>;
65 };
66
67 button@3 {
68 label = "joy:left";
69 linux,code = <KEY_LEFT>;
70 gpios = <&pca_gpio 11 GPIO_ACTIVE_LOW>;
71 };
72
73 button@4 {
74 label = "joy:down";
75 linux,code = <KEY_DOWN>;
76 gpios = <&pca_gpio 12 GPIO_ACTIVE_LOW>;
77 };
78
79 button@5 {
80 label = "user:sw3";
81 linux,code = <KEY_F1>;
82 gpios = <&pca_gpio 13 GPIO_ACTIVE_LOW>;
83 };
84
85 button@6 {
86 label = "user:sw4";
87 linux,code = <KEY_F2>;
88 gpios = <&pca_gpio 14 GPIO_ACTIVE_LOW>;
89 };
90
91 button@7 {
92 label = "user:sw5";
93 linux,code = <KEY_F3>;
94 gpios = <&pca_gpio 15 GPIO_ACTIVE_LOW>;
95 };
96 };
97
98 pca_leds {
99 compatible = "gpio-leds";
100
101 led0 {
102 label = "ext:led0";
103 gpios = <&pca_gpio 0 GPIO_ACTIVE_LOW>;
104 linux,default-trigger = "heartbeat";
105 };
106
107 led1 {
108 label = "ext:led1";
109 gpios = <&pca_gpio 1 GPIO_ACTIVE_LOW>;
110 };
111
112 led2 {
113 label = "ext:led2";
114 gpios = <&pca_gpio 2 GPIO_ACTIVE_LOW>;
115 };
116
117 led3 {
118 label = "ext:led3";
119 gpios = <&pca_gpio 3 GPIO_ACTIVE_LOW>;
120 };
121 };
37}; 122};
38 123
39&pinctrl { 124&pinctrl {
@@ -186,6 +271,43 @@
186 }; 271 };
187 }; 272 };
188 273
274 i2c0_pins: i2c0-pins {
275 i2c0_pins_cfg {
276 pins = "i2c0_scl", "i2c0_sda";
277 function = "i2c0";
278 input-enable;
279 };
280 };
281
282 spifi_pins: spifi-pins {
283 spifi_clk_cfg {
284 pins = "p3_3";
285 function = "spifi";
286 slew-rate = <1>;
287 bias-disable;
288 input-enable;
289 input-schmitt-disable;
290 };
291
292 spifi_mosi_miso_sio2_3_cfg {
293 pins = "p3_7", "p3_6", "p3_5", "p3_4";
294 function = "spifi";
295 slew-rate = <1>;
296 bias-disable;
297 input-enable;
298 input-schmitt-disable;
299 };
300
301 spifi_cs_cfg {
302 pins = "p3_8";
303 function = "spifi";
304 slew-rate = <1>;
305 bias-disable;
306 input-enable;
307 input-schmitt-disable;
308 };
309 };
310
189 uart0_pins: uart0-pins { 311 uart0_pins: uart0-pins {
190 uart0_rx_cfg { 312 uart0_rx_cfg {
191 pins = "pf_11"; 313 pins = "pf_11";
@@ -271,6 +393,31 @@
271 clock-frequency = <25000000>; 393 clock-frequency = <25000000>;
272}; 394};
273 395
396&i2c0 {
397 status = "okay";
398 pinctrl-names = "default";
399 pinctrl-0 = <&i2c0_pins>;
400 clock-frequency = <400000>;
401
402 /* NXP SE97BTP with temperature sensor + eeprom */
403 sensor@18 {
404 compatible = "nxp,jc42";
405 reg = <0x18>;
406 };
407
408 eeprom@50 {
409 compatible = "nxp,24c02";
410 reg = <0x50>;
411 };
412
413 pca_gpio: gpio@24 {
414 compatible = "nxp,pca9673";
415 reg = <0x24>;
416 gpio-controller;
417 #gpio-cells = <2>;
418 };
419};
420
274&mac { 421&mac {
275 status = "okay"; 422 status = "okay";
276 phy-mode = "mii"; 423 phy-mode = "mii";
@@ -278,6 +425,34 @@
278 pinctrl-0 = <&enet_mii_pins>; 425 pinctrl-0 = <&enet_mii_pins>;
279}; 426};
280 427
428&spifi {
429 status = "okay";
430 pinctrl-names = "default";
431 pinctrl-0 = <&spifi_pins>;
432
433 flash@0 {
434 compatible = "jedec,spi-nor";
435 spi-rx-bus-width = <4>;
436 #address-cells = <1>;
437 #size-cells = <1>;
438
439 partition@0 {
440 label = "bootloader";
441 reg = <0x000000 0x040000>; /* 256 KiB */
442 };
443
444 partition@1 {
445 label = "kernel";
446 reg = <0x040000 0x2c0000>; /* 2.75 MiB */
447 };
448
449 partition@2 {
450 label = "rootfs";
451 reg = <0x300000 0x500000>; /* 5 MiB */
452 };
453 };
454};
455
281&uart0 { 456&uart0 {
282 status = "okay"; 457 status = "okay";
283 pinctrl-names = "default"; 458 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
index 5f7bdad80963..391121d24daa 100644
--- a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
+++ b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
@@ -332,6 +332,14 @@
332 }; 332 };
333 }; 333 };
334 334
335 i2c0_pins: i2c0-pins {
336 i2c0_pins_cfg {
337 pins = "i2c0_scl", "i2c0_sda";
338 function = "i2c0";
339 input-enable;
340 };
341 };
342
335 sdmmc_pins: sdmmc-pins { 343 sdmmc_pins: sdmmc-pins {
336 sdmmc_clk_cfg { 344 sdmmc_clk_cfg {
337 pins = "pc_0"; 345 pins = "pc_0";
@@ -363,6 +371,49 @@
363 }; 371 };
364 }; 372 };
365 373
374 spifi_pins: spifi-pins {
375 spifi_clk_cfg {
376 pins = "p3_3";
377 function = "spifi";
378 slew-rate = <1>;
379 bias-disable;
380 input-enable;
381 input-schmitt-disable;
382 };
383
384 spifi_mosi_miso_sio2_3_cfg {
385 pins = "p3_7", "p3_6", "p3_5", "p3_4";
386 function = "spifi";
387 slew-rate = <0>;
388 bias-disable;
389 input-enable;
390 input-schmitt-disable;
391 };
392
393 spifi_cs_cfg {
394 pins = "p3_8";
395 function = "spifi";
396 bias-disable;
397 };
398 };
399
400 ssp0_pins: ssp0-pins {
401 ssp0_sck_miso_mosi {
402 pins = "pf_0", "pf_2", "pf_3";
403 function = "ssp0";
404 slew-rate = <1>;
405 bias-pull-down;
406 input-enable;
407 input-schmitt-disable;
408 };
409
410 ssp0_ssel {
411 pins = "pf_1";
412 function = "ssp0";
413 bias-pull-up;
414 };
415 };
416
366 uart0_pins: uart0-pins { 417 uart0_pins: uart0-pins {
367 uart0_rx_cfg { 418 uart0_rx_cfg {
368 pins = "pf_11"; 419 pins = "pf_11";
@@ -410,6 +461,23 @@
410 }; 461 };
411}; 462};
412 463
464&i2c0 {
465 status = "okay";
466 pinctrl-names = "default";
467 pinctrl-0 = <&i2c0_pins>;
468 clock-frequency = <400000>;
469
470 lm75@48 {
471 compatible = "nxp,lm75";
472 reg = <0x48>;
473 };
474
475 eeprom@57 {
476 compatible = "microchip,24c64";
477 reg = <0x57>;
478 };
479};
480
413&emc { 481&emc {
414 status = "okay"; 482 status = "okay";
415 pinctrl-names = "default"; 483 pinctrl-names = "default";
@@ -489,6 +557,33 @@
489 pinctrl-0 = <&sdmmc_pins>; 557 pinctrl-0 = <&sdmmc_pins>;
490}; 558};
491 559
560&spifi {
561 status = "okay";
562 pinctrl-names = "default";
563 pinctrl-0 = <&spifi_pins>;
564
565 flash@0 {
566 compatible = "jedec,spi-nor";
567 spi-cpol;
568 spi-cpha;
569 spi-rx-bus-width = <4>;
570 #address-cells = <1>;
571 #size-cells = <1>;
572
573 partition@0 {
574 label = "data";
575 reg = <0 0x200000>;
576 };
577 };
578};
579
580&ssp0 {
581 status = "okay";
582 pinctrl-names = "default";
583 pinctrl-0 = <&ssp0_pins>;
584 num-cs = <1>;
585};
586
492&uart0 { 587&uart0 {
493 status = "okay"; 588 status = "okay";
494 pinctrl-names = "default"; 589 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts
index e008f9367510..fbb89d13401e 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -144,6 +144,19 @@
144 144
145&i2c0 { 145&i2c0 {
146 status = "okay"; 146 status = "okay";
147
148 ina220@40 {
149 compatible = "ti,ina220";
150 reg = <0x40>;
151 shunt-resistor = <1000>;
152 };
153
154 ina220@41 {
155 compatible = "ti,ina220";
156 reg = <0x41>;
157 shunt-resistor = <1000>;
158 };
159
147}; 160};
148 161
149&i2c1 { 162&i2c1 {
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 973a496207fc..9430a9928199 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -53,6 +53,7 @@
53 interrupt-parent = <&gic>; 53 interrupt-parent = <&gic>;
54 54
55 aliases { 55 aliases {
56 crypto = &crypto;
56 ethernet0 = &enet0; 57 ethernet0 = &enet0;
57 ethernet1 = &enet1; 58 ethernet1 = &enet1;
58 ethernet2 = &enet2; 59 ethernet2 = &enet2;
@@ -148,6 +149,45 @@
148 big-endian; 149 big-endian;
149 }; 150 };
150 151
152 crypto: crypto@1700000 {
153 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
154 fsl,sec-era = <7>;
155 #address-cells = <1>;
156 #size-cells = <1>;
157 reg = <0x0 0x1700000 0x0 0x100000>;
158 ranges = <0x0 0x0 0x1700000 0x100000>;
159 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
160
161 sec_jr0: jr@10000 {
162 compatible = "fsl,sec-v5.0-job-ring",
163 "fsl,sec-v4.0-job-ring";
164 reg = <0x10000 0x10000>;
165 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
166 };
167
168 sec_jr1: jr@20000 {
169 compatible = "fsl,sec-v5.0-job-ring",
170 "fsl,sec-v4.0-job-ring";
171 reg = <0x20000 0x10000>;
172 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
173 };
174
175 sec_jr2: jr@30000 {
176 compatible = "fsl,sec-v5.0-job-ring",
177 "fsl,sec-v4.0-job-ring";
178 reg = <0x30000 0x10000>;
179 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
180 };
181
182 sec_jr3: jr@40000 {
183 compatible = "fsl,sec-v5.0-job-ring",
184 "fsl,sec-v4.0-job-ring";
185 reg = <0x40000 0x10000>;
186 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
187 };
188
189 };
190
151 clockgen: clocking@1ee1000 { 191 clockgen: clocking@1ee1000 {
152 #address-cells = <1>; 192 #address-cells = <1>;
153 #size-cells = <1>; 193 #size-cells = <1>;
@@ -405,6 +445,7 @@
405 model = "eTSEC"; 445 model = "eTSEC";
406 fsl,magic-packet; 446 fsl,magic-packet;
407 ranges; 447 ranges;
448 dma-coherent;
408 449
409 queue-group@2d10000 { 450 queue-group@2d10000 {
410 #address-cells = <2>; 451 #address-cells = <2>;
@@ -433,6 +474,7 @@
433 interrupt-parent = <&gic>; 474 interrupt-parent = <&gic>;
434 model = "eTSEC"; 475 model = "eTSEC";
435 ranges; 476 ranges;
477 dma-coherent;
436 478
437 queue-group@2d50000 { 479 queue-group@2d50000 {
438 #address-cells = <2>; 480 #address-cells = <2>;
@@ -461,6 +503,7 @@
461 interrupt-parent = <&gic>; 503 interrupt-parent = <&gic>;
462 model = "eTSEC"; 504 model = "eTSEC";
463 ranges; 505 ranges;
506 dma-coherent;
464 507
465 queue-group@2d90000 { 508 queue-group@2d90000 {
466 #address-cells = <2>; 509 #address-cells = <2>;
@@ -494,6 +537,7 @@
494 reg = <0x0 0x3100000 0x0 0x10000>; 537 reg = <0x0 0x3100000 0x0 0x10000>;
495 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 538 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
496 dr_mode = "host"; 539 dr_mode = "host";
540 snps,quirk-frame-length-adjustment = <0x20>;
497 }; 541 };
498 }; 542 };
499}; 543};
diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi
index 548441384d2a..8c77c87660cd 100644
--- a/arch/arm/boot/dts/meson.dtsi
+++ b/arch/arm/boot/dts/meson.dtsi
@@ -67,7 +67,7 @@
67 67
68 timer@c1109940 { 68 timer@c1109940 {
69 compatible = "amlogic,meson6-timer"; 69 compatible = "amlogic,meson6-timer";
70 reg = <0xc1109940 0x14>; 70 reg = <0xc1109940 0x18>;
71 interrupts = <0 10 1>; 71 interrupts = <0 10 1>;
72 }; 72 };
73 73
@@ -80,36 +80,37 @@
80 wdt: watchdog@c1109900 { 80 wdt: watchdog@c1109900 {
81 compatible = "amlogic,meson6-wdt"; 81 compatible = "amlogic,meson6-wdt";
82 reg = <0xc1109900 0x8>; 82 reg = <0xc1109900 0x8>;
83 interrupts = <0 0 1>;
83 }; 84 };
84 85
85 uart_AO: serial@c81004c0 { 86 uart_AO: serial@c81004c0 {
86 compatible = "amlogic,meson-uart"; 87 compatible = "amlogic,meson-uart";
87 reg = <0xc81004c0 0x14>; 88 reg = <0xc81004c0 0x18>;
88 interrupts = <0 90 1>; 89 interrupts = <0 90 1>;
89 clocks = <&clk81>; 90 clocks = <&clk81>;
90 status = "disabled"; 91 status = "disabled";
91 }; 92 };
92 93
93 uart_A: serial@c81084c0 { 94 uart_A: serial@c11084c0 {
94 compatible = "amlogic,meson-uart"; 95 compatible = "amlogic,meson-uart";
95 reg = <0xc81084c0 0x14>; 96 reg = <0xc11084c0 0x18>;
96 interrupts = <0 90 1>; 97 interrupts = <0 26 1>;
97 clocks = <&clk81>; 98 clocks = <&clk81>;
98 status = "disabled"; 99 status = "disabled";
99 }; 100 };
100 101
101 uart_B: serial@c81084dc { 102 uart_B: serial@c11084dc {
102 compatible = "amlogic,meson-uart"; 103 compatible = "amlogic,meson-uart";
103 reg = <0xc81084dc 0x14>; 104 reg = <0xc11084dc 0x18>;
104 interrupts = <0 90 1>; 105 interrupts = <0 75 1>;
105 clocks = <&clk81>; 106 clocks = <&clk81>;
106 status = "disabled"; 107 status = "disabled";
107 }; 108 };
108 109
109 uart_C: serial@c8108700 { 110 uart_C: serial@c1108700 {
110 compatible = "amlogic,meson-uart"; 111 compatible = "amlogic,meson-uart";
111 reg = <0xc8108700 0x14>; 112 reg = <0xc1108700 0x18>;
112 interrupts = <0 90 1>; 113 interrupts = <0 93 1>;
113 clocks = <&clk81>; 114 clocks = <&clk81>;
114 status = "disabled"; 115 status = "disabled";
115 }; 116 };
diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts
new file mode 100644
index 000000000000..c7fdaeabbe7b
--- /dev/null
+++ b/arch/arm/boot/dts/meson8b-mxq.dts
@@ -0,0 +1,67 @@
1/*
2 * Copyright 2015 Endless Mobile, Inc.
3 * Author: Carlo Caione <carlo@endlessm.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47/dts-v1/;
48#include "meson8b.dtsi"
49
50/ {
51 model = "TRONFY MXQ S805";
52 compatible = "tronfy,mxq", "amlogic,meson8b";
53
54 aliases {
55 serial0 = &uart_AO;
56 };
57
58 memory {
59 reg = <0x40000000 0x40000000>;
60 };
61};
62
63&uart_AO {
64 status = "okay";
65 pinctrl-0 = <&uart_ao_a_pins>;
66 pinctrl-names = "default";
67};
diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
new file mode 100644
index 000000000000..a8e2911b2cbe
--- /dev/null
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -0,0 +1,67 @@
1/*
2 * Copyright 2015 Endless Mobile, Inc.
3 * Author: Carlo Caione <carlo@endlessm.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47/dts-v1/;
48#include "meson8b.dtsi"
49
50/ {
51 model = "Hardkernel ODROID-C1";
52 compatible = "hardkernel,odroid-c1", "amlogic,meson8b";
53
54 aliases {
55 serial0 = &uart_AO;
56 };
57
58 memory {
59 reg = <0x40000000 0x40000000>;
60 };
61};
62
63&uart_AO {
64 status = "okay";
65 pinctrl-0 = <&uart_ao_a_pins>;
66 pinctrl-names = "default";
67};
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
new file mode 100644
index 000000000000..ee352bf687ff
--- /dev/null
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -0,0 +1,186 @@
1/*
2 * Copyright 2015 Endless Mobile, Inc.
3 * Author: Carlo Caione <carlo@endlessm.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47#include <dt-bindings/clock/meson8b-clkc.h>
48#include <dt-bindings/gpio/meson8b-gpio.h>
49#include "skeleton.dtsi"
50
51/ {
52 interrupt-parent = <&gic>;
53
54 cpus {
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 cpu@200 {
59 device_type = "cpu";
60 compatible = "arm,cortex-a5";
61 next-level-cache = <&L2>;
62 reg = <0x200>;
63 };
64
65 cpu@201 {
66 device_type = "cpu";
67 compatible = "arm,cortex-a5";
68 next-level-cache = <&L2>;
69 reg = <0x201>;
70 };
71
72 cpu@202 {
73 device_type = "cpu";
74 compatible = "arm,cortex-a5";
75 next-level-cache = <&L2>;
76 reg = <0x202>;
77 };
78
79 cpu@203 {
80 device_type = "cpu";
81 compatible = "arm,cortex-a5";
82 next-level-cache = <&L2>;
83 reg = <0x203>;
84 };
85 };
86
87 soc {
88 compatible = "simple-bus";
89 #address-cells = <1>;
90 #size-cells = <1>;
91 ranges;
92
93 L2: l2-cache-controller@c4200000 {
94 compatible = "arm,pl310-cache";
95 reg = <0xc4200000 0x1000>;
96 cache-unified;
97 cache-level = <2>;
98 };
99
100 gic: interrupt-controller@c4301000 {
101 compatible = "arm,cortex-a9-gic";
102 reg = <0xc4301000 0x1000>,
103 <0xc4300100 0x0100>;
104 interrupt-controller;
105 #interrupt-cells = <3>;
106 };
107
108 timer@c1109940 {
109 compatible = "amlogic,meson6-timer";
110 reg = <0xc1109940 0x18>;
111 interrupts = <0 10 1>;
112 };
113
114 uart_AO: serial@c81004c0 {
115 compatible = "amlogic,meson-uart";
116 reg = <0xc81004c0 0x18>;
117 interrupts = <0 90 1>;
118 clocks = <&clkc CLKID_CLK81>;
119 status = "disabled";
120 };
121
122 uart_A: serial@c11084c0 {
123 compatible = "amlogic,meson-uart";
124 reg = <0xc11084c0 0x18>;
125 interrupts = <0 26 1>;
126 clocks = <&clkc CLKID_CLK81>;
127 status = "disabled";
128 };
129
130 uart_B: serial@c11084dc {
131 compatible = "amlogic,meson-uart";
132 reg = <0xc11084dc 0x18>;
133 interrupts = <0 75 1>;
134 clocks = <&clkc CLKID_CLK81>;
135 status = "disabled";
136 };
137
138 uart_C: serial@c1108700 {
139 compatible = "amlogic,meson-uart";
140 reg = <0xc1108700 0x18>;
141 interrupts = <0 93 1>;
142 clocks = <&clkc CLKID_CLK81>;
143 status = "disabled";
144 };
145
146 clkc: clock-controller@c1104000 {
147 #clock-cells = <1>;
148 compatible = "amlogic,meson8b-clkc";
149 reg = <0xc1108000 0x4>, <0xc1104000 0x460>;
150 };
151
152 pinctrl: pinctrl@c1109880 {
153 compatible = "amlogic,meson8b-pinctrl";
154 reg = <0xc1109880 0x10>;
155 #address-cells = <1>;
156 #size-cells = <1>;
157 ranges;
158
159 gpio: banks@c11080b0 {
160 reg = <0xc11080b0 0x28>,
161 <0xc11080e8 0x18>,
162 <0xc1108120 0x18>,
163 <0xc1108030 0x38>;
164 reg-names = "mux", "pull", "pull-enable", "gpio";
165 gpio-controller;
166 #gpio-cells = <2>;
167 };
168
169 gpio_ao: ao-bank@c1108030 {
170 reg = <0xc8100014 0x4>,
171 <0xc810002c 0x4>,
172 <0xc8100024 0x8>;
173 reg-names = "mux", "pull", "gpio";
174 gpio-controller;
175 #gpio-cells = <2>;
176 };
177
178 uart_ao_a_pins: uart_ao_a {
179 mux {
180 groups = "uart_tx_ao_a", "uart_rx_ao_a";
181 function = "uart_ao";
182 };
183 };
184 };
185 };
186}; /* end of / */
diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
index ca3402e8240b..52086c8018e2 100644
--- a/arch/arm/boot/dts/mt8127.dtsi
+++ b/arch/arm/boot/dts/mt8127.dtsi
@@ -23,6 +23,7 @@
23 cpus { 23 cpus {
24 #address-cells = <1>; 24 #address-cells = <1>;
25 #size-cells = <0>; 25 #size-cells = <0>;
26 enable-method = "mediatek,mt81xx-tz-smp";
26 27
27 cpu@0 { 28 cpu@0 {
28 device_type = "cpu"; 29 device_type = "cpu";
@@ -47,6 +48,17 @@
47 48
48 }; 49 };
49 50
51 reserved-memory {
52 #address-cells = <2>;
53 #size-cells = <2>;
54 ranges;
55
56 trustzone-bootinfo@80002000 {
57 compatible = "mediatek,trustzone-bootinfo";
58 reg = <0 0x80002000 0 0x1000>;
59 };
60 };
61
50 clocks { 62 clocks {
51 #address-cells = <2>; 63 #address-cells = <2>;
52 #size-cells = <2>; 64 #size-cells = <2>;
@@ -72,6 +84,21 @@
72 }; 84 };
73 }; 85 };
74 86
87 timer {
88 compatible = "arm,armv7-timer";
89 interrupt-parent = <&gic>;
90 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
91 IRQ_TYPE_LEVEL_LOW)>,
92 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
93 IRQ_TYPE_LEVEL_LOW)>,
94 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
95 IRQ_TYPE_LEVEL_LOW)>,
96 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
97 IRQ_TYPE_LEVEL_LOW)>;
98 clock-frequency = <13000000>;
99 arm,cpu-registers-not-fw-configured;
100 };
101
75 soc { 102 soc {
76 #address-cells = <2>; 103 #address-cells = <2>;
77 #size-cells = <2>; 104 #size-cells = <2>;
diff --git a/arch/arm/boot/dts/mt8135-evbp1.dts b/arch/arm/boot/dts/mt8135-evbp1.dts
index 357a91fc2d1d..460db6d05952 100644
--- a/arch/arm/boot/dts/mt8135-evbp1.dts
+++ b/arch/arm/boot/dts/mt8135-evbp1.dts
@@ -32,7 +32,6 @@
32 compatible = "mediatek,mt6397-regulator"; 32 compatible = "mediatek,mt6397-regulator";
33 33
34 mt6397_vpca15_reg: buck_vpca15 { 34 mt6397_vpca15_reg: buck_vpca15 {
35 regulator-compatible = "buck_vpca15";
36 regulator-name = "vpca15"; 35 regulator-name = "vpca15";
37 regulator-min-microvolt = < 850000>; 36 regulator-min-microvolt = < 850000>;
38 regulator-max-microvolt = <1350000>; 37 regulator-max-microvolt = <1350000>;
@@ -41,7 +40,6 @@
41 }; 40 };
42 41
43 mt6397_vpca7_reg: buck_vpca7 { 42 mt6397_vpca7_reg: buck_vpca7 {
44 regulator-compatible = "buck_vpca7";
45 regulator-name = "vpca7"; 43 regulator-name = "vpca7";
46 regulator-min-microvolt = < 850000>; 44 regulator-min-microvolt = < 850000>;
47 regulator-max-microvolt = <1350000>; 45 regulator-max-microvolt = <1350000>;
@@ -50,7 +48,6 @@
50 }; 48 };
51 49
52 mt6397_vsramca15_reg: buck_vsramca15 { 50 mt6397_vsramca15_reg: buck_vsramca15 {
53 regulator-compatible = "buck_vsramca15";
54 regulator-name = "vsramca15"; 51 regulator-name = "vsramca15";
55 regulator-min-microvolt = < 850000>; 52 regulator-min-microvolt = < 850000>;
56 regulator-max-microvolt = <1350000>; 53 regulator-max-microvolt = <1350000>;
@@ -59,7 +56,6 @@
59 }; 56 };
60 57
61 mt6397_vsramca7_reg: buck_vsramca7 { 58 mt6397_vsramca7_reg: buck_vsramca7 {
62 regulator-compatible = "buck_vsramca7";
63 regulator-name = "vsramca7"; 59 regulator-name = "vsramca7";
64 regulator-min-microvolt = < 850000>; 60 regulator-min-microvolt = < 850000>;
65 regulator-max-microvolt = <1350000>; 61 regulator-max-microvolt = <1350000>;
@@ -68,7 +64,6 @@
68 }; 64 };
69 65
70 mt6397_vcore_reg: buck_vcore { 66 mt6397_vcore_reg: buck_vcore {
71 regulator-compatible = "buck_vcore";
72 regulator-name = "vcore"; 67 regulator-name = "vcore";
73 regulator-min-microvolt = < 850000>; 68 regulator-min-microvolt = < 850000>;
74 regulator-max-microvolt = <1350000>; 69 regulator-max-microvolt = <1350000>;
@@ -77,7 +72,6 @@
77 }; 72 };
78 73
79 mt6397_vgpu_reg: buck_vgpu { 74 mt6397_vgpu_reg: buck_vgpu {
80 regulator-compatible = "buck_vgpu";
81 regulator-name = "vgpu"; 75 regulator-name = "vgpu";
82 regulator-min-microvolt = < 700000>; 76 regulator-min-microvolt = < 700000>;
83 regulator-max-microvolt = <1350000>; 77 regulator-max-microvolt = <1350000>;
@@ -86,7 +80,6 @@
86 }; 80 };
87 81
88 mt6397_vdrm_reg: buck_vdrm { 82 mt6397_vdrm_reg: buck_vdrm {
89 regulator-compatible = "buck_vdrm";
90 regulator-name = "vdrm"; 83 regulator-name = "vdrm";
91 regulator-min-microvolt = <1200000>; 84 regulator-min-microvolt = <1200000>;
92 regulator-max-microvolt = <1400000>; 85 regulator-max-microvolt = <1400000>;
@@ -95,7 +88,6 @@
95 }; 88 };
96 89
97 mt6397_vio18_reg: buck_vio18 { 90 mt6397_vio18_reg: buck_vio18 {
98 regulator-compatible = "buck_vio18";
99 regulator-name = "vio18"; 91 regulator-name = "vio18";
100 regulator-min-microvolt = <1620000>; 92 regulator-min-microvolt = <1620000>;
101 regulator-max-microvolt = <1980000>; 93 regulator-max-microvolt = <1980000>;
@@ -104,19 +96,16 @@
104 }; 96 };
105 97
106 mt6397_vtcxo_reg: ldo_vtcxo { 98 mt6397_vtcxo_reg: ldo_vtcxo {
107 regulator-compatible = "ldo_vtcxo";
108 regulator-name = "vtcxo"; 99 regulator-name = "vtcxo";
109 regulator-always-on; 100 regulator-always-on;
110 }; 101 };
111 102
112 mt6397_va28_reg: ldo_va28 { 103 mt6397_va28_reg: ldo_va28 {
113 regulator-compatible = "ldo_va28";
114 regulator-name = "va28"; 104 regulator-name = "va28";
115 regulator-always-on; 105 regulator-always-on;
116 }; 106 };
117 107
118 mt6397_vcama_reg: ldo_vcama { 108 mt6397_vcama_reg: ldo_vcama {
119 regulator-compatible = "ldo_vcama";
120 regulator-name = "vcama"; 109 regulator-name = "vcama";
121 regulator-min-microvolt = <1500000>; 110 regulator-min-microvolt = <1500000>;
122 regulator-max-microvolt = <2800000>; 111 regulator-max-microvolt = <2800000>;
@@ -124,18 +113,15 @@
124 }; 113 };
125 114
126 mt6397_vio28_reg: ldo_vio28 { 115 mt6397_vio28_reg: ldo_vio28 {
127 regulator-compatible = "ldo_vio28";
128 regulator-name = "vio28"; 116 regulator-name = "vio28";
129 regulator-always-on; 117 regulator-always-on;
130 }; 118 };
131 119
132 mt6397_vusb_reg: ldo_vusb { 120 mt6397_vusb_reg: ldo_vusb {
133 regulator-compatible = "ldo_vusb";
134 regulator-name = "vusb"; 121 regulator-name = "vusb";
135 }; 122 };
136 123
137 mt6397_vmc_reg: ldo_vmc { 124 mt6397_vmc_reg: ldo_vmc {
138 regulator-compatible = "ldo_vmc";
139 regulator-name = "vmc"; 125 regulator-name = "vmc";
140 regulator-min-microvolt = <1800000>; 126 regulator-min-microvolt = <1800000>;
141 regulator-max-microvolt = <3300000>; 127 regulator-max-microvolt = <3300000>;
@@ -143,7 +129,6 @@
143 }; 129 };
144 130
145 mt6397_vmch_reg: ldo_vmch { 131 mt6397_vmch_reg: ldo_vmch {
146 regulator-compatible = "ldo_vmch";
147 regulator-name = "vmch"; 132 regulator-name = "vmch";
148 regulator-min-microvolt = <3000000>; 133 regulator-min-microvolt = <3000000>;
149 regulator-max-microvolt = <3300000>; 134 regulator-max-microvolt = <3300000>;
@@ -151,7 +136,6 @@
151 }; 136 };
152 137
153 mt6397_vemc_3v3_reg: ldo_vemc3v3 { 138 mt6397_vemc_3v3_reg: ldo_vemc3v3 {
154 regulator-compatible = "ldo_vemc3v3";
155 regulator-name = "vemc_3v3"; 139 regulator-name = "vemc_3v3";
156 regulator-min-microvolt = <3000000>; 140 regulator-min-microvolt = <3000000>;
157 regulator-max-microvolt = <3300000>; 141 regulator-max-microvolt = <3300000>;
@@ -159,7 +143,6 @@
159 }; 143 };
160 144
161 mt6397_vgp1_reg: ldo_vgp1 { 145 mt6397_vgp1_reg: ldo_vgp1 {
162 regulator-compatible = "ldo_vgp1";
163 regulator-name = "vcamd"; 146 regulator-name = "vcamd";
164 regulator-min-microvolt = <1220000>; 147 regulator-min-microvolt = <1220000>;
165 regulator-max-microvolt = <3300000>; 148 regulator-max-microvolt = <3300000>;
@@ -167,7 +150,6 @@
167 }; 150 };
168 151
169 mt6397_vgp2_reg: ldo_vgp2 { 152 mt6397_vgp2_reg: ldo_vgp2 {
170 regulator-compatible = "ldo_vgp2";
171 regulator-name = "vcamio"; 153 regulator-name = "vcamio";
172 regulator-min-microvolt = <1000000>; 154 regulator-min-microvolt = <1000000>;
173 regulator-max-microvolt = <3300000>; 155 regulator-max-microvolt = <3300000>;
@@ -175,7 +157,6 @@
175 }; 157 };
176 158
177 mt6397_vgp3_reg: ldo_vgp3 { 159 mt6397_vgp3_reg: ldo_vgp3 {
178 regulator-compatible = "ldo_vgp3";
179 regulator-name = "vcamaf"; 160 regulator-name = "vcamaf";
180 regulator-min-microvolt = <1200000>; 161 regulator-min-microvolt = <1200000>;
181 regulator-max-microvolt = <3300000>; 162 regulator-max-microvolt = <3300000>;
@@ -183,7 +164,6 @@
183 }; 164 };
184 165
185 mt6397_vgp4_reg: ldo_vgp4 { 166 mt6397_vgp4_reg: ldo_vgp4 {
186 regulator-compatible = "ldo_vgp4";
187 regulator-name = "vgp4"; 167 regulator-name = "vgp4";
188 regulator-min-microvolt = <1200000>; 168 regulator-min-microvolt = <1200000>;
189 regulator-max-microvolt = <3300000>; 169 regulator-max-microvolt = <3300000>;
@@ -191,7 +171,6 @@
191 }; 171 };
192 172
193 mt6397_vgp5_reg: ldo_vgp5 { 173 mt6397_vgp5_reg: ldo_vgp5 {
194 regulator-compatible = "ldo_vgp5";
195 regulator-name = "vgp5"; 174 regulator-name = "vgp5";
196 regulator-min-microvolt = <1200000>; 175 regulator-min-microvolt = <1200000>;
197 regulator-max-microvolt = <3000000>; 176 regulator-max-microvolt = <3000000>;
@@ -199,7 +178,6 @@
199 }; 178 };
200 179
201 mt6397_vgp6_reg: ldo_vgp6 { 180 mt6397_vgp6_reg: ldo_vgp6 {
202 regulator-compatible = "ldo_vgp6";
203 regulator-name = "vgp6"; 181 regulator-name = "vgp6";
204 regulator-min-microvolt = <1200000>; 182 regulator-min-microvolt = <1200000>;
205 regulator-max-microvolt = <3300000>; 183 regulator-max-microvolt = <3300000>;
@@ -207,7 +185,6 @@
207 }; 185 };
208 186
209 mt6397_vibr_reg: ldo_vibr { 187 mt6397_vibr_reg: ldo_vibr {
210 regulator-compatible = "ldo_vibr";
211 regulator-name = "vibr"; 188 regulator-name = "vibr";
212 regulator-min-microvolt = <1300000>; 189 regulator-min-microvolt = <1300000>;
213 regulator-max-microvolt = <3300000>; 190 regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
index 08371dbae543..cb99b02d2ccc 100644
--- a/arch/arm/boot/dts/mt8135.dtsi
+++ b/arch/arm/boot/dts/mt8135.dtsi
@@ -46,6 +46,7 @@
46 cpus { 46 cpus {
47 #address-cells = <1>; 47 #address-cells = <1>;
48 #size-cells = <0>; 48 #size-cells = <0>;
49 enable-method = "mediatek,mt81xx-tz-smp";
49 50
50 cpu0: cpu@0 { 51 cpu0: cpu@0 {
51 device_type = "cpu"; 52 device_type = "cpu";
@@ -72,6 +73,17 @@
72 }; 73 };
73 }; 74 };
74 75
76 reserved-memory {
77 #address-cells = <2>;
78 #size-cells = <2>;
79 ranges;
80
81 trustzone-bootinfo@80002000 {
82 compatible = "mediatek,trustzone-bootinfo";
83 reg = <0 0x80002000 0 0x1000>;
84 };
85 };
86
75 clocks { 87 clocks {
76 #address-cells = <2>; 88 #address-cells = <2>;
77 #size-cells = <2>; 89 #size-cells = <2>;
@@ -97,6 +109,21 @@
97 }; 109 };
98 }; 110 };
99 111
112 timer {
113 compatible = "arm,armv7-timer";
114 interrupt-parent = <&gic>;
115 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
116 IRQ_TYPE_LEVEL_LOW)>,
117 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
118 IRQ_TYPE_LEVEL_LOW)>,
119 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
120 IRQ_TYPE_LEVEL_LOW)>,
121 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
122 IRQ_TYPE_LEVEL_LOW)>;
123 clock-frequency = <13000000>;
124 arm,cpu-registers-not-fw-configured;
125 };
126
100 soc { 127 soc {
101 #address-cells = <2>; 128 #address-cells = <2>;
102 #size-cells = <2>; 129 #size-cells = <2>;
diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi
index 390c91aea16d..ee5a0bb22354 100644
--- a/arch/arm/boot/dts/nspire.dtsi
+++ b/arch/arm/boot/dts/nspire.dtsi
@@ -16,7 +16,7 @@
16 16
17 cpus { 17 cpus {
18 cpu@0 { 18 cpu@0 {
19 compatible = "arm,arm926ejs"; 19 compatible = "arm,arm926ej-s";
20 }; 20 };
21 }; 21 };
22 22
diff --git a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
index c9f1e93a95ae..8491f46c61b7 100644
--- a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
+++ b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
@@ -9,9 +9,9 @@
9 ocp { 9 ocp {
10 i2c@0 { 10 i2c@0 {
11 compatible = "i2c-cbus-gpio"; 11 compatible = "i2c-cbus-gpio";
12 gpios = <&gpio3 2 0 /* gpio66 clk */ 12 gpios = <&gpio3 2 GPIO_ACTIVE_HIGH /* gpio66 clk */
13 &gpio3 1 0 /* gpio65 dat */ 13 &gpio3 1 GPIO_ACTIVE_HIGH /* gpio65 dat */
14 &gpio3 0 0 /* gpio64 sel */ 14 &gpio3 0 GPIO_ACTIVE_HIGH /* gpio64 sel */
15 >; 15 >;
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <0>; 17 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index 2390f387c271..798dda072b2a 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -56,6 +56,7 @@
56 reg = <0x270 0x240>; 56 reg = <0x270 0x240>;
57 #address-cells = <1>; 57 #address-cells = <1>;
58 #size-cells = <1>; 58 #size-cells = <1>;
59 ranges = <0 0x270 0x240>;
59 60
60 scm_clocks: clocks { 61 scm_clocks: clocks {
61 #address-cells = <1>; 62 #address-cells = <1>;
@@ -63,7 +64,7 @@
63 }; 64 };
64 65
65 pbias_regulator: pbias_regulator { 66 pbias_regulator: pbias_regulator {
66 compatible = "ti,pbias-omap"; 67 compatible = "ti,pbias-omap2", "ti,pbias-omap";
67 reg = <0x230 0x4>; 68 reg = <0x230 0x4>;
68 syscon = <&scm_conf>; 69 syscon = <&scm_conf>;
69 pbias_mmc_reg: pbias_mmc_omap2430 { 70 pbias_mmc_reg: pbias_mmc_omap2430 {
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 7c4dca122a91..73f1e3a8f62c 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -80,7 +80,7 @@
80 regulator-name = "hsusb2_vbus"; 80 regulator-name = "hsusb2_vbus";
81 regulator-min-microvolt = <3300000>; 81 regulator-min-microvolt = <3300000>;
82 regulator-max-microvolt = <3300000>; 82 regulator-max-microvolt = <3300000>;
83 gpio = <&twl_gpio 18 0>; /* GPIO LEDA */ 83 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
84 startup-delay-us = <70000>; 84 startup-delay-us = <70000>;
85 }; 85 };
86 86
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index a5474113cd50..274c2c482aaa 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -55,7 +55,7 @@
55 regulator-name = "hsusb2_vbus"; 55 regulator-name = "hsusb2_vbus";
56 regulator-min-microvolt = <3300000>; 56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>;
58 gpio = <&twl_gpio 18 0>; /* GPIO LEDA */ 58 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
59 startup-delay-us = <70000>; 59 startup-delay-us = <70000>;
60 }; 60 };
61 61
@@ -202,7 +202,7 @@
202 202
203 tfp410_pins: pinmux_tfp410_pins { 203 tfp410_pins: pinmux_tfp410_pins {
204 pinctrl-single,pins = < 204 pinctrl-single,pins = <
205 0x194 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ 205 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
206 >; 206 >;
207 }; 207 };
208 208
diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
index 4d091ca43e25..8c813e77b17f 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
@@ -224,7 +224,7 @@
224 224
225 interrupt-parent = <&gpio2>; 225 interrupt-parent = <&gpio2>;
226 interrupts = <25 0>; /* gpio_57 */ 226 interrupts = <25 0>; /* gpio_57 */
227 pendown-gpio = <&gpio2 25 0>; 227 pendown-gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
228 228
229 ti,x-min = /bits/ 16 <0x0>; 229 ti,x-min = /bits/ 16 <0x0>;
230 ti,x-max = /bits/ 16 <0x0fff>; 230 ti,x-max = /bits/ 16 <0x0fff>;
diff --git a/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi b/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
index e84184de2a4a..4813e96157b3 100644
--- a/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
+++ b/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
@@ -54,7 +54,7 @@
54 54
55 interrupt-parent = <&gpio1>; 55 interrupt-parent = <&gpio1>;
56 interrupts = <27 0>; /* gpio_27 */ 56 interrupts = <27 0>; /* gpio_27 */
57 pendown-gpio = <&gpio1 27 0>; 57 pendown-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
58 58
59 ti,x-min = /bits/ 16 <0x0>; 59 ti,x-min = /bits/ 16 <0x0>;
60 ti,x-max = /bits/ 16 <0x0fff>; 60 ti,x-max = /bits/ 16 <0x0fff>;
diff --git a/arch/arm/boot/dts/omap3-evm-common.dtsi b/arch/arm/boot/dts/omap3-evm-common.dtsi
index b2589f96d5f7..090475083c2f 100644
--- a/arch/arm/boot/dts/omap3-evm-common.dtsi
+++ b/arch/arm/boot/dts/omap3-evm-common.dtsi
@@ -26,7 +26,7 @@
26 regulator-name = "vwl1271"; 26 regulator-name = "vwl1271";
27 regulator-min-microvolt = <1800000>; 27 regulator-min-microvolt = <1800000>;
28 regulator-max-microvolt = <1800000>; 28 regulator-max-microvolt = <1800000>;
29 gpio = <&gpio5 22 0>; /* gpio150 */ 29 gpio = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* gpio150 */
30 startup-delay-us = <70000>; 30 startup-delay-us = <70000>;
31 enable-active-high; 31 enable-active-high;
32 vin-supply = <&vmmc2>; 32 vin-supply = <&vmmc2>;
@@ -91,7 +91,7 @@
91 tsc2046@0 { 91 tsc2046@0 {
92 interrupt-parent = <&gpio6>; 92 interrupt-parent = <&gpio6>;
93 interrupts = <15 0>; /* gpio175 */ 93 interrupts = <15 0>; /* gpio175 */
94 pendown-gpio = <&gpio6 15 0>; 94 pendown-gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
95 }; 95 };
96}; 96};
97 97
diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
index 7166d8876ea8..e14d15e5abc8 100644
--- a/arch/arm/boot/dts/omap3-gta04.dtsi
+++ b/arch/arm/boot/dts/omap3-gta04.dtsi
@@ -77,10 +77,10 @@
77 pinctrl-names = "default"; 77 pinctrl-names = "default";
78 pinctrl-0 = <&spi_gpio_pins>; 78 pinctrl-0 = <&spi_gpio_pins>;
79 79
80 gpio-sck = <&gpio1 12 0>; 80 gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>;
81 gpio-miso = <&gpio1 18 0>; 81 gpio-miso = <&gpio1 18 GPIO_ACTIVE_HIGH>;
82 gpio-mosi = <&gpio1 20 0>; 82 gpio-mosi = <&gpio1 20 GPIO_ACTIVE_HIGH>;
83 cs-gpios = <&gpio1 19 0>; 83 cs-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
84 num-chipselects = <1>; 84 num-chipselects = <1>;
85 85
86 /* lcd panel */ 86 /* lcd panel */
@@ -118,7 +118,7 @@
118 118
119 tv_amp: opa362 { 119 tv_amp: opa362 {
120 compatible = "ti,opa362"; 120 compatible = "ti,opa362";
121 enable-gpios = <&gpio1 23 0>; 121 enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
122 122
123 ports { 123 ports {
124 #address-cells = <1>; 124 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/omap3-gta04a5.dts b/arch/arm/boot/dts/omap3-gta04a5.dts
index 52b386f6865b..600b6ca5a1bd 100644
--- a/arch/arm/boot/dts/omap3-gta04a5.dts
+++ b/arch/arm/boot/dts/omap3-gta04a5.dts
@@ -12,6 +12,6 @@
12 model = "Goldelico GTA04A5"; 12 model = "Goldelico GTA04A5";
13 13
14 sound { 14 sound {
15 ti,jack-det-gpio = <&twl_gpio 2 0>; /* GTA04A5 only */ 15 ti,jack-det-gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>; /* GTA04A5 only */
16 }; 16 };
17}; 17};
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index d5e5cd449b16..3caf062f882c 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * Common device tree for IGEP boards based on AM/DM37x 2 * Common device tree for IGEP boards based on AM/DM37x
3 * 3 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
@@ -35,66 +35,60 @@
35&omap3_pmx_core { 35&omap3_pmx_core {
36 uart1_pins: pinmux_uart1_pins { 36 uart1_pins: pinmux_uart1_pins {
37 pinctrl-single,pins = < 37 pinctrl-single,pins = <
38 0x152 (PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ 38 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
39 0x14c (PIN_OUTPUT |MUX_MODE0) /* uart1_tx.uart1_tx */ 39 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
40 >; 40 >;
41 }; 41 };
42 42
43 uart3_pins: pinmux_uart3_pins { 43 uart3_pins: pinmux_uart3_pins {
44 pinctrl-single,pins = < 44 pinctrl-single,pins = <
45 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */ 45 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */
46 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */ 46 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */
47 >; 47 >;
48 }; 48 };
49 49
50 mcbsp2_pins: pinmux_mcbsp2_pins { 50 mcbsp2_pins: pinmux_mcbsp2_pins {
51 pinctrl-single,pins = < 51 pinctrl-single,pins = <
52 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ 52 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
53 0x10e (PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */ 53 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
54 0x110 (PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */ 54 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
55 0x112 (PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */ 55 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
56 >; 56 >;
57 }; 57 };
58 58
59 mmc1_pins: pinmux_mmc1_pins { 59 mmc1_pins: pinmux_mmc1_pins {
60 pinctrl-single,pins = < 60 pinctrl-single,pins = <
61 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 61 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
62 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ 62 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
63 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ 63 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
64 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 64 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
65 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 65 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
66 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 66 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
67 >; 67 >;
68 }; 68 };
69 69
70 mmc2_pins: pinmux_mmc2_pins { 70 mmc2_pins: pinmux_mmc2_pins {
71 pinctrl-single,pins = < 71 pinctrl-single,pins = <
72 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ 72 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
73 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ 73 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
74 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ 74 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
75 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ 75 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
76 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ 76 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
77 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ 77 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
78 >;
79 };
80
81 smsc9221_pins: pinmux_smsc9221_pins {
82 pinctrl-single,pins = <
83 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
84 >; 78 >;
85 }; 79 };
86 80
87 i2c1_pins: pinmux_i2c1_pins { 81 i2c1_pins: pinmux_i2c1_pins {
88 pinctrl-single,pins = < 82 pinctrl-single,pins = <
89 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ 83 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
90 0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ 84 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
91 >; 85 >;
92 }; 86 };
93 87
94 i2c3_pins: pinmux_i2c3_pins { 88 i2c3_pins: pinmux_i2c3_pins {
95 pinctrl-single,pins = < 89 pinctrl-single,pins = <
96 0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */ 90 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
97 0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */ 91 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
98 >; 92 >;
99 }; 93 };
100}; 94};
@@ -161,7 +155,7 @@
161 twl_audio: audio { 155 twl_audio: audio {
162 compatible = "ti,twl4030-audio"; 156 compatible = "ti,twl4030-audio";
163 codec { 157 codec {
164 }; 158 };
165 }; 159 };
166 }; 160 };
167}; 161};
@@ -181,11 +175,11 @@
181}; 175};
182 176
183&mmc1 { 177&mmc1 {
184 pinctrl-names = "default"; 178 pinctrl-names = "default";
185 pinctrl-0 = <&mmc1_pins>; 179 pinctrl-0 = <&mmc1_pins>;
186 vmmc-supply = <&vmmc1>; 180 vmmc-supply = <&vmmc1>;
187 vmmc_aux-supply = <&vsim>; 181 vmmc_aux-supply = <&vsim>;
188 bus-width = <4>; 182 bus-width = <4>;
189}; 183};
190 184
191&mmc3 { 185&mmc3 {
@@ -193,13 +187,13 @@
193}; 187};
194 188
195&uart1 { 189&uart1 {
196 pinctrl-names = "default"; 190 pinctrl-names = "default";
197 pinctrl-0 = <&uart1_pins>; 191 pinctrl-0 = <&uart1_pins>;
198}; 192};
199 193
200&uart3 { 194&uart3 {
201 pinctrl-names = "default"; 195 pinctrl-names = "default";
202 pinctrl-0 = <&uart3_pins>; 196 pinctrl-0 = <&uart3_pins>;
203}; 197};
204 198
205&twl_gpio { 199&twl_gpio {
diff --git a/arch/arm/boot/dts/omap3-igep0020-common.dtsi b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
index e458c2185e3c..d90f12c39307 100644
--- a/arch/arm/boot/dts/omap3-igep0020-common.dtsi
+++ b/arch/arm/boot/dts/omap3-igep0020-common.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * Common Device Tree Source for IGEPv2 2 * Common Device Tree Source for IGEPv2
3 * 3 *
4 * Copyright (C) 2014 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2014 Javier Martinez Canillas <javier@osg.samsung.com>
5 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
@@ -111,40 +111,40 @@
111 111
112 tfp410_pins: pinmux_tfp410_pins { 112 tfp410_pins: pinmux_tfp410_pins {
113 pinctrl-single,pins = < 113 pinctrl-single,pins = <
114 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ 114 OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
115 >; 115 >;
116 }; 116 };
117 117
118 dss_dpi_pins: pinmux_dss_dpi_pins { 118 dss_dpi_pins: pinmux_dss_dpi_pins {
119 pinctrl-single,pins = < 119 pinctrl-single,pins = <
120 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ 120 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
121 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ 121 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
122 0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ 122 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
123 0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ 123 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
124 0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ 124 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
125 0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ 125 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
126 0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ 126 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
127 0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ 127 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
128 0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ 128 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
129 0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ 129 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
130 0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ 130 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
131 0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ 131 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
132 0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ 132 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
133 0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ 133 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
134 0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ 134 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
135 0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ 135 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
136 0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ 136 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
137 0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ 137 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
138 0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ 138 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
139 0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ 139 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
140 0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ 140 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
141 0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ 141 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
142 0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ 142 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
143 0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ 143 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
144 0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ 144 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
145 0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ 145 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
146 0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ 146 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
147 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ 147 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
148 >; 148 >;
149 }; 149 };
150 150
@@ -156,6 +156,12 @@
156 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ 156 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
157 >; 157 >;
158 }; 158 };
159
160 smsc9221_pins: pinmux_smsc9221_pins {
161 pinctrl-single,pins = <
162 OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
163 >;
164 };
159}; 165};
160 166
161&omap3_pmx_core2 { 167&omap3_pmx_core2 {
diff --git a/arch/arm/boot/dts/omap3-igep0020-rev-f.dts b/arch/arm/boot/dts/omap3-igep0020-rev-f.dts
index 72f7cdc091fb..321c2b7a4e9f 100644
--- a/arch/arm/boot/dts/omap3-igep0020-rev-f.dts
+++ b/arch/arm/boot/dts/omap3-igep0020-rev-f.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Device Tree Source for IGEPv2 Rev. F (TI OMAP AM/DM37x) 2 * Device Tree Source for IGEPv2 Rev. F (TI OMAP AM/DM37x)
3 * 3 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index fea7f7edb45d..3835e1569c29 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x) 2 * Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x)
3 * 3 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
@@ -45,15 +45,6 @@
45 OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - RST_N_B */ 45 OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - RST_N_B */
46 >; 46 >;
47 }; 47 };
48
49 uart2_pins: pinmux_uart2_pins {
50 pinctrl-single,pins = <
51 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
52 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
53 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
54 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
55 >;
56 };
57}; 48};
58 49
59/* On board Wifi module */ 50/* On board Wifi module */
diff --git a/arch/arm/boot/dts/omap3-igep0030-common.dtsi b/arch/arm/boot/dts/omap3-igep0030-common.dtsi
index 0cb1527c39d4..640f06603966 100644
--- a/arch/arm/boot/dts/omap3-igep0030-common.dtsi
+++ b/arch/arm/boot/dts/omap3-igep0030-common.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * Common Device Tree Source for IGEP COM MODULE 2 * Common Device Tree Source for IGEP COM MODULE
3 * 3 *
4 * Copyright (C) 2014 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2014 Javier Martinez Canillas <javier@osg.samsung.com>
5 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
diff --git a/arch/arm/boot/dts/omap3-igep0030-rev-g.dts b/arch/arm/boot/dts/omap3-igep0030-rev-g.dts
index b899e341874a..76dc08868bfb 100644
--- a/arch/arm/boot/dts/omap3-igep0030-rev-g.dts
+++ b/arch/arm/boot/dts/omap3-igep0030-rev-g.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Device Tree Source for IGEP COM MODULE Rev. G (TI OMAP AM/DM37x) 2 * Device Tree Source for IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
3 * 3 *
4 * Copyright (C) 2014 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2014 Javier Martinez Canillas <javier@osg.samsung.com>
5 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts
index 8150f47ccdf5..468608dab30a 100644
--- a/arch/arm/boot/dts/omap3-igep0030.dts
+++ b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Device Tree Source for IGEP COM MODULE Rev. E (TI OMAP AM/DM37x) 2 * Device Tree Source for IGEP COM MODULE Rev. E (TI OMAP AM/DM37x)
3 * 3 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
index bd6e6769c7ce..d2fab8c0d4f8 100644
--- a/arch/arm/boot/dts/omap3-ldp.dts
+++ b/arch/arm/boot/dts/omap3-ldp.dts
@@ -200,7 +200,7 @@
200 tsc2046@0 { 200 tsc2046@0 {
201 interrupt-parent = <&gpio2>; 201 interrupt-parent = <&gpio2>;
202 interrupts = <22 0>; /* gpio54 */ 202 interrupts = <22 0>; /* gpio54 */
203 pendown-gpio = <&gpio2 22 0>; 203 pendown-gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>;
204 }; 204 };
205}; 205};
206 206
diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
index d0dd0365bfda..57d7c93cc72b 100644
--- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -284,7 +284,7 @@
284}; 284};
285 285
286&mmc1 { 286&mmc1 {
287 cd-gpios = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>; 287 cd-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
288 cd-inverted; 288 cd-inverted;
289 vmmc-supply = <&vmmc1>; 289 vmmc-supply = <&vmmc1>;
290 bus-width = <4>; 290 bus-width = <4>;
@@ -314,7 +314,7 @@
314 interrupt-parent = <&gpio1>; 314 interrupt-parent = <&gpio1>;
315 interrupts = <8 0>; /* boot6 / gpio_8 */ 315 interrupts = <8 0>; /* boot6 / gpio_8 */
316 spi-max-frequency = <1000000>; 316 spi-max-frequency = <1000000>;
317 pendown-gpio = <&gpio1 8 0>; 317 pendown-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
318 vcc-supply = <&reg_vcc3>; 318 vcc-supply = <&reg_vcc3>;
319 pinctrl-names = "default"; 319 pinctrl-names = "default";
320 pinctrl-0 = <&tsc2048_pins>; 320 pinctrl-0 = <&tsc2048_pins>;
diff --git a/arch/arm/boot/dts/omap3-lilly-dbb056.dts b/arch/arm/boot/dts/omap3-lilly-dbb056.dts
index 834f7c65f62d..0e3c9812f4e3 100644
--- a/arch/arm/boot/dts/omap3-lilly-dbb056.dts
+++ b/arch/arm/boot/dts/omap3-lilly-dbb056.dts
@@ -114,8 +114,8 @@
114 status = "okay"; 114 status = "okay";
115 bus-width = <4>; 115 bus-width = <4>;
116 vmmc-supply = <&vmmc1>; 116 vmmc-supply = <&vmmc1>;
117 cd-gpios = <&gpio6 4 0>; /* gpio_164 */ 117 cd-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio_164 */
118 wp-gpios = <&gpio6 3 0>; /* gpio_163 */ 118 wp-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* gpio_163 */
119 pinctrl-names = "default"; 119 pinctrl-names = "default";
120 pinctrl-0 = <&mmc2_pins>; 120 pinctrl-0 = <&mmc2_pins>;
121 ti,dual-volt; 121 ti,dual-volt;
diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi
index 800b379d368d..e9ee1df0e467 100644
--- a/arch/arm/boot/dts/omap3-n950-n9.dtsi
+++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi
@@ -27,7 +27,7 @@
27 regulator-name = "VEMMC"; 27 regulator-name = "VEMMC";
28 regulator-min-microvolt = <2900000>; 28 regulator-min-microvolt = <2900000>;
29 regulator-max-microvolt = <2900000>; 29 regulator-max-microvolt = <2900000>;
30 gpio = <&gpio5 29 0>; /* gpio line 157 */ 30 gpio = <&gpio5 29 GPIO_ACTIVE_HIGH>; /* gpio line 157 */
31 startup-delay-us = <150>; 31 startup-delay-us = <150>;
32 enable-active-high; 32 enable-active-high;
33 }; 33 };
diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi
index 28430f1596f2..a29ad16cc9bb 100644
--- a/arch/arm/boot/dts/omap3-overo-base.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-base.dtsi
@@ -35,7 +35,7 @@
35 regulator-name = "hsusb2_vbus"; 35 regulator-name = "hsusb2_vbus";
36 regulator-min-microvolt = <5000000>; 36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>; 37 regulator-max-microvolt = <5000000>;
38 gpio = <&gpio6 8 0>; /* gpio_168: vbus enable */ 38 gpio = <&gpio6 8 GPIO_ACTIVE_HIGH>; /* gpio_168: vbus enable */
39 startup-delay-us = <70000>; 39 startup-delay-us = <70000>;
40 enable-active-high; 40 enable-active-high;
41 }; 41 };
diff --git a/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi b/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
index 80d236ac64a5..b09cedf66117 100644
--- a/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
@@ -152,7 +152,7 @@
152 152
153 interrupt-parent = <&gpio4>; 153 interrupt-parent = <&gpio4>;
154 interrupts = <18 0>; /* gpio_114 */ 154 interrupts = <18 0>; /* gpio_114 */
155 pendown-gpio = <&gpio4 18 0>; 155 pendown-gpio = <&gpio4 18 GPIO_ACTIVE_HIGH>;
156 156
157 ti,x-min = /bits/ 16 <0x0>; 157 ti,x-min = /bits/ 16 <0x0>;
158 ti,x-max = /bits/ 16 <0x0fff>; 158 ti,x-max = /bits/ 16 <0x0fff>;
diff --git a/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi b/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi
index 048fd216970a..5f979590571b 100644
--- a/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi
@@ -163,7 +163,7 @@
163 163
164 interrupt-parent = <&gpio4>; 164 interrupt-parent = <&gpio4>;
165 interrupts = <18 0>; /* gpio_114 */ 165 interrupts = <18 0>; /* gpio_114 */
166 pendown-gpio = <&gpio4 18 0>; 166 pendown-gpio = <&gpio4 18 GPIO_ACTIVE_HIGH>;
167 167
168 ti,x-min = /bits/ 16 <0x0>; 168 ti,x-min = /bits/ 16 <0x0>;
169 ti,x-max = /bits/ 16 <0x0fff>; 169 ti,x-max = /bits/ 16 <0x0fff>;
diff --git a/arch/arm/boot/dts/omap3-pandora-common.dtsi b/arch/arm/boot/dts/omap3-pandora-common.dtsi
index f2084e6d01e7..cfe140c657e7 100644
--- a/arch/arm/boot/dts/omap3-pandora-common.dtsi
+++ b/arch/arm/boot/dts/omap3-pandora-common.dtsi
@@ -218,7 +218,7 @@
218 regulator-always-on; 218 regulator-always-on;
219 regulator-boot-on; 219 regulator-boot-on;
220 enable-active-high; 220 enable-active-high;
221 gpio = <&gpio6 4 0>; /* GPIO_164 */ 221 gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* GPIO_164 */
222 }; 222 };
223 223
224 /* wg7210 (wifi+bt module) 32k clock buffer */ 224 /* wg7210 (wifi+bt module) 32k clock buffer */
@@ -607,7 +607,7 @@
607 pinctrl-0 = <&penirq_pins>; 607 pinctrl-0 = <&penirq_pins>;
608 interrupt-parent = <&gpio3>; 608 interrupt-parent = <&gpio3>;
609 interrupts = <30 0>; /* GPIO_94 */ 609 interrupts = <30 0>; /* GPIO_94 */
610 pendown-gpio = <&gpio3 30 0>; 610 pendown-gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
611 vcc-supply = <&vaux4>; 611 vcc-supply = <&vaux4>;
612 612
613 ti,x-min = /bits/ 16 <0>; 613 ti,x-min = /bits/ 16 <0>;
diff --git a/arch/arm/boot/dts/omap3-tao3530.dtsi b/arch/arm/boot/dts/omap3-tao3530.dtsi
index 7bd8d9a4f67f..ae5dbbd9d569 100644
--- a/arch/arm/boot/dts/omap3-tao3530.dtsi
+++ b/arch/arm/boot/dts/omap3-tao3530.dtsi
@@ -37,7 +37,7 @@
37 regulator-name = "hsusb2_vbus"; 37 regulator-name = "hsusb2_vbus";
38 regulator-min-microvolt = <3300000>; 38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>; 39 regulator-max-microvolt = <3300000>;
40 gpio = <&twl_gpio 18 0>; /* GPIO LEDA */ 40 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
41 startup-delay-us = <70000>; 41 startup-delay-us = <70000>;
42 }; 42 };
43 43
@@ -225,7 +225,7 @@
225 pinctrl-0 = <&mmc1_pins>; 225 pinctrl-0 = <&mmc1_pins>;
226 vmmc-supply = <&vmmc1>; 226 vmmc-supply = <&vmmc1>;
227 vmmc_aux-supply = <&vsim>; 227 vmmc_aux-supply = <&vsim>;
228 cd-gpios = <&twl_gpio 0 0>; 228 cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_HIGH>;
229 bus-width = <8>; 229 bus-width = <8>;
230}; 230};
231 231
diff --git a/arch/arm/boot/dts/omap3-zoom3.dts b/arch/arm/boot/dts/omap3-zoom3.dts
index 131448d86e67..7bc5fdd6981e 100644
--- a/arch/arm/boot/dts/omap3-zoom3.dts
+++ b/arch/arm/boot/dts/omap3-zoom3.dts
@@ -44,7 +44,7 @@
44 regulator-name = "vwl1271"; 44 regulator-name = "vwl1271";
45 regulator-min-microvolt = <1800000>; 45 regulator-min-microvolt = <1800000>;
46 regulator-max-microvolt = <1800000>; 46 regulator-max-microvolt = <1800000>;
47 gpio = <&gpio4 5 0>; /* gpio101 */ 47 gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* gpio101 */
48 startup-delay-us = <70000>; 48 startup-delay-us = <70000>;
49 enable-active-high; 49 enable-active-high;
50 }; 50 };
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 69a40cfc1f29..8a2b25332b8c 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -113,10 +113,22 @@
113 }; 113 };
114 114
115 scm_conf: scm_conf@270 { 115 scm_conf: scm_conf@270 {
116 compatible = "syscon"; 116 compatible = "syscon", "simple-bus";
117 reg = <0x270 0x330>; 117 reg = <0x270 0x330>;
118 #address-cells = <1>; 118 #address-cells = <1>;
119 #size-cells = <1>; 119 #size-cells = <1>;
120 ranges = <0 0x270 0x330>;
121
122 pbias_regulator: pbias_regulator {
123 compatible = "ti,pbias-omap3", "ti,pbias-omap";
124 reg = <0x2b0 0x4>;
125 syscon = <&scm_conf>;
126 pbias_mmc_reg: pbias_mmc_omap2430 {
127 regulator-name = "pbias_mmc_omap2430";
128 regulator-min-microvolt = <1800000>;
129 regulator-max-microvolt = <3000000>;
130 };
131 };
120 132
121 scm_clocks: clocks { 133 scm_clocks: clocks {
122 #address-cells = <1>; 134 #address-cells = <1>;
@@ -202,17 +214,6 @@
202 dma-requests = <96>; 214 dma-requests = <96>;
203 }; 215 };
204 216
205 pbias_regulator: pbias_regulator {
206 compatible = "ti,pbias-omap";
207 reg = <0x2b0 0x4>;
208 syscon = <&scm_conf>;
209 pbias_mmc_reg: pbias_mmc_omap2430 {
210 regulator-name = "pbias_mmc_omap2430";
211 regulator-min-microvolt = <1800000>;
212 regulator-max-microvolt = <3000000>;
213 };
214 };
215
216 gpio1: gpio@48310000 { 217 gpio1: gpio@48310000 {
217 compatible = "ti,omap3-gpio"; 218 compatible = "ti,omap3-gpio";
218 reg = <0x48310000 0x200>; 219 reg = <0x48310000 0x200>;
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index f1507bc8737e..18d096696fc0 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -68,7 +68,7 @@
68 regulator-name = "hsusb1_vbus"; 68 regulator-name = "hsusb1_vbus";
69 regulator-min-microvolt = <3300000>; 69 regulator-min-microvolt = <3300000>;
70 regulator-max-microvolt = <3300000>; 70 regulator-max-microvolt = <3300000>;
71 gpio = <&gpio1 1 0>; /* gpio_1 */ 71 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>; /* gpio_1 */
72 startup-delay-us = <70000>; 72 startup-delay-us = <70000>;
73 enable-active-high; 73 enable-active-high;
74 /* 74 /*
@@ -98,7 +98,7 @@
98 regulator-name = "vwl1271"; 98 regulator-name = "vwl1271";
99 regulator-min-microvolt = <1800000>; 99 regulator-min-microvolt = <1800000>;
100 regulator-max-microvolt = <1800000>; 100 regulator-max-microvolt = <1800000>;
101 gpio = <&gpio2 11 0>; 101 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
102 startup-delay-us = <70000>; 102 startup-delay-us = <70000>;
103 enable-active-high; 103 enable-active-high;
104 }; 104 };
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index dac86ed7481f..f0bdc41f8eff 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -30,7 +30,7 @@
30 regulator-name = "VDD_ETH"; 30 regulator-name = "VDD_ETH";
31 regulator-min-microvolt = <3300000>; 31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>; 32 regulator-max-microvolt = <3300000>;
33 gpio = <&gpio2 16 0>; /* gpio line 48 */ 33 gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>; /* gpio line 48 */
34 enable-active-high; 34 enable-active-high;
35 regulator-boot-on; 35 regulator-boot-on;
36 }; 36 };
@@ -155,7 +155,7 @@
155 regulator-name = "vwl1271"; 155 regulator-name = "vwl1271";
156 regulator-min-microvolt = <1800000>; 156 regulator-min-microvolt = <1800000>;
157 regulator-max-microvolt = <1800000>; 157 regulator-max-microvolt = <1800000>;
158 gpio = <&gpio2 22 0>; 158 gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>;
159 startup-delay-us = <70000>; 159 startup-delay-us = <70000>;
160 enable-active-high; 160 enable-active-high;
161 }; 161 };
@@ -374,7 +374,7 @@
374 374
375 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ 375 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
376 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ 376 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
377 ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */ 377 ti,audpwron-gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio line 127 */
378 378
379 vio-supply = <&v1v8>; 379 vio-supply = <&v1v8>;
380 v2v1-supply = <&v2v1>; 380 v2v1-supply = <&v2v1>;
diff --git a/arch/arm/boot/dts/omap4-var-som-om44-wlan.dtsi b/arch/arm/boot/dts/omap4-var-som-om44-wlan.dtsi
index 9bceeb7e1f03..1c5f6f35e1cf 100644
--- a/arch/arm/boot/dts/omap4-var-som-om44-wlan.dtsi
+++ b/arch/arm/boot/dts/omap4-var-som-om44-wlan.dtsi
@@ -15,7 +15,7 @@
15 regulator-name = "vwl1271"; 15 regulator-name = "vwl1271";
16 regulator-min-microvolt = <1800000>; 16 regulator-min-microvolt = <1800000>;
17 regulator-max-microvolt = <1800000>; 17 regulator-max-microvolt = <1800000>;
18 gpio = <&gpio2 11 0>; /* gpio 43 */ 18 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; /* gpio 43 */
19 startup-delay-us = <70000>; 19 startup-delay-us = <70000>;
20 enable-active-high; 20 enable-active-high;
21 }; 21 };
diff --git a/arch/arm/boot/dts/omap4-var-som-om44.dtsi b/arch/arm/boot/dts/omap4-var-som-om44.dtsi
index a4f1ba2e1903..49d032b846be 100644
--- a/arch/arm/boot/dts/omap4-var-som-om44.dtsi
+++ b/arch/arm/boot/dts/omap4-var-som-om44.dtsi
@@ -196,7 +196,7 @@
196 196
197 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ 197 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
198 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ 198 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
199 ti,audpwron-gpio = <&gpio6 22 0>; /* gpio 182 */ 199 ti,audpwron-gpio = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio 182 */
200 200
201 vio-supply = <&v1v8>; 201 vio-supply = <&v1v8>;
202 v2v1-supply = <&v2v1>; 202 v2v1-supply = <&v2v1>;
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index abc4473e6f8a..5a206c100ce2 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -196,9 +196,10 @@
196 reg = <0x5a0 0x170>; 196 reg = <0x5a0 0x170>;
197 #address-cells = <1>; 197 #address-cells = <1>;
198 #size-cells = <1>; 198 #size-cells = <1>;
199 ranges = <0 0x5a0 0x170>;
199 200
200 pbias_regulator: pbias_regulator { 201 pbias_regulator: pbias_regulator {
201 compatible = "ti,pbias-omap"; 202 compatible = "ti,pbias-omap4", "ti,pbias-omap";
202 reg = <0x60 0x4>; 203 reg = <0x60 0x4>;
203 syscon = <&omap4_padconf_global>; 204 syscon = <&omap4_padconf_global>;
204 pbias_mmc_reg: pbias_mmc_omap4 { 205 pbias_mmc_reg: pbias_mmc_omap4 {
diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi
index 194f9ef0a009..5fa68f191af7 100644
--- a/arch/arm/boot/dts/omap4460.dtsi
+++ b/arch/arm/boot/dts/omap4460.dtsi
@@ -46,7 +46,7 @@
46 0x4a002378 0x18>; 46 0x4a002378 0x18>;
47 compatible = "ti,omap4460-bandgap"; 47 compatible = "ti,omap4460-bandgap";
48 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */ 48 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */
49 gpios = <&gpio3 22 0>; /* tshut */ 49 gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* tshut */
50 50
51 #thermal-sensor-cells = <0>; 51 #thermal-sensor-cells = <0>;
52 }; 52 };
diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi
new file mode 100644
index 000000000000..5cf76a1c5c75
--- /dev/null
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi
@@ -0,0 +1,655 @@
1/*
2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#include "omap5.dtsi"
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/interrupt-controller/arm-gic.h>
11
12/ {
13 aliases {
14 display0 = &hdmi0;
15 };
16
17 vmmcsd_fixed: fixedregulator-mmcsd {
18 compatible = "regulator-fixed";
19 regulator-name = "vmmcsd_fixed";
20 regulator-min-microvolt = <3000000>;
21 regulator-max-microvolt = <3000000>;
22 };
23
24 mmc3_pwrseq: sdhci0_pwrseq {
25 compatible = "mmc-pwrseq-simple";
26 clocks = <&clk32kgaudio>;
27 clock-names = "ext_clock";
28 };
29
30 vmmcsdio_fixed: fixedregulator-mmcsdio {
31 compatible = "regulator-fixed";
32 regulator-name = "vmmcsdio_fixed";
33 regulator-min-microvolt = <1800000>;
34 regulator-max-microvolt = <1800000>;
35 gpio = <&gpio5 12 GPIO_ACTIVE_HIGH>; /* gpio140 WLAN_EN */
36 enable-active-high;
37 startup-delay-us = <70000>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&wlan_pins>;
40 };
41
42 /* HS USB Host PHY on PORT 2 */
43 hsusb2_phy: hsusb2_phy {
44 compatible = "usb-nop-xceiv";
45 reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
46 clocks = <&auxclk1_ck>;
47 clock-names = "main_clk";
48 clock-frequency = <19200000>;
49 };
50
51 /* HS USB Host PHY on PORT 3 */
52 hsusb3_phy: hsusb3_phy {
53 compatible = "usb-nop-xceiv";
54 reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
55 };
56
57 leds {
58 compatible = "gpio-leds";
59 led@1 {
60 label = "omap5:blue:usr1";
61 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
62 linux,default-trigger = "heartbeat";
63 default-state = "off";
64 };
65 };
66
67 tpd12s015: encoder@0 {
68 compatible = "ti,tpd12s015";
69
70 pinctrl-names = "default";
71 pinctrl-0 = <&tpd12s015_pins>;
72
73 /* gpios defined in the board specific dts */
74
75 ports {
76 #address-cells = <1>;
77 #size-cells = <0>;
78
79 port@0 {
80 reg = <0>;
81
82 tpd12s015_in: endpoint@0 {
83 remote-endpoint = <&hdmi_out>;
84 };
85 };
86
87 port@1 {
88 reg = <1>;
89
90 tpd12s015_out: endpoint@0 {
91 remote-endpoint = <&hdmi_connector_in>;
92 };
93 };
94 };
95 };
96
97 hdmi0: connector@0 {
98 compatible = "hdmi-connector";
99 label = "hdmi";
100
101 type = "b";
102
103 port {
104 hdmi_connector_in: endpoint {
105 remote-endpoint = <&tpd12s015_out>;
106 };
107 };
108 };
109
110 sound: sound {
111 compatible = "ti,abe-twl6040";
112 ti,model = "omap5-uevm";
113
114 ti,mclk-freq = <19200000>;
115
116 ti,mcpdm = <&mcpdm>;
117
118 ti,twl6040 = <&twl6040>;
119
120 /* Audio routing */
121 ti,audio-routing =
122 "Headset Stereophone", "HSOL",
123 "Headset Stereophone", "HSOR",
124 "Line Out", "AUXL",
125 "Line Out", "AUXR",
126 "HSMIC", "Headset Mic",
127 "Headset Mic", "Headset Mic Bias",
128 "AFML", "Line In",
129 "AFMR", "Line In";
130 };
131};
132
133&omap5_pmx_core {
134 pinctrl-names = "default";
135 pinctrl-0 = <
136 &usbhost_pins
137 &led_gpio_pins
138 >;
139
140 twl6040_pins: pinmux_twl6040_pins {
141 pinctrl-single,pins = <
142 0x17e (PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
143 >;
144 };
145
146 mcpdm_pins: pinmux_mcpdm_pins {
147 pinctrl-single,pins = <
148 0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
149 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
150 0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
151 0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
152 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
153 >;
154 };
155
156 mcbsp1_pins: pinmux_mcbsp1_pins {
157 pinctrl-single,pins = <
158 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
159 0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
160 0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
161 0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
162 >;
163 };
164
165 mcbsp2_pins: pinmux_mcbsp2_pins {
166 pinctrl-single,pins = <
167 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
168 0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
169 0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
170 0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
171 >;
172 };
173
174 i2c1_pins: pinmux_i2c1_pins {
175 pinctrl-single,pins = <
176 0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
177 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
178 >;
179 };
180
181 mcspi2_pins: pinmux_mcspi2_pins {
182 pinctrl-single,pins = <
183 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
184 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
185 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
186 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */
187 >;
188 };
189
190 mcspi3_pins: pinmux_mcspi3_pins {
191 pinctrl-single,pins = <
192 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */
193 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */
194 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */
195 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */
196 >;
197 };
198
199 mmc3_pins: pinmux_mmc3_pins {
200 pinctrl-single,pins = <
201 OMAP5_IOPAD(0x01a4, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_clk */
202 OMAP5_IOPAD(0x01a6, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_cmd */
203 OMAP5_IOPAD(0x01a8, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data0 */
204 OMAP5_IOPAD(0x01aa, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data1 */
205 OMAP5_IOPAD(0x01ac, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data2 */
206 OMAP5_IOPAD(0x01ae, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data3 */
207 >;
208 };
209
210 wlan_pins: pinmux_wlan_pins {
211 pinctrl-single,pins = <
212 OMAP5_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE6) /* mcspi1_clk.gpio5_140 */
213 >;
214 };
215
216 usbhost_pins: pinmux_usbhost_pins {
217 pinctrl-single,pins = <
218 0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
219 0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
220
221 0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
222 0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
223
224 0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
225 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
226 >;
227 };
228
229 led_gpio_pins: pinmux_led_gpio_pins {
230 pinctrl-single,pins = <
231 0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
232 >;
233 };
234
235 uart1_pins: pinmux_uart1_pins {
236 pinctrl-single,pins = <
237 0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
238 0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
239 0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
240 0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
241 >;
242 };
243
244 uart3_pins: pinmux_uart3_pins {
245 pinctrl-single,pins = <
246 0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
247 0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
248 >;
249 };
250
251 uart5_pins: pinmux_uart5_pins {
252 pinctrl-single,pins = <
253 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
254 0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
255 0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
256 0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
257 >;
258 };
259
260 dss_hdmi_pins: pinmux_dss_hdmi_pins {
261 pinctrl-single,pins = <
262 0x0fc (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
263 0x100 (PIN_INPUT | MUX_MODE0) /* hdmi_ddc_scl.hdmi_ddc_scl */
264 0x102 (PIN_INPUT | MUX_MODE0) /* hdmi_ddc_sda.hdmi_ddc_sda */
265 >;
266 };
267
268 tpd12s015_pins: pinmux_tpd12s015_pins {
269 pinctrl-single,pins = <
270 0x0fe (PIN_INPUT_PULLDOWN | MUX_MODE6) /* hdmi_hpd.gpio7_193 */
271 >;
272 };
273};
274
275&omap5_pmx_wkup {
276 pinctrl-names = "default";
277 pinctrl-0 = <
278 &usbhost_wkup_pins
279 >;
280
281 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
282 pinctrl-single,pins = <
283 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
284 >;
285 };
286
287 wlcore_irq_pin: pinmux_wlcore_irq_pin {
288 pinctrl-single,pins = <
289 OMAP5_IOPAD(0x040, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */
290 >;
291 };
292};
293
294&mmc1 {
295 vmmc-supply = <&ldo9_reg>;
296 bus-width = <4>;
297};
298
299&mmc2 {
300 vmmc-supply = <&vmmcsd_fixed>;
301 bus-width = <8>;
302 ti,non-removable;
303};
304
305&mmc3 {
306 vmmc-supply = <&vmmcsdio_fixed>;
307 mmc-pwrseq = <&mmc3_pwrseq>;
308 bus-width = <4>;
309 non-removable;
310 cap-power-off-card;
311 pinctrl-names = "default";
312 pinctrl-0 = <&mmc3_pins &wlcore_irq_pin>;
313 interrupts-extended = <&gic GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
314 &omap5_pmx_core 0x168>;
315
316 #address-cells = <1>;
317 #size-cells = <0>;
318 wlcore: wlcore@2 {
319 compatible = "ti,wl1271";
320 reg = <2>;
321 interrupt-parent = <&gpio1>;
322 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; /* gpio 14 */
323 ref-clock-frequency = <26000000>;
324 };
325};
326
327&mmc4 {
328 status = "disabled";
329};
330
331&mmc5 {
332 status = "disabled";
333};
334
335&i2c1 {
336 pinctrl-names = "default";
337 pinctrl-0 = <&i2c1_pins>;
338
339 clock-frequency = <400000>;
340
341 palmas: palmas@48 {
342 compatible = "ti,palmas";
343 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
344 reg = <0x48>;
345 interrupt-controller;
346 #interrupt-cells = <2>;
347 ti,system-power-controller;
348
349 extcon_usb3: palmas_usb {
350 compatible = "ti,palmas-usb-vid";
351 ti,enable-vbus-detection;
352 ti,enable-id-detection;
353 ti,wakeup;
354 };
355
356 clk32kgaudio: palmas_clk32k@1 {
357 compatible = "ti,palmas-clk32kgaudio";
358 #clock-cells = <0>;
359 };
360
361 palmas_pmic {
362 compatible = "ti,palmas-pmic";
363 interrupt-parent = <&palmas>;
364 interrupts = <14 IRQ_TYPE_NONE>;
365 interrupt-name = "short-irq";
366
367 ti,ldo6-vibrator;
368
369 regulators {
370 smps123_reg: smps123 {
371 /* VDD_OPP_MPU */
372 regulator-name = "smps123";
373 regulator-min-microvolt = < 600000>;
374 regulator-max-microvolt = <1500000>;
375 regulator-always-on;
376 regulator-boot-on;
377 };
378
379 smps45_reg: smps45 {
380 /* VDD_OPP_MM */
381 regulator-name = "smps45";
382 regulator-min-microvolt = < 600000>;
383 regulator-max-microvolt = <1310000>;
384 regulator-always-on;
385 regulator-boot-on;
386 };
387
388 smps6_reg: smps6 {
389 /* VDD_DDR3 - over VDD_SMPS6 */
390 regulator-name = "smps6";
391 regulator-min-microvolt = <1200000>;
392 regulator-max-microvolt = <1200000>;
393 regulator-always-on;
394 regulator-boot-on;
395 };
396
397 smps7_reg: smps7 {
398 /* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
399 regulator-name = "smps7";
400 regulator-min-microvolt = <1800000>;
401 regulator-max-microvolt = <1800000>;
402 regulator-always-on;
403 regulator-boot-on;
404 };
405
406 smps8_reg: smps8 {
407 /* VDD_OPP_CORE */
408 regulator-name = "smps8";
409 regulator-min-microvolt = < 600000>;
410 regulator-max-microvolt = <1310000>;
411 regulator-always-on;
412 regulator-boot-on;
413 };
414
415 smps9_reg: smps9 {
416 /* VDDA_2v1_AUD over VDD_2v1 */
417 regulator-name = "smps9";
418 regulator-min-microvolt = <2100000>;
419 regulator-max-microvolt = <2100000>;
420 ti,smps-range = <0x80>;
421 };
422
423 smps10_out2_reg: smps10_out2 {
424 /* VBUS_5V_OTG */
425 regulator-name = "smps10_out2";
426 regulator-min-microvolt = <5000000>;
427 regulator-max-microvolt = <5000000>;
428 regulator-always-on;
429 regulator-boot-on;
430 };
431
432 smps10_out1_reg: smps10_out1 {
433 /* VBUS_5V_OTG */
434 regulator-name = "smps10_out1";
435 regulator-min-microvolt = <5000000>;
436 regulator-max-microvolt = <5000000>;
437 };
438
439 ldo1_reg: ldo1 {
440 /* VDDAPHY_CAM: vdda_csiport */
441 regulator-name = "ldo1";
442 regulator-min-microvolt = <1500000>;
443 regulator-max-microvolt = <1800000>;
444 };
445
446 ldo2_reg: ldo2 {
447 /* VCC_2V8_DISP: Does not go anywhere */
448 regulator-name = "ldo2";
449 regulator-min-microvolt = <2800000>;
450 regulator-max-microvolt = <2800000>;
451 /* Unused */
452 status = "disabled";
453 };
454
455 ldo3_reg: ldo3 {
456 /* VDDAPHY_MDM: vdda_lli */
457 regulator-name = "ldo3";
458 regulator-min-microvolt = <1500000>;
459 regulator-max-microvolt = <1500000>;
460 regulator-boot-on;
461 /* Only if Modem is used */
462 status = "disabled";
463 };
464
465 ldo4_reg: ldo4 {
466 /* VDDAPHY_DISP: vdda_dsiport/hdmi */
467 regulator-name = "ldo4";
468 regulator-min-microvolt = <1500000>;
469 regulator-max-microvolt = <1800000>;
470 };
471
472 ldo5_reg: ldo5 {
473 /* VDDA_1V8_PHY: usb/sata/hdmi.. */
474 regulator-name = "ldo5";
475 regulator-min-microvolt = <1800000>;
476 regulator-max-microvolt = <1800000>;
477 regulator-always-on;
478 regulator-boot-on;
479 };
480
481 ldo6_reg: ldo6 {
482 /* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
483 regulator-name = "ldo6";
484 regulator-min-microvolt = <1200000>;
485 regulator-max-microvolt = <1200000>;
486 regulator-always-on;
487 regulator-boot-on;
488 };
489
490 ldo7_reg: ldo7 {
491 /* VDD_VPP: vpp1 */
492 regulator-name = "ldo7";
493 regulator-min-microvolt = <2000000>;
494 regulator-max-microvolt = <2000000>;
495 /* Only for efuse reprograming! */
496 status = "disabled";
497 };
498
499 ldo8_reg: ldo8 {
500 /* VDD_3v0: Does not go anywhere */
501 regulator-name = "ldo8";
502 regulator-min-microvolt = <3000000>;
503 regulator-max-microvolt = <3000000>;
504 regulator-boot-on;
505 /* Unused */
506 status = "disabled";
507 };
508
509 ldo9_reg: ldo9 {
510 /* VCC_DV_SDIO: vdds_sdcard */
511 regulator-name = "ldo9";
512 regulator-min-microvolt = <1800000>;
513 regulator-max-microvolt = <3000000>;
514 regulator-boot-on;
515 };
516
517 ldoln_reg: ldoln {
518 /* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
519 regulator-name = "ldoln";
520 regulator-min-microvolt = <1800000>;
521 regulator-max-microvolt = <1800000>;
522 regulator-always-on;
523 regulator-boot-on;
524 };
525
526 ldousb_reg: ldousb {
527 /* VDDA_3V_USB: VDDA_USBHS33 */
528 regulator-name = "ldousb";
529 regulator-min-microvolt = <3250000>;
530 regulator-max-microvolt = <3250000>;
531 regulator-always-on;
532 regulator-boot-on;
533 };
534
535 regen3_reg: regen3 {
536 /* REGEN3 controls LDO9 supply to card */
537 regulator-name = "regen3";
538 regulator-always-on;
539 regulator-boot-on;
540 };
541 };
542 };
543
544 palmas_power_button: palmas_power_button {
545 compatible = "ti,palmas-pwrbutton";
546 interrupt-parent = <&palmas>;
547 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
548 wakeup-source;
549 };
550 };
551
552 twl6040: twl@4b {
553 compatible = "ti,twl6040";
554 reg = <0x4b>;
555
556 pinctrl-names = "default";
557 pinctrl-0 = <&twl6040_pins>;
558
559 interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */
560 ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */
561
562 vio-supply = <&smps7_reg>;
563 v2v1-supply = <&smps9_reg>;
564 enable-active-high;
565
566 clocks = <&clk32kgaudio>;
567 clock-names = "clk32k";
568 };
569};
570
571&mcpdm {
572 pinctrl-names = "default";
573 pinctrl-0 = <&mcpdm_pins>;
574 status = "okay";
575};
576
577&mcbsp1 {
578 pinctrl-names = "default";
579 pinctrl-0 = <&mcbsp1_pins>;
580 status = "okay";
581};
582
583&mcbsp2 {
584 pinctrl-names = "default";
585 pinctrl-0 = <&mcbsp2_pins>;
586 status = "okay";
587};
588
589&usbhshost {
590 port2-mode = "ehci-hsic";
591 port3-mode = "ehci-hsic";
592};
593
594&usbhsehci {
595 phys = <0 &hsusb2_phy &hsusb3_phy>;
596};
597
598&usb3 {
599 extcon = <&extcon_usb3>;
600 vbus-supply = <&smps10_out1_reg>;
601};
602
603&mcspi1 {
604
605};
606
607&mcspi2 {
608 pinctrl-names = "default";
609 pinctrl-0 = <&mcspi2_pins>;
610};
611
612&mcspi3 {
613 pinctrl-names = "default";
614 pinctrl-0 = <&mcspi3_pins>;
615};
616
617&uart1 {
618 pinctrl-names = "default";
619 pinctrl-0 = <&uart1_pins>;
620};
621
622&uart3 {
623 pinctrl-names = "default";
624 pinctrl-0 = <&uart3_pins>;
625 interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
626 <&omap5_pmx_core 0x19c>;
627};
628
629&uart5 {
630 pinctrl-names = "default";
631 pinctrl-0 = <&uart5_pins>;
632};
633
634&cpu0 {
635 cpu0-supply = <&smps123_reg>;
636};
637
638&dss {
639 status = "ok";
640};
641
642&hdmi {
643 status = "ok";
644
645 /* vdda-supply populated in board specific dts file */
646
647 pinctrl-names = "default";
648 pinctrl-0 = <&dss_hdmi_pins>;
649
650 port {
651 hdmi_out: endpoint {
652 remote-endpoint = <&tpd12s015_in>;
653 };
654 };
655};
diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts b/arch/arm/boot/dts/omap5-cm-t54.dts
index 61ad2ea34720..3774b37be6c8 100644
--- a/arch/arm/boot/dts/omap5-cm-t54.dts
+++ b/arch/arm/boot/dts/omap5-cm-t54.dts
@@ -344,7 +344,7 @@
344 344
345 interrupt-parent = <&gpio1>; 345 interrupt-parent = <&gpio1>;
346 interrupts = <15 0>; /* gpio1_wk15 */ 346 interrupts = <15 0>; /* gpio1_wk15 */
347 pendown-gpio = <&gpio1 15 0>; 347 pendown-gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
348 348
349 349
350 ti,x-min = /bits/ 16 <0x0>; 350 ti,x-min = /bits/ 16 <0x0>;
diff --git a/arch/arm/boot/dts/omap5-igep0050.dts b/arch/arm/boot/dts/omap5-igep0050.dts
new file mode 100644
index 000000000000..46ecb1dd3b5c
--- /dev/null
+++ b/arch/arm/boot/dts/omap5-igep0050.dts
@@ -0,0 +1,54 @@
1/*
2 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "omap5-board-common.dtsi"
11
12/ {
13 model = "IGEPv5";
14 compatible = "isee,omap5-igep0050", "ti,omap5";
15
16 memory {
17 device_type = "memory";
18 reg = <0x80000000 0x7f000000>; /* 2032 MB */
19 };
20};
21
22&hdmi {
23 vdda-supply = <&ldo7_reg>;
24};
25
26&i2c4 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&i2c4_pins>;
29
30 tca6416: tca6416@21 {
31 compatible = "ti,tca6416";
32 reg = <0x21>;
33 gpio-controller;
34 #gpio-cells = <2>;
35 };
36};
37
38&omap5_pmx_core {
39 i2c4_pins: pinmux_i2c4_pins {
40 pinctrl-single,pins = <
41 OMAP5_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0) /* i2c4_scl */
42 OMAP5_IOPAD(0x0fa, PIN_INPUT | MUX_MODE0) /* i2c4_sda */
43 >;
44 };
45};
46
47&tpd12s015 {
48 gpios = <&tca6416 11 0>, /* TCA6416 P01, CT_CP_HDP */
49 <&tca6416 12 0>, /* TCA6416 P00, LS_OE*/
50 <&gpio7 1 0>, /* 193, HPD */
51 <&gpio7 2 0>, /* 194, SCL */
52 <&gpio7 3 0>; /* 195, SDA */
53};
54
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 3cc8f357d5b8..05b1c1ebded8 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -7,9 +7,7 @@
7 */ 7 */
8/dts-v1/; 8/dts-v1/;
9 9
10#include "omap5.dtsi" 10#include "omap5-board-common.dtsi"
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13 11
14/ { 12/ {
15 model = "TI OMAP5 uEVM board"; 13 model = "TI OMAP5 uEVM board";
@@ -19,523 +17,10 @@
19 device_type = "memory"; 17 device_type = "memory";
20 reg = <0x80000000 0x7F000000>; /* 2032 MB */ 18 reg = <0x80000000 0x7F000000>; /* 2032 MB */
21 }; 19 };
22
23 aliases {
24 display0 = &hdmi0;
25 };
26
27 vmmcsd_fixed: fixedregulator-mmcsd {
28 compatible = "regulator-fixed";
29 regulator-name = "vmmcsd_fixed";
30 regulator-min-microvolt = <3000000>;
31 regulator-max-microvolt = <3000000>;
32 };
33
34 /* HS USB Host PHY on PORT 2 */
35 hsusb2_phy: hsusb2_phy {
36 compatible = "usb-nop-xceiv";
37 reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
38 clocks = <&auxclk1_ck>;
39 clock-names = "main_clk";
40 clock-frequency = <19200000>;
41 };
42
43 /* HS USB Host PHY on PORT 3 */
44 hsusb3_phy: hsusb3_phy {
45 compatible = "usb-nop-xceiv";
46 reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
47 };
48
49 leds {
50 compatible = "gpio-leds";
51 led@1 {
52 label = "omap5:blue:usr1";
53 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
54 linux,default-trigger = "heartbeat";
55 default-state = "off";
56 };
57 };
58
59 tpd12s015: encoder@0 {
60 compatible = "ti,tpd12s015";
61
62 pinctrl-names = "default";
63 pinctrl-0 = <&tpd12s015_pins>;
64
65 gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>, /* TCA6424A P01, CT CP HPD */
66 <&gpio9 1 GPIO_ACTIVE_HIGH>, /* TCA6424A P00, LS OE */
67 <&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */
68
69 ports {
70 #address-cells = <1>;
71 #size-cells = <0>;
72
73 port@0 {
74 reg = <0>;
75
76 tpd12s015_in: endpoint@0 {
77 remote-endpoint = <&hdmi_out>;
78 };
79 };
80
81 port@1 {
82 reg = <1>;
83
84 tpd12s015_out: endpoint@0 {
85 remote-endpoint = <&hdmi_connector_in>;
86 };
87 };
88 };
89 };
90
91 hdmi0: connector@0 {
92 compatible = "hdmi-connector";
93 label = "hdmi";
94
95 type = "b";
96
97 port {
98 hdmi_connector_in: endpoint {
99 remote-endpoint = <&tpd12s015_out>;
100 };
101 };
102 };
103
104 sound: sound {
105 compatible = "ti,abe-twl6040";
106 ti,model = "omap5-uevm";
107
108 ti,mclk-freq = <19200000>;
109
110 ti,mcpdm = <&mcpdm>;
111
112 ti,twl6040 = <&twl6040>;
113
114 /* Audio routing */
115 ti,audio-routing =
116 "Headset Stereophone", "HSOL",
117 "Headset Stereophone", "HSOR",
118 "Line Out", "AUXL",
119 "Line Out", "AUXR",
120 "HSMIC", "Headset Mic",
121 "Headset Mic", "Headset Mic Bias",
122 "AFML", "Line In",
123 "AFMR", "Line In";
124 };
125};
126
127&omap5_pmx_core {
128 pinctrl-names = "default";
129 pinctrl-0 = <
130 &usbhost_pins
131 &led_gpio_pins
132 >;
133
134 twl6040_pins: pinmux_twl6040_pins {
135 pinctrl-single,pins = <
136 0x17e (PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
137 >;
138 };
139
140 mcpdm_pins: pinmux_mcpdm_pins {
141 pinctrl-single,pins = <
142 0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
143 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
144 0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
145 0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
146 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
147 >;
148 };
149
150 mcbsp1_pins: pinmux_mcbsp1_pins {
151 pinctrl-single,pins = <
152 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
153 0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
154 0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
155 0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
156 >;
157 };
158
159 mcbsp2_pins: pinmux_mcbsp2_pins {
160 pinctrl-single,pins = <
161 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
162 0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
163 0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
164 0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
165 >;
166 };
167
168 i2c1_pins: pinmux_i2c1_pins {
169 pinctrl-single,pins = <
170 0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
171 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
172 >;
173 };
174
175 i2c5_pins: pinmux_i2c5_pins {
176 pinctrl-single,pins = <
177 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
178 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
179 >;
180 };
181
182 mcspi2_pins: pinmux_mcspi2_pins {
183 pinctrl-single,pins = <
184 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
185 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
186 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
187 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */
188 >;
189 };
190
191 mcspi3_pins: pinmux_mcspi3_pins {
192 pinctrl-single,pins = <
193 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */
194 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */
195 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */
196 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */
197 >;
198 };
199
200 mcspi4_pins: pinmux_mcspi4_pins {
201 pinctrl-single,pins = <
202 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi4_clk */
203 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi4_simo */
204 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi4_somi */
205 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi4_cs0 */
206 >;
207 };
208
209 usbhost_pins: pinmux_usbhost_pins {
210 pinctrl-single,pins = <
211 0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
212 0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
213
214 0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
215 0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
216
217 0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
218 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
219 >;
220 };
221
222 led_gpio_pins: pinmux_led_gpio_pins {
223 pinctrl-single,pins = <
224 0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
225 >;
226 };
227
228 uart1_pins: pinmux_uart1_pins {
229 pinctrl-single,pins = <
230 0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
231 0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
232 0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
233 0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
234 >;
235 };
236
237 uart3_pins: pinmux_uart3_pins {
238 pinctrl-single,pins = <
239 0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
240 0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
241 >;
242 };
243
244 uart5_pins: pinmux_uart5_pins {
245 pinctrl-single,pins = <
246 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
247 0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
248 0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
249 0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
250 >;
251 };
252
253 dss_hdmi_pins: pinmux_dss_hdmi_pins {
254 pinctrl-single,pins = <
255 0x0fc (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
256 0x100 (PIN_INPUT | MUX_MODE0) /* hdmi_ddc_scl.hdmi_ddc_scl */
257 0x102 (PIN_INPUT | MUX_MODE0) /* hdmi_ddc_sda.hdmi_ddc_sda */
258 >;
259 };
260
261 tpd12s015_pins: pinmux_tpd12s015_pins {
262 pinctrl-single,pins = <
263 0x0fe (PIN_INPUT_PULLDOWN | MUX_MODE6) /* hdmi_hpd.gpio7_193 */
264 >;
265 };
266};
267
268&omap5_pmx_wkup {
269 pinctrl-names = "default";
270 pinctrl-0 = <
271 &usbhost_wkup_pins
272 >;
273
274 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
275 pinctrl-single,pins = <
276 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
277 >;
278 };
279};
280
281&mmc1 {
282 vmmc-supply = <&ldo9_reg>;
283 bus-width = <4>;
284};
285
286&mmc2 {
287 vmmc-supply = <&vmmcsd_fixed>;
288 bus-width = <8>;
289 ti,non-removable;
290};
291
292&mmc3 {
293 bus-width = <4>;
294 ti,non-removable;
295};
296
297&mmc4 {
298 status = "disabled";
299}; 20};
300 21
301&mmc5 { 22&hdmi {
302 status = "disabled"; 23 vdda-supply = <&ldo4_reg>;
303};
304
305&i2c1 {
306 pinctrl-names = "default";
307 pinctrl-0 = <&i2c1_pins>;
308
309 clock-frequency = <400000>;
310
311 palmas: palmas@48 {
312 compatible = "ti,palmas";
313 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
314 reg = <0x48>;
315 interrupt-controller;
316 #interrupt-cells = <2>;
317 ti,system-power-controller;
318
319 extcon_usb3: palmas_usb {
320 compatible = "ti,palmas-usb-vid";
321 ti,enable-vbus-detection;
322 ti,enable-id-detection;
323 ti,wakeup;
324 };
325
326 clk32kgaudio: palmas_clk32k@1 {
327 compatible = "ti,palmas-clk32kgaudio";
328 #clock-cells = <0>;
329 };
330
331 palmas_pmic {
332 compatible = "ti,palmas-pmic";
333 interrupt-parent = <&palmas>;
334 interrupts = <14 IRQ_TYPE_NONE>;
335 interrupt-name = "short-irq";
336
337 ti,ldo6-vibrator;
338
339 regulators {
340 smps123_reg: smps123 {
341 /* VDD_OPP_MPU */
342 regulator-name = "smps123";
343 regulator-min-microvolt = < 600000>;
344 regulator-max-microvolt = <1500000>;
345 regulator-always-on;
346 regulator-boot-on;
347 };
348
349 smps45_reg: smps45 {
350 /* VDD_OPP_MM */
351 regulator-name = "smps45";
352 regulator-min-microvolt = < 600000>;
353 regulator-max-microvolt = <1310000>;
354 regulator-always-on;
355 regulator-boot-on;
356 };
357
358 smps6_reg: smps6 {
359 /* VDD_DDR3 - over VDD_SMPS6 */
360 regulator-name = "smps6";
361 regulator-min-microvolt = <1200000>;
362 regulator-max-microvolt = <1200000>;
363 regulator-always-on;
364 regulator-boot-on;
365 };
366
367 smps7_reg: smps7 {
368 /* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
369 regulator-name = "smps7";
370 regulator-min-microvolt = <1800000>;
371 regulator-max-microvolt = <1800000>;
372 regulator-always-on;
373 regulator-boot-on;
374 };
375
376 smps8_reg: smps8 {
377 /* VDD_OPP_CORE */
378 regulator-name = "smps8";
379 regulator-min-microvolt = < 600000>;
380 regulator-max-microvolt = <1310000>;
381 regulator-always-on;
382 regulator-boot-on;
383 };
384
385 smps9_reg: smps9 {
386 /* VDDA_2v1_AUD over VDD_2v1 */
387 regulator-name = "smps9";
388 regulator-min-microvolt = <2100000>;
389 regulator-max-microvolt = <2100000>;
390 ti,smps-range = <0x80>;
391 };
392
393 smps10_out2_reg: smps10_out2 {
394 /* VBUS_5V_OTG */
395 regulator-name = "smps10_out2";
396 regulator-min-microvolt = <5000000>;
397 regulator-max-microvolt = <5000000>;
398 regulator-always-on;
399 regulator-boot-on;
400 };
401
402 smps10_out1_reg: smps10_out1 {
403 /* VBUS_5V_OTG */
404 regulator-name = "smps10_out1";
405 regulator-min-microvolt = <5000000>;
406 regulator-max-microvolt = <5000000>;
407 };
408
409 ldo1_reg: ldo1 {
410 /* VDDAPHY_CAM: vdda_csiport */
411 regulator-name = "ldo1";
412 regulator-min-microvolt = <1500000>;
413 regulator-max-microvolt = <1800000>;
414 };
415
416 ldo2_reg: ldo2 {
417 /* VCC_2V8_DISP: Does not go anywhere */
418 regulator-name = "ldo2";
419 regulator-min-microvolt = <2800000>;
420 regulator-max-microvolt = <2800000>;
421 /* Unused */
422 status = "disabled";
423 };
424
425 ldo3_reg: ldo3 {
426 /* VDDAPHY_MDM: vdda_lli */
427 regulator-name = "ldo3";
428 regulator-min-microvolt = <1500000>;
429 regulator-max-microvolt = <1500000>;
430 regulator-boot-on;
431 /* Only if Modem is used */
432 status = "disabled";
433 };
434
435 ldo4_reg: ldo4 {
436 /* VDDAPHY_DISP: vdda_dsiport/hdmi */
437 regulator-name = "ldo4";
438 regulator-min-microvolt = <1500000>;
439 regulator-max-microvolt = <1800000>;
440 };
441
442 ldo5_reg: ldo5 {
443 /* VDDA_1V8_PHY: usb/sata/hdmi.. */
444 regulator-name = "ldo5";
445 regulator-min-microvolt = <1800000>;
446 regulator-max-microvolt = <1800000>;
447 regulator-always-on;
448 regulator-boot-on;
449 };
450
451 ldo6_reg: ldo6 {
452 /* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
453 regulator-name = "ldo6";
454 regulator-min-microvolt = <1200000>;
455 regulator-max-microvolt = <1200000>;
456 regulator-always-on;
457 regulator-boot-on;
458 };
459
460 ldo7_reg: ldo7 {
461 /* VDD_VPP: vpp1 */
462 regulator-name = "ldo7";
463 regulator-min-microvolt = <2000000>;
464 regulator-max-microvolt = <2000000>;
465 /* Only for efuse reprograming! */
466 status = "disabled";
467 };
468
469 ldo8_reg: ldo8 {
470 /* VDD_3v0: Does not go anywhere */
471 regulator-name = "ldo8";
472 regulator-min-microvolt = <3000000>;
473 regulator-max-microvolt = <3000000>;
474 regulator-boot-on;
475 /* Unused */
476 status = "disabled";
477 };
478
479 ldo9_reg: ldo9 {
480 /* VCC_DV_SDIO: vdds_sdcard */
481 regulator-name = "ldo9";
482 regulator-min-microvolt = <1800000>;
483 regulator-max-microvolt = <3000000>;
484 regulator-boot-on;
485 };
486
487 ldoln_reg: ldoln {
488 /* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
489 regulator-name = "ldoln";
490 regulator-min-microvolt = <1800000>;
491 regulator-max-microvolt = <1800000>;
492 regulator-always-on;
493 regulator-boot-on;
494 };
495
496 ldousb_reg: ldousb {
497 /* VDDA_3V_USB: VDDA_USBHS33 */
498 regulator-name = "ldousb";
499 regulator-min-microvolt = <3250000>;
500 regulator-max-microvolt = <3250000>;
501 regulator-always-on;
502 regulator-boot-on;
503 };
504
505 regen3_reg: regen3 {
506 /* REGEN3 controls LDO9 supply to card */
507 regulator-name = "regen3";
508 regulator-always-on;
509 regulator-boot-on;
510 };
511 };
512 };
513
514 palmas_power_button: palmas_power_button {
515 compatible = "ti,palmas-pwrbutton";
516 interrupt-parent = <&palmas>;
517 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
518 wakeup-source;
519 };
520 };
521
522 twl6040: twl@4b {
523 compatible = "ti,twl6040";
524 reg = <0x4b>;
525
526 pinctrl-names = "default";
527 pinctrl-0 = <&twl6040_pins>;
528
529 interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */
530 ti,audpwron-gpio = <&gpio5 13 0>; /* gpio line 141 */
531
532 vio-supply = <&smps7_reg>;
533 v2v1-supply = <&smps9_reg>;
534 enable-active-high;
535
536 clocks = <&clk32kgaudio>;
537 clock-names = "clk32k";
538 };
539}; 24};
540 25
541&i2c5 { 26&i2c5 {
@@ -552,92 +37,17 @@
552 }; 37 };
553}; 38};
554 39
555&mcpdm { 40&omap5_pmx_core {
556 pinctrl-names = "default"; 41 i2c5_pins: pinmux_i2c5_pins {
557 pinctrl-0 = <&mcpdm_pins>; 42 pinctrl-single,pins = <
558 status = "okay"; 43 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
559}; 44 0x188 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
560 45 >;
561&mcbsp1 { 46 };
562 pinctrl-names = "default";
563 pinctrl-0 = <&mcbsp1_pins>;
564 status = "okay";
565};
566
567&mcbsp2 {
568 pinctrl-names = "default";
569 pinctrl-0 = <&mcbsp2_pins>;
570 status = "okay";
571};
572
573&usbhshost {
574 port2-mode = "ehci-hsic";
575 port3-mode = "ehci-hsic";
576};
577
578&usbhsehci {
579 phys = <0 &hsusb2_phy &hsusb3_phy>;
580};
581
582&usb3 {
583 extcon = <&extcon_usb3>;
584 vbus-supply = <&smps10_out1_reg>;
585};
586
587&mcspi1 {
588
589};
590
591&mcspi2 {
592 pinctrl-names = "default";
593 pinctrl-0 = <&mcspi2_pins>;
594};
595
596&mcspi3 {
597 pinctrl-names = "default";
598 pinctrl-0 = <&mcspi3_pins>;
599};
600
601&mcspi4 {
602 pinctrl-names = "default";
603 pinctrl-0 = <&mcspi4_pins>;
604};
605
606&uart1 {
607 pinctrl-names = "default";
608 pinctrl-0 = <&uart1_pins>;
609};
610
611&uart3 {
612 pinctrl-names = "default";
613 pinctrl-0 = <&uart3_pins>;
614 interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
615 <&omap5_pmx_core 0x19c>;
616};
617
618&uart5 {
619 pinctrl-names = "default";
620 pinctrl-0 = <&uart5_pins>;
621};
622
623&cpu0 {
624 cpu0-supply = <&smps123_reg>;
625};
626
627&dss {
628 status = "ok";
629}; 47};
630 48
631&hdmi { 49&tpd12s015 {
632 status = "ok"; 50 gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>, /* TCA6424A P01, CT CP HPD */
633 vdda-supply = <&ldo4_reg>; 51 <&gpio9 1 GPIO_ACTIVE_HIGH>, /* TCA6424A P00, LS OE */
634 52 <&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */
635 pinctrl-names = "default";
636 pinctrl-0 = <&dss_hdmi_pins>;
637
638 port {
639 hdmi_out: endpoint {
640 remote-endpoint = <&tpd12s015_in>;
641 };
642 };
643}; 53};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 4205a8ac9ddb..4c04389dab32 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -185,9 +185,10 @@
185 reg = <0x5a0 0xec>; 185 reg = <0x5a0 0xec>;
186 #address-cells = <1>; 186 #address-cells = <1>;
187 #size-cells = <1>; 187 #size-cells = <1>;
188 ranges = <0 0x5a0 0xec>;
188 189
189 pbias_regulator: pbias_regulator { 190 pbias_regulator: pbias_regulator {
190 compatible = "ti,pbias-omap"; 191 compatible = "ti,pbias-omap5", "ti,pbias-omap";
191 reg = <0x60 0x4>; 192 reg = <0x60 0x4>;
192 syscon = <&omap5_padconf_global>; 193 syscon = <&omap5_padconf_global>;
193 pbias_mmc_reg: pbias_mmc_omap5 { 194 pbias_mmc_reg: pbias_mmc_omap5 {
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index 75cd01bd6024..e1b6d2a2ac49 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -212,6 +212,16 @@
212 status = "disabled"; 212 status = "disabled";
213 }; 213 };
214 214
215 cesa: crypto@90000 {
216 compatible = "marvell,orion-crypto";
217 reg = <0x90000 0x10000>;
218 reg-names = "regs";
219 interrupts = <28>;
220 marvell,crypto-srams = <&crypto_sram>;
221 marvell,crypto-sram-size = <0x800>;
222 status = "okay";
223 };
224
215 ehci1: ehci@a0000 { 225 ehci1: ehci@a0000 {
216 compatible = "marvell,orion-ehci"; 226 compatible = "marvell,orion-ehci";
217 reg = <0xa0000 0x1000>; 227 reg = <0xa0000 0x1000>;
@@ -220,13 +230,11 @@
220 }; 230 };
221 }; 231 };
222 232
223 cesa: crypto@90000 { 233 crypto_sram: sa-sram {
224 compatible = "marvell,orion-crypto"; 234 compatible = "mmio-sram";
225 reg = <MBUS_ID(0xf0, 0x01) 0x90000 0x10000>, 235 reg = <MBUS_ID(0x09, 0x00) 0x0 0x800>;
226 <MBUS_ID(0x09, 0x00) 0x0 0x800>; 236 #address-cells = <1>;
227 reg-names = "regs", "sram"; 237 #size-cells = <1>;
228 interrupts = <28>;
229 status = "okay";
230 }; 238 };
231 }; 239 };
232}; 240};
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 47c0282bdfca..03784f1366e5 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -1,4 +1,6 @@
1#include "qcom-apq8064-v2.0.dtsi" 1#include "qcom-apq8064-v2.0.dtsi"
2#include <dt-bindings/gpio/gpio.h>
3#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
2 4
3/ { 5/ {
4 model = "CompuLab CM-QS600"; 6 model = "CompuLab CM-QS600";
@@ -12,12 +14,27 @@
12 stdout-path = "serial0:115200n8"; 14 stdout-path = "serial0:115200n8";
13 }; 15 };
14 16
17 pwrseq {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 ranges;
21 compatible = "simple-bus";
22
23 sdcc4_pwrseq: sdcc4_pwrseq {
24 pinctrl-names = "default";
25 pinctrl-0 = <&wlan_default_gpios>;
26 compatible = "mmc-pwrseq-simple";
27 reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>;
28 };
29 };
30
15 soc { 31 soc {
16 pinctrl@800000 { 32 pinctrl@800000 {
17 i2c1_pins: i2c1 { 33 card_detect: card_detect {
18 mux { 34 mux {
19 pins = "gpio20", "gpio21"; 35 pins = "gpio26";
20 function = "gsbi1"; 36 function = "gpio";
37 bias-disable;
21 }; 38 };
22 }; 39 };
23 }; 40 };
@@ -96,10 +113,8 @@
96 i2c@12460000 { 113 i2c@12460000 {
97 status = "okay"; 114 status = "okay";
98 clock-frequency = <200000>; 115 clock-frequency = <200000>;
99 pinctrl-0 = <&i2c1_pins>;
100 pinctrl-names = "default";
101 116
102 eeprom: eeprom@50 { 117 eeprom@50 {
103 compatible = "24c02"; 118 compatible = "24c02";
104 reg = <0x50>; 119 reg = <0x50>;
105 pagesize = <32>; 120 pagesize = <32>;
@@ -112,6 +127,8 @@
112 qcom,mode = <GSBI_PROT_I2C_UART>; 127 qcom,mode = <GSBI_PROT_I2C_UART>;
113 serial@16640000 { 128 serial@16640000 {
114 status = "ok"; 129 status = "ok";
130 pinctrl-names = "default";
131 pinctrl-0 = <&gsbi7_uart_2pins>;
115 }; 132 };
116 }; 133 };
117 134
@@ -163,6 +180,21 @@
163 regulator-always-on; 180 regulator-always-on;
164 }; 181 };
165 182
183 qcom,ssbi@500000 {
184 pmic@0 {
185 gpio@150 {
186 wlan_default_gpios: wlan-gpios {
187 pios {
188 pins = "gpio43";
189 function = "normal";
190 bias-disable;
191 power-source = <PM8921_GPIO_S4>;
192 };
193 };
194 };
195 };
196 };
197
166 amba { 198 amba {
167 /* eMMC */ 199 /* eMMC */
168 sdcc1: sdcc@12400000 { 200 sdcc1: sdcc@12400000 {
@@ -175,12 +207,16 @@
175 sdcc3: sdcc@12180000 { 207 sdcc3: sdcc@12180000 {
176 status = "okay"; 208 status = "okay";
177 vmmc-supply = <&v3p3_fixed>; 209 vmmc-supply = <&v3p3_fixed>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&card_detect>;
212 cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>;
178 }; 213 };
179 /* WLAN */ 214 /* WLAN */
180 sdcc4: sdcc@121c0000 { 215 sdcc4: sdcc@121c0000 {
181 status = "okay"; 216 status = "okay";
182 vmmc-supply = <&v3p3_fixed>; 217 vmmc-supply = <&v3p3_fixed>;
183 vqmmc-supply = <&v3p3_fixed>; 218 vqmmc-supply = <&v3p3_fixed>;
219 mmc-pwrseq = <&sdcc4_pwrseq>;
184 }; 220 };
185 }; 221 };
186 }; 222 };
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index f3100da082b2..11ac608b6d50 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -1,5 +1,6 @@
1#include "qcom-apq8064-v2.0.dtsi" 1#include "qcom-apq8064-v2.0.dtsi"
2#include <dt-bindings/gpio/gpio.h> 2#include <dt-bindings/gpio/gpio.h>
3#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
3 4
4/ { 5/ {
5 model = "Qualcomm APQ8064/IFC6410"; 6 model = "Qualcomm APQ8064/IFC6410";
@@ -14,6 +15,29 @@
14 stdout-path = "serial0:115200n8"; 15 stdout-path = "serial0:115200n8";
15 }; 16 };
16 17
18 pwrseq {
19 compatible = "simple-bus";
20
21 sdcc4_pwrseq: sdcc4_pwrseq {
22 pinctrl-names = "default";
23 pinctrl-0 = <&wlan_default_gpios>;
24 compatible = "mmc-pwrseq-simple";
25 reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>;
26 };
27 };
28
29 leds {
30 compatible = "gpio-leds";
31 pinctrl-names = "default";
32 pinctrl-0 = <&notify_led>;
33
34 led@1 {
35 label = "apq8064:green:user1";
36 gpios = <&pm8921_gpio 18 GPIO_ACTIVE_HIGH>;
37 default-state = "on";
38 };
39 };
40
17 soc { 41 soc {
18 pinctrl@800000 { 42 pinctrl@800000 {
19 card_detect: card_detect { 43 card_detect: card_detect {
@@ -119,8 +143,6 @@
119 qcom,mode = <GSBI_PROT_I2C>; 143 qcom,mode = <GSBI_PROT_I2C>;
120 i2c3: i2c@16280000 { 144 i2c3: i2c@16280000 {
121 status = "okay"; 145 status = "okay";
122 pinctrl-0 = <&i2c3_pins>;
123 pinctrl-names = "default";
124 }; 146 };
125 }; 147 };
126 148
@@ -131,10 +153,8 @@
131 i2c@12460000 { 153 i2c@12460000 {
132 status = "okay"; 154 status = "okay";
133 clock-frequency = <200000>; 155 clock-frequency = <200000>;
134 pinctrl-0 = <&i2c1_pins>;
135 pinctrl-names = "default";
136 156
137 eeprom: eeprom@52 { 157 eeprom@52 {
138 compatible = "atmel,24c128"; 158 compatible = "atmel,24c128";
139 reg = <0x52>; 159 reg = <0x52>;
140 pagesize = <32>; 160 pagesize = <32>;
@@ -148,9 +168,8 @@
148 168
149 serial@16540000 { 169 serial@16540000 {
150 status = "ok"; 170 status = "ok";
151
152 pinctrl-names = "default"; 171 pinctrl-names = "default";
153 pinctrl-0 = <&uart_pins>; 172 pinctrl-0 = <&gsbi6_uart_4pins>;
154 }; 173 };
155 }; 174 };
156 175
@@ -159,6 +178,8 @@
159 qcom,mode = <GSBI_PROT_I2C_UART>; 178 qcom,mode = <GSBI_PROT_I2C_UART>;
160 serial@16640000 { 179 serial@16640000 {
161 status = "ok"; 180 status = "ok";
181 pinctrl-names = "default";
182 pinctrl-0 = <&gsbi7_uart_2pins>;
162 }; 183 };
163 }; 184 };
164 185
@@ -210,6 +231,30 @@
210 status = "okay"; 231 status = "okay";
211 }; 232 };
212 233
234 qcom,ssbi@500000 {
235 pmic@0 {
236 gpio@150 {
237 wlan_default_gpios: wlan-gpios {
238 pios {
239 pins = "gpio43";
240 function = "normal";
241 bias-disable;
242 power-source = <PM8921_GPIO_S4>;
243 };
244 };
245
246 notify_led: nled {
247 pios {
248 pins = "gpio18";
249 function = "normal";
250 bias-disable;
251 power-source = <PM8921_GPIO_S4>;
252 };
253 };
254 };
255 };
256 };
257
213 amba { 258 amba {
214 /* eMMC */ 259 /* eMMC */
215 sdcc1: sdcc@12400000 { 260 sdcc1: sdcc@12400000 {
@@ -231,6 +276,7 @@
231 status = "okay"; 276 status = "okay";
232 vmmc-supply = <&ext_3p3v>; 277 vmmc-supply = <&ext_3p3v>;
233 vqmmc-supply = <&pm8921_lvs1>; 278 vqmmc-supply = <&pm8921_lvs1>;
279 mmc-pwrseq = <&sdcc4_pwrseq>;
234 }; 280 };
235 }; 281 };
236 }; 282 };
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index d2e94d647c27..a4c1762b53ea 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -127,12 +127,33 @@
127 }; 127 };
128 }; 128 };
129 129
130 uart_pins: uart_pins { 130 gsbi6_uart_2pins: gsbi6_uart_2pins {
131 mux {
132 pins = "gpio14", "gpio15";
133 function = "gsbi6";
134 };
135 };
136
137 gsbi6_uart_4pins: gsbi6_uart_4pins {
131 mux { 138 mux {
132 pins = "gpio14", "gpio15", "gpio16", "gpio17"; 139 pins = "gpio14", "gpio15", "gpio16", "gpio17";
133 function = "gsbi6"; 140 function = "gsbi6";
134 }; 141 };
135 }; 142 };
143
144 gsbi7_uart_2pins: gsbi7_uart_2pins {
145 mux {
146 pins = "gpio82", "gpio83";
147 function = "gsbi7";
148 };
149 };
150
151 gsbi7_uart_4pins: gsbi7_uart_4pins {
152 mux {
153 pins = "gpio82", "gpio83", "gpio84", "gpio85";
154 function = "gsbi7";
155 };
156 };
136 }; 157 };
137 158
138 intc: interrupt-controller@2000000 { 159 intc: interrupt-controller@2000000 {
@@ -213,6 +234,8 @@
213 234
214 i2c1: i2c@12460000 { 235 i2c1: i2c@12460000 {
215 compatible = "qcom,i2c-qup-v1.1.1"; 236 compatible = "qcom,i2c-qup-v1.1.1";
237 pinctrl-0 = <&i2c1_pins>;
238 pinctrl-names = "default";
216 reg = <0x12460000 0x1000>; 239 reg = <0x12460000 0x1000>;
217 interrupts = <0 194 IRQ_TYPE_NONE>; 240 interrupts = <0 194 IRQ_TYPE_NONE>;
218 clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>; 241 clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
@@ -258,6 +281,8 @@
258 ranges; 281 ranges;
259 i2c3: i2c@16280000 { 282 i2c3: i2c@16280000 {
260 compatible = "qcom,i2c-qup-v1.1.1"; 283 compatible = "qcom,i2c-qup-v1.1.1";
284 pinctrl-0 = <&i2c3_pins>;
285 pinctrl-names = "default";
261 reg = <0x16280000 0x1000>; 286 reg = <0x16280000 0x1000>;
262 interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>; 287 interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
263 clocks = <&gcc GSBI3_QUP_CLK>, 288 clocks = <&gcc GSBI3_QUP_CLK>,
@@ -361,6 +386,22 @@
361 <136 1>, <137 1>, <138 1>, <139 1>; 386 <136 1>, <137 1>, <138 1>, <139 1>;
362 }; 387 };
363 388
389 rtc@11d {
390 compatible = "qcom,pm8921-rtc";
391 interrupt-parent = <&pmicintc>;
392 interrupts = <39 1>;
393 reg = <0x11d>;
394 allow-set-time;
395 };
396
397 pwrkey@1c {
398 compatible = "qcom,pm8921-pwrkey";
399 reg = <0x1c>;
400 interrupt-parent = <&pmicintc>;
401 interrupts = <50 1>, <51 1>;
402 debounce = <15625>;
403 pull-up;
404 };
364 }; 405 };
365 }; 406 };
366 407
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 0554fbd72c40..fcffecae3e67 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -221,6 +221,7 @@
221 compatible = "qcom,gcc-apq8084"; 221 compatible = "qcom,gcc-apq8084";
222 #clock-cells = <1>; 222 #clock-cells = <1>;
223 #reset-cells = <1>; 223 #reset-cells = <1>;
224 #power-domain-cells = <1>;
224 reg = <0xfc400000 0x4000>; 225 reg = <0xfc400000 0x4000>;
225 }; 226 };
226 227
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index ab8e57250468..57e6fcab4089 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -114,6 +114,11 @@
114 <0xf9002000 0x1000>; 114 <0xf9002000 0x1000>;
115 }; 115 };
116 116
117 apcs: syscon@f9011000 {
118 compatible = "syscon";
119 reg = <0xf9011000 0x1000>;
120 };
121
117 timer@f9020000 { 122 timer@f9020000 {
118 #address-cells = <1>; 123 #address-cells = <1>;
119 #size-cells = <1>; 124 #size-cells = <1>;
@@ -228,6 +233,7 @@
228 compatible = "qcom,gcc-msm8974"; 233 compatible = "qcom,gcc-msm8974";
229 #clock-cells = <1>; 234 #clock-cells = <1>;
230 #reset-cells = <1>; 235 #reset-cells = <1>;
236 #power-domain-cells = <1>;
231 reg = <0xfc400000 0x4000>; 237 reg = <0xfc400000 0x4000>;
232 }; 238 };
233 239
@@ -240,6 +246,7 @@
240 compatible = "qcom,mmcc-msm8974"; 246 compatible = "qcom,mmcc-msm8974";
241 #clock-cells = <1>; 247 #clock-cells = <1>;
242 #reset-cells = <1>; 248 #reset-cells = <1>;
249 #power-domain-cells = <1>;
243 reg = <0xfd8c0000 0x6000>; 250 reg = <0xfd8c0000 0x6000>;
244 }; 251 };
245 252
@@ -308,7 +315,7 @@
308 }; 315 };
309 316
310 blsp_i2c11: i2c@f9967000 { 317 blsp_i2c11: i2c@f9967000 {
311 status = "disable"; 318 status = "disabled";
312 compatible = "qcom,i2c-qup-v2.1.1"; 319 compatible = "qcom,i2c-qup-v2.1.1";
313 reg = <0xf9967000 0x1000>; 320 reg = <0xf9967000 0x1000>;
314 interrupts = <0 105 IRQ_TYPE_NONE>; 321 interrupts = <0 105 IRQ_TYPE_NONE>;
@@ -334,4 +341,73 @@
334 #interrupt-cells = <4>; 341 #interrupt-cells = <4>;
335 }; 342 };
336 }; 343 };
344
345 smd {
346 compatible = "qcom,smd";
347
348 rpm {
349 interrupts = <0 168 1>;
350 qcom,ipc = <&apcs 8 0>;
351 qcom,smd-edge = <15>;
352
353 rpm_requests {
354 compatible = "qcom,rpm-msm8974";
355 qcom,smd-channels = "rpm_requests";
356
357 pm8841-regulators {
358 compatible = "qcom,rpm-pm8841-regulators";
359
360 pm8841_s1: s1 {};
361 pm8841_s2: s2 {};
362 pm8841_s3: s3 {};
363 pm8841_s4: s4 {};
364 pm8841_s5: s5 {};
365 pm8841_s6: s6 {};
366 pm8841_s7: s7 {};
367 pm8841_s8: s8 {};
368 };
369
370 pm8941-regulators {
371 compatible = "qcom,rpm-pm8941-regulators";
372
373 pm8941_s1: s1 {};
374 pm8941_s2: s2 {};
375 pm8941_s3: s3 {};
376 pm8941_5v: s4 {};
377
378 pm8941_l1: l1 {};
379 pm8941_l2: l2 {};
380 pm8941_l3: l3 {};
381 pm8941_l4: l4 {};
382 pm8941_l5: l5 {};
383 pm8941_l6: l6 {};
384 pm8941_l7: l7 {};
385 pm8941_l8: l8 {};
386 pm8941_l9: l9 {};
387 pm8941_l10: l10 {};
388 pm8941_l11: l11 {};
389 pm8941_l12: l12 {};
390 pm8941_l13: l13 {};
391 pm8941_l14: l14 {};
392 pm8941_l15: l15 {};
393 pm8941_l16: l16 {};
394 pm8941_l17: l17 {};
395 pm8941_l18: l18 {};
396 pm8941_l19: l19 {};
397 pm8941_l20: l20 {};
398 pm8941_l21: l21 {};
399 pm8941_l22: l22 {};
400 pm8941_l23: l23 {};
401 pm8941_l24: l24 {};
402
403 pm8941_lvs1: lvs1 {};
404 pm8941_lvs2: lvs2 {};
405 pm8941_lvs3: lvs3 {};
406
407 pm8941_5vs1: 5vs1 {};
408 pm8941_5vs2: 5vs2 {};
409 };
410 };
411 };
412 };
337}; 413};
diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi
index 968f1043d4f5..b0d443999fcc 100644
--- a/arch/arm/boot/dts/qcom-pm8941.dtsi
+++ b/arch/arm/boot/dts/qcom-pm8941.dtsi
@@ -26,6 +26,27 @@
26 bias-pull-up; 26 bias-pull-up;
27 }; 27 };
28 28
29 charger@1000 {
30 compatible = "qcom,pm8941-charger";
31 reg = <0x1000 0x700>;
32 interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>,
33 <0x0 0x10 5 IRQ_TYPE_EDGE_BOTH>,
34 <0x0 0x10 4 IRQ_TYPE_EDGE_BOTH>,
35 <0x0 0x12 1 IRQ_TYPE_EDGE_BOTH>,
36 <0x0 0x12 0 IRQ_TYPE_EDGE_BOTH>,
37 <0x0 0x13 2 IRQ_TYPE_EDGE_BOTH>,
38 <0x0 0x13 1 IRQ_TYPE_EDGE_BOTH>,
39 <0x0 0x14 1 IRQ_TYPE_EDGE_BOTH>;
40 interrupt-names = "chg-done",
41 "chg-fast",
42 "chg-trkl",
43 "bat-temp-ok",
44 "bat-present",
45 "chg-gone",
46 "usb-valid",
47 "dc-valid";
48 };
49
29 pm8941_gpios: gpios@c000 { 50 pm8941_gpios: gpios@c000 {
30 compatible = "qcom,pm8941-gpio"; 51 compatible = "qcom,pm8941-gpio";
31 reg = <0xc000 0x2400>; 52 reg = <0xc000 0x2400>;
@@ -120,8 +141,7 @@
120 141
121 pm8941_iadc: iadc@3600 { 142 pm8941_iadc: iadc@3600 {
122 compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc"; 143 compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc";
123 reg = <0x3600 0x100>, 144 reg = <0x3600 0x100>;
124 <0x12f1 0x1>;
125 interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>; 145 interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>;
126 qcom,external-resistor-micro-ohms = <10000>; 146 qcom,external-resistor-micro-ohms = <10000>;
127 }; 147 };
diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
deleted file mode 100644
index dffa6ff30360..000000000000
--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+++ /dev/null
@@ -1,139 +0,0 @@
1/*
2 * Reference Device Tree Source for the Bock-W board
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * based on r8a7779
8 *
9 * Copyright (C) 2013 Renesas Solutions Corp.
10 * Copyright (C) 2013 Simon Horman
11 *
12 * This file is licensed under the terms of the GNU General Public License
13 * version 2. This program is licensed "as is" without any warranty of any
14 * kind, whether express or implied.
15 */
16
17/dts-v1/;
18#include "r8a7778.dtsi"
19#include <dt-bindings/interrupt-controller/irq.h>
20#include <dt-bindings/gpio/gpio.h>
21
22/ {
23 model = "bockw";
24 compatible = "renesas,bockw-reference", "renesas,r8a7778";
25
26 aliases {
27 serial0 = &scif0;
28 };
29
30 chosen {
31 bootargs = "ignore_loglevel root=/dev/nfs ip=dhcp rw";
32 stdout-path = &scif0;
33 };
34
35 memory {
36 device_type = "memory";
37 reg = <0x60000000 0x10000000>;
38 };
39
40 fixedregulator3v3: fixedregulator@0 {
41 compatible = "regulator-fixed";
42 regulator-name = "fixed-3.3V";
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
45 regulator-boot-on;
46 regulator-always-on;
47 };
48
49 ethernet@18300000 {
50 compatible = "smsc,lan9220", "smsc,lan9115";
51 reg = <0x18300000 0x1000>;
52
53 phy-mode = "mii";
54 interrupt-parent = <&irqpin>;
55 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
56 reg-io-width = <4>;
57 vddvario-supply = <&fixedregulator3v3>;
58 vdd33a-supply = <&fixedregulator3v3>;
59 };
60
61};
62
63&mmcif {
64 pinctrl-0 = <&mmc_pins>;
65 pinctrl-names = "default";
66
67 vmmc-supply = <&fixedregulator3v3>;
68 bus-width = <8>;
69 broken-cd;
70 status = "okay";
71};
72
73&irqpin {
74 status = "okay";
75};
76
77&tmu0 {
78 status = "okay";
79};
80
81&pfc {
82 scif0_pins: serial0 {
83 renesas,groups = "scif0_data_a", "scif0_ctrl";
84 renesas,function = "scif0";
85 };
86
87 mmc_pins: mmc {
88 renesas,groups = "mmc_data8", "mmc_ctrl";
89 renesas,function = "mmc";
90 };
91
92 sdhi0_pins: sd0 {
93 renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
94 "sdhi0_cd";
95 renesas,function = "sdhi0";
96 };
97
98 hspi0_pins: hspi0 {
99 renesas,groups = "hspi0_a";
100 renesas,function = "hspi0";
101 };
102};
103
104&sdhi0 {
105 pinctrl-0 = <&sdhi0_pins>;
106 pinctrl-names = "default";
107
108 vmmc-supply = <&fixedregulator3v3>;
109 bus-width = <4>;
110 status = "okay";
111 wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
112};
113
114&hspi0 {
115 pinctrl-0 = <&hspi0_pins>;
116 pinctrl-names = "default";
117 status = "okay";
118
119 flash: flash@0 {
120 #address-cells = <1>;
121 #size-cells = <1>;
122 compatible = "spansion,s25fl008k", "jedec,spi-nor";
123 reg = <0>;
124 spi-max-frequency = <104000000>;
125 m25p,fast-read;
126
127 partition@0 {
128 label = "data(spi)";
129 reg = <0x00000000 0x00100000>;
130 };
131 };
132};
133
134&scif0 {
135 pinctrl-0 = <&scif0_pins>;
136 pinctrl-names = "default";
137
138 status = "okay";
139};
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 4b1fa9f42ad5..4f8e07811746 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -239,7 +239,7 @@
239 #sound-dai-cells = <1>; 239 #sound-dai-cells = <1>;
240 compatible = "renesas,rcar_sound-r8a7778", "renesas,rcar_sound-gen1"; 240 compatible = "renesas,rcar_sound-r8a7778", "renesas,rcar_sound-gen1";
241 reg = <0xffd90000 0x1000>, /* SRU */ 241 reg = <0xffd90000 0x1000>, /* SRU */
242 <0xffd91000 0x1240>, /* SSI */ 242 <0xffd91000 0x240>, /* SSI */
243 <0xfffe0000 0x24>; /* ADG */ 243 <0xfffe0000 0x24>; /* ADG */
244 clocks = <&mstp3_clks R8A7778_CLK_SSI8>, 244 clocks = <&mstp3_clks R8A7778_CLK_SSI8>,
245 <&mstp3_clks R8A7778_CLK_SSI7>, 245 <&mstp3_clks R8A7778_CLK_SSI7>,
diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
index 20afea6f06ef..fe396c8d58db 100644
--- a/arch/arm/boot/dts/r8a7779-marzen.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
@@ -19,12 +19,12 @@
19 compatible = "renesas,marzen", "renesas,r8a7779"; 19 compatible = "renesas,marzen", "renesas,r8a7779";
20 20
21 aliases { 21 aliases {
22 serial2 = &scif2; 22 serial0 = &scif2;
23 serial4 = &scif4; 23 serial1 = &scif4;
24 }; 24 };
25 25
26 chosen { 26 chosen {
27 bootargs = "console=ttySC2,115200 ignore_loglevel root=/dev/nfs ip=on"; 27 bootargs = "ignore_loglevel root=/dev/nfs ip=on";
28 stdout-path = &scif2; 28 stdout-path = &scif2;
29 }; 29 };
30 30
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 37dec5269491..c553abd711ee 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -174,6 +174,13 @@
174 1800000 0>; 174 1800000 0>;
175 }; 175 };
176 176
177 audio_clock: clock {
178 compatible = "fixed-clock";
179 #clock-cells = <0>;
180 clock-frequency = <11289600>;
181 clock-output-names = "audio_clock";
182 };
183
177 rsnd_ak4643: sound { 184 rsnd_ak4643: sound {
178 compatible = "simple-audio-card"; 185 compatible = "simple-audio-card";
179 186
@@ -187,7 +194,7 @@
187 194
188 sndcodec: simple-audio-card,codec { 195 sndcodec: simple-audio-card,codec {
189 sound-dai = <&ak4643>; 196 sound-dai = <&ak4643>;
190 system-clock-frequency = <11289600>; 197 clocks = <&audio_clock>;
191 }; 198 };
192 }; 199 };
193 200
@@ -335,6 +342,11 @@
335 renesas,function = "msiof1"; 342 renesas,function = "msiof1";
336 }; 343 };
337 344
345 iic0_pins: iic0 {
346 renesas,groups = "iic0";
347 renesas,function = "iic0";
348 };
349
338 iic1_pins: iic1 { 350 iic1_pins: iic1 {
339 renesas,groups = "iic1"; 351 renesas,groups = "iic1";
340 renesas,function = "iic1"; 352 renesas,function = "iic1";
@@ -510,6 +522,8 @@
510 522
511&iic0 { 523&iic0 {
512 status = "okay"; 524 status = "okay";
525 pinctrl-0 = <&iic0_pins>;
526 pinctrl-names = "default";
513}; 527};
514 528
515&iic1 { 529&iic1 {
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a0b2a79cbfbd..ae5eb281d43a 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1599,7 +1599,7 @@
1599 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1599 reg = <0 0xec500000 0 0x1000>, /* SCU */
1600 <0 0xec5a0000 0 0x100>, /* ADG */ 1600 <0 0xec5a0000 0 0x100>, /* ADG */
1601 <0 0xec540000 0 0x1000>, /* SSIU */ 1601 <0 0xec540000 0 0x1000>, /* SSIU */
1602 <0 0xec541000 0 0x1280>, /* SSI */ 1602 <0 0xec541000 0 0x280>, /* SSI */
1603 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1603 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1604 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1604 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1605 1605
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index dc158845afdc..fc44ea361a4b 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -242,6 +242,13 @@
242 1800000 0>; 242 1800000 0>;
243 }; 243 };
244 244
245 audio_clock: clock {
246 compatible = "fixed-clock";
247 #clock-cells = <0>;
248 clock-frequency = <11289600>;
249 clock-output-names = "audio_clock";
250 };
251
245 rsnd_ak4643: sound { 252 rsnd_ak4643: sound {
246 compatible = "simple-audio-card"; 253 compatible = "simple-audio-card";
247 254
@@ -255,7 +262,7 @@
255 262
256 sndcodec: simple-audio-card,codec { 263 sndcodec: simple-audio-card,codec {
257 sound-dai = <&ak4643>; 264 sound-dai = <&ak4643>;
258 system-clock-frequency = <11289600>; 265 clocks = <&audio_clock>;
259 }; 266 };
260 }; 267 };
261 268
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
new file mode 100644
index 000000000000..fe0f12fc02a1
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -0,0 +1,282 @@
1/*
2 * Device Tree Source for the Porter board
3 *
4 * Copyright (C) 2015 Cogent Embedded, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12#include "r8a7791.dtsi"
13#include <dt-bindings/gpio/gpio.h>
14
15/ {
16 model = "Porter";
17 compatible = "renesas,porter", "renesas,r8a7791";
18
19 aliases {
20 serial0 = &scif0;
21 };
22
23 chosen {
24 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
25 stdout-path = &scif0;
26 };
27
28 memory@40000000 {
29 device_type = "memory";
30 reg = <0 0x40000000 0 0x40000000>;
31 };
32
33 memory@200000000 {
34 device_type = "memory";
35 reg = <2 0x00000000 0 0x40000000>;
36 };
37
38 vcc_sdhi0: regulator@0 {
39 compatible = "regulator-fixed";
40
41 regulator-name = "SDHI0 Vcc";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 regulator-always-on;
45 };
46
47 vccq_sdhi0: regulator@1 {
48 compatible = "regulator-gpio";
49
50 regulator-name = "SDHI0 VccQ";
51 regulator-min-microvolt = <1800000>;
52 regulator-max-microvolt = <3300000>;
53
54 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
55 gpios-states = <1>;
56 states = <3300000 1
57 1800000 0>;
58 };
59
60 vcc_sdhi2: regulator@2 {
61 compatible = "regulator-fixed";
62
63 regulator-name = "SDHI2 Vcc";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 regulator-always-on;
67 };
68
69 vccq_sdhi2: regulator@3 {
70 compatible = "regulator-gpio";
71
72 regulator-name = "SDHI2 VccQ";
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <3300000>;
75
76 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
77 gpios-states = <1>;
78 states = <3300000 1
79 1800000 0>;
80 };
81};
82
83&extal_clk {
84 clock-frequency = <20000000>;
85};
86
87&pfc {
88 scif0_pins: serial0 {
89 renesas,groups = "scif0_data_d";
90 renesas,function = "scif0";
91 };
92
93 ether_pins: ether {
94 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
95 renesas,function = "eth";
96 };
97
98 phy1_pins: phy1 {
99 renesas,groups = "intc_irq0";
100 renesas,function = "intc";
101 };
102
103 sdhi0_pins: sd0 {
104 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
105 renesas,function = "sdhi0";
106 };
107
108 sdhi2_pins: sd2 {
109 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
110 renesas,function = "sdhi2";
111 };
112
113 qspi_pins: spi0 {
114 renesas,groups = "qspi_ctrl", "qspi_data4";
115 renesas,function = "qspi";
116 };
117
118 i2c2_pins: i2c2 {
119 renesas,groups = "i2c2";
120 renesas,function = "i2c2";
121 };
122
123 usb0_pins: usb0 {
124 renesas,groups = "usb0";
125 renesas,function = "usb0";
126 };
127
128 usb1_pins: usb1 {
129 renesas,groups = "usb1";
130 renesas,function = "usb1";
131 };
132
133 vin0_pins: vin0 {
134 renesas,groups = "vin0_data8", "vin0_clk";
135 renesas,function = "vin0";
136 };
137};
138
139&scif0 {
140 pinctrl-0 = <&scif0_pins>;
141 pinctrl-names = "default";
142
143 status = "okay";
144};
145
146&ether {
147 pinctrl-0 = <&ether_pins &phy1_pins>;
148 pinctrl-names = "default";
149
150 phy-handle = <&phy1>;
151 renesas,ether-link-active-low;
152 status = "ok";
153
154 phy1: ethernet-phy@1 {
155 reg = <1>;
156 interrupt-parent = <&irqc0>;
157 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
158 micrel,led-mode = <1>;
159 };
160};
161
162&sdhi0 {
163 pinctrl-0 = <&sdhi0_pins>;
164 pinctrl-names = "default";
165
166 vmmc-supply = <&vcc_sdhi0>;
167 vqmmc-supply = <&vccq_sdhi0>;
168 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
169 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
170 status = "okay";
171};
172
173&sdhi2 {
174 pinctrl-0 = <&sdhi2_pins>;
175 pinctrl-names = "default";
176
177 vmmc-supply = <&vcc_sdhi2>;
178 vqmmc-supply = <&vccq_sdhi2>;
179 cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
180 status = "okay";
181};
182
183&qspi {
184 pinctrl-0 = <&qspi_pins>;
185 pinctrl-names = "default";
186
187 status = "okay";
188
189 flash@0 {
190 #address-cells = <1>;
191 #size-cells = <1>;
192 compatible = "spansion,s25fl512s", "jedec,spi-nor";
193 reg = <0>;
194 spi-max-frequency = <30000000>;
195 spi-tx-bus-width = <4>;
196 spi-rx-bus-width = <4>;
197 m25p,fast-read;
198
199 partition@0 {
200 label = "loader_prg";
201 reg = <0x00000000 0x00040000>;
202 read-only;
203 };
204 partition@40000 {
205 label = "user_prg";
206 reg = <0x00040000 0x00400000>;
207 read-only;
208 };
209 partition@440000 {
210 label = "flash_fs";
211 reg = <0x00440000 0x03bc0000>;
212 };
213 };
214};
215
216&i2c2 {
217 pinctrl-0 = <&i2c2_pins>;
218 pinctrl-names = "default";
219
220 status = "okay";
221 clock-frequency = <400000>;
222
223 composite-in@20 {
224 compatible = "adi,adv7180";
225 reg = <0x20>;
226 remote = <&vin0>;
227
228 port {
229 adv7180: endpoint {
230 bus-width = <8>;
231 remote-endpoint = <&vin0ep>;
232 };
233 };
234 };
235};
236
237&sata0 {
238 status = "okay";
239};
240
241/* composite video input */
242&vin0 {
243 status = "ok";
244 pinctrl-0 = <&vin0_pins>;
245 pinctrl-names = "default";
246
247 port {
248 #address-cells = <1>;
249 #size-cells = <0>;
250
251 vin0ep: endpoint {
252 remote-endpoint = <&adv7180>;
253 bus-width = <8>;
254 };
255 };
256};
257
258&pci0 {
259 pinctrl-0 = <&usb0_pins>;
260 pinctrl-names = "default";
261
262 status = "okay";
263};
264
265&pci1 {
266 pinctrl-0 = <&usb1_pins>;
267 pinctrl-names = "default";
268
269 status = "okay";
270};
271
272&usbphy {
273 status = "okay";
274};
275
276&pcie_bus_clk {
277 status = "okay";
278};
279
280&pciec {
281 status = "okay";
282};
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 831525dd39a6..3b8e26dde36d 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1649,7 +1649,7 @@
1649 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1649 reg = <0 0xec500000 0 0x1000>, /* SCU */
1650 <0 0xec5a0000 0 0x100>, /* ADG */ 1650 <0 0xec5a0000 0 0x100>, /* ADG */
1651 <0 0xec540000 0 0x1000>, /* SSIU */ 1651 <0 0xec540000 0 0x1000>, /* SSIU */
1652 <0 0xec541000 0 0x1280>, /* SSI */ 1652 <0 0xec541000 0 0x280>, /* SSI */
1653 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1653 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1654 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1654 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1655 1655
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index d4dd5a30ccdf..48ff3e2958ae 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -61,10 +61,35 @@
61 renesas,function = "intc"; 61 renesas,function = "intc";
62 }; 62 };
63 63
64 i2c1_pins: i2c1 {
65 renesas,groups = "i2c1";
66 renesas,function = "i2c1";
67 };
68
64 mmcif0_pins: mmcif0 { 69 mmcif0_pins: mmcif0 {
65 renesas,groups = "mmc_data8", "mmc_ctrl"; 70 renesas,groups = "mmc_data8", "mmc_ctrl";
66 renesas,function = "mmc"; 71 renesas,function = "mmc";
67 }; 72 };
73
74 qspi_pins: spi0 {
75 renesas,groups = "qspi_ctrl", "qspi_data4";
76 renesas,function = "qspi";
77 };
78
79 vin0_pins: vin0 {
80 renesas,groups = "vin0_data8", "vin0_clk";
81 renesas,function = "vin0";
82 };
83
84 usb0_pins: usb0 {
85 renesas,groups = "usb0";
86 renesas,function = "usb0";
87 };
88
89 usb1_pins: usb1 {
90 renesas,groups = "usb1";
91 renesas,function = "usb1";
92 };
68}; 93};
69 94
70&scif2 { 95&scif2 {
@@ -90,6 +115,27 @@
90 }; 115 };
91}; 116};
92 117
118&i2c1 {
119 pinctrl-0 = <&i2c1_pins>;
120 pinctrl-names = "default";
121
122 status = "okay";
123 clock-frequency = <400000>;
124
125 composite-in@20 {
126 compatible = "adi,adv7180";
127 reg = <0x20>;
128 remote = <&vin0>;
129
130 port {
131 adv7180: endpoint {
132 bus-width = <8>;
133 remote-endpoint = <&vin0ep>;
134 };
135 };
136 };
137};
138
93&mmcif0 { 139&mmcif0 {
94 pinctrl-0 = <&mmcif0_pins>; 140 pinctrl-0 = <&mmcif0_pins>;
95 pinctrl-names = "default"; 141 pinctrl-names = "default";
@@ -100,3 +146,71 @@
100 non-removable; 146 non-removable;
101 status = "okay"; 147 status = "okay";
102}; 148};
149
150&qspi {
151 pinctrl-0 = <&qspi_pins>;
152 pinctrl-names = "default";
153
154 status = "okay";
155
156 flash@0 {
157 #address-cells = <1>;
158 #size-cells = <1>;
159 compatible = "spansion,s25fl512s", "jedec,spi-nor";
160 reg = <0>;
161 spi-max-frequency = <30000000>;
162 spi-tx-bus-width = <4>;
163 spi-rx-bus-width = <4>;
164 spi-cpol;
165 spi-cpha;
166 m25p,fast-read;
167
168 partition@0 {
169 label = "loader";
170 reg = <0x00000000 0x00040000>;
171 read-only;
172 };
173 partition@40000 {
174 label = "user";
175 reg = <0x00040000 0x00400000>;
176 read-only;
177 };
178 partition@440000 {
179 label = "flash";
180 reg = <0x00440000 0x03bc0000>;
181 };
182 };
183};
184
185/* composite video input */
186&vin0 {
187 status = "okay";
188 pinctrl-0 = <&vin0_pins>;
189 pinctrl-names = "default";
190
191 port {
192 #address-cells = <1>;
193 #size-cells = <0>;
194
195 vin0ep: endpoint {
196 remote-endpoint = <&adv7180>;
197 bus-width = <8>;
198 };
199 };
200};
201
202&pci0 {
203 status = "okay";
204 pinctrl-0 = <&usb0_pins>;
205 pinctrl-names = "default";
206};
207
208&pci1 {
209 status = "okay";
210 pinctrl-0 = <&usb1_pins>;
211 pinctrl-names = "default";
212};
213
214&usbphy {
215 status = "okay";
216};
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 97c8e9ace5eb..a9977d6ee81a 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -19,6 +19,18 @@
19 #address-cells = <2>; 19 #address-cells = <2>;
20 #size-cells = <2>; 20 #size-cells = <2>;
21 21
22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 spi0 = &qspi;
30 vin0 = &vin0;
31 vin1 = &vin1;
32 };
33
22 cpus { 34 cpus {
23 #address-cells = <1>; 35 #address-cells = <1>;
24 #size-cells = <0>; 36 #size-cells = <0>;
@@ -50,6 +62,97 @@
50 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 62 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
51 }; 63 };
52 64
65 gpio0: gpio@e6050000 {
66 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
67 reg = <0 0xe6050000 0 0x50>;
68 interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
69 #gpio-cells = <2>;
70 gpio-controller;
71 gpio-ranges = <&pfc 0 0 32>;
72 #interrupt-cells = <2>;
73 interrupt-controller;
74 clocks = <&mstp9_clks R8A7794_CLK_GPIO0>;
75 power-domains = <&cpg_clocks>;
76 };
77
78 gpio1: gpio@e6051000 {
79 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
80 reg = <0 0xe6051000 0 0x50>;
81 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
82 #gpio-cells = <2>;
83 gpio-controller;
84 gpio-ranges = <&pfc 0 32 26>;
85 #interrupt-cells = <2>;
86 interrupt-controller;
87 clocks = <&mstp9_clks R8A7794_CLK_GPIO1>;
88 power-domains = <&cpg_clocks>;
89 };
90
91 gpio2: gpio@e6052000 {
92 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
93 reg = <0 0xe6052000 0 0x50>;
94 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
95 #gpio-cells = <2>;
96 gpio-controller;
97 gpio-ranges = <&pfc 0 64 32>;
98 #interrupt-cells = <2>;
99 interrupt-controller;
100 clocks = <&mstp9_clks R8A7794_CLK_GPIO2>;
101 power-domains = <&cpg_clocks>;
102 };
103
104 gpio3: gpio@e6053000 {
105 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
106 reg = <0 0xe6053000 0 0x50>;
107 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
108 #gpio-cells = <2>;
109 gpio-controller;
110 gpio-ranges = <&pfc 0 96 32>;
111 #interrupt-cells = <2>;
112 interrupt-controller;
113 clocks = <&mstp9_clks R8A7794_CLK_GPIO3>;
114 power-domains = <&cpg_clocks>;
115 };
116
117 gpio4: gpio@e6054000 {
118 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
119 reg = <0 0xe6054000 0 0x50>;
120 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
121 #gpio-cells = <2>;
122 gpio-controller;
123 gpio-ranges = <&pfc 0 128 32>;
124 #interrupt-cells = <2>;
125 interrupt-controller;
126 clocks = <&mstp9_clks R8A7794_CLK_GPIO4>;
127 power-domains = <&cpg_clocks>;
128 };
129
130 gpio5: gpio@e6055000 {
131 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
132 reg = <0 0xe6055000 0 0x50>;
133 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
134 #gpio-cells = <2>;
135 gpio-controller;
136 gpio-ranges = <&pfc 0 160 28>;
137 #interrupt-cells = <2>;
138 interrupt-controller;
139 clocks = <&mstp9_clks R8A7794_CLK_GPIO5>;
140 power-domains = <&cpg_clocks>;
141 };
142
143 gpio6: gpio@e6055400 {
144 compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar";
145 reg = <0 0xe6055400 0 0x50>;
146 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
147 #gpio-cells = <2>;
148 gpio-controller;
149 gpio-ranges = <&pfc 0 192 26>;
150 #interrupt-cells = <2>;
151 interrupt-controller;
152 clocks = <&mstp9_clks R8A7794_CLK_GPIO6>;
153 power-domains = <&cpg_clocks>;
154 };
155
53 cmt0: timer@ffca0000 { 156 cmt0: timer@ffca0000 {
54 compatible = "renesas,cmt-48-gen2"; 157 compatible = "renesas,cmt-48-gen2";
55 reg = <0 0xffca0000 0 0x1004>; 158 reg = <0 0xffca0000 0 0x1004>;
@@ -407,6 +510,73 @@
407 status = "disabled"; 510 status = "disabled";
408 }; 511 };
409 512
513 /* The memory map in the User's Manual maps the cores to bus numbers */
514 i2c0: i2c@e6508000 {
515 compatible = "renesas,i2c-r8a7794";
516 reg = <0 0xe6508000 0 0x40>;
517 interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
518 clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
519 power-domains = <&cpg_clocks>;
520 #address-cells = <1>;
521 #size-cells = <0>;
522 status = "disabled";
523 };
524
525 i2c1: i2c@e6518000 {
526 compatible = "renesas,i2c-r8a7794";
527 reg = <0 0xe6518000 0 0x40>;
528 interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
529 clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
530 power-domains = <&cpg_clocks>;
531 #address-cells = <1>;
532 #size-cells = <0>;
533 status = "disabled";
534 };
535
536 i2c2: i2c@e6530000 {
537 compatible = "renesas,i2c-r8a7794";
538 reg = <0 0xe6530000 0 0x40>;
539 interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
540 clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
541 power-domains = <&cpg_clocks>;
542 #address-cells = <1>;
543 #size-cells = <0>;
544 status = "disabled";
545 };
546
547 i2c3: i2c@e6540000 {
548 compatible = "renesas,i2c-r8a7794";
549 reg = <0 0xe6540000 0 0x40>;
550 interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
551 clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
552 power-domains = <&cpg_clocks>;
553 #address-cells = <1>;
554 #size-cells = <0>;
555 status = "disabled";
556 };
557
558 i2c4: i2c@e6520000 {
559 compatible = "renesas,i2c-r8a7794";
560 reg = <0 0xe6520000 0 0x40>;
561 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
562 clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
563 power-domains = <&cpg_clocks>;
564 #address-cells = <1>;
565 #size-cells = <0>;
566 status = "disabled";
567 };
568
569 i2c5: i2c@e6528000 {
570 compatible = "renesas,i2c-r8a7794";
571 reg = <0 0xe6528000 0 0x40>;
572 interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
573 clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
574 power-domains = <&cpg_clocks>;
575 #address-cells = <1>;
576 #size-cells = <0>;
577 status = "disabled";
578 };
579
410 mmcif0: mmc@ee200000 { 580 mmcif0: mmc@ee200000 {
411 compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif"; 581 compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
412 reg = <0 0xee200000 0 0x80>; 582 reg = <0 0xee200000 0 0x80>;
@@ -446,6 +616,140 @@
446 status = "disabled"; 616 status = "disabled";
447 }; 617 };
448 618
619 qspi: spi@e6b10000 {
620 compatible = "renesas,qspi-r8a7794", "renesas,qspi";
621 reg = <0 0xe6b10000 0 0x2c>;
622 interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
623 clocks = <&mstp9_clks R8A7794_CLK_QSPI_MOD>;
624 dmas = <&dmac0 0x17>, <&dmac0 0x18>;
625 dma-names = "tx", "rx";
626 power-domains = <&cpg_clocks>;
627 num-cs = <1>;
628 #address-cells = <1>;
629 #size-cells = <0>;
630 status = "disabled";
631 };
632
633 vin0: video@e6ef0000 {
634 compatible = "renesas,vin-r8a7794";
635 reg = <0 0xe6ef0000 0 0x1000>;
636 interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&mstp8_clks R8A7794_CLK_VIN0>;
638 power-domains = <&cpg_clocks>;
639 status = "disabled";
640 };
641
642 vin1: video@e6ef1000 {
643 compatible = "renesas,vin-r8a7794";
644 reg = <0 0xe6ef1000 0 0x1000>;
645 interrupts = <0 189 IRQ_TYPE_LEVEL_HIGH>;
646 clocks = <&mstp8_clks R8A7794_CLK_VIN1>;
647 power-domains = <&cpg_clocks>;
648 status = "disabled";
649 };
650
651 pci0: pci@ee090000 {
652 compatible = "renesas,pci-r8a7794";
653 device_type = "pci";
654 reg = <0 0xee090000 0 0xc00>,
655 <0 0xee080000 0 0x1100>;
656 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
657 clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
658 power-domains = <&cpg_clocks>;
659 status = "disabled";
660
661 bus-range = <0 0>;
662 #address-cells = <3>;
663 #size-cells = <2>;
664 #interrupt-cells = <1>;
665 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
666 interrupt-map-mask = <0xff00 0 0 0x7>;
667 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
668 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
669 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
670
671 usb@0,1 {
672 reg = <0x800 0 0 0 0>;
673 device_type = "pci";
674 phys = <&usb0 0>;
675 phy-names = "usb";
676 };
677
678 usb@0,2 {
679 reg = <0x1000 0 0 0 0>;
680 device_type = "pci";
681 phys = <&usb0 0>;
682 phy-names = "usb";
683 };
684 };
685
686 pci1: pci@ee0d0000 {
687 compatible = "renesas,pci-r8a7794";
688 device_type = "pci";
689 reg = <0 0xee0d0000 0 0xc00>,
690 <0 0xee0c0000 0 0x1100>;
691 interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
692 clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
693 power-domains = <&cpg_clocks>;
694 status = "disabled";
695
696 bus-range = <1 1>;
697 #address-cells = <3>;
698 #size-cells = <2>;
699 #interrupt-cells = <1>;
700 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
701 interrupt-map-mask = <0xff00 0 0 0x7>;
702 interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
703 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
704 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
705
706 usb@0,1 {
707 reg = <0x800 0 0 0 0>;
708 device_type = "pci";
709 phys = <&usb2 0>;
710 phy-names = "usb";
711 };
712
713 usb@0,2 {
714 reg = <0x1000 0 0 0 0>;
715 device_type = "pci";
716 phys = <&usb2 0>;
717 phy-names = "usb";
718 };
719 };
720
721 hsusb: usb@e6590000 {
722 compatible = "renesas,usbhs-r8a7794";
723 reg = <0 0xe6590000 0 0x100>;
724 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
725 clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
726 power-domains = <&cpg_clocks>;
727 renesas,buswait = <4>;
728 phys = <&usb0 1>;
729 phy-names = "usb";
730 status = "disabled";
731 };
732
733 usbphy: usb-phy@e6590100 {
734 compatible = "renesas,usb-phy-r8a7794";
735 reg = <0 0xe6590100 0 0x100>;
736 #address-cells = <1>;
737 #size-cells = <0>;
738 clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
739 clock-names = "usbhs";
740 power-domains = <&cpg_clocks>;
741 status = "disabled";
742
743 usb0: usb-channel@0 {
744 reg = <0>;
745 #phy-cells = <1>;
746 };
747 usb2: usb-channel@2 {
748 reg = <2>;
749 #phy-cells = <1>;
750 };
751 };
752
449 clocks { 753 clocks {
450 #address-cells = <2>; 754 #address-cells = <2>;
451 #size-cells = <2>; 755 #size-cells = <2>;
@@ -749,16 +1053,22 @@
749 mstp9_clks: mstp9_clks@e6150994 { 1053 mstp9_clks: mstp9_clks@e6150994 {
750 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; 1054 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
751 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; 1055 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
752 clocks = <&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>, 1056 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
753 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; 1057 <&cp_clk>, <&cp_clk>, <&cp_clk>,
1058 <&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>,
1059 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
754 #clock-cells = <1>; 1060 #clock-cells = <1>;
755 clock-indices = < 1061 clock-indices = <R8A7794_CLK_GPIO6 R8A7794_CLK_GPIO5
756 R8A7794_CLK_QSPI_MOD R8A7794_CLK_I2C5 R8A7794_CLK_I2C4 1062 R8A7794_CLK_GPIO4 R8A7794_CLK_GPIO3
757 R8A7794_CLK_I2C3 R8A7794_CLK_I2C2 R8A7794_CLK_I2C1 1063 R8A7794_CLK_GPIO2 R8A7794_CLK_GPIO1
758 R8A7794_CLK_I2C0 1064 R8A7794_CLK_GPIO0 R8A7794_CLK_QSPI_MOD
759 >; 1065 R8A7794_CLK_I2C5 R8A7794_CLK_I2C4
1066 R8A7794_CLK_I2C3 R8A7794_CLK_I2C2
1067 R8A7794_CLK_I2C1 R8A7794_CLK_I2C0>;
760 clock-output-names = 1068 clock-output-names =
761 "qspi_mod", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; 1069 "gpio6", "gpio5", "gpio4", "gpio3", "gpio2",
1070 "gpio1", "gpio0", "qspi_mod",
1071 "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
762 }; 1072 };
763 mstp11_clks: mstp11_clks@e615099c { 1073 mstp11_clks: mstp11_clks@e615099c {
764 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; 1074 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/arch/arm/boot/dts/r8a77xx-aa121td01-panel.dtsi b/arch/arm/boot/dts/r8a77xx-aa121td01-panel.dtsi
new file mode 100644
index 000000000000..a07ebf8f6938
--- /dev/null
+++ b/arch/arm/boot/dts/r8a77xx-aa121td01-panel.dtsi
@@ -0,0 +1,41 @@
1/*
2 * Common file for the AA121TD01 panel connected to Renesas R-Car boards
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/ {
12 panel {
13 compatible = "mitsubishi,aa121td01", "panel-dpi";
14
15 width-mm = <261>;
16 height-mm = <163>;
17
18 panel-timing {
19 /* 1280x800 @60Hz */
20 clock-frequency = <71000000>;
21 hactive = <1280>;
22 vactive = <800>;
23 hsync-len = <70>;
24 hfront-porch = <20>;
25 hback-porch = <70>;
26 vsync-len = <5>;
27 vfront-porch = <3>;
28 vback-porch = <15>;
29 };
30
31 port {
32 panel_in: endpoint {
33 remote-endpoint = <&lvds_connector>;
34 };
35 };
36 };
37};
38
39&lvds_connector {
40 remote-endpoint = <&panel_in>;
41};
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index c0273755431a..38c91a839795 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -186,6 +186,8 @@
186 pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; 186 pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
187 vmmc-supply = <&vcc_sd0>; 187 vmmc-supply = <&vcc_sd0>;
188 bus-width = <4>; 188 bus-width = <4>;
189 cap-mmc-highspeed;
190 cap-sd-highspeed;
189 disable-wp; 191 disable-wp;
190}; 192};
191 193
diff --git a/arch/arm/boot/dts/rk3066a-marsboard.dts b/arch/arm/boot/dts/rk3066a-marsboard.dts
index bae965c123c1..7cdc308bfac5 100644
--- a/arch/arm/boot/dts/rk3066a-marsboard.dts
+++ b/arch/arm/boot/dts/rk3066a-marsboard.dts
@@ -178,6 +178,14 @@
178 }; 178 };
179}; 179};
180 180
181&mmc0 {
182 status = "okay";
183
184 pinctrl-names = "default";
185 pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
186 vmmc-supply = <&vcc_sd0>;
187};
188
181&pinctrl { 189&pinctrl {
182 lan8720a { 190 lan8720a {
183 phy_int: phy-int { 191 phy_int: phy-int {
diff --git a/arch/arm/boot/dts/rk3066a-rayeager.dts b/arch/arm/boot/dts/rk3066a-rayeager.dts
index e36383c701dc..341c1f87936a 100644
--- a/arch/arm/boot/dts/rk3066a-rayeager.dts
+++ b/arch/arm/boot/dts/rk3066a-rayeager.dts
@@ -330,6 +330,8 @@
330 pinctrl-names = "default"; 330 pinctrl-names = "default";
331 pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; 331 pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
332 vmmc-supply = <&vcc_sd>; 332 vmmc-supply = <&vcc_sd>;
333 cap-mmc-highspeed;
334 cap-sd-highspeed;
333 status = "okay"; 335 status = "okay";
334}; 336};
335 337
diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
index d2180e5d2b05..66fa87d1e2c2 100644
--- a/arch/arm/boot/dts/rk3188-radxarock.dts
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -90,6 +90,21 @@
90 }; 90 };
91 }; 91 };
92 92
93 sound {
94 compatible = "simple-audio-card";
95 simple-audio-card,name = "SPDIF";
96
97 simple-audio-card,dai-link@1 { /* S/PDIF - S/PDIF */
98 cpu { sound-dai = <&spdif>; };
99 codec { sound-dai = <&spdif_out>; };
100 };
101 };
102
103 spdif_out: spdif-out {
104 compatible = "linux,spdif-dit";
105 #sound-dai-cells = <0>;
106 };
107
93 ir_recv: gpio-ir-receiver { 108 ir_recv: gpio-ir-receiver {
94 compatible = "gpio-ir-receiver"; 109 compatible = "gpio-ir-receiver";
95 gpios = <&gpio0 10 1>; 110 gpios = <&gpio0 10 1>;
@@ -289,6 +304,8 @@
289 vmmc-supply = <&vcc_sd0>; 304 vmmc-supply = <&vcc_sd0>;
290 305
291 bus-width = <4>; 306 bus-width = <4>;
307 cap-mmc-highspeed;
308 cap-sd-highspeed;
292 disable-wp; 309 disable-wp;
293}; 310};
294 311
@@ -343,6 +360,10 @@
343 }; 360 };
344}; 361};
345 362
363&spdif {
364 status = "okay";
365};
366
346&uart0 { 367&uart0 {
347 status = "okay"; 368 status = "okay";
348}; 369};
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 316304272118..6399942f1840 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -121,6 +121,20 @@
121 status = "disabled"; 121 status = "disabled";
122 }; 122 };
123 123
124 spdif: sound@1011e000 {
125 compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
126 reg = <0x1011e000 0x2000>;
127 #sound-dai-cells = <0>;
128 clock-names = "hclk", "mclk";
129 clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
130 dmas = <&dmac1_s 8>;
131 dma-names = "tx";
132 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
133 pinctrl-names = "default";
134 pinctrl-0 = <&spdif_tx>;
135 status = "disabled";
136 };
137
124 cru: clock-controller@20000000 { 138 cru: clock-controller@20000000 {
125 compatible = "rockchip,rk3188-cru"; 139 compatible = "rockchip,rk3188-cru";
126 reg = <0x20000000 0x1000>; 140 reg = <0x20000000 0x1000>;
@@ -484,6 +498,12 @@
484 <RK_GPIO1 21 RK_FUNC_1 &pcfg_pull_none>; 498 <RK_GPIO1 21 RK_FUNC_1 &pcfg_pull_none>;
485 }; 499 };
486 }; 500 };
501
502 spdif {
503 spdif_tx: spdif-tx {
504 rockchip,pins = <RK_GPIO1 14 RK_FUNC_1 &pcfg_pull_none>;
505 };
506 };
487 }; 507 };
488}; 508};
489 509
diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
index 20fa0ef0b96b..4e3fd9aefe34 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
@@ -48,6 +48,14 @@
48 reg = <0 0x80000000>; 48 reg = <0 0x80000000>;
49 }; 49 };
50 50
51 dovdd_1v8: dovdd-1v8-regulator {
52 compatible = "regulator-fixed";
53 regulator-name = "dovdd_1v8";
54 regulator-min-microvolt = <1800000>;
55 regulator-max-microvolt = <1800000>;
56 vin-supply = <&vcc28_dvp>;
57 };
58
51 ext_gmac: external-gmac-clock { 59 ext_gmac: external-gmac-clock {
52 compatible = "fixed-clock"; 60 compatible = "fixed-clock";
53 #clock-cells = <0>; 61 #clock-cells = <0>;
@@ -55,6 +63,22 @@
55 clock-output-names = "ext_gmac"; 63 clock-output-names = "ext_gmac";
56 }; 64 };
57 65
66 io_domains: io-domains {
67 compatible = "rockchip,rk3288-io-voltage-domain";
68 rockchip,grf = <&grf>;
69
70 audio-supply = <&vcca_33>;
71 bb-supply = <&vcc_io>;
72 dvp-supply = <&dovdd_1v8>;
73 flash0-supply = <&vcc_flash>;
74 flash1-supply = <&vcc_lan>;
75 gpio30-supply = <&vcc_io>;
76 gpio1830-supply = <&vcc_io>;
77 lcdc-supply = <&vcc_io>;
78 sdcard-supply = <&vccio_sd>;
79 wifi-supply = <&vccio_wl>;
80 };
81
58 ir: ir-receiver { 82 ir: ir-receiver {
59 compatible = "gpio-ir-receiver"; 83 compatible = "gpio-ir-receiver";
60 pinctrl-names = "default"; 84 pinctrl-names = "default";
@@ -96,7 +120,7 @@
96 }; 120 };
97 }; 121 };
98 122
99 vcc_sys: vsys-regulator { 123 vbat_wl: vcc_sys: vsys-regulator {
100 compatible = "regulator-fixed"; 124 compatible = "regulator-fixed";
101 regulator-name = "vcc_sys"; 125 regulator-name = "vcc_sys";
102 regulator-min-microvolt = <5000000>; 126 regulator-min-microvolt = <5000000>;
@@ -160,6 +184,23 @@
160 regulator-always-on; 184 regulator-always-on;
161 vin-supply = <&vcc_5v>; 185 vin-supply = <&vcc_5v>;
162 }; 186 };
187
188 /*
189 * A TT8142 creates both dovdd_1v8 and vcc28_dvp, controlled
190 * by the dvp_pwr pin.
191 */
192 vcc28_dvp: vcc28-dvp-regulator {
193 compatible = "regulator-fixed";
194 enable-active-high;
195 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&dvp_pwr>;
198 regulator-name = "vcc28_dvp";
199 regulator-min-microvolt = <2800000>;
200 regulator-max-microvolt = <2800000>;
201 regulator-always-on;
202 vin-supply = <&vcc_io>;
203 };
163}; 204};
164 205
165&cpu0 { 206&cpu0 {
@@ -325,7 +366,7 @@
325 regulator-always-on; 366 regulator-always-on;
326 }; 367 };
327 368
328 vcc_18: REG11 { 369 vccio_wl: vcc_18: REG11 {
329 regulator-name = "vcc_18"; 370 regulator-name = "vcc_18";
330 regulator-min-microvolt = <1800000>; 371 regulator-min-microvolt = <1800000>;
331 regulator-max-microvolt = <1800000>; 372 regulator-max-microvolt = <1800000>;
@@ -373,6 +414,12 @@
373 }; 414 };
374 }; 415 };
375 416
417 dvp {
418 dvp_pwr: dvp-pwr {
419 rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
420 };
421 };
422
376 gmac { 423 gmac {
377 phy_int: phy-int { 424 phy_int: phy-int {
378 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>; 425 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -445,7 +492,8 @@
445 num-slots = <1>; 492 num-slots = <1>;
446 pinctrl-names = "default"; 493 pinctrl-names = "default";
447 pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>; 494 pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
448 vmmc-supply = <&vcc_18>; 495 vmmc-supply = <&vbat_wl>;
496 vqmmc-supply = <&vccio_wl>;
449 status = "okay"; 497 status = "okay";
450}; 498};
451 499
@@ -459,6 +507,7 @@
459 pinctrl-names = "default"; 507 pinctrl-names = "default";
460 pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>; 508 pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
461 vmmc-supply = <&vcc_sd>; 509 vmmc-supply = <&vcc_sd>;
510 vqmmc-supply = <&vccio_sd>;
462 status = "okay"; 511 status = "okay";
463}; 512};
464 513
diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts b/arch/arm/boot/dts/rk3288-popmetal.dts
index f82b956ebf17..65c475642d5a 100644
--- a/arch/arm/boot/dts/rk3288-popmetal.dts
+++ b/arch/arm/boot/dts/rk3288-popmetal.dts
@@ -79,6 +79,22 @@
79 }; 79 };
80 }; 80 };
81 81
82 io_domains: io-domains {
83 compatible = "rockchip,rk3288-io-voltage-domain";
84 rockchip,grf = <&grf>;
85
86 audio-supply = <&vcca_33>;
87 bb-supply = <&vcc_io>;
88 dvp-supply = <&vcc18_dvp>;
89 flash0-supply = <&vcc_flash>;
90 flash1-supply = <&vcc_lan>;
91 gpio30-supply = <&vcc_io>;
92 gpio1830-supply = <&vcc_io>;
93 lcdc-supply = <&vcc_io>;
94 sdcard-supply = <&vccio_sd>;
95 wifi-supply = <&vccio_wl>;
96 };
97
82 ir: ir-receiver { 98 ir: ir-receiver {
83 compatible = "gpio-ir-receiver"; 99 compatible = "gpio-ir-receiver";
84 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 100 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
@@ -86,6 +102,26 @@
86 pinctrl-0 = <&ir_int>; 102 pinctrl-0 = <&ir_int>;
87 }; 103 };
88 104
105 vcc_flash: flash-regulator {
106 compatible = "regulator-fixed";
107 regulator-name = "vcc_flash";
108 regulator-min-microvolt = <1800000>;
109 regulator-max-microvolt = <1800000>;
110 vin-supply = <&vcc_io>;
111 };
112
113 vcc_sd: sdmmc-regulator {
114 compatible = "regulator-fixed";
115 gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&sdmmc_pwr>;
118 regulator-name = "vcc_sd";
119 regulator-min-microvolt = <3300000>;
120 regulator-max-microvolt = <3300000>;
121 startup-delay-us = <100000>;
122 vin-supply = <&vcc_io>;
123 };
124
89 vcc_sys: vsys-regulator { 125 vcc_sys: vsys-regulator {
90 compatible = "regulator-fixed"; 126 compatible = "regulator-fixed";
91 regulator-name = "vcc_sys"; 127 regulator-name = "vcc_sys";
@@ -94,6 +130,31 @@
94 regulator-always-on; 130 regulator-always-on;
95 regulator-boot-on; 131 regulator-boot-on;
96 }; 132 };
133
134 /*
135 * A PT5128 creates both dovdd_1v8 and vcc28_dvp, controlled
136 * by the dvp_pwr pin.
137 */
138 vcc18_dvp: vcc18-dvp-regulator {
139 compatible = "regulator-fixed";
140 regulator-name = "vcc18-dvp";
141 regulator-min-microvolt = <1800000>;
142 regulator-max-microvolt = <1800000>;
143 vin-supply = <&vcc28_dvp>;
144 };
145
146 vcc28_dvp: vcc28-dvp-regulator {
147 compatible = "regulator-fixed";
148 enable-active-high;
149 gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&dvp_pwr>;
152 regulator-name = "vcc28_dvp";
153 regulator-min-microvolt = <2800000>;
154 regulator-max-microvolt = <2800000>;
155 regulator-always-on;
156 vin-supply = <&vcc_io>;
157 };
97}; 158};
98 159
99&cpu0 { 160&cpu0 {
@@ -109,6 +170,8 @@
109 num-slots = <1>; 170 num-slots = <1>;
110 pinctrl-names = "default"; 171 pinctrl-names = "default";
111 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; 172 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
173 vmmc-supply = <&vcc_io>;
174 vqmmc-supply = <&vcc_flash>;
112 status = "okay"; 175 status = "okay";
113}; 176};
114 177
@@ -121,6 +184,8 @@
121 num-slots = <1>; 184 num-slots = <1>;
122 pinctrl-names = "default"; 185 pinctrl-names = "default";
123 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 186 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
187 vmmc-supply = <&vcc_sd>;
188 vqmmc-supply = <&vccio_sd>;
124 status = "okay"; 189 status = "okay";
125}; 190};
126 191
@@ -297,22 +362,22 @@
297 }; 362 };
298 }; 363 };
299 364
300 vcca_codec: LDO_REG8 { 365 vcca_33: LDO_REG8 {
301 regulator-always-on; 366 regulator-always-on;
302 regulator-boot-on; 367 regulator-boot-on;
303 regulator-min-microvolt = <3300000>; 368 regulator-min-microvolt = <3300000>;
304 regulator-max-microvolt = <3300000>; 369 regulator-max-microvolt = <3300000>;
305 regulator-name = "vcca_codec"; 370 regulator-name = "vcca_33";
306 regulator-state-mem { 371 regulator-state-mem {
307 regulator-on-in-suspend; 372 regulator-on-in-suspend;
308 regulator-suspend-microvolt = <3300000>; 373 regulator-suspend-microvolt = <3300000>;
309 }; 374 };
310 }; 375 };
311 376
312 vcc_wl: SWITCH_REG1 { 377 vccio_wl: SWITCH_REG1 {
313 regulator-always-on; 378 regulator-always-on;
314 regulator-boot-on; 379 regulator-boot-on;
315 regulator-name = "vcc_wl"; 380 regulator-name = "vccio_wl";
316 regulator-state-mem { 381 regulator-state-mem {
317 regulator-on-in-suspend; 382 regulator-on-in-suspend;
318 }; 383 };
@@ -388,6 +453,12 @@
388 }; 453 };
389 }; 454 };
390 455
456 dvp {
457 dvp_pwr: dvp-pwr {
458 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>;
459 };
460 };
461
391 ir { 462 ir {
392 ir_int: ir-int { 463 ir_int: ir-int {
393 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>; 464 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -405,6 +476,12 @@
405 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>; 476 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
406 }; 477 };
407 }; 478 };
479
480 sdmmc {
481 sdmmc_pwr: sdmmc-pwr {
482 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
483 };
484 };
408}; 485};
409 486
410&tsadc { 487&tsadc {
diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
new file mode 100644
index 000000000000..1813b7c36556
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
@@ -0,0 +1,277 @@
1/*
2 * This file is dual-licensed: you can use it either under the terms
3 * of the GPL or the X11 license, at your option. Note that this dual
4 * licensing only applies to this file, and not this project as a
5 * whole.
6 *
7 * a) This file is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version.
11 *
12 * This file is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * Or, alternatively,
18 *
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
22 * restriction, including without limitation the rights to use,
23 * copy, modify, merge, publish, distribute, sublicense, and/or
24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
26 * conditions:
27 *
28 * The above copyright notice and this permission notice shall be
29 * included in all copies or substantial portions of the Software.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38 * OTHER DEALINGS IN THE SOFTWARE.
39 */
40
41#include <dt-bindings/pwm/pwm.h>
42#include "rk3288.dtsi"
43
44/ {
45 memory {
46 reg = <0x0 0x80000000>;
47 device_type = "memory";
48 };
49
50 emmc_pwrseq: emmc-pwrseq {
51 compatible = "mmc-pwrseq-emmc";
52 pinctrl-0 = <&emmc_reset>;
53 pinctrl-names = "default";
54 reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
55 };
56
57 ext_gmac: external-gmac-clock {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <125000000>;
61 clock-output-names = "ext_gmac";
62 };
63
64 vcc_sys: vsys-regulator {
65 compatible = "regulator-fixed";
66 regulator-name = "vcc_sys";
67 regulator-min-microvolt = <5000000>;
68 regulator-max-microvolt = <5000000>;
69 regulator-always-on;
70 regulator-boot-on;
71 };
72};
73
74&cpu0 {
75 cpu0-supply = <&vdd_cpu>;
76};
77
78&emmc {
79 bus-width = <8>;
80 cap-mmc-highspeed;
81 disable-wp;
82 non-removable;
83 num-slots = <1>;
84 mmc-pwrseq = <&emmc_pwrseq>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
87 vmmc-supply = <&vcc_io>;
88 status = "okay";
89};
90
91&gmac {
92 assigned-clocks = <&cru SCLK_MAC>;
93 assigned-clock-parents = <&ext_gmac>;
94 clock_in_out = "input";
95 phy-mode = "rgmii";
96 phy-supply = <&vccio_pmu>;
97 pinctrl-names = "default";
98 pinctrl-0 = <&rgmii_pins &phy_rst>;
99 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
100 snps,reset-active-low;
101 snps,reset-delays-us = <0 10000 30000>;
102 rx_delay = <0x10>;
103 tx_delay = <0x30>;
104};
105
106&i2c0 {
107 status = "okay";
108
109 act8846: act8846@5a {
110 compatible = "active-semi,act8846";
111 reg = <0x5a>;
112 inl1-supply = <&vcc_io>;
113 inl2-supply = <&vcc_sys>;
114 inl3-supply = <&vcc_20>;
115 vp1-supply = <&vcc_sys>;
116 vp2-supply = <&vcc_sys>;
117 vp3-supply = <&vcc_sys>;
118 vp4-supply = <&vcc_sys>;
119
120 regulators {
121 vcc_ddr: REG1 {
122 regulator-name = "VCC_DDR";
123 regulator-min-microvolt = <1200000>;
124 regulator-max-microvolt = <1200000>;
125 regulator-always-on;
126 };
127
128 vcc_io: REG2 {
129 regulator-name = "VCC_IO";
130 regulator-min-microvolt = <3300000>;
131 regulator-max-microvolt = <3300000>;
132 regulator-always-on;
133 };
134
135 vdd_log: REG3 {
136 regulator-name = "VDD_LOG";
137 regulator-min-microvolt = <1000000>;
138 regulator-max-microvolt = <1000000>;
139 regulator-always-on;
140 };
141
142 vcc_20: REG4 {
143 regulator-name = "VCC_20";
144 regulator-min-microvolt = <2000000>;
145 regulator-max-microvolt = <2000000>;
146 regulator-always-on;
147 };
148
149 vccio_sd: REG5 {
150 regulator-name = "VCCIO_SD";
151 regulator-min-microvolt = <3300000>;
152 regulator-max-microvolt = <3300000>;
153 regulator-always-on;
154 };
155
156 vdd10_lcd: REG6 {
157 regulator-name = "VDD10_LCD";
158 regulator-min-microvolt = <1000000>;
159 regulator-max-microvolt = <1000000>;
160 regulator-always-on;
161 };
162
163 vcca_codec: REG7 {
164 regulator-name = "VCCA_CODEC";
165 regulator-min-microvolt = <3300000>;
166 regulator-max-microvolt = <3300000>;
167 regulator-always-on;
168 };
169
170 vcca_tp: REG8 {
171 regulator-name = "VCCA_TP";
172 regulator-min-microvolt = <3300000>;
173 regulator-max-microvolt = <3300000>;
174 regulator-always-on;
175 };
176
177 vccio_pmu: REG9 {
178 regulator-name = "VCCIO_PMU";
179 regulator-min-microvolt = <3300000>;
180 regulator-max-microvolt = <3300000>;
181 regulator-always-on;
182 };
183
184 vdd_10: REG10 {
185 regulator-name = "VDD_10";
186 regulator-min-microvolt = <1000000>;
187 regulator-max-microvolt = <1000000>;
188 regulator-always-on;
189 };
190
191 vcc_18: REG11 {
192 regulator-name = "VCC_18";
193 regulator-min-microvolt = <1800000>;
194 regulator-max-microvolt = <1800000>;
195 regulator-always-on;
196 };
197
198 vcc18_lcd: REG12 {
199 regulator-name = "VCC18_LCD";
200 regulator-min-microvolt = <1800000>;
201 regulator-max-microvolt = <1800000>;
202 regulator-always-on;
203 };
204 };
205 };
206
207 vdd_cpu: syr827@40 {
208 compatible = "silergy,syr827";
209 reg = <0x40>;
210 fcs,suspend-voltage-selector = <1>;
211 regulator-always-on;
212 regulator-boot-on;
213 regulator-enable-ramp-delay = <300>;
214 regulator-name = "vdd_cpu";
215 regulator-min-microvolt = <850000>;
216 regulator-max-microvolt = <1350000>;
217 regulator-ramp-delay = <8000>;
218 vin-supply = <&vcc_sys>;
219 };
220
221 vdd_gpu: syr828@41 {
222 compatible = "silergy,syr828";
223 reg = <0x41>;
224 fcs,suspend-voltage-selector = <1>;
225 regulator-always-on;
226 regulator-enable-ramp-delay = <300>;
227 regulator-min-microvolt = <850000>;
228 regulator-max-microvolt = <1350000>;
229 regulator-name = "vdd_gpu";
230 regulator-ramp-delay = <8000>;
231 vin-supply = <&vcc_sys>;
232 };
233};
234
235&pinctrl {
236 pcfg_output_high: pcfg-output-high {
237 output-high;
238 };
239
240 emmc {
241 emmc_reset: emmc-reset {
242 rockchip,pins = <3 9 RK_FUNC_GPIO &pcfg_pull_none>;
243 };
244 };
245
246 gmac {
247 phy_rst: phy-rst {
248 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
249 };
250 };
251};
252
253&tsadc {
254 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
255 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
256 status = "okay";
257};
258
259&vopb {
260 status = "okay";
261};
262
263&vopb_mmu {
264 status = "okay";
265};
266
267&vopl {
268 status = "okay";
269};
270
271&vopl_mmu {
272 status = "okay";
273};
274
275&wdt {
276 status = "okay";
277};
diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts
new file mode 100644
index 000000000000..8af35c867a80
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-rock2-square.dts
@@ -0,0 +1,167 @@
1/*
2 * This file is dual-licensed: you can use it either under the terms
3 * of the GPL or the X11 license, at your option. Note that this dual
4 * licensing only applies to this file, and not this project as a
5 * whole.
6 *
7 * a) This file is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version.
11 *
12 * This file is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * Or, alternatively,
18 *
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
22 * restriction, including without limitation the rights to use,
23 * copy, modify, merge, publish, distribute, sublicense, and/or
24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
26 * conditions:
27 *
28 * The above copyright notice and this permission notice shall be
29 * included in all copies or substantial portions of the Software.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38 * OTHER DEALINGS IN THE SOFTWARE.
39 */
40
41/dts-v1/;
42#include "rk3288-rock2-som.dtsi"
43
44/ {
45 model = "Radxa Rock 2 Square";
46 compatible = "radxa,rock2-square", "rockchip,rk3288";
47
48 chosen {
49 stdout-path = "serial2:115200n8";
50 };
51
52 sound {
53 compatible = "simple-audio-card";
54 simple-audio-card,name = "SPDIF";
55 simple-audio-card,dai-link@1 { /* S/PDIF - S/PDIF */
56 cpu { sound-dai = <&spdif>; };
57 codec { sound-dai = <&spdif_out>; };
58 };
59 };
60
61 spdif_out: spdif-out {
62 compatible = "linux,spdif-dit";
63 #sound-dai-cells = <0>;
64 };
65
66 vcc_usb_host: vcc-host-regulator {
67 compatible = "regulator-fixed";
68 enable-active-high;
69 gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
70 pinctrl-names = "default";
71 pinctrl-0 = <&host_vbus_drv>;
72 /* Always on as the rockchip usb phy doesn't have a vbus-supply
73 * property
74 */
75 regulator-always-on;
76 regulator-name = "vcc_host";
77 };
78
79 vcc_sd: sdmmc-regulator {
80 compatible = "regulator-fixed";
81 gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&sdmmc_pwr>;
84 regulator-name = "vcc_sd";
85 regulator-min-microvolt = <3300000>;
86 regulator-max-microvolt = <3300000>;
87 vin-supply = <&vcc_io>;
88 };
89};
90
91&sdmmc {
92 bus-width = <4>;
93 cap-mmc-highspeed;
94 cap-sd-highspeed;
95 card-detect-delay = <200>;
96 disable-wp; /* wp not hooked up */
97 num-slots = <1>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
100 vmmc-supply = <&vcc_sd>;
101 vqmmc-supply = <&vccio_sd>;
102 status = "okay";
103};
104
105&gmac {
106 status = "ok";
107};
108
109&hdmi {
110 ddc-i2c-bus = <&i2c5>;
111 status = "okay";
112};
113
114&i2c0 {
115 hym8563@51 {
116 compatible = "haoyu,hym8563";
117 reg = <0x51>;
118 #clock-cells = <0>;
119 clock-frequency = <32768>;
120 clock-output-names = "xin32k";
121 interrupt-parent = <&gpio0>;
122 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&pmic_int>;
125
126 };
127};
128
129&i2c5 {
130 status = "okay";
131};
132
133&pinctrl {
134 pmic {
135 pmic_int: pmic-int {
136 rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
137 };
138 };
139
140 usb {
141 host_vbus_drv: host-vbus-drv {
142 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
143 };
144 };
145
146 sdmmc {
147 sdmmc_pwr: sdmmc-pwr {
148 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
149 };
150 };
151};
152
153&spdif {
154 status = "okay";
155};
156
157&uart2 {
158 status = "okay";
159};
160
161&usbphy {
162 status = "okay";
163};
164
165&usb_host0_ehci {
166 status = "okay";
167};
diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
new file mode 100644
index 000000000000..c2f52cfb4d06
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
@@ -0,0 +1,176 @@
1/*
2 * Google Veyron Jaq Rev 1+ board device tree source
3 *
4 * Copyright 2015 Google, Inc
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/dts-v1/;
46
47#include "rk3288-veyron-chromebook.dtsi"
48#include "cros-ec-sbs.dtsi"
49
50/ {
51 model = "Google Jaq";
52 compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
53 "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
54 "google,veyron-jaq-rev1", "google,veyron-jaq",
55 "google,veyron", "rockchip,rk3288";
56
57 panel_regulator: panel-regulator {
58 compatible = "regulator-fixed";
59 enable-active-high;
60 gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
61 pinctrl-names = "default";
62 pinctrl-0 = <&lcd_enable_h>;
63 regulator-name = "panel_regulator";
64 vin-supply = <&vcc33_sys>;
65 };
66
67 vcc18_lcd: vcc18-lcd {
68 compatible = "regulator-fixed";
69 enable-active-high;
70 gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&avdd_1v8_disp_en>;
73 regulator-name = "vcc18_lcd";
74 regulator-always-on;
75 regulator-boot-on;
76 vin-supply = <&vcc18_wl>;
77 };
78
79 backlight_regulator: backlight-regulator {
80 compatible = "regulator-fixed";
81 enable-active-high;
82 gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
83 pinctrl-names = "default";
84 pinctrl-0 = <&bl_pwr_en>;
85 regulator-name = "backlight_regulator";
86 vin-supply = <&vcc33_sys>;
87 startup-delay-us = <15000>;
88 };
89};
90
91&rk808 {
92 pinctrl-names = "default";
93 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
94 dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
95 <&gpio7 15 GPIO_ACTIVE_HIGH>;
96
97 regulators {
98 mic_vcc: LDO_REG2 {
99 regulator-name = "mic_vcc";
100 regulator-always-on;
101 regulator-boot-on;
102 regulator-min-microvolt = <1800000>;
103 regulator-max-microvolt = <1800000>;
104 regulator-state-mem {
105 regulator-off-in-suspend;
106 };
107 };
108 };
109};
110
111&sdmmc {
112 disable-wp;
113 pinctrl-names = "default";
114 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
115 &sdmmc_bus4>;
116};
117
118&vcc_5v {
119 enable-active-high;
120 gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
121 pinctrl-names = "default";
122 pinctrl-0 = <&drv_5v>;
123};
124
125&vcc50_hdmi {
126 enable-active-high;
127 gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&vcc50_hdmi_en>;
130};
131
132&pinctrl {
133 backlight {
134 bl_pwr_en: bl_pwr_en {
135 rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
136 };
137 };
138
139 buck-5v {
140 drv_5v: drv-5v {
141 rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
142 };
143 };
144
145 edp {
146 edp_hpd: edp_hpd {
147 rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
148 };
149 };
150
151 hdmi {
152 vcc50_hdmi_en: vcc50-hdmi-en {
153 rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
154 };
155 };
156
157 lcd {
158 lcd_enable_h: lcd-en {
159 rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
160 };
161
162 avdd_1v8_disp_en: avdd-1v8-disp-en {
163 rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
164 };
165 };
166
167 pmic {
168 dvs_1: dvs-1 {
169 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
170 };
171
172 dvs_2: dvs-2 {
173 rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
174 };
175 };
176};
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 2fa7a0dc83f7..d4263ed7031c 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -158,6 +158,7 @@
158}; 158};
159 159
160&hdmi { 160&hdmi {
161 ddc-i2c-bus = <&i2c5>;
161 status = "okay"; 162 status = "okay";
162}; 163};
163 164
@@ -543,18 +544,6 @@
543 }; 544 };
544 }; 545 };
545 546
546 /*
547 * On Marvell-based hardware this is a no-connect. Make sure we enable
548 * the pullup so that the line doesn't float. The pullup shouldn't
549 * hurt on Broadcom-based hardware since the other side is actively
550 * driving this signal. As proof: we've already got a pullup on RX.
551 */
552 uart0 {
553 uart0_cts: uart0-cts {
554 rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_up>;
555 };
556 };
557
558 write-protect { 547 write-protect {
559 fw_wp_ap: fw-wp-ap { 548 fw_wp_ap: fw-wp-ap {
560 rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>; 549 rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 906e938fb6bf..12ae3450be54 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -44,6 +44,7 @@
44#include <dt-bindings/pinctrl/rockchip.h> 44#include <dt-bindings/pinctrl/rockchip.h>
45#include <dt-bindings/clock/rk3288-cru.h> 45#include <dt-bindings/clock/rk3288-cru.h>
46#include <dt-bindings/thermal/thermal.h> 46#include <dt-bindings/thermal/thermal.h>
47#include <dt-bindings/power/rk3288-power.h>
47#include "skeleton.dtsi" 48#include "skeleton.dtsi"
48 49
49/ { 50/ {
@@ -613,8 +614,98 @@
613 }; 614 };
614 615
615 pmu: power-management@ff730000 { 616 pmu: power-management@ff730000 {
616 compatible = "rockchip,rk3288-pmu", "syscon"; 617 compatible = "rockchip,rk3288-pmu", "syscon", "simple-mfd";
617 reg = <0xff730000 0x100>; 618 reg = <0xff730000 0x100>;
619
620 power: power-controller {
621 compatible = "rockchip,rk3288-power-controller";
622 #power-domain-cells = <1>;
623 #address-cells = <1>;
624 #size-cells = <0>;
625
626 /*
627 * Note: Although SCLK_* are the working clocks
628 * of device without including on the NOC, needed for
629 * synchronous reset.
630 *
631 * The clocks on the which NOC:
632 * ACLK_IEP/ACLK_VIP/ACLK_VOP0 are on ACLK_VIO0_NIU.
633 * ACLK_ISP/ACLK_VOP1 are on ACLK_VIO1_NIU.
634 * ACLK_RGA is on ACLK_RGA_NIU.
635 * The others (HCLK_*,PLCK_*) are on HCLK_VIO_NIU.
636 *
637 * Which clock are device clocks:
638 * clocks devices
639 * *_IEP IEP:Image Enhancement Processor
640 * *_ISP ISP:Image Signal Processing
641 * *_VIP VIP:Video Input Processor
642 * *_VOP* VOP:Visual Output Processor
643 * *_RGA RGA
644 * *_EDP* EDP
645 * *_LVDS_* LVDS
646 * *_HDMI HDMI
647 * *_MIPI_* MIPI
648 */
649 pd_vio {
650 reg = <RK3288_PD_VIO>;
651 clocks = <&cru ACLK_IEP>,
652 <&cru ACLK_ISP>,
653 <&cru ACLK_RGA>,
654 <&cru ACLK_VIP>,
655 <&cru ACLK_VOP0>,
656 <&cru ACLK_VOP1>,
657 <&cru DCLK_VOP0>,
658 <&cru DCLK_VOP1>,
659 <&cru HCLK_IEP>,
660 <&cru HCLK_ISP>,
661 <&cru HCLK_RGA>,
662 <&cru HCLK_VIP>,
663 <&cru HCLK_VOP0>,
664 <&cru HCLK_VOP1>,
665 <&cru PCLK_EDP_CTRL>,
666 <&cru PCLK_HDMI_CTRL>,
667 <&cru PCLK_LVDS_PHY>,
668 <&cru PCLK_MIPI_CSI>,
669 <&cru PCLK_MIPI_DSI0>,
670 <&cru PCLK_MIPI_DSI1>,
671 <&cru SCLK_EDP_24M>,
672 <&cru SCLK_EDP>,
673 <&cru SCLK_ISP_JPE>,
674 <&cru SCLK_ISP>,
675 <&cru SCLK_RGA>;
676 };
677
678 /*
679 * Note: The following 3 are HEVC(H.265) clocks,
680 * and on the ACLK_HEVC_NIU (NOC).
681 */
682 pd_hevc {
683 reg = <RK3288_PD_HEVC>;
684 clocks = <&cru ACLK_HEVC>,
685 <&cru SCLK_HEVC_CABAC>,
686 <&cru SCLK_HEVC_CORE>;
687 };
688
689 /*
690 * Note: ACLK_VCODEC/HCLK_VCODEC are VCODEC
691 * (video endecoder & decoder) clocks that on the
692 * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
693 */
694 pd_video {
695 reg = <RK3288_PD_VIDEO>;
696 clocks = <&cru ACLK_VCODEC>,
697 <&cru HCLK_VCODEC>;
698 };
699
700 /*
701 * Note: ACLK_GPU is the GPU clock,
702 * and on the ACLK_GPU_NIU (NOC).
703 */
704 pd_gpu {
705 reg = <RK3288_PD_GPU>;
706 clocks = <&cru ACLK_GPU>;
707 };
708 };
618 }; 709 };
619 710
620 sgrf: syscon@ff740000 { 711 sgrf: syscon@ff740000 {
@@ -653,6 +744,21 @@
653 status = "disabled"; 744 status = "disabled";
654 }; 745 };
655 746
747 spdif: sound@ff88b0000 {
748 compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
749 reg = <0xff8b0000 0x10000>;
750 #sound-dai-cells = <0>;
751 clock-names = "hclk", "mclk";
752 clocks = <&cru HCLK_SPDIF8CH>, <&cru SCLK_SPDIF8CH>;
753 dmas = <&dmac_bus_s 3>;
754 dma-names = "tx";
755 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
756 pinctrl-names = "default";
757 pinctrl-0 = <&spdif_tx>;
758 rockchip,grf = <&grf>;
759 status = "disabled";
760 };
761
656 i2s: i2s@ff890000 { 762 i2s: i2s@ff890000 {
657 compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; 763 compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
658 reg = <0xff890000 0x10000>; 764 reg = <0xff890000 0x10000>;
@@ -674,6 +780,7 @@
674 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 780 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
675 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; 781 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
676 clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; 782 clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
783 power-domains = <&power RK3288_PD_VIO>;
677 resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; 784 resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
678 reset-names = "axi", "ahb", "dclk"; 785 reset-names = "axi", "ahb", "dclk";
679 iommus = <&vopb_mmu>; 786 iommus = <&vopb_mmu>;
@@ -695,6 +802,7 @@
695 reg = <0xff930300 0x100>; 802 reg = <0xff930300 0x100>;
696 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 803 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
697 interrupt-names = "vopb_mmu"; 804 interrupt-names = "vopb_mmu";
805 power-domains = <&power RK3288_PD_VIO>;
698 #iommu-cells = <0>; 806 #iommu-cells = <0>;
699 status = "disabled"; 807 status = "disabled";
700 }; 808 };
@@ -705,6 +813,7 @@
705 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 813 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
706 clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; 814 clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
707 clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; 815 clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
816 power-domains = <&power RK3288_PD_VIO>;
708 resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>; 817 resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
709 reset-names = "axi", "ahb", "dclk"; 818 reset-names = "axi", "ahb", "dclk";
710 iommus = <&vopl_mmu>; 819 iommus = <&vopl_mmu>;
@@ -726,6 +835,7 @@
726 reg = <0xff940300 0x100>; 835 reg = <0xff940300 0x100>;
727 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 836 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
728 interrupt-names = "vopl_mmu"; 837 interrupt-names = "vopl_mmu";
838 power-domains = <&power RK3288_PD_VIO>;
729 #iommu-cells = <0>; 839 #iommu-cells = <0>;
730 status = "disabled"; 840 status = "disabled";
731 }; 841 };
@@ -738,6 +848,7 @@
738 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 848 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
739 clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>; 849 clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
740 clock-names = "iahb", "isfr"; 850 clock-names = "iahb", "isfr";
851 power-domains = <&power RK3288_PD_VIO>;
741 status = "disabled"; 852 status = "disabled";
742 853
743 ports { 854 ports {
@@ -923,6 +1034,13 @@
923 #interrupt-cells = <2>; 1034 #interrupt-cells = <2>;
924 }; 1035 };
925 1036
1037 hdmi {
1038 hdmi_ddc: hdmi-ddc {
1039 rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>,
1040 <7 20 RK_FUNC_2 &pcfg_pull_none>;
1041 };
1042 };
1043
926 pcfg_pull_up: pcfg-pull-up { 1044 pcfg_pull_up: pcfg-pull-up {
927 bias-pull-up; 1045 bias-pull-up;
928 }; 1046 };
@@ -1211,7 +1329,7 @@
1211 }; 1329 };
1212 1330
1213 uart0_cts: uart0-cts { 1331 uart0_cts: uart0-cts {
1214 rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_none>; 1332 rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_up>;
1215 }; 1333 };
1216 1334
1217 uart0_rts: uart0-rts { 1335 uart0_rts: uart0-rts {
@@ -1226,7 +1344,7 @@
1226 }; 1344 };
1227 1345
1228 uart1_cts: uart1-cts { 1346 uart1_cts: uart1-cts {
1229 rockchip,pins = <5 10 RK_FUNC_1 &pcfg_pull_none>; 1347 rockchip,pins = <5 10 RK_FUNC_1 &pcfg_pull_up>;
1230 }; 1348 };
1231 1349
1232 uart1_rts: uart1-rts { 1350 uart1_rts: uart1-rts {
@@ -1249,7 +1367,7 @@
1249 }; 1367 };
1250 1368
1251 uart3_cts: uart3-cts { 1369 uart3_cts: uart3-cts {
1252 rockchip,pins = <7 9 RK_FUNC_1 &pcfg_pull_none>; 1370 rockchip,pins = <7 9 RK_FUNC_1 &pcfg_pull_up>;
1253 }; 1371 };
1254 1372
1255 uart3_rts: uart3-rts { 1373 uart3_rts: uart3-rts {
@@ -1264,7 +1382,7 @@
1264 }; 1382 };
1265 1383
1266 uart4_cts: uart4-cts { 1384 uart4_cts: uart4-cts {
1267 rockchip,pins = <5 14 3 &pcfg_pull_none>; 1385 rockchip,pins = <5 14 3 &pcfg_pull_up>;
1268 }; 1386 };
1269 1387
1270 uart4_rts: uart4-rts { 1388 uart4_rts: uart4-rts {
@@ -1334,5 +1452,11 @@
1334 <4 3 3 &pcfg_pull_none>; 1452 <4 3 3 &pcfg_pull_none>;
1335 }; 1453 };
1336 }; 1454 };
1455
1456 spdif {
1457 spdif_tx: spdif-tx {
1458 rockchip,pins = <RK_GPIO6 11 RK_FUNC_1 &pcfg_pull_none>;
1459 };
1460 };
1337 }; 1461 };
1338}; 1462};
diff --git a/arch/arm/boot/dts/s3c2416.dtsi b/arch/arm/boot/dts/s3c2416.dtsi
index a5184ff56933..80f007550324 100644
--- a/arch/arm/boot/dts/s3c2416.dtsi
+++ b/arch/arm/boot/dts/s3c2416.dtsi
@@ -25,7 +25,7 @@
25 #size-cells = <0>; 25 #size-cells = <0>;
26 26
27 cpu { 27 cpu {
28 compatible = "arm,arm926ejs"; 28 compatible = "arm,arm926ej-s";
29 }; 29 };
30 }; 30 };
31 31
diff --git a/arch/arm/boot/dts/s5pv210-aquila.dts b/arch/arm/boot/dts/s5pv210-aquila.dts
index f00cea7aca2f..aa64faa72970 100644
--- a/arch/arm/boot/dts/s5pv210-aquila.dts
+++ b/arch/arm/boot/dts/s5pv210-aquila.dts
@@ -46,7 +46,7 @@
46 regulator-name = "V_TF_2.8V"; 46 regulator-name = "V_TF_2.8V";
47 regulator-min-microvolt = <2800000>; 47 regulator-min-microvolt = <2800000>;
48 regulator-max-microvolt = <2800000>; 48 regulator-max-microvolt = <2800000>;
49 gpios = <&mp05 4 0>; 49 gpio = <&mp05 4 0>;
50 enable-active-high; 50 enable-active-high;
51 }; 51 };
52 52
diff --git a/arch/arm/boot/dts/s5pv210-goni.dts b/arch/arm/boot/dts/s5pv210-goni.dts
index a3d4643b202e..3b76eeeb8410 100644
--- a/arch/arm/boot/dts/s5pv210-goni.dts
+++ b/arch/arm/boot/dts/s5pv210-goni.dts
@@ -47,7 +47,7 @@
47 regulator-min-microvolt = <2800000>; 47 regulator-min-microvolt = <2800000>;
48 regulator-max-microvolt = <2800000>; 48 regulator-max-microvolt = <2800000>;
49 reg = <0>; 49 reg = <0>;
50 gpios = <&mp05 4 0>; 50 gpio = <&mp05 4 0>;
51 enable-active-high; 51 enable-active-high;
52 }; 52 };
53 53
@@ -73,7 +73,7 @@
73 regulator-min-microvolt = <2800000>; 73 regulator-min-microvolt = <2800000>;
74 regulator-max-microvolt = <2800000>; 74 regulator-max-microvolt = <2800000>;
75 reg = <3>; 75 reg = <3>;
76 gpios = <&gpj1 3 0>; 76 gpio = <&gpj1 3 0>;
77 enable-active-high; 77 enable-active-high;
78 }; 78 };
79 }; 79 };
diff --git a/arch/arm/boot/dts/sama5d2-pinfunc.h b/arch/arm/boot/dts/sama5d2-pinfunc.h
new file mode 100644
index 000000000000..1afe24629d1f
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d2-pinfunc.h
@@ -0,0 +1,880 @@
1#define PINMUX_PIN(no, func, ioset) \
2(((no) & 0xffff) | (((func) & 0xf) << 16) | (((ioset) & 0xff) << 20))
3
4#define PIN_PA0 0
5#define PIN_PA0__GPIO PINMUX_PIN(PIN_PA0, 0, 0)
6#define PIN_PA0__SDMMC0_CK PINMUX_PIN(PIN_PA0, 1, 1)
7#define PIN_PA0__QSPI0_SCK PINMUX_PIN(PIN_PA0, 2, 1)
8#define PIN_PA0__D0 PINMUX_PIN(PIN_PA0, 6, 2)
9#define PIN_PA1 1
10#define PIN_PA1__GPIO PINMUX_PIN(PIN_PA1, 0, 0)
11#define PIN_PA1__SDMMC0_CMD PINMUX_PIN(PIN_PA1, 1, 1)
12#define PIN_PA1__QSPI0_CS PINMUX_PIN(PIN_PA1, 2, 1)
13#define PIN_PA1__D1 PINMUX_PIN(PIN_PA1, 6, 2)
14#define PIN_PA2 2
15#define PIN_PA2__GPIO PINMUX_PIN(PIN_PA2, 0, 0)
16#define PIN_PA2__SDMMC0_DAT0 PINMUX_PIN(PIN_PA2, 1, 1)
17#define PIN_PA2__QSPI0_IO0 PINMUX_PIN(PIN_PA2, 2, 1)
18#define PIN_PA2__D2 PINMUX_PIN(PIN_PA2, 6, 2)
19#define PIN_PA3 3
20#define PIN_PA3__GPIO PINMUX_PIN(PIN_PA3, 0, 0)
21#define PIN_PA3__SDMMC0_DAT1 PINMUX_PIN(PIN_PA3, 1, 1)
22#define PIN_PA3__QSPI0_IO1 PINMUX_PIN(PIN_PA3, 2, 1)
23#define PIN_PA3__D3 PINMUX_PIN(PIN_PA3, 6, 2)
24#define PIN_PA4 4
25#define PIN_PA4__GPIO PINMUX_PIN(PIN_PA4, 0, 0)
26#define PIN_PA4__SDMMC0_DAT2 PINMUX_PIN(PIN_PA4, 1, 1)
27#define PIN_PA4__QSPI0_IO2 PINMUX_PIN(PIN_PA4, 2, 1)
28#define PIN_PA4__D4 PINMUX_PIN(PIN_PA4, 6, 2)
29#define PIN_PA5 5
30#define PIN_PA5__GPIO PINMUX_PIN(PIN_PA5, 0, 0)
31#define PIN_PA5__SDMMC0_DAT3 PINMUX_PIN(PIN_PA5, 1, 1)
32#define PIN_PA5__QSPI0_IO3 PINMUX_PIN(PIN_PA5, 2, 1)
33#define PIN_PA5__D5 PINMUX_PIN(PIN_PA5, 6, 2)
34#define PIN_PA6 6
35#define PIN_PA6__GPIO PINMUX_PIN(PIN_PA6, 0, 0)
36#define PIN_PA6__SDMMC0_DAT4 PINMUX_PIN(PIN_PA6, 1, 1)
37#define PIN_PA6__QSPI1_SCK PINMUX_PIN(PIN_PA6, 2, 1)
38#define PIN_PA6__TIOA5 PINMUX_PIN(PIN_PA6, 4, 1)
39#define PIN_PA6__FLEXCOM2_IO0 PINMUX_PIN(PIN_PA6, 5, 1)
40#define PIN_PA6__D6 PINMUX_PIN(PIN_PA6, 6, 2)
41#define PIN_PA7 7
42#define PIN_PA7__GPIO PINMUX_PIN(PIN_PA7, 0, 0)
43#define PIN_PA7__SDMMC0_DAT5 PINMUX_PIN(PIN_PA7, 1, 1)
44#define PIN_PA7__QSPI1_IO0 PINMUX_PIN(PIN_PA7, 2, 1)
45#define PIN_PA7__TIOB5 PINMUX_PIN(PIN_PA7, 4, 1)
46#define PIN_PA7__FLEXCOM2_IO1 PINMUX_PIN(PIN_PA7, 5, 1)
47#define PIN_PA7__D7 PINMUX_PIN(PIN_PA7, 6, 2)
48#define PIN_PA8 8
49#define PIN_PA8__GPIO PINMUX_PIN(PIN_PA8, 0, 0)
50#define PIN_PA8__SDMMC0_DAT6 PINMUX_PIN(PIN_PA8, 1, 1)
51#define PIN_PA8__QSPI1_IO1 PINMUX_PIN(PIN_PA8, 2, 1)
52#define PIN_PA8__TCLK5 PINMUX_PIN(PIN_PA8, 4, 1)
53#define PIN_PA8__FLEXCOM2_IO2 PINMUX_PIN(PIN_PA8, 5, 1)
54#define PIN_PA8__NWE_NANDWE PINMUX_PIN(PIN_PA8, 6, 2)
55#define PIN_PA9 9
56#define PIN_PA9__GPIO PINMUX_PIN(PIN_PA9, 0, 0)
57#define PIN_PA9__SDMMC0_DAT7 PINMUX_PIN(PIN_PA9, 1, 1)
58#define PIN_PA9__QSPI1_IO2 PINMUX_PIN(PIN_PA9, 2, 1)
59#define PIN_PA9__TIOA4 PINMUX_PIN(PIN_PA9, 4, 1)
60#define PIN_PA9__FLEXCOM2_IO3 PINMUX_PIN(PIN_PA9, 5, 1)
61#define PIN_PA9__NCS3 PINMUX_PIN(PIN_PA9, 6, 2)
62#define PIN_PA10 10
63#define PIN_PA10__GPIO PINMUX_PIN(PIN_PA10, 0, 0)
64#define PIN_PA10__SDMMC0_RSTN PINMUX_PIN(PIN_PA10, 1, 1)
65#define PIN_PA10__QSPI1_IO3 PINMUX_PIN(PIN_PA10, 2, 1)
66#define PIN_PA10__TIOB4 PINMUX_PIN(PIN_PA10, 4, 1)
67#define PIN_PA10__FLEXCOM2_IO4 PINMUX_PIN(PIN_PA10, 5, 1)
68#define PIN_PA10__A21_NANDALE PINMUX_PIN(PIN_PA10, 6, 2)
69#define PIN_PA11 11
70#define PIN_PA11__GPIO PINMUX_PIN(PIN_PA11, 0, 0)
71#define PIN_PA11__SDMMC0_VDDSEL PINMUX_PIN(PIN_PA11, 1, 1)
72#define PIN_PA11__QSPI1_CS PINMUX_PIN(PIN_PA11, 2, 1)
73#define PIN_PA11__TCLK4 PINMUX_PIN(PIN_PA11, 4, 1)
74#define PIN_PA11__A22_NANDCLE PINMUX_PIN(PIN_PA11, 6, 2)
75#define PIN_PA12 12
76#define PIN_PA12__GPIO PINMUX_PIN(PIN_PA12, 0, 0)
77#define PIN_PA12__SDMMC0_WP PINMUX_PIN(PIN_PA12, 1, 1)
78#define PIN_PA12__IRQ PINMUX_PIN(PIN_PA12, 2, 1)
79#define PIN_PA12__NRD_NANDOE PINMUX_PIN(PIN_PA12, 6, 2)
80#define PIN_PA13 13
81#define PIN_PA13__GPIO PINMUX_PIN(PIN_PA13, 0, 0)
82#define PIN_PA13__SDMMC0_CD PINMUX_PIN(PIN_PA13, 1, 1)
83#define PIN_PA13__FLEXCOM3_IO1 PINMUX_PIN(PIN_PA13, 5, 1)
84#define PIN_PA13__D8 PINMUX_PIN(PIN_PA13, 6, 2)
85#define PIN_PA14 14
86#define PIN_PA14__GPIO PINMUX_PIN(PIN_PA14, 0, 0)
87#define PIN_PA14__SPI0_SPCK PINMUX_PIN(PIN_PA14, 1, 1)
88#define PIN_PA14__TK1 PINMUX_PIN(PIN_PA14, 2, 1)
89#define PIN_PA14__QSPI0_SCK PINMUX_PIN(PIN_PA14, 3, 2)
90#define PIN_PA14__I2SC1_MCK PINMUX_PIN(PIN_PA14, 4, 2)
91#define PIN_PA14__FLEXCOM3_IO2 PINMUX_PIN(PIN_PA14, 5, 1)
92#define PIN_PA14__D9 PINMUX_PIN(PIN_PA14, 6, 2)
93#define PIN_PA15 14
94#define PIN_PA15__GPIO PINMUX_PIN(PIN_PA15, 0, 0)
95#define PIN_PA15__SPI0_MOSI PINMUX_PIN(PIN_PA15, 1, 1)
96#define PIN_PA15__TF1 PINMUX_PIN(PIN_PA15, 2, 1)
97#define PIN_PA15__QSPI0_CS PINMUX_PIN(PIN_PA15, 3, 2)
98#define PIN_PA15__I2SC1_CK PINMUX_PIN(PIN_PA15, 4, 2)
99#define PIN_PA15__FLEXCOM3_IO0 PINMUX_PIN(PIN_PA15, 5, 1)
100#define PIN_PA15__D10 PINMUX_PIN(PIN_PA15, 6, 2)
101#define PIN_PA16 16
102#define PIN_PA16__GPIO PINMUX_PIN(PIN_PA16, 0, 0)
103#define PIN_PA16__SPI0_MISO PINMUX_PIN(PIN_PA16, 1, 1)
104#define PIN_PA16__TD1 PINMUX_PIN(PIN_PA16, 2, 1)
105#define PIN_PA16__QSPI0_IO0 PINMUX_PIN(PIN_PA16, 3, 2)
106#define PIN_PA16__I2SC1_WS PINMUX_PIN(PIN_PA16, 4, 2)
107#define PIN_PA16__FLEXCOM3_IO3 PINMUX_PIN(PIN_PA16, 5, 1)
108#define PIN_PA16__D11 PINMUX_PIN(PIN_PA16, 6, 2)
109#define PIN_PA17 17
110#define PIN_PA17__GPIO PINMUX_PIN(PIN_PA17, 0, 0)
111#define PIN_PA17__SPI0_NPCS0 PINMUX_PIN(PIN_PA17, 1, 1)
112#define PIN_PA17__RD1 PINMUX_PIN(PIN_PA17, 2, 1)
113#define PIN_PA17__QSPI0_IO1 PINMUX_PIN(PIN_PA17, 3, 2)
114#define PIN_PA17__I2SC1_DI0 PINMUX_PIN(PIN_PA17, 4, 2)
115#define PIN_PA17__FLEXCOM3_IO4 PINMUX_PIN(PIN_PA17, 5, 1)
116#define PIN_PA17__D12 PINMUX_PIN(PIN_PA17, 6, 2)
117#define PIN_PA18 18
118#define PIN_PA18__GPIO PINMUX_PIN(PIN_PA18, 0, 0)
119#define PIN_PA18__SPI0_NPCS1 PINMUX_PIN(PIN_PA18, 1, 1)
120#define PIN_PA18__RK1 PINMUX_PIN(PIN_PA18, 2, 1)
121#define PIN_PA18__QSPI0_IO2 PINMUX_PIN(PIN_PA18, 3, 2)
122#define PIN_PA18__I2SC1_DO0 PINMUX_PIN(PIN_PA18, 4, 2)
123#define PIN_PA18__SDMMC1_DAT0 PINMUX_PIN(PIN_PA18, 5, 1)
124#define PIN_PA18__D13 PINMUX_PIN(PIN_PA18, 6, 2)
125#define PIN_PA19 19
126#define PIN_PA19__GPIO PINMUX_PIN(PIN_PA19, 0, 0)
127#define PIN_PA19__SPI0_NPCS2 PINMUX_PIN(PIN_PA19, 1, 1)
128#define PIN_PA19__RF1 PINMUX_PIN(PIN_PA19, 2, 1)
129#define PIN_PA19__QSPI0_IO3 PINMUX_PIN(PIN_PA19, 3, 2)
130#define PIN_PA19__TIOA0 PINMUX_PIN(PIN_PA19, 4, 1)
131#define PIN_PA19__SDMMC1_DAT1 PINMUX_PIN(PIN_PA19, 5, 1)
132#define PIN_PA19__D14 PINMUX_PIN(PIN_PA19, 6, 2)
133#define PIN_PA20 20
134#define PIN_PA20__GPIO PINMUX_PIN(PIN_PA20, 0, 0)
135#define PIN_PA20__SPI0_NPCS3 PINMUX_PIN(PIN_PA20, 1, 1)
136#define PIN_PA20__TIOB0 PINMUX_PIN(PIN_PA20, 4, 1)
137#define PIN_PA20__SDMMC1_DAT2 PINMUX_PIN(PIN_PA20, 5, 1)
138#define PIN_PA20__D15 PINMUX_PIN(PIN_PA20, 6, 2)
139#define PIN_PA21 21
140#define PIN_PA21__GPIO PINMUX_PIN(PIN_PA21, 0, 0)
141#define PIN_PA21__IRQ PINMUX_PIN(PIN_PA21, 1, 2)
142#define PIN_PA21__PCK2 PINMUX_PIN(PIN_PA21, 2, 3)
143#define PIN_PA21__TCLK0 PINMUX_PIN(PIN_PA21, 4, 1)
144#define PIN_PA21__SDMMC1_DAT3 PINMUX_PIN(PIN_PA21, 5, 1)
145#define PIN_PA21__NANDRDY PINMUX_PIN(PIN_PA21, 6, 2)
146#define PIN_PA22 22
147#define PIN_PA22__GPIO PINMUX_PIN(PIN_PA22, 0, 0)
148#define PIN_PA22__FLEXCOM1_IO2 PINMUX_PIN(PIN_PA22, 1, 1)
149#define PIN_PA22__D0 PINMUX_PIN(PIN_PA22, 2, 1)
150#define PIN_PA22__TCK PINMUX_PIN(PIN_PA22, 3, 4)
151#define PIN_PA22__SPI1_SPCK PINMUX_PIN(PIN_PA22, 4, 2)
152#define PIN_PA22__SDMMC1_CK PINMUX_PIN(PIN_PA22, 5, 1)
153#define PIN_PA22__QSPI0_SCK PINMUX_PIN(PIN_PA22, 6, 3)
154#define PIN_PA23 23
155#define PIN_PA23__GPIO PINMUX_PIN(PIN_PA23, 0, 0)
156#define PIN_PA23__FLEXCOM1_IO1 PINMUX_PIN(PIN_PA23, 1, 1)
157#define PIN_PA23__D1 PINMUX_PIN(PIN_PA23, 2, 1)
158#define PIN_PA23__TDI PINMUX_PIN(PIN_PA23, 3, 4)
159#define PIN_PA23__SPI1_MOSI PINMUX_PIN(PIN_PA23, 4, 2)
160#define PIN_PA23__QSPI0_CS PINMUX_PIN(PIN_PA23, 6, 3)
161#define PIN_PA24 24
162#define PIN_PA24__GPIO PINMUX_PIN(PIN_PA24, 0, 0)
163#define PIN_PA24__FLEXCOM1_IO0 PINMUX_PIN(PIN_PA24, 1, 1)
164#define PIN_PA24__D2 PINMUX_PIN(PIN_PA24, 2, 1)
165#define PIN_PA24__TDO PINMUX_PIN(PIN_PA24, 3, 4)
166#define PIN_PA24__SPI1_MISO PINMUX_PIN(PIN_PA24, 4, 2)
167#define PIN_PA24__QSPI0_IO0 PINMUX_PIN(PIN_PA24, 6, 3)
168#define PIN_PA25 25
169#define PIN_PA25__GPIO PINMUX_PIN(PIN_PA25, 0, 0)
170#define PIN_PA25__FLEXCOM1_IO3 PINMUX_PIN(PIN_PA25, 1, 1)
171#define PIN_PA25__D3 PINMUX_PIN(PIN_PA25, 2, 1)
172#define PIN_PA25__TMS PINMUX_PIN(PIN_PA25, 3, 4)
173#define PIN_PA25__SPI1_NPCS0 PINMUX_PIN(PIN_PA25, 4, 2)
174#define PIN_PA25__QSPI0_IO1 PINMUX_PIN(PIN_PA25, 6, 3)
175#define PIN_PA26 26
176#define PIN_PA26__GPIO PINMUX_PIN(PIN_PA26, 0, 0)
177#define PIN_PA26__FLEXCOM1_IO4 PINMUX_PIN(PIN_PA26, 1, 1)
178#define PIN_PA26__D4 PINMUX_PIN(PIN_PA26, 2, 1)
179#define PIN_PA26__NTRST PINMUX_PIN(PIN_PA26, 3, 4)
180#define PIN_PA26__SPI1_NPCS1 PINMUX_PIN(PIN_PA26, 4, 2)
181#define PIN_PA26__QSPI0_IO2 PINMUX_PIN(PIN_PA26, 6, 3)
182#define PIN_PA27 27
183#define PIN_PA27__GPIO PINMUX_PIN(PIN_PA27, 0, 0)
184#define PIN_PA27__TIOA1 PINMUX_PIN(PIN_PA27, 1, 2)
185#define PIN_PA27__D5 PINMUX_PIN(PIN_PA27, 2, 1)
186#define PIN_PA27__SPI0_NPCS2 PINMUX_PIN(PIN_PA27, 3, 2)
187#define PIN_PA27__SPI1_NPCS2 PINMUX_PIN(PIN_PA27, 4, 2)
188#define PIN_PA27__SDMMC1_RSTN PINMUX_PIN(PIN_PA27, 5, 1)
189#define PIN_PA27__QSPI0_IO3 PINMUX_PIN(PIN_PA27, 6, 3)
190#define PIN_PA28 28
191#define PIN_PA28__GPIO PINMUX_PIN(PIN_PA28, 0, 0)
192#define PIN_PA28__TIOB1 PINMUX_PIN(PIN_PA28, 1, 2)
193#define PIN_PA28__D6 PINMUX_PIN(PIN_PA28, 2, 1)
194#define PIN_PA28__SPI0_NPCS3 PINMUX_PIN(PIN_PA28, 3, 2)
195#define PIN_PA28__SPI1_NPCS3 PINMUX_PIN(PIN_PA28, 4, 2)
196#define PIN_PA28__SDMMC1_CMD PINMUX_PIN(PIN_PA28, 5, 1)
197#define PIN_PA28__CLASSD_L0 PINMUX_PIN(PIN_PA28, 6, 1)
198#define PIN_PA29 29
199#define PIN_PA29__GPIO PINMUX_PIN(PIN_PA29, 0, 0)
200#define PIN_PA29__TCLK1 PINMUX_PIN(PIN_PA29, 1, 2)
201#define PIN_PA29__D7 PINMUX_PIN(PIN_PA29, 2, 1)
202#define PIN_PA29__SPI0_NPCS1 PINMUX_PIN(PIN_PA29, 3, 2)
203#define PIN_PA29__SDMMC1_WP PINMUX_PIN(PIN_PA29, 5, 1)
204#define PIN_PA29__CLASSD_L1 PINMUX_PIN(PIN_PA29, 6, 1)
205#define PIN_PA30 30
206#define PIN_PA30__GPIO PINMUX_PIN(PIN_PA30, 0, 0)
207#define PIN_PA30__NWE_NANDWE PINMUX_PIN(PIN_PA30, 2, 1)
208#define PIN_PA30__SPI0_NPCS0 PINMUX_PIN(PIN_PA30, 3, 2)
209#define PIN_PA30__PWMH0 PINMUX_PIN(PIN_PA30, 4, 1)
210#define PIN_PA30__SDMMC1_CD PINMUX_PIN(PIN_PA30, 5, 1)
211#define PIN_PA30__CLASSD_L2 PINMUX_PIN(PIN_PA30, 6, 1)
212#define PIN_PA31 31
213#define PIN_PA31__GPIO PINMUX_PIN(PIN_PA31, 0, 0)
214#define PIN_PA31__NCS3 PINMUX_PIN(PIN_PA31, 2, 1)
215#define PIN_PA31__SPI0_MISO PINMUX_PIN(PIN_PA31, 3, 2)
216#define PIN_PA31__PWML0 PINMUX_PIN(PIN_PA31, 4, 1)
217#define PIN_PA31__CLASSD_L3 PINMUX_PIN(PIN_PA31, 6, 1)
218#define PIN_PB0 32
219#define PIN_PB0__GPIO PINMUX_PIN(PIN_PB0, 0, 0)
220#define PIN_PB0__A21_NANDALE PINMUX_PIN(PIN_PB0, 2, 1)
221#define PIN_PB0__SPI0_MOSI PINMUX_PIN(PIN_PB0, 3, 2)
222#define PIN_PB0__PWMH1 PINMUX_PIN(PIN_PB0, 4, 1)
223#define PIN_PB1 33
224#define PIN_PB1__GPIO PINMUX_PIN(PIN_PB1, 0, 0)
225#define PIN_PB1__A22_NANDCLE PINMUX_PIN(PIN_PB1, 2, 1)
226#define PIN_PB1__SPI0_SPCK PINMUX_PIN(PIN_PB1, 3, 2)
227#define PIN_PB1__PWML1 PINMUX_PIN(PIN_PB1, 4, 1)
228#define PIN_PB1__CLASSD_R0 PINMUX_PIN(PIN_PB1, 6, 1)
229#define PIN_PB2 34
230#define PIN_PB2__GPIO PINMUX_PIN(PIN_PB2, 0, 0)
231#define PIN_PB2__NRD_NANDOE PINMUX_PIN(PIN_PB2, 2, 1)
232#define PIN_PB2__PWMFI0 PINMUX_PIN(PIN_PB2, 4, 1)
233#define PIN_PB2__CLASSD_R1 PINMUX_PIN(PIN_PB2, 6, 1)
234#define PIN_PB3 35
235#define PIN_PB3__GPIO PINMUX_PIN(PIN_PB3, 0, 0)
236#define PIN_PB3__URXD4 PINMUX_PIN(PIN_PB3, 1, 1)
237#define PIN_PB3__D8 PINMUX_PIN(PIN_PB3, 2, 1)
238#define PIN_PB3__IRQ PINMUX_PIN(PIN_PB3, 3, 3)
239#define PIN_PB3__PWMEXTRG0 PINMUX_PIN(PIN_PB3, 4, 1)
240#define PIN_PB3__CLASSD_R2 PINMUX_PIN(PIN_PB3, 6, 1)
241#define PIN_PB4 36
242#define PIN_PB4__GPIO PINMUX_PIN(PIN_PB4, 0, 0)
243#define PIN_PB4__UTXD4 PINMUX_PIN(PIN_PB4, 1, 1)
244#define PIN_PB4__D9 PINMUX_PIN(PIN_PB4, 2, 1)
245#define PIN_PB4__FIQ PINMUX_PIN(PIN_PB4, 3, 4)
246#define PIN_PB4__CLASSD_R3 PINMUX_PIN(PIN_PB4, 6, 1)
247#define PIN_PB5 37
248#define PIN_PB5__GPIO PINMUX_PIN(PIN_PB5, 0, 0)
249#define PIN_PB5__TCLK2 PINMUX_PIN(PIN_PB5, 1, 1)
250#define PIN_PB5__D10 PINMUX_PIN(PIN_PB5, 2, 1)
251#define PIN_PB5__PWMH2 PINMUX_PIN(PIN_PB5, 3, 1)
252#define PIN_PB5__QSPI1_SCK PINMUX_PIN(PIN_PB5, 4, 2)
253#define PIN_PB5__GTSUCOMP PINMUX_PIN(PIN_PB5, 6, 3)
254#define PIN_PB6 38
255#define PIN_PB6__GPIO PINMUX_PIN(PIN_PB6, 0, 0)
256#define PIN_PB6__TIOA2 PINMUX_PIN(PIN_PB6, 1, 1)
257#define PIN_PB6__D11 PINMUX_PIN(PIN_PB6, 2, 1)
258#define PIN_PB6__PWML2 PINMUX_PIN(PIN_PB6, 3, 1)
259#define PIN_PB6__QSPI1_CS PINMUX_PIN(PIN_PB6, 4, 2)
260#define PIN_PB6__GTXER PINMUX_PIN(PIN_PB6, 6, 3)
261#define PIN_PB7 39
262#define PIN_PB7__GPIO PINMUX_PIN(PIN_PB7, 0, 0)
263#define PIN_PB7__TIOB2 PINMUX_PIN(PIN_PB7, 1, 1)
264#define PIN_PB7__D12 PINMUX_PIN(PIN_PB7, 2, 1)
265#define PIN_PB7__PWMH3 PINMUX_PIN(PIN_PB7, 3, 1)
266#define PIN_PB7__QSPI1_IO0 PINMUX_PIN(PIN_PB7, 4, 2)
267#define PIN_PB7__GRXCK PINMUX_PIN(PIN_PB7, 6, 3)
268#define PIN_PB8 40
269#define PIN_PB8__GPIO PINMUX_PIN(PIN_PB8, 0, 0)
270#define PIN_PB8__TCLK3 PINMUX_PIN(PIN_PB8, 1, 1)
271#define PIN_PB8__D13 PINMUX_PIN(PIN_PB8, 2, 1)
272#define PIN_PB8__PWML3 PINMUX_PIN(PIN_PB8, 3, 1)
273#define PIN_PB8__QSPI1_IO1 PINMUX_PIN(PIN_PB8, 4, 2)
274#define PIN_PB8__GCRS PINMUX_PIN(PIN_PB8, 6, 3)
275#define PIN_PB9 41
276#define PIN_PB9__GPIO PINMUX_PIN(PIN_PB9, 0, 0)
277#define PIN_PB9__TIOA3 PINMUX_PIN(PIN_PB9, 1, 1)
278#define PIN_PB9__D14 PINMUX_PIN(PIN_PB9, 2, 1)
279#define PIN_PB9__PWMFI1 PINMUX_PIN(PIN_PB9, 3, 1)
280#define PIN_PB9__QSPI1_IO2 PINMUX_PIN(PIN_PB9, 4, 2)
281#define PIN_PB9__GCOL PINMUX_PIN(PIN_PB9, 6, 3)
282#define PIN_PB10 42
283#define PIN_PB10__GPIO PINMUX_PIN(PIN_PB10, 0, 0)
284#define PIN_PB10__TIOB3 PINMUX_PIN(PIN_PB10, 1, 1)
285#define PIN_PB10__D15 PINMUX_PIN(PIN_PB10, 2, 1)
286#define PIN_PB10__PWMEXTRG1 PINMUX_PIN(PIN_PB10, 3, 1)
287#define PIN_PB10__QSPI1_IO3 PINMUX_PIN(PIN_PB10, 4, 2)
288#define PIN_PB10__GRX2 PINMUX_PIN(PIN_PB10, 6, 3)
289#define PIN_PB11 43
290#define PIN_PB11__GPIO PINMUX_PIN(PIN_PB11, 0, 0)
291#define PIN_PB11__LCDDAT0 PINMUX_PIN(PIN_PB11, 1, 1)
292#define PIN_PB11__A0_NBS0 PINMUX_PIN(PIN_PB11, 2, 1)
293#define PIN_PB11__URXD3 PINMUX_PIN(PIN_PB11, 3, 3)
294#define PIN_PB11__PDMIC_DAT PINMUX_PIN(PIN_PB11, 4, 2)
295#define PIN_PB11__GRX3 PINMUX_PIN(PIN_PB11, 6, 3)
296#define PIN_PB12 44
297#define PIN_PB12__GPIO PINMUX_PIN(PIN_PB12, 0, 0)
298#define PIN_PB12__LCDDAT1 PINMUX_PIN(PIN_PB12, 1, 1)
299#define PIN_PB12__A1 PINMUX_PIN(PIN_PB12, 2, 1)
300#define PIN_PB12__UTXD3 PINMUX_PIN(PIN_PB12, 3, 3)
301#define PIN_PB12__PDMIC_CLK PINMUX_PIN(PIN_PB12, 4, 2)
302#define PIN_PB12__GTX2 PINMUX_PIN(PIN_PB12, 6, 3)
303#define PIN_PB13 45
304#define PIN_PB13__GPIO PINMUX_PIN(PIN_PB13, 0, 0)
305#define PIN_PB13__LCDDAT2 PINMUX_PIN(PIN_PB13, 1, 1)
306#define PIN_PB13__A2 PINMUX_PIN(PIN_PB13, 2, 1)
307#define PIN_PB13__PCK1 PINMUX_PIN(PIN_PB13, 3, 3)
308#define PIN_PB13__GTX3 PINMUX_PIN(PIN_PB13, 6, 3)
309#define PIN_PB14 46
310#define PIN_PB14__GPIO PINMUX_PIN(PIN_PB14, 0, 0)
311#define PIN_PB14__LCDDAT3 PINMUX_PIN(PIN_PB14, 1, 1)
312#define PIN_PB14__A3 PINMUX_PIN(PIN_PB14, 2, 1)
313#define PIN_PB14__TK1 PINMUX_PIN(PIN_PB14, 3, 2)
314#define PIN_PB14__I2SC1_MCK PINMUX_PIN(PIN_PB14, 4, 1)
315#define PIN_PB14__QSPI1_SCK PINMUX_PIN(PIN_PB14, 5, 3)
316#define PIN_PB14__GTXCK PINMUX_PIN(PIN_PB14, 6, 3)
317#define PIN_PB15 47
318#define PIN_PB15__GPIO PINMUX_PIN(PIN_PB15, 0, 0)
319#define PIN_PB15__LCDDAT4 PINMUX_PIN(PIN_PB15, 1, 1)
320#define PIN_PB15__A4 PINMUX_PIN(PIN_PB15, 2, 1)
321#define PIN_PB15__TF1 PINMUX_PIN(PIN_PB15, 3, 2)
322#define PIN_PB15__I2SC1_CK PINMUX_PIN(PIN_PB15, 4, 1)
323#define PIN_PB15__QSPI1_CS PINMUX_PIN(PIN_PB15, 5, 3)
324#define PIN_PB15__GTXEN PINMUX_PIN(PIN_PB15, 6, 3)
325#define PIN_PB16 48
326#define PIN_PB16__GPIO PINMUX_PIN(PIN_PB16, 0, 0)
327#define PIN_PB16__LCDDAT5 PINMUX_PIN(PIN_PB16, 1, 1)
328#define PIN_PB16__A5 PINMUX_PIN(PIN_PB16, 2, 1)
329#define PIN_PB16__TD1 PINMUX_PIN(PIN_PB16, 3, 2)
330#define PIN_PB16__I2SC1_WS PINMUX_PIN(PIN_PB16, 4, 1)
331#define PIN_PB16__QSPI1_IO0 PINMUX_PIN(PIN_PB16, 5, 3)
332#define PIN_PB16__GRXDV PINMUX_PIN(PIN_PB16, 6, 3)
333#define PIN_PB17 49
334#define PIN_PB17__GPIO PINMUX_PIN(PIN_PB17, 0, 0)
335#define PIN_PB17__LCDDAT6 PINMUX_PIN(PIN_PB17, 1, 1)
336#define PIN_PB17__A6 PINMUX_PIN(PIN_PB17, 2, 1)
337#define PIN_PB17__RD1 PINMUX_PIN(PIN_PB17, 3, 2)
338#define PIN_PB17__I2SC1_DI0 PINMUX_PIN(PIN_PB17, 4, 1)
339#define PIN_PB17__QSPI1_IO1 PINMUX_PIN(PIN_PB17, 5, 3)
340#define PIN_PB17__GRXER PINMUX_PIN(PIN_PB17, 6, 3)
341#define PIN_PB18 50
342#define PIN_PB18__GPIO PINMUX_PIN(PIN_PB18, 0, 0)
343#define PIN_PB18__LCDDAT7 PINMUX_PIN(PIN_PB18, 1, 1)
344#define PIN_PB18__A7 PINMUX_PIN(PIN_PB18, 2, 1)
345#define PIN_PB18__RK1 PINMUX_PIN(PIN_PB18, 3, 2)
346#define PIN_PB18__I2SC1_DO0 PINMUX_PIN(PIN_PB18, 4, 1)
347#define PIN_PB18__QSPI1_IO2 PINMUX_PIN(PIN_PB18, 5, 3)
348#define PIN_PB18__GRX0 PINMUX_PIN(PIN_PB18, 6, 3)
349#define PIN_PB19 51
350#define PIN_PB19__GPIO PINMUX_PIN(PIN_PB19, 0, 0)
351#define PIN_PB19__LCDDAT8 PINMUX_PIN(PIN_PB19, 1, 1)
352#define PIN_PB19__A8 PINMUX_PIN(PIN_PB19, 2, 1)
353#define PIN_PB19__RF1 PINMUX_PIN(PIN_PB19, 3, 2)
354#define PIN_PB19__TIOA3 PINMUX_PIN(PIN_PB19, 4, 2)
355#define PIN_PB19__QSPI1_IO3 PINMUX_PIN(PIN_PB19, 5, 3)
356#define PIN_PB19__GRX1 PINMUX_PIN(PIN_PB19, 6, 3)
357#define PIN_PB20 52
358#define PIN_PB20__GPIO PINMUX_PIN(PIN_PB20, 0, 0)
359#define PIN_PB20__LCDDAT9 PINMUX_PIN(PIN_PB20, 1, 1)
360#define PIN_PB20__A9 PINMUX_PIN(PIN_PB20, 2, 1)
361#define PIN_PB20__TK0 PINMUX_PIN(PIN_PB20, 3, 1)
362#define PIN_PB20__TIOB3 PINMUX_PIN(PIN_PB20, 4, 2)
363#define PIN_PB20__PCK1 PINMUX_PIN(PIN_PB20, 5, 4)
364#define PIN_PB20__GTX0 PINMUX_PIN(PIN_PB20, 6, 3)
365#define PIN_PB21 53
366#define PIN_PB21__GPIO PINMUX_PIN(PIN_PB21, 0, 0)
367#define PIN_PB21__LCDDAT10 PINMUX_PIN(PIN_PB21, 1, 1)
368#define PIN_PB21__A10 PINMUX_PIN(PIN_PB21, 2, 1)
369#define PIN_PB21__TF0 PINMUX_PIN(PIN_PB21, 3, 1)
370#define PIN_PB21__TCLK3 PINMUX_PIN(PIN_PB21, 4, 2)
371#define PIN_PB21__FLEXCOM3_IO2 PINMUX_PIN(PIN_PB21, 5, 3)
372#define PIN_PB21__GTX1 PINMUX_PIN(PIN_PB21, 6, 3)
373#define PIN_PB22 54
374#define PIN_PB22__GPIO PINMUX_PIN(PIN_PB22, 0, 0)
375#define PIN_PB22__LCDDAT11 PINMUX_PIN(PIN_PB22, 1, 1)
376#define PIN_PB22__A11 PINMUX_PIN(PIN_PB22, 2, 1)
377#define PIN_PB22__TDO PINMUX_PIN(PIN_PB22, 3, 1)
378#define PIN_PB22__TIOA2 PINMUX_PIN(PIN_PB22, 4, 2)
379#define PIN_PB22__FLEXCOM3_IO1 PINMUX_PIN(PIN_PB22, 5, 3)
380#define PIN_PB22__GMDC PINMUX_PIN(PIN_PB22, 6, 3)
381#define PIN_PB23 55
382#define PIN_PB23__GPIO PINMUX_PIN(PIN_PB23, 0, 0)
383#define PIN_PB23__LCDDAT12 PINMUX_PIN(PIN_PB23, 1, 1)
384#define PIN_PB23__A12 PINMUX_PIN(PIN_PB23, 2, 1)
385#define PIN_PB23__RD0 PINMUX_PIN(PIN_PB23, 3, 1)
386#define PIN_PB23__TIOB2 PINMUX_PIN(PIN_PB23, 4, 2)
387#define PIN_PB23__FLEXCOM3_IO0 PINMUX_PIN(PIN_PB23, 5, 3)
388#define PIN_PB23__GMDIO PINMUX_PIN(PIN_PB23, 6, 3)
389#define PIN_PB24 56
390#define PIN_PB24__GPIO PINMUX_PIN(PIN_PB24, 0, 0)
391#define PIN_PB24__LCDDAT13 PINMUX_PIN(PIN_PB24, 1, 1)
392#define PIN_PB24__A13 PINMUX_PIN(PIN_PB24, 2, 1)
393#define PIN_PB24__RK0 PINMUX_PIN(PIN_PB24, 3, 1)
394#define PIN_PB24__TCLK2 PINMUX_PIN(PIN_PB24, 4, 2)
395#define PIN_PB24__FLEXCOM3_IO3 PINMUX_PIN(PIN_PB24, 5, 3)
396#define PIN_PB24__ISC_D10 PINMUX_PIN(PIN_PB24, 6, 3)
397#define PIN_PB25 57
398#define PIN_PB25__GPIO PINMUX_PIN(PIN_PB25, 0, 0)
399#define PIN_PB25__LCDDAT14 PINMUX_PIN(PIN_PB25, 1, 1)
400#define PIN_PB25__A14 PINMUX_PIN(PIN_PB25, 2, 1)
401#define PIN_PB25__RF0 PINMUX_PIN(PIN_PB25, 3, 1)
402#define PIN_PB25__FLEXCOM3_IO4 PINMUX_PIN(PIN_PB25, 5, 3)
403#define PIN_PB25__ISC_D11 PINMUX_PIN(PIN_PB25, 6, 3)
404#define PIN_PB26 58
405#define PIN_PB26__GPIO PINMUX_PIN(PIN_PB26, 0, 0)
406#define PIN_PB26__LCDDAT15 PINMUX_PIN(PIN_PB26, 1, 1)
407#define PIN_PB26__A15 PINMUX_PIN(PIN_PB26, 2, 1)
408#define PIN_PB26__URXD0 PINMUX_PIN(PIN_PB26, 3, 1)
409#define PIN_PB26__PDMIC_DAT PINMUX_PIN(PIN_PB26, 4, 1)
410#define PIN_PB26__ISC_D0 PINMUX_PIN(PIN_PB26, 6, 3)
411#define PIN_PB27 59
412#define PIN_PB27__GPIO PINMUX_PIN(PIN_PB27, 0, 0)
413#define PIN_PB27__LCDDAT16 PINMUX_PIN(PIN_PB27, 1, 1)
414#define PIN_PB27__A16 PINMUX_PIN(PIN_PB27, 2, 1)
415#define PIN_PB27__UTXD0 PINMUX_PIN(PIN_PB27, 3, 1)
416#define PIN_PB27__PDMIC_CLK PINMUX_PIN(PIN_PB27, 4, 1)
417#define PIN_PB27__ISC_D1 PINMUX_PIN(PIN_PB27, 6, 3)
418#define PIN_PB28 60
419#define PIN_PB28__GPIO PINMUX_PIN(PIN_PB28, 0, 0)
420#define PIN_PB28__LCDDAT17 PINMUX_PIN(PIN_PB28, 1, 1)
421#define PIN_PB28__A17 PINMUX_PIN(PIN_PB28, 2, 1)
422#define PIN_PB28__FLEXCOM0_IO0 PINMUX_PIN(PIN_PB28, 3, 1)
423#define PIN_PB28__TIOA5 PINMUX_PIN(PIN_PB28, 4, 2)
424#define PIN_PB28__ISC_D2 PINMUX_PIN(PIN_PB28, 6, 3)
425#define PIN_PB29 61
426#define PIN_PB29__GPIO PINMUX_PIN(PIN_PB29, 0, 0)
427#define PIN_PB29__LCDDAT18 PINMUX_PIN(PIN_PB29, 1, 1)
428#define PIN_PB29__A18 PINMUX_PIN(PIN_PB29, 2, 1)
429#define PIN_PB29__FLEXCOM0_IO1 PINMUX_PIN(PIN_PB29, 3, 1)
430#define PIN_PB29__TIOB5 PINMUX_PIN(PIN_PB29, 4, 2)
431#define PIN_PB29__ISC_D3 PINMUX_PIN(PIN_PB29, 7, 3)
432#define PIN_PB30 62
433#define PIN_PB30__GPIO PINMUX_PIN(PIN_PB30, 0, 0)
434#define PIN_PB30__LCDDAT19 PINMUX_PIN(PIN_PB30, 1, 1)
435#define PIN_PB30__A19 PINMUX_PIN(PIN_PB30, 2, 1)
436#define PIN_PB30__FLEXCOM0_IO2 PINMUX_PIN(PIN_PB30, 3, 1)
437#define PIN_PB30__TCLK5 PINMUX_PIN(PIN_PB30, 4, 2)
438#define PIN_PB30__ISC_D4 PINMUX_PIN(PIN_PB30, 6, 3)
439#define PIN_PB31 63
440#define PIN_PB31__GPIO PINMUX_PIN(PIN_PB31, 0, 0)
441#define PIN_PB31__LCDDAT20 PINMUX_PIN(PIN_PB31, 1, 1)
442#define PIN_PB31__A20 PINMUX_PIN(PIN_PB31, 2, 1)
443#define PIN_PB31__FLEXCOM0_IO3 PINMUX_PIN(PIN_PB31, 3, 1)
444#define PIN_PB31__TWD0 PINMUX_PIN(PIN_PB31, 4, 1)
445#define PIN_PB31__ISC_D5 PINMUX_PIN(PIN_PB31, 6, 3)
446#define PIN_PC0 64
447#define PIN_PC0__GPIO PINMUX_PIN(PIN_PC0, 0, 0)
448#define PIN_PC0__LCDDAT21 PINMUX_PIN(PIN_PC0, 1, 1)
449#define PIN_PC0__A23 PINMUX_PIN(PIN_PC0, 2, 1)
450#define PIN_PC0__FLEXCOM0_IO4 PINMUX_PIN(PIN_PC0, 3, 1)
451#define PIN_PC0__TWCK0 PINMUX_PIN(PIN_PC0, 4, 1)
452#define PIN_PC0__ISC_D6 PINMUX_PIN(PIN_PC0, 6, 3)
453#define PIN_PC1 65
454#define PIN_PC1__GPIO PINMUX_PIN(PIN_PC1, 0, 0)
455#define PIN_PC1__LCDDAT22 PINMUX_PIN(PIN_PC1, 1, 1)
456#define PIN_PC1__A24 PINMUX_PIN(PIN_PC1, 2, 1)
457#define PIN_PC1__CANTX0 PINMUX_PIN(PIN_PC1, 3, 1)
458#define PIN_PC1__SPI1_SPCK PINMUX_PIN(PIN_PC1, 4, 1)
459#define PIN_PC1__I2SC0_CK PINMUX_PIN(PIN_PC1, 5, 1)
460#define PIN_PC1__ISC_D7 PINMUX_PIN(PIN_PC1, 6, 3)
461#define PIN_PC2 66
462#define PIN_PC2__GPIO PINMUX_PIN(PIN_PC2, 0, 0)
463#define PIN_PC2__LCDDAT23 PINMUX_PIN(PIN_PC2, 1, 1)
464#define PIN_PC2__A25 PINMUX_PIN(PIN_PC2, 2, 1)
465#define PIN_PC2__CANRX0 PINMUX_PIN(PIN_PC2, 3, 1)
466#define PIN_PC2__SPI1_MOSI PINMUX_PIN(PIN_PC2, 4, 1)
467#define PIN_PC2__I2SC0_MCK PINMUX_PIN(PIN_PC2, 5, 1)
468#define PIN_PC2__ISC_D8 PINMUX_PIN(PIN_PC2, 6, 3)
469#define PIN_PC3 67
470#define PIN_PC3__GPIO PINMUX_PIN(PIN_PC3, 0, 0)
471#define PIN_PC3__LCDPWM PINMUX_PIN(PIN_PC3, 1, 1)
472#define PIN_PC3__NWAIT PINMUX_PIN(PIN_PC3, 2, 1)
473#define PIN_PC3__TIOA1 PINMUX_PIN(PIN_PC3, 3, 1)
474#define PIN_PC3__SPI1_MISO PINMUX_PIN(PIN_PC3, 4, 1)
475#define PIN_PC3__I2SC0_WS PINMUX_PIN(PIN_PC3, 5, 1)
476#define PIN_PC3__ISC_D9 PINMUX_PIN(PIN_PC3, 6, 3)
477#define PIN_PC4 68
478#define PIN_PC4__GPIO PINMUX_PIN(PIN_PC4, 0, 0)
479#define PIN_PC4__LCDDISP PINMUX_PIN(PIN_PC4, 1, 1)
480#define PIN_PC4__NWR1_NBS1 PINMUX_PIN(PIN_PC4, 2, 1)
481#define PIN_PC4__TIOB1 PINMUX_PIN(PIN_PC4, 3, 1)
482#define PIN_PC4__SPI1_NPCS0 PINMUX_PIN(PIN_PC4, 4, 1)
483#define PIN_PC4__I2SC0_DI0 PINMUX_PIN(PIN_PC4, 5, 1)
484#define PIN_PC4__ISC_PCK PINMUX_PIN(PIN_PC4, 6, 3)
485#define PIN_PC5 69
486#define PIN_PC5__GPIO PINMUX_PIN(PIN_PC5, 0, 0)
487#define PIN_PC5__LCDVSYNC PINMUX_PIN(PIN_PC5, 1, 1)
488#define PIN_PC5__NCS0 PINMUX_PIN(PIN_PC5, 2, 1)
489#define PIN_PC5__TCLK1 PINMUX_PIN(PIN_PC5, 3, 1)
490#define PIN_PC5__SPI1_NPCS1 PINMUX_PIN(PIN_PC5, 4, 1)
491#define PIN_PC5__I2SC0_DO0 PINMUX_PIN(PIN_PC5, 5, 1)
492#define PIN_PC5__ISC_VSYNC PINMUX_PIN(PIN_PC5, 6, 3)
493#define PIN_PC6 70
494#define PIN_PC6__GPIO PINMUX_PIN(PIN_PC6, 0, 0)
495#define PIN_PC6__LCDHSYNC PINMUX_PIN(PIN_PC6, 1, 1)
496#define PIN_PC6__NCS1 PINMUX_PIN(PIN_PC6, 2, 1)
497#define PIN_PC6__TWD1 PINMUX_PIN(PIN_PC6, 3, 1)
498#define PIN_PC6__SPI1_NPCS2 PINMUX_PIN(PIN_PC6, 4, 1)
499#define PIN_PC6__ISC_HSYNC PINMUX_PIN(PIN_PC6, 6, 3)
500#define PIN_PC7 71
501#define PIN_PC7__GPIO PINMUX_PIN(PIN_PC7, 0, 0)
502#define PIN_PC7__LCDPCK PINMUX_PIN(PIN_PC7, 1, 1)
503#define PIN_PC7__NCS2 PINMUX_PIN(PIN_PC7, 2, 1)
504#define PIN_PC7__TWCK1 PINMUX_PIN(PIN_PC7, 3, 1)
505#define PIN_PC7__SPI1_NPCS3 PINMUX_PIN(PIN_PC7, 4, 1)
506#define PIN_PC7__URXD1 PINMUX_PIN(PIN_PC7, 5, 2)
507#define PIN_PC7__ISC_MCK PINMUX_PIN(PIN_PC7, 6, 3)
508#define PIN_PC8 72
509#define PIN_PC8__GPIO PINMUX_PIN(PIN_PC8, 0, 0)
510#define PIN_PC8__LCDDEN PINMUX_PIN(PIN_PC8, 1, 1)
511#define PIN_PC8__NANDRDY PINMUX_PIN(PIN_PC8, 2, 1)
512#define PIN_PC8__FIQ PINMUX_PIN(PIN_PC8, 3, 1)
513#define PIN_PC8__PCK0 PINMUX_PIN(PIN_PC8, 4, 3)
514#define PIN_PC8__UTXD1 PINMUX_PIN(PIN_PC8, 5, 2)
515#define PIN_PC8__ISC_FIELD PINMUX_PIN(PIN_PC8, 6, 3)
516#define PIN_PC9 73
517#define PIN_PC9__GPIO PINMUX_PIN(PIN_PC9, 0, 0)
518#define PIN_PC9__FIQ PINMUX_PIN(PIN_PC9, 1, 3)
519#define PIN_PC9__GTSUCOMP PINMUX_PIN(PIN_PC9, 2, 1)
520#define PIN_PC9__ISC_D0 PINMUX_PIN(PIN_PC9, 2, 1)
521#define PIN_PC9__TIOA4 PINMUX_PIN(PIN_PC9, 4, 2)
522#define PIN_PC10 74
523#define PIN_PC10__GPIO PINMUX_PIN(PIN_PC10, 0, 0)
524#define PIN_PC10__LCDDAT2 PINMUX_PIN(PIN_PC10, 1, 2)
525#define PIN_PC10__GTXCK PINMUX_PIN(PIN_PC10, 2, 1)
526#define PIN_PC10__ISC_D1 PINMUX_PIN(PIN_PC10, 3, 1)
527#define PIN_PC10__TIOB4 PINMUX_PIN(PIN_PC10, 4, 2)
528#define PIN_PC10__CANTX0 PINMUX_PIN(PIN_PC10, 5, 2)
529#define PIN_PC11 75
530#define PIN_PC11__GPIO PINMUX_PIN(PIN_PC11, 0, 0)
531#define PIN_PC11__LCDDAT3 PINMUX_PIN(PIN_PC11, 1, 2)
532#define PIN_PC11__GTXEN PINMUX_PIN(PIN_PC11, 2, 1)
533#define PIN_PC11__ISC_D2 PINMUX_PIN(PIN_PC11, 3, 1)
534#define PIN_PC11__TCLK4 PINMUX_PIN(PIN_PC11, 4, 2)
535#define PIN_PC11__CANRX0 PINMUX_PIN(PIN_PC11, 5, 2)
536#define PIN_PC11__A0_NBS0 PINMUX_PIN(PIN_PC11, 6, 2)
537#define PIN_PC12 76
538#define PIN_PC12__GPIO PINMUX_PIN(PIN_PC12, 0, 0)
539#define PIN_PC12__LCDDAT4 PINMUX_PIN(PIN_PC12, 1, 2)
540#define PIN_PC12__GRXDV PINMUX_PIN(PIN_PC12, 2, 1)
541#define PIN_PC12__ISC_D3 PINMUX_PIN(PIN_PC12, 3, 1)
542#define PIN_PC12__URXD3 PINMUX_PIN(PIN_PC12, 4, 1)
543#define PIN_PC12__TK0 PINMUX_PIN(PIN_PC12, 5, 2)
544#define PIN_PC12__A1 PINMUX_PIN(PIN_PC12, 6, 2)
545#define PIN_PC13 77
546#define PIN_PC13__GPIO PINMUX_PIN(PIN_PC13, 0, 0)
547#define PIN_PC13__LCDDAT5 PINMUX_PIN(PIN_PC13, 1, 2)
548#define PIN_PC13__GRXER PINMUX_PIN(PIN_PC13, 2, 1)
549#define PIN_PC13__ISC_D4 PINMUX_PIN(PIN_PC13, 3, 1)
550#define PIN_PC13__UTXD3 PINMUX_PIN(PIN_PC13, 4, 1)
551#define PIN_PC13__TF0 PINMUX_PIN(PIN_PC13, 5, 2)
552#define PIN_PC13__A2 PINMUX_PIN(PIN_PC13, 6, 2)
553#define PIN_PC14 78
554#define PIN_PC14__GPIO PINMUX_PIN(PIN_PC14, 0, 0)
555#define PIN_PC14__LCDDAT6 PINMUX_PIN(PIN_PC14, 1, 2)
556#define PIN_PC14__GRX0 PINMUX_PIN(PIN_PC14, 2, 1)
557#define PIN_PC14__ISC_D5 PINMUX_PIN(PIN_PC14, 3, 1)
558#define PIN_PC14__TDO PINMUX_PIN(PIN_PC14, 5, 2)
559#define PIN_PC14__A3 PINMUX_PIN(PIN_PC14, 6, 2)
560#define PIN_PC15 79
561#define PIN_PC15__GPIO PINMUX_PIN(PIN_PC15, 0, 0)
562#define PIN_PC15__LCDDAT7 PINMUX_PIN(PIN_PC15, 1, 2)
563#define PIN_PC15__GRX1 PINMUX_PIN(PIN_PC15, 2, 1)
564#define PIN_PC15__ISC_D6 PINMUX_PIN(PIN_PC15, 3, 1)
565#define PIN_PC15__RD0 PINMUX_PIN(PIN_PC15, 5, 2)
566#define PIN_PC15__A4 PINMUX_PIN(PIN_PC15, 6, 2)
567#define PIN_PC16 80
568#define PIN_PC16__GPIO PINMUX_PIN(PIN_PC16, 0, 0)
569#define PIN_PC16__LCDDAT10 PINMUX_PIN(PIN_PC16, 1, 2)
570#define PIN_PC16__GTX0 PINMUX_PIN(PIN_PC16, 2, 1)
571#define PIN_PC16__ISC_D7 PINMUX_PIN(PIN_PC16, 3, 1)
572#define PIN_PC16__RK0 PINMUX_PIN(PIN_PC16, 5, 2)
573#define PIN_PC16__A5 PINMUX_PIN(PIN_PC16, 6, 2)
574#define PIN_PC17 81
575#define PIN_PC17__GPIO PINMUX_PIN(PIN_PC17, 0, 0)
576#define PIN_PC17__LCDDAT11 PINMUX_PIN(PIN_PC17, 1, 2)
577#define PIN_PC17__GTX1 PINMUX_PIN(PIN_PC17, 2, 1)
578#define PIN_PC17__ISC_D8 PINMUX_PIN(PIN_PC17, 3, 1)
579#define PIN_PC17__RF0 PINMUX_PIN(PIN_PC17, 5, 2)
580#define PIN_PC17__A6 PINMUX_PIN(PIN_PC17, 6, 2)
581#define PIN_PC18 82
582#define PIN_PC18__GPIO PINMUX_PIN(PIN_PC18, 0, 0)
583#define PIN_PC18__LCDDAT12 PINMUX_PIN(PIN_PC18, 1, 2)
584#define PIN_PC18__GMDC PINMUX_PIN(PIN_PC18, 2, 1)
585#define PIN_PC18__ISC_D9 PINMUX_PIN(PIN_PC18, 3, 1)
586#define PIN_PC18__FLEXCOM3_IO2 PINMUX_PIN(PIN_PC18, 5, 2)
587#define PIN_PC18__A7 PINMUX_PIN(PIN_PC18, 6, 2)
588#define PIN_PC19 83
589#define PIN_PC19__GPIO PINMUX_PIN(PIN_PC19, 0, 0)
590#define PIN_PC19__LCDDAT13 PINMUX_PIN(PIN_PC19, 1, 2)
591#define PIN_PC19__GMDIO PINMUX_PIN(PIN_PC19, 2, 1)
592#define PIN_PC19__ISC_D10 PINMUX_PIN(PIN_PC19, 3, 1)
593#define PIN_PC19__FLEXCOM3_IO1 PINMUX_PIN(PIN_PC19, 5, 2)
594#define PIN_PC19__A8 PINMUX_PIN(PIN_PC19, 6, 2)
595#define PIN_PC20 84
596#define PIN_PC20__GPIO PINMUX_PIN(PIN_PC20, 0, 0)
597#define PIN_PC20__LCDDAT14 PINMUX_PIN(PIN_PC20, 1, 2)
598#define PIN_PC20__GRXCK PINMUX_PIN(PIN_PC20, 2, 1)
599#define PIN_PC20__ISC_D11 PINMUX_PIN(PIN_PC20, 3, 1)
600#define PIN_PC20__FLEXCOM3_IO0 PINMUX_PIN(PIN_PC20, 5, 2)
601#define PIN_PC20__A9 PINMUX_PIN(PIN_PC20, 6, 2)
602#define PIN_PC21 85
603#define PIN_PC21__GPIO PINMUX_PIN(PIN_PC21, 0, 0)
604#define PIN_PC21__LCDDAT15 PINMUX_PIN(PIN_PC21, 1, 2)
605#define PIN_PC21__GTXER PINMUX_PIN(PIN_PC21, 2, 1)
606#define PIN_PC21__ISC_PCK PINMUX_PIN(PIN_PC21, 3, 1)
607#define PIN_PC21__FLEXCOM3_IO3 PINMUX_PIN(PIN_PC21, 5, 2)
608#define PIN_PC21__A10 PINMUX_PIN(PIN_PC21, 6, 2)
609#define PIN_PC22 86
610#define PIN_PC22__GPIO PINMUX_PIN(PIN_PC22, 0, 0)
611#define PIN_PC22__LCDDAT18 PINMUX_PIN(PIN_PC22, 1, 2)
612#define PIN_PC22__GCRS PINMUX_PIN(PIN_PC22, 2, 1)
613#define PIN_PC22__ISC_VSYNC PINMUX_PIN(PIN_PC22, 3, 1)
614#define PIN_PC22__FLEXCOM3_IO4 PINMUX_PIN(PIN_PC22, 5, 2)
615#define PIN_PC22__A11 PINMUX_PIN(PIN_PC22, 6, 2)
616#define PIN_PC23 87
617#define PIN_PC23__GPIO PINMUX_PIN(PIN_PC23, 0, 0)
618#define PIN_PC23__LCDDAT19 PINMUX_PIN(PIN_PC23, 1, 2)
619#define PIN_PC23__GCOL PINMUX_PIN(PIN_PC23, 2, 1)
620#define PIN_PC23__ISC_HSYNC PINMUX_PIN(PIN_PC23, 3, 1)
621#define PIN_PC23__A12 PINMUX_PIN(PIN_PC23, 6, 2)
622#define PIN_PC24 88
623#define PIN_PC24__GPIO PINMUX_PIN(PIN_PC24, 0, 0)
624#define PIN_PC24__LCDDAT20 PINMUX_PIN(PIN_PC24, 1, 2)
625#define PIN_PC24__GRX2 PINMUX_PIN(PIN_PC24, 2, 1)
626#define PIN_PC24__ISC_MCK PINMUX_PIN(PIN_PC24, 3, 1)
627#define PIN_PC24__A13 PINMUX_PIN(PIN_PC24, 6, 2)
628#define PIN_PC25 89
629#define PIN_PC25__GPIO PINMUX_PIN(PIN_PC25, 0, 0)
630#define PIN_PC25__LCDDAT21 PINMUX_PIN(PIN_PC25, 1, 2)
631#define PIN_PC25__GRX3 PINMUX_PIN(PIN_PC25, 2, 1)
632#define PIN_PC25__ISC_FIELD PINMUX_PIN(PIN_PC25, 3, 1)
633#define PIN_PC25__A14 PINMUX_PIN(PIN_PC25, 6, 2)
634#define PIN_PC26 90
635#define PIN_PC26__GPIO PINMUX_PIN(PIN_PC26, 0, 0)
636#define PIN_PC26__LCDDAT22 PINMUX_PIN(PIN_PC26, 1, 2)
637#define PIN_PC26__GTX2 PINMUX_PIN(PIN_PC26, 2, 1)
638#define PIN_PC26__CANTX1 PINMUX_PIN(PIN_PC26, 4, 1)
639#define PIN_PC26__A15 PINMUX_PIN(PIN_PC26, 6, 2)
640#define PIN_PC27 91
641#define PIN_PC27__GPIO PINMUX_PIN(PIN_PC27, 0, 0)
642#define PIN_PC27__LCDDAT23 PINMUX_PIN(PIN_PC27, 1, 2)
643#define PIN_PC27__GTX3 PINMUX_PIN(PIN_PC27, 2, 1)
644#define PIN_PC27__PCK1 PINMUX_PIN(PIN_PC27, 3, 2)
645#define PIN_PC27__CANRX1 PINMUX_PIN(PIN_PC27, 4, 1)
646#define PIN_PC27__TWD0 PINMUX_PIN(PIN_PC27, 5, 2)
647#define PIN_PC27__A16 PINMUX_PIN(PIN_PC27, 6, 2)
648#define PIN_PC28 92
649#define PIN_PC28__GPIO PINMUX_PIN(PIN_PC28, 0, 0)
650#define PIN_PC28__LCDPWM PINMUX_PIN(PIN_PC28, 1, 2)
651#define PIN_PC28__FLEXCOM4_IO0 PINMUX_PIN(PIN_PC28, 2, 1)
652#define PIN_PC28__PCK2 PINMUX_PIN(PIN_PC28, 3, 2)
653#define PIN_PC28__TWCK0 PINMUX_PIN(PIN_PC28, 5, 2)
654#define PIN_PC28__A17 PINMUX_PIN(PIN_PC28, 6, 2)
655#define PIN_PC29 93
656#define PIN_PC29__GPIO PINMUX_PIN(PIN_PC29, 0, 0)
657#define PIN_PC29__LCDDISP PINMUX_PIN(PIN_PC29, 1, 2)
658#define PIN_PC29__FLEXCOM4_IO1 PINMUX_PIN(PIN_PC29, 2, 1)
659#define PIN_PC29__A18 PINMUX_PIN(PIN_PC29, 6, 2)
660#define PIN_PC30 94
661#define PIN_PC30__GPIO PINMUX_PIN(PIN_PC30, 0, 0)
662#define PIN_PC30__LCDVSYNC PINMUX_PIN(PIN_PC30, 1, 2)
663#define PIN_PC30__FLEXCOM4_IO2 PINMUX_PIN(PIN_PC30, 2, 1)
664#define PIN_PC30__A19 PINMUX_PIN(PIN_PC30, 6, 2)
665#define PIN_PC31 95
666#define PIN_PC31__GPIO PINMUX_PIN(PIN_PC31, 0, 0)
667#define PIN_PC31__LCDHSYNC PINMUX_PIN(PIN_PC31, 1, 2)
668#define PIN_PC31__FLEXCOM4_IO3 PINMUX_PIN(PIN_PC31, 2, 1)
669#define PIN_PC31__URXD3 PINMUX_PIN(PIN_PC31, 3, 2)
670#define PIN_PC31__A20 PINMUX_PIN(PIN_PC31, 6, 2)
671#define PIN_PD0 96
672#define PIN_PD0__GPIO PINMUX_PIN(PIN_PD0, 0, 0)
673#define PIN_PD0__LCDPCK PINMUX_PIN(PIN_PD0, 1, 2)
674#define PIN_PD0__FLEXCOM4_IO4 PINMUX_PIN(PIN_PD0, 2, 1)
675#define PIN_PD0__UTXD3 PINMUX_PIN(PIN_PD0, 3, 2)
676#define PIN_PD0__GTSUCOMP PINMUX_PIN(PIN_PD0, 4, 2)
677#define PIN_PD0__A23 PINMUX_PIN(PIN_PD0, 6, 2)
678#define PIN_PD1 97
679#define PIN_PD1__GPIO PINMUX_PIN(PIN_PD1, 0, 0)
680#define PIN_PD1__LCDDEN PINMUX_PIN(PIN_PD1, 1, 2)
681#define PIN_PD1__GRXCK PINMUX_PIN(PIN_PD1, 4, 2)
682#define PIN_PD1__A24 PINMUX_PIN(PIN_PD1, 6, 2)
683#define PIN_PD2 98
684#define PIN_PD2__GPIO PINMUX_PIN(PIN_PD2, 0, 0)
685#define PIN_PD2__URXD1 PINMUX_PIN(PIN_PD2, 1, 1)
686#define PIN_PD2__GTXER PINMUX_PIN(PIN_PD2, 4, 2)
687#define PIN_PD2__ISC_MCK PINMUX_PIN(PIN_PD2, 5, 2)
688#define PIN_PD2__A25 PINMUX_PIN(PIN_PD2, 6, 2)
689#define PIN_PD3 99
690#define PIN_PD3__GPIO PINMUX_PIN(PIN_PD3, 0, 0)
691#define PIN_PD3__UTXD1 PINMUX_PIN(PIN_PD3, 1, 1)
692#define PIN_PD3__FIQ PINMUX_PIN(PIN_PD3, 2, 2)
693#define PIN_PD3__GCRS PINMUX_PIN(PIN_PD3, 4, 2)
694#define PIN_PD3__ISC_D11 PINMUX_PIN(PIN_PD3, 5, 2)
695#define PIN_PD3__NWAIT PINMUX_PIN(PIN_PD3, 6, 2)
696#define PIN_PD4 100
697#define PIN_PD4__GPIO PINMUX_PIN(PIN_PD4, 0, 0)
698#define PIN_PD4__TWD1 PINMUX_PIN(PIN_PD4, 1, 2)
699#define PIN_PD4__URXD2 PINMUX_PIN(PIN_PD4, 2, 1)
700#define PIN_PD4__GCOL PINMUX_PIN(PIN_PD4, 4, 2)
701#define PIN_PD4__ISC_D10 PINMUX_PIN(PIN_PD4, 5, 2)
702#define PIN_PD4__NCS0 PINMUX_PIN(PIN_PD4, 6, 2)
703#define PIN_PD5 101
704#define PIN_PD5__GPIO PINMUX_PIN(PIN_PD5, 0, 0)
705#define PIN_PD5__TWCK1 PINMUX_PIN(PIN_PD5, 1, 2)
706#define PIN_PD5__UTXD2 PINMUX_PIN(PIN_PD5, 2, 1)
707#define PIN_PD5__GRX2 PINMUX_PIN(PIN_PD5, 4, 2)
708#define PIN_PD5__ISC_D9 PINMUX_PIN(PIN_PD5, 5, 2)
709#define PIN_PD5__NCS1 PINMUX_PIN(PIN_PD5, 6, 2)
710#define PIN_PD6 102
711#define PIN_PD6__GPIO PINMUX_PIN(PIN_PD6, 0, 0)
712#define PIN_PD6__TCK PINMUX_PIN(PIN_PD6, 1, 2)
713#define PIN_PD6__PCK1 PINMUX_PIN(PIN_PD6, 2, 1)
714#define PIN_PD6__GRX3 PINMUX_PIN(PIN_PD6, 4, 2)
715#define PIN_PD6__ISC_D8 PINMUX_PIN(PIN_PD6, 5, 2)
716#define PIN_PD6__NCS2 PINMUX_PIN(PIN_PD6, 6, 2)
717#define PIN_PD7 103
718#define PIN_PD7__GPIO PINMUX_PIN(PIN_PD7, 0, 0)
719#define PIN_PD7__TDI PINMUX_PIN(PIN_PD7, 1, 2)
720#define PIN_PD7__UTMI_RXVAL PINMUX_PIN(PIN_PD7, 3, 1)
721#define PIN_PD7__GTX2 PINMUX_PIN(PIN_PD7, 4, 2)
722#define PIN_PD7__ISC_D0 PINMUX_PIN(PIN_PD7, 5, 2)
723#define PIN_PD7__NWR1_NBS1 PINMUX_PIN(PIN_PD7, 6, 2)
724#define PIN_PD8 104
725#define PIN_PD8__GPIO PINMUX_PIN(PIN_PD8, 0, 0)
726#define PIN_PD8__TDO PINMUX_PIN(PIN_PD8, 1, 2)
727#define PIN_PD8__UTMI_RXERR PINMUX_PIN(PIN_PD8, 3, 1)
728#define PIN_PD8__GTX3 PINMUX_PIN(PIN_PD8, 4, 2)
729#define PIN_PD8__ISC_D1 PINMUX_PIN(PIN_PD8, 5, 2)
730#define PIN_PD8__NANDRDY PINMUX_PIN(PIN_PD8, 6, 2)
731#define PIN_PD9 105
732#define PIN_PD9__GPIO PINMUX_PIN(PIN_PD9, 0, 0)
733#define PIN_PD9__TMS PINMUX_PIN(PIN_PD9, 1, 2)
734#define PIN_PD9__UTMI_RXACT PINMUX_PIN(PIN_PD9, 3, 1)
735#define PIN_PD9__GTXCK PINMUX_PIN(PIN_PD9, 4, 2)
736#define PIN_PD9__ISC_D2 PINMUX_PIN(PIN_PD9, 5, 2)
737#define PIN_PD10 106
738#define PIN_PD10__GPIO PINMUX_PIN(PIN_PD10, 0, 0)
739#define PIN_PD10__NTRST PINMUX_PIN(PIN_PD10, 1, 2)
740#define PIN_PD10__UTMI_HDIS PINMUX_PIN(PIN_PD10, 3, 1)
741#define PIN_PD10__GTXEN PINMUX_PIN(PIN_PD10, 4, 2)
742#define PIN_PD10__ISC_D3 PINMUX_PIN(PIN_PD10, 5, 2)
743#define PIN_PD11 107
744#define PIN_PD11__GPIO PINMUX_PIN(PIN_PD11, 0, 0)
745#define PIN_PD11__TIOA1 PINMUX_PIN(PIN_PD11, 1, 3)
746#define PIN_PD11__PCK2 PINMUX_PIN(PIN_PD11, 2, 2)
747#define PIN_PD11__UTMI_LS0 PINMUX_PIN(PIN_PD11, 3, 1)
748#define PIN_PD11__GRXDV PINMUX_PIN(PIN_PD11, 4, 2)
749#define PIN_PD11__ISC_D4 PINMUX_PIN(PIN_PD11, 5, 2)
750#define PIN_PD11__ISC_MCK PINMUX_PIN(PIN_PD11, 7, 4)
751#define PIN_PD12 108
752#define PIN_PD12__GPIO PINMUX_PIN(PIN_PD12, 0, 0)
753#define PIN_PD12__TIOB1 PINMUX_PIN(PIN_PD12, 1, 3)
754#define PIN_PD12__FLEXCOM4_IO0 PINMUX_PIN(PIN_PD12, 2, 2)
755#define PIN_PD12__UTMI_LS1 PINMUX_PIN(PIN_PD12, 3, 1)
756#define PIN_PD12__GRXER PINMUX_PIN(PIN_PD12, 4, 2)
757#define PIN_PD12__ISC_D5 PINMUX_PIN(PIN_PD12, 5, 2)
758#define PIN_PD12__ISC_D4 PINMUX_PIN(PIN_PD12, 6, 4)
759#define PIN_PD13 109
760#define PIN_PD13__GPIO PINMUX_PIN(PIN_PD13, 0, 0)
761#define PIN_PD13__TCLK1 PINMUX_PIN(PIN_PD13, 1, 3)
762#define PIN_PD13__FLEXCOM4_IO1 PINMUX_PIN(PIN_PD13, 2, 2)
763#define PIN_PD13__UTMI_CDRPCSEL0 PINMUX_PIN(PIN_PD13, 3, 1)
764#define PIN_PD13__GRX0 PINMUX_PIN(PIN_PD13, 4, 2)
765#define PIN_PD13__ISC_D6 PINMUX_PIN(PIN_PD13, 5, 2)
766#define PIN_PD13__ISC_D5 PINMUX_PIN(PIN_PD13, 6, 4)
767#define PIN_PD14 110
768#define PIN_PD14__GPIO PINMUX_PIN(PIN_PD14, 0, 0)
769#define PIN_PD14__TCK PINMUX_PIN(PIN_PD14, 1, 1)
770#define PIN_PD14__FLEXCOM4_IO2 PINMUX_PIN(PIN_PD14, 2, 2)
771#define PIN_PD14__UTMI_CDRPCSEL1 PINMUX_PIN(PIN_PD14, 3, 1)
772#define PIN_PD14__GRX1 PINMUX_PIN(PIN_PD14, 4, 2)
773#define PIN_PD14__ISC_D7 PINMUX_PIN(PIN_PD14, 5, 2)
774#define PIN_PD14__ISC_D6 PINMUX_PIN(PIN_PD14, 6, 4)
775#define PIN_PD15 111
776#define PIN_PD15__GPIO PINMUX_PIN(PIN_PD15, 0, 0)
777#define PIN_PD15__TDI PINMUX_PIN(PIN_PD15, 1, 1)
778#define PIN_PD15__FLEXCOM4_IO3 PINMUX_PIN(PIN_PD15, 2, 2)
779#define PIN_PD15__UTMI_CDRCPDIVEN PINMUX_PIN(PIN_PD15, 3, 1)
780#define PIN_PD15__GTX0 PINMUX_PIN(PIN_PD15, 4, 2)
781#define PIN_PD15__ISC_PCK PINMUX_PIN(PIN_PD15, 5, 2)
782#define PIN_PD15__ISC_D7 PINMUX_PIN(PIN_PD15, 6, 4)
783#define PIN_PD16 112
784#define PIN_PD16__GPIO PINMUX_PIN(PIN_PD16, 0, 0)
785#define PIN_PD16__TDO PINMUX_PIN(PIN_PD16, 1, 1)
786#define PIN_PD16__FLEXCOM4_IO4 PINMUX_PIN(PIN_PD16, 2, 2)
787#define PIN_PD16__UTMI_CDRBISTEN PINMUX_PIN(PIN_PD16, 3, 1)
788#define PIN_PD16__GTX1 PINMUX_PIN(PIN_PD16, 4, 2)
789#define PIN_PD16__ISC_VSYNC PINMUX_PIN(PIN_PD16, 5, 2)
790#define PIN_PD16__ISC_D8 PINMUX_PIN(PIN_PD16, 6, 4)
791#define PIN_PD17 113
792#define PIN_PD17__GPIO PINMUX_PIN(PIN_PD17, 0, 0)
793#define PIN_PD17__TMS PINMUX_PIN(PIN_PD17, 1, 1)
794#define PIN_PD17__UTMI_CDRCPSELDIV PINMUX_PIN(PIN_PD17, 3, 1)
795#define PIN_PD17__GMDC PINMUX_PIN(PIN_PD17, 4, 2)
796#define PIN_PD17__ISC_HSYNC PINMUX_PIN(PIN_PD17, 5, 2)
797#define PIN_PD17__ISC_D9 PINMUX_PIN(PIN_PD17, 6, 4)
798#define PIN_PD18 114
799#define PIN_PD18__GPIO PINMUX_PIN(PIN_PD18, 0, 0)
800#define PIN_PD18__NTRST PINMUX_PIN(PIN_PD18, 1, 1)
801#define PIN_PD18__GMDIO PINMUX_PIN(PIN_PD18, 4, 2)
802#define PIN_PD18__ISC_FIELD PINMUX_PIN(PIN_PD18, 5, 2)
803#define PIN_PD18__ISC_D10 PINMUX_PIN(PIN_PD18, 6, 4)
804#define PIN_PD19 115
805#define PIN_PD19__GPIO PINMUX_PIN(PIN_PD19, 0, 0)
806#define PIN_PD19__PCK0 PINMUX_PIN(PIN_PD19, 1, 1)
807#define PIN_PD19__TWD1 PINMUX_PIN(PIN_PD19, 2, 3)
808#define PIN_PD19__URXD2 PINMUX_PIN(PIN_PD19, 3, 3)
809#define PIN_PD19__I2SC0_CK PINMUX_PIN(PIN_PD19, 5, 2)
810#define PIN_PD19__ISC_D11 PINMUX_PIN(PIN_PD19, 6, 4)
811#define PIN_PD20 116
812#define PIN_PD20__GPIO PINMUX_PIN(PIN_PD20, 0, 0)
813#define PIN_PD20__TIOA2 PINMUX_PIN(PIN_PD20, 1, 3)
814#define PIN_PD20__TWCK1 PINMUX_PIN(PIN_PD20, 2, 3)
815#define PIN_PD20__UTXD2 PINMUX_PIN(PIN_PD20, 3, 3)
816#define PIN_PD20__I2SC0_MCK PINMUX_PIN(PIN_PD20, 5, 2)
817#define PIN_PD20__ISC_PCK PINMUX_PIN(PIN_PD20, 6, 4)
818#define PIN_PD21 117
819#define PIN_PD21__GPIO PINMUX_PIN(PIN_PD21, 0, 0)
820#define PIN_PD21__TIOB2 PINMUX_PIN(PIN_PD21, 1, 3)
821#define PIN_PD21__TWD0 PINMUX_PIN(PIN_PD21, 2, 4)
822#define PIN_PD21__FLEXCOM4_IO0 PINMUX_PIN(PIN_PD21, 3, 3)
823#define PIN_PD21__I2SC0_WS PINMUX_PIN(PIN_PD21, 5, 2)
824#define PIN_PD21__ISC_VSYNC PINMUX_PIN(PIN_PD21, 6, 4)
825#define PIN_PD22 118
826#define PIN_PD22__GPIO PINMUX_PIN(PIN_PD22, 0, 0)
827#define PIN_PD22__TCLK2 PINMUX_PIN(PIN_PD22, 1, 3)
828#define PIN_PD22__TWCK0 PINMUX_PIN(PIN_PD22, 2, 4)
829#define PIN_PD22__FLEXCOM4_IO1 PINMUX_PIN(PIN_PD22, 3, 3)
830#define PIN_PD22__I2SC0_DI0 PINMUX_PIN(PIN_PD22, 5, 2)
831#define PIN_PD22__ISC_HSYNC PINMUX_PIN(PIN_PD22, 6, 4)
832#define PIN_PD23 119
833#define PIN_PD23__GPIO PINMUX_PIN(PIN_PD23, 0, 0)
834#define PIN_PD23__URXD2 PINMUX_PIN(PIN_PD23, 1, 2)
835#define PIN_PD23__FLEXCOM4_IO2 PINMUX_PIN(PIN_PD23, 3, 3)
836#define PIN_PD23__I2SC0_DO0 PINMUX_PIN(PIN_PD23, 5, 2)
837#define PIN_PD23__ISC_FIELD PINMUX_PIN(PIN_PD23, 6, 4)
838#define PIN_PD24 120
839#define PIN_PD24__GPIO PINMUX_PIN(PIN_PD24, 0, 0)
840#define PIN_PD24__UTXD2 PINMUX_PIN(PIN_PD23, 1, 2)
841#define PIN_PD24__FLEXCOM4_IO3 PINMUX_PIN(PIN_PD23, 3, 3)
842#define PIN_PD25 121
843#define PIN_PD25__GPIO PINMUX_PIN(PIN_PD25, 0, 0)
844#define PIN_PD25__SPI1_SPCK PINMUX_PIN(PIN_PD25, 1, 3)
845#define PIN_PD25__FLEXCOM4_IO4 PINMUX_PIN(PIN_PD25, 3, 3)
846#define PIN_PD26 122
847#define PIN_PD26__GPIO PINMUX_PIN(PIN_PD26, 0, 0)
848#define PIN_PD26__SPI1_MOSI PINMUX_PIN(PIN_PD26, 1, 3)
849#define PIN_PD26__FLEXCOM2_IO0 PINMUX_PIN(PIN_PD26, 3, 2)
850#define PIN_PD27 123
851#define PIN_PD27__GPIO PINMUX_PIN(PIN_PD27, 0, 0)
852#define PIN_PD27__SPI1_MISO PINMUX_PIN(PIN_PD27, 1, 3)
853#define PIN_PD27__TCK PINMUX_PIN(PIN_PD27, 2, 3)
854#define PIN_PD27__FLEXCOM2_IO1 PINMUX_PIN(PIN_PD27, 3, 2)
855#define PIN_PD28 124
856#define PIN_PD28__GPIO PINMUX_PIN(PIN_PD28, 0, 0)
857#define PIN_PD28__SPI1_NPCS0 PINMUX_PIN(PIN_PD28, 1, 3)
858#define PIN_PD28__TCI PINMUX_PIN(PIN_PD28, 2, 3)
859#define PIN_PD28__FLEXCOM2_IO2 PINMUX_PIN(PIN_PD28, 3, 2)
860#define PIN_PD29 125
861#define PIN_PD29__GPIO PINMUX_PIN(PIN_PD29, 0, 0)
862#define PIN_PD29__SPI1_NPCS1 PINMUX_PIN(PIN_PD29, 1, 3)
863#define PIN_PD29__TDO PINMUX_PIN(PIN_PD29, 2, 3)
864#define PIN_PD29__FLEXCOM2_IO3 PINMUX_PIN(PIN_PD29, 3, 2)
865#define PIN_PD29__TIOA3 PINMUX_PIN(PIN_PD29, 4, 3)
866#define PIN_PD29__TWD0 PINMUX_PIN(PIN_PD29, 5, 3)
867#define PIN_PD30 126
868#define PIN_PD30__GPIO PINMUX_PIN(PIN_PD30, 0, 0)
869#define PIN_PD30__SPI1_NPCS2 PINMUX_PIN(PIN_PD30, 1, 3)
870#define PIN_PD30__TMS PINMUX_PIN(PIN_PD30, 2, 3)
871#define PIN_PD30__FLEXCOM2_IO4 PINMUX_PIN(PIN_PD30, 3, 2)
872#define PIN_PD30__TIOB3 PINMUX_PIN(PIN_PD30, 4, 3)
873#define PIN_PD30__TWCK0 PINMUX_PIN(PIN_PD30, 5, 3)
874#define PIN_PD31 127
875#define PIN_PD31__GPIO PINMUX_PIN(PIN_PD31, 0, 0)
876#define PIN_PD31__ADTRG PINMUX_PIN(PIN_PD31, 1, 1)
877#define PIN_PD31__NTRST PINMUX_PIN(PIN_PD31, 2, 3)
878#define PIN_PD31__IRQ PINMUX_PIN(PIN_PD31, 3, 4)
879#define PIN_PD31__TCLK3 PINMUX_PIN(PIN_PD31, 4, 3)
880#define PIN_PD31__PCK0 PINMUX_PIN(PIN_PD31, 5, 2)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 034cd48ae28b..c1f0cba40289 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -263,6 +263,24 @@
263 cache-level = <2>; 263 cache-level = <2>;
264 }; 264 };
265 265
266 sdmmc0: sdio-host@a0000000 {
267 compatible = "atmel,sama5d2-sdhci";
268 reg = <0xa0000000 0x300>;
269 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
270 clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
271 clock-names = "hclock", "multclk", "baseclk";
272 status = "disabled";
273 };
274
275 sdmmc1: sdio-host@b0000000 {
276 compatible = "atmel,sama5d2-sdhci";
277 reg = <0xb0000000 0x300>;
278 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
279 clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
280 clock-names = "hclock", "multclk", "baseclk";
281 status = "disabled";
282 };
283
266 apb { 284 apb {
267 compatible = "simple-bus"; 285 compatible = "simple-bus";
268 #address-cells = <1>; 286 #address-cells = <1>;
@@ -286,7 +304,7 @@
286 }; 304 };
287 305
288 pmc: pmc@f0014000 { 306 pmc: pmc@f0014000 {
289 compatible = "atmel,sama5d2-pmc"; 307 compatible = "atmel,sama5d2-pmc", "syscon";
290 reg = <0xf0014000 0x160>; 308 reg = <0xf0014000 0x160>;
291 interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>; 309 interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
292 interrupt-controller; 310 interrupt-controller;
@@ -619,6 +637,18 @@
619 atmel,clk-output-range = <0 83000000>; 637 atmel,clk-output-range = <0 83000000>;
620 }; 638 };
621 639
640 i2s0_clk: i2s0_clk {
641 #clock-cells = <0>;
642 reg = <54>;
643 atmel,clk-output-range = <0 83000000>;
644 };
645
646 i2s1_clk: i2s1_clk {
647 #clock-cells = <0>;
648 reg = <55>;
649 atmel,clk-output-range = <0 83000000>;
650 };
651
622 classd_clk: classd_clk { 652 classd_clk: classd_clk {
623 #clock-cells = <0>; 653 #clock-cells = <0>;
624 reg = <59>; 654 reg = <59>;
@@ -697,6 +727,52 @@
697 reg = <53>; 727 reg = <53>;
698 }; 728 };
699 }; 729 };
730
731 gck {
732 compatible = "atmel,sama5d2-clk-generated";
733 #address-cells = <1>;
734 #size-cells = <0>;
735 interrupt-parent = <&pmc>;
736 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
737
738 sdmmc0_gclk: sdmmc0_gclk {
739 #clock-cells = <0>;
740 reg = <31>;
741 };
742
743 sdmmc1_gclk: sdmmc1_gclk {
744 #clock-cells = <0>;
745 reg = <32>;
746 };
747
748 tcb0_gclk: tcb0_gclk {
749 #clock-cells = <0>;
750 reg = <35>;
751 atmel,clk-output-range = <0 83000000>;
752 };
753
754 tcb1_gclk: tcb1_gclk {
755 #clock-cells = <0>;
756 reg = <36>;
757 atmel,clk-output-range = <0 83000000>;
758 };
759
760 pwm_gclk: pwm_gclk {
761 #clock-cells = <0>;
762 reg = <38>;
763 atmel,clk-output-range = <0 83000000>;
764 };
765
766 i2s0_gclk: i2s0_gclk {
767 #clock-cells = <0>;
768 reg = <54>;
769 };
770
771 i2s1_gclk: i2s1_gclk {
772 #clock-cells = <0>;
773 reg = <55>;
774 };
775 };
700 }; 776 };
701 777
702 sha@f0028000 { 778 sha@f0028000 {
@@ -709,7 +785,7 @@
709 dma-names = "tx"; 785 dma-names = "tx";
710 clocks = <&sha_clk>; 786 clocks = <&sha_clk>;
711 clock-names = "sha_clk"; 787 clock-names = "sha_clk";
712 status = "disabled"; 788 status = "okay";
713 }; 789 };
714 790
715 aes@f002c000 { 791 aes@f002c000 {
@@ -725,7 +801,7 @@
725 dma-names = "tx", "rx"; 801 dma-names = "tx", "rx";
726 clocks = <&aes_clk>; 802 clocks = <&aes_clk>;
727 clock-names = "aes_clk"; 803 clock-names = "aes_clk";
728 status = "disabled"; 804 status = "okay";
729 }; 805 };
730 806
731 spi0: spi@f8000000 { 807 spi0: spi@f8000000 {
@@ -820,6 +896,32 @@
820 status = "disabled"; 896 status = "disabled";
821 }; 897 };
822 898
899 flx0: flexcom@f8034000 {
900 compatible = "atmel,sama5d2-flexcom";
901 reg = <0xf8034000 0x200>;
902 clocks = <&flx0_clk>;
903 #address-cells = <1>;
904 #size-cells = <1>;
905 ranges = <0x0 0xf8034000 0x800>;
906 status = "disabled";
907 };
908
909 flx1: flexcom@f8038000 {
910 compatible = "atmel,sama5d2-flexcom";
911 reg = <0xf8038000 0x200>;
912 clocks = <&flx1_clk>;
913 #address-cells = <1>;
914 #size-cells = <1>;
915 ranges = <0x0 0xf8038000 0x800>;
916 status = "disabled";
917 };
918
919 rstc@f8048000 {
920 compatible = "atmel,sama5d3-rstc";
921 reg = <0xf8048000 0x10>;
922 clocks = <&clk32k>;
923 };
924
823 pit: timer@f8048030 { 925 pit: timer@f8048030 {
824 compatible = "atmel,at91sam9260-pit"; 926 compatible = "atmel,at91sam9260-pit";
825 reg = <0xf8048030 0x10>; 927 reg = <0xf8048030 0x10>;
@@ -897,6 +999,36 @@
897 status = "disabled"; 999 status = "disabled";
898 }; 1000 };
899 1001
1002 flx2: flexcom@fc010000 {
1003 compatible = "atmel,sama5d2-flexcom";
1004 reg = <0xfc010000 0x200>;
1005 clocks = <&flx2_clk>;
1006 #address-cells = <1>;
1007 #size-cells = <1>;
1008 ranges = <0x0 0xfc010000 0x800>;
1009 status = "disabled";
1010 };
1011
1012 flx3: flexcom@fc014000 {
1013 compatible = "atmel,sama5d2-flexcom";
1014 reg = <0xfc014000 0x200>;
1015 clocks = <&flx3_clk>;
1016 #address-cells = <1>;
1017 #size-cells = <1>;
1018 ranges = <0x0 0xfc014000 0x800>;
1019 status = "disabled";
1020 };
1021
1022 flx4: flexcom@fc018000 {
1023 compatible = "atmel,sama5d2-flexcom";
1024 reg = <0xfc018000 0x200>;
1025 clocks = <&flx4_clk>;
1026 #address-cells = <1>;
1027 #size-cells = <1>;
1028 ranges = <0x0 0xfc018000 0x800>;
1029 status = "disabled";
1030 };
1031
900 aic: interrupt-controller@fc020000 { 1032 aic: interrupt-controller@fc020000 {
901 #interrupt-cells = <3>; 1033 #interrupt-cells = <3>;
902 compatible = "atmel,sama5d2-aic"; 1034 compatible = "atmel,sama5d2-aic";
@@ -921,6 +1053,22 @@
921 clocks = <&twi1_clk>; 1053 clocks = <&twi1_clk>;
922 status = "disabled"; 1054 status = "disabled";
923 }; 1055 };
1056
1057 tdes@fc044000 {
1058 compatible = "atmel,at91sam9g46-tdes";
1059 reg = <0xfc044000 0x100>;
1060 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
1061 dmas = <&dma0
1062 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1063 AT91_XDMAC_DT_PERID(28))>,
1064 <&dma0
1065 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1066 AT91_XDMAC_DT_PERID(29))>;
1067 dma-names = "tx", "rx";
1068 clocks = <&tdes_clk>;
1069 clock-names = "tdes_clk";
1070 status = "okay";
1071 };
924 }; 1072 };
925 }; 1073 };
926}; 1074};
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 7fa276515f11..a53279160f98 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -75,7 +75,7 @@
75 adc_op_clk: adc_op_clk{ 75 adc_op_clk: adc_op_clk{
76 compatible = "fixed-clock"; 76 compatible = "fixed-clock";
77 #clock-cells = <0>; 77 #clock-cells = <0>;
78 clock-frequency = <20000000>; 78 clock-frequency = <1000000>;
79 }; 79 };
80 }; 80 };
81 81
@@ -322,6 +322,7 @@
322 atmel,adc-use-external-triggers; 322 atmel,adc-use-external-triggers;
323 atmel,adc-vref = <3000>; 323 atmel,adc-vref = <3000>;
324 atmel,adc-res = <10 12>; 324 atmel,adc-res = <10 12>;
325 atmel,adc-sample-hold-time = <11>;
325 atmel,adc-res-names = "lowres", "highres"; 326 atmel,adc-res-names = "lowres", "highres";
326 status = "disabled"; 327 status = "disabled";
327 328
@@ -906,7 +907,7 @@
906 }; 907 };
907 908
908 pmc: pmc@fffffc00 { 909 pmc: pmc@fffffc00 {
909 compatible = "atmel,sama5d3-pmc"; 910 compatible = "atmel,sama5d3-pmc", "syscon";
910 reg = <0xfffffc00 0x120>; 911 reg = <0xfffffc00 0x120>;
911 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 912 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
912 interrupt-controller; 913 interrupt-controller;
diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi
index 026b252f09b3..e21099a1aef9 100644
--- a/arch/arm/boot/dts/sama5d3_mci2.dtsi
+++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi
@@ -24,9 +24,9 @@
24 }; 24 };
25 pinctrl_mmc2_dat1_3: mmc2_dat1_3 { 25 pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
26 atmel,pins = 26 atmel,pins =
27 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */ 27 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
28 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */ 28 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
29 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */ 29 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
30 }; 30 };
31 }; 31 };
32 }; 32 };
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi
index 83bee7a3a617..89010422812d 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -87,6 +87,8 @@
87 isi_0: endpoint { 87 isi_0: endpoint {
88 remote-endpoint = <&ov2640_0>; 88 remote-endpoint = <&ov2640_0>;
89 bus-width = <8>; 89 bus-width = <8>;
90 vsync-active = <1>;
91 hsync-active = <1>;
90 }; 92 };
91 }; 93 };
92 }; 94 };
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 8d1de29e8da1..15bbaf690047 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -386,7 +386,7 @@
386 }; 386 };
387 387
388 pmc: pmc@f0018000 { 388 pmc: pmc@f0018000 {
389 compatible = "atmel,sama5d3-pmc"; 389 compatible = "atmel,sama5d3-pmc", "syscon";
390 reg = <0xf0018000 0x120>; 390 reg = <0xf0018000 0x120>;
391 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 391 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
392 interrupt-controller; 392 interrupt-controller;
@@ -939,11 +939,11 @@
939 reg = <0xf8018000 0x4000>; 939 reg = <0xf8018000 0x4000>;
940 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>; 940 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
941 dmas = <&dma1 941 dmas = <&dma1
942 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)) 942 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
943 AT91_XDMAC_DT_PERID(4)>, 943 | AT91_XDMAC_DT_PERID(4))>,
944 <&dma1 944 <&dma1
945 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)) 945 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
946 AT91_XDMAC_DT_PERID(5)>; 946 | AT91_XDMAC_DT_PERID(5))>;
947 dma-names = "tx", "rx"; 947 dma-names = "tx", "rx";
948 pinctrl-names = "default"; 948 pinctrl-names = "default";
949 pinctrl-0 = <&pinctrl_i2c1>; 949 pinctrl-0 = <&pinctrl_i2c1>;
@@ -1189,6 +1189,19 @@
1189 clock-names = "t0_clk", "slow_clk"; 1189 clock-names = "t0_clk", "slow_clk";
1190 }; 1190 };
1191 1191
1192 macb1: ethernet@fc028000 {
1193 compatible = "atmel,sama5d4-gem";
1194 reg = <0xfc028000 0x100>;
1195 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
1196 pinctrl-names = "default";
1197 pinctrl-0 = <&pinctrl_macb1_rmii>;
1198 #address-cells = <1>;
1199 #size-cells = <0>;
1200 clocks = <&macb1_clk>, <&macb1_clk>;
1201 clock-names = "hclk", "pclk";
1202 status = "disabled";
1203 };
1204
1192 adc0: adc@fc034000 { 1205 adc0: adc@fc034000 {
1193 compatible = "atmel,at91sam9x5-adc"; 1206 compatible = "atmel,at91sam9x5-adc";
1194 reg = <0xfc034000 0x100>; 1207 reg = <0xfc034000 0x100>;
@@ -1238,7 +1251,7 @@
1238 dma-names = "tx", "rx"; 1251 dma-names = "tx", "rx";
1239 clocks = <&aes_clk>; 1252 clocks = <&aes_clk>;
1240 clock-names = "aes_clk"; 1253 clock-names = "aes_clk";
1241 status = "disabled"; 1254 status = "okay";
1242 }; 1255 };
1243 1256
1244 tdes@fc04c000 { 1257 tdes@fc04c000 {
@@ -1252,7 +1265,7 @@
1252 dma-names = "tx", "rx"; 1265 dma-names = "tx", "rx";
1253 clocks = <&tdes_clk>; 1266 clocks = <&tdes_clk>;
1254 clock-names = "tdes_clk"; 1267 clock-names = "tdes_clk";
1255 status = "disabled"; 1268 status = "okay";
1256 }; 1269 };
1257 1270
1258 sha@fc050000 { 1271 sha@fc050000 {
@@ -1264,7 +1277,7 @@
1264 dma-names = "tx"; 1277 dma-names = "tx";
1265 clocks = <&sha_clk>; 1278 clocks = <&sha_clk>;
1266 clock-names = "sha_clk"; 1279 clock-names = "sha_clk";
1267 status = "disabled"; 1280 status = "okay";
1268 }; 1281 };
1269 1282
1270 rstc@fc068600 { 1283 rstc@fc068600 {
@@ -1350,7 +1363,7 @@
1350 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */ 1363 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
1351 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */ 1364 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
1352 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */ 1365 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
1353 0x00000000 0x00000000 0x00000000 /* pioD */ 1366 0x0003ff00 0x8002a800 0x00000000 /* pioD */
1354 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */ 1367 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
1355 >; 1368 >;
1356 1369
@@ -1396,7 +1409,6 @@
1396 interrupt-controller; 1409 interrupt-controller;
1397 #interrupt-cells = <2>; 1410 #interrupt-cells = <2>;
1398 clocks = <&pioD_clk>; 1411 clocks = <&pioD_clk>;
1399 status = "disabled";
1400 }; 1412 };
1401 1413
1402 pioE: gpio@fc06d000 { 1414 pioE: gpio@fc06d000 {
@@ -1636,6 +1648,23 @@
1636 }; 1648 };
1637 }; 1649 };
1638 1650
1651 macb1 {
1652 pinctrl_macb1_rmii: macb1_rmii-0 {
1653 atmel,pins =
1654 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX0 */
1655 AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX1 */
1656 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX0 */
1657 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX1 */
1658 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXDV */
1659 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXER */
1660 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXEN */
1661 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXCK */
1662 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDC */
1663 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDIO */
1664 >;
1665 };
1666 };
1667
1639 mmc0 { 1668 mmc0 {
1640 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { 1669 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1641 atmel,pins = 1670 atmel,pins =
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts
index 24b4cd24dceb..7fc5602810ad 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts
@@ -206,7 +206,7 @@
206 }; 206 };
207 207
208 accelerometer@1d { 208 accelerometer@1d {
209 compatible = "adi,adxl34x"; 209 compatible = "adi,adxl345";
210 reg = <0x1d>; 210 reg = <0x1d>;
211 interrupt-parent = <&irqpin3>; 211 interrupt-parent = <&irqpin3>;
212 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>, 212 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 314e589cfa00..39c470e291f9 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -513,6 +513,13 @@
513 }; 513 };
514 }; 514 };
515 515
516 fpgamgr0: fpgamgr@ff706000 {
517 compatible = "altr,socfpga-fpga-mgr";
518 reg = <0xff706000 0x1000
519 0xffb90000 0x1000>;
520 interrupts = <0 175 4>;
521 };
522
516 gmac0: ethernet@ff700000 { 523 gmac0: ethernet@ff700000 {
517 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac"; 524 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
518 altr,sysmgr-syscon = <&sysmgr 0x60 0>; 525 altr,sysmgr-syscon = <&sysmgr 0x60 0>;
@@ -549,46 +556,6 @@
549 status = "disabled"; 556 status = "disabled";
550 }; 557 };
551 558
552 i2c0: i2c@ffc04000 {
553 #address-cells = <1>;
554 #size-cells = <0>;
555 compatible = "snps,designware-i2c";
556 reg = <0xffc04000 0x1000>;
557 clocks = <&l4_sp_clk>;
558 interrupts = <0 158 0x4>;
559 status = "disabled";
560 };
561
562 i2c1: i2c@ffc05000 {
563 #address-cells = <1>;
564 #size-cells = <0>;
565 compatible = "snps,designware-i2c";
566 reg = <0xffc05000 0x1000>;
567 clocks = <&l4_sp_clk>;
568 interrupts = <0 159 0x4>;
569 status = "disabled";
570 };
571
572 i2c2: i2c@ffc06000 {
573 #address-cells = <1>;
574 #size-cells = <0>;
575 compatible = "snps,designware-i2c";
576 reg = <0xffc06000 0x1000>;
577 clocks = <&l4_sp_clk>;
578 interrupts = <0 160 0x4>;
579 status = "disabled";
580 };
581
582 i2c3: i2c@ffc07000 {
583 #address-cells = <1>;
584 #size-cells = <0>;
585 compatible = "snps,designware-i2c";
586 reg = <0xffc07000 0x1000>;
587 clocks = <&l4_sp_clk>;
588 interrupts = <0 161 0x4>;
589 status = "disabled";
590 };
591
592 gpio0: gpio@ff708000 { 559 gpio0: gpio@ff708000 {
593 #address-cells = <1>; 560 #address-cells = <1>;
594 #size-cells = <0>; 561 #size-cells = <0>;
@@ -649,15 +616,44 @@
649 }; 616 };
650 }; 617 };
651 618
652 sdr: sdr@ffc25000 { 619 i2c0: i2c@ffc04000 {
653 compatible = "syscon"; 620 #address-cells = <1>;
654 reg = <0xffc25000 0x1000>; 621 #size-cells = <0>;
622 compatible = "snps,designware-i2c";
623 reg = <0xffc04000 0x1000>;
624 clocks = <&l4_sp_clk>;
625 interrupts = <0 158 0x4>;
626 status = "disabled";
655 }; 627 };
656 628
657 sdramedac { 629 i2c1: i2c@ffc05000 {
658 compatible = "altr,sdram-edac"; 630 #address-cells = <1>;
659 altr,sdr-syscon = <&sdr>; 631 #size-cells = <0>;
660 interrupts = <0 39 4>; 632 compatible = "snps,designware-i2c";
633 reg = <0xffc05000 0x1000>;
634 clocks = <&l4_sp_clk>;
635 interrupts = <0 159 0x4>;
636 status = "disabled";
637 };
638
639 i2c2: i2c@ffc06000 {
640 #address-cells = <1>;
641 #size-cells = <0>;
642 compatible = "snps,designware-i2c";
643 reg = <0xffc06000 0x1000>;
644 clocks = <&l4_sp_clk>;
645 interrupts = <0 160 0x4>;
646 status = "disabled";
647 };
648
649 i2c3: i2c@ffc07000 {
650 #address-cells = <1>;
651 #size-cells = <0>;
652 compatible = "snps,designware-i2c";
653 reg = <0xffc07000 0x1000>;
654 clocks = <&l4_sp_clk>;
655 interrupts = <0 161 0x4>;
656 status = "disabled";
661 }; 657 };
662 658
663 L2: l2-cache@fffef000 { 659 L2: l2-cache@fffef000 {
@@ -688,6 +684,29 @@
688 reg = <0xffff0000 0x10000>; 684 reg = <0xffff0000 0x10000>;
689 }; 685 };
690 686
687 rst: rstmgr@ffd05000 {
688 #reset-cells = <1>;
689 compatible = "altr,rst-mgr";
690 reg = <0xffd05000 0x1000>;
691 altr,modrst-offset = <0x10>;
692 };
693
694 scu: snoop-control-unit@fffec000 {
695 compatible = "arm,cortex-a9-scu";
696 reg = <0xfffec000 0x100>;
697 };
698
699 sdr: sdr@ffc25000 {
700 compatible = "syscon";
701 reg = <0xffc25000 0x1000>;
702 };
703
704 sdramedac {
705 compatible = "altr,sdram-edac";
706 altr,sdr-syscon = <&sdr>;
707 interrupts = <0 39 4>;
708 };
709
691 spi0: spi@fff00000 { 710 spi0: spi@fff00000 {
692 compatible = "snps,dw-apb-ssi"; 711 compatible = "snps,dw-apb-ssi";
693 #address-cells = <1>; 712 #address-cells = <1>;
@@ -699,11 +718,6 @@
699 status = "disabled"; 718 status = "disabled";
700 }; 719 };
701 720
702 scu: snoop-control-unit@fffec000 {
703 compatible = "arm,cortex-a9-scu";
704 reg = <0xfffec000 0x100>;
705 };
706
707 spi1: spi@fff01000 { 721 spi1: spi@fff01000 {
708 compatible = "snps,dw-apb-ssi"; 722 compatible = "snps,dw-apb-ssi";
709 #address-cells = <1>; 723 #address-cells = <1>;
@@ -715,6 +729,11 @@
715 status = "disabled"; 729 status = "disabled";
716 }; 730 };
717 731
732 sysmgr: sysmgr@ffd08000 {
733 compatible = "altr,sys-mgr", "syscon";
734 reg = <0xffd08000 0x4000>;
735 };
736
718 /* Local timer */ 737 /* Local timer */
719 timer@fffec600 { 738 timer@fffec600 {
720 compatible = "arm,cortex-a9-twd-timer"; 739 compatible = "arm,cortex-a9-twd-timer";
@@ -779,13 +798,6 @@
779 dma-names = "tx", "rx"; 798 dma-names = "tx", "rx";
780 }; 799 };
781 800
782 rst: rstmgr@ffd05000 {
783 #reset-cells = <1>;
784 compatible = "altr,rst-mgr";
785 reg = <0xffd05000 0x1000>;
786 altr,modrst-offset = <0x10>;
787 };
788
789 usbphy0: usbphy@0 { 801 usbphy0: usbphy@0 {
790 #phy-cells = <0>; 802 #phy-cells = <0>;
791 compatible = "usb-nop-xceiv"; 803 compatible = "usb-nop-xceiv";
@@ -829,10 +841,5 @@
829 clocks = <&osc1>; 841 clocks = <&osc1>;
830 status = "disabled"; 842 status = "disabled";
831 }; 843 };
832
833 sysmgr: sysmgr@ffd08000 {
834 compatible = "altr,sys-mgr", "syscon";
835 reg = <0xffd08000 0x4000>;
836 };
837 }; 844 };
838}; 845};
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 2340fcb2b535..cce9e50acf68 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -519,6 +519,7 @@
519 compatible = "snps,designware-i2c"; 519 compatible = "snps,designware-i2c";
520 reg = <0xffc02200 0x100>; 520 reg = <0xffc02200 0x100>;
521 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; 521 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
522 clocks = <&l4_sp_clk>;
522 status = "disabled"; 523 status = "disabled";
523 }; 524 };
524 525
@@ -528,6 +529,7 @@
528 compatible = "snps,designware-i2c"; 529 compatible = "snps,designware-i2c";
529 reg = <0xffc02300 0x100>; 530 reg = <0xffc02300 0x100>;
530 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; 531 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
532 clocks = <&l4_sp_clk>;
531 status = "disabled"; 533 status = "disabled";
532 }; 534 };
533 535
@@ -537,6 +539,7 @@
537 compatible = "snps,designware-i2c"; 539 compatible = "snps,designware-i2c";
538 reg = <0xffc02400 0x100>; 540 reg = <0xffc02400 0x100>;
539 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; 541 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&l4_sp_clk>;
540 status = "disabled"; 543 status = "disabled";
541 }; 544 };
542 545
@@ -546,6 +549,7 @@
546 compatible = "snps,designware-i2c"; 549 compatible = "snps,designware-i2c";
547 reg = <0xffc02500 0x100>; 550 reg = <0xffc02500 0x100>;
548 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; 551 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
552 clocks = <&l4_sp_clk>;
549 status = "disabled"; 553 status = "disabled";
550 }; 554 };
551 555
@@ -555,6 +559,7 @@
555 compatible = "snps,designware-i2c"; 559 compatible = "snps,designware-i2c";
556 reg = <0xffc02600 0x100>; 560 reg = <0xffc02600 0x100>;
557 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; 561 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
562 clocks = <&l4_sp_clk>;
558 status = "disabled"; 563 status = "disabled";
559 }; 564 };
560 565
@@ -658,6 +663,7 @@
658 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; 663 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
659 reg-shift = <2>; 664 reg-shift = <2>;
660 reg-io-width = <4>; 665 reg-io-width = <4>;
666 clocks = <&l4_sp_clk>;
661 status = "disabled"; 667 status = "disabled";
662 }; 668 };
663 669
@@ -692,6 +698,8 @@
692 compatible = "snps,dwc2"; 698 compatible = "snps,dwc2";
693 reg = <0xffb40000 0xffff>; 699 reg = <0xffb40000 0xffff>;
694 interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>; 700 interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
701 clocks = <&usb_clk>;
702 clock-names = "otg";
695 phys = <&usbphy0>; 703 phys = <&usbphy0>;
696 phy-names = "usb2-phy"; 704 phy-names = "usb2-phy";
697 status = "disabled"; 705 status = "disabled";
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
index 99aa9a1c8af0..567df98f1bb5 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -70,6 +70,33 @@
70 status = "okay"; 70 status = "okay";
71}; 71};
72 72
73&i2c1 {
74 speed-mode = <0>;
75 status = "okay";
76
77 /*
78 * adjust the falling times to decrease the i2c frequency to 50Khz
79 * because the LCD module does not work at the standard 100Khz
80 */
81 i2c-sda-falling-time-ns = <6000>;
82 i2c-scl-falling-time-ns = <6000>;
83
84 eeprom@51 {
85 compatible = "atmel,24c32";
86 reg = <0x51>;
87 pagesize = <32>;
88 };
89
90 rtc@68 {
91 compatible = "dallas,ds1339";
92 reg = <0x68>;
93 };
94};
95
73&uart1 { 96&uart1 {
74 status = "okay"; 97 status = "okay";
75}; 98};
99
100&usb0 {
101 status = "okay";
102};
diff --git a/arch/arm/boot/dts/stih407-b2120.dts b/arch/arm/boot/dts/stih407-b2120.dts
index 6d93475be554..c8ad905d0309 100644
--- a/arch/arm/boot/dts/stih407-b2120.dts
+++ b/arch/arm/boot/dts/stih407-b2120.dts
@@ -25,6 +25,7 @@
25 25
26 aliases { 26 aliases {
27 ttyAS0 = &sbc_serial0; 27 ttyAS0 = &sbc_serial0;
28 ethernet0 = &ethernet0;
28 }; 29 };
29 30
30}; 31};
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index ae0527754000..c944d3a5906d 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -152,6 +152,19 @@
152 <ST_IRQ_SYSCFG_DISABLED>; 152 <ST_IRQ_SYSCFG_DISABLED>;
153 }; 153 };
154 154
155 /* Display */
156 vtg_main: sti-vtg-main@8d02800 {
157 compatible = "st,vtg";
158 reg = <0x8d02800 0x200>;
159 interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
160 };
161
162 vtg_aux: sti-vtg-aux@8d00200 {
163 compatible = "st,vtg";
164 reg = <0x8d00200 0x100>;
165 interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
166 };
167
155 serial@9830000 { 168 serial@9830000 {
156 compatible = "st,asc"; 169 compatible = "st,asc";
157 reg = <0x9830000 0x2c>; 170 reg = <0x9830000 0x2c>;
@@ -396,6 +409,8 @@
396 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 409 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
397 clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; 410 clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
398 clock-names = "ssc"; 411 clock-names = "ssc";
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_spi1_default>;
399 414
400 status = "disabled"; 415 status = "disabled";
401 }; 416 };
@@ -406,6 +421,8 @@
406 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 421 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; 422 clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
408 clock-names = "ssc"; 423 clock-names = "ssc";
424 pinctrl-names = "default";
425 pinctrl-0 = <&pinctrl_spi2_default>;
409 426
410 status = "disabled"; 427 status = "disabled";
411 }; 428 };
@@ -416,6 +433,8 @@
416 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 433 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
417 clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; 434 clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
418 clock-names = "ssc"; 435 clock-names = "ssc";
436 pinctrl-names = "default";
437 pinctrl-0 = <&pinctrl_spi3_default>;
419 438
420 status = "disabled"; 439 status = "disabled";
421 }; 440 };
@@ -426,6 +445,8 @@
426 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 445 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
427 clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; 446 clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
428 clock-names = "ssc"; 447 clock-names = "ssc";
448 pinctrl-names = "default";
449 pinctrl-0 = <&pinctrl_spi4_default>;
429 450
430 status = "disabled"; 451 status = "disabled";
431 }; 452 };
@@ -437,6 +458,8 @@
437 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 458 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
438 clocks = <&clk_sysin>; 459 clocks = <&clk_sysin>;
439 clock-names = "ssc"; 460 clock-names = "ssc";
461 pinctrl-names = "default";
462 pinctrl-0 = <&pinctrl_spi10_default>;
440 463
441 status = "disabled"; 464 status = "disabled";
442 }; 465 };
@@ -447,6 +470,8 @@
447 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 470 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
448 clocks = <&clk_sysin>; 471 clocks = <&clk_sysin>;
449 clock-names = "ssc"; 472 clock-names = "ssc";
473 pinctrl-names = "default";
474 pinctrl-0 = <&pinctrl_spi11_default>;
450 475
451 status = "disabled"; 476 status = "disabled";
452 }; 477 };
@@ -457,6 +482,8 @@
457 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 482 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
458 clocks = <&clk_sysin>; 483 clocks = <&clk_sysin>;
459 clock-names = "ssc"; 484 clock-names = "ssc";
485 pinctrl-names = "default";
486 pinctrl-0 = <&pinctrl_spi12_default>;
460 487
461 status = "disabled"; 488 status = "disabled";
462 }; 489 };
@@ -585,7 +612,6 @@
585 /* COMMS PWM Module */ 612 /* COMMS PWM Module */
586 pwm0: pwm@9810000 { 613 pwm0: pwm@9810000 {
587 compatible = "st,sti-pwm"; 614 compatible = "st,sti-pwm";
588 status = "okay";
589 #pwm-cells = <2>; 615 #pwm-cells = <2>;
590 reg = <0x9810000 0x68>; 616 reg = <0x9810000 0x68>;
591 pinctrl-names = "default"; 617 pinctrl-names = "default";
@@ -593,12 +619,13 @@
593 clock-names = "pwm"; 619 clock-names = "pwm";
594 clocks = <&clk_sysin>; 620 clocks = <&clk_sysin>;
595 st,pwm-num-chan = <1>; 621 st,pwm-num-chan = <1>;
622
623 status = "disabled";
596 }; 624 };
597 625
598 /* SBC PWM Module */ 626 /* SBC PWM Module */
599 pwm1: pwm@9510000 { 627 pwm1: pwm@9510000 {
600 compatible = "st,sti-pwm"; 628 compatible = "st,sti-pwm";
601 status = "okay";
602 #pwm-cells = <2>; 629 #pwm-cells = <2>;
603 reg = <0x9510000 0x68>; 630 reg = <0x9510000 0x68>;
604 pinctrl-names = "default"; 631 pinctrl-names = "default";
@@ -609,6 +636,49 @@
609 clock-names = "pwm"; 636 clock-names = "pwm";
610 clocks = <&clk_sysin>; 637 clocks = <&clk_sysin>;
611 st,pwm-num-chan = <4>; 638 st,pwm-num-chan = <4>;
639
640 status = "disabled";
641 };
642
643 rng10: rng@08a89000 {
644 compatible = "st,rng";
645 reg = <0x08a89000 0x1000>;
646 clocks = <&clk_sysin>;
647 status = "okay";
648 };
649
650 rng11: rng@08a8a000 {
651 compatible = "st,rng";
652 reg = <0x08a8a000 0x1000>;
653 clocks = <&clk_sysin>;
654 status = "okay";
655 };
656
657 ethernet0: dwmac@9630000 {
658 device_type = "network";
659 status = "disabled";
660 compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";
661 reg = <0x9630000 0x8000>, <0x80 0x4>;
662 reg-names = "stmmaceth", "sti-ethconf";
663
664 st,syscon = <&syscfg_sbc_reg 0x80>;
665 st,gmac_en;
666 resets = <&softreset STIH407_ETH1_SOFTRESET>;
667 reset-names = "stmmaceth";
668
669 interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>,
670 <GIC_SPI 99 IRQ_TYPE_NONE>;
671 interrupt-names = "macirq", "eth_wake_irq";
672
673 /* DMA Bus Mode */
674 snps,pbl = <8>;
675
676 pinctrl-names = "default";
677 pinctrl-0 = <&pinctrl_rgmii1>;
678
679 clock-names = "stmmaceth", "sti-ethclk";
680 clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>,
681 <&clk_s_c0_flexgen CLK_ETH_PHY>;
612 }; 682 };
613 }; 683 };
614}; 684};
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index 1683debd0854..a538ae52d32b 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -53,7 +53,7 @@
53 reg = <0x0961f080 0x4>; 53 reg = <0x0961f080 0x4>;
54 reg-names = "irqmux"; 54 reg-names = "irqmux";
55 interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>; 55 interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
56 interrupts-names = "irqmux"; 56 interrupt-names = "irqmux";
57 ranges = <0 0x09610000 0x6000>; 57 ranges = <0 0x09610000 0x6000>;
58 58
59 pio0: gpio@09610000 { 59 pio0: gpio@09610000 {
@@ -107,12 +107,38 @@
107 st,retime-pin-mask = <0x3f>; 107 st,retime-pin-mask = <0x3f>;
108 }; 108 };
109 109
110 cec0 {
111 pinctrl_cec0_default: cec0-default {
112 st,pins {
113 hdmi_cec = <&pio2 4 ALT1 BIDIR>;
114 };
115 };
116 };
117
110 rc { 118 rc {
111 pinctrl_ir: ir0 { 119 pinctrl_ir: ir0 {
112 st,pins { 120 st,pins {
113 ir = <&pio4 0 ALT2 IN>; 121 ir = <&pio4 0 ALT2 IN>;
114 }; 122 };
115 }; 123 };
124
125 pinctrl_uhf: uhf0 {
126 st,pins {
127 ir = <&pio4 1 ALT2 IN>;
128 };
129 };
130
131 pinctrl_tx: tx0 {
132 st,pins {
133 tx = <&pio4 2 ALT2 OUT>;
134 };
135 };
136
137 pinctrl_tx_od: tx_od0 {
138 st,pins {
139 tx_od = <&pio4 3 ALT2 OUT>;
140 };
141 };
116 }; 142 };
117 143
118 /* SBC_ASC0 - UART10 */ 144 /* SBC_ASC0 - UART10 */
@@ -190,9 +216,9 @@
190 rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>; 216 rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>;
191 rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>; 217 rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>;
192 rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>; 218 rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>;
193 rxclk = <&pio2 2 ALT1 IN NICLK 500 CLK_A>; 219 rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
194 clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>; 220 clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
195 phyclk = <&pio2 3 ALT4 OUT NICLK 1750 CLK_B>; 221 phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>;
196 }; 222 };
197 }; 223 };
198 224
@@ -230,6 +256,33 @@
230 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>; 256 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
231 }; 257 };
232 }; 258 };
259
260 pinctrl_rmii1: rmii1-0 {
261 st,pins {
262 txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
263 txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
264 txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
265 mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
266 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
267 mdint = <&pio1 3 ALT1 IN BYPASS 0>;
268 rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_B>;
269 rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_B>;
270 rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_B>;
271 rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
272 };
273 };
274
275 pinctrl_rmii1_phyclk: rmii1_phyclk {
276 st,pins {
277 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
278 };
279 };
280
281 pinctrl_rmii1_phyclk_ext: rmii1_phyclk_ext {
282 st,pins {
283 phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>;
284 };
285 };
233 }; 286 };
234 287
235 pwm1 { 288 pwm1 {
@@ -254,6 +307,57 @@
254 }; 307 };
255 }; 308 };
256 }; 309 };
310
311 spi10 {
312 pinctrl_spi10_default: spi10-4w-alt1-0 {
313 st,pins {
314 mtsr = <&pio4 6 ALT1 OUT>;
315 mrst = <&pio4 7 ALT1 IN>;
316 scl = <&pio4 5 ALT1 OUT>;
317 };
318 };
319
320 pinctrl_spi10_3w_alt1_0: spi10-3w-alt1-0 {
321 st,pins {
322 mtsr = <&pio4 6 ALT1 BIDIR_PU>;
323 scl = <&pio4 5 ALT1 OUT>;
324 };
325 };
326 };
327
328 spi11 {
329 pinctrl_spi11_default: spi11-4w-alt2-0 {
330 st,pins {
331 mtsr = <&pio3 1 ALT2 OUT>;
332 mrst = <&pio3 0 ALT2 IN>;
333 scl = <&pio3 2 ALT2 OUT>;
334 };
335 };
336
337 pinctrl_spi11_3w_alt2_0: spi11-3w-alt2-0 {
338 st,pins {
339 mtsr = <&pio3 1 ALT2 BIDIR_PU>;
340 scl = <&pio3 2 ALT2 OUT>;
341 };
342 };
343 };
344
345 spi12 {
346 pinctrl_spi12_default: spi12-4w-alt2-0 {
347 st,pins {
348 mtsr = <&pio3 6 ALT2 OUT>;
349 mrst = <&pio3 4 ALT2 IN>;
350 scl = <&pio3 7 ALT2 OUT>;
351 };
352 };
353
354 pinctrl_spi12_3w_alt2_0: spi12-3w-alt2-0 {
355 st,pins {
356 mtsr = <&pio3 6 ALT2 BIDIR_PU>;
357 scl = <&pio3 7 ALT2 OUT>;
358 };
359 };
360 };
257 }; 361 };
258 362
259 pin-controller-front0 { 363 pin-controller-front0 {
@@ -264,7 +368,7 @@
264 reg = <0x0920f080 0x4>; 368 reg = <0x0920f080 0x4>;
265 reg-names = "irqmux"; 369 reg-names = "irqmux";
266 interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>; 370 interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>;
267 interrupts-names = "irqmux"; 371 interrupt-names = "irqmux";
268 ranges = <0 0x09200000 0x10000>; 372 ranges = <0 0x09200000 0x10000>;
269 373
270 pio10: pio@09200000 { 374 pio10: pio@09200000 {
@@ -422,20 +526,180 @@
422 }; 526 };
423 527
424 i2c3 { 528 i2c3 {
425 pinctrl_i2c3_default: i2c3-default { 529 pinctrl_i2c3_default: i2c3-alt1-0 {
426 st,pins { 530 st,pins {
427 sda = <&pio18 6 ALT1 BIDIR>; 531 sda = <&pio18 6 ALT1 BIDIR>;
428 scl = <&pio18 5 ALT1 BIDIR>; 532 scl = <&pio18 5 ALT1 BIDIR>;
429 }; 533 };
430 }; 534 };
535 pinctrl_i2c3_alt1_1: i2c3-alt1-1 {
536 st,pins {
537 sda = <&pio17 7 ALT1 BIDIR>;
538 scl = <&pio17 6 ALT1 BIDIR>;
539 };
540 };
541 pinctrl_i2c3_alt3_0: i2c3-alt3-0 {
542 st,pins {
543 sda = <&pio13 6 ALT3 BIDIR>;
544 scl = <&pio13 5 ALT3 BIDIR>;
545 };
546 };
431 }; 547 };
432 548
433 spi0 { 549 spi0 {
434 pinctrl_spi0_default: spi0-default { 550 pinctrl_spi0_default: spi0-4w-alt2-0 {
551 st,pins {
552 mtsr = <&pio10 6 ALT2 OUT>;
553 mrst = <&pio10 7 ALT2 IN>;
554 scl = <&pio10 5 ALT2 OUT>;
555 };
556 };
557
558 pinctrl_spi0_3w_alt2_0: spi0-3w-alt2-0 {
559 st,pins {
560 mtsr = <&pio10 6 ALT2 BIDIR_PU>;
561 scl = <&pio10 5 ALT2 OUT>;
562 };
563 };
564
565 pinctrl_spi0_4w_alt1_0: spi0-4w-alt1-0 {
566 st,pins {
567 mtsr = <&pio19 7 ALT1 OUT>;
568 mrst = <&pio19 5 ALT1 IN>;
569 scl = <&pio19 6 ALT1 OUT>;
570 };
571 };
572
573 pinctrl_spi0_3w_alt1_0: spi0-3w-alt1-0 {
574 st,pins {
575 mtsr = <&pio19 7 ALT1 BIDIR_PU>;
576 scl = <&pio19 6 ALT1 OUT>;
577 };
578 };
579 };
580
581 spi1 {
582 pinctrl_spi1_default: spi1-4w-alt2-0 {
583 st,pins {
584 mtsr = <&pio11 1 ALT2 OUT>;
585 mrst = <&pio11 2 ALT2 IN>;
586 scl = <&pio11 0 ALT2 OUT>;
587 };
588 };
589
590 pinctrl_spi1_3w_alt2_0: spi1-3w-alt2-0 {
591 st,pins {
592 mtsr = <&pio11 1 ALT2 BIDIR_PU>;
593 scl = <&pio11 0 ALT2 OUT>;
594 };
595 };
596
597 pinctrl_spi1_4w_alt1_0: spi1-4w-alt1-0 {
435 st,pins { 598 st,pins {
436 mtsr = <&pio12 6 ALT2 BIDIR>; 599 mtsr = <&pio14 3 ALT1 OUT>;
437 mrst = <&pio12 7 ALT2 BIDIR>; 600 mrst = <&pio14 4 ALT1 IN>;
438 scl = <&pio12 5 ALT2 BIDIR>; 601 scl = <&pio14 2 ALT1 OUT>;
602 };
603 };
604
605 pinctrl_spi1_3w_alt1_0: spi1-3w-alt1-0 {
606 st,pins {
607 mtsr = <&pio14 3 ALT1 BIDIR_PU>;
608 scl = <&pio14 2 ALT1 OUT>;
609 };
610 };
611 };
612
613 spi2 {
614 pinctrl_spi2_default: spi2-4w-alt2-0 {
615 st,pins {
616 mtsr = <&pio12 6 ALT2 OUT>;
617 mrst = <&pio12 7 ALT2 IN>;
618 scl = <&pio12 5 ALT2 OUT>;
619 };
620 };
621
622 pinctrl_spi2_3w_alt2_0: spi2-3w-alt2-0 {
623 st,pins {
624 mtsr = <&pio12 6 ALT2 BIDIR_PU>;
625 scl = <&pio12 5 ALT2 OUT>;
626 };
627 };
628
629 pinctrl_spi2_4w_alt1_0: spi2-4w-alt1-0 {
630 st,pins {
631 mtsr = <&pio14 6 ALT1 OUT>;
632 mrst = <&pio14 7 ALT1 IN>;
633 scl = <&pio14 5 ALT1 OUT>;
634 };
635 };
636
637 pinctrl_spi2_3w_alt1_0: spi2-3w-alt1-0 {
638 st,pins {
639 mtsr = <&pio14 6 ALT1 BIDIR_PU>;
640 scl = <&pio14 5 ALT1 OUT>;
641 };
642 };
643
644 pinctrl_spi2_4w_alt2_1: spi2-4w-alt2-1 {
645 st,pins {
646 mtsr = <&pio15 6 ALT2 OUT>;
647 mrst = <&pio15 7 ALT2 IN>;
648 scl = <&pio15 5 ALT2 OUT>;
649 };
650 };
651
652 pinctrl_spi2_3w_alt2_1: spi2-3w-alt2-1 {
653 st,pins {
654 mtsr = <&pio15 6 ALT2 BIDIR_PU>;
655 scl = <&pio15 5 ALT2 OUT>;
656 };
657 };
658 };
659
660 spi3 {
661 pinctrl_spi3_default: spi3-4w-alt3-0 {
662 st,pins {
663 mtsr = <&pio13 6 ALT3 OUT>;
664 mrst = <&pio13 7 ALT3 IN>;
665 scl = <&pio13 5 ALT3 OUT>;
666 };
667 };
668
669 pinctrl_spi3_3w_alt3_0: spi3-3w-alt3-0 {
670 st,pins {
671 mtsr = <&pio13 6 ALT3 BIDIR_PU>;
672 scl = <&pio13 5 ALT3 OUT>;
673 };
674 };
675
676 pinctrl_spi3_4w_alt1_0: spi3-4w-alt1-0 {
677 st,pins {
678 mtsr = <&pio17 7 ALT1 OUT>;
679 mrst = <&pio17 5 ALT1 IN>;
680 scl = <&pio17 6 ALT1 OUT>;
681 };
682 };
683
684 pinctrl_spi3_3w_alt1_0: spi3-3w-alt1-0 {
685 st,pins {
686 mtsr = <&pio17 7 ALT1 BIDIR_PU>;
687 scl = <&pio17 6 ALT1 OUT>;
688 };
689 };
690
691 pinctrl_spi3_4w_alt1_1: spi3-4w-alt1-1 {
692 st,pins {
693 mtsr = <&pio18 6 ALT1 OUT>;
694 mrst = <&pio18 7 ALT1 IN>;
695 scl = <&pio18 5 ALT1 OUT>;
696 };
697 };
698
699 pinctrl_spi3_3w_alt1_1: spi3-3w-alt1-1 {
700 st,pins {
701 mtsr = <&pio18 6 ALT1 BIDIR_PU>;
702 scl = <&pio18 5 ALT1 OUT>;
439 }; 703 };
440 }; 704 };
441 }; 705 };
@@ -627,6 +891,18 @@
627 }; 891 };
628 }; 892 };
629 }; 893 };
894
895 systrace {
896 pinctrl_systrace_default: systrace-default {
897 st,pins {
898 trc_data0 = <&pio11 3 ALT5 OUT>;
899 trc_data1 = <&pio11 4 ALT5 OUT>;
900 trc_data2 = <&pio11 5 ALT5 OUT>;
901 trc_data3 = <&pio11 6 ALT5 OUT>;
902 trc_clk = <&pio11 7 ALT5 OUT>;
903 };
904 };
905 };
630 }; 906 };
631 907
632 pin-controller-front1 { 908 pin-controller-front1 {
@@ -637,7 +913,7 @@
637 reg = <0x0921f080 0x4>; 913 reg = <0x0921f080 0x4>;
638 reg-names = "irqmux"; 914 reg-names = "irqmux";
639 interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>; 915 interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
640 interrupts-names = "irqmux"; 916 interrupt-names = "irqmux";
641 ranges = <0 0x09210000 0x10000>; 917 ranges = <0 0x09210000 0x10000>;
642 918
643 tsin4 { 919 tsin4 {
@@ -670,7 +946,7 @@
670 reg = <0x0922f080 0x4>; 946 reg = <0x0922f080 0x4>;
671 reg-names = "irqmux"; 947 reg-names = "irqmux";
672 interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>; 948 interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>;
673 interrupts-names = "irqmux"; 949 interrupt-names = "irqmux";
674 ranges = <0 0x09220000 0x6000>; 950 ranges = <0 0x09220000 0x6000>;
675 951
676 pio30: gpio@09220000 { 952 pio30: gpio@09220000 {
@@ -758,6 +1034,47 @@
758 }; 1034 };
759 }; 1035 };
760 }; 1036 };
1037
1038 spi4 {
1039 pinctrl_spi4_default: spi4-4w-alt1-0 {
1040 st,pins {
1041 mtsr = <&pio30 1 ALT1 OUT>;
1042 mrst = <&pio30 2 ALT1 IN>;
1043 scl = <&pio30 0 ALT1 OUT>;
1044 };
1045 };
1046
1047 pinctrl_spi4_3w_alt1_0: spi4-3w-alt1-0 {
1048 st,pins {
1049 mtsr = <&pio30 1 ALT1 BIDIR_PU>;
1050 scl = <&pio30 0 ALT1 OUT>;
1051 };
1052 };
1053
1054 pinctrl_spi4_4w_alt3_0: spi4-4w-alt3-0 {
1055 st,pins {
1056 mtsr = <&pio34 1 ALT3 OUT>;
1057 mrst = <&pio34 2 ALT3 IN>;
1058 scl = <&pio34 0 ALT3 OUT>;
1059 };
1060 };
1061
1062 pinctrl_spi4_3w_alt3_0: spi4-3w-alt3-0 {
1063 st,pins {
1064 mtsr = <&pio34 1 ALT3 BIDIR_PU>;
1065 scl = <&pio34 0 ALT3 OUT>;
1066 };
1067 };
1068 };
1069
1070 serial3 {
1071 pinctrl_serial3: serial3-0 {
1072 st,pins {
1073 tx = <&pio31 3 ALT1 OUT>;
1074 rx = <&pio31 4 ALT1 IN>;
1075 };
1076 };
1077 };
761 }; 1078 };
762 1079
763 pin-controller-flash { 1080 pin-controller-flash {
@@ -811,6 +1128,57 @@
811 emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>; 1128 emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>;
812 }; 1129 };
813 }; 1130 };
1131 pinctrl_sd0: sd0-0 {
1132 st,pins {
1133 sd_clk = <&pio40 6 ALT1 BIDIR>;
1134 sd_cmd = <&pio40 7 ALT1 BIDIR_PU>;
1135 sd_dat0 = <&pio41 0 ALT1 BIDIR_PU>;
1136 sd_dat1 = <&pio41 1 ALT1 BIDIR_PU>;
1137 sd_dat2 = <&pio41 2 ALT1 BIDIR_PU>;
1138 sd_dat3 = <&pio41 3 ALT1 BIDIR_PU>;
1139 sd_led = <&pio42 0 ALT2 OUT>;
1140 sd_pwren = <&pio42 2 ALT2 OUT>;
1141 sd_vsel = <&pio42 3 ALT2 OUT>;
1142 sd_cd = <&pio42 4 ALT2 IN>;
1143 sd_wp = <&pio42 5 ALT2 IN>;
1144 };
1145 };
1146 };
1147
1148 fsm {
1149 pinctrl_fsm: fsm {
1150 st,pins {
1151 spi-fsm-clk = <&pio40 1 ALT1 OUT>;
1152 spi-fsm-cs = <&pio40 0 ALT1 OUT>;
1153 spi-fsm-mosi = <&pio40 2 ALT1 OUT>;
1154 spi-fsm-miso = <&pio40 3 ALT1 IN>;
1155 spi-fsm-hol = <&pio40 5 ALT1 OUT>;
1156 spi-fsm-wp = <&pio40 4 ALT1 OUT>;
1157 };
1158 };
1159 };
1160
1161 nand {
1162 pinctrl_nand: nand {
1163 st,pins {
1164 nand_cs1 = <&pio40 6 ALT3 OUT>;
1165 nand_cs0 = <&pio40 7 ALT3 OUT>;
1166 nand_d0 = <&pio41 0 ALT3 BIDIR>;
1167 nand_d1 = <&pio41 1 ALT3 BIDIR>;
1168 nand_d2 = <&pio41 2 ALT3 BIDIR>;
1169 nand_d3 = <&pio41 3 ALT3 BIDIR>;
1170 nand_d4 = <&pio41 4 ALT3 BIDIR>;
1171 nand_d5 = <&pio41 5 ALT3 BIDIR>;
1172 nand_d6 = <&pio41 6 ALT3 BIDIR>;
1173 nand_d7 = <&pio41 7 ALT3 BIDIR>;
1174 nand_we = <&pio42 0 ALT3 OUT>;
1175 nand_dqs = <&pio42 1 ALT3 OUT>;
1176 nand_ale = <&pio42 2 ALT3 OUT>;
1177 nand_cle = <&pio42 3 ALT3 OUT>;
1178 nand_rnb = <&pio42 4 ALT3 IN>;
1179 nand_oe = <&pio42 5 ALT3 OUT>;
1180 };
1181 };
814 }; 1182 };
815 }; 1183 };
816 }; 1184 };
diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi
index 3efa3b2ebe90..d60f0d8add26 100644
--- a/arch/arm/boot/dts/stih407.dtsi
+++ b/arch/arm/boot/dts/stih407.dtsi
@@ -10,19 +10,6 @@
10#include "stih407-family.dtsi" 10#include "stih407-family.dtsi"
11/ { 11/ {
12 soc { 12 soc {
13 /* Display */
14 vtg_main: sti-vtg-main@8d02800 {
15 compatible = "st,vtg";
16 reg = <0x8d02800 0x200>;
17 interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
18 };
19
20 vtg_aux: sti-vtg-aux@8d00200 {
21 compatible = "st,vtg";
22 reg = <0x8d00200 0x100>;
23 interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
24 };
25
26 sti-display-subsystem { 13 sti-display-subsystem {
27 compatible = "st,sti-display-subsystem"; 14 compatible = "st,sti-display-subsystem";
28 #address-cells = <1>; 15 #address-cells = <1>;
@@ -103,48 +90,46 @@
103 <&clk_s_d0_quadfs 0>, 90 <&clk_s_d0_quadfs 0>,
104 <&clk_s_d2_quadfs 0>, 91 <&clk_s_d2_quadfs 0>,
105 <&clk_s_d2_quadfs 0>; 92 <&clk_s_d2_quadfs 0>;
106 ranges; 93 };
107
108 sti-hdmi@8d04000 {
109 compatible = "st,stih407-hdmi";
110 reg = <0x8d04000 0x1000>;
111 reg-names = "hdmi-reg";
112 interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
113 interrupt-names = "irq";
114 clock-names = "pix",
115 "tmds",
116 "phy",
117 "audio",
118 "main_parent",
119 "aux_parent";
120 94
121 clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, 95 sti-hdmi@8d04000 {
122 <&clk_s_d2_flexgen CLK_TMDS_HDMI>, 96 compatible = "st,stih407-hdmi";
123 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, 97 reg = <0x8d04000 0x1000>;
124 <&clk_s_d0_flexgen CLK_PCM_0>, 98 reg-names = "hdmi-reg";
125 <&clk_s_d2_quadfs 0>, 99 interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
126 <&clk_s_d2_quadfs 1>; 100 interrupt-names = "irq";
101 clock-names = "pix",
102 "tmds",
103 "phy",
104 "audio",
105 "main_parent",
106 "aux_parent";
127 107
128 hdmi,hpd-gpio = <&pio5 3>; 108 clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
129 reset-names = "hdmi"; 109 <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
130 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; 110 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
131 ddc = <&hdmiddc>; 111 <&clk_s_d0_flexgen CLK_PCM_0>,
112 <&clk_s_d2_quadfs 0>,
113 <&clk_s_d2_quadfs 1>;
132 114
133 }; 115 hdmi,hpd-gpio = <&pio5 3>;
116 reset-names = "hdmi";
117 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
118 ddc = <&hdmiddc>;
119 };
134 120
135 sti-hda@8d02000 { 121 sti-hda@8d02000 {
136 compatible = "st,stih407-hda"; 122 compatible = "st,stih407-hda";
137 reg = <0x8d02000 0x400>, <0x92b0120 0x4>; 123 reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
138 reg-names = "hda-reg", "video-dacs-ctrl"; 124 reg-names = "hda-reg", "video-dacs-ctrl";
139 clock-names = "pix", 125 clock-names = "pix",
140 "hddac", 126 "hddac",
141 "main_parent", 127 "main_parent",
142 "aux_parent"; 128 "aux_parent";
143 clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>, 129 clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
144 <&clk_s_d2_flexgen CLK_HDDAC>, 130 <&clk_s_d2_flexgen CLK_HDDAC>,
145 <&clk_s_d2_quadfs 0>, 131 <&clk_s_d2_quadfs 0>,
146 <&clk_s_d2_quadfs 1>; 132 <&clk_s_d2_quadfs 1>;
147 };
148 }; 133 };
149 }; 134 };
150 }; 135 };
diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts
index 16f02c5e33a4..118ac284fc4b 100644
--- a/arch/arm/boot/dts/stih410-b2120.dts
+++ b/arch/arm/boot/dts/stih410-b2120.dts
@@ -25,6 +25,7 @@
25 25
26 aliases { 26 aliases {
27 ttyAS0 = &sbc_serial0; 27 ttyAS0 = &sbc_serial0;
28 ethernet0 = &ethernet0;
28 }; 29 };
29 30
30 soc { 31 soc {
@@ -35,5 +36,29 @@
35 sd-uhs-sdr104; 36 sd-uhs-sdr104;
36 sd-uhs-ddr50; 37 sd-uhs-ddr50;
37 }; 38 };
39
40 usb2_picophy1: phy2 {
41 status = "okay";
42 };
43
44 usb2_picophy2: phy3 {
45 status = "okay";
46 };
47
48 ohci0: usb@9a03c00 {
49 status = "okay";
50 };
51
52 ehci0: usb@9a03e00 {
53 status = "okay";
54 };
55
56 ohci1: usb@9a83c00 {
57 status = "okay";
58 };
59
60 ehci1: usb@9a83e00 {
61 status = "okay";
62 };
38 }; 63 };
39}; 64};
diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index 6f40bc99c22f..18ed1ad10d32 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -22,6 +22,8 @@
22 resets = <&softreset STIH407_PICOPHY_SOFTRESET>, 22 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
23 <&picophyreset STIH407_PICOPHY0_RESET>; 23 <&picophyreset STIH407_PICOPHY0_RESET>;
24 reset-names = "global", "port"; 24 reset-names = "global", "port";
25
26 status = "disabled";
25 }; 27 };
26 28
27 usb2_picophy2: phy3 { 29 usb2_picophy2: phy3 {
@@ -31,6 +33,8 @@
31 resets = <&softreset STIH407_PICOPHY_SOFTRESET>, 33 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
32 <&picophyreset STIH407_PICOPHY1_RESET>; 34 <&picophyreset STIH407_PICOPHY1_RESET>;
33 reset-names = "global", "port"; 35 reset-names = "global", "port";
36
37 status = "disabled";
34 }; 38 };
35 39
36 ohci0: usb@9a03c00 { 40 ohci0: usb@9a03c00 {
@@ -43,6 +47,8 @@
43 reset-names = "power", "softreset"; 47 reset-names = "power", "softreset";
44 phys = <&usb2_picophy1>; 48 phys = <&usb2_picophy1>;
45 phy-names = "usb"; 49 phy-names = "usb";
50
51 status = "disabled";
46 }; 52 };
47 53
48 ehci0: usb@9a03e00 { 54 ehci0: usb@9a03e00 {
@@ -57,6 +63,8 @@
57 reset-names = "power", "softreset"; 63 reset-names = "power", "softreset";
58 phys = <&usb2_picophy1>; 64 phys = <&usb2_picophy1>;
59 phy-names = "usb"; 65 phy-names = "usb";
66
67 status = "disabled";
60 }; 68 };
61 69
62 ohci1: usb@9a83c00 { 70 ohci1: usb@9a83c00 {
@@ -69,6 +77,8 @@
69 reset-names = "power", "softreset"; 77 reset-names = "power", "softreset";
70 phys = <&usb2_picophy2>; 78 phys = <&usb2_picophy2>;
71 phy-names = "usb"; 79 phy-names = "usb";
80
81 status = "disabled";
72 }; 82 };
73 83
74 ehci1: usb@9a83e00 { 84 ehci1: usb@9a83e00 {
@@ -83,19 +93,8 @@
83 reset-names = "power", "softreset"; 93 reset-names = "power", "softreset";
84 phys = <&usb2_picophy2>; 94 phys = <&usb2_picophy2>;
85 phy-names = "usb"; 95 phy-names = "usb";
86 };
87 96
88 /* Display */ 97 status = "disabled";
89 vtg_main: sti-vtg-main@8d02800 {
90 compatible = "st,vtg";
91 reg = <0x8d02800 0x200>;
92 interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
93 };
94
95 vtg_aux: sti-vtg-aux@8d00200 {
96 compatible = "st,vtg";
97 reg = <0x8d00200 0x100>;
98 interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
99 }; 98 };
100 99
101 sti-display-subsystem { 100 sti-display-subsystem {
@@ -178,48 +177,46 @@
178 <&clk_s_d0_quadfs 0>, 177 <&clk_s_d0_quadfs 0>,
179 <&clk_s_d2_quadfs 0>, 178 <&clk_s_d2_quadfs 0>,
180 <&clk_s_d2_quadfs 0>; 179 <&clk_s_d2_quadfs 0>;
181 ranges; 180 };
182 181
183 sti-hdmi@8d04000 { 182 sti-hdmi@8d04000 {
184 compatible = "st,stih407-hdmi"; 183 compatible = "st,stih407-hdmi";
185 reg = <0x8d04000 0x1000>; 184 reg = <0x8d04000 0x1000>;
186 reg-names = "hdmi-reg"; 185 reg-names = "hdmi-reg";
187 interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>; 186 interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
188 interrupt-names = "irq"; 187 interrupt-names = "irq";
189 clock-names = "pix", 188 clock-names = "pix",
190 "tmds", 189 "tmds",
191 "phy", 190 "phy",
192 "audio", 191 "audio",
193 "main_parent", 192 "main_parent",
194 "aux_parent"; 193 "aux_parent";
195 194
196 clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, 195 clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
197 <&clk_s_d2_flexgen CLK_TMDS_HDMI>, 196 <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
198 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, 197 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
199 <&clk_s_d0_flexgen CLK_PCM_0>, 198 <&clk_s_d0_flexgen CLK_PCM_0>,
200 <&clk_s_d2_quadfs 0>, 199 <&clk_s_d2_quadfs 0>,
201 <&clk_s_d2_quadfs 1>; 200 <&clk_s_d2_quadfs 1>;
202 201
203 hdmi,hpd-gpio = <&pio5 3>; 202 hdmi,hpd-gpio = <&pio5 3>;
204 reset-names = "hdmi"; 203 reset-names = "hdmi";
205 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; 204 resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
206 ddc = <&hdmiddc>; 205 ddc = <&hdmiddc>;
207 206 };
208 }; 207
209 208 sti-hda@8d02000 {
210 sti-hda@8d02000 { 209 compatible = "st,stih407-hda";
211 compatible = "st,stih407-hda"; 210 reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
212 reg = <0x8d02000 0x400>, <0x92b0120 0x4>; 211 reg-names = "hda-reg", "video-dacs-ctrl";
213 reg-names = "hda-reg", "video-dacs-ctrl"; 212 clock-names = "pix",
214 clock-names = "pix", 213 "hddac",
215 "hddac", 214 "main_parent",
216 "main_parent", 215 "aux_parent";
217 "aux_parent"; 216 clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
218 clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>, 217 <&clk_s_d2_flexgen CLK_HDDAC>,
219 <&clk_s_d2_flexgen CLK_HDDAC>, 218 <&clk_s_d2_quadfs 0>,
220 <&clk_s_d2_quadfs 0>, 219 <&clk_s_d2_quadfs 1>;
221 <&clk_s_d2_quadfs 1>;
222 };
223 }; 220 };
224 }; 221 };
225 222
diff --git a/arch/arm/boot/dts/stih418-b2199.dts b/arch/arm/boot/dts/stih418-b2199.dts
index 82eee39ccb31..772d2bb07e5f 100644
--- a/arch/arm/boot/dts/stih418-b2199.dts
+++ b/arch/arm/boot/dts/stih418-b2199.dts
@@ -24,6 +24,7 @@
24 24
25 aliases { 25 aliases {
26 ttyAS0 = &sbc_serial0; 26 ttyAS0 = &sbc_serial0;
27 ethernet0 = &ethernet0;
27 }; 28 };
28 29
29 soc { 30 soc {
@@ -101,5 +102,12 @@
101 st_dwc3: dwc3@8f94000 { 102 st_dwc3: dwc3@8f94000 {
102 status = "okay"; 103 status = "okay";
103 }; 104 };
105
106 ethernet0: dwmac@9630000 {
107 st,tx-retime-src = "clkgen";
108 status = "okay";
109 phy-mode = "rgmii";
110 fixed-link = <0 1 1000 0 0>;
111 };
104 }; 112 };
105}; 113};
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index 148e1772465f..ae6d9978ea19 100644
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -44,7 +44,7 @@
44 44
45 clockgen_a9_pll: clockgen-a9-pll { 45 clockgen_a9_pll: clockgen-a9-pll {
46 #clock-cells = <1>; 46 #clock-cells = <1>;
47 compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32"; 47 compatible = "st,stih418-plls-c28-a9", "st,clkgen-plls-c32";
48 48
49 clocks = <&clk_sysin>; 49 clocks = <&clk_sysin>;
50 50
diff --git a/arch/arm/boot/dts/stih418.dtsi b/arch/arm/boot/dts/stih418.dtsi
index 8160a75539a4..965f88160718 100644
--- a/arch/arm/boot/dts/stih418.dtsi
+++ b/arch/arm/boot/dts/stih418.dtsi
@@ -99,5 +99,11 @@
99 phys = <&usb2_picophy2>; 99 phys = <&usb2_picophy2>;
100 phy-names = "usb"; 100 phy-names = "usb";
101 }; 101 };
102
103 mmc0: sdhci@09060000 {
104 assigned-clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
105 assigned-clock-parents = <&clk_s_c0_pll1 0>;
106 assigned-clock-rates = <200000000>;
107 };
102 }; 108 };
103}; 109};
diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index f589fe487f13..ad21a4293a33 100644
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -27,6 +27,14 @@
27 }; 27 };
28 }; 28 };
29 29
30 pwm0: pwm@9810000 {
31 status = "okay";
32 };
33
34 pwm1: pwm@9510000 {
35 status = "okay";
36 };
37
30 i2c@9842000 { 38 i2c@9842000 {
31 status = "okay"; 39 status = "okay";
32 }; 40 };
@@ -79,5 +87,11 @@
79 status = "okay"; 87 status = "okay";
80 }; 88 };
81 89
90 ethernet0: dwmac@9630000 {
91 st,tx-retime-src = "clkgen";
92 status = "okay";
93 phy-mode = "rgmii";
94 fixed-link = <0 1 1000 0 0>;
95 };
82 }; 96 };
83}; 97};
diff --git a/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
index 143056872650..53660894ea95 100644
--- a/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
+++ b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
@@ -78,6 +78,18 @@
78 }; 78 };
79}; 79};
80 80
81&i2c1 {
82 pinctrl-names = "default";
83 pinctrl-0 = <&i2c1_pins_a>;
84 status = "okay";
85};
86
87&i2c2 {
88 pinctrl-names = "default";
89 pinctrl-0 = <&i2c2_pins_a>;
90 status = "okay";
91};
92
81&lradc { 93&lradc {
82 vref-supply = <&reg_vcc3v0>; 94 vref-supply = <&reg_vcc3v0>;
83 status = "okay"; 95 status = "okay";
diff --git a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
index 570754d8df67..3f0aeb8288cd 100644
--- a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
+++ b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
@@ -47,6 +47,7 @@
47#include "sunxi-common-regulators.dtsi" 47#include "sunxi-common-regulators.dtsi"
48#include <dt-bindings/gpio/gpio.h> 48#include <dt-bindings/gpio/gpio.h>
49#include <dt-bindings/input/input.h> 49#include <dt-bindings/input/input.h>
50#include <dt-bindings/interrupt-controller/irq.h>
50 51
51/ { 52/ {
52 model = "Gemei G9 Tablet"; 53 model = "Gemei G9 Tablet";
@@ -64,7 +65,7 @@
64/* 65/*
65 * TODO: 66 * TODO:
66 * 2x cameras via CSI 67 * 2x cameras via CSI
67 * bma250 IRQs 68 * audio
68 * AXP battery management 69 * AXP battery management
69 * NAND 70 * NAND
70 * OTG 71 * OTG
@@ -103,12 +104,8 @@
103 bma250@18 { 104 bma250@18 {
104 compatible = "bosch,bma250"; 105 compatible = "bosch,bma250";
105 reg = <0x18>; 106 reg = <0x18>;
106 107 interrupt-parent = <&pio>;
107 /* 108 interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH00 / EINT0 */
108 * TODO: interrupt pins:
109 * int1 - PH00
110 * int2 - PI10
111 */
112 }; 109 };
113}; 110};
114 111
diff --git a/arch/arm/boot/dts/sun4i-a10-inet1.dts b/arch/arm/boot/dts/sun4i-a10-inet1.dts
new file mode 100644
index 000000000000..487ce63519dc
--- /dev/null
+++ b/arch/arm/boot/dts/sun4i-a10-inet1.dts
@@ -0,0 +1,226 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun4i-a10.dtsi"
45#include "sunxi-common-regulators.dtsi"
46#include <dt-bindings/gpio/gpio.h>
47#include <dt-bindings/input/input.h>
48#include <dt-bindings/interrupt-controller/irq.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50
51/ {
52 model = "iNet-1";
53 compatible = "inet-tek,inet1", "allwinner,sun4i-a10";
54
55 aliases {
56 serial0 = &uart0;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62};
63
64&cpu0 {
65 cpu-supply = <&reg_dcdc2>;
66};
67
68&ehci0 {
69 status = "okay";
70};
71
72&ehci1 {
73 status = "okay";
74};
75
76&i2c0 {
77 pinctrl-names = "default";
78 pinctrl-0 = <&i2c0_pins_a>;
79 status = "okay";
80
81 axp209: pmic@34 {
82 reg = <0x34>;
83 interrupts = <0>;
84 };
85};
86
87#include "axp209.dtsi"
88
89&i2c1 {
90 pinctrl-names = "default";
91 pinctrl-0 = <&i2c1_pins_a>;
92 status = "okay";
93
94 /* Accelerometer */
95 bma250@18 {
96 compatible = "bosch,bma250";
97 reg = <0x18>;
98 interrupt-parent = <&pio>;
99 interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH0 / EINT0 */
100 };
101};
102
103&i2c2 {
104 pinctrl-names = "default";
105 pinctrl-0 = <&i2c2_pins_a>;
106 status = "okay";
107};
108
109&lradc {
110 vref-supply = <&reg_ldo2>;
111 status = "okay";
112
113 button@200 {
114 label = "Volume Up";
115 linux,code = <KEY_VOLUMEUP>;
116 channel = <0>;
117 voltage = <200000>;
118 };
119
120 button@1000 {
121 label = "Volume Down";
122 linux,code = <KEY_VOLUMEDOWN>;
123 channel = <0>;
124 voltage = <1000000>;
125 };
126
127 button@1200 {
128 label = "Home";
129 linux,code = <KEY_HOMEPAGE>;
130 channel = <0>;
131 voltage = <1200000>;
132 };
133};
134
135&mmc0 {
136 pinctrl-names = "default";
137 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
138 vmmc-supply = <&reg_vcc3v3>;
139 bus-width = <4>;
140 cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
141 cd-inverted;
142 status = "okay";
143};
144
145&ohci0 {
146 status = "okay";
147};
148
149&otg_sram {
150 status = "okay";
151};
152
153&pio {
154 usb0_id_detect_pin: usb0_id_detect_pin@0 {
155 allwinner,pins = "PH4";
156 allwinner,function = "gpio_in";
157 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
158 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
159 };
160
161 usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
162 allwinner,pins = "PH5";
163 allwinner,function = "gpio_in";
164 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
165 allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
166 };
167};
168
169&reg_dcdc2 {
170 regulator-always-on;
171 regulator-min-microvolt = <1000000>;
172 regulator-max-microvolt = <1400000>;
173 regulator-name = "vdd-cpu";
174};
175
176&reg_dcdc3 {
177 regulator-always-on;
178 regulator-min-microvolt = <1250000>;
179 regulator-max-microvolt = <1250000>;
180 regulator-name = "vdd-int-dll";
181};
182
183&reg_ldo1 {
184 regulator-name = "vdd-rtc";
185};
186
187&reg_ldo2 {
188 regulator-always-on;
189 regulator-min-microvolt = <3000000>;
190 regulator-max-microvolt = <3000000>;
191 regulator-name = "avcc";
192};
193
194&reg_usb0_vbus {
195 status = "okay";
196};
197
198&reg_usb1_vbus {
199 status = "okay";
200};
201
202&reg_usb2_vbus {
203 status = "okay";
204};
205
206&uart0 {
207 pinctrl-names = "default";
208 pinctrl-0 = <&uart0_pins_a>;
209 status = "okay";
210};
211
212&usb_otg {
213 dr_mode = "otg";
214 status = "okay";
215};
216
217&usbphy {
218 pinctrl-names = "default";
219 pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
220 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
221 usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
222 usb0_vbus-supply = <&reg_usb0_vbus>;
223 usb1_vbus-supply = <&reg_usb1_vbus>;
224 usb2_vbus-supply = <&reg_usb2_vbus>;
225 status = "okay";
226};
diff --git a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
index 6c927a824ba2..77c31dab86b1 100644
--- a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
+++ b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
@@ -47,6 +47,7 @@
47#include "sunxi-common-regulators.dtsi" 47#include "sunxi-common-regulators.dtsi"
48 48
49#include <dt-bindings/gpio/gpio.h> 49#include <dt-bindings/gpio/gpio.h>
50#include <dt-bindings/input/input.h>
50 51
51/ { 52/ {
52 model = "INet-97F Rev 02"; 53 model = "INet-97F Rev 02";
@@ -61,8 +62,8 @@
61 }; 62 };
62}; 63};
63 64
64&ehci0 { 65&cpu0 {
65 status = "okay"; 66 cpu-supply = <&reg_dcdc2>;
66}; 67};
67 68
68&ehci1 { 69&ehci1 {
@@ -75,12 +76,62 @@
75 status = "okay"; 76 status = "okay";
76 77
77 axp209: pmic@34 { 78 axp209: pmic@34 {
78 compatible = "x-powers,axp209";
79 reg = <0x34>; 79 reg = <0x34>;
80 interrupts = <0>; 80 interrupts = <0>;
81 };
82};
83
84#include "axp209.dtsi"
85
86&i2c1 {
87 pinctrl-names = "default";
88 pinctrl-0 = <&i2c1_pins_a>;
89 status = "okay";
90};
91
92&i2c2 {
93 pinctrl-names = "default";
94 pinctrl-0 = <&i2c2_pins_a>;
95 status = "okay";
96};
97
98&lradc {
99 vref-supply = <&reg_ldo2>;
100 status = "okay";
101
102 button@200 {
103 label = "Menu";
104 linux,code = <KEY_MENU>;
105 channel = <0>;
106 voltage = <200000>;
107 };
108
109 button@600 {
110 label = "Volume Up";
111 linux,code = <KEY_VOLUMEUP>;
112 channel = <0>;
113 voltage = <600000>;
114 };
115
116 button@800 {
117 label = "Volume Down";
118 linux,code = <KEY_VOLUMEDOWN>;
119 channel = <0>;
120 voltage = <800000>;
121 };
122
123 button@1000 {
124 label = "Home";
125 linux,code = <KEY_HOMEPAGE>;
126 channel = <0>;
127 voltage = <1000000>;
128 };
81 129
82 interrupt-controller; 130 button@1200 {
83 #interrupt-cells = <1>; 131 label = "Esc";
132 linux,code = <KEY_ESC>;
133 channel = <0>;
134 voltage = <1200000>;
84 }; 135 };
85}; 136};
86 137
@@ -94,15 +145,52 @@
94 status = "okay"; 145 status = "okay";
95}; 146};
96 147
97&ohci0 { 148&otg_sram {
98 status = "okay"; 149 status = "okay";
99}; 150};
100 151
101&ohci1 { 152&pio {
102 status = "okay"; 153 usb0_id_detect_pin: usb0_id_detect_pin@0 {
154 allwinner,pins = "PH4";
155 allwinner,function = "gpio_in";
156 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
157 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
158 };
159
160 usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
161 allwinner,pins = "PH5";
162 allwinner,function = "gpio_in";
163 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
164 allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
165 };
103}; 166};
104 167
105&reg_usb1_vbus { 168&reg_dcdc2 {
169 regulator-always-on;
170 regulator-min-microvolt = <1000000>;
171 regulator-max-microvolt = <1400000>;
172 regulator-name = "vdd-cpu";
173};
174
175&reg_dcdc3 {
176 regulator-always-on;
177 regulator-min-microvolt = <1250000>;
178 regulator-max-microvolt = <1250000>;
179 regulator-name = "vdd-int-dll";
180};
181
182&reg_ldo1 {
183 regulator-name = "vdd-rtc";
184};
185
186&reg_ldo2 {
187 regulator-always-on;
188 regulator-min-microvolt = <3000000>;
189 regulator-max-microvolt = <3000000>;
190 regulator-name = "avcc";
191};
192
193&reg_usb0_vbus {
106 status = "okay"; 194 status = "okay";
107}; 195};
108 196
@@ -116,8 +204,17 @@
116 status = "okay"; 204 status = "okay";
117}; 205};
118 206
207&usb_otg {
208 dr_mode = "otg";
209 status = "okay";
210};
211
119&usbphy { 212&usbphy {
120 usb1_vbus-supply = <&reg_usb1_vbus>; 213 pinctrl-names = "default";
214 pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
215 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
216 usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
217 usb0_vbus-supply = <&reg_usb0_vbus>;
121 usb2_vbus-supply = <&reg_usb2_vbus>; 218 usb2_vbus-supply = <&reg_usb2_vbus>;
122 status = "okay"; 219 status = "okay";
123}; 220};
diff --git a/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
new file mode 100644
index 000000000000..2fffc0434075
--- /dev/null
+++ b/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
@@ -0,0 +1,227 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun4i-a10.dtsi"
45#include "sunxi-common-regulators.dtsi"
46#include <dt-bindings/gpio/gpio.h>
47#include <dt-bindings/input/input.h>
48#include <dt-bindings/interrupt-controller/irq.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50
51/ {
52 model = "iNet-9F Rev 03";
53 compatible = "inet-tek,inet9f-rev03", "allwinner,sun4i-a10";
54
55 aliases {
56 serial0 = &uart0;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62};
63
64&cpu0 {
65 cpu-supply = <&reg_dcdc2>;
66};
67
68&ehci1 {
69 status = "okay";
70};
71
72&i2c0 {
73 pinctrl-names = "default";
74 pinctrl-0 = <&i2c0_pins_a>;
75 status = "okay";
76
77 axp209: pmic@34 {
78 reg = <0x34>;
79 interrupts = <0>;
80 };
81};
82
83#include "axp209.dtsi"
84
85&i2c1 {
86 pinctrl-names = "default";
87 pinctrl-0 = <&i2c1_pins_a>;
88 status = "okay";
89
90 /* Accelerometer */
91 bma250@18 {
92 compatible = "bosch,bma250";
93 reg = <0x18>;
94 interrupt-parent = <&pio>;
95 interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH0 / EINT0 */
96 };
97};
98
99&i2c2 {
100 pinctrl-names = "default";
101 pinctrl-0 = <&i2c2_pins_a>;
102 status = "okay";
103};
104
105&lradc {
106 vref-supply = <&reg_ldo2>;
107 status = "okay";
108
109 button@200 {
110 label = "Menu";
111 linux,code = <KEY_MENU>;
112 channel = <0>;
113 voltage = <200000>;
114 };
115
116 button@600 {
117 label = "Volume Up";
118 linux,code = <KEY_VOLUMEUP>;
119 channel = <0>;
120 voltage = <600000>;
121 };
122
123 button@800 {
124 label = "Volume Down";
125 linux,code = <KEY_VOLUMEDOWN>;
126 channel = <0>;
127 voltage = <800000>;
128 };
129
130 button@1000 {
131 label = "Home";
132 linux,code = <KEY_HOMEPAGE>;
133 channel = <0>;
134 voltage = <1000000>;
135 };
136
137 button@1200 {
138 label = "Esc";
139 linux,code = <KEY_ESC>;
140 channel = <0>;
141 voltage = <1200000>;
142 };
143};
144
145&mmc0 {
146 pinctrl-names = "default";
147 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
148 vmmc-supply = <&reg_vcc3v3>;
149 bus-width = <4>;
150 cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
151 cd-inverted;
152 status = "okay";
153};
154
155&otg_sram {
156 status = "okay";
157};
158
159&pio {
160 usb0_id_detect_pin: usb0_id_detect_pin@0 {
161 allwinner,pins = "PH4";
162 allwinner,function = "gpio_in";
163 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
164 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
165 };
166
167 usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
168 allwinner,pins = "PH5";
169 allwinner,function = "gpio_in";
170 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
171 allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
172 };
173};
174
175&reg_dcdc2 {
176 regulator-always-on;
177 regulator-min-microvolt = <1000000>;
178 regulator-max-microvolt = <1400000>;
179 regulator-name = "vdd-cpu";
180};
181
182&reg_dcdc3 {
183 regulator-always-on;
184 regulator-min-microvolt = <1250000>;
185 regulator-max-microvolt = <1250000>;
186 regulator-name = "vdd-int-dll";
187};
188
189&reg_ldo1 {
190 regulator-name = "vdd-rtc";
191};
192
193&reg_ldo2 {
194 regulator-always-on;
195 regulator-min-microvolt = <3000000>;
196 regulator-max-microvolt = <3000000>;
197 regulator-name = "avcc";
198};
199
200&reg_usb0_vbus {
201 status = "okay";
202};
203
204&reg_usb2_vbus {
205 status = "okay";
206};
207
208&uart0 {
209 pinctrl-names = "default";
210 pinctrl-0 = <&uart0_pins_a>;
211 status = "okay";
212};
213
214&usb_otg {
215 dr_mode = "otg";
216 status = "okay";
217};
218
219&usbphy {
220 pinctrl-names = "default";
221 pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
222 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
223 usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
224 usb0_vbus-supply = <&reg_usb0_vbus>;
225 usb2_vbus-supply = <&reg_usb2_vbus>;
226 status = "okay";
227};
diff --git a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
index dc2f2aeaff07..7afc7a64eef1 100644
--- a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
+++ b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
@@ -156,6 +156,10 @@
156 status = "okay"; 156 status = "okay";
157}; 157};
158 158
159&otg_sram {
160 status = "okay";
161};
162
159&pio { 163&pio {
160 emac_power_pin_q5: emac_power_pin@0 { 164 emac_power_pin_q5: emac_power_pin@0 {
161 allwinner,pins = "PH19"; 165 allwinner,pins = "PH19";
@@ -172,6 +176,11 @@
172 }; 176 };
173}; 177};
174 178
179&reg_usb0_vbus {
180 regulator-boot-on;
181 status = "okay";
182};
183
175&reg_usb1_vbus { 184&reg_usb1_vbus {
176 status = "okay"; 185 status = "okay";
177}; 186};
@@ -186,7 +195,13 @@
186 status = "okay"; 195 status = "okay";
187}; 196};
188 197
198&usb_otg {
199 dr_mode = "host";
200 status = "okay";
201};
202
189&usbphy { 203&usbphy {
204 usb0_vbus-supply = <&reg_usb0_vbus>;
190 usb1_vbus-supply = <&reg_usb1_vbus>; 205 usb1_vbus-supply = <&reg_usb1_vbus>;
191 usb2_vbus-supply = <&reg_usb2_vbus>; 206 usb2_vbus-supply = <&reg_usb2_vbus>;
192 status = "okay"; 207 status = "okay";
diff --git a/arch/arm/boot/dts/sun4i-a10-marsboard.dts b/arch/arm/boot/dts/sun4i-a10-marsboard.dts
index 02158bcd64ee..9a012db79963 100644
--- a/arch/arm/boot/dts/sun4i-a10-marsboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-marsboard.dts
@@ -154,6 +154,10 @@
154 status = "okay"; 154 status = "okay";
155}; 155};
156 156
157&otg_sram {
158 status = "okay";
159};
160
157&pio { 161&pio {
158 led_pins_marsboard: led_pins@0 { 162 led_pins_marsboard: led_pins@0 {
159 allwinner,pins = "PB5", "PB6", "PB7", "PB8"; 163 allwinner,pins = "PB5", "PB6", "PB7", "PB8";
@@ -161,6 +165,13 @@
161 allwinner,drive = <SUN4I_PINCTRL_10_MA>; 165 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
162 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 166 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
163 }; 167 };
168
169 usb0_id_detect_pin: usb0_id_detect_pin@0 {
170 allwinner,pins = "PH4";
171 allwinner,function = "gpio_in";
172 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
173 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
174 };
164}; 175};
165 176
166&reg_usb1_vbus { 177&reg_usb1_vbus {
@@ -184,7 +195,15 @@
184 status = "okay"; 195 status = "okay";
185}; 196};
186 197
198&usb_otg {
199 dr_mode = "otg";
200 status = "okay";
201};
202
187&usbphy { 203&usbphy {
204 pinctrl-names = "default";
205 pinctrl-0 = <&usb0_id_detect_pin>;
206 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
188 usb1_vbus-supply = <&reg_usb1_vbus>; 207 usb1_vbus-supply = <&reg_usb1_vbus>;
189 usb2_vbus-supply = <&reg_usb2_vbus>; 208 usb2_vbus-supply = <&reg_usb2_vbus>;
190 status = "okay"; 209 status = "okay";
diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
index 28e32ad705cd..b350448c7217 100644
--- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
+++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
@@ -124,6 +124,18 @@
124 }; 124 };
125}; 125};
126 126
127&i2c1 {
128 pinctrl-names = "default";
129 pinctrl-0 = <&i2c1_pins_a>;
130 status = "okay";
131
132 eeprom: eeprom@50 {
133 compatible = "atmel,24c16";
134 reg = <0x50>;
135 pagesize = <16>;
136 };
137};
138
127&mdio { 139&mdio {
128 status = "okay"; 140 status = "okay";
129 141
diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/sun4i-a10-pcduino.dts
index 4e3e1b9d8217..39034aa8e1ae 100644
--- a/arch/arm/boot/dts/sun4i-a10-pcduino.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pcduino.dts
@@ -104,6 +104,10 @@
104 }; 104 };
105}; 105};
106 106
107&cpu0 {
108 cpu-supply = <&reg_dcdc2>;
109};
110
107&ehci0 { 111&ehci0 {
108 status = "okay"; 112 status = "okay";
109}; 113};
@@ -129,12 +133,8 @@
129 status = "okay"; 133 status = "okay";
130 134
131 axp209: pmic@34 { 135 axp209: pmic@34 {
132 compatible = "x-powers,axp209";
133 reg = <0x34>; 136 reg = <0x34>;
134 interrupts = <0>; 137 interrupts = <0>;
135
136 interrupt-controller;
137 #interrupt-cells = <1>;
138 }; 138 };
139}; 139};
140 140
@@ -164,6 +164,10 @@
164 status = "okay"; 164 status = "okay";
165}; 165};
166 166
167&otg_sram {
168 status = "okay";
169};
170
167&pio { 171&pio {
168 led_pins_pcduino: led_pins@0 { 172 led_pins_pcduino: led_pins@0 {
169 allwinner,pins = "PH15", "PH16"; 173 allwinner,pins = "PH15", "PH16";
@@ -178,14 +182,40 @@
178 allwinner,drive = <SUN4I_PINCTRL_10_MA>; 182 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
179 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 183 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
180 }; 184 };
185
186 usb0_id_detect_pin: usb0_id_detect_pin@0 {
187 allwinner,pins = "PH4";
188 allwinner,function = "gpio_in";
189 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
190 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
191 };
181}; 192};
182 193
183&reg_usb1_vbus { 194#include "axp209.dtsi"
184 status = "okay"; 195
196&reg_dcdc2 {
197 regulator-always-on;
198 regulator-min-microvolt = <1000000>;
199 regulator-max-microvolt = <1400000>;
200 regulator-name = "vdd-cpu";
185}; 201};
186 202
187&reg_usb2_vbus { 203&reg_dcdc3 {
188 status = "okay"; 204 regulator-always-on;
205 regulator-min-microvolt = <1000000>;
206 regulator-max-microvolt = <1400000>;
207 regulator-name = "vdd-int-dll";
208};
209
210&reg_ldo1 {
211 regulator-name = "vdd-rtc";
212};
213
214&reg_ldo2 {
215 regulator-always-on;
216 regulator-min-microvolt = <3000000>;
217 regulator-max-microvolt = <3000000>;
218 regulator-name = "avcc";
189}; 219};
190 220
191&uart0 { 221&uart0 {
@@ -194,8 +224,16 @@
194 status = "okay"; 224 status = "okay";
195}; 225};
196 226
227&usb_otg {
228 dr_mode = "otg";
229 status = "okay";
230};
231
197&usbphy { 232&usbphy {
198 usb1_vbus-supply = <&reg_usb1_vbus>; 233 pinctrl-names = "default";
199 usb2_vbus-supply = <&reg_usb2_vbus>; 234 pinctrl-0 = <&usb0_id_detect_pin>;
235 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
236 usb1_vbus-supply = <&reg_vcc5v0>; /* USB1 VBUS is always on */
237 usb2_vbus-supply = <&reg_vcc5v0>; /* USB2 VBUS is always on */
200 status = "okay"; 238 status = "okay";
201}; 239};
diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino2.dts b/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
new file mode 100644
index 000000000000..de483a1bf36a
--- /dev/null
+++ b/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
@@ -0,0 +1,78 @@
1/*
2 * Copyright 2015 Siarhei Siamashka <siarhei.siamashka@gmail.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * The LinkSprite pcDuino2 board is almost identical to the older
45 * LinkSprite pcDuino1 board. The only software visible difference
46 * is that the pcDuino2 board got a USB VBUS voltage regulator, which
47 * is controlled by the PD2 pin (pulled-up by default). Also one of
48 * the USB host ports has been replaced with a USB WIFI chip.
49 */
50
51#include "sun4i-a10-pcduino.dts"
52
53/ {
54 model = "LinkSprite pcDuino2";
55 compatible = "linksprite,a10-pcduino2", "allwinner,sun4i-a10";
56};
57
58&pio {
59 usb2_vbus_pin_pcduino2: usb2_vbus_pin@0 {
60 allwinner,pins = "PD2";
61 allwinner,function = "gpio_out";
62 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
63 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
64 };
65};
66
67&reg_usb2_vbus {
68 pinctrl-names = "default";
69 pinctrl-0 = <&usb2_vbus_pin_pcduino2>;
70 gpio = <&pio 3 2 GPIO_ACTIVE_HIGH>;
71 status = "okay";
72};
73
74&usbphy {
75 usb1_vbus-supply = <&reg_vcc3v3>; /* USB WIFI is always on */
76 usb2_vbus-supply = <&reg_usb2_vbus>;
77 status = "okay";
78};
diff --git a/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts b/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
new file mode 100644
index 000000000000..d4ad02182353
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
@@ -0,0 +1,159 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun5i-a10s.dtsi"
45#include "sunxi-common-regulators.dtsi"
46#include <dt-bindings/gpio/gpio.h>
47#include <dt-bindings/pinctrl/sun4i-a10.h>
48
49/ {
50 model = "Auxtek t003 A10s hdmi tv-stick";
51 compatible = "allwinner,auxtek-t003", "allwinner,sun5i-a10s";
52
53 aliases {
54 serial0 = &uart0;
55 };
56
57 chosen {
58 stdout-path = "serial0:115200n8";
59 };
60
61 leds {
62 compatible = "gpio-leds";
63 pinctrl-names = "default";
64 pinctrl-0 = <&led_pins_t003>;
65
66 red {
67 label = "t003-tv-dongle:red:usr";
68 gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2 */
69 default-state = "on";
70 };
71 };
72};
73
74&ehci0 {
75 status = "okay";
76};
77
78&i2c0 {
79 pinctrl-names = "default";
80 pinctrl-0 = <&i2c0_pins_a>;
81 status = "okay";
82
83 axp152: pmic@30 {
84 compatible = "x-powers,axp152";
85 reg = <0x30>;
86 interrupts = <0>;
87 interrupt-controller;
88 #interrupt-cells = <1>;
89 };
90};
91
92&mmc0 {
93 pinctrl-names = "default";
94 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_t003>;
95 vmmc-supply = <&reg_vcc3v3>;
96 bus-width = <4>;
97 cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
98 cd-inverted;
99 status = "okay";
100};
101
102&ohci0 {
103 status = "okay";
104};
105
106&otg_sram {
107 status = "okay";
108};
109
110&pio {
111 mmc0_cd_pin_t003: mmc0_cd_pin@0 {
112 allwinner,pins = "PG1";
113 allwinner,function = "gpio_in";
114 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
115 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
116 };
117
118 led_pins_t003: led_pins@0 {
119 allwinner,pins = "PB2";
120 allwinner,function = "gpio_out";
121 allwinner,drive = <SUN4I_PINCTRL_20_MA>;
122 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
123 };
124};
125
126&reg_usb0_vbus {
127 gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
128 status = "okay";
129};
130
131&reg_usb1_vbus {
132 gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
133 status = "okay";
134};
135
136&uart0 {
137 pinctrl-names = "default";
138 pinctrl-0 = <&uart0_pins_a>;
139 status = "okay";
140};
141
142&usb0_vbus_pin_a {
143 allwinner,pins = "PG13";
144};
145
146&usb1_vbus_pin_a {
147 allwinner,pins = "PB10";
148};
149
150&usb_otg {
151 dr_mode = "host";
152 status = "okay";
153};
154
155&usbphy {
156 usb0_vbus-supply = <&reg_usb0_vbus>;
157 usb1_vbus-supply = <&reg_usb1_vbus>;
158 status = "okay";
159};
diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
index 5a422c1ff725..86d046a502e6 100644
--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
@@ -111,7 +111,7 @@
111 status = "okay"; 111 status = "okay";
112 112
113 at24@50 { 113 at24@50 {
114 compatible = "at,24c16"; 114 compatible = "atmel,24c16";
115 pagesize = <16>; 115 pagesize = <16>;
116 reg = <0x50>; 116 reg = <0x50>;
117 read-only; 117 read-only;
diff --git a/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts b/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
new file mode 100644
index 000000000000..9fea918f949e
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
@@ -0,0 +1,224 @@
1/*
2 * Copyright 2015 Jelle van der Waa <jelle@vdwaa.nl>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun5i-a10s.dtsi"
45#include "sunxi-common-regulators.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/interrupt-controller/irq.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50
51/ {
52 model = "A10s-Wobo i5";
53 compatible = "wobo,a10s-wobo-i5", "allwinner,sun5i-a10s";
54
55 aliases {
56 serial0 = &uart0;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62
63 leds {
64 compatible = "gpio-leds";
65 pinctrl-names = "default";
66 pinctrl-0 = <&led_pins_wobo_i5>;
67
68 blue {
69 label = "a10s-wobo-i5:blue:usr";
70 gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>;
71 default-state = "on";
72 };
73 };
74
75 reg_emac_3v3: emac-3v3 {
76 compatible = "regulator-fixed";
77 pinctrl-names = "default";
78 pinctrl-0 = <&emac_power_pin_wobo>;
79 regulator-name = "emac-3v3";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 enable-active-high;
83 gpio = <&pio 0 2 GPIO_ACTIVE_HIGH>;
84 };
85};
86
87&cpu0 {
88 cpu-supply = <&reg_dcdc2>;
89};
90
91&ehci0 {
92 status = "okay";
93};
94
95&emac {
96 pinctrl-names = "default";
97 pinctrl-0 = <&emac_pins_b>;
98 phy = <&phy1>;
99 status = "okay";
100};
101
102&emac_sram {
103 status = "okay";
104};
105
106&i2c0 {
107 pinctrl-names = "default";
108 pinctrl-0 = <&i2c0_pins_a>;
109 status = "okay";
110
111 axp209: pmic@34 {
112 reg = <0x34>;
113 interrupts = <0>;
114 };
115};
116
117#include "axp209.dtsi"
118
119&mdio {
120 phy-supply = <&reg_emac_3v3>;
121 status = "okay";
122
123 phy1: ethernet-phy@1 {
124 reg = <1>;
125 };
126};
127
128&mmc0 {
129 pinctrl-names = "default";
130 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_wobo_i5>;
131 vmmc-supply = <&reg_vcc3v3>;
132 bus-width = <4>;
133 cd-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
134 cd-inverted;
135 status = "okay";
136};
137
138&ohci0 {
139 status = "okay";
140};
141
142&otg_sram {
143 status = "okay";
144};
145
146&pio {
147 led_pins_wobo_i5: led_pins@0 {
148 allwinner,pins = "PB2";
149 allwinner,function = "gpio_out";
150 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
151 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
152 };
153
154 mmc0_cd_pin_wobo_i5: mmc0_cd_pin@0 {
155 allwinner,pins = "PB3";
156 allwinner,function = "gpio_in";
157 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
158 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
159 };
160
161 emac_power_pin_wobo: emac_power_pin@0 {
162 allwinner,pins = "PA02";
163 allwinner,function = "gpio_out";
164 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
165 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
166 };
167};
168
169&reg_dcdc2 {
170 regulator-always-on;
171 regulator-min-microvolt = <1000000>;
172 regulator-max-microvolt = <1400000>;
173 regulator-name = "vdd-cpu";
174};
175
176&reg_dcdc3 {
177 regulator-always-on;
178 regulator-min-microvolt = <1250000>;
179 regulator-max-microvolt = <1250000>;
180 regulator-name = "vdd-int-dll";
181};
182
183&reg_ldo1 {
184 regulator-name = "vdd-rtc";
185};
186
187&reg_ldo2 {
188 regulator-always-on;
189 regulator-min-microvolt = <3000000>;
190 regulator-max-microvolt = <3000000>;
191 regulator-name = "avcc";
192};
193
194&reg_ldo3 {
195 regulator-always-on;
196 regulator-min-microvolt = <3300000>;
197 regulator-max-microvolt = <3300000>;
198 regulator-name = "vcc-wifi";
199};
200
201&reg_usb1_vbus {
202 gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>;
203 status = "okay";
204};
205
206&uart0 {
207 pinctrl-names = "default";
208 pinctrl-0 = <&uart0_pins_a>;
209 status = "okay";
210};
211
212&usb_otg {
213 dr_mode = "host";
214 status = "okay";
215};
216
217&usb1_vbus_pin_a {
218 allwinner,pins = "PG12";
219};
220
221&usbphy {
222 usb1_vbus-supply = <&reg_usb1_vbus>;
223 status = "okay";
224};
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index a513b416a807..bddd0de88af6 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -77,6 +77,15 @@
77 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; 77 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
78 status = "disabled"; 78 status = "disabled";
79 }; 79 };
80
81 framebuffer@2 {
82 compatible = "allwinner,simple-framebuffer",
83 "simple-framebuffer";
84 allwinner,pipeline = "de_be0-lcd0-tve0";
85 clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
86 <&ahb_gates 44>;
87 status = "disabled";
88 };
80 }; 89 };
81 90
82 clocks { 91 clocks {
@@ -156,6 +165,14 @@
156 #size-cells = <0>; 165 #size-cells = <0>;
157 }; 166 };
158 167
168 pwm: pwm@01c20e00 {
169 compatible = "allwinner,sun5i-a10s-pwm";
170 reg = <0x01c20e00 0xc>;
171 clocks = <&osc24M>;
172 #pwm-cells = <3>;
173 status = "disabled";
174 };
175
159 uart0: serial@01c28000 { 176 uart0: serial@01c28000 {
160 compatible = "snps,dw-apb-uart"; 177 compatible = "snps,dw-apb-uart";
161 reg = <0x01c28000 0x400>; 178 reg = <0x01c28000 0x400>;
@@ -195,13 +212,6 @@
195 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 212 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
196 }; 213 };
197 214
198 uart3_pins_a: uart3@0 {
199 allwinner,pins = "PG9", "PG10";
200 allwinner,function = "uart3";
201 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
202 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
203 };
204
205 emac_pins_a: emac0@0 { 215 emac_pins_a: emac0@0 {
206 allwinner,pins = "PA0", "PA1", "PA2", 216 allwinner,pins = "PA0", "PA1", "PA2",
207 "PA3", "PA4", "PA5", "PA6", 217 "PA3", "PA4", "PA5", "PA6",
@@ -213,6 +223,17 @@
213 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 223 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
214 }; 224 };
215 225
226 emac_pins_b: emac0@1 {
227 allwinner,pins = "PD6", "PD7", "PD10",
228 "PD11", "PD12", "PD13", "PD14",
229 "PD15", "PD18", "PD19", "PD20",
230 "PD21", "PD22", "PD23", "PD24",
231 "PD25", "PD26", "PD27";
232 allwinner,function = "emac";
233 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
234 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
235 };
236
216 mmc1_pins_a: mmc1@0 { 237 mmc1_pins_a: mmc1@0 {
217 allwinner,pins = "PG3", "PG4", "PG5", 238 allwinner,pins = "PG3", "PG4", "PG5",
218 "PG6", "PG7", "PG8"; 239 "PG6", "PG7", "PG8";
diff --git a/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts b/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts
new file mode 100644
index 000000000000..6fa54b661423
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dts
@@ -0,0 +1,227 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun5i-a13.dtsi"
45#include "sunxi-common-regulators.dtsi"
46#include <dt-bindings/gpio/gpio.h>
47#include <dt-bindings/input/input.h>
48#include <dt-bindings/interrupt-controller/irq.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50
51/ {
52 model = "INet-98V Rev 02";
53 compatible = "primux,inet98v-rev2", "allwinner,sun5i-a13";
54
55 aliases {
56 serial0 = &uart1;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62
63};
64
65&cpu0 {
66 cpu-supply = <&reg_dcdc2>;
67};
68
69&ehci0 {
70 status = "okay";
71};
72
73&i2c0 {
74 pinctrl-names = "default";
75 pinctrl-0 = <&i2c0_pins_a>;
76 status = "okay";
77
78 axp209: pmic@34 {
79 reg = <0x34>;
80 interrupts = <0>;
81 };
82};
83
84#include "axp209.dtsi"
85
86&i2c1 {
87 pinctrl-names = "default";
88 pinctrl-0 = <&i2c1_pins_a>;
89 status = "okay";
90
91 pcf8563: rtc@51 {
92 compatible = "nxp,pcf8563";
93 reg = <0x51>;
94 };
95};
96
97&lradc {
98 vref-supply = <&reg_ldo2>;
99 status = "okay";
100
101 button@200 {
102 label = "Volume Up";
103 linux,code = <KEY_VOLUMEUP>;
104 channel = <0>;
105 voltage = <200000>;
106 };
107
108 button@400 {
109 label = "Volume Down";
110 linux,code = <KEY_VOLUMEDOWN>;
111 channel = <0>;
112 voltage = <400000>;
113 };
114};
115
116&mmc0 {
117 pinctrl-names = "default";
118 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_inet98fv2>;
119 vmmc-supply = <&reg_vcc3v3>;
120 bus-width = <4>;
121 cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
122 cd-inverted;
123 status = "okay";
124};
125
126&mmc2 {
127 pinctrl-names = "default";
128 pinctrl-0 = <&mmc2_pins_a>;
129 vmmc-supply = <&reg_vcc3v3>;
130 bus-width = <8>;
131 non-removable;
132 status = "okay";
133
134 mmccard: mmccard@0 {
135 reg = <0>;
136 compatible = "mmc-card";
137 broken-hpi;
138 };
139};
140
141&otg_sram {
142 status = "okay";
143};
144
145&pio {
146 mmc0_cd_pin_inet98fv2: mmc0_cd_pin@0 {
147 allwinner,pins = "PG0";
148 allwinner,function = "gpio_in";
149 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
150 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
151 };
152
153 usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
154 allwinner,pins = "PG1";
155 allwinner,function = "gpio_in";
156 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
157 allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
158 };
159
160 usb0_id_detect_pin: usb0_id_detect_pin@0 {
161 allwinner,pins = "PG2";
162 allwinner,function = "gpio_in";
163 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
164 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
165 };
166};
167
168&reg_dcdc2 {
169 regulator-always-on;
170 regulator-min-microvolt = <1000000>;
171 regulator-max-microvolt = <1400000>;
172 regulator-name = "vdd-cpu";
173};
174
175&reg_dcdc3 {
176 regulator-always-on;
177 regulator-min-microvolt = <1250000>;
178 regulator-max-microvolt = <1250000>;
179 regulator-name = "vdd-int-pll";
180};
181
182&reg_ldo1 {
183 regulator-name = "vdd-rtc";
184};
185
186&reg_ldo2 {
187 regulator-always-on;
188 regulator-min-microvolt = <3000000>;
189 regulator-max-microvolt = <3000000>;
190 regulator-name = "avcc";
191};
192
193&reg_ldo3 {
194 regulator-min-microvolt = <3300000>;
195 regulator-max-microvolt = <3300000>;
196 regulator-name = "vcc-wifi";
197};
198
199&reg_usb0_vbus {
200 gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
201 status = "okay";
202};
203
204&uart1 {
205 pinctrl-names = "default";
206 pinctrl-0 = <&uart1_pins_b>;
207 status = "okay";
208};
209
210&usb_otg {
211 dr_mode = "otg";
212 status = "okay";
213};
214
215&usb0_vbus_pin_a {
216 allwinner,pins = "PG12";
217};
218
219&usbphy {
220 pinctrl-names = "default";
221 pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
222 usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
223 usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
224 usb0_vbus-supply = <&reg_usb0_vbus>;
225 usb1_vbus-supply = <&reg_ldo3>;
226 status = "okay";
227};
diff --git a/arch/arm/boot/dts/sun5i-a13-q8-tablet.dts b/arch/arm/boot/dts/sun5i-a13-q8-tablet.dts
new file mode 100644
index 000000000000..72e93acb5a9e
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a13-q8-tablet.dts
@@ -0,0 +1,60 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun5i-a13.dtsi"
45#include "sun5i-q8-common.dtsi"
46
47/ {
48 model = "Q8 A13 Tablet";
49 compatible = "allwinner,q8-a13", "allwinner,sun5i-a13";
50};
51
52&reg_ldo3 {
53 regulator-min-microvolt = <3300000>;
54 regulator-max-microvolt = <3300000>;
55 regulator-name = "vcc-wifi";
56};
57
58&usbphy {
59 usb1_vbus-supply = <&reg_ldo3>;
60};
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index f3631c9c6fa2..d910d3a6c41c 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -150,6 +150,16 @@
150 "apb1_uart3"; 150 "apb1_uart3";
151 }; 151 };
152 }; 152 };
153
154 soc@01c00000 {
155 pwm: pwm@01c20e00 {
156 compatible = "allwinner,sun5i-a13-pwm";
157 reg = <0x01c20e00 0xc>;
158 clocks = <&osc24M>;
159 #pwm-cells = <3>;
160 status = "disabled";
161 };
162 };
153}; 163};
154 164
155&cpu0 { 165&cpu0 {
diff --git a/arch/arm/boot/dts/sun5i-q8-common.dtsi b/arch/arm/boot/dts/sun5i-q8-common.dtsi
new file mode 100644
index 000000000000..a78e189f6653
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-q8-common.dtsi
@@ -0,0 +1,180 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42#include "sunxi-q8-common.dtsi"
43
44#include <dt-bindings/pwm/pwm.h>
45
46/ {
47 aliases {
48 serial0 = &uart1;
49 };
50
51 backlight: backlight {
52 compatible = "pwm-backlight";
53 pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
54 brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
55 default-brightness-level = <8>;
56 /* TODO: backlight uses axp gpio1 as enable pin */
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62};
63
64&cpu0 {
65 cpu-supply = <&reg_dcdc2>;
66};
67
68&ehci0 {
69 status = "okay";
70};
71
72&i2c0 {
73 axp209: pmic@34 {
74 reg = <0x34>;
75 interrupts = <0>;
76 };
77};
78
79&i2c1 {
80 pcf8563: rtc@51 {
81 compatible = "nxp,pcf8563";
82 reg = <0x51>;
83 };
84};
85
86#include "axp209.dtsi"
87
88&mmc0 {
89 pinctrl-names = "default";
90 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8>;
91 vmmc-supply = <&reg_vcc3v0>;
92 bus-width = <4>;
93 cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
94 cd-inverted;
95 status = "okay";
96};
97
98&otg_sram {
99 status = "okay";
100};
101
102&pio {
103 mmc0_cd_pin_q8: mmc0_cd_pin@0 {
104 allwinner,pins = "PG0";
105 allwinner,function = "gpio_in";
106 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
107 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
108 };
109
110 usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
111 allwinner,pins = "PG1";
112 allwinner,function = "gpio_in";
113 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
114 allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
115 };
116
117 usb0_id_detect_pin: usb0_id_detect_pin@0 {
118 allwinner,pins = "PG2";
119 allwinner,function = "gpio_in";
120 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
121 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
122 };
123
124 usb0_vbus_pin_a: usb0_vbus_pin@0 {
125 allwinner,pins = "PG12";
126 allwinner,function = "gpio_out";
127 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
128 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
129 };
130};
131
132&reg_dcdc2 {
133 regulator-always-on;
134 regulator-min-microvolt = <1000000>;
135 regulator-max-microvolt = <1500000>;
136 regulator-name = "vdd-cpu";
137};
138
139&reg_dcdc3 {
140 regulator-always-on;
141 regulator-min-microvolt = <1000000>;
142 regulator-max-microvolt = <1400000>;
143 regulator-name = "vdd-int-pll";
144};
145
146&reg_ldo1 {
147 regulator-name = "vdd-rtc";
148};
149
150&reg_ldo2 {
151 regulator-always-on;
152 regulator-min-microvolt = <3000000>;
153 regulator-max-microvolt = <3000000>;
154 regulator-name = "avcc";
155};
156
157&reg_usb0_vbus {
158 gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
159 status = "okay";
160};
161
162&uart1 {
163 pinctrl-names = "default";
164 pinctrl-0 = <&uart1_pins_b>;
165 status = "okay";
166};
167
168&usb_otg {
169 dr_mode = "otg";
170 status = "okay";
171};
172
173&usbphy {
174 pinctrl-names = "default";
175 pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
176 usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
177 usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
178 usb0_vbus-supply = <&reg_usb0_vbus>;
179 status = "okay";
180};
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts
new file mode 100644
index 000000000000..abf3ccb1a82c
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
@@ -0,0 +1,214 @@
1/*
2 * Copyright 2015 Free Electrons
3 * Copyright 2015 NextThing Co
4 *
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45
46/dts-v1/;
47#include "sun5i-r8.dtsi"
48#include "sunxi-common-regulators.dtsi"
49
50#include <dt-bindings/gpio/gpio.h>
51#include <dt-bindings/interrupt-controller/irq.h>
52
53/ {
54 model = "NextThing C.H.I.P.";
55 compatible = "nextthing,chip", "allwinner,sun5i-r8";
56
57 aliases {
58 i2c0 = &i2c0;
59 i2c2 = &i2c2;
60 serial0 = &uart1;
61 serial1 = &uart3;
62 };
63
64 chosen {
65 stdout-path = "serial0:115200n8";
66 };
67};
68
69&ehci0 {
70 status = "okay";
71};
72
73&i2c0 {
74 pinctrl-names = "default";
75 pinctrl-0 = <&i2c0_pins_a>;
76 status = "okay";
77
78 axp209: pmic@34 {
79 reg = <0x34>;
80
81 /*
82 * The interrupt is routed through the "External Fast
83 * Interrupt Request" pin (ball G13 of the module)
84 * directly to the main interrupt controller, without
85 * any other controller interfering.
86 */
87 interrupts = <0>;
88 };
89};
90
91#include "axp209.dtsi"
92
93&i2c2 {
94 pinctrl-names = "default";
95 pinctrl-0 = <&i2c2_pins_a>;
96 status = "okay";
97
98 xio: gpio@38 {
99 compatible = "nxp,pcf8574a";
100 reg = <0x38>;
101
102 gpio-controller;
103 #gpio-cells = <2>;
104
105 interrupt-parent = <&pio>;
106 interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>;
107 interrupt-controller;
108 #interrupt-cells = <2>;
109 };
110};
111
112&mmc0 {
113 pinctrl-names = "default";
114 pinctrl-0 = <&mmc0_pins_a>;
115 vmmc-supply = <&reg_vcc3v3>;
116 bus-width = <4>;
117 non-removable;
118 status = "okay";
119};
120
121&ohci0 {
122 status = "okay";
123};
124
125&otg_sram {
126 status = "okay";
127};
128
129&pio {
130 chip_vbus_pin: chip_vbus_pin@0 {
131 allwinner,pins = "PB10";
132 allwinner,function = "gpio_out";
133 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
134 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
135 };
136
137 chip_id_det_pin: chip_id_det_pin@0 {
138 allwinner,pins = "PG2";
139 allwinner,function = "gpio_in";
140 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
141 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
142 };
143};
144
145&reg_dcdc2 {
146 regulator-min-microvolt = <1000000>;
147 regulator-max-microvolt = <1400000>;
148 regulator-name = "cpuvdd";
149 regulator-always-on;
150};
151
152&reg_dcdc3 {
153 regulator-min-microvolt = <1000000>;
154 regulator-max-microvolt = <1300000>;
155 regulator-name = "corevdd";
156 regulator-always-on;
157};
158
159&reg_ldo1 {
160 regulator-name = "rtcvdd";
161};
162
163&reg_ldo2 {
164 regulator-min-microvolt = <2700000>;
165 regulator-max-microvolt = <3300000>;
166 regulator-name = "avcc";
167 regulator-always-on;
168};
169
170&reg_ldo5 {
171 regulator-min-microvolt = <1800000>;
172 regulator-max-microvolt = <1800000>;
173 regulator-name = "vcc-1v8";
174};
175
176&reg_usb0_vbus {
177 pinctrl-0 = <&chip_vbus_pin>;
178 vin-supply = <&reg_vcc5v0>;
179 gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
180 status = "okay";
181};
182
183&uart1 {
184 pinctrl-names = "default";
185 pinctrl-0 = <&uart1_pins_b>;
186 status = "okay";
187};
188
189&uart3 {
190 pinctrl-names = "default";
191 pinctrl-0 = <&uart3_pins_a>,
192 <&uart3_pins_cts_rts_a>;
193 status = "okay";
194};
195
196&usb_otg {
197 dr_mode = "otg";
198 status = "okay";
199};
200
201&usb_power_supply {
202 status = "okay";
203};
204
205&usbphy {
206 pinctrl-names = "default";
207 pinctrl-0 = <&chip_id_det_pin>;
208 status = "okay";
209
210 usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
211 usb0_vbus_power-supply = <&usb_power_supply>;
212 usb0_vbus-supply = <&reg_usb0_vbus>;
213 usb1_vbus-supply = <&reg_vcc5v0>;
214};
diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi
new file mode 100644
index 000000000000..0ef865601ac9
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-r8.dtsi
@@ -0,0 +1,59 @@
1/*
2 * Copyright 2015 Free Electrons
3 * Copyright 2015 NextThing Co
4 *
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45
46#include "sun5i-a13.dtsi"
47
48/ {
49 chosen {
50 framebuffer@1 {
51 compatible = "allwinner,simple-framebuffer",
52 "simple-framebuffer";
53 allwinner,pipeline = "de_be0-lcd0-tve0";
54 clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
55 <&ahb_gates 44>;
56 status = "disabled";
57 };
58 };
59};
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 78b993abbaa3..9ffee9bb70a7 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -529,6 +529,27 @@
529 allwinner,drive = <SUN4I_PINCTRL_30_MA>; 529 allwinner,drive = <SUN4I_PINCTRL_30_MA>;
530 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; 530 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
531 }; 531 };
532
533 uart3_pins_a: uart3@0 {
534 allwinner,pins = "PG9", "PG10";
535 allwinner,function = "uart3";
536 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
537 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
538 };
539
540 uart3_pins_cts_rts_a: uart3-cts-rts@0 {
541 allwinner,pins = "PG11", "PG12";
542 allwinner,function = "uart3";
543 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
544 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
545 };
546
547 pwm0_pins: pwm0 {
548 allwinner,pins = "PB2";
549 allwinner,function = "pwm";
550 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
551 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
552 };
532 }; 553 };
533 554
534 timer@01c20c00 { 555 timer@01c20c00 {
diff --git a/arch/arm/boot/dts/sun6i-a31-colombus.dts b/arch/arm/boot/dts/sun6i-a31-colombus.dts
index 0cf9926d1e93..f9cf36888d93 100644
--- a/arch/arm/boot/dts/sun6i-a31-colombus.dts
+++ b/arch/arm/boot/dts/sun6i-a31-colombus.dts
@@ -60,12 +60,34 @@
60 chosen { 60 chosen {
61 stdout-path = "serial0:115200n8"; 61 stdout-path = "serial0:115200n8";
62 }; 62 };
63
64 i2c_lcd: i2c@0 {
65 /* The lcd panel i2c interface is hooked up via gpios */
66 compatible = "i2c-gpio";
67 pinctrl-names = "default";
68 pinctrl-0 = <&i2c_lcd_pins>;
69 gpios = <&pio 0 23 GPIO_ACTIVE_HIGH>, /* PA23, sda */
70 <&pio 0 24 GPIO_ACTIVE_HIGH>; /* PA24, scl */
71 i2c-gpio,delay-us = <5>;
72 };
63}; 73};
64 74
65&ehci1 { 75&ehci1 {
66 status = "okay"; 76 status = "okay";
67}; 77};
68 78
79&gmac {
80 pinctrl-names = "default";
81 pinctrl-0 = <&gmac_pins_rgmii_a>;
82 phy = <&phy1>;
83 phy-mode = "rgmii";
84 status = "okay";
85
86 phy1: ethernet-phy@1 {
87 reg = <1>;
88 };
89};
90
69&i2c0 { 91&i2c0 {
70 pinctrl-names = "default"; 92 pinctrl-names = "default";
71 pinctrl-0 = <&i2c0_pins_a>; 93 pinctrl-0 = <&i2c0_pins_a>;
@@ -82,6 +104,13 @@
82 pinctrl-names = "default"; 104 pinctrl-names = "default";
83 pinctrl-0 = <&i2c2_pins_a>; 105 pinctrl-0 = <&i2c2_pins_a>;
84 status = "okay"; 106 status = "okay";
107
108 mma8452: mma8452@1d {
109 compatible = "fsl,mma8452";
110 reg = <0x1d>;
111 interrupt-parent = <&pio>;
112 interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PA9 */
113 };
85}; 114};
86 115
87&mmc0 { 116&mmc0 {
@@ -112,6 +141,13 @@
112 allwinner,drive = <SUN4I_PINCTRL_10_MA>; 141 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
113 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 142 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
114 }; 143 };
144
145 i2c_lcd_pins: i2c_lcd_pin@0 {
146 allwinner,pins = "PA23", "PA24";
147 allwinner,function = "gpio_out";
148 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
149 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
150 };
115}; 151};
116 152
117&reg_usb2_vbus { 153&reg_usb2_vbus {
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index d0cfadac0691..9a74637f677f 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -54,6 +54,8 @@
54 compatible = "merrii,a31-hummingbird", "allwinner,sun6i-a31"; 54 compatible = "merrii,a31-hummingbird", "allwinner,sun6i-a31";
55 55
56 aliases { 56 aliases {
57 rtc0 = &pcf8563;
58 rtc1 = &rtc;
57 serial0 = &uart0; 59 serial0 = &uart0;
58 }; 60 };
59 61
@@ -67,13 +69,17 @@
67 }; 69 };
68}; 70};
69 71
72&cpu0 {
73 cpu-supply = <&reg_dcdc3>;
74};
75
70&ehci0 { 76&ehci0 {
71 status = "okay"; 77 status = "okay";
72}; 78};
73 79
74&gmac { 80&gmac {
75 pinctrl-names = "default"; 81 pinctrl-names = "default";
76 pinctrl-0 = <&gmac_pins_rgmii_a>; 82 pinctrl-0 = <&gmac_pins_rgmii_a>, <&gmac_phy_reset_pin_hummingbird>;
77 phy = <&phy1>; 83 phy = <&phy1>;
78 phy-mode = "rgmii"; 84 phy-mode = "rgmii";
79 snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; 85 snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>;
@@ -119,7 +125,7 @@
119&mmc0 { 125&mmc0 {
120 pinctrl-names = "default"; 126 pinctrl-names = "default";
121 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_hummingbird>; 127 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_hummingbird>;
122 vmmc-supply = <&vcc_3v0>; 128 vmmc-supply = <&reg_dcdc1>;
123 bus-width = <4>; 129 bus-width = <4>;
124 cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ 130 cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
125 cd-inverted; 131 cd-inverted;
@@ -134,7 +140,7 @@
134&mmc1 { 140&mmc1 {
135 pinctrl-names = "default"; 141 pinctrl-names = "default";
136 pinctrl-0 = <&mmc1_pins_a>, <&wifi_reset_pin_hummingbird>; 142 pinctrl-0 = <&mmc1_pins_a>, <&wifi_reset_pin_hummingbird>;
137 vmmc-supply = <&vcc_wifi>; 143 vmmc-supply = <&reg_aldo1>;
138 mmc-pwrseq = <&wifi_pwrseq>; 144 mmc-pwrseq = <&wifi_pwrseq>;
139 bus-width = <4>; 145 bus-width = <4>;
140 non-removable; 146 non-removable;
@@ -146,6 +152,13 @@
146}; 152};
147 153
148&pio { 154&pio {
155 gmac_phy_reset_pin_hummingbird: gmac_phy_reset_pin@0 {
156 allwinner,pins = "PA21";
157 allwinner,function = "gpio_out";
158 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
159 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
160 };
161
149 mmc0_cd_pin_hummingbird: mmc0_cd_pin@0 { 162 mmc0_cd_pin_hummingbird: mmc0_cd_pin@0 {
150 allwinner,pins = "PA8"; 163 allwinner,pins = "PA8";
151 allwinner,function = "gpio_in"; 164 allwinner,function = "gpio_in";
@@ -164,70 +177,69 @@
164&p2wi { 177&p2wi {
165 status = "okay"; 178 status = "okay";
166 179
167 axp221: pmic@68 { 180 axp22x: pmic@68 {
168 compatible = "x-powers,axp221"; 181 compatible = "x-powers,axp221";
169 reg = <0x68>; 182 reg = <0x68>;
170 interrupt-parent = <&nmi_intc>; 183 interrupt-parent = <&nmi_intc>;
171 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 184 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
172 interrupt-controller;
173 #interrupt-cells = <1>;
174 dcdc1-supply = <&vcc_3v0>;
175 dcdc5-supply = <&vcc_dram>;
176
177 regulators {
178 x-powers,dcdc-freq = <3000>;
179
180 vcc_3v0: dcdc1 {
181 regulator-always-on;
182 regulator-min-microvolt = <3000000>;
183 regulator-max-microvolt = <3000000>;
184 regulator-name = "vcc-3v0";
185 };
186
187 vdd_cpu: dcdc2 {
188 regulator-always-on;
189 regulator-min-microvolt = <700000>;
190 regulator-max-microvolt = <1320000>;
191 regulator-name = "vdd-cpu";
192 };
193
194 vdd_gpu: dcdc3 {
195 regulator-always-on;
196 regulator-min-microvolt = <700000>;
197 regulator-max-microvolt = <1320000>;
198 regulator-name = "vdd-gpu";
199 };
200
201 vdd_sys_dll: dcdc4 {
202 regulator-always-on;
203 regulator-min-microvolt = <1100000>;
204 regulator-max-microvolt = <1100000>;
205 regulator-name = "vdd-sys-dll";
206 };
207
208 vcc_dram: dcdc5 {
209 regulator-always-on;
210 regulator-min-microvolt = <1500000>;
211 regulator-max-microvolt = <1500000>;
212 regulator-name = "vcc-dram";
213 };
214
215 vcc_wifi: aldo1 {
216 regulator-min-microvolt = <3300000>;
217 regulator-max-microvolt = <3300000>;
218 regulator-name = "vcc_wifi";
219 };
220
221 avcc: aldo3 {
222 regulator-always-on;
223 regulator-min-microvolt = <3000000>;
224 regulator-max-microvolt = <3000000>;
225 regulator-name = "avcc";
226 };
227 };
228 }; 185 };
229}; 186};
230 187
188#include "axp22x.dtsi"
189
190&reg_aldo1 {
191 regulator-min-microvolt = <3300000>;
192 regulator-max-microvolt = <3300000>;
193 regulator-name = "vcc-wifi";
194};
195
196&reg_aldo3 {
197 regulator-always-on;
198 regulator-min-microvolt = <2700000>;
199 regulator-max-microvolt = <3300000>;
200 regulator-name = "avcc";
201};
202
203&reg_dc5ldo {
204 regulator-min-microvolt = <700000>;
205 regulator-max-microvolt = <1320000>;
206 regulator-name = "vdd-cpus";
207};
208
209&reg_dcdc1 {
210 regulator-always-on;
211 regulator-min-microvolt = <3000000>;
212 regulator-max-microvolt = <3000000>;
213 regulator-name = "vcc-3v0";
214};
215
216&reg_dcdc2 {
217 regulator-min-microvolt = <700000>;
218 regulator-max-microvolt = <1320000>;
219 regulator-name = "vdd-gpu";
220};
221
222&reg_dcdc3 {
223 regulator-always-on;
224 regulator-min-microvolt = <700000>;
225 regulator-max-microvolt = <1320000>;
226 regulator-name = "vdd-cpu";
227};
228
229&reg_dcdc4 {
230 regulator-always-on;
231 regulator-min-microvolt = <700000>;
232 regulator-max-microvolt = <1320000>;
233 regulator-name = "vdd-sys-dll";
234};
235
236&reg_dcdc5 {
237 regulator-always-on;
238 regulator-min-microvolt = <1500000>;
239 regulator-max-microvolt = <1500000>;
240 regulator-name = "vcc-dram";
241};
242
231&reg_usb1_vbus { 243&reg_usb1_vbus {
232 gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */ 244 gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */
233 status = "okay"; 245 status = "okay";
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 54bb83b58f42..83c18798cae0 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -691,6 +691,24 @@
691 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 691 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
692 }; 692 };
693 693
694 mmc2_pins_a: mmc2@0 {
695 allwinner,pins = "PC6", "PC7", "PC8", "PC9",
696 "PC10", "PC11";
697 allwinner,function = "mmc2";
698 allwinner,drive = <SUN4I_PINCTRL_30_MA>;
699 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
700 };
701
702 mmc2_8bit_emmc_pins: mmc2@1 {
703 allwinner,pins = "PC6", "PC7", "PC8", "PC9",
704 "PC10", "PC11", "PC12",
705 "PC13", "PC14", "PC15",
706 "PC24";
707 allwinner,function = "mmc2";
708 allwinner,drive = <SUN4I_PINCTRL_30_MA>;
709 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
710 };
711
694 gmac_pins_mii_a: gmac_mii@0 { 712 gmac_pins_mii_a: gmac_mii@0 {
695 allwinner,pins = "PA0", "PA1", "PA2", "PA3", 713 allwinner,pins = "PA0", "PA1", "PA2", "PA3",
696 "PA8", "PA9", "PA11", 714 "PA8", "PA9", "PA11",
@@ -768,6 +786,13 @@
768 reg = <0x01c20ca0 0x20>; 786 reg = <0x01c20ca0 0x20>;
769 }; 787 };
770 788
789 lradc: lradc@01c22800 {
790 compatible = "allwinner,sun4i-a10-lradc-keys";
791 reg = <0x01c22800 0x100>;
792 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
793 status = "disabled";
794 };
795
771 rtp: rtp@01c25000 { 796 rtp: rtp@01c25000 {
772 compatible = "allwinner,sun6i-a31-ts"; 797 compatible = "allwinner,sun6i-a31-ts";
773 reg = <0x01c25000 0x100>; 798 reg = <0x01c25000 0x100>;
@@ -1085,7 +1110,7 @@
1085 resets = <&apb0_rst 0>; 1110 resets = <&apb0_rst 0>;
1086 gpio-controller; 1111 gpio-controller;
1087 interrupt-controller; 1112 interrupt-controller;
1088 #interrupt-cells = <2>; 1113 #interrupt-cells = <3>;
1089 #size-cells = <0>; 1114 #size-cells = <0>;
1090 #gpio-cells = <3>; 1115 #gpio-cells = <3>;
1091 1116
diff --git a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
new file mode 100644
index 000000000000..db7fa13f5425
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
@@ -0,0 +1,194 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun6i-a31s.dtsi"
45#include "sunxi-common-regulators.dtsi"
46#include <dt-bindings/gpio/gpio.h>
47
48/ {
49 model = "Sinovoip BPI-M2";
50 compatible = "sinovoip,bpi-m2", "allwinner,sun6i-a31s";
51
52 aliases {
53 serial0 = &uart0;
54 };
55
56 chosen {
57 stdout-path = "serial0:115200n8";
58 };
59
60 leds {
61 compatible = "gpio-leds";
62 pinctrl-names = "default";
63 pinctrl-0 = <&led_pins_bpi_m2>;
64
65 blue {
66 label = "bpi-m2:blue:usr";
67 gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
68 };
69
70 green {
71 label = "bpi-m2:green:usr";
72 gpios = <&pio 6 10 GPIO_ACTIVE_HIGH>; /* PG10 */
73 };
74
75 red {
76 label = "bpi-m2:red:usr";
77 gpios = <&pio 6 5 GPIO_ACTIVE_HIGH>; /* PG5 */
78 };
79 };
80
81 mmc2_pwrseq: mmc2_pwrseq {
82 compatible = "mmc-pwrseq-simple";
83 pinctrl-names = "default";
84 pinctrl-0 = <&mmc2_pwrseq_pin_bpi_m2>;
85 reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 WIFI_EN */
86 };
87};
88
89&ehci0 {
90 status = "okay";
91};
92
93&gmac {
94 pinctrl-names = "default";
95 pinctrl-0 = <&gmac_pins_rgmii_a>, <&gmac_phy_reset_pin_bpi_m2>;
96 phy = <&phy1>;
97 phy-mode = "rgmii";
98 snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */
99 snps,reset-active-low;
100 snps,reset-delays-us = <0 10000 30000>;
101 status = "okay";
102
103 phy1: ethernet-phy@1 {
104 reg = <1>;
105 };
106};
107
108&ir {
109 pinctrl-names = "default";
110 pinctrl-0 = <&ir_pins_a>;
111 status = "okay";
112};
113
114&mmc0 {
115 pinctrl-names = "default";
116 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bpi_m2>;
117 vmmc-supply = <&reg_vcc3v0>;
118 bus-width = <4>;
119 cd-gpios = <&pio 0 4 GPIO_ACTIVE_HIGH>; /* PA4 */
120 cd-inverted;
121 status = "okay";
122};
123
124&mmc0_pins_a {
125 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
126};
127
128&mmc2 {
129 pinctrl-names = "default";
130 pinctrl-0 = <&mmc2_pins_a>;
131 vmmc-supply = <&reg_vcc3v0>;
132 mmc-pwrseq = <&mmc2_pwrseq>;
133 bus-width = <4>;
134 non-removable;
135 status = "okay";
136
137 brcmf: bcrmf@1 {
138 reg = <1>;
139 compatible = "brcm,bcm4329-fmac";
140 interrupt-parent = <&r_pio>;
141 interrupts = <0 5 IRQ_TYPE_LEVEL_LOW>; /* PL5 */
142 interrupt-names = "host-wake";
143 };
144};
145
146&mmc2_pins_a {
147 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
148};
149
150&ohci0 {
151 status = "okay";
152};
153
154&pio {
155 gmac_phy_reset_pin_bpi_m2: gmac_phy_reset_pin@0 {
156 allwinner,pins = "PA21";
157 allwinner,function = "gpio_out";
158 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
159 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
160 };
161
162 led_pins_bpi_m2: led_pins@0 {
163 allwinner,pins = "PG5", "PG10", "PG11";
164 allwinner,function = "gpio_out";
165 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
166 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
167 };
168
169 mmc0_cd_pin_bpi_m2: mmc0_cd_pin@0 {
170 allwinner,pins = "PA4";
171 allwinner,function = "gpio_in";
172 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
173 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
174 };
175};
176
177&r_pio {
178 mmc2_pwrseq_pin_bpi_m2: mmc2_pwrseq_pin@0 {
179 allwinner,pins = "PL8";
180 allwinner,function = "gpio_out";
181 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
182 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
183 };
184};
185
186&uart0 {
187 pinctrl-names = "default";
188 pinctrl-0 = <&uart0_pins_a>;
189 status = "okay";
190};
191
192&usbphy {
193 status = "okay";
194};
diff --git a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
new file mode 100644
index 000000000000..b199020733d3
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
@@ -0,0 +1,134 @@
1/*
2 * Copyright 2015 Lawrence Yu <lyu@micile.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun6i-a31s.dtsi"
45#include "sunxi-common-regulators.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/pinctrl/sun4i-a10.h>
49
50/ {
51 model = "Yones TopTech BS1078 v2 Tablet";
52 compatible = "yones-toptech,bs1078-v2", "allwinner,sun6i-a31s";
53
54 aliases {
55 serial0 = &uart0;
56 i2c1 = &i2c1;
57 i2c2 = &i2c2;
58 };
59
60 chosen {
61 stdout-path = "serial0:115200n8";
62 };
63};
64
65&i2c1 {
66 pinctrl-names = "default";
67 pinctrl-0 = <&i2c1_pins_a>;
68 status = "okay";
69};
70
71&i2c2 {
72 pinctrl-names = "default";
73 pinctrl-0 = <&i2c2_pins_a>;
74 status = "okay";
75};
76
77&ehci0 {
78 status = "okay";
79};
80
81&ehci1 {
82 status = "okay";
83};
84
85&ohci0 {
86 status = "okay";
87};
88
89&ohci1 {
90 status = "okay";
91};
92
93&pio {
94 mmc0_cd_pin_bs1078v2: mmc0_cd_pin@0 {
95 allwinner,pins = "PA8";
96 allwinner,function = "gpio_in";
97 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
98 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
99 };
100};
101
102&mmc0 {
103 pinctrl-names = "default";
104 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bs1078v2>;
105 vmmc-supply = <&reg_vcc3v0>;
106 bus-width = <4>;
107 cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
108 cd-inverted;
109 status = "okay";
110};
111
112&mmc0_pins_a {
113 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
114};
115
116&reg_usb1_vbus {
117 gpio = <&pio 7 27 GPIO_ACTIVE_HIGH>;
118 status = "okay";
119};
120
121&usb1_vbus_pin_a {
122 allwinner,pins = "PH27";
123};
124
125&usbphy {
126 usb1_vbus-supply = <&reg_usb1_vbus>;
127 status = "okay";
128};
129
130&uart0 {
131 pinctrl-names = "default";
132 pinctrl-0 = <&uart0_pins_a>;
133 status = "okay";
134};
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
index 9f7b472e6725..fd7594ff90d5 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
@@ -92,6 +92,20 @@
92 status = "okay"; 92 status = "okay";
93}; 93};
94 94
95&cpu0 {
96 cpu-supply = <&reg_dcdc2>;
97 operating-points = <
98 /* kHz uV */
99 960000 1400000
100 912000 1400000
101 864000 1350000
102 720000 1250000
103 528000 1150000
104 312000 1100000
105 144000 1050000
106 >;
107};
108
95&ehci0 { 109&ehci0 {
96 status = "okay"; 110 status = "okay";
97}; 111};
@@ -119,13 +133,9 @@
119 status = "okay"; 133 status = "okay";
120 134
121 axp209: pmic@34 { 135 axp209: pmic@34 {
122 compatible = "x-powers,axp209";
123 reg = <0x34>; 136 reg = <0x34>;
124 interrupt-parent = <&nmi_intc>; 137 interrupt-parent = <&nmi_intc>;
125 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 138 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
126
127 interrupt-controller;
128 #interrupt-cells = <1>;
129 }; 139 };
130}; 140};
131 141
@@ -159,7 +169,18 @@
159 status = "okay"; 169 status = "okay";
160}; 170};
161 171
172&otg_sram {
173 status = "okay";
174};
175
162&pio { 176&pio {
177 usb0_id_detect_pin: usb0_id_detect_pin@0 {
178 allwinner,pins = "PH4";
179 allwinner,function = "gpio_in";
180 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
181 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
182 };
183
163 mmc0_cd_pin_bananapi: mmc0_cd_pin@0 { 184 mmc0_cd_pin_bananapi: mmc0_cd_pin@0 {
164 allwinner,pins = "PH10"; 185 allwinner,pins = "PH10";
165 allwinner,function = "gpio_in"; 186 allwinner,function = "gpio_in";
@@ -182,6 +203,37 @@
182 }; 203 };
183}; 204};
184 205
206#include "axp209.dtsi"
207
208&reg_dcdc2 {
209 regulator-always-on;
210 regulator-min-microvolt = <1000000>;
211 regulator-max-microvolt = <1400000>;
212 regulator-name = "vdd-cpu";
213};
214
215&reg_dcdc3 {
216 regulator-always-on;
217 regulator-min-microvolt = <1000000>;
218 regulator-max-microvolt = <1400000>;
219 regulator-name = "vdd-int-dll";
220};
221
222&reg_ldo1 {
223 regulator-name = "vdd-rtc";
224};
225
226&reg_ldo2 {
227 regulator-always-on;
228 regulator-min-microvolt = <3000000>;
229 regulator-max-microvolt = <3000000>;
230 regulator-name = "avcc";
231};
232
233&reg_usb0_vbus {
234 status = "okay";
235};
236
185&reg_usb1_vbus { 237&reg_usb1_vbus {
186 status = "okay"; 238 status = "okay";
187}; 239};
@@ -216,7 +268,21 @@
216 status = "okay"; 268 status = "okay";
217}; 269};
218 270
271&usb_otg {
272 dr_mode = "otg";
273 status = "okay";
274};
275
276&usb_power_supply {
277 status = "okay";
278};
279
219&usbphy { 280&usbphy {
281 pinctrl-names = "default";
282 pinctrl-0 = <&usb0_id_detect_pin>;
283 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
284 usb0_vbus_power-supply = <&usb_power_supply>;
285 usb0_vbus-supply = <&reg_usb0_vbus>;
220 usb1_vbus-supply = <&reg_usb1_vbus>; 286 usb1_vbus-supply = <&reg_usb1_vbus>;
221 usb2_vbus-supply = <&reg_usb2_vbus>; 287 usb2_vbus-supply = <&reg_usb2_vbus>;
222 status = "okay"; 288 status = "okay";
diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
index 39a51d5143f7..9ff459bd38b3 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
@@ -150,6 +150,10 @@
150 status = "okay"; 150 status = "okay";
151}; 151};
152 152
153&otg_sram {
154 status = "okay";
155};
156
153&pio { 157&pio {
154 led_pins_cubieboard2: led_pins@0 { 158 led_pins_cubieboard2: led_pins@0 {
155 allwinner,pins = "PH20", "PH21"; 159 allwinner,pins = "PH20", "PH21";
@@ -157,12 +161,24 @@
157 allwinner,drive = <SUN4I_PINCTRL_10_MA>; 161 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
158 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 162 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
159 }; 163 };
164
165 usb0_id_detect_pin: usb0_id_detect_pin@0 {
166 allwinner,pins = "PH4";
167 allwinner,function = "gpio_in";
168 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
169 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
170 };
160}; 171};
161 172
162&reg_ahci_5v { 173&reg_ahci_5v {
163 status = "okay"; 174 status = "okay";
164}; 175};
165 176
177&usb_otg {
178 dr_mode = "otg";
179 status = "okay";
180};
181
166#include "axp209.dtsi" 182#include "axp209.dtsi"
167 183
168&reg_dcdc2 { 184&reg_dcdc2 {
@@ -205,6 +221,9 @@
205}; 221};
206 222
207&usbphy { 223&usbphy {
224 pinctrl-names = "default";
225 pinctrl-0 = <&usb0_id_detect_pin>;
226 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
208 usb1_vbus-supply = <&reg_usb1_vbus>; 227 usb1_vbus-supply = <&reg_usb1_vbus>;
209 usb2_vbus-supply = <&reg_usb2_vbus>; 228 usb2_vbus-supply = <&reg_usb2_vbus>;
210 status = "okay"; 229 status = "okay";
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
new file mode 100644
index 000000000000..b7fe102475e7
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -0,0 +1,198 @@
1/*
2 * Copyright 2015 - Marcus Cooper <codekipper@gmail.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun7i-a20.dtsi"
45#include "sunxi-common-regulators.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/interrupt-controller/irq.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50
51/ {
52 model = "Olimex A20-Olimex-SOM-EVB";
53 compatible = "olimex,a20-olimex-som-evb", "allwinner,sun7i-a20";
54
55 aliases {
56 serial0 = &uart0;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62
63 leds {
64 compatible = "gpio-leds";
65 pinctrl-names = "default";
66 pinctrl-0 = <&led_pins_olimex_som_evb>;
67
68 green {
69 label = "a20-olimex-som-evb:green:usr";
70 gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>;
71 default-state = "on";
72 };
73 };
74};
75
76&ahci {
77 target-supply = <&reg_ahci_5v>;
78 status = "okay";
79};
80
81&ehci0 {
82 status = "okay";
83};
84
85&ehci1 {
86 status = "okay";
87};
88
89&gmac {
90 pinctrl-names = "default";
91 pinctrl-0 = <&gmac_pins_rgmii_a>;
92 phy = <&phy1>;
93 phy-mode = "rgmii";
94 status = "okay";
95
96 phy1: ethernet-phy@1 {
97 reg = <1>;
98 };
99};
100
101&i2c0 {
102 pinctrl-names = "default";
103 pinctrl-0 = <&i2c0_pins_a>;
104 status = "okay";
105
106 axp209: pmic@34 {
107 reg = <0x34>;
108 interrupt-parent = <&nmi_intc>;
109 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
110 };
111};
112
113&mmc0 {
114 pinctrl-names = "default";
115 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
116 vmmc-supply = <&reg_vcc3v3>;
117 bus-width = <4>;
118 cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
119 cd-inverted;
120 status = "okay";
121};
122
123&ohci0 {
124 status = "okay";
125};
126
127&ohci1 {
128 status = "okay";
129};
130
131&pio {
132 ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin@1 {
133 allwinner,pins = "PC3";
134 allwinner,function = "gpio_out";
135 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
136 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
137 };
138
139 led_pins_olimex_som_evb: led_pins@0 {
140 allwinner,pins = "PH2";
141 allwinner,function = "gpio_out";
142 allwinner,drive = <SUN4I_PINCTRL_20_MA>;
143 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
144 };
145};
146
147&reg_ahci_5v {
148 pinctrl-0 = <&ahci_pwr_pin_olimex_som_evb>;
149 gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>;
150 status = "okay";
151};
152
153#include "axp209.dtsi"
154
155&reg_dcdc2 {
156 regulator-always-on;
157 regulator-min-microvolt = <1000000>;
158 regulator-max-microvolt = <1400000>;
159 regulator-name = "vdd-cpu";
160};
161
162&reg_dcdc3 {
163 regulator-always-on;
164 regulator-min-microvolt = <1000000>;
165 regulator-max-microvolt = <1400000>;
166 regulator-name = "vdd-int-dll";
167};
168
169&reg_ldo1 {
170 regulator-name = "vdd-rtc";
171};
172
173&reg_ldo2 {
174 regulator-always-on;
175 regulator-min-microvolt = <3000000>;
176 regulator-max-microvolt = <3000000>;
177 regulator-name = "avcc";
178};
179
180&reg_usb1_vbus {
181 status = "okay";
182};
183
184&reg_usb2_vbus {
185 status = "okay";
186};
187
188&uart0 {
189 pinctrl-names = "default";
190 pinctrl-0 = <&uart0_pins_a>;
191 status = "okay";
192};
193
194&usbphy {
195 usb1_vbus-supply = <&reg_usb1_vbus>;
196 usb2_vbus-supply = <&reg_usb2_vbus>;
197 status = "okay";
198};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
index 04237085dc39..35ad7006c53c 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
@@ -117,6 +117,18 @@
117 }; 117 };
118}; 118};
119 119
120&i2c1 {
121 pinctrl-names = "default";
122 pinctrl-0 = <&i2c1_pins_a>;
123 status = "okay";
124
125 eeprom: eeprom@50 {
126 compatible = "atmel,24c16";
127 reg = <0x50>;
128 pagesize = <16>;
129 };
130};
131
120&mmc0 { 132&mmc0 {
121 pinctrl-names = "default"; 133 pinctrl-names = "default";
122 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; 134 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index 8acff78272b7..d5c796c8d16f 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -170,6 +170,12 @@
170 pinctrl-names = "default"; 170 pinctrl-names = "default";
171 pinctrl-0 = <&i2c1_pins_a>; 171 pinctrl-0 = <&i2c1_pins_a>;
172 status = "okay"; 172 status = "okay";
173
174 eeprom: eeprom@50 {
175 compatible = "atmel,24c16";
176 reg = <0x50>;
177 pagesize = <16>;
178 };
173}; 179};
174 180
175&mmc0 { 181&mmc0 {
@@ -190,6 +196,10 @@
190 status = "okay"; 196 status = "okay";
191}; 197};
192 198
199&otg_sram {
200 status = "okay";
201};
202
193&pio { 203&pio {
194 ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 { 204 ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {
195 allwinner,pins = "PC3"; 205 allwinner,pins = "PC3";
@@ -204,6 +214,27 @@
204 allwinner,drive = <SUN4I_PINCTRL_20_MA>; 214 allwinner,drive = <SUN4I_PINCTRL_20_MA>;
205 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 215 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
206 }; 216 };
217
218 usb0_id_detect_pin: usb0_id_detect_pin@0 {
219 allwinner,pins = "PH4";
220 allwinner,function = "gpio_in";
221 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
222 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
223 };
224
225 usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
226 allwinner,pins = "PH5";
227 allwinner,function = "gpio_in";
228 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
229 allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
230 };
231
232 usb0_vbus_pin_lime2: usb0_vbus_pin@0 {
233 allwinner,pins = "PC17";
234 allwinner,function = "gpio_out";
235 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
236 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
237 };
207}; 238};
208 239
209&reg_ahci_5v { 240&reg_ahci_5v {
@@ -212,6 +243,12 @@
212 status = "okay"; 243 status = "okay";
213}; 244};
214 245
246&reg_usb0_vbus {
247 pinctrl-0 = <&usb0_vbus_pin_lime2>;
248 gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>;
249 status = "okay";
250};
251
215&reg_usb1_vbus { 252&reg_usb1_vbus {
216 status = "okay"; 253 status = "okay";
217}; 254};
@@ -226,7 +263,17 @@
226 status = "okay"; 263 status = "okay";
227}; 264};
228 265
266&usb_otg {
267 dr_mode = "otg";
268 status = "okay";
269};
270
229&usbphy { 271&usbphy {
272 pinctrl-names = "default";
273 pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
274 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
275 usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
276 usb0_vbus-supply = <&reg_usb0_vbus>;
230 usb1_vbus-supply = <&reg_usb1_vbus>; 277 usb1_vbus-supply = <&reg_usb1_vbus>;
231 usb2_vbus-supply = <&reg_usb2_vbus>; 278 usb2_vbus-supply = <&reg_usb2_vbus>;
232 status = "okay"; 279 status = "okay";
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index c5d70caade82..7e3006f6a775 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -125,6 +125,12 @@
125 pinctrl-names = "default"; 125 pinctrl-names = "default";
126 pinctrl-0 = <&i2c1_pins_a>; 126 pinctrl-0 = <&i2c1_pins_a>;
127 status = "okay"; 127 status = "okay";
128
129 eeprom: eeprom@50 {
130 compatible = "atmel,24c16";
131 reg = <0x50>;
132 pagesize = <16>;
133 };
128}; 134};
129 135
130&i2c2 { 136&i2c2 {
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
index 73cd81ee02e3..4f65664e5dfe 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
@@ -156,7 +156,18 @@
156 status = "okay"; 156 status = "okay";
157}; 157};
158 158
159&otg_sram {
160 status = "okay";
161};
162
159&pio { 163&pio {
164 usb0_id_detect_pin: usb0_id_detect_pin@0 {
165 allwinner,pins = "PH4";
166 allwinner,function = "gpio_in";
167 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
168 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
169 };
170
160 mmc0_cd_pin_orangepi: mmc0_cd_pin@0 { 171 mmc0_cd_pin_orangepi: mmc0_cd_pin@0 {
161 allwinner,pins = "PH10"; 172 allwinner,pins = "PH10";
162 allwinner,function = "gpio_in"; 173 allwinner,function = "gpio_in";
@@ -225,6 +236,10 @@
225 regulator-name = "avcc"; 236 regulator-name = "avcc";
226}; 237};
227 238
239&reg_usb0_vbus {
240 status = "okay";
241};
242
228&reg_usb1_vbus { 243&reg_usb1_vbus {
229 pinctrl-0 = <&usb1_vbus_pin_bananapro>; 244 pinctrl-0 = <&usb1_vbus_pin_bananapro>;
230 gpio = <&pio 7 26 GPIO_ACTIVE_HIGH>; /* PH26 */ 245 gpio = <&pio 7 26 GPIO_ACTIVE_HIGH>; /* PH26 */
@@ -243,7 +258,21 @@
243 status = "okay"; 258 status = "okay";
244}; 259};
245 260
261&usb_otg {
262 dr_mode = "otg";
263 status = "okay";
264};
265
266&usb_power_supply {
267 status = "okay";
268};
269
246&usbphy { 270&usbphy {
271 pinctrl-names = "default";
272 pinctrl-0 = <&usb0_id_detect_pin>;
273 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
274 usb0_vbus_power-supply = <&usb_power_supply>;
275 usb0_vbus-supply = <&reg_usb0_vbus>;
247 usb1_vbus-supply = <&reg_usb1_vbus>; 276 usb1_vbus-supply = <&reg_usb1_vbus>;
248 usb2_vbus-supply = <&reg_usb2_vbus>; 277 usb2_vbus-supply = <&reg_usb2_vbus>;
249 status = "okay"; 278 status = "okay";
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi.dts b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
index 55a06ceb80ec..71125bf64575 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
@@ -141,7 +141,18 @@
141 status = "okay"; 141 status = "okay";
142}; 142};
143 143
144&otg_sram {
145 status = "okay";
146};
147
144&pio { 148&pio {
149 usb0_id_detect_pin: usb0_id_detect_pin@0 {
150 allwinner,pins = "PH4";
151 allwinner,function = "gpio_in";
152 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
153 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
154 };
155
145 mmc0_cd_pin_orangepi: mmc0_cd_pin@0 { 156 mmc0_cd_pin_orangepi: mmc0_cd_pin@0 {
146 allwinner,pins = "PH10"; 157 allwinner,pins = "PH10";
147 allwinner,function = "gpio_in"; 158 allwinner,function = "gpio_in";
@@ -203,6 +214,10 @@
203 regulator-name = "avcc"; 214 regulator-name = "avcc";
204}; 215};
205 216
217&reg_usb0_vbus {
218 status = "okay";
219};
220
206&reg_usb1_vbus { 221&reg_usb1_vbus {
207 pinctrl-0 = <&usb1_vbus_pin_bananapro>; 222 pinctrl-0 = <&usb1_vbus_pin_bananapro>;
208 gpio = <&pio 7 26 GPIO_ACTIVE_HIGH>; /* PH26 */ 223 gpio = <&pio 7 26 GPIO_ACTIVE_HIGH>; /* PH26 */
@@ -221,7 +236,21 @@
221 status = "okay"; 236 status = "okay";
222}; 237};
223 238
239&usb_otg {
240 dr_mode = "otg";
241 status = "okay";
242};
243
244&usb_power_supply {
245 status = "okay";
246};
247
224&usbphy { 248&usbphy {
249 pinctrl-names = "default";
250 pinctrl-0 = <&usb0_id_detect_pin>;
251 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
252 usb0_vbus_power-supply = <&usb_power_supply>;
253 usb0_vbus-supply = <&reg_usb0_vbus>;
225 usb1_vbus-supply = <&reg_usb1_vbus>; 254 usb1_vbus-supply = <&reg_usb1_vbus>;
226 usb2_vbus-supply = <&reg_usb2_vbus>; 255 usb2_vbus-supply = <&reg_usb2_vbus>;
227 status = "okay"; 256 status = "okay";
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
index 5361fce26b45..beac431aa594 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
@@ -82,6 +82,10 @@
82 status = "okay"; 82 status = "okay";
83}; 83};
84 84
85&cpu0 {
86 cpu-supply = <&reg_dcdc2>;
87};
88
85&ehci0 { 89&ehci0 {
86 status = "okay"; 90 status = "okay";
87}; 91};
@@ -108,13 +112,9 @@
108 status = "okay"; 112 status = "okay";
109 113
110 axp209: pmic@34 { 114 axp209: pmic@34 {
111 compatible = "x-powers,axp209";
112 reg = <0x34>; 115 reg = <0x34>;
113 interrupt-parent = <&nmi_intc>; 116 interrupt-parent = <&nmi_intc>;
114 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 117 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
115
116 interrupt-controller;
117 #interrupt-cells = <1>;
118 }; 118 };
119}; 119};
120 120
@@ -158,7 +158,7 @@
158 }; 158 };
159 159
160 usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin@0 { 160 usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin@0 {
161 allwinner,pins = "PH11"; 161 allwinner,pins = "PD2";
162 allwinner,function = "gpio_out"; 162 allwinner,function = "gpio_out";
163 allwinner,drive = <SUN4I_PINCTRL_10_MA>; 163 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
164 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 164 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
@@ -171,13 +171,37 @@
171 status = "okay"; 171 status = "okay";
172}; 172};
173 173
174&reg_usb1_vbus { 174#include "axp209.dtsi"
175 pinctrl-0 = <&usb1_vbus_pin_pcduino3_nano>; 175
176 gpio = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ 176&reg_dcdc2 {
177 status = "okay"; 177 regulator-always-on;
178 regulator-min-microvolt = <1000000>;
179 regulator-max-microvolt = <1400000>;
180 regulator-name = "vdd-cpu";
178}; 181};
179 182
180&reg_usb2_vbus { 183&reg_dcdc3 {
184 regulator-always-on;
185 regulator-min-microvolt = <1000000>;
186 regulator-max-microvolt = <1400000>;
187 regulator-name = "vdd-int-pll";
188};
189
190&reg_ldo1 {
191 regulator-name = "vdd-rtc";
192};
193
194&reg_ldo2 {
195 regulator-always-on;
196 regulator-min-microvolt = <3000000>;
197 regulator-max-microvolt = <3000000>;
198 regulator-name = "avcc";
199};
200
201/* A single regulator (U24) powers both USB host ports. */
202&reg_usb1_vbus {
203 pinctrl-0 = <&usb1_vbus_pin_pcduino3_nano>;
204 gpio = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */
181 status = "okay"; 205 status = "okay";
182}; 206};
183 207
@@ -189,6 +213,6 @@
189 213
190&usbphy { 214&usbphy {
191 usb1_vbus-supply = <&reg_usb1_vbus>; 215 usb1_vbus-supply = <&reg_usb1_vbus>;
192 usb2_vbus-supply = <&reg_usb2_vbus>; 216 usb2_vbus-supply = <&reg_usb1_vbus>;
193 status = "okay"; 217 status = "okay";
194}; 218};
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
index afc9ecebed21..861a4a66fb19 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
@@ -111,6 +111,10 @@
111 allwinner,pins = "PH2"; 111 allwinner,pins = "PH2";
112}; 112};
113 113
114&cpu0 {
115 cpu-supply = <&reg_dcdc2>;
116};
117
114&ehci0 { 118&ehci0 {
115 status = "okay"; 119 status = "okay";
116}; 120};
@@ -137,16 +141,14 @@
137 status = "okay"; 141 status = "okay";
138 142
139 axp209: pmic@34 { 143 axp209: pmic@34 {
140 compatible = "x-powers,axp209";
141 reg = <0x34>; 144 reg = <0x34>;
142 interrupt-parent = <&nmi_intc>; 145 interrupt-parent = <&nmi_intc>;
143 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 146 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
144
145 interrupt-controller;
146 #interrupt-cells = <1>;
147 }; 147 };
148}; 148};
149 149
150#include "axp209.dtsi"
151
150&ir0 { 152&ir0 {
151 pinctrl-names = "default"; 153 pinctrl-names = "default";
152 pinctrl-0 = <&ir0_rx_pins_a>; 154 pinctrl-0 = <&ir0_rx_pins_a>;
@@ -171,6 +173,10 @@
171 status = "okay"; 173 status = "okay";
172}; 174};
173 175
176&otg_sram {
177 status = "okay";
178};
179
174&pio { 180&pio {
175 led_pins_pcduino3: led_pins@0 { 181 led_pins_pcduino3: led_pins@0 {
176 allwinner,pins = "PH15", "PH16"; 182 allwinner,pins = "PH15", "PH16";
@@ -185,6 +191,13 @@
185 allwinner,drive = <SUN4I_PINCTRL_10_MA>; 191 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
186 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 192 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
187 }; 193 };
194
195 usb0_id_detect_pin: usb0_id_detect_pin@0 {
196 allwinner,pins = "PH4";
197 allwinner,function = "gpio_in";
198 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
199 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
200 };
188}; 201};
189 202
190&reg_ahci_5v { 203&reg_ahci_5v {
@@ -192,6 +205,31 @@
192 status = "okay"; 205 status = "okay";
193}; 206};
194 207
208&reg_dcdc2 {
209 regulator-always-on;
210 regulator-min-microvolt = <1000000>;
211 regulator-max-microvolt = <1400000>;
212 regulator-name = "vdd-cpu";
213};
214
215&reg_dcdc3 {
216 regulator-always-on;
217 regulator-min-microvolt = <1000000>;
218 regulator-max-microvolt = <1400000>;
219 regulator-name = "vdd-int-pll";
220};
221
222&reg_ldo1 {
223 regulator-name = "vdd-rtc";
224};
225
226&reg_ldo2 {
227 regulator-always-on;
228 regulator-min-microvolt = <3000000>;
229 regulator-max-microvolt = <3000000>;
230 regulator-name = "avcc";
231};
232
195&reg_usb1_vbus { 233&reg_usb1_vbus {
196 status = "okay"; 234 status = "okay";
197}; 235};
@@ -206,7 +244,15 @@
206 status = "okay"; 244 status = "okay";
207}; 245};
208 246
247&usb_otg {
248 dr_mode = "otg";
249 status = "okay";
250};
251
209&usbphy { 252&usbphy {
253 pinctrl-names = "default";
254 pinctrl-0 = <&usb0_id_detect_pin>;
255 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
210 usb1_vbus-supply = <&reg_usb1_vbus>; 256 usb1_vbus-supply = <&reg_usb1_vbus>;
211 usb2_vbus-supply = <&reg_usb2_vbus>; 257 usb2_vbus-supply = <&reg_usb2_vbus>;
212 status = "okay"; 258 status = "okay";
diff --git a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
index 83c6d3f872ff..78239ad988e7 100644
--- a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
+++ b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
@@ -86,6 +86,8 @@
86 }; 86 };
87}; 87};
88 88
89#include "axp209.dtsi"
90
89&i2c1 { 91&i2c1 {
90 pinctrl-names = "default"; 92 pinctrl-names = "default";
91 pinctrl-0 = <&i2c1_pins_a>; 93 pinctrl-0 = <&i2c1_pins_a>;
@@ -135,7 +137,18 @@
135 status = "okay"; 137 status = "okay";
136}; 138};
137 139
138#include "axp209.dtsi" 140&otg_sram {
141 status = "okay";
142};
143
144&pio {
145 usb0_id_detect_pin: usb0_id_detect_pin@0 {
146 allwinner,pins = "PH4";
147 allwinner,function = "gpio_in";
148 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
149 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
150 };
151};
139 152
140&reg_dcdc2 { 153&reg_dcdc2 {
141 regulator-always-on; 154 regulator-always-on;
@@ -162,6 +175,10 @@
162 regulator-name = "avcc"; 175 regulator-name = "avcc";
163}; 176};
164 177
178&reg_usb0_vbus {
179 status = "okay";
180};
181
165&reg_usb1_vbus { 182&reg_usb1_vbus {
166 status = "okay"; 183 status = "okay";
167}; 184};
@@ -176,7 +193,21 @@
176 status = "okay"; 193 status = "okay";
177}; 194};
178 195
196&usb_otg {
197 dr_mode = "otg";
198 status = "okay";
199};
200
201&usb_power_supply {
202 status = "okay";
203};
204
179&usbphy { 205&usbphy {
206 pinctrl-names = "default";
207 pinctrl-0 = <&usb0_id_detect_pin>;
208 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
209 usb0_vbus_power-supply = <&usb_power_supply>;
210 usb0_vbus-supply = <&reg_usb0_vbus>;
180 usb1_vbus-supply = <&reg_usb1_vbus>; 211 usb1_vbus-supply = <&reg_usb1_vbus>;
181 usb2_vbus-supply = <&reg_usb2_vbus>; 212 usb2_vbus-supply = <&reg_usb2_vbus>;
182 status = "okay"; 213 status = "okay";
diff --git a/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
new file mode 100644
index 000000000000..85b500d8cc4c
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
@@ -0,0 +1,226 @@
1/*
2 * Copyright 2015 Jelle de Jong <jelledejong@powercraft.nl>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun7i-a20.dtsi"
45#include "sunxi-common-regulators.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/input/input.h>
49#include <dt-bindings/interrupt-controller/irq.h>
50
51/ {
52 model = "Wits Pro A20 DKT";
53 compatible = "wits,pro-a20-dkt", "allwinner,sun7i-a20";
54
55 aliases {
56 serial0 = &uart0;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62
63 mmc3_pwrseq: mmc3_pwrseq {
64 compatible = "mmc-pwrseq-simple";
65 pinctrl-names = "default";
66 pinctrl-0 = <&vmmc3_pin_ap6xxx_wl_regon>;
67 reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
68 };
69};
70
71&cpu0 {
72 cpu-supply = <&reg_dcdc2>;
73};
74
75&ehci0 {
76 status = "okay";
77};
78
79&ehci1 {
80 status = "okay";
81};
82
83&i2c0 {
84 pinctrl-names = "default";
85 pinctrl-0 = <&i2c0_pins_a>;
86 status = "okay";
87
88 axp209: pmic@34 {
89 reg = <0x34>;
90 interrupt-parent = <&nmi_intc>;
91 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
92 };
93};
94
95&i2c1 {
96 pinctrl-names = "default";
97 pinctrl-0 = <&i2c1_pins_a>;
98 status = "okay";
99};
100
101&i2c2 {
102 pinctrl-names = "default";
103 pinctrl-0 = <&i2c2_pins_a>;
104 status = "okay";
105};
106
107#include "axp209.dtsi"
108
109&mmc0 {
110 pinctrl-names = "default";
111 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
112 vmmc-supply = <&reg_vcc3v3>;
113 bus-width = <4>;
114 cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
115 cd-inverted;
116 status = "okay";
117};
118
119&mmc3 {
120 pinctrl-names = "default";
121 pinctrl-0 = <&mmc3_pins_a>;
122 vmmc-supply = <&reg_vcc3v3>;
123 mmc-pwrseq = <&mmc3_pwrseq>;
124 bus-width = <4>;
125 non-removable;
126 status = "okay";
127
128 brcmf: bcrmf@1 {
129 reg = <1>;
130 compatible = "brcm,bcm4329-fmac";
131 interrupt-parent = <&pio>;
132 interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */
133 interrupt-names = "host-wake";
134 };
135};
136
137&ohci0 {
138 status = "okay";
139};
140
141&ohci1 {
142 status = "okay";
143};
144
145&otg_sram {
146 status = "okay";
147};
148
149&pio {
150 vmmc3_pin_ap6xxx_wl_regon: vmmc3_pin@0 {
151 allwinner,pins = "PH9";
152 allwinner,function = "gpio_out";
153 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
154 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
155 };
156
157 usb0_id_detect_pin: usb0_id_detect_pin@0 {
158 allwinner,pins = "PH4";
159 allwinner,function = "gpio_in";
160 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
161 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
162 };
163};
164
165&reg_dcdc2 {
166 regulator-always-on;
167 regulator-min-microvolt = <1000000>;
168 regulator-max-microvolt = <1450000>;
169 regulator-name = "vdd-cpu";
170};
171
172&reg_dcdc3 {
173 regulator-always-on;
174 regulator-min-microvolt = <1000000>;
175 regulator-max-microvolt = <1400000>;
176 regulator-name = "vdd-int-dll";
177};
178
179&reg_ldo1 {
180 regulator-name = "vdd-rtc";
181};
182
183&reg_ldo2 {
184 regulator-always-on;
185 regulator-min-microvolt = <3000000>;
186 regulator-max-microvolt = <3000000>;
187 regulator-name = "avcc";
188};
189
190&reg_usb0_vbus {
191 status = "okay";
192};
193
194&reg_usb1_vbus {
195 status = "okay";
196};
197
198&reg_usb2_vbus {
199 status = "okay";
200};
201
202&uart0 {
203 pinctrl-names = "default";
204 pinctrl-0 = <&uart0_pins_a>;
205 status = "okay";
206};
207
208&usb_otg {
209 dr_mode = "otg";
210 status = "okay";
211};
212
213&usb_power_supply {
214 status = "okay";
215};
216
217&usbphy {
218 pinctrl-names = "default";
219 pinctrl-0 = <&usb0_id_detect_pin>;
220 usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
221 usb0_vbus_power-supply = <&usb_power_supply>;
222 usb0_vbus-supply = <&reg_usb0_vbus>;
223 usb1_vbus-supply = <&reg_usb1_vbus>;
224 usb2_vbus-supply = <&reg_usb2_vbus>;
225 status = "okay";
226};
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 2bebaa286f9a..3a68852f6706 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -107,7 +107,7 @@
107 720000 1200000 107 720000 1200000
108 528000 1100000 108 528000 1100000
109 312000 1000000 109 312000 1000000
110 144000 900000 110 144000 1000000
111 >; 111 >;
112 #cooling-cells = <2>; 112 #cooling-cells = <2>;
113 cooling-min-level = <0>; 113 cooling-min-level = <0>;
@@ -465,6 +465,14 @@
465 clock-output-names = "ir1"; 465 clock-output-names = "ir1";
466 }; 466 };
467 467
468 keypad_clk: clk@01c200c4 {
469 #clock-cells = <0>;
470 compatible = "allwinner,sun4i-a10-mod0-clk";
471 reg = <0x01c200c4 0x4>;
472 clocks = <&osc24M>;
473 clock-output-names = "keypad";
474 };
475
468 usb_clk: clk@01c200cc { 476 usb_clk: clk@01c200cc {
469 #clock-cells = <1>; 477 #clock-cells = <1>;
470 #reset-cells = <1>; 478 #reset-cells = <1>;
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 27a925ec17d2..0c0964d4fa1f 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -175,31 +175,6 @@
175 clock-output-names = "apb1"; 175 clock-output-names = "apb1";
176 }; 176 };
177 177
178 ahb1_gates: clk@01c20060 {
179 #clock-cells = <1>;
180 compatible = "allwinner,sun8i-a23-ahb1-gates-clk";
181 reg = <0x01c20060 0x8>;
182 clocks = <&ahb1>;
183 clock-indices = <1>, <6>,
184 <8>, <9>, <10>,
185 <13>, <14>,
186 <19>, <20>,
187 <21>, <24>, <26>,
188 <29>, <32>, <36>,
189 <40>, <44>, <46>,
190 <52>, <54>,
191 <57>;
192 clock-output-names = "ahb1_mipidsi", "ahb1_dma",
193 "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",
194 "ahb1_nand", "ahb1_sdram",
195 "ahb1_hstimer", "ahb1_spi0",
196 "ahb1_spi1", "ahb1_otg", "ahb1_ehci",
197 "ahb1_ohci", "ahb1_ve", "ahb1_lcd",
198 "ahb1_csi", "ahb1_be", "ahb1_fe",
199 "ahb1_gpu", "ahb1_spinlock",
200 "ahb1_drc";
201 };
202
203 apb1_gates: clk@01c20068 { 178 apb1_gates: clk@01c20068 {
204 #clock-cells = <1>; 179 #clock-cells = <1>;
205 compatible = "allwinner,sun8i-a23-apb1-gates-clk"; 180 compatible = "allwinner,sun8i-a23-apb1-gates-clk";
@@ -412,6 +387,13 @@
412 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 387 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
413 }; 388 };
414 389
390 pwm0_pins: pwm0 {
391 allwinner,pins = "PH0";
392 allwinner,function = "pwm0";
393 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
394 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
395 };
396
415 i2c0_pins_a: i2c0@0 { 397 i2c0_pins_a: i2c0@0 {
416 allwinner,pins = "PH2", "PH3"; 398 allwinner,pins = "PH2", "PH3";
417 allwinner,function = "i2c0"; 399 allwinner,function = "i2c0";
@@ -466,6 +448,14 @@
466 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 448 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
467 }; 449 };
468 450
451 pwm: pwm@01c21400 {
452 compatible = "allwinner,sun7i-a20-pwm";
453 reg = <0x01c21400 0xc>;
454 clocks = <&osc24M>;
455 #pwm-cells = <3>;
456 status = "disabled";
457 };
458
469 lradc: lradc@01c22800 { 459 lradc: lradc@01c22800 {
470 compatible = "allwinner,sun4i-a10-lradc-keys"; 460 compatible = "allwinner,sun4i-a10-lradc-keys";
471 reg = <0x01c22800 0x100>; 461 reg = <0x01c22800 0x100>;
@@ -589,6 +579,14 @@
589 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 579 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
590 }; 580 };
591 581
582 nmi_intc: interrupt-controller@01f00c0c {
583 compatible = "allwinner,sun6i-a31-sc-nmi";
584 interrupt-controller;
585 #interrupt-cells = <2>;
586 reg = <0x01f00c0c 0x38>;
587 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
588 };
589
592 prcm@01f01400 { 590 prcm@01f01400 {
593 compatible = "allwinner,sun8i-a23-prcm"; 591 compatible = "allwinner,sun8i-a23-prcm";
594 reg = <0x01f01400 0x200>; 592 reg = <0x01f01400 0x200>;
@@ -657,10 +655,18 @@
657 resets = <&apb0_rst 0>; 655 resets = <&apb0_rst 0>;
658 gpio-controller; 656 gpio-controller;
659 interrupt-controller; 657 interrupt-controller;
658 #interrupt-cells = <3>;
660 #address-cells = <1>; 659 #address-cells = <1>;
661 #size-cells = <0>; 660 #size-cells = <0>;
662 #gpio-cells = <3>; 661 #gpio-cells = <3>;
663 662
663 r_rsb_pins: r_rsb {
664 allwinner,pins = "PL0", "PL1";
665 allwinner,function = "s_rsb";
666 allwinner,drive = <SUN4I_PINCTRL_20_MA>;
667 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
668 };
669
664 r_uart_pins_a: r_uart@0 { 670 r_uart_pins_a: r_uart@0 {
665 allwinner,pins = "PL2", "PL3"; 671 allwinner,pins = "PL2", "PL3";
666 allwinner,function = "s_uart"; 672 allwinner,function = "s_uart";
@@ -668,5 +674,19 @@
668 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; 674 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
669 }; 675 };
670 }; 676 };
677
678 r_rsb: rsb@01f03400 {
679 compatible = "allwinner,sun8i-a23-rsb";
680 reg = <0x01f03400 0x400>;
681 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
682 clocks = <&apb0_gates 3>;
683 clock-frequency = <3000000>;
684 resets = <&apb0_rst 3>;
685 pinctrl-names = "default";
686 pinctrl-0 = <&r_rsb_pins>;
687 status = "disabled";
688 #address-cells = <1>;
689 #size-cells = <0>;
690 };
671 }; 691 };
672}; 692};
diff --git a/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts
new file mode 100644
index 000000000000..1aeb06c649b9
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts
@@ -0,0 +1,145 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun8i-a23.dtsi"
45#include "sunxi-common-regulators.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/input/input.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50
51/ {
52 model = "Allwinner GT90H Quad Core Tablet (v4)";
53 compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a33";
54
55 aliases {
56 serial0 = &r_uart;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62};
63
64&ehci0 {
65 status = "okay";
66};
67
68&i2c0 {
69 pinctrl-names = "default";
70 pinctrl-0 = <&i2c0_pins_a>;
71 status = "okay";
72};
73
74&i2c1 {
75 pinctrl-names = "default";
76 pinctrl-0 = <&i2c1_pins_a>;
77 status = "okay";
78};
79
80&lradc {
81 vref-supply = <&reg_vcc3v0>;
82 status = "okay";
83
84 button@200 {
85 label = "Volume Up";
86 linux,code = <KEY_VOLUMEUP>;
87 channel = <0>;
88 voltage = <200000>;
89 };
90
91 button@400 {
92 label = "Volume Down";
93 linux,code = <KEY_VOLUMEDOWN>;
94 channel = <0>;
95 voltage = <400000>;
96 };
97
98 button@600 {
99 label = "Back";
100 linux,code = <KEY_BACK>;
101 channel = <0>;
102 voltage = <600000>;
103 };
104};
105
106&mmc0 {
107 pinctrl-names = "default";
108 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_gt90h>;
109 /* FIXME this really is aldo1, correct once we've pmic support */
110 vmmc-supply = <&reg_vcc3v0>;
111 bus-width = <4>;
112 cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
113 cd-inverted;
114 status = "okay";
115};
116
117&pio {
118 mmc0_cd_pin_gt90h: mmc0_cd_pin@0 {
119 allwinner,pins = "PB4";
120 allwinner,function = "gpio_in";
121 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
122 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
123 };
124};
125
126&r_uart {
127 pinctrl-names = "default";
128 pinctrl-0 = <&r_uart_pins_a>;
129 status = "okay";
130};
131
132/*
133 * FIXME for now we only support host mode and rely on u-boot to have
134 * turned on Vbus which is controlled by the axp223 pmic on the board.
135 *
136 * Once we have axp223 support we should switch to fully supporting otg.
137 */
138&usb_otg {
139 dr_mode = "host";
140 status = "okay";
141};
142
143&usbphy {
144 status = "okay";
145};
diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts
index 382d64c3b78e..c2f22fc33811 100644..120000
--- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts
+++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts
@@ -1,54 +1 @@
1/* sun8i-a23-q8-tablet.dts \ No newline at end of file
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * The Ippo Q8H v1.2 is almost identical to the v5, still it needs a separate
45 * dtb file since some gpio-s surrounding the wlan/bluetooth are different,
46 * and it uses different camera sensors.
47 */
48
49#include "sun8i-a23-ippo-q8h-v5.dts"
50
51/ {
52 model = "Ippo Q8H Dual Core Tablet (v1.2)";
53 compatible = "ippo,q8h-v1.2", "allwinner,sun8i-a23";
54};
diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
index 8d9da6886a4c..c2f22fc33811 100644..120000
--- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
+++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
@@ -1,136 +1 @@
1/* sun8i-a23-q8-tablet.dts \ No newline at end of file
2 * Copyright 2014 Chen-Yu Tsai
3 *
4 * Chen-Yu Tsai <wens@csie.org>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/dts-v1/;
46#include "sun8i-a23.dtsi"
47#include "sunxi-common-regulators.dtsi"
48
49#include <dt-bindings/gpio/gpio.h>
50#include <dt-bindings/input/input.h>
51#include <dt-bindings/pinctrl/sun4i-a10.h>
52
53/ {
54 model = "Ippo Q8H Dual Core Tablet (v5)";
55 compatible = "ippo,q8h-v5", "allwinner,sun8i-a23";
56
57 aliases {
58 serial0 = &r_uart;
59 };
60
61 chosen {
62 stdout-path = "serial0:115200n8";
63 };
64};
65
66&i2c0 {
67 pinctrl-names = "default";
68 pinctrl-0 = <&i2c0_pins_a>;
69 status = "okay";
70};
71
72&i2c1 {
73 pinctrl-names = "default";
74 pinctrl-0 = <&i2c1_pins_a>;
75 status = "okay";
76};
77
78&i2c2 {
79 pinctrl-names = "default";
80 pinctrl-0 = <&i2c2_pins_a>;
81 /* pull-ups and devices require PMIC regulator */
82 status = "failed";
83};
84
85&lradc {
86 vref-supply = <&reg_vcc3v0>;
87 status = "okay";
88
89 button@200 {
90 label = "Volume Up";
91 linux,code = <KEY_VOLUMEUP>;
92 channel = <0>;
93 voltage = <200000>;
94 };
95
96 button@400 {
97 label = "Volume Down";
98 linux,code = <KEY_VOLUMEDOWN>;
99 channel = <0>;
100 voltage = <400000>;
101 };
102};
103
104&mmc0 {
105 pinctrl-names = "default";
106 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8h>;
107 vmmc-supply = <&reg_vcc3v0>;
108 bus-width = <4>;
109 cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
110 cd-inverted;
111 status = "okay";
112};
113
114&pio {
115 mmc0_cd_pin_q8h: mmc0_cd_pin@0 {
116 allwinner,pins = "PB4";
117 allwinner,function = "gpio_in";
118 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
119 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
120 };
121};
122
123&r_uart {
124 pinctrl-names = "default";
125 pinctrl-0 = <&r_uart_pins_a>;
126 status = "okay";
127};
128
129&usb_otg {
130 dr_mode = "host";
131 status = "okay";
132};
133
134&usbphy {
135 status = "okay";
136};
diff --git a/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts b/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts
new file mode 100644
index 000000000000..6062ea7a9903
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts
@@ -0,0 +1,65 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun8i-a23.dtsi"
45#include "sun8i-q8-common.dtsi"
46
47/ {
48 model = "Q8 A23 Tablet";
49 compatible = "allwinner,q8-a23", "allwinner,sun8i-a23";
50};
51
52/*
53 * FIXME for now we only support host mode and rely on u-boot to have
54 * turned on Vbus which is controlled by the axp223 pmic on the board.
55 *
56 * Once we have axp223 support we should switch to fully supporting otg.
57 */
58&usb_otg {
59 dr_mode = "host";
60 status = "okay";
61};
62
63&usbphy {
64 status = "okay";
65};
diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 2cc27c7a59dc..92e6616979ea 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -50,6 +50,31 @@
50 }; 50 };
51 51
52 clocks { 52 clocks {
53 ahb1_gates: clk@01c20060 {
54 #clock-cells = <1>;
55 compatible = "allwinner,sun8i-a23-ahb1-gates-clk";
56 reg = <0x01c20060 0x8>;
57 clocks = <&ahb1>;
58 clock-indices = <1>, <6>,
59 <8>, <9>, <10>,
60 <13>, <14>,
61 <19>, <20>,
62 <21>, <24>, <26>,
63 <29>, <32>, <36>,
64 <40>, <44>, <46>,
65 <52>, <53>,
66 <54>, <57>;
67 clock-output-names = "ahb1_mipidsi", "ahb1_dma",
68 "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",
69 "ahb1_nand", "ahb1_sdram",
70 "ahb1_hstimer", "ahb1_spi0",
71 "ahb1_spi1", "ahb1_otg", "ahb1_ehci",
72 "ahb1_ohci", "ahb1_ve", "ahb1_lcd",
73 "ahb1_csi", "ahb1_be", "ahb1_fe",
74 "ahb1_gpu", "ahb1_msgbox",
75 "ahb1_spinlock", "ahb1_drc";
76 };
77
53 mbus_clk: clk@01c2015c { 78 mbus_clk: clk@01c2015c {
54 #clock-cells = <0>; 79 #clock-cells = <0>;
55 compatible = "allwinner,sun8i-a23-mbus-clk"; 80 compatible = "allwinner,sun8i-a23-mbus-clk";
diff --git a/arch/arm/boot/dts/sun8i-a33-et-q8-v1.6.dts b/arch/arm/boot/dts/sun8i-a33-et-q8-v1.6.dts
index 19db844863bb..4519fd791a8f 100644..120000
--- a/arch/arm/boot/dts/sun8i-a33-et-q8-v1.6.dts
+++ b/arch/arm/boot/dts/sun8i-a33-et-q8-v1.6.dts
@@ -1,88 +1 @@
1/* sun8i-a33-q8-tablet.dts \ No newline at end of file
2 * Copyright 2015 Vishnu Patekar
3 * Vishnu Patekar <vishnupatekar0510@gmail.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45#include "sun8i-a33.dtsi"
46#include "sunxi-common-regulators.dtsi"
47
48#include <dt-bindings/gpio/gpio.h>
49#include <dt-bindings/input/input.h>
50#include <dt-bindings/pinctrl/sun4i-a10.h>
51
52/ {
53 model = "ET Q8 Quad Core Tablet (v1.6)";
54 compatible = "et,q8-v1.6", "allwinner,sun8i-a33";
55
56 aliases {
57 serial0 = &uart0;
58 };
59
60 chosen {
61 stdout-path = "serial0:115200n8";
62 };
63};
64
65&lradc {
66 vref-supply = <&reg_vcc3v0>;
67 status = "okay";
68
69 button@200 {
70 label = "Volume Up";
71 linux,code = <KEY_VOLUMEUP>;
72 channel = <0>;
73 voltage = <200000>;
74 };
75
76 button@400 {
77 label = "Volume Down";
78 linux,code = <KEY_VOLUMEDOWN>;
79 channel = <0>;
80 voltage = <400000>;
81 };
82};
83
84&uart0 {
85 pinctrl-names = "default";
86 pinctrl-0 = <&uart0_pins_a>;
87 status = "okay";
88};
diff --git a/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts b/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts
index a43897515fb6..4519fd791a8f 100644..120000
--- a/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts
+++ b/arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dts
@@ -1,133 +1 @@
1/* sun8i-a33-q8-tablet.dts \ No newline at end of file
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun8i-a33.dtsi"
45#include "sunxi-common-regulators.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48#include <dt-bindings/input/input.h>
49#include <dt-bindings/pinctrl/sun4i-a10.h>
50
51/ {
52 model = "Ippo Q8H Quad Core Tablet (v1.2)";
53 compatible = "ippo,a33-q8h-v1.2", "allwinner,sun8i-a33";
54
55 aliases {
56 serial0 = &r_uart;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62};
63
64&i2c0 {
65 pinctrl-names = "default";
66 pinctrl-0 = <&i2c0_pins_a>;
67 status = "okay";
68};
69
70&i2c1 {
71 pinctrl-names = "default";
72 pinctrl-0 = <&i2c1_pins_a>;
73 status = "okay";
74};
75
76&lradc {
77 vref-supply = <&reg_vcc3v0>;
78 status = "okay";
79
80 button@200 {
81 label = "Volume Up";
82 linux,code = <KEY_VOLUMEUP>;
83 channel = <0>;
84 voltage = <200000>;
85 };
86
87 button@400 {
88 label = "Volume Down";
89 linux,code = <KEY_VOLUMEDOWN>;
90 channel = <0>;
91 voltage = <400000>;
92 };
93};
94
95&mmc0 {
96 pinctrl-names = "default";
97 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8h>;
98 vmmc-supply = <&reg_vcc3v0>;
99 bus-width = <4>;
100 cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
101 cd-inverted;
102 status = "okay";
103};
104
105&pio {
106 mmc0_cd_pin_q8h: mmc0_cd_pin@0 {
107 allwinner,pins = "PB4";
108 allwinner,function = "gpio_in";
109 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
110 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
111 };
112};
113
114&r_uart {
115 pinctrl-names = "default";
116 pinctrl-0 = <&r_uart_pins_a>;
117 status = "okay";
118};
119
120/*
121 * FIXME for now we only support host mode and rely on u-boot to have
122 * turned on Vbus which is controlled by the axp223 pmic on the board.
123 *
124 * Once we have axp223 support we should switch to fully supporting otg.
125 */
126&usb_otg {
127 dr_mode = "host";
128 status = "okay";
129};
130
131&usbphy {
132 status = "okay";
133};
diff --git a/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts b/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
new file mode 100644
index 000000000000..44b32296a025
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
@@ -0,0 +1,65 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun8i-a33.dtsi"
45#include "sun8i-q8-common.dtsi"
46
47/ {
48 model = "Q8 A33 Tablet";
49 compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
50};
51
52/*
53 * FIXME for now we only support host mode and rely on u-boot to have
54 * turned on Vbus which is controlled by the axp223 pmic on the board.
55 *
56 * Once we have axp223 support we should switch to fully supporting otg.
57 */
58&usb_otg {
59 dr_mode = "host";
60 status = "okay";
61};
62
63&usbphy {
64 status = "okay";
65};
diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
index 1d5390d4e03a..13ce68f06dd6 100644
--- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
@@ -130,6 +130,10 @@
130 }; 130 };
131}; 131};
132 132
133&r_rsb {
134 status = "okay";
135};
136
133&uart0 { 137&uart0 {
134 pinctrl-names = "default"; 138 pinctrl-names = "default";
135 pinctrl-0 = <&uart0_pins_b>; 139 pinctrl-0 = <&uart0_pins_b>;
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index faa7d3c1fcea..001d8402ca18 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -72,6 +72,41 @@
72 clock-output-names = "pll11"; 72 clock-output-names = "pll11";
73 }; 73 };
74 74
75 ahb1_gates: clk@01c20060 {
76 #clock-cells = <1>;
77 compatible = "allwinner,sun8i-a33-ahb1-gates-clk";
78 reg = <0x01c20060 0x8>;
79 clocks = <&ahb1>;
80 clock-indices = <1>, <5>,
81 <6>, <8>, <9>,
82 <10>, <13>, <14>,
83 <19>, <20>,
84 <21>, <24>, <26>,
85 <29>, <32>, <36>,
86 <40>, <44>, <46>,
87 <52>, <53>,
88 <54>, <57>,
89 <58>;
90 clock-output-names = "ahb1_mipidsi", "ahb1_ss",
91 "ahb1_dma","ahb1_mmc0", "ahb1_mmc1",
92 "ahb1_mmc2", "ahb1_nand", "ahb1_sdram",
93 "ahb1_hstimer", "ahb1_spi0",
94 "ahb1_spi1", "ahb1_otg", "ahb1_ehci",
95 "ahb1_ohci", "ahb1_ve", "ahb1_lcd",
96 "ahb1_csi", "ahb1_be", "ahb1_fe",
97 "ahb1_gpu", "ahb1_msgbox",
98 "ahb1_spinlock", "ahb1_drc",
99 "ahb1_sat";
100 };
101
102 ss_clk: clk@01c2009c {
103 #clock-cells = <0>;
104 compatible = "allwinner,sun4i-a10-mod0-clk";
105 reg = <0x01c2009c 0x4>;
106 clocks = <&osc24M>, <&pll6 0>;
107 clock-output-names = "ss";
108 };
109
75 mbus_clk: clk@01c2015c { 110 mbus_clk: clk@01c2015c {
76 #clock-cells = <0>; 111 #clock-cells = <0>;
77 compatible = "allwinner,sun8i-a23-mbus-clk"; 112 compatible = "allwinner,sun8i-a23-mbus-clk";
@@ -82,6 +117,16 @@
82 }; 117 };
83 118
84 soc@01c00000 { 119 soc@01c00000 {
120 crypto: crypto-engine@01c15000 {
121 compatible = "allwinner,sun4i-a10-crypto";
122 reg = <0x01c15000 0x1000>;
123 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
124 clocks = <&ahb1_gates 5>, <&ss_clk>;
125 clock-names = "ahb", "mod";
126 resets = <&ahb1_rst 5>;
127 reset-names = "ahb";
128 };
129
85 usb_otg: usb@01c19000 { 130 usb_otg: usb@01c19000 {
86 compatible = "allwinner,sun8i-a33-musb"; 131 compatible = "allwinner,sun8i-a33-musb";
87 reg = <0x01c19000 0x0400>; 132 reg = <0x01c19000 0x0400>;
diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi b/arch/arm/boot/dts/sun8i-q8-common.dtsi
new file mode 100644
index 000000000000..1a69231d2da5
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
@@ -0,0 +1,101 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42#include "sunxi-q8-common.dtsi"
43
44#include <dt-bindings/pwm/pwm.h>
45
46/ {
47 aliases {
48 serial0 = &r_uart;
49 };
50
51 backlight: backlight {
52 compatible = "pwm-backlight";
53 pinctrl-names = "default";
54 pinctrl-0 = <&bl_en_pin_q8>;
55 pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
56 brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
57 default-brightness-level = <8>;
58 enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
59 /* backlight is powered by AXP223 DC1SW */
60 };
61
62 chosen {
63 stdout-path = "serial0:115200n8";
64 };
65};
66
67&mmc0 {
68 pinctrl-names = "default";
69 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8>;
70 vmmc-supply = <&reg_vcc3v0>;
71 bus-width = <4>;
72 cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
73 cd-inverted;
74 status = "okay";
75};
76
77&pio {
78 bl_en_pin_q8: bl_en_pin@0 {
79 allwinner,pins = "PH6";
80 allwinner,function = "gpio_in";
81 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
82 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
83 };
84
85 mmc0_cd_pin_q8: mmc0_cd_pin@0 {
86 allwinner,pins = "PB4";
87 allwinner,function = "gpio_in";
88 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
89 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
90 };
91};
92
93&r_rsb {
94 status = "okay";
95};
96
97&r_uart {
98 pinctrl-names = "default";
99 pinctrl-0 = <&r_uart_pins_a>;
100 status = "okay";
101};
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 5908e3dcf965..1118bf5cc4fb 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -594,7 +594,7 @@
594 clocks = <&apb0_gates 5>; 594 clocks = <&apb0_gates 5>;
595 gpio-controller; 595 gpio-controller;
596 interrupt-controller; 596 interrupt-controller;
597 #interrupt-cells = <2>; 597 #interrupt-cells = <3>;
598 #size-cells = <0>; 598 #size-cells = <0>;
599 #gpio-cells = <3>; 599 #gpio-cells = <3>;
600 600
diff --git a/arch/arm/boot/dts/sunxi-q8-common.dtsi b/arch/arm/boot/dts/sunxi-q8-common.dtsi
new file mode 100644
index 000000000000..b8241462fcea
--- /dev/null
+++ b/arch/arm/boot/dts/sunxi-q8-common.dtsi
@@ -0,0 +1,83 @@
1/*
2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#include <dt-bindings/gpio/gpio.h>
44#include <dt-bindings/input/input.h>
45#include <dt-bindings/pinctrl/sun4i-a10.h>
46#include "sunxi-common-regulators.dtsi"
47
48&i2c0 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&i2c0_pins_a>;
51 status = "okay";
52};
53
54&i2c1 {
55 pinctrl-names = "default";
56 pinctrl-0 = <&i2c1_pins_a>;
57 status = "okay";
58};
59
60&lradc {
61 vref-supply = <&reg_vcc3v0>;
62 status = "okay";
63
64 button@200 {
65 label = "Volume Up";
66 linux,code = <KEY_VOLUMEUP>;
67 channel = <0>;
68 voltage = <200000>;
69 };
70
71 button@400 {
72 label = "Volume Down";
73 linux,code = <KEY_VOLUMEDOWN>;
74 channel = <0>;
75 voltage = <400000>;
76 };
77};
78
79&pwm {
80 pinctrl-names = "default";
81 pinctrl-0 = <&pwm0_pins>;
82 status = "okay";
83};
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
index a9aec23e06f2..40c23a0b7cfc 100644
--- a/arch/arm/boot/dts/tegra124-nyan.dtsi
+++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
@@ -159,7 +159,7 @@
159 vin-ldo9-10-supply = <&vdd_5v0_sys>; 159 vin-ldo9-10-supply = <&vdd_5v0_sys>;
160 vin-ldo11-supply = <&vdd_3v3_run>; 160 vin-ldo11-supply = <&vdd_3v3_run>;
161 161
162 sd0 { 162 vdd_cpu: sd0 {
163 regulator-name = "+VDD_CPU_AP"; 163 regulator-name = "+VDD_CPU_AP";
164 regulator-min-microvolt = <700000>; 164 regulator-min-microvolt = <700000>;
165 regulator-max-microvolt = <1350000>; 165 regulator-max-microvolt = <1350000>;
@@ -397,6 +397,13 @@
397 non-removable; 397 non-removable;
398 }; 398 };
399 399
400 /* CPU DFLL clock */
401 clock@0,70110000 {
402 status = "okay";
403 vdd-cpu-supply = <&vdd_cpu>;
404 nvidia,i2c-fs-rate = <400000>;
405 };
406
400 ahub@0,70300000 { 407 ahub@0,70300000 {
401 i2s@0,70301100 { 408 i2s@0,70301100 {
402 status = "okay"; 409 status = "okay";
@@ -487,6 +494,12 @@
487 }; 494 };
488 }; 495 };
489 496
497 cpus {
498 cpu@0 {
499 vdd-cpu-supply = <&vdd_cpu>;
500 };
501 };
502
490 gpio-keys { 503 gpio-keys {
491 compatible = "gpio-keys"; 504 compatible = "gpio-keys";
492 505
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 1e204a6de12c..8aa6e96b5b5c 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -608,26 +608,20 @@
608 608
609 sata@0,70020000 { 609 sata@0,70020000 {
610 compatible = "nvidia,tegra124-ahci"; 610 compatible = "nvidia,tegra124-ahci";
611
612 reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ 611 reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */
613 <0x0 0x70020000 0x0 0x7000>; /* SATA */ 612 <0x0 0x70020000 0x0 0x7000>; /* SATA */
614
615 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 613 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
616
617 clocks = <&tegra_car TEGRA124_CLK_SATA>, 614 clocks = <&tegra_car TEGRA124_CLK_SATA>,
618 <&tegra_car TEGRA124_CLK_SATA_OOB>, 615 <&tegra_car TEGRA124_CLK_SATA_OOB>,
619 <&tegra_car TEGRA124_CLK_CML1>, 616 <&tegra_car TEGRA124_CLK_CML1>,
620 <&tegra_car TEGRA124_CLK_PLL_E>; 617 <&tegra_car TEGRA124_CLK_PLL_E>;
621 clock-names = "sata", "sata-oob", "cml1", "pll_e"; 618 clock-names = "sata", "sata-oob", "cml1", "pll_e";
622
623 resets = <&tegra_car 124>, 619 resets = <&tegra_car 124>,
624 <&tegra_car 123>, 620 <&tegra_car 123>,
625 <&tegra_car 129>; 621 <&tegra_car 129>;
626 reset-names = "sata", "sata-oob", "sata-cold"; 622 reset-names = "sata", "sata-oob", "sata-cold";
627
628 phys = <&padctl TEGRA_XUSB_PADCTL_SATA>; 623 phys = <&padctl TEGRA_XUSB_PADCTL_SATA>;
629 phy-names = "sata-phy"; 624 phy-names = "sata-phy";
630
631 status = "disabled"; 625 status = "disabled";
632 }; 626 };
633 627
@@ -636,7 +630,7 @@
636 reg = <0x0 0x70030000 0x0 0x10000>; 630 reg = <0x0 0x70030000 0x0 0x10000>;
637 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 631 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
638 clocks = <&tegra_car TEGRA124_CLK_HDA>, 632 clocks = <&tegra_car TEGRA124_CLK_HDA>,
639 <&tegra_car TEGRA124_CLK_HDA2HDMI>, 633 <&tegra_car TEGRA124_CLK_HDA2HDMI>,
640 <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; 634 <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>;
641 clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 635 clock-names = "hda", "hda2hdmi", "hda2codec_2x";
642 resets = <&tegra_car 125>, /* hda */ 636 resets = <&tegra_car 125>, /* hda */
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index e058709e6d98..0a8d1a6c9ebe 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -601,8 +601,8 @@
601 <&tegra_car TEGRA20_CLK_PLL_E>; 601 <&tegra_car TEGRA20_CLK_PLL_E>;
602 clock-names = "pex", "afi", "pll_e"; 602 clock-names = "pex", "afi", "pll_e";
603 resets = <&tegra_car 70>, 603 resets = <&tegra_car 70>,
604 <&tegra_car 72>, 604 <&tegra_car 72>,
605 <&tegra_car 74>; 605 <&tegra_car 74>;
606 reset-names = "pex", "afi", "pcie_x"; 606 reset-names = "pex", "afi", "pcie_x";
607 status = "disabled"; 607 status = "disabled";
608 608
diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts
index 6236bdecb48b..f2879cfcca62 100644
--- a/arch/arm/boot/dts/tegra30-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts
@@ -126,6 +126,10 @@
126 }; 126 };
127 }; 127 };
128 128
129 hda@70030000 {
130 status = "okay";
131 };
132
129 sd1: sdhci@78000000 { 133 sd1: sdhci@78000000 {
130 status = "okay"; 134 status = "okay";
131 bus-width = <4>; 135 bus-width = <4>;
@@ -149,6 +153,7 @@
149 153
150 usb-phy@7d000000 { 154 usb-phy@7d000000 {
151 status = "okay"; 155 status = "okay";
156 dr_mode = "otg";
152 vbus-supply = <&usbo1_vbus_reg>; 157 vbus-supply = <&usbo1_vbus_reg>;
153 }; 158 };
154 159
@@ -175,7 +180,7 @@
175 backlight: backlight { 180 backlight: backlight {
176 compatible = "pwm-backlight"; 181 compatible = "pwm-backlight";
177 182
178 /* PWM0 */ 183 /* PWM_BKL1 */
179 pwms = <&pwm 0 5000000>; 184 pwms = <&pwm 0 5000000>;
180 brightness-levels = <255 231 223 207 191 159 127 0>; 185 brightness-levels = <255 231 223 207 191 159 127 0>;
181 default-brightness-level = <6>; 186 default-brightness-level = <6>;
@@ -186,10 +191,10 @@
186 gpio-keys { 191 gpio-keys {
187 compatible = "gpio-keys"; 192 compatible = "gpio-keys";
188 193
189 power { 194 wakeup {
190 label = "Power"; 195 label = "WAKE1_MICO";
191 gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>; 196 gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>;
192 linux,code = <KEY_POWER>; 197 linux,code = <KEY_WAKEUP>;
193 debounce-interval = <10>; 198 debounce-interval = <10>;
194 gpio-key,wakeup; 199 gpio-key,wakeup;
195 }; 200 };
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index a5446cba9804..bf361277fe10 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -1,8 +1,9 @@
1#include "tegra30.dtsi" 1#include "tegra30.dtsi"
2 2
3/* 3/*
4 * Toradex Apalis T30 Device Tree 4 * Toradex Apalis T30 Module Device Tree
5 * Compatible for Revisions 1GB: V1.0A; 2GB: V1.0B, V1.0C 5 * Compatible for Revisions 1GB: V1.0A, V1.1A; 1GB IT: V1.1A;
6 * 2GB: V1.0B, V1.0C, V1.0E, V1.1A
6 */ 7 */
7/ { 8/ {
8 model = "Toradex Apalis T30"; 9 model = "Toradex Apalis T30";
@@ -33,8 +34,8 @@
33 34
34 host1x@50000000 { 35 host1x@50000000 {
35 hdmi@54280000 { 36 hdmi@54280000 {
36 vdd-supply = <&sys_3v3_reg>; 37 vdd-supply = <&avdd_hdmi_3v3_reg>;
37 pll-supply = <&vio_reg>; 38 pll-supply = <&avdd_hdmi_pll_1v8_reg>;
38 39
39 nvidia,hpd-gpio = 40 nvidia,hpd-gpio =
40 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; 41 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
@@ -57,25 +58,25 @@
57 58
58 /* Apalis BKL1_PWM */ 59 /* Apalis BKL1_PWM */
59 uart3_rts_n_pc0 { 60 uart3_rts_n_pc0 {
60 nvidia,pins = "uart3_rts_n_pc0"; 61 nvidia,pins = "uart3_rts_n_pc0";
61 nvidia,function = "pwm0"; 62 nvidia,function = "pwm0";
62 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 63 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
63 nvidia,tristate = <TEGRA_PIN_DISABLE>; 64 nvidia,tristate = <TEGRA_PIN_DISABLE>;
64 }; 65 };
65 /* BKL1_PWM_EN#, disable TPS65911 PMIC PWM backlight */ 66 /* BKL1_PWM_EN#, disable TPS65911 PMIC PWM backlight */
66 uart3_cts_n_pa1 { 67 uart3_cts_n_pa1 {
67 nvidia,pins = "uart3_cts_n_pa1"; 68 nvidia,pins = "uart3_cts_n_pa1";
68 nvidia,function = "rsvd1"; 69 nvidia,function = "rsvd2";
69 nvidia,pull = <TEGRA_PIN_PULL_UP>; 70 nvidia,pull = <TEGRA_PIN_PULL_UP>;
70 nvidia,tristate = <TEGRA_PIN_DISABLE>; 71 nvidia,tristate = <TEGRA_PIN_DISABLE>;
71 }; 72 };
72 73
73 /* Apalis CAN1 on SPI6 */ 74 /* Apalis CAN1 on SPI6 */
74 spi2_cs0_n_px3 { 75 spi2_cs0_n_px3 {
75 nvidia,pins = "spi2_cs0_n_px3", 76 nvidia,pins = "spi2_cs0_n_px3",
76 "spi2_miso_px1", 77 "spi2_miso_px1",
77 "spi2_mosi_px0", 78 "spi2_mosi_px0",
78 "spi2_sck_px2"; 79 "spi2_sck_px2";
79 nvidia,function = "spi6"; 80 nvidia,function = "spi6";
80 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 81 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
81 nvidia,tristate = <TEGRA_PIN_DISABLE>; 82 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -91,10 +92,10 @@
91 92
92 /* Apalis CAN2 on SPI4 */ 93 /* Apalis CAN2 on SPI4 */
93 gmi_a16_pj7 { 94 gmi_a16_pj7 {
94 nvidia,pins = "gmi_a16_pj7", 95 nvidia,pins = "gmi_a16_pj7",
95 "gmi_a17_pb0", 96 "gmi_a17_pb0",
96 "gmi_a18_pb1", 97 "gmi_a18_pb1",
97 "gmi_a19_pk7"; 98 "gmi_a19_pk7";
98 nvidia,function = "spi4"; 99 nvidia,function = "spi4";
99 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 100 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
100 nvidia,tristate = <TEGRA_PIN_DISABLE>; 101 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -108,6 +109,30 @@
108 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 109 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
109 }; 110 };
110 111
112 /* Apalis Digital Audio */
113 clk1_req_pee2 {
114 nvidia,pins = "clk1_req_pee2";
115 nvidia,function = "hda";
116 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
117 nvidia,tristate = <TEGRA_PIN_DISABLE>;
118 };
119 clk2_out_pw5 {
120 nvidia,pins = "clk2_out_pw5";
121 nvidia,function = "extperiph2";
122 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123 nvidia,tristate = <TEGRA_PIN_DISABLE>;
124 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
125 };
126 dap1_fs_pn0 {
127 nvidia,pins = "dap1_fs_pn0",
128 "dap1_din_pn1",
129 "dap1_dout_pn2",
130 "dap1_sclk_pn3";
131 nvidia,function = "hda";
132 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
133 nvidia,tristate = <TEGRA_PIN_DISABLE>;
134 };
135
111 /* Apalis I2C3 */ 136 /* Apalis I2C3 */
112 cam_i2c_scl_pbb1 { 137 cam_i2c_scl_pbb1 {
113 nvidia,pins = "cam_i2c_scl_pbb1", 138 nvidia,pins = "cam_i2c_scl_pbb1",
@@ -122,21 +147,21 @@
122 147
123 /* Apalis MMC1 */ 148 /* Apalis MMC1 */
124 sdmmc3_clk_pa6 { 149 sdmmc3_clk_pa6 {
125 nvidia,pins = "sdmmc3_clk_pa6", 150 nvidia,pins = "sdmmc3_clk_pa6",
126 "sdmmc3_cmd_pa7"; 151 "sdmmc3_cmd_pa7";
127 nvidia,function = "sdmmc3"; 152 nvidia,function = "sdmmc3";
128 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 153 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
129 nvidia,tristate = <TEGRA_PIN_DISABLE>; 154 nvidia,tristate = <TEGRA_PIN_DISABLE>;
130 }; 155 };
131 sdmmc3_dat0_pb7 { 156 sdmmc3_dat0_pb7 {
132 nvidia,pins = "sdmmc3_dat0_pb7", 157 nvidia,pins = "sdmmc3_dat0_pb7",
133 "sdmmc3_dat1_pb6", 158 "sdmmc3_dat1_pb6",
134 "sdmmc3_dat2_pb5", 159 "sdmmc3_dat2_pb5",
135 "sdmmc3_dat3_pb4", 160 "sdmmc3_dat3_pb4",
136 "sdmmc3_dat4_pd1", 161 "sdmmc3_dat4_pd1",
137 "sdmmc3_dat5_pd0", 162 "sdmmc3_dat5_pd0",
138 "sdmmc3_dat6_pd3", 163 "sdmmc3_dat6_pd3",
139 "sdmmc3_dat7_pd4"; 164 "sdmmc3_dat7_pd4";
140 nvidia,function = "sdmmc3"; 165 nvidia,function = "sdmmc3";
141 nvidia,pull = <TEGRA_PIN_PULL_UP>; 166 nvidia,pull = <TEGRA_PIN_PULL_UP>;
142 nvidia,tristate = <TEGRA_PIN_DISABLE>; 167 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -151,32 +176,32 @@
151 }; 176 };
152 177
153 /* Apalis PWM1 */ 178 /* Apalis PWM1 */
154 gpio_pu6 { 179 pu6 {
155 nvidia,pins = "gpio_pu6"; 180 nvidia,pins = "pu6";
156 nvidia,function = "pwm3"; 181 nvidia,function = "pwm3";
157 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 182 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
158 nvidia,tristate = <TEGRA_PIN_DISABLE>; 183 nvidia,tristate = <TEGRA_PIN_DISABLE>;
159 }; 184 };
160 185
161 /* Apalis PWM2 */ 186 /* Apalis PWM2 */
162 gpio_pu5 { 187 pu5 {
163 nvidia,pins = "gpio_pu5"; 188 nvidia,pins = "pu5";
164 nvidia,function = "pwm2"; 189 nvidia,function = "pwm2";
165 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 190 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
166 nvidia,tristate = <TEGRA_PIN_DISABLE>; 191 nvidia,tristate = <TEGRA_PIN_DISABLE>;
167 }; 192 };
168 193
169 /* Apalis PWM3 */ 194 /* Apalis PWM3 */
170 gpio_pu4 { 195 pu4 {
171 nvidia,pins = "gpio_pu4"; 196 nvidia,pins = "pu4";
172 nvidia,function = "pwm1"; 197 nvidia,function = "pwm1";
173 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 198 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
174 nvidia,tristate = <TEGRA_PIN_DISABLE>; 199 nvidia,tristate = <TEGRA_PIN_DISABLE>;
175 }; 200 };
176 201
177 /* Apalis PWM4 */ 202 /* Apalis PWM4 */
178 gpio_pu3 { 203 pu3 {
179 nvidia,pins = "gpio_pu3"; 204 nvidia,pins = "pu3";
180 nvidia,function = "pwm0"; 205 nvidia,function = "pwm0";
181 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 206 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
182 nvidia,tristate = <TEGRA_PIN_DISABLE>; 207 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -198,11 +223,11 @@
198 nvidia,tristate = <TEGRA_PIN_DISABLE>; 223 nvidia,tristate = <TEGRA_PIN_DISABLE>;
199 }; 224 };
200 sdmmc1_cmd_pz1 { 225 sdmmc1_cmd_pz1 {
201 nvidia,pins = "sdmmc1_cmd_pz1", 226 nvidia,pins = "sdmmc1_cmd_pz1",
202 "sdmmc1_dat0_py7", 227 "sdmmc1_dat0_py7",
203 "sdmmc1_dat1_py6", 228 "sdmmc1_dat1_py6",
204 "sdmmc1_dat2_py5", 229 "sdmmc1_dat2_py5",
205 "sdmmc1_dat3_py4"; 230 "sdmmc1_dat3_py4";
206 nvidia,function = "sdmmc1"; 231 nvidia,function = "sdmmc1";
207 nvidia,pull = <TEGRA_PIN_PULL_UP>; 232 nvidia,pull = <TEGRA_PIN_PULL_UP>;
208 nvidia,tristate = <TEGRA_PIN_DISABLE>; 233 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -218,10 +243,10 @@
218 243
219 /* Apalis SPI1 */ 244 /* Apalis SPI1 */
220 spi1_sck_px5 { 245 spi1_sck_px5 {
221 nvidia,pins = "spi1_sck_px5", 246 nvidia,pins = "spi1_sck_px5",
222 "spi1_mosi_px4", 247 "spi1_mosi_px4",
223 "spi1_miso_px7", 248 "spi1_miso_px7",
224 "spi1_cs0_n_px6"; 249 "spi1_cs0_n_px6";
225 nvidia,function = "spi1"; 250 nvidia,function = "spi1";
226 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 251 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
227 nvidia,tristate = <TEGRA_PIN_DISABLE>; 252 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -229,10 +254,10 @@
229 254
230 /* Apalis SPI2 */ 255 /* Apalis SPI2 */
231 lcd_sck_pz4 { 256 lcd_sck_pz4 {
232 nvidia,pins = "lcd_sck_pz4", 257 nvidia,pins = "lcd_sck_pz4",
233 "lcd_sdout_pn5", 258 "lcd_sdout_pn5",
234 "lcd_sdin_pz2", 259 "lcd_sdin_pz2",
235 "lcd_cs0_n_pn4"; 260 "lcd_cs0_n_pn4";
236 nvidia,function = "spi5"; 261 nvidia,function = "spi5";
237 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 262 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
238 nvidia,tristate = <TEGRA_PIN_DISABLE>; 263 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -240,14 +265,14 @@
240 265
241 /* Apalis UART1 */ 266 /* Apalis UART1 */
242 ulpi_data0 { 267 ulpi_data0 {
243 nvidia,pins = "ulpi_data0_po1", 268 nvidia,pins = "ulpi_data0_po1",
244 "ulpi_data1_po2", 269 "ulpi_data1_po2",
245 "ulpi_data2_po3", 270 "ulpi_data2_po3",
246 "ulpi_data3_po4", 271 "ulpi_data3_po4",
247 "ulpi_data4_po5", 272 "ulpi_data4_po5",
248 "ulpi_data5_po6", 273 "ulpi_data5_po6",
249 "ulpi_data6_po7", 274 "ulpi_data6_po7",
250 "ulpi_data7_po0"; 275 "ulpi_data7_po0";
251 nvidia,function = "uarta"; 276 nvidia,function = "uarta";
252 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 277 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
253 nvidia,tristate = <TEGRA_PIN_DISABLE>; 278 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -255,10 +280,10 @@
255 280
256 /* Apalis UART2 */ 281 /* Apalis UART2 */
257 ulpi_clk_py0 { 282 ulpi_clk_py0 {
258 nvidia,pins = "ulpi_clk_py0", 283 nvidia,pins = "ulpi_clk_py0",
259 "ulpi_dir_py1", 284 "ulpi_dir_py1",
260 "ulpi_nxt_py2", 285 "ulpi_nxt_py2",
261 "ulpi_stp_py3"; 286 "ulpi_stp_py3";
262 nvidia,function = "uartd"; 287 nvidia,function = "uartd";
263 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 288 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
264 nvidia,tristate = <TEGRA_PIN_DISABLE>; 289 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -266,8 +291,8 @@
266 291
267 /* Apalis UART3 */ 292 /* Apalis UART3 */
268 uart2_rxd_pc3 { 293 uart2_rxd_pc3 {
269 nvidia,pins = "uart2_rxd_pc3", 294 nvidia,pins = "uart2_rxd_pc3",
270 "uart2_txd_pc2"; 295 "uart2_txd_pc2";
271 nvidia,function = "uartb"; 296 nvidia,function = "uartb";
272 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 297 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
273 nvidia,tristate = <TEGRA_PIN_DISABLE>; 298 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -275,8 +300,8 @@
275 300
276 /* Apalis UART4 */ 301 /* Apalis UART4 */
277 uart3_rxd_pw7 { 302 uart3_rxd_pw7 {
278 nvidia,pins = "uart3_rxd_pw7", 303 nvidia,pins = "uart3_rxd_pw7",
279 "uart3_txd_pw6"; 304 "uart3_txd_pw6";
280 nvidia,function = "uartc"; 305 nvidia,function = "uartc";
281 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 306 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
282 nvidia,tristate = <TEGRA_PIN_DISABLE>; 307 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -312,21 +337,21 @@
312 337
313 /* eMMC (On-module) */ 338 /* eMMC (On-module) */
314 sdmmc4_clk_pcc4 { 339 sdmmc4_clk_pcc4 {
315 nvidia,pins = "sdmmc4_clk_pcc4", 340 nvidia,pins = "sdmmc4_clk_pcc4",
316 "sdmmc4_rst_n_pcc3"; 341 "sdmmc4_rst_n_pcc3";
317 nvidia,function = "sdmmc4"; 342 nvidia,function = "sdmmc4";
318 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 343 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
319 nvidia,tristate = <TEGRA_PIN_DISABLE>; 344 nvidia,tristate = <TEGRA_PIN_DISABLE>;
320 }; 345 };
321 sdmmc4_dat0_paa0 { 346 sdmmc4_dat0_paa0 {
322 nvidia,pins = "sdmmc4_dat0_paa0", 347 nvidia,pins = "sdmmc4_dat0_paa0",
323 "sdmmc4_dat1_paa1", 348 "sdmmc4_dat1_paa1",
324 "sdmmc4_dat2_paa2", 349 "sdmmc4_dat2_paa2",
325 "sdmmc4_dat3_paa3", 350 "sdmmc4_dat3_paa3",
326 "sdmmc4_dat4_paa4", 351 "sdmmc4_dat4_paa4",
327 "sdmmc4_dat5_paa5", 352 "sdmmc4_dat5_paa5",
328 "sdmmc4_dat6_paa6", 353 "sdmmc4_dat6_paa6",
329 "sdmmc4_dat7_paa7"; 354 "sdmmc4_dat7_paa7";
330 nvidia,function = "sdmmc4"; 355 nvidia,function = "sdmmc4";
331 nvidia,pull = <TEGRA_PIN_PULL_UP>; 356 nvidia,pull = <TEGRA_PIN_PULL_UP>;
332 nvidia,tristate = <TEGRA_PIN_DISABLE>; 357 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -334,10 +359,10 @@
334 359
335 /* LVDS Transceiver Configuration */ 360 /* LVDS Transceiver Configuration */
336 pbb0 { 361 pbb0 {
337 nvidia,pins = "pbb0", 362 nvidia,pins = "pbb0",
338 "pbb7", 363 "pbb7",
339 "pcc1", 364 "pcc1",
340 "pcc2"; 365 "pcc2";
341 nvidia,function = "rsvd2"; 366 nvidia,function = "rsvd2";
342 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 367 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
343 nvidia,tristate = <TEGRA_PIN_DISABLE>; 368 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -345,10 +370,10 @@
345 nvidia,lock = <TEGRA_PIN_DISABLE>; 370 nvidia,lock = <TEGRA_PIN_DISABLE>;
346 }; 371 };
347 pbb3 { 372 pbb3 {
348 nvidia,pins = "pbb3", 373 nvidia,pins = "pbb3",
349 "pbb4", 374 "pbb4",
350 "pbb5", 375 "pbb5",
351 "pbb6"; 376 "pbb6";
352 nvidia,function = "displayb"; 377 nvidia,function = "displayb";
353 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 378 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
354 nvidia,tristate = <TEGRA_PIN_DISABLE>; 379 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -635,6 +660,7 @@
635 nvidia,sys-clock-req-active-high; 660 nvidia,sys-clock-req-active-high;
636 }; 661 };
637 662
663 /* eMMC */
638 sdhci@78000600 { 664 sdhci@78000600 {
639 status = "okay"; 665 status = "okay";
640 bus-width = <8>; 666 bus-width = <8>;
@@ -666,18 +692,40 @@
666 #address-cells = <1>; 692 #address-cells = <1>;
667 #size-cells = <0>; 693 #size-cells = <0>;
668 694
669 sys_3v3_reg: regulator@100 { 695 avdd_hdmi_pll_1v8_reg: regulator@100 {
670 compatible = "regulator-fixed"; 696 compatible = "regulator-fixed";
671 reg = <100>; 697 reg = <100>;
698 regulator-name = "+V1.8_AVDD_HDMI_PLL";
699 regulator-min-microvolt = <1800000>;
700 regulator-max-microvolt = <1800000>;
701 enable-active-high;
702 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
703 vin-supply = <&vio_reg>;
704 };
705
706 sys_3v3_reg: regulator@101 {
707 compatible = "regulator-fixed";
708 reg = <101>;
672 regulator-name = "3v3"; 709 regulator-name = "3v3";
673 regulator-min-microvolt = <3300000>; 710 regulator-min-microvolt = <3300000>;
674 regulator-max-microvolt = <3300000>; 711 regulator-max-microvolt = <3300000>;
675 regulator-always-on; 712 regulator-always-on;
676 }; 713 };
677 714
678 charge_pump_5v0_reg: regulator@101 { 715 avdd_hdmi_3v3_reg: regulator@102 {
679 compatible = "regulator-fixed"; 716 compatible = "regulator-fixed";
680 reg = <101>; 717 reg = <102>;
718 regulator-name = "+V3.3_AVDD_HDMI";
719 regulator-min-microvolt = <3300000>;
720 regulator-max-microvolt = <3300000>;
721 enable-active-high;
722 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
723 vin-supply = <&sys_3v3_reg>;
724 };
725
726 charge_pump_5v0_reg: regulator@103 {
727 compatible = "regulator-fixed";
728 reg = <103>;
681 regulator-name = "5v0"; 729 regulator-name = "5v0";
682 regulator-min-microvolt = <5000000>; 730 regulator-min-microvolt = <5000000>;
683 regulator-max-microvolt = <5000000>; 731 regulator-max-microvolt = <5000000>;
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 4d3ddc585641..3ff019f47d00 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -55,7 +55,7 @@
55 55
56 /* M41T0M6 real time clock on carrier board */ 56 /* M41T0M6 real time clock on carrier board */
57 rtc@68 { 57 rtc@68 {
58 compatible = "stm,m41t00"; 58 compatible = "st,m41t00";
59 reg = <0x68>; 59 reg = <0x68>;
60 }; 60 };
61 }; 61 };
@@ -84,6 +84,7 @@
84 }; 84 };
85 }; 85 };
86 86
87 /* SD/MMC */
87 sdhci@78000200 { 88 sdhci@78000200 {
88 status = "okay"; 89 status = "okay";
89 bus-width = <4>; 90 bus-width = <4>;
@@ -136,10 +137,10 @@
136 gpio-keys { 137 gpio-keys {
137 compatible = "gpio-keys"; 138 compatible = "gpio-keys";
138 139
139 power { 140 wakeup {
140 label = "Power"; 141 label = "SODIMM pin 45 wakeup";
141 gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; 142 gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
142 linux,code = <KEY_POWER>; 143 linux,code = <KEY_WAKEUP>;
143 debounce-interval = <10>; 144 debounce-interval = <10>;
144 gpio-key,wakeup; 145 gpio-key,wakeup;
145 }; 146 };
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index c4ed1bec4d92..2d8c58fd9357 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -2,8 +2,8 @@
2#include "tegra30.dtsi" 2#include "tegra30.dtsi"
3 3
4/* 4/*
5 * Toradex Colibri T30 Device Tree 5 * Toradex Colibri T30 Module Device Tree
6 * Compatible for Revisions 1.1B/1.1C/1.1D 6 * Compatible for Revisions V1.1B, V1.1C, V1.1D, V1.1E; IT: V1.1A
7 */ 7 */
8/ { 8/ {
9 model = "Toradex Colibri T30"; 9 model = "Toradex Colibri T30";
@@ -15,8 +15,8 @@
15 15
16 host1x@50000000 { 16 host1x@50000000 {
17 hdmi@54280000 { 17 hdmi@54280000 {
18 vdd-supply = <&sys_3v3_reg>; 18 vdd-supply = <&avdd_hdmi_3v3_reg>;
19 pll-supply = <&vio_reg>; 19 pll-supply = <&avdd_hdmi_pll_1v8_reg>;
20 20
21 nvidia,hpd-gpio = 21 nvidia,hpd-gpio =
22 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; 22 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
@@ -39,7 +39,7 @@
39 39
40 /* Colibri Backlight PWM<A> */ 40 /* Colibri Backlight PWM<A> */
41 sdmmc3_dat3_pb4 { 41 sdmmc3_dat3_pb4 {
42 nvidia,pins = "sdmmc3_dat3_pb4"; 42 nvidia,pins = "sdmmc3_dat3_pb4";
43 nvidia,function = "pwm0"; 43 nvidia,function = "pwm0";
44 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 44 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
45 nvidia,tristate = <TEGRA_PIN_DISABLE>; 45 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -66,15 +66,6 @@
66 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 66 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
67 }; 67 };
68 68
69 /* Thermal alert, need to be disabled */
70 lcd_dc1_pd2 {
71 nvidia,pins = "lcd_dc1_pd2";
72 nvidia,function = "rsvd3";
73 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
74 nvidia,tristate = <TEGRA_PIN_DISABLE>;
75 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
76 };
77
78 /* Colibri MMC */ 69 /* Colibri MMC */
79 kb_row10_ps2 { 70 kb_row10_ps2 {
80 nvidia,pins = "kb_row10_ps2"; 71 nvidia,pins = "kb_row10_ps2";
@@ -83,11 +74,11 @@
83 nvidia,tristate = <TEGRA_PIN_DISABLE>; 74 nvidia,tristate = <TEGRA_PIN_DISABLE>;
84 }; 75 };
85 kb_row11_ps3 { 76 kb_row11_ps3 {
86 nvidia,pins = "kb_row11_ps3", 77 nvidia,pins = "kb_row11_ps3",
87 "kb_row12_ps4", 78 "kb_row12_ps4",
88 "kb_row13_ps5", 79 "kb_row13_ps5",
89 "kb_row14_ps6", 80 "kb_row14_ps6",
90 "kb_row15_ps7"; 81 "kb_row15_ps7";
91 nvidia,function = "sdmmc2"; 82 nvidia,function = "sdmmc2";
92 nvidia,pull = <TEGRA_PIN_PULL_UP>; 83 nvidia,pull = <TEGRA_PIN_PULL_UP>;
93 nvidia,tristate = <TEGRA_PIN_DISABLE>; 84 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -95,17 +86,17 @@
95 86
96 /* Colibri SSP */ 87 /* Colibri SSP */
97 ulpi_clk_py0 { 88 ulpi_clk_py0 {
98 nvidia,pins = "ulpi_clk_py0", 89 nvidia,pins = "ulpi_clk_py0",
99 "ulpi_dir_py1", 90 "ulpi_dir_py1",
100 "ulpi_nxt_py2", 91 "ulpi_nxt_py2",
101 "ulpi_stp_py3"; 92 "ulpi_stp_py3";
102 nvidia,function = "spi1"; 93 nvidia,function = "spi1";
103 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 94 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
104 nvidia,tristate = <TEGRA_PIN_DISABLE>; 95 nvidia,tristate = <TEGRA_PIN_DISABLE>;
105 }; 96 };
106 sdmmc3_dat6_pd3 { 97 sdmmc3_dat6_pd3 {
107 nvidia,pins = "sdmmc3_dat6_pd3", 98 nvidia,pins = "sdmmc3_dat6_pd3",
108 "sdmmc3_dat7_pd4"; 99 "sdmmc3_dat7_pd4";
109 nvidia,function = "spdif"; 100 nvidia,function = "spdif";
110 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 101 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
111 nvidia,tristate = <TEGRA_PIN_ENABLE>; 102 nvidia,tristate = <TEGRA_PIN_ENABLE>;
@@ -113,14 +104,14 @@
113 104
114 /* Colibri UART_A */ 105 /* Colibri UART_A */
115 ulpi_data0 { 106 ulpi_data0 {
116 nvidia,pins = "ulpi_data0_po1", 107 nvidia,pins = "ulpi_data0_po1",
117 "ulpi_data1_po2", 108 "ulpi_data1_po2",
118 "ulpi_data2_po3", 109 "ulpi_data2_po3",
119 "ulpi_data3_po4", 110 "ulpi_data3_po4",
120 "ulpi_data4_po5", 111 "ulpi_data4_po5",
121 "ulpi_data5_po6", 112 "ulpi_data5_po6",
122 "ulpi_data6_po7", 113 "ulpi_data6_po7",
123 "ulpi_data7_po0"; 114 "ulpi_data7_po0";
124 nvidia,function = "uarta"; 115 nvidia,function = "uarta";
125 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 116 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
126 nvidia,tristate = <TEGRA_PIN_DISABLE>; 117 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -128,10 +119,10 @@
128 119
129 /* Colibri UART_B */ 120 /* Colibri UART_B */
130 gmi_a16_pj7 { 121 gmi_a16_pj7 {
131 nvidia,pins = "gmi_a16_pj7", 122 nvidia,pins = "gmi_a16_pj7",
132 "gmi_a17_pb0", 123 "gmi_a17_pb0",
133 "gmi_a18_pb1", 124 "gmi_a18_pb1",
134 "gmi_a19_pk7"; 125 "gmi_a19_pk7";
135 nvidia,function = "uartd"; 126 nvidia,function = "uartd";
136 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 127 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
137 nvidia,tristate = <TEGRA_PIN_DISABLE>; 128 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -139,8 +130,8 @@
139 130
140 /* Colibri UART_C */ 131 /* Colibri UART_C */
141 uart2_rxd { 132 uart2_rxd {
142 nvidia,pins = "uart2_rxd_pc3", 133 nvidia,pins = "uart2_rxd_pc3",
143 "uart2_txd_pc2"; 134 "uart2_txd_pc2";
144 nvidia,function = "uartb"; 135 nvidia,function = "uartb";
145 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 136 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
146 nvidia,tristate = <TEGRA_PIN_DISABLE>; 137 nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -148,25 +139,59 @@
148 139
149 /* eMMC */ 140 /* eMMC */
150 sdmmc4_clk_pcc4 { 141 sdmmc4_clk_pcc4 {
151 nvidia,pins = "sdmmc4_clk_pcc4", 142 nvidia,pins = "sdmmc4_clk_pcc4",
152 "sdmmc4_rst_n_pcc3"; 143 "sdmmc4_rst_n_pcc3";
153 nvidia,function = "sdmmc4"; 144 nvidia,function = "sdmmc4";
154 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 145 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
155 nvidia,tristate = <TEGRA_PIN_DISABLE>; 146 nvidia,tristate = <TEGRA_PIN_DISABLE>;
156 }; 147 };
157 sdmmc4_dat0_paa0 { 148 sdmmc4_dat0_paa0 {
158 nvidia,pins = "sdmmc4_dat0_paa0", 149 nvidia,pins = "sdmmc4_dat0_paa0",
159 "sdmmc4_dat1_paa1", 150 "sdmmc4_dat1_paa1",
160 "sdmmc4_dat2_paa2", 151 "sdmmc4_dat2_paa2",
161 "sdmmc4_dat3_paa3", 152 "sdmmc4_dat3_paa3",
162 "sdmmc4_dat4_paa4", 153 "sdmmc4_dat4_paa4",
163 "sdmmc4_dat5_paa5", 154 "sdmmc4_dat5_paa5",
164 "sdmmc4_dat6_paa6", 155 "sdmmc4_dat6_paa6",
165 "sdmmc4_dat7_paa7"; 156 "sdmmc4_dat7_paa7";
166 nvidia,function = "sdmmc4"; 157 nvidia,function = "sdmmc4";
167 nvidia,pull = <TEGRA_PIN_PULL_UP>; 158 nvidia,pull = <TEGRA_PIN_PULL_UP>;
168 nvidia,tristate = <TEGRA_PIN_DISABLE>; 159 nvidia,tristate = <TEGRA_PIN_DISABLE>;
169 }; 160 };
161
162 /* Power I2C (On-module) */
163 pwr_i2c_scl_pz6 {
164 nvidia,pins = "pwr_i2c_scl_pz6",
165 "pwr_i2c_sda_pz7";
166 nvidia,function = "i2cpwr";
167 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
168 nvidia,tristate = <TEGRA_PIN_DISABLE>;
169 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
170 nvidia,lock = <TEGRA_PIN_DISABLE>;
171 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
172 };
173
174 /*
175 * THERMD_ALERT#, unlatched I2C address pin of LM95245
176 * temperature sensor therefore requires disabling for
177 * now
178 */
179 lcd_dc1_pd2 {
180 nvidia,pins = "lcd_dc1_pd2";
181 nvidia,function = "rsvd3";
182 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
183 nvidia,tristate = <TEGRA_PIN_DISABLE>;
184 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
185 };
186
187 /* TOUCH_PEN_INT# */
188 pv0 {
189 nvidia,pins = "pv0";
190 nvidia,function = "rsvd1";
191 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
192 nvidia,tristate = <TEGRA_PIN_DISABLE>;
193 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
194 };
170 }; 195 };
171 }; 196 };
172 197
@@ -236,7 +261,7 @@
236 /* 261 /*
237 * EN_+V3.3 switching via FET: 262 * EN_+V3.3 switching via FET:
238 * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN 263 * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
239 * see also v3_3 fixed supply 264 * see also 3v3 fixed supply
240 */ 265 */
241 ldo2_reg: ldo2 { 266 ldo2_reg: ldo2 {
242 regulator-name = "en_3v3"; 267 regulator-name = "en_3v3";
@@ -295,6 +320,46 @@
295 }; 320 };
296 }; 321 };
297 322
323 /* STMPE811 touch screen controller */
324 stmpe811@41 {
325 compatible = "st,stmpe811";
326 #address-cells = <1>;
327 #size-cells = <0>;
328 reg = <0x41>;
329 interrupts = <TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
330 interrupt-parent = <&gpio>;
331 interrupt-controller;
332 id = <0>;
333 blocks = <0x5>;
334 irq-trigger = <0x1>;
335
336 stmpe_touchscreen {
337 compatible = "st,stmpe-ts";
338 reg = <0>;
339 /* 3.25 MHz ADC clock speed */
340 st,adc-freq = <1>;
341 /* 8 sample average control */
342 st,ave-ctrl = <3>;
343 /* 7 length fractional part in z */
344 st,fraction-z = <7>;
345 /*
346 * 50 mA typical 80 mA max touchscreen drivers
347 * current limit value
348 */
349 st,i-drive = <1>;
350 /* 12-bit ADC */
351 st,mod-12b = <1>;
352 /* internal ADC reference */
353 st,ref-sel = <0>;
354 /* ADC converstion time: 80 clocks */
355 st,sample-time = <4>;
356 /* 1 ms panel driver settling time */
357 st,settling = <3>;
358 /* 5 ms touch detect interrupt delay */
359 st,touch-det-delay = <5>;
360 };
361 };
362
298 /* 363 /*
299 * LM95245 temperature sensor 364 * LM95245 temperature sensor
300 * Note: OVERT_N directly connected to PMIC PWRDN 365 * Note: OVERT_N directly connected to PMIC PWRDN
@@ -331,7 +396,8 @@
331 nvidia,sys-clock-req-active-high; 396 nvidia,sys-clock-req-active-high;
332 }; 397 };
333 398
334 emmc: sdhci@78000600 { 399 /* eMMC */
400 sdhci@78000600 {
335 status = "okay"; 401 status = "okay";
336 bus-width = <8>; 402 bus-width = <8>;
337 non-removable; 403 non-removable;
@@ -365,18 +431,40 @@
365 #address-cells = <1>; 431 #address-cells = <1>;
366 #size-cells = <0>; 432 #size-cells = <0>;
367 433
368 sys_3v3_reg: regulator@100 { 434 avdd_hdmi_pll_1v8_reg: regulator@100 {
369 compatible = "regulator-fixed"; 435 compatible = "regulator-fixed";
370 reg = <100>; 436 reg = <100>;
437 regulator-name = "+V1.8_AVDD_HDMI_PLL";
438 regulator-min-microvolt = <1800000>;
439 regulator-max-microvolt = <1800000>;
440 enable-active-high;
441 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
442 vin-supply = <&vio_reg>;
443 };
444
445 sys_3v3_reg: regulator@101 {
446 compatible = "regulator-fixed";
447 reg = <101>;
371 regulator-name = "3v3"; 448 regulator-name = "3v3";
372 regulator-min-microvolt = <3300000>; 449 regulator-min-microvolt = <3300000>;
373 regulator-max-microvolt = <3300000>; 450 regulator-max-microvolt = <3300000>;
374 regulator-always-on; 451 regulator-always-on;
375 }; 452 };
376 453
377 charge_pump_5v0_reg: regulator@101 { 454 avdd_hdmi_3v3_reg: regulator@102 {
378 compatible = "regulator-fixed"; 455 compatible = "regulator-fixed";
379 reg = <101>; 456 reg = <102>;
457 regulator-name = "+V3.3_AVDD_HDMI";
458 regulator-min-microvolt = <3300000>;
459 regulator-max-microvolt = <3300000>;
460 enable-active-high;
461 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
462 vin-supply = <&sys_3v3_reg>;
463 };
464
465 charge_pump_5v0_reg: regulator@103 {
466 compatible = "regulator-fixed";
467 reg = <103>;
380 regulator-name = "5v0"; 468 regulator-name = "5v0";
381 regulator-min-microvolt = <5000000>; 469 regulator-min-microvolt = <5000000>;
382 regulator-max-microvolt = <5000000>; 470 regulator-max-microvolt = <5000000>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index fe04fb5e155f..38e1e276bafc 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -42,8 +42,8 @@
42 <&tegra_car TEGRA30_CLK_CML0>; 42 <&tegra_car TEGRA30_CLK_CML0>;
43 clock-names = "pex", "afi", "pll_e", "cml"; 43 clock-names = "pex", "afi", "pll_e", "cml";
44 resets = <&tegra_car 70>, 44 resets = <&tegra_car 70>,
45 <&tegra_car 72>, 45 <&tegra_car 72>,
46 <&tegra_car 74>; 46 <&tegra_car 74>;
47 reset-names = "pex", "afi", "pcie_x"; 47 reset-names = "pex", "afi", "pcie_x";
48 status = "disabled"; 48 status = "disabled";
49 49
@@ -153,7 +153,7 @@
153 &tegra_car TEGRA30_CLK_GR3D2>; 153 &tegra_car TEGRA30_CLK_GR3D2>;
154 clock-names = "3d", "3d2"; 154 clock-names = "3d", "3d2";
155 resets = <&tegra_car 24>, 155 resets = <&tegra_car 24>,
156 <&tegra_car 98>; 156 <&tegra_car 98>;
157 reset-names = "3d", "3d2"; 157 reset-names = "3d", "3d2";
158 }; 158 };
159 159
@@ -455,7 +455,7 @@
455 }; 455 };
456 456
457 i2c@7000c000 { 457 i2c@7000c000 {
458 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; 458 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
459 reg = <0x7000c000 0x100>; 459 reg = <0x7000c000 0x100>;
460 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 460 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
461 #address-cells = <1>; 461 #address-cells = <1>;
@@ -660,7 +660,7 @@
660 reg = <0x70030000 0x10000>; 660 reg = <0x70030000 0x10000>;
661 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 661 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
662 clocks = <&tegra_car TEGRA30_CLK_HDA>, 662 clocks = <&tegra_car TEGRA30_CLK_HDA>,
663 <&tegra_car TEGRA30_CLK_HDA2HDMI>, 663 <&tegra_car TEGRA30_CLK_HDA2HDMI>,
664 <&tegra_car TEGRA30_CLK_HDA2CODEC_2X>; 664 <&tegra_car TEGRA30_CLK_HDA2CODEC_2X>;
665 clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 665 clock-names = "hda", "hda2hdmi", "hda2codec_2x";
666 resets = <&tegra_car 125>, /* hda */ 666 resets = <&tegra_car 125>, /* hda */
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
index bfd3bb8c8285..f1e9d40149ab 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
@@ -57,8 +57,7 @@
57 }; 57 };
58 58
59 chosen { 59 chosen {
60 bootargs = "console=ttyS0,115200"; 60 stdout-path = "serial0:115200n8";
61 stdout-path = &serial0;
62 }; 61 };
63 62
64 aliases { 63 aliases {
@@ -74,12 +73,11 @@
74}; 73};
75 74
76&extbus { 75&extbus {
77 ranges = <0 0x00000000 0x0f000000 0x01000000 76 ranges = <1 0x00000000 0x42000000 0x02000000>;
78 1 0x00000000 0x00000000 0x08000000>;
79}; 77};
80 78
81&support_card { 79&support_card {
82 ranges = <0x00000000 1 0x03f00000 0x00100000>; 80 ranges = <0x00000000 1 0x01f00000 0x00100000>;
83}; 81};
84 82
85&ethsc { 83&ethsc {
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
index 33963acd7e8f..2e36b26f2762 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
@@ -57,8 +57,7 @@
57 }; 57 };
58 58
59 chosen { 59 chosen {
60 bootargs = "console=ttyS0,115200"; 60 stdout-path = "serial0:115200n8";
61 stdout-path = &serial0;
62 }; 61 };
63 62
64 aliases { 63 aliases {
@@ -76,12 +75,11 @@
76}; 75};
77 76
78&extbus { 77&extbus {
79 ranges = <0 0x00000000 0x0f000000 0x01000000 78 ranges = <1 0x00000000 0x42000000 0x02000000>;
80 1 0x00000000 0x00000000 0x08000000>;
81}; 79};
82 80
83&support_card { 81&support_card {
84 ranges = <0x00000000 1 0x03f00000 0x00100000>; 82 ranges = <0x00000000 1 0x01f00000 0x00100000>;
85}; 83};
86 84
87&ethsc { 85&ethsc {
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
index 69a5b7d39629..24626687d4df 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
@@ -57,8 +57,7 @@
57 }; 57 };
58 58
59 chosen { 59 chosen {
60 bootargs = "console=ttyS0,115200"; 60 stdout-path = "serial0:115200n8";
61 stdout-path = &serial0;
62 }; 61 };
63 62
64 aliases { 63 aliases {
@@ -76,12 +75,11 @@
76}; 75};
77 76
78&extbus { 77&extbus {
79 ranges = <0 0x00000000 0x0f000000 0x01000000 78 ranges = <1 0x00000000 0x42000000 0x02000000>;
80 1 0x00000000 0x00000000 0x08000000>;
81}; 79};
82 80
83&support_card { 81&support_card {
84 ranges = <0x00000000 1 0x03f00000 0x00100000>; 82 ranges = <0x00000000 1 0x01f00000 0x00100000>;
85}; 83};
86 84
87&ethsc { 85&ethsc {
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
index 1a440f87fa92..b7a032156789 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
@@ -58,8 +58,7 @@
58 }; 58 };
59 59
60 chosen { 60 chosen {
61 bootargs = "console=ttyS0,115200"; 61 stdout-path = "serial0:115200n8";
62 stdout-path = &serial0;
63 }; 62 };
64 63
65 aliases { 64 aliases {
@@ -75,12 +74,11 @@
75}; 74};
76 75
77&extbus { 76&extbus {
78 ranges = <0 0x00000000 0x0f000000 0x01000000 77 ranges = <1 0x00000000 0x42000000 0x02000000>;
79 1 0x00000000 0x00000000 0x08000000>;
80}; 78};
81 79
82&support_card { 80&support_card {
83 ranges = <0x00000000 1 0x03f00000 0x00100000>; 81 ranges = <0x00000000 1 0x01f00000 0x00100000>;
84}; 82};
85 83
86&ethsc { 84&ethsc {
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
index 955d417a5c42..fc7250c61674 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
@@ -57,8 +57,7 @@
57 }; 57 };
58 58
59 chosen { 59 chosen {
60 bootargs = "console=ttyS0,115200"; 60 stdout-path = "serial0:115200n8";
61 stdout-path = &serial0;
62 }; 61 };
63 62
64 aliases { 63 aliases {
@@ -74,12 +73,11 @@
74}; 73};
75 74
76&extbus { 75&extbus {
77 ranges = <0 0x00000000 0x0f000000 0x01000000 76 ranges = <1 0x00000000 0x42000000 0x02000000>;
78 1 0x00000000 0x00000000 0x08000000>;
79}; 77};
80 78
81&support_card { 79&support_card {
82 ranges = <0x00000000 1 0x03f00000 0x00100000>; 80 ranges = <0x00000000 1 0x01f00000 0x00100000>;
83}; 81};
84 82
85&ethsc { 83&ethsc {
diff --git a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
new file mode 100644
index 000000000000..9d7ec5c204dd
--- /dev/null
+++ b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
@@ -0,0 +1,78 @@
1/*
2 * Device Tree Source for UniPhier ProXstream2 Gentil Board
3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/dts-v1/;
46/include/ "uniphier-proxstream2.dtsi"
47
48/ {
49 model = "UniPhier ProXstream2 Gentil Board";
50 compatible = "socionext,proxstream2-gentil", "socionext,proxstream2";
51
52 memory {
53 device_type = "memory";
54 reg = <0x80000000 0x80000000>;
55 };
56
57 chosen {
58 stdout-path = "serial2:115200n8";
59 };
60
61 aliases {
62 serial0 = &serial0;
63 serial1 = &serial1;
64 serial2 = &serial2;
65 i2c0 = &i2c0;
66 i2c4 = &i2c4;
67 i2c5 = &i2c5;
68 i2c6 = &i2c6;
69 };
70};
71
72&serial2 {
73 status = "okay";
74};
75
76&i2c0 {
77 status = "okay";
78};
diff --git a/arch/arm/boot/dts/uniphier-proxstream2-vodka.dts b/arch/arm/boot/dts/uniphier-proxstream2-vodka.dts
new file mode 100644
index 000000000000..498acac3d95d
--- /dev/null
+++ b/arch/arm/boot/dts/uniphier-proxstream2-vodka.dts
@@ -0,0 +1,78 @@
1/*
2 * Device Tree Source for UniPhier ProXstream2 Vodka Board
3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/dts-v1/;
46/include/ "uniphier-proxstream2.dtsi"
47
48/ {
49 model = "UniPhier ProXstream2 Vodka Board";
50 compatible = "socionext,proxstream2-vodka", "socionext,proxstream2";
51
52 memory {
53 device_type = "memory";
54 reg = <0x80000000 0x80000000>;
55 };
56
57 chosen {
58 stdout-path = "serial2:115200n8";
59 };
60
61 aliases {
62 serial0 = &serial0;
63 serial1 = &serial1;
64 serial2 = &serial2;
65 i2c0 = &i2c0;
66 i2c4 = &i2c4;
67 i2c5 = &i2c5;
68 i2c6 = &i2c6;
69 };
70};
71
72&serial2 {
73 status = "okay";
74};
75
76&i2c0 {
77 status = "okay";
78};
diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi
index 68ca125b56ea..e5949b934945 100644
--- a/arch/arm/boot/dts/vf-colibri.dtsi
+++ b/arch/arm/boot/dts/vf-colibri.dtsi
@@ -52,6 +52,26 @@
52 pinctrl-0 = <&pinctrl_i2c0>; 52 pinctrl-0 = <&pinctrl_i2c0>;
53}; 53};
54 54
55&nfc {
56 assigned-clocks = <&clks VF610_CLK_NFC>;
57 assigned-clock-rates = <33000000>;
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_nfc>;
60 status = "okay";
61
62 nand@0 {
63 compatible = "fsl,vf610-nfc-nandcs";
64 reg = <0>;
65 #address-cells = <1>;
66 #size-cells = <1>;
67 nand-bus-width = <8>;
68 nand-ecc-mode = "hw";
69 nand-ecc-strength = <32>;
70 nand-ecc-step-size = <2048>;
71 nand-on-flash-bbt;
72 };
73};
74
55&pwm0 { 75&pwm0 {
56 pinctrl-names = "default"; 76 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_pwm0>; 77 pinctrl-0 = <&pinctrl_pwm0>;
@@ -156,6 +176,25 @@
156 >; 176 >;
157 }; 177 };
158 178
179 pinctrl_nfc: nfcgrp {
180 fsl,pins = <
181 VF610_PAD_PTD23__NF_IO7 0x28df
182 VF610_PAD_PTD22__NF_IO6 0x28df
183 VF610_PAD_PTD21__NF_IO5 0x28df
184 VF610_PAD_PTD20__NF_IO4 0x28df
185 VF610_PAD_PTD19__NF_IO3 0x28df
186 VF610_PAD_PTD18__NF_IO2 0x28df
187 VF610_PAD_PTD17__NF_IO1 0x28df
188 VF610_PAD_PTD16__NF_IO0 0x28df
189 VF610_PAD_PTB24__NF_WE_B 0x28c2
190 VF610_PAD_PTB25__NF_CE0_B 0x28c2
191 VF610_PAD_PTB27__NF_RE_B 0x28c2
192 VF610_PAD_PTC26__NF_RB_B 0x283d
193 VF610_PAD_PTC27__NF_ALE 0x28c2
194 VF610_PAD_PTC28__NF_CLE 0x28c2
195 >;
196 };
197
159 pinctrl_pwm0: pwm0grp { 198 pinctrl_pwm0: pwm0grp {
160 fsl,pins = < 199 fsl,pins = <
161 VF610_PAD_PTB0__FTM0_CH0 0x1182 200 VF610_PAD_PTB0__FTM0_CH0 0x1182
diff --git a/arch/arm/boot/dts/vf500-colibri-eval-v3.dts b/arch/arm/boot/dts/vf500-colibri-eval-v3.dts
index 7fc782c4fc52..c3173fc9e833 100644
--- a/arch/arm/boot/dts/vf500-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/vf500-colibri-eval-v3.dts
@@ -15,3 +15,8 @@
15 model = "Toradex Colibri VF50 on Colibri Evaluation Board"; 15 model = "Toradex Colibri VF50 on Colibri Evaluation Board";
16 compatible = "toradex,vf500-colibri_vf50-on-eval", "toradex,vf500-colibri_vf50", "fsl,vf500"; 16 compatible = "toradex,vf500-colibri_vf50-on-eval", "toradex,vf500-colibri_vf50", "fsl,vf500";
17}; 17};
18
19&touchscreen {
20 vf50-ts-min-pressure = <200>;
21 status = "okay";
22};
diff --git a/arch/arm/boot/dts/vf500-colibri.dtsi b/arch/arm/boot/dts/vf500-colibri.dtsi
index cee34a32f25b..84f091d1fcf2 100644
--- a/arch/arm/boot/dts/vf500-colibri.dtsi
+++ b/arch/arm/boot/dts/vf500-colibri.dtsi
@@ -17,4 +17,51 @@
17 memory { 17 memory {
18 reg = <0x80000000 0x8000000>; 18 reg = <0x80000000 0x8000000>;
19 }; 19 };
20
21 touchscreen: vf50-touchscreen {
22 compatible = "toradex,vf50-touchscreen";
23 io-channels = <&adc1 0>,<&adc0 0>,
24 <&adc0 1>,<&adc1 2>;
25 xp-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
26 xm-gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
27 yp-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
28 ym-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
29 interrupt-parent = <&gpio0>;
30 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
31 pinctrl-names = "idle","default","gpios";
32 pinctrl-0 = <&pinctrl_touchctrl_idle>;
33 pinctrl-1 = <&pinctrl_touchctrl_default>;
34 pinctrl-2 = <&pinctrl_touchctrl_gpios>;
35 vf50-ts-min-pressure = <200>;
36 status = "disabled";
37 };
38};
39
40&iomuxc {
41 vf610-colibri {
42 pinctrl_touchctrl_idle: touchctrl_idle {
43 fsl,pins = <
44 VF610_PAD_PTA18__GPIO_8 0x006d
45 VF610_PAD_PTA19__GPIO_9 0x006c
46 >;
47 };
48
49 pinctrl_touchctrl_default: touchctrl_default {
50 fsl,pins = <
51 VF610_PAD_PTA18__ADC0_SE0 0x0040
52 VF610_PAD_PTA19__ADC0_SE1 0x0040
53 VF610_PAD_PTA16__ADC1_SE0 0x0040
54 VF610_PAD_PTB2__ADC1_SE2 0x0040
55 >;
56 };
57
58 pinctrl_touchctrl_gpios: touchctrl_gpios {
59 fsl,pins = <
60 VF610_PAD_PTA23__GPIO_13 0x22e9
61 VF610_PAD_PTB23__GPIO_93 0x22e9
62 VF610_PAD_PTA22__GPIO_12 0x22e9
63 VF610_PAD_PTA11__GPIO_4 0x22e9
64 >;
65 };
66 };
20}; 67};
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index 375ab23ca743..5438ee4be2ec 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -237,6 +237,33 @@
237 >; 237 >;
238 }; 238 };
239 239
240 pinctrl_nfc: nfcgrp {
241 fsl,pins = <
242 VF610_PAD_PTD31__NF_IO15 0x28df
243 VF610_PAD_PTD30__NF_IO14 0x28df
244 VF610_PAD_PTD29__NF_IO13 0x28df
245 VF610_PAD_PTD28__NF_IO12 0x28df
246 VF610_PAD_PTD27__NF_IO11 0x28df
247 VF610_PAD_PTD26__NF_IO10 0x28df
248 VF610_PAD_PTD25__NF_IO9 0x28df
249 VF610_PAD_PTD24__NF_IO8 0x28df
250 VF610_PAD_PTD23__NF_IO7 0x28df
251 VF610_PAD_PTD22__NF_IO6 0x28df
252 VF610_PAD_PTD21__NF_IO5 0x28df
253 VF610_PAD_PTD20__NF_IO4 0x28df
254 VF610_PAD_PTD19__NF_IO3 0x28df
255 VF610_PAD_PTD18__NF_IO2 0x28df
256 VF610_PAD_PTD17__NF_IO1 0x28df
257 VF610_PAD_PTD16__NF_IO0 0x28df
258 VF610_PAD_PTB24__NF_WE_B 0x28c2
259 VF610_PAD_PTB25__NF_CE0_B 0x28c2
260 VF610_PAD_PTB27__NF_RE_B 0x28c2
261 VF610_PAD_PTC26__NF_RB_B 0x283d
262 VF610_PAD_PTC27__NF_ALE 0x28c2
263 VF610_PAD_PTC28__NF_CLE 0x28c2
264 >;
265 };
266
240 pinctrl_pwm0: pwm0grp { 267 pinctrl_pwm0: pwm0grp {
241 fsl,pins = < 268 fsl,pins = <
242 VF610_PAD_PTB0__FTM0_CH0 0x1582 269 VF610_PAD_PTB0__FTM0_CH0 0x1582
@@ -274,6 +301,26 @@
274 }; 301 };
275}; 302};
276 303
304&nfc {
305 assigned-clocks = <&clks VF610_CLK_NFC>;
306 assigned-clock-rates = <33000000>;
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_nfc>;
309 status = "okay";
310
311 nand@0 {
312 compatible = "fsl,vf610-nfc-nandcs";
313 reg = <0>;
314 #address-cells = <1>;
315 #size-cells = <1>;
316 nand-bus-width = <16>;
317 nand-ecc-mode = "hw";
318 nand-ecc-strength = <24>;
319 nand-ecc-step-size = <2048>;
320 nand-on-flash-bbt;
321 };
322};
323
277&pwm0 { 324&pwm0 {
278 pinctrl-names = "default"; 325 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_pwm0>; 326 pinctrl-0 = <&pinctrl_pwm0>;
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index 6865137fd114..6736bae43a5b 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -564,6 +564,17 @@
564 status = "disabled"; 564 status = "disabled";
565 }; 565 };
566 566
567 nfc: nand@400e0000 {
568 #address-cells = <1>;
569 #size-cells = <0>;
570 compatible = "fsl,vf610-nfc";
571 reg = <0x400e0000 0x4000>;
572 interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
573 clocks = <&clks VF610_CLK_NFC>;
574 clock-names = "nfc";
575 status = "disabled";
576 };
577
567 i2c2: i2c@400e6000 { 578 i2c2: i2c@400e6000 {
568 #address-cells = <1>; 579 #address-cells = <1>;
569 #size-cells = <0>; 580 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/wm8750.dtsi b/arch/arm/boot/dts/wm8750.dtsi
index 557a9c2ace49..46d076d7302b 100644
--- a/arch/arm/boot/dts/wm8750.dtsi
+++ b/arch/arm/boot/dts/wm8750.dtsi
@@ -17,7 +17,7 @@
17 17
18 cpu { 18 cpu {
19 device_type = "cpu"; 19 device_type = "cpu";
20 compatible = "arm,arm1176ej-s"; 20 compatible = "arm,arm1176jzf";
21 }; 21 };
22 }; 22 };
23 23
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 96dabcb6c621..996aed3b4eee 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -95,7 +95,7 @@ void it8152_init_irq(void)
95 } 95 }
96} 96}
97 97
98void it8152_irq_demux(unsigned int irq, struct irq_desc *desc) 98void it8152_irq_demux(struct irq_desc *desc)
99{ 99{
100 int bits_pd, bits_lp, bits_ld; 100 int bits_pd, bits_lp, bits_ld;
101 int i; 101 int i;
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 304adea4bc52..0e97b4b871f9 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -138,7 +138,7 @@ static struct locomo_dev_info locomo_devices[] = {
138 }, 138 },
139}; 139};
140 140
141static void locomo_handler(unsigned int __irq, struct irq_desc *desc) 141static void locomo_handler(struct irq_desc *desc)
142{ 142{
143 struct locomo *lchip = irq_desc_get_chip_data(desc); 143 struct locomo *lchip = irq_desc_get_chip_data(desc);
144 int req, i; 144 int req, i;
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 4f290250fa93..3d224941b541 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -196,10 +196,8 @@ static struct sa1111_dev_info sa1111_devices[] = {
196 * active IRQs causes the interrupt output to pulse, the upper levels 196 * active IRQs causes the interrupt output to pulse, the upper levels
197 * will call us again if there are more interrupts to process. 197 * will call us again if there are more interrupts to process.
198 */ 198 */
199static void 199static void sa1111_irq_handler(struct irq_desc *desc)
200sa1111_irq_handler(unsigned int __irq, struct irq_desc *desc)
201{ 200{
202 unsigned int irq = irq_desc_get_irq(desc);
203 unsigned int stat0, stat1, i; 201 unsigned int stat0, stat1, i;
204 struct sa1111 *sachip = irq_desc_get_handler_data(desc); 202 struct sa1111 *sachip = irq_desc_get_handler_data(desc);
205 void __iomem *mapbase = sachip->base + SA1111_INTC; 203 void __iomem *mapbase = sachip->base + SA1111_INTC;
@@ -214,7 +212,7 @@ sa1111_irq_handler(unsigned int __irq, struct irq_desc *desc)
214 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); 212 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
215 213
216 if (stat0 == 0 && stat1 == 0) { 214 if (stat0 == 0 && stat1 == 0) {
217 do_bad_IRQ(irq, desc); 215 do_bad_IRQ(desc);
218 return; 216 return;
219 } 217 }
220 218
diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
deleted file mode 100644
index 3125e00f05ab..000000000000
--- a/arch/arm/configs/bockw_defconfig
+++ /dev/null
@@ -1,133 +0,0 @@
1# CONFIG_ARM_PATCH_PHYS_VIRT is not set
2CONFIG_KERNEL_LZMA=y
3CONFIG_NO_HZ=y
4CONFIG_IKCONFIG=y
5CONFIG_IKCONFIG_PROC=y
6CONFIG_LOG_BUF_SHIFT=16
7CONFIG_SYSCTL_SYSCALL=y
8CONFIG_EMBEDDED=y
9CONFIG_SLAB=y
10# CONFIG_IOSCHED_CFQ is not set
11CONFIG_ARCH_SHMOBILE_LEGACY=y
12CONFIG_ARCH_R8A7778=y
13CONFIG_MACH_BOCKW=y
14CONFIG_MEMORY_START=0x60000000
15CONFIG_MEMORY_SIZE=0x10000000
16CONFIG_SHMOBILE_TIMER_HZ=1024
17# CONFIG_SH_TIMER_CMT is not set
18# CONFIG_EM_TIMER_STI is not set
19CONFIG_ARM_ERRATA_430973=y
20CONFIG_ARM_ERRATA_458693=y
21CONFIG_ARM_ERRATA_460075=y
22CONFIG_ARM_ERRATA_743622=y
23CONFIG_ARM_ERRATA_754322=y
24CONFIG_AEABI=y
25# CONFIG_OABI_COMPAT is not set
26CONFIG_HIGHMEM=y
27CONFIG_ZBOOT_ROM_TEXT=0x0
28CONFIG_ZBOOT_ROM_BSS=0x0
29CONFIG_ARM_APPENDED_DTB=y
30CONFIG_VFP=y
31# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
32CONFIG_PM=y
33CONFIG_NET=y
34CONFIG_PACKET=y
35CONFIG_UNIX=y
36CONFIG_INET=y
37CONFIG_IP_PNP=y
38CONFIG_IP_PNP_DHCP=y
39# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
40# CONFIG_INET_XFRM_MODE_TUNNEL is not set
41# CONFIG_INET_XFRM_MODE_BEET is not set
42# CONFIG_INET_LRO is not set
43# CONFIG_INET_DIAG is not set
44# CONFIG_IPV6 is not set
45CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
46CONFIG_DEVTMPFS=y
47CONFIG_DEVTMPFS_MOUNT=y
48# CONFIG_STANDALONE is not set
49# CONFIG_PREVENT_FIRMWARE_BUILD is not set
50# CONFIG_FW_LOADER is not set
51CONFIG_MTD=y
52CONFIG_MTD_CHAR=y
53CONFIG_MTD_BLOCK=y
54CONFIG_MTD_CFI=y
55CONFIG_MTD_CFI_AMDSTD=y
56CONFIG_MTD_M25P80=y
57CONFIG_MTD_SPI_NOR=y
58CONFIG_SCSI=y
59CONFIG_BLK_DEV_SD=y
60CONFIG_NETDEVICES=y
61# CONFIG_NET_CADENCE is not set
62# CONFIG_NET_VENDOR_BROADCOM is not set
63# CONFIG_NET_VENDOR_CIRRUS is not set
64# CONFIG_NET_VENDOR_FARADAY is not set
65# CONFIG_NET_VENDOR_INTEL is not set
66# CONFIG_NET_VENDOR_MARVELL is not set
67# CONFIG_NET_VENDOR_MICREL is not set
68# CONFIG_NET_VENDOR_NATSEMI is not set
69# CONFIG_NET_VENDOR_SEEQ is not set
70CONFIG_SMSC911X=y
71# CONFIG_NET_VENDOR_STMICRO is not set
72# CONFIG_NET_VENDOR_WIZNET is not set
73# CONFIG_INPUT is not set
74# CONFIG_SERIO is not set
75# CONFIG_VT is not set
76# CONFIG_LEGACY_PTYS is not set
77# CONFIG_DEVKMEM is not set
78CONFIG_SERIAL_SH_SCI=y
79CONFIG_SERIAL_SH_SCI_NR_UARTS=6
80CONFIG_SERIAL_SH_SCI_CONSOLE=y
81# CONFIG_HW_RANDOM is not set
82# CONFIG_HWMON is not set
83CONFIG_I2C=y
84CONFIG_I2C_RCAR=y
85CONFIG_GPIO_RCAR=y
86CONFIG_REGULATOR=y
87CONFIG_MEDIA_SUPPORT=y
88CONFIG_MEDIA_CAMERA_SUPPORT=y
89CONFIG_V4L_PLATFORM_DRIVERS=y
90CONFIG_SOC_CAMERA=y
91CONFIG_VIDEO_RCAR_VIN=y
92# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
93CONFIG_VIDEO_ML86V7667=y
94CONFIG_SPI=y
95CONFIG_SPI_SH_HSPI=y
96CONFIG_SOUND=y
97CONFIG_SND=y
98CONFIG_SND_SOC=y
99CONFIG_SND_SOC_RCAR=y
100CONFIG_USB=y
101CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
102CONFIG_USB_EHCI_HCD=y
103CONFIG_USB_OHCI_HCD=y
104CONFIG_USB_OHCI_HCD_PLATFORM=y
105CONFIG_USB_EHCI_HCD_PLATFORM=y
106CONFIG_USB_STORAGE=y
107CONFIG_USB_RCAR_PHY=y
108CONFIG_MMC=y
109CONFIG_MMC_SDHI=y
110CONFIG_MMC_SH_MMCIF=y
111CONFIG_RTC_CLASS=y
112CONFIG_RTC_DRV_RX8581=y
113CONFIG_DMADEVICES=y
114CONFIG_RCAR_HPB_DMAE=y
115CONFIG_UIO=y
116CONFIG_UIO_PDRV_GENIRQ=y
117# CONFIG_IOMMU_SUPPORT is not set
118# CONFIG_DNOTIFY is not set
119CONFIG_TMPFS=y
120# CONFIG_MISC_FILESYSTEMS is not set
121CONFIG_NFS_FS=y
122CONFIG_NFS_V3_ACL=y
123CONFIG_NFS_V4=y
124CONFIG_NFS_SWAP=y
125CONFIG_NFS_V4_1=y
126CONFIG_ROOT_NFS=y
127# CONFIG_ENABLE_WARN_DEPRECATED is not set
128# CONFIG_ENABLE_MUST_CHECK is not set
129# CONFIG_SCHED_DEBUG is not set
130# CONFIG_DEBUG_BUGVERBOSE is not set
131# CONFIG_FTRACE is not set
132# CONFIG_ARM_UNWIND is not set
133CONFIG_AVERAGE=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 50c84e1876fc..3f15a5cae167 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -240,7 +240,8 @@ CONFIG_SSI_PROTOCOL=m
240CONFIG_PINCTRL_SINGLE=y 240CONFIG_PINCTRL_SINGLE=y
241CONFIG_DEBUG_GPIO=y 241CONFIG_DEBUG_GPIO=y
242CONFIG_GPIO_SYSFS=y 242CONFIG_GPIO_SYSFS=y
243CONFIG_GPIO_PCF857X=m 243CONFIG_GPIO_PCA953X=m
244CONFIG_GPIO_PCF857X=y
244CONFIG_GPIO_TWL4030=y 245CONFIG_GPIO_TWL4030=y
245CONFIG_GPIO_PALMAS=y 246CONFIG_GPIO_PALMAS=y
246CONFIG_W1=m 247CONFIG_W1=m
@@ -350,6 +351,8 @@ CONFIG_USB_MUSB_HDRC=m
350CONFIG_USB_MUSB_OMAP2PLUS=m 351CONFIG_USB_MUSB_OMAP2PLUS=m
351CONFIG_USB_MUSB_AM35X=m 352CONFIG_USB_MUSB_AM35X=m
352CONFIG_USB_MUSB_DSPS=m 353CONFIG_USB_MUSB_DSPS=m
354CONFIG_USB_INVENTRA_DMA=y
355CONFIG_USB_TI_CPPI41_DMA=y
353CONFIG_USB_DWC3=m 356CONFIG_USB_DWC3=m
354CONFIG_USB_TEST=m 357CONFIG_USB_TEST=m
355CONFIG_AM335X_PHY_USB=y 358CONFIG_AM335X_PHY_USB=y
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 7bbf325a4f31..b2bc8e11471d 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -491,11 +491,6 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
491#endif 491#endif
492 .endm 492 .endm
493 493
494 .macro uaccess_save_and_disable, tmp
495 uaccess_save \tmp
496 uaccess_disable \tmp
497 .endm
498
499 .irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo 494 .irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
500 .macro ret\c, reg 495 .macro ret\c, reg
501#if __LINUX_ARM_ARCH__ < 6 496#if __LINUX_ARM_ARCH__ < 6
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index b274bde24905..e7335a92144e 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -40,6 +40,7 @@ do { \
40 "2:\t.asciz " #__file "\n" \ 40 "2:\t.asciz " #__file "\n" \
41 ".popsection\n" \ 41 ".popsection\n" \
42 ".pushsection __bug_table,\"a\"\n" \ 42 ".pushsection __bug_table,\"a\"\n" \
43 ".align 2\n" \
43 "3:\t.word 1b, 2b\n" \ 44 "3:\t.word 1b, 2b\n" \
44 "\t.hword " #__line ", 0\n" \ 45 "\t.hword " #__line ", 0\n" \
45 ".popsection"); \ 46 ".popsection"); \
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index e878129f2fee..fc8ba1663601 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -12,6 +12,7 @@
12 12
13#ifndef __ASSEMBLY__ 13#ifndef __ASSEMBLY__
14#include <asm/barrier.h> 14#include <asm/barrier.h>
15#include <asm/thread_info.h>
15#endif 16#endif
16 17
17/* 18/*
@@ -89,7 +90,8 @@ static inline unsigned int get_domain(void)
89 90
90 asm( 91 asm(
91 "mrc p15, 0, %0, c3, c0 @ get domain" 92 "mrc p15, 0, %0, c3, c0 @ get domain"
92 : "=r" (domain)); 93 : "=r" (domain)
94 : "m" (current_thread_info()->cpu_domain));
93 95
94 return domain; 96 return domain;
95} 97}
@@ -98,7 +100,7 @@ static inline void set_domain(unsigned val)
98{ 100{
99 asm volatile( 101 asm volatile(
100 "mcr p15, 0, %0, c3, c0 @ set domain" 102 "mcr p15, 0, %0, c3, c0 @ set domain"
101 : : "r" (val)); 103 : : "r" (val) : "memory");
102 isb(); 104 isb();
103} 105}
104 106
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index d36a73d7c0e8..076777ff3daa 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -106,7 +106,7 @@ extern void __iomem *it8152_base_address;
106struct pci_dev; 106struct pci_dev;
107struct pci_sys_data; 107struct pci_sys_data;
108 108
109extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc); 109extern void it8152_irq_demux(struct irq_desc *desc);
110extern void it8152_init_irq(void); 110extern void it8152_init_irq(void);
111extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); 111extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
112extern int it8152_pci_setup(int nr, struct pci_sys_data *sys); 112extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
diff --git a/arch/arm/include/asm/hw_irq.h b/arch/arm/include/asm/hw_irq.h
index af79da40af2a..9beb92914f4d 100644
--- a/arch/arm/include/asm/hw_irq.h
+++ b/arch/arm/include/asm/hw_irq.h
@@ -11,12 +11,6 @@ static inline void ack_bad_irq(int irq)
11 pr_crit("unexpected IRQ trap at vector %02x\n", irq); 11 pr_crit("unexpected IRQ trap at vector %02x\n", irq);
12} 12}
13 13
14void set_irq_flags(unsigned int irq, unsigned int flags);
15
16#define IRQF_VALID (1 << 0)
17#define IRQF_PROBE (1 << 1)
18#define IRQF_NOAUTOEN (1 << 2)
19
20#define ARCH_IRQ_INIT_FLAGS (IRQ_NOREQUEST | IRQ_NOPROBE) 14#define ARCH_IRQ_INIT_FLAGS (IRQ_NOREQUEST | IRQ_NOPROBE)
21 15
22#endif 16#endif
diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h
index dcba0fa5176e..c4072d9f32c7 100644
--- a/arch/arm/include/asm/kvm_host.h
+++ b/arch/arm/include/asm/kvm_host.h
@@ -29,21 +29,18 @@
29 29
30#define __KVM_HAVE_ARCH_INTC_INITIALIZED 30#define __KVM_HAVE_ARCH_INTC_INITIALIZED
31 31
32#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
33#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
34#else
35#define KVM_MAX_VCPUS 0
36#endif
37
38#define KVM_USER_MEM_SLOTS 32 32#define KVM_USER_MEM_SLOTS 32
39#define KVM_PRIVATE_MEM_SLOTS 4 33#define KVM_PRIVATE_MEM_SLOTS 4
40#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 34#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
41#define KVM_HAVE_ONE_REG 35#define KVM_HAVE_ONE_REG
36#define KVM_HALT_POLL_NS_DEFAULT 500000
42 37
43#define KVM_VCPU_MAX_FEATURES 2 38#define KVM_VCPU_MAX_FEATURES 2
44 39
45#include <kvm/arm_vgic.h> 40#include <kvm/arm_vgic.h>
46 41
42#define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
43
47u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode); 44u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
48int __attribute_const__ kvm_target_cpu(void); 45int __attribute_const__ kvm_target_cpu(void);
49int kvm_reset_vcpu(struct kvm_vcpu *vcpu); 46int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
@@ -148,6 +145,7 @@ struct kvm_vm_stat {
148 145
149struct kvm_vcpu_stat { 146struct kvm_vcpu_stat {
150 u32 halt_successful_poll; 147 u32 halt_successful_poll;
148 u32 halt_attempted_poll;
151 u32 halt_wakeup; 149 u32 halt_wakeup;
152}; 150};
153 151
diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h
index 2092ee1e1300..de4634b51456 100644
--- a/arch/arm/include/asm/mach/irq.h
+++ b/arch/arm/include/asm/mach/irq.h
@@ -23,10 +23,10 @@ extern int show_fiq_list(struct seq_file *, int);
23/* 23/*
24 * This is for easy migration, but should be changed in the source 24 * This is for easy migration, but should be changed in the source
25 */ 25 */
26#define do_bad_IRQ(irq,desc) \ 26#define do_bad_IRQ(desc) \
27do { \ 27do { \
28 raw_spin_lock(&desc->lock); \ 28 raw_spin_lock(&desc->lock); \
29 handle_bad_irq(irq, desc); \ 29 handle_bad_irq(desc); \
30 raw_spin_unlock(&desc->lock); \ 30 raw_spin_unlock(&desc->lock); \
31} while(0) 31} while(0)
32 32
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index d0a1119dcaf3..776757d1604a 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -25,7 +25,6 @@
25struct task_struct; 25struct task_struct;
26 26
27#include <asm/types.h> 27#include <asm/types.h>
28#include <asm/domain.h>
29 28
30typedef unsigned long mm_segment_t; 29typedef unsigned long mm_segment_t;
31 30
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 32640c431a08..7cba573c2cc9 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -19,7 +19,7 @@
19 * This may need to be greater than __NR_last_syscall+1 in order to 19 * This may need to be greater than __NR_last_syscall+1 in order to
20 * account for the padding in the syscall table 20 * account for the padding in the syscall table
21 */ 21 */
22#define __NR_syscalls (388) 22#define __NR_syscalls (392)
23 23
24/* 24/*
25 * *NOTE*: This is a ghost syscall private to the kernel. Only the 25 * *NOTE*: This is a ghost syscall private to the kernel. Only the
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
index 0c3f5a0dafd3..7a2a32a1d5a8 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -414,6 +414,8 @@
414#define __NR_memfd_create (__NR_SYSCALL_BASE+385) 414#define __NR_memfd_create (__NR_SYSCALL_BASE+385)
415#define __NR_bpf (__NR_SYSCALL_BASE+386) 415#define __NR_bpf (__NR_SYSCALL_BASE+386)
416#define __NR_execveat (__NR_SYSCALL_BASE+387) 416#define __NR_execveat (__NR_SYSCALL_BASE+387)
417#define __NR_userfaultfd (__NR_SYSCALL_BASE+388)
418#define __NR_membarrier (__NR_SYSCALL_BASE+389)
417 419
418/* 420/*
419 * The following SWIs are ARM private. 421 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 05745eb838c5..fde6c88d560c 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -397,6 +397,8 @@
397/* 385 */ CALL(sys_memfd_create) 397/* 385 */ CALL(sys_memfd_create)
398 CALL(sys_bpf) 398 CALL(sys_bpf)
399 CALL(sys_execveat) 399 CALL(sys_execveat)
400 CALL(sys_userfaultfd)
401 CALL(sys_membarrier)
400#ifndef syscalls_counted 402#ifndef syscalls_counted
401.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 403.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
402#define syscalls_counted 404#define syscalls_counted
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 5ff4826cb154..2766183e69df 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -79,26 +79,6 @@ asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
79 handle_IRQ(irq, regs); 79 handle_IRQ(irq, regs);
80} 80}
81 81
82void set_irq_flags(unsigned int irq, unsigned int iflags)
83{
84 unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
85
86 if (irq >= nr_irqs) {
87 pr_err("Trying to set irq flags for IRQ%d\n", irq);
88 return;
89 }
90
91 if (iflags & IRQF_VALID)
92 clr |= IRQ_NOREQUEST;
93 if (iflags & IRQF_PROBE)
94 clr |= IRQ_NOPROBE;
95 if (!(iflags & IRQF_NOAUTOEN))
96 clr |= IRQ_NOAUTOEN;
97 /* Order is clear bits in "clr" then set bits in "set" */
98 irq_modify_status(irq, clr, set & ~clr);
99}
100EXPORT_SYMBOL_GPL(set_irq_flags);
101
102void __init init_IRQ(void) 82void __init init_IRQ(void)
103{ 83{
104 int ret; 84 int ret;
diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c
index a6ad93c9bce3..fd9eefce0a7b 100644
--- a/arch/arm/kernel/kgdb.c
+++ b/arch/arm/kernel/kgdb.c
@@ -259,15 +259,17 @@ int kgdb_arch_set_breakpoint(struct kgdb_bkpt *bpt)
259 if (err) 259 if (err)
260 return err; 260 return err;
261 261
262 patch_text((void *)bpt->bpt_addr, 262 /* Machine is already stopped, so we can use __patch_text() directly */
263 *(unsigned int *)arch_kgdb_ops.gdb_bpt_instr); 263 __patch_text((void *)bpt->bpt_addr,
264 *(unsigned int *)arch_kgdb_ops.gdb_bpt_instr);
264 265
265 return err; 266 return err;
266} 267}
267 268
268int kgdb_arch_remove_breakpoint(struct kgdb_bkpt *bpt) 269int kgdb_arch_remove_breakpoint(struct kgdb_bkpt *bpt)
269{ 270{
270 patch_text((void *)bpt->bpt_addr, *(unsigned int *)bpt->saved_instr); 271 /* Machine is already stopped, so we can use __patch_text() directly */
272 __patch_text((void *)bpt->bpt_addr, *(unsigned int *)bpt->saved_instr);
271 273
272 return 0; 274 return 0;
273} 275}
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index a3089bacb8d8..7a7c4cea5523 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -226,6 +226,7 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
226 226
227 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save)); 227 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
228 228
229#ifdef CONFIG_CPU_USE_DOMAINS
229 /* 230 /*
230 * Copy the initial value of the domain access control register 231 * Copy the initial value of the domain access control register
231 * from the current thread: thread->addr_limit will have been 232 * from the current thread: thread->addr_limit will have been
@@ -233,6 +234,7 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
233 * kernel/fork.c 234 * kernel/fork.c
234 */ 235 */
235 thread->cpu_domain = get_domain(); 236 thread->cpu_domain = get_domain();
237#endif
236 238
237 if (likely(!(p->flags & PF_KTHREAD))) { 239 if (likely(!(p->flags & PF_KTHREAD))) {
238 *childregs = *current_pt_regs(); 240 *childregs = *current_pt_regs();
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index b6cda06b455f..7b8f2141427b 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -343,15 +343,18 @@ setup_return(struct pt_regs *regs, struct ksignal *ksig,
343 */ 343 */
344 thumb = handler & 1; 344 thumb = handler & 1;
345 345
346#if __LINUX_ARM_ARCH__ >= 7
347 /* 346 /*
348 * Clear the If-Then Thumb-2 execution state 347 * Clear the If-Then Thumb-2 execution state. ARM spec
349 * ARM spec requires this to be all 000s in ARM mode 348 * requires this to be all 000s in ARM mode. Snapdragon
350 * Snapdragon S4/Krait misbehaves on a Thumb=>ARM 349 * S4/Krait misbehaves on a Thumb=>ARM signal transition
351 * signal transition without this. 350 * without this.
351 *
352 * We must do this whenever we are running on a Thumb-2
353 * capable CPU, which includes ARMv6T2. However, we elect
354 * to always do this to simplify the code; this field is
355 * marked UNK/SBZP for older architectures.
352 */ 356 */
353 cpsr &= ~PSR_IT_MASK; 357 cpsr &= ~PSR_IT_MASK;
354#endif
355 358
356 if (thumb) { 359 if (thumb) {
357 cpsr |= PSR_T_BIT; 360 cpsr |= PSR_T_BIT;
diff --git a/arch/arm/kvm/Kconfig b/arch/arm/kvm/Kconfig
index bfb915d05665..210eccadb69a 100644
--- a/arch/arm/kvm/Kconfig
+++ b/arch/arm/kvm/Kconfig
@@ -45,15 +45,4 @@ config KVM_ARM_HOST
45 ---help--- 45 ---help---
46 Provides host support for ARM processors. 46 Provides host support for ARM processors.
47 47
48config KVM_ARM_MAX_VCPUS
49 int "Number maximum supported virtual CPUs per VM"
50 depends on KVM_ARM_HOST
51 default 4
52 help
53 Static number of max supported virtual CPUs per VM.
54
55 If you choose a high number, the vcpu structures will be quite
56 large, so only choose a reasonable number that you expect to
57 actually use.
58
59endif # VIRTUALIZATION 48endif # VIRTUALIZATION
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index ce404a5c3062..dc017adfddc8 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -446,7 +446,7 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu)
446 * Map the VGIC hardware resources before running a vcpu the first 446 * Map the VGIC hardware resources before running a vcpu the first
447 * time on this VM. 447 * time on this VM.
448 */ 448 */
449 if (unlikely(!vgic_ready(kvm))) { 449 if (unlikely(irqchip_in_kernel(kvm) && !vgic_ready(kvm))) {
450 ret = kvm_vgic_map_resources(kvm); 450 ret = kvm_vgic_map_resources(kvm);
451 if (ret) 451 if (ret)
452 return ret; 452 return ret;
diff --git a/arch/arm/kvm/interrupts_head.S b/arch/arm/kvm/interrupts_head.S
index 702740d37465..51a59504bef4 100644
--- a/arch/arm/kvm/interrupts_head.S
+++ b/arch/arm/kvm/interrupts_head.S
@@ -515,8 +515,7 @@ ARM_BE8(rev r6, r6 )
515 515
516 mrc p15, 0, r2, c14, c3, 1 @ CNTV_CTL 516 mrc p15, 0, r2, c14, c3, 1 @ CNTV_CTL
517 str r2, [vcpu, #VCPU_TIMER_CNTV_CTL] 517 str r2, [vcpu, #VCPU_TIMER_CNTV_CTL]
518 bic r2, #1 @ Clear ENABLE 518
519 mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
520 isb 519 isb
521 520
522 mrrc p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL 521 mrrc p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL
@@ -529,6 +528,9 @@ ARM_BE8(rev r6, r6 )
529 mcrr p15, 4, r2, r2, c14 @ CNTVOFF 528 mcrr p15, 4, r2, r2, c14 @ CNTVOFF
530 529
5311: 5301:
531 mov r2, #0 @ Clear ENABLE
532 mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
533
532 @ Allow physical timer/counter access for the host 534 @ Allow physical timer/counter access for the host
533 mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL 535 mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL
534 orr r2, r2, #(CNTHCTL_PL1PCEN | CNTHCTL_PL1PCTEN) 536 orr r2, r2, #(CNTHCTL_PL1PCEN | CNTHCTL_PL1PCTEN)
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 7b4201294187..6984342da13d 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -1792,8 +1792,10 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
1792 if (vma->vm_flags & VM_PFNMAP) { 1792 if (vma->vm_flags & VM_PFNMAP) {
1793 gpa_t gpa = mem->guest_phys_addr + 1793 gpa_t gpa = mem->guest_phys_addr +
1794 (vm_start - mem->userspace_addr); 1794 (vm_start - mem->userspace_addr);
1795 phys_addr_t pa = (vma->vm_pgoff << PAGE_SHIFT) + 1795 phys_addr_t pa;
1796 vm_start - vma->vm_start; 1796
1797 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
1798 pa += vm_start - vma->vm_start;
1797 1799
1798 /* IO region dirty page logging not allowed */ 1800 /* IO region dirty page logging not allowed */
1799 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) 1801 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
diff --git a/arch/arm/kvm/psci.c b/arch/arm/kvm/psci.c
index 4b94b513168d..ad6f6424f1d1 100644
--- a/arch/arm/kvm/psci.c
+++ b/arch/arm/kvm/psci.c
@@ -126,7 +126,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
126 126
127static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu) 127static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
128{ 128{
129 int i; 129 int i, matching_cpus = 0;
130 unsigned long mpidr; 130 unsigned long mpidr;
131 unsigned long target_affinity; 131 unsigned long target_affinity;
132 unsigned long target_affinity_mask; 132 unsigned long target_affinity_mask;
@@ -151,12 +151,16 @@ static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
151 */ 151 */
152 kvm_for_each_vcpu(i, tmp, kvm) { 152 kvm_for_each_vcpu(i, tmp, kvm) {
153 mpidr = kvm_vcpu_get_mpidr_aff(tmp); 153 mpidr = kvm_vcpu_get_mpidr_aff(tmp);
154 if (((mpidr & target_affinity_mask) == target_affinity) && 154 if ((mpidr & target_affinity_mask) == target_affinity) {
155 !tmp->arch.pause) { 155 matching_cpus++;
156 return PSCI_0_2_AFFINITY_LEVEL_ON; 156 if (!tmp->arch.pause)
157 return PSCI_0_2_AFFINITY_LEVEL_ON;
157 } 158 }
158 } 159 }
159 160
161 if (!matching_cpus)
162 return PSCI_RET_INVALID_PARAMS;
163
160 return PSCI_0_2_AFFINITY_LEVEL_OFF; 164 return PSCI_0_2_AFFINITY_LEVEL_OFF;
161} 165}
162 166
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 305d7c6242bb..bfb3703357c5 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -69,14 +69,14 @@ static struct irq_chip pmu_irq_chip = {
69 .irq_ack = pmu_irq_ack, 69 .irq_ack = pmu_irq_ack,
70}; 70};
71 71
72static void pmu_irq_handler(unsigned int __irq, struct irq_desc *desc) 72static void pmu_irq_handler(struct irq_desc *desc)
73{ 73{
74 unsigned int irq = irq_desc_get_irq(desc);
75 unsigned long cause = readl(PMU_INTERRUPT_CAUSE); 74 unsigned long cause = readl(PMU_INTERRUPT_CAUSE);
75 unsigned int irq;
76 76
77 cause &= readl(PMU_INTERRUPT_MASK); 77 cause &= readl(PMU_INTERRUPT_MASK);
78 if (cause == 0) { 78 if (cause == 0) {
79 do_bad_IRQ(irq, desc); 79 do_bad_IRQ(desc);
80 return; 80 return;
81 } 81 }
82 82
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index fcd79bc3a3e1..c01fca11b224 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -87,13 +87,12 @@ static struct irq_chip isa_hi_chip = {
87 .irq_unmask = isa_unmask_pic_hi_irq, 87 .irq_unmask = isa_unmask_pic_hi_irq,
88}; 88};
89 89
90static void 90static void isa_irq_handler(struct irq_desc *desc)
91isa_irq_handler(unsigned int irq, struct irq_desc *desc)
92{ 91{
93 unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE; 92 unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE;
94 93
95 if (isa_irq < _ISA_IRQ(0) || isa_irq >= _ISA_IRQ(16)) { 94 if (isa_irq < _ISA_IRQ(0) || isa_irq >= _ISA_IRQ(16)) {
96 do_bad_IRQ(isa_irq, desc); 95 do_bad_IRQ(desc);
97 return; 96 return;
98 } 97 }
99 98
diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
index 220333ed741d..2478d9f4d92d 100644
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -126,7 +126,7 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
126 return 0; 126 return 0;
127} 127}
128 128
129static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 129static void gpio_irq_handler(struct irq_desc *desc)
130{ 130{
131 unsigned int port = (unsigned int)irq_desc_get_handler_data(desc); 131 unsigned int port = (unsigned int)irq_desc_get_handler_data(desc);
132 unsigned int gpio_irq_no, irq_stat; 132 unsigned int gpio_irq_no, irq_stat;
diff --git a/arch/arm/mach-imx/3ds_debugboard.c b/arch/arm/mach-imx/3ds_debugboard.c
index 45903be6e7b3..16496a071ecb 100644
--- a/arch/arm/mach-imx/3ds_debugboard.c
+++ b/arch/arm/mach-imx/3ds_debugboard.c
@@ -85,7 +85,7 @@ static struct platform_device smsc_lan9217_device = {
85 .resource = smsc911x_resources, 85 .resource = smsc911x_resources,
86}; 86};
87 87
88static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) 88static void mxc_expio_irq_handler(struct irq_desc *desc)
89{ 89{
90 u32 imr_val; 90 u32 imr_val;
91 u32 int_valid; 91 u32 int_valid;
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index 2c0853560bd2..2b147e4bf9c9 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -154,7 +154,7 @@ static inline void mxc_init_imx_uart(void)
154 imx31_add_imx_uart0(&uart_pdata); 154 imx31_add_imx_uart0(&uart_pdata);
155} 155}
156 156
157static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc) 157static void mx31ads_expio_irq_handler(struct irq_desc *desc)
158{ 158{
159 u32 imr_val; 159 u32 imr_val;
160 u32 int_valid; 160 u32 int_valid;
diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
index 9f89e76dfbb9..f6235b28578c 100644
--- a/arch/arm/mach-iop13xx/msi.c
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -91,7 +91,7 @@ static void (*write_imipr[])(u32) = {
91 write_imipr_3, 91 write_imipr_3,
92}; 92};
93 93
94static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc) 94static void iop13xx_msi_handler(struct irq_desc *desc)
95{ 95{
96 int i, j; 96 int i, j;
97 unsigned long status; 97 unsigned long status;
diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
index e288010522f9..c279293f084c 100644
--- a/arch/arm/mach-keystone/keystone.c
+++ b/arch/arm/mach-keystone/keystone.c
@@ -97,6 +97,9 @@ static long long __init keystone_pv_fixup(void)
97} 97}
98 98
99static const char *const keystone_match[] __initconst = { 99static const char *const keystone_match[] __initconst = {
100 "ti,k2hk",
101 "ti,k2e",
102 "ti,k2l",
100 "ti,keystone", 103 "ti,keystone",
101 NULL, 104 NULL,
102}; 105};
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index cce4cef12b6e..2ae431e8bc1b 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -370,7 +370,7 @@ static struct irq_chip lpc32xx_irq_chip = {
370 .irq_set_wake = lpc32xx_irq_wake 370 .irq_set_wake = lpc32xx_irq_wake
371}; 371};
372 372
373static void lpc32xx_sic1_handler(unsigned int irq, struct irq_desc *desc) 373static void lpc32xx_sic1_handler(struct irq_desc *desc)
374{ 374{
375 unsigned long ints = __raw_readl(LPC32XX_INTC_STAT(LPC32XX_SIC1_BASE)); 375 unsigned long ints = __raw_readl(LPC32XX_INTC_STAT(LPC32XX_SIC1_BASE));
376 376
@@ -383,7 +383,7 @@ static void lpc32xx_sic1_handler(unsigned int irq, struct irq_desc *desc)
383 } 383 }
384} 384}
385 385
386static void lpc32xx_sic2_handler(unsigned int irq, struct irq_desc *desc) 386static void lpc32xx_sic2_handler(struct irq_desc *desc)
387{ 387{
388 unsigned long ints = __raw_readl(LPC32XX_INTC_STAT(LPC32XX_SIC2_BASE)); 388 unsigned long ints = __raw_readl(LPC32XX_INTC_STAT(LPC32XX_SIC2_BASE));
389 389
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 6373e2bff203..842302df99c1 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -69,8 +69,7 @@ static struct platform_device *devices[] __initdata = {
69#define DEBUG_IRQ(fmt...) while (0) {} 69#define DEBUG_IRQ(fmt...) while (0) {}
70#endif 70#endif
71 71
72static void 72static void netx_hif_demux_handler(struct irq_desc *desc)
73netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
74{ 73{
75 unsigned int irq = NETX_IRQ_HIF_CHAINED(0); 74 unsigned int irq = NETX_IRQ_HIF_CHAINED(0);
76 unsigned int stat; 75 unsigned int stat;
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index dfec671b1639..39e20d0ead08 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -87,7 +87,7 @@ static void fpga_mask_ack_irq(struct irq_data *d)
87 fpga_ack_irq(d); 87 fpga_ack_irq(d);
88} 88}
89 89
90static void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) 90static void innovator_fpga_IRQ_demux(struct irq_desc *desc)
91{ 91{
92 u32 stat; 92 u32 stat;
93 int fpga_irq; 93 int fpga_irq;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 07d2e100caab..b3a0dff67e3f 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -44,10 +44,11 @@ config SOC_OMAP5
44 select ARM_CPU_SUSPEND if PM 44 select ARM_CPU_SUSPEND if PM
45 select ARM_GIC 45 select ARM_GIC
46 select HAVE_ARM_SCU if SMP 46 select HAVE_ARM_SCU if SMP
47 select HAVE_ARM_TWD if SMP
48 select HAVE_ARM_ARCH_TIMER 47 select HAVE_ARM_ARCH_TIMER
49 select ARM_ERRATA_798181 if SMP 48 select ARM_ERRATA_798181 if SMP
49 select OMAP_INTERCONNECT
50 select OMAP_INTERCONNECT_BARRIER 50 select OMAP_INTERCONNECT_BARRIER
51 select PM_OPP if PM
51 52
52config SOC_AM33XX 53config SOC_AM33XX
53 bool "TI AM33XX" 54 bool "TI AM33XX"
@@ -70,10 +71,13 @@ config SOC_DRA7XX
70 select ARCH_OMAP2PLUS 71 select ARCH_OMAP2PLUS
71 select ARM_CPU_SUSPEND if PM 72 select ARM_CPU_SUSPEND if PM
72 select ARM_GIC 73 select ARM_GIC
74 select HAVE_ARM_SCU if SMP
73 select HAVE_ARM_ARCH_TIMER 75 select HAVE_ARM_ARCH_TIMER
74 select IRQ_CROSSBAR 76 select IRQ_CROSSBAR
75 select ARM_ERRATA_798181 if SMP 77 select ARM_ERRATA_798181 if SMP
78 select OMAP_INTERCONNECT
76 select OMAP_INTERCONNECT_BARRIER 79 select OMAP_INTERCONNECT_BARRIER
80 select PM_OPP if PM
77 81
78config ARCH_OMAP2PLUS 82config ARCH_OMAP2PLUS
79 bool 83 bool
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 24c9afc9e8a7..6133eaac685d 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -20,13 +20,6 @@
20 20
21#include "common.h" 21#include "common.h"
22 22
23#if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3))
24#define intc_of_init NULL
25#endif
26#ifndef CONFIG_ARCH_OMAP4
27#define gic_of_init NULL
28#endif
29
30static const struct of_device_id omap_dt_match_table[] __initconst = { 23static const struct of_device_id omap_dt_match_table[] __initconst = {
31 { .compatible = "simple-bus", }, 24 { .compatible = "simple-bus", },
32 { .compatible = "ti,omap-infra", }, 25 { .compatible = "ti,omap-infra", },
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index e3f713ffb06b..54a5ba54d2ff 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -653,8 +653,12 @@ void __init dra7xxx_check_revision(void)
653 omap_revision = DRA752_REV_ES1_0; 653 omap_revision = DRA752_REV_ES1_0;
654 break; 654 break;
655 case 1: 655 case 1:
656 default:
657 omap_revision = DRA752_REV_ES1_1; 656 omap_revision = DRA752_REV_ES1_1;
657 break;
658 case 2:
659 default:
660 omap_revision = DRA752_REV_ES2_0;
661 break;
658 } 662 }
659 break; 663 break;
660 664
@@ -674,7 +678,7 @@ void __init dra7xxx_check_revision(void)
674 /* Unknown default to latest silicon rev as default*/ 678 /* Unknown default to latest silicon rev as default*/
675 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%x)\n", 679 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%x)\n",
676 __func__, idcode, hawkeye, rev); 680 __func__, idcode, hawkeye, rev);
677 omap_revision = DRA752_REV_ES1_1; 681 omap_revision = DRA752_REV_ES2_0;
678 } 682 }
679 683
680 sprintf(soc_name, "DRA%03x", omap_rev() >> 16); 684 sprintf(soc_name, "DRA%03x", omap_rev() >> 16);
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 980c9372e6fd..3eaeaca5da05 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -676,6 +676,7 @@ void __init am43xx_init_early(void)
676void __init am43xx_init_late(void) 676void __init am43xx_init_late(void)
677{ 677{
678 omap_common_late_init(); 678 omap_common_late_init();
679 omap2_clk_enable_autoidle_all();
679} 680}
680#endif 681#endif
681 682
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 4cb8fd9f741f..72ebc4c16bae 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -901,7 +901,8 @@ static int __init omap_device_late_idle(struct device *dev, void *data)
901 if (od->hwmods[i]->flags & HWMOD_INIT_NO_IDLE) 901 if (od->hwmods[i]->flags & HWMOD_INIT_NO_IDLE)
902 return 0; 902 return 0;
903 903
904 if (od->_driver_status != BUS_NOTIFY_BOUND_DRIVER) { 904 if (od->_driver_status != BUS_NOTIFY_BOUND_DRIVER &&
905 od->_driver_status != BUS_NOTIFY_BIND_DRIVER) {
905 if (od->_state == OMAP_DEVICE_STATE_ENABLED) { 906 if (od->_state == OMAP_DEVICE_STATE_ENABLED) {
906 dev_warn(dev, "%s: enabled but no driver. Idling\n", 907 dev_warn(dev, "%s: enabled but no driver. Idling\n",
907 __func__); 908 __func__);
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 425bfcd67db6..b668719b9b25 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -103,7 +103,8 @@ static inline void enable_omap3630_toggle_l2_on_restore(void) { }
103#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0) 103#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0)
104#define PM_OMAP4_CPU_OSWR_DISABLE (1 << 1) 104#define PM_OMAP4_CPU_OSWR_DISABLE (1 << 1)
105 105
106#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) 106#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
107 defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
107extern u16 pm44xx_errata; 108extern u16 pm44xx_errata;
108#define IS_PM44XX_ERRATUM(id) (pm44xx_errata & (id)) 109#define IS_PM44XX_ERRATUM(id) (pm44xx_errata & (id))
109#else 110#else
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 257e98c26618..3fc2cbe52113 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -102,7 +102,7 @@ static void omap_prcm_events_filter_priority(unsigned long *events,
102 * dispatched accordingly. Clearing of the wakeup events should be 102 * dispatched accordingly. Clearing of the wakeup events should be
103 * done by the SoC specific individual handlers. 103 * done by the SoC specific individual handlers.
104 */ 104 */
105static void omap_prcm_irq_handler(unsigned int irq, struct irq_desc *desc) 105static void omap_prcm_irq_handler(struct irq_desc *desc)
106{ 106{
107 unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG]; 107 unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
108 unsigned long priority_pending[OMAP_PRCM_MAX_NR_PENDING_REG]; 108 unsigned long priority_pending[OMAP_PRCM_MAX_NR_PENDING_REG];
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index f97654d11ea5..2d1d3845253c 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -469,6 +469,8 @@ IS_OMAP_TYPE(3430, 0x3430)
469#define DRA7XX_CLASS 0x07000000 469#define DRA7XX_CLASS 0x07000000
470#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8)) 470#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
471#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8)) 471#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
472#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
473#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
472#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8)) 474#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
473 475
474void omap2xxx_check_revision(void); 476void omap2xxx_check_revision(void);
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index e4d8701f99f9..a55655127ef2 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -297,12 +297,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
297 if (IS_ERR(src)) 297 if (IS_ERR(src))
298 return PTR_ERR(src); 298 return PTR_ERR(src);
299 299
300 r = clk_set_parent(timer->fclk, src); 300 WARN(clk_set_parent(timer->fclk, src) < 0,
301 if (r < 0) { 301 "Cannot set timer parent clock, no PLL clock driver?");
302 pr_warn("%s: %s cannot set source\n", __func__, oh->name);
303 clk_put(src);
304 return r;
305 }
306 302
307 clk_put(src); 303 clk_put(src);
308 304
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index e5a35f6b83a7..d44d311704ba 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -300,7 +300,7 @@ static void __init omap3_vc_init_pmic_signaling(struct voltagedomain *voltdm)
300 300
301 val = voltdm->read(OMAP3_PRM_POLCTRL_OFFSET); 301 val = voltdm->read(OMAP3_PRM_POLCTRL_OFFSET);
302 if (!(val & OMAP3430_PRM_POLCTRL_CLKREQ_POL) || 302 if (!(val & OMAP3430_PRM_POLCTRL_CLKREQ_POL) ||
303 (val & OMAP3430_PRM_POLCTRL_CLKREQ_POL)) { 303 (val & OMAP3430_PRM_POLCTRL_OFFMODE_POL)) {
304 val |= OMAP3430_PRM_POLCTRL_CLKREQ_POL; 304 val |= OMAP3430_PRM_POLCTRL_CLKREQ_POL;
305 val &= ~OMAP3430_PRM_POLCTRL_OFFMODE_POL; 305 val &= ~OMAP3430_PRM_POLCTRL_OFFMODE_POL;
306 pr_debug("PM: fixing sys_clkreq and sys_off_mode polarity to 0x%x\n", 306 pr_debug("PM: fixing sys_clkreq and sys_off_mode polarity to 0x%x\n",
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 70366b35d299..a727282bfa99 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -496,13 +496,13 @@ static struct irq_chip balloon3_irq_chip = {
496 .irq_unmask = balloon3_unmask_irq, 496 .irq_unmask = balloon3_unmask_irq,
497}; 497};
498 498
499static void balloon3_irq_handler(unsigned int __irq, struct irq_desc *desc) 499static void balloon3_irq_handler(struct irq_desc *desc)
500{ 500{
501 unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) & 501 unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
502 balloon3_irq_enabled; 502 balloon3_irq_enabled;
503 do { 503 do {
504 struct irq_data *d = irq_desc_get_irq_data(desc); 504 struct irq_data *d = irq_desc_get_irq_data(desc);
505 struct irq_chip *chip = irq_data_get_chip(d); 505 struct irq_chip *chip = irq_desc_get_chip(desc);
506 unsigned int irq; 506 unsigned int irq;
507 507
508 /* clear useless edge notification */ 508 /* clear useless edge notification */
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 1fa79f1f832d..3221ae15bef7 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -29,13 +29,12 @@
29void __iomem *it8152_base_address; 29void __iomem *it8152_base_address;
30static int cmx2xx_it8152_irq_gpio; 30static int cmx2xx_it8152_irq_gpio;
31 31
32static void cmx2xx_it8152_irq_demux(unsigned int __irq, struct irq_desc *desc) 32static void cmx2xx_it8152_irq_demux(struct irq_desc *desc)
33{ 33{
34 unsigned int irq = irq_desc_get_irq(desc);
35 /* clear our parent irq */ 34 /* clear our parent irq */
36 desc->irq_data.chip->irq_ack(&desc->irq_data); 35 desc->irq_data.chip->irq_ack(&desc->irq_data);
37 36
38 it8152_irq_demux(irq, desc); 37 it8152_irq_demux(desc);
39} 38}
40 39
41void __cmx2xx_pci_init_irq(int irq_gpio) 40void __cmx2xx_pci_init_irq(int irq_gpio)
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h
index d28fe291233a..07b93fd24474 100644
--- a/arch/arm/mach-pxa/include/mach/addr-map.h
+++ b/arch/arm/mach-pxa/include/mach/addr-map.h
@@ -44,6 +44,13 @@
44 */ 44 */
45 45
46/* 46/*
47 * DFI Bus for NAND, PXA3xx only
48 */
49#define NAND_PHYS 0x43100000
50#define NAND_VIRT IOMEM(0xf6300000)
51#define NAND_SIZE 0x00100000
52
53/*
47 * Internal Memory Controller (PXA27x and later) 54 * Internal Memory Controller (PXA27x and later)
48 */ 55 */
49#define IMEMC_PHYS 0x58000000 56#define IMEMC_PHYS 0x58000000
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index b070167deef2..4823d972e647 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -120,7 +120,7 @@ static struct irq_chip lpd270_irq_chip = {
120 .irq_unmask = lpd270_unmask_irq, 120 .irq_unmask = lpd270_unmask_irq,
121}; 121};
122 122
123static void lpd270_irq_handler(unsigned int __irq, struct irq_desc *desc) 123static void lpd270_irq_handler(struct irq_desc *desc)
124{ 124{
125 unsigned int irq; 125 unsigned int irq;
126 unsigned long pending; 126 unsigned long pending;
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 9a0c8affdadb..d8319b54299a 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -284,7 +284,7 @@ static struct irq_chip pcm990_irq_chip = {
284 .irq_unmask = pcm990_unmask_irq, 284 .irq_unmask = pcm990_unmask_irq,
285}; 285};
286 286
287static void pcm990_irq_handler(unsigned int __irq, struct irq_desc *desc) 287static void pcm990_irq_handler(struct irq_desc *desc)
288{ 288{
289 unsigned int irq; 289 unsigned int irq;
290 unsigned long pending; 290 unsigned long pending;
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index ce0f8d6242e2..06005d3f2ba3 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -47,6 +47,13 @@ extern void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, unsigned int));
47#define ISRAM_START 0x5c000000 47#define ISRAM_START 0x5c000000
48#define ISRAM_SIZE SZ_256K 48#define ISRAM_SIZE SZ_256K
49 49
50/*
51 * NAND NFC: DFI bus arbitration subset
52 */
53#define NDCR (*(volatile u32 __iomem*)(NAND_VIRT + 0))
54#define NDCR_ND_ARB_EN (1 << 12)
55#define NDCR_ND_ARB_CNTL (1 << 19)
56
50static void __iomem *sram; 57static void __iomem *sram;
51static unsigned long wakeup_src; 58static unsigned long wakeup_src;
52 59
@@ -362,7 +369,12 @@ static struct map_desc pxa3xx_io_desc[] __initdata = {
362 .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE), 369 .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE),
363 .length = SMEMC_SIZE, 370 .length = SMEMC_SIZE,
364 .type = MT_DEVICE 371 .type = MT_DEVICE
365 } 372 }, {
373 .virtual = (unsigned long)NAND_VIRT,
374 .pfn = __phys_to_pfn(NAND_PHYS),
375 .length = NAND_SIZE,
376 .type = MT_DEVICE
377 },
366}; 378};
367 379
368void __init pxa3xx_map_io(void) 380void __init pxa3xx_map_io(void)
@@ -419,6 +431,13 @@ static int __init pxa3xx_init(void)
419 */ 431 */
420 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); 432 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
421 433
434 /*
435 * Disable DFI bus arbitration, to prevent a system bus lock if
436 * somebody disables the NAND clock (unused clock) while this
437 * bit remains set.
438 */
439 NDCR = (NDCR & ~NDCR_ND_ARB_EN) | NDCR_ND_ARB_CNTL;
440
422 if ((ret = pxa_init_dma(IRQ_DMA, 32))) 441 if ((ret = pxa_init_dma(IRQ_DMA, 32)))
423 return ret; 442 return ret;
424 443
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 4841d6cefe76..8ab26370107e 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -276,7 +276,7 @@ static inline unsigned long viper_irq_pending(void)
276 viper_irq_enabled_mask; 276 viper_irq_enabled_mask;
277} 277}
278 278
279static void viper_irq_handler(unsigned int __irq, struct irq_desc *desc) 279static void viper_irq_handler(struct irq_desc *desc)
280{ 280{
281 unsigned int irq; 281 unsigned int irq;
282 unsigned long pending; 282 unsigned long pending;
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 6f94dd7b4dee..30e62a3f0701 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -105,7 +105,7 @@ static inline unsigned long zeus_irq_pending(void)
105 return __raw_readw(ZEUS_CPLD_ISA_IRQ) & zeus_irq_enabled_mask; 105 return __raw_readw(ZEUS_CPLD_ISA_IRQ) & zeus_irq_enabled_mask;
106} 106}
107 107
108static void zeus_irq_handler(unsigned int __irq, struct irq_desc *desc) 108static void zeus_irq_handler(struct irq_desc *desc)
109{ 109{
110 unsigned int irq; 110 unsigned int irq;
111 unsigned long pending; 111 unsigned long pending;
diff --git a/arch/arm/mach-rpc/ecard.c b/arch/arm/mach-rpc/ecard.c
index f726d4c4e6dd..dc67a7fb3831 100644
--- a/arch/arm/mach-rpc/ecard.c
+++ b/arch/arm/mach-rpc/ecard.c
@@ -551,8 +551,7 @@ static void ecard_check_lockup(struct irq_desc *desc)
551 } 551 }
552} 552}
553 553
554static void 554static void ecard_irq_handler(struct irq_desc *desc)
555ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
556{ 555{
557 ecard_t *ec; 556 ecard_t *ec;
558 int called = 0; 557 int called = 0;
diff --git a/arch/arm/mach-s3c24xx/bast-irq.c b/arch/arm/mach-s3c24xx/bast-irq.c
index ced1ab86ac83..2bb08961e934 100644
--- a/arch/arm/mach-s3c24xx/bast-irq.c
+++ b/arch/arm/mach-s3c24xx/bast-irq.c
@@ -100,9 +100,7 @@ static struct irq_chip bast_pc104_chip = {
100 .irq_ack = bast_pc104_maskack 100 .irq_ack = bast_pc104_maskack
101}; 101};
102 102
103static void 103static void bast_irq_pc104_demux(struct irq_desc *desc)
104bast_irq_pc104_demux(unsigned int irq,
105 struct irq_desc *desc)
106{ 104{
107 unsigned int stat; 105 unsigned int stat;
108 unsigned int irqno; 106 unsigned int irqno;
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index fd63ecfb2f81..ddb30b8434c5 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -388,22 +388,22 @@ static inline void s3c_irq_demux_eint(unsigned int start, unsigned int end)
388 } 388 }
389} 389}
390 390
391static void s3c_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc) 391static void s3c_irq_demux_eint0_3(struct irq_desc *desc)
392{ 392{
393 s3c_irq_demux_eint(0, 3); 393 s3c_irq_demux_eint(0, 3);
394} 394}
395 395
396static void s3c_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc) 396static void s3c_irq_demux_eint4_11(struct irq_desc *desc)
397{ 397{
398 s3c_irq_demux_eint(4, 11); 398 s3c_irq_demux_eint(4, 11);
399} 399}
400 400
401static void s3c_irq_demux_eint12_19(unsigned int irq, struct irq_desc *desc) 401static void s3c_irq_demux_eint12_19(struct irq_desc *desc)
402{ 402{
403 s3c_irq_demux_eint(12, 19); 403 s3c_irq_demux_eint(12, 19);
404} 404}
405 405
406static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc) 406static void s3c_irq_demux_eint20_27(struct irq_desc *desc)
407{ 407{
408 s3c_irq_demux_eint(20, 27); 408 s3c_irq_demux_eint(20, 27);
409} 409}
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 6d237b4f7a8e..8411985af9ff 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -166,7 +166,7 @@ static struct sa1100_port_fns neponset_port_fns = {
166 * ensure that the IRQ signal is deasserted before returning. This 166 * ensure that the IRQ signal is deasserted before returning. This
167 * is rather unfortunate. 167 * is rather unfortunate.
168 */ 168 */
169static void neponset_irq_handler(unsigned int irq, struct irq_desc *desc) 169static void neponset_irq_handler(struct irq_desc *desc)
170{ 170{
171 struct neponset_drvdata *d = irq_desc_get_handler_data(desc); 171 struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
172 unsigned int irr; 172 unsigned int irr;
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 926e336d6aeb..88734a5e10ca 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -98,76 +98,3 @@ config ARCH_SH73A0
98 98
99comment "Renesas ARM SoCs System Configuration" 99comment "Renesas ARM SoCs System Configuration"
100endif 100endif
101
102if ARCH_SHMOBILE_LEGACY
103
104comment "Renesas ARM SoCs System Type"
105
106config ARCH_R8A7778
107 bool "R-Car M1A (R8A77781)"
108 select ARCH_RCAR_GEN1
109 select ARCH_WANT_OPTIONAL_GPIOLIB
110 select ARM_GIC
111
112config ARCH_R8A7779
113 bool "R-Car H1 (R8A77790)"
114 select ARCH_RCAR_GEN1
115 select ARCH_WANT_OPTIONAL_GPIOLIB
116 select ARM_GIC
117
118comment "Renesas ARM SoCs Board Type"
119
120config MACH_BOCKW
121 bool "BOCK-W platform"
122 depends on ARCH_R8A7778
123 select ARCH_REQUIRE_GPIOLIB
124 select REGULATOR_FIXED_VOLTAGE if REGULATOR
125 select SND_SOC_AK4554 if SND_SIMPLE_CARD
126 select SND_SOC_AK4642 if SND_SIMPLE_CARD && I2C
127 select USE_OF
128
129config MACH_BOCKW_REFERENCE
130 bool "BOCK-W - Reference Device Tree Implementation"
131 depends on ARCH_R8A7778
132 select ARCH_REQUIRE_GPIOLIB
133 select REGULATOR_FIXED_VOLTAGE if REGULATOR
134 select USE_OF
135 ---help---
136 Use reference implementation of BockW board support
137 which makes use of device tree at the expense
138 of not supporting a number of devices.
139
140 This is intended to aid developers
141
142comment "Renesas ARM SoCs System Configuration"
143
144config CPU_HAS_INTEVT
145 bool
146 default y
147
148config SH_CLK_CPG
149 bool
150
151source "drivers/sh/Kconfig"
152
153endif
154
155if ARCH_SHMOBILE
156
157menu "Timer and clock configuration"
158
159config SHMOBILE_TIMER_HZ
160 int "Kernel HZ (jiffies per second)"
161 range 32 1024
162 default "128"
163 help
164 Allows the configuration of the timer frequency. It is customary
165 to have the timer interrupt run at 1000 Hz or 100 Hz, but in the
166 case of low timer frequencies other values may be more suitable.
167 Renesas ARM SoC systems using a 32768 Hz RCLK for clock events may
168 want to select a HZ value such as 128 that can evenly divide RCLK.
169 A HZ value that does not divide evenly may cause timer drift.
170
171endmenu
172
173endif
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 476de30798d7..a65c80ac9009 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common objects 5# Common objects
6obj-y := timer.o console.o 6obj-y := timer.o
7 7
8# CPU objects 8# CPU objects
9obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o 9obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o
@@ -18,12 +18,6 @@ obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o
18obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o 18obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
19obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o 19obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
20 20
21# Clock objects
22ifndef CONFIG_COMMON_CLK
23obj-y += clock.o
24obj-$(CONFIG_ARCH_R8A7778) += clock-r8a7778.o
25endif
26
27# CPU reset vector handling objects 21# CPU reset vector handling objects
28cpu-y := platsmp.o headsmp.o 22cpu-y := platsmp.o headsmp.o
29 23
@@ -49,11 +43,5 @@ obj-$(CONFIG_PM_RCAR) += pm-rcar.o
49obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o 43obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o
50obj-$(CONFIG_ARCH_RCAR_GEN2) += pm-rcar-gen2.o 44obj-$(CONFIG_ARCH_RCAR_GEN2) += pm-rcar-gen2.o
51 45
52# Board objects
53ifndef CONFIG_ARCH_SHMOBILE_MULTI
54obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
55obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
56endif
57
58# Framework support 46# Framework support
59obj-$(CONFIG_SMP) += $(smp-y) 47obj-$(CONFIG_SMP) += $(smp-y)
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
deleted file mode 100644
index a489fe9a76cd..000000000000
--- a/arch/arm/mach-shmobile/Makefile.boot
+++ /dev/null
@@ -1,12 +0,0 @@
1# per-board load address for uImage
2loadaddr-y :=
3loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
4loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
5
6__ZRELADDR := $(sort $(loadaddr-y))
7 zreladdr-y += $(__ZRELADDR)
8
9# Unsupported legacy stuff
10#
11#params_phys-y (Instead: Pass atags pointer in r2)
12#initrd_phys-y (Instead: Use compiled-in initramfs)
diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
deleted file mode 100644
index 4f78296f7d04..000000000000
--- a/arch/arm/mach-shmobile/board-bockw-reference.c
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * Bock-W board support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/of_platform.h>
18
19#include <asm/mach/arch.h>
20
21#include "common.h"
22#include "r8a7778.h"
23
24/*
25 * see board-bock.c for checking detail of dip-switch
26 */
27
28#define FPGA 0x18200000
29#define IRQ0MR 0x30
30#define COMCTLR 0x101c
31
32#define PFC 0xfffc0000
33#define PUPR4 0x110
34static void __init bockw_init(void)
35{
36 void __iomem *fpga;
37 void __iomem *pfc;
38
39#ifndef CONFIG_COMMON_CLK
40 r8a7778_clock_init();
41#endif
42 r8a7778_init_irq_extpin_dt(1);
43 r8a7778_add_dt_devices();
44
45 fpga = ioremap_nocache(FPGA, SZ_1M);
46 if (fpga) {
47 /*
48 * CAUTION
49 *
50 * IRQ0/1 is cascaded interrupt from FPGA.
51 * it should be cared in the future
52 * Now, it is assuming IRQ0 was used only from SMSC.
53 */
54 u16 val = ioread16(fpga + IRQ0MR);
55 val &= ~(1 << 4); /* enable SMSC911x */
56 iowrite16(val, fpga + IRQ0MR);
57
58 iounmap(fpga);
59 }
60
61 pfc = ioremap_nocache(PFC, 0x200);
62 if (pfc) {
63 /*
64 * FIXME
65 *
66 * SDHI CD/WP pin needs pull-up
67 */
68 iowrite32(ioread32(pfc + PUPR4) | (3 << 26), pfc + PUPR4);
69 iounmap(pfc);
70 }
71
72 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
73}
74
75static const char *const bockw_boards_compat_dt[] __initconst = {
76 "renesas,bockw-reference",
77 NULL,
78};
79
80DT_MACHINE_START(BOCKW_DT, "bockw")
81 .init_early = shmobile_init_delay,
82 .init_irq = r8a7778_init_irq_dt,
83 .init_machine = bockw_init,
84 .init_late = shmobile_init_late,
85 .dt_compat = bockw_boards_compat_dt,
86MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
deleted file mode 100644
index 25a0e7233fe4..000000000000
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ /dev/null
@@ -1,737 +0,0 @@
1/*
2 * Bock-W board support
3 *
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 * Copyright (C) 2013-2014 Cogent Embedded, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/mfd/tmio.h>
19#include <linux/mmc/host.h>
20#include <linux/mmc/sh_mobile_sdhi.h>
21#include <linux/mmc/sh_mmcif.h>
22#include <linux/mtd/partitions.h>
23#include <linux/pinctrl/machine.h>
24#include <linux/platform_data/camera-rcar.h>
25#include <linux/platform_data/usb-rcar-phy.h>
26#include <linux/platform_device.h>
27#include <linux/regulator/fixed.h>
28#include <linux/regulator/machine.h>
29#include <linux/smsc911x.h>
30#include <linux/spi/spi.h>
31#include <linux/spi/flash.h>
32#include <linux/usb/renesas_usbhs.h>
33
34#include <media/soc_camera.h>
35#include <asm/mach/arch.h>
36#include <sound/rcar_snd.h>
37#include <sound/simple_card.h>
38
39#include "common.h"
40#include "irqs.h"
41#include "r8a7778.h"
42
43#define FPGA 0x18200000
44#define IRQ0MR 0x30
45#define COMCTLR 0x101c
46static void __iomem *fpga;
47
48/*
49 * CN9(Upper side) SCIF/RCAN selection
50 *
51 * 1,4 3,6
52 * SW40 SCIF RCAN
53 * SW41 SCIF RCAN
54 */
55
56/*
57 * MMC (CN26) pin
58 *
59 * SW6 (D2) 3 pin
60 * SW7 (D5) ON
61 * SW8 (D3) 3 pin
62 * SW10 (D4) 1 pin
63 * SW12 (CLK) 1 pin
64 * SW13 (D6) 3 pin
65 * SW14 (CMD) ON
66 * SW15 (D6) 1 pin
67 * SW16 (D0) ON
68 * SW17 (D1) ON
69 * SW18 (D7) 3 pin
70 * SW19 (MMC) 1 pin
71 */
72
73/*
74 * SSI settings
75 *
76 * SW45: 1-4 side (SSI5 out, ROUT/LOUT CN19 Mid)
77 * SW46: 1101 (SSI6 Recorde)
78 * SW47: 1110 (SSI5 Playback)
79 * SW48: 11 (Recorde power)
80 * SW49: 1 (SSI slave mode)
81 * SW50: 1111 (SSI7, SSI8)
82 * SW51: 1111 (SSI3, SSI4)
83 * SW54: 1pin (ak4554 FPGA control)
84 * SW55: 1 (CLKB is 24.5760MHz)
85 * SW60: 1pin (ak4554 FPGA control)
86 * SW61: 3pin (use X11 clock)
87 * SW78: 3-6 (ak4642 connects I2C0)
88 *
89 * You can use sound as
90 *
91 * hw0: CN19: SSI56-AK4643
92 * hw1: CN21: SSI3-AK4554(playback)
93 * hw2: CN21: SSI4-AK4554(capture)
94 * hw3: CN20: SSI7-AK4554(playback)
95 * hw4: CN20: SSI8-AK4554(capture)
96 *
97 * this command is required when playback on hw0.
98 *
99 * # amixer set "LINEOUT Mixer DACL" on
100 */
101
102/*
103 * USB
104 *
105 * USB1 (CN29) can be Host/Function
106 *
107 * Host Func
108 * SW98 1 2
109 * SW99 1 3
110 */
111
112/* Dummy supplies, where voltage doesn't matter */
113static struct regulator_consumer_supply dummy_supplies[] = {
114 REGULATOR_SUPPLY("vddvario", "smsc911x"),
115 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
116};
117
118static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
119 REGULATOR_SUPPLY("vmmc", "sh_mmcif"),
120 REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
121};
122
123static struct smsc911x_platform_config smsc911x_data __initdata = {
124 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
125 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
126 .flags = SMSC911X_USE_32BIT,
127 .phy_interface = PHY_INTERFACE_MODE_MII,
128};
129
130static struct resource smsc911x_resources[] __initdata = {
131 DEFINE_RES_MEM(0x18300000, 0x1000),
132 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
133};
134
135#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
136/*
137 * When USB1 is Func
138 */
139static int usbhsf_get_id(struct platform_device *pdev)
140{
141 return USBHS_GADGET;
142}
143
144#define SUSPMODE 0x102
145static int usbhsf_power_ctrl(struct platform_device *pdev,
146 void __iomem *base, int enable)
147{
148 enable = !!enable;
149
150 r8a7778_usb_phy_power(enable);
151
152 iowrite16(enable << 14, base + SUSPMODE);
153
154 return 0;
155}
156
157static struct resource usbhsf_resources[] __initdata = {
158 DEFINE_RES_MEM(0xffe60000, 0x110),
159 DEFINE_RES_IRQ(gic_iid(0x4f)),
160};
161
162static struct renesas_usbhs_platform_info usbhs_info __initdata = {
163 .platform_callback = {
164 .get_id = usbhsf_get_id,
165 .power_ctrl = usbhsf_power_ctrl,
166 },
167 .driver_param = {
168 .buswait_bwait = 4,
169 .d0_tx_id = HPBDMA_SLAVE_USBFUNC_TX,
170 .d1_rx_id = HPBDMA_SLAVE_USBFUNC_RX,
171 },
172};
173
174#define USB_PHY_SETTING {.port1_func = 1, .ovc_pin[1].active_high = 1,}
175#define USB1_DEVICE "renesas_usbhs"
176#define ADD_USB_FUNC_DEVICE_IF_POSSIBLE() \
177 platform_device_register_resndata( \
178 NULL, "renesas_usbhs", -1, \
179 usbhsf_resources, \
180 ARRAY_SIZE(usbhsf_resources), \
181 &usbhs_info, sizeof(struct renesas_usbhs_platform_info))
182
183#else
184/*
185 * When USB1 is Host
186 */
187#define USB_PHY_SETTING { }
188#define USB1_DEVICE "ehci-platform"
189#define ADD_USB_FUNC_DEVICE_IF_POSSIBLE()
190
191#endif
192
193/* USB */
194static struct resource usb_phy_resources[] __initdata = {
195 DEFINE_RES_MEM(0xffe70800, 0x100),
196 DEFINE_RES_MEM(0xffe76000, 0x100),
197};
198
199static struct rcar_phy_platform_data usb_phy_platform_data __initdata =
200 USB_PHY_SETTING;
201
202
203/* SDHI */
204static struct tmio_mmc_data sdhi0_info __initdata = {
205 .chan_priv_tx = (void *)HPBDMA_SLAVE_SDHI0_TX,
206 .chan_priv_rx = (void *)HPBDMA_SLAVE_SDHI0_RX,
207 .capabilities = MMC_CAP_SD_HIGHSPEED,
208 .ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
209 .flags = TMIO_MMC_HAS_IDLE_WAIT,
210};
211
212static struct resource sdhi0_resources[] __initdata = {
213 DEFINE_RES_MEM(0xFFE4C000, 0x100),
214 DEFINE_RES_IRQ(gic_iid(0x77)),
215};
216
217/* Ether */
218static struct resource ether_resources[] __initdata = {
219 DEFINE_RES_MEM(0xfde00000, 0x400),
220 DEFINE_RES_IRQ(gic_iid(0x89)),
221};
222
223static struct sh_eth_plat_data ether_platform_data __initdata = {
224 .phy = 0x01,
225 .edmac_endian = EDMAC_LITTLE_ENDIAN,
226 .phy_interface = PHY_INTERFACE_MODE_RMII,
227 /*
228 * Although the LINK signal is available on the board, it's connected to
229 * the link/activity LED output of the PHY, thus the link disappears and
230 * reappears after each packet. We'd be better off ignoring such signal
231 * and getting the link state from the PHY indirectly.
232 */
233 .no_ether_link = 1,
234};
235
236static struct platform_device_info ether_info __initdata = {
237 .name = "r8a777x-ether",
238 .id = -1,
239 .res = ether_resources,
240 .num_res = ARRAY_SIZE(ether_resources),
241 .data = &ether_platform_data,
242 .size_data = sizeof(ether_platform_data),
243 .dma_mask = DMA_BIT_MASK(32),
244};
245
246/* I2C */
247static struct i2c_board_info i2c0_devices[] = {
248 {
249 I2C_BOARD_INFO("rx8581", 0x51),
250 }, {
251 I2C_BOARD_INFO("ak4643", 0x12),
252 }
253};
254
255/* HSPI*/
256static struct mtd_partition m25p80_spi_flash_partitions[] = {
257 {
258 .name = "data(spi)",
259 .size = 0x0100000,
260 .offset = 0,
261 },
262};
263
264static struct flash_platform_data spi_flash_data = {
265 .name = "m25p80",
266 .type = "s25fl008k",
267 .parts = m25p80_spi_flash_partitions,
268 .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
269};
270
271static struct spi_board_info spi_board_info[] __initdata = {
272 {
273 .modalias = "m25p80",
274 .max_speed_hz = 104000000,
275 .chip_select = 0,
276 .bus_num = 0,
277 .mode = SPI_MODE_0,
278 .platform_data = &spi_flash_data,
279 },
280};
281
282/* MMC */
283static struct resource mmc_resources[] __initdata = {
284 DEFINE_RES_MEM(0xffe4e000, 0x100),
285 DEFINE_RES_IRQ(gic_iid(0x5d)),
286};
287
288static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
289 .sup_pclk = 0,
290 .caps = MMC_CAP_4_BIT_DATA |
291 MMC_CAP_8_BIT_DATA |
292 MMC_CAP_NEEDS_POLL,
293};
294
295/* In the default configuration both decoders reside on I2C bus 0 */
296#define BOCKW_CAMERA(idx) \
297static struct i2c_board_info camera##idx##_info = { \
298 I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)), \
299}; \
300 \
301static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = { \
302 .bus_id = idx, \
303 .i2c_adapter_id = 0, \
304 .board_info = &camera##idx##_info, \
305}
306
307BOCKW_CAMERA(0);
308BOCKW_CAMERA(1);
309
310/* VIN */
311static struct rcar_vin_platform_data vin_platform_data __initdata = {
312 .flags = RCAR_VIN_BT656,
313};
314
315#define R8A7778_VIN(idx) \
316static struct resource vin##idx##_resources[] __initdata = { \
317 DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \
318 DEFINE_RES_IRQ(gic_iid(0x5a)), \
319}; \
320 \
321static struct platform_device_info vin##idx##_info __initdata = { \
322 .name = "r8a7778-vin", \
323 .id = idx, \
324 .res = vin##idx##_resources, \
325 .num_res = ARRAY_SIZE(vin##idx##_resources), \
326 .dma_mask = DMA_BIT_MASK(32), \
327 .data = &vin_platform_data, \
328 .size_data = sizeof(vin_platform_data), \
329}
330R8A7778_VIN(0);
331R8A7778_VIN(1);
332
333/* Sound */
334static struct resource rsnd_resources[] __initdata = {
335 [RSND_GEN1_SRU] = DEFINE_RES_MEM(0xffd90000, 0x1000),
336 [RSND_GEN1_SSI] = DEFINE_RES_MEM(0xffd91000, 0x1240),
337 [RSND_GEN1_ADG] = DEFINE_RES_MEM(0xfffe0000, 0x24),
338};
339
340static struct rsnd_ssi_platform_info rsnd_ssi[] = {
341 RSND_SSI_UNUSED, /* SSI 0 */
342 RSND_SSI_UNUSED, /* SSI 1 */
343 RSND_SSI_UNUSED, /* SSI 2 */
344 RSND_SSI(HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), 0),
345 RSND_SSI(HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
346 RSND_SSI(HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), 0),
347 RSND_SSI(HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
348 RSND_SSI(HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), 0),
349 RSND_SSI(HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
350};
351
352static struct rsnd_src_platform_info rsnd_src[9] = {
353 RSND_SRC_UNUSED, /* SRU 0 */
354 RSND_SRC_UNUSED, /* SRU 1 */
355 RSND_SRC_UNUSED, /* SRU 2 */
356 RSND_SRC(0, 0),
357 RSND_SRC(0, 0),
358 RSND_SRC(0, 0),
359 RSND_SRC(0, 0),
360 RSND_SRC(0, 0),
361 RSND_SRC(0, 0),
362};
363
364static struct rsnd_dai_platform_info rsnd_dai[] = {
365 {
366 .playback = { .ssi = &rsnd_ssi[5], .src = &rsnd_src[5] },
367 .capture = { .ssi = &rsnd_ssi[6], .src = &rsnd_src[6] },
368 }, {
369 .playback = { .ssi = &rsnd_ssi[3], .src = &rsnd_src[3] },
370 }, {
371 .capture = { .ssi = &rsnd_ssi[4], .src = &rsnd_src[4] },
372 }, {
373 .playback = { .ssi = &rsnd_ssi[7], .src = &rsnd_src[7] },
374 }, {
375 .capture = { .ssi = &rsnd_ssi[8], .src = &rsnd_src[8] },
376 },
377};
378
379enum {
380 AK4554_34 = 0,
381 AK4643_56,
382 AK4554_78,
383 SOUND_MAX,
384};
385
386static int rsnd_codec_power(int id, int enable)
387{
388 static int sound_user[SOUND_MAX] = {0, 0, 0};
389 int *usr = NULL;
390 u32 bit;
391
392 switch (id) {
393 case 3:
394 case 4:
395 usr = sound_user + AK4554_34;
396 bit = (1 << 10);
397 break;
398 case 5:
399 case 6:
400 usr = sound_user + AK4643_56;
401 bit = (1 << 6);
402 break;
403 case 7:
404 case 8:
405 usr = sound_user + AK4554_78;
406 bit = (1 << 7);
407 break;
408 }
409
410 if (!usr)
411 return -EIO;
412
413 if (enable) {
414 if (*usr == 0) {
415 u32 val = ioread16(fpga + COMCTLR);
416 val &= ~bit;
417 iowrite16(val, fpga + COMCTLR);
418 }
419
420 (*usr)++;
421 } else {
422 if (*usr == 0)
423 return 0;
424
425 (*usr)--;
426
427 if (*usr == 0) {
428 u32 val = ioread16(fpga + COMCTLR);
429 val |= bit;
430 iowrite16(val, fpga + COMCTLR);
431 }
432 }
433
434 return 0;
435}
436
437static int rsnd_start(int id)
438{
439 return rsnd_codec_power(id, 1);
440}
441
442static int rsnd_stop(int id)
443{
444 return rsnd_codec_power(id, 0);
445}
446
447static struct rcar_snd_info rsnd_info = {
448 .flags = RSND_GEN1,
449 .ssi_info = rsnd_ssi,
450 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
451 .src_info = rsnd_src,
452 .src_info_nr = ARRAY_SIZE(rsnd_src),
453 .dai_info = rsnd_dai,
454 .dai_info_nr = ARRAY_SIZE(rsnd_dai),
455 .start = rsnd_start,
456 .stop = rsnd_stop,
457};
458
459static struct asoc_simple_card_info rsnd_card_info[] = {
460 /* SSI5, SSI6 */
461 {
462 .name = "AK4643",
463 .card = "SSI56-AK4643",
464 .codec = "ak4642-codec.0-0012",
465 .platform = "rcar_sound",
466 .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
467 .cpu_dai = {
468 .name = "rsnd-dai.0",
469 },
470 .codec_dai = {
471 .name = "ak4642-hifi",
472 .sysclk = 11289600,
473 },
474 },
475 /* SSI3 */
476 {
477 .name = "AK4554",
478 .card = "SSI3-AK4554(playback)",
479 .codec = "ak4554-adc-dac.0",
480 .platform = "rcar_sound",
481 .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_RIGHT_J,
482 .cpu_dai = {
483 .name = "rsnd-dai.1",
484 },
485 .codec_dai = {
486 .name = "ak4554-hifi",
487 },
488 },
489 /* SSI4 */
490 {
491 .name = "AK4554",
492 .card = "SSI4-AK4554(capture)",
493 .codec = "ak4554-adc-dac.0",
494 .platform = "rcar_sound",
495 .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_LEFT_J,
496 .cpu_dai = {
497 .name = "rsnd-dai.2",
498 },
499 .codec_dai = {
500 .name = "ak4554-hifi",
501 },
502 },
503 /* SSI7 */
504 {
505 .name = "AK4554",
506 .card = "SSI7-AK4554(playback)",
507 .codec = "ak4554-adc-dac.1",
508 .platform = "rcar_sound",
509 .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_RIGHT_J,
510 .cpu_dai = {
511 .name = "rsnd-dai.3",
512 },
513 .codec_dai = {
514 .name = "ak4554-hifi",
515 },
516 },
517 /* SSI8 */
518 {
519 .name = "AK4554",
520 .card = "SSI8-AK4554(capture)",
521 .codec = "ak4554-adc-dac.1",
522 .platform = "rcar_sound",
523 .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_LEFT_J,
524 .cpu_dai = {
525 .name = "rsnd-dai.4",
526 },
527 .codec_dai = {
528 .name = "ak4554-hifi",
529 },
530 }
531};
532
533static const struct pinctrl_map bockw_pinctrl_map[] = {
534 /* AUDIO */
535 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
536 "audio_clk_a", "audio_clk"),
537 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
538 "audio_clk_b", "audio_clk"),
539 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
540 "ssi34_ctrl", "ssi"),
541 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
542 "ssi3_data", "ssi"),
543 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
544 "ssi4_data", "ssi"),
545 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
546 "ssi5_ctrl", "ssi"),
547 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
548 "ssi5_data", "ssi"),
549 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
550 "ssi6_ctrl", "ssi"),
551 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
552 "ssi6_data", "ssi"),
553 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
554 "ssi78_ctrl", "ssi"),
555 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
556 "ssi7_data", "ssi"),
557 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
558 "ssi8_data", "ssi"),
559 /* Ether */
560 PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
561 "ether_rmii", "ether"),
562 /* HSPI0 */
563 PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
564 "hspi0_a", "hspi0"),
565 /* MMC */
566 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
567 "mmc_data8", "mmc"),
568 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
569 "mmc_ctrl", "mmc"),
570 /* SCIF0 */
571 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
572 "scif0_data_a", "scif0"),
573 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
574 "scif0_ctrl", "scif0"),
575 /* USB */
576 PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
577 "usb0", "usb0"),
578 PIN_MAP_MUX_GROUP_DEFAULT(USB1_DEVICE, "pfc-r8a7778",
579 "usb1", "usb1"),
580 /* SDHI0 */
581 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
582 "sdhi0_data4", "sdhi0"),
583 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
584 "sdhi0_ctrl", "sdhi0"),
585 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
586 "sdhi0_cd", "sdhi0"),
587 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
588 "sdhi0_wp", "sdhi0"),
589 /* VIN0 */
590 PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
591 "vin0_clk", "vin0"),
592 PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
593 "vin0_data8", "vin0"),
594 /* VIN1 */
595 PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
596 "vin1_clk", "vin1"),
597 PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
598 "vin1_data8", "vin1"),
599};
600
601#define PFC 0xfffc0000
602#define PUPR4 0x110
603static void __init bockw_init(void)
604{
605 void __iomem *base;
606 struct clk *clk;
607 struct platform_device *pdev;
608 int i;
609
610 r8a7778_clock_init();
611 r8a7778_init_irq_extpin(1);
612 r8a7778_add_standard_devices();
613
614 platform_device_register_full(&ether_info);
615
616 platform_device_register_full(&vin0_info);
617 /* VIN1 has a pin conflict with Ether */
618 if (!IS_ENABLED(CONFIG_SH_ETH))
619 platform_device_register_full(&vin1_info);
620 platform_device_register_data(NULL, "soc-camera-pdrv", 0,
621 &iclink0_ml86v7667,
622 sizeof(iclink0_ml86v7667));
623 platform_device_register_data(NULL, "soc-camera-pdrv", 1,
624 &iclink1_ml86v7667,
625 sizeof(iclink1_ml86v7667));
626
627 i2c_register_board_info(0, i2c0_devices,
628 ARRAY_SIZE(i2c0_devices));
629 spi_register_board_info(spi_board_info,
630 ARRAY_SIZE(spi_board_info));
631 pinctrl_register_mappings(bockw_pinctrl_map,
632 ARRAY_SIZE(bockw_pinctrl_map));
633 r8a7778_pinmux_init();
634
635 platform_device_register_resndata(
636 NULL, "sh_mmcif", -1,
637 mmc_resources, ARRAY_SIZE(mmc_resources),
638 &sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
639
640 platform_device_register_resndata(
641 NULL, "rcar_usb_phy", -1,
642 usb_phy_resources,
643 ARRAY_SIZE(usb_phy_resources),
644 &usb_phy_platform_data,
645 sizeof(struct rcar_phy_platform_data));
646
647 regulator_register_fixed(0, dummy_supplies,
648 ARRAY_SIZE(dummy_supplies));
649 regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
650 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
651
652 /* for SMSC */
653 fpga = ioremap_nocache(FPGA, SZ_1M);
654 if (fpga) {
655 /*
656 * CAUTION
657 *
658 * IRQ0/1 is cascaded interrupt from FPGA.
659 * it should be cared in the future
660 * Now, it is assuming IRQ0 was used only from SMSC.
661 */
662 u16 val = ioread16(fpga + IRQ0MR);
663 val &= ~(1 << 4); /* enable SMSC911x */
664 iowrite16(val, fpga + IRQ0MR);
665
666 platform_device_register_resndata(
667 NULL, "smsc911x", -1,
668 smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
669 &smsc911x_data, sizeof(smsc911x_data));
670 }
671
672 /* for SDHI */
673 base = ioremap_nocache(PFC, 0x200);
674 if (base) {
675 /*
676 * FIXME
677 *
678 * SDHI CD/WP pin needs pull-up
679 */
680 iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
681 iounmap(base);
682
683 platform_device_register_resndata(
684 NULL, "sh_mobile_sdhi", 0,
685 sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
686 &sdhi0_info, sizeof(struct tmio_mmc_data));
687 }
688
689 /* for Audio */
690 rsnd_codec_power(5, 1); /* enable ak4642 */
691
692 platform_device_register_simple(
693 "ak4554-adc-dac", 0, NULL, 0);
694
695 platform_device_register_simple(
696 "ak4554-adc-dac", 1, NULL, 0);
697
698 pdev = platform_device_register_resndata(
699 NULL, "rcar_sound", -1,
700 rsnd_resources, ARRAY_SIZE(rsnd_resources),
701 &rsnd_info, sizeof(rsnd_info));
702
703 clk = clk_get(&pdev->dev, "clk_b");
704 clk_set_rate(clk, 24576000);
705 clk_put(clk);
706
707 for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
708 struct platform_device_info cardinfo = {
709 .name = "asoc-simple-card",
710 .id = i,
711 .data = &rsnd_card_info[i],
712 .size_data = sizeof(struct asoc_simple_card_info),
713 .dma_mask = DMA_BIT_MASK(32),
714 };
715
716 platform_device_register_full(&cardinfo);
717 }
718}
719
720static void __init bockw_init_late(void)
721{
722 r8a7778_init_late();
723 ADD_USB_FUNC_DEVICE_IF_POSSIBLE();
724}
725
726static const char *const bockw_boards_compat_dt[] __initconst = {
727 "renesas,bockw",
728 NULL,
729};
730
731DT_MACHINE_START(BOCKW_DT, "bockw")
732 .init_early = shmobile_init_delay,
733 .init_irq = r8a7778_init_irq_dt,
734 .init_machine = bockw_init,
735 .dt_compat = bockw_boards_compat_dt,
736 .init_late = bockw_init_late,
737MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
deleted file mode 100644
index e8510c35558c..000000000000
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ /dev/null
@@ -1,342 +0,0 @@
1/*
2 * r8a7778 clock framework support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * based on r8a7779
8 *
9 * Copyright (C) 2011 Renesas Solutions Corp.
10 * Copyright (C) 2011 Magnus Damm
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 */
21
22/*
23 * MD MD MD MD PLLA PLLB EXTAL clki clkz
24 * 19 18 12 11 (HMz) (MHz) (MHz)
25 *----------------------------------------------------------------------------
26 * 1 0 0 0 x21 x21 38.00 800 800
27 * 1 0 0 1 x24 x24 33.33 800 800
28 * 1 0 1 0 x28 x28 28.50 800 800
29 * 1 0 1 1 x32 x32 25.00 800 800
30 * 1 1 0 1 x24 x21 33.33 800 700
31 * 1 1 1 0 x28 x21 28.50 800 600
32 * 1 1 1 1 x32 x24 25.00 800 600
33 */
34
35#include <linux/io.h>
36#include <linux/sh_clk.h>
37#include <linux/clkdev.h>
38#include "clock.h"
39#include "common.h"
40
41#define MSTPCR0 IOMEM(0xffc80030)
42#define MSTPCR1 IOMEM(0xffc80034)
43#define MSTPCR3 IOMEM(0xffc8003c)
44#define MSTPSR1 IOMEM(0xffc80044)
45#define MSTPSR4 IOMEM(0xffc80048)
46#define MSTPSR6 IOMEM(0xffc8004c)
47#define MSTPCR4 IOMEM(0xffc80050)
48#define MSTPCR5 IOMEM(0xffc80054)
49#define MSTPCR6 IOMEM(0xffc80058)
50#define MODEMR 0xFFCC0020
51
52#define MD(nr) BIT(nr)
53
54/* ioremap() through clock mapping mandatory to avoid
55 * collision with ARM coherent DMA virtual memory range.
56 */
57
58static struct clk_mapping cpg_mapping = {
59 .phys = 0xffc80000,
60 .len = 0x80,
61};
62
63static struct clk extal_clk = {
64 /* .rate will be updated on r8a7778_clock_init() */
65 .mapping = &cpg_mapping,
66};
67
68static struct clk audio_clk_a = {
69};
70
71static struct clk audio_clk_b = {
72};
73
74static struct clk audio_clk_c = {
75};
76
77/*
78 * clock ratio of these clock will be updated
79 * on r8a7778_clock_init()
80 */
81SH_FIXED_RATIO_CLK_SET(plla_clk, extal_clk, 1, 1);
82SH_FIXED_RATIO_CLK_SET(pllb_clk, extal_clk, 1, 1);
83SH_FIXED_RATIO_CLK_SET(i_clk, plla_clk, 1, 1);
84SH_FIXED_RATIO_CLK_SET(s_clk, plla_clk, 1, 1);
85SH_FIXED_RATIO_CLK_SET(s1_clk, plla_clk, 1, 1);
86SH_FIXED_RATIO_CLK_SET(s3_clk, plla_clk, 1, 1);
87SH_FIXED_RATIO_CLK_SET(s4_clk, plla_clk, 1, 1);
88SH_FIXED_RATIO_CLK_SET(b_clk, plla_clk, 1, 1);
89SH_FIXED_RATIO_CLK_SET(out_clk, plla_clk, 1, 1);
90SH_FIXED_RATIO_CLK_SET(p_clk, plla_clk, 1, 1);
91SH_FIXED_RATIO_CLK_SET(g_clk, plla_clk, 1, 1);
92SH_FIXED_RATIO_CLK_SET(z_clk, pllb_clk, 1, 1);
93
94static struct clk *main_clks[] = {
95 &extal_clk,
96 &plla_clk,
97 &pllb_clk,
98 &i_clk,
99 &s_clk,
100 &s1_clk,
101 &s3_clk,
102 &s4_clk,
103 &b_clk,
104 &out_clk,
105 &p_clk,
106 &g_clk,
107 &z_clk,
108 &audio_clk_a,
109 &audio_clk_b,
110 &audio_clk_c,
111};
112
113enum {
114 MSTP531, MSTP530,
115 MSTP529, MSTP528, MSTP527, MSTP526, MSTP525, MSTP524, MSTP523,
116 MSTP331,
117 MSTP323, MSTP322, MSTP321,
118 MSTP311, MSTP310,
119 MSTP309, MSTP308, MSTP307,
120 MSTP114,
121 MSTP110, MSTP109,
122 MSTP100,
123 MSTP030,
124 MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
125 MSTP016, MSTP015, MSTP012, MSTP011, MSTP010,
126 MSTP009, MSTP008, MSTP007,
127 MSTP_NR };
128
129static struct clk mstp_clks[MSTP_NR] = {
130 [MSTP531] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 31, 0), /* SCU0 */
131 [MSTP530] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 30, 0), /* SCU1 */
132 [MSTP529] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 29, 0), /* SCU2 */
133 [MSTP528] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 28, 0), /* SCU3 */
134 [MSTP527] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 27, 0), /* SCU4 */
135 [MSTP526] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 26, 0), /* SCU5 */
136 [MSTP525] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 25, 0), /* SCU6 */
137 [MSTP524] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 24, 0), /* SCU7 */
138 [MSTP523] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 23, 0), /* SCU8 */
139 [MSTP331] = SH_CLK_MSTP32(&s4_clk, MSTPCR3, 31, 0), /* MMC */
140 [MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
141 [MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
142 [MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
143 [MSTP311] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 11, 0), /* SSI4 */
144 [MSTP310] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 10, 0), /* SSI5 */
145 [MSTP309] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 9, 0), /* SSI6 */
146 [MSTP308] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 8, 0), /* SSI7 */
147 [MSTP307] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 7, 0), /* SSI8 */
148 [MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
149 [MSTP110] = SH_CLK_MSTP32(&s_clk, MSTPCR1, 10, 0), /* VIN0 */
150 [MSTP109] = SH_CLK_MSTP32(&s_clk, MSTPCR1, 9, 0), /* VIN1 */
151 [MSTP100] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 0, 0), /* USB0/1 */
152 [MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */
153 [MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */
154 [MSTP028] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 28, 0), /* I2C2 */
155 [MSTP027] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 27, 0), /* I2C3 */
156 [MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */
157 [MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */
158 [MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */
159 [MSTP023] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 23, 0), /* SCIF3 */
160 [MSTP022] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 22, 0), /* SCIF4 */
161 [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */
162 [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */
163 [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */
164 [MSTP012] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 12, 0), /* SSI0 */
165 [MSTP011] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 11, 0), /* SSI1 */
166 [MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */
167 [MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 9, 0), /* SSI3 */
168 [MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 8, 0), /* SRU */
169 [MSTP007] = SH_CLK_MSTP32(&s_clk, MSTPCR0, 7, 0), /* HSPI */
170};
171
172static struct clk_lookup lookups[] = {
173 /* main */
174 CLKDEV_CON_ID("shyway_clk", &s_clk),
175 CLKDEV_CON_ID("peripheral_clk", &p_clk),
176
177 /* MSTP32 clocks */
178 CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
179 CLKDEV_DEV_ID("ffe4e000.mmc", &mstp_clks[MSTP331]), /* MMC */
180 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
181 CLKDEV_DEV_ID("ffe4c000.sd", &mstp_clks[MSTP323]), /* SDHI0 */
182 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
183 CLKDEV_DEV_ID("ffe4d000.sd", &mstp_clks[MSTP322]), /* SDHI1 */
184 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
185 CLKDEV_DEV_ID("ffe4f000.sd", &mstp_clks[MSTP321]), /* SDHI2 */
186 CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
187 CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
188 CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
189 CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
190 CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
191 CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP100]), /* USB FUNC */
192 CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
193 CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
194 CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
195 CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
196 CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
197 CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
198 CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
199 CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
200 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
201 CLKDEV_DEV_ID("ffe40000.serial", &mstp_clks[MSTP026]), /* SCIF0 */
202 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
203 CLKDEV_DEV_ID("ffe41000.serial", &mstp_clks[MSTP025]), /* SCIF1 */
204 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
205 CLKDEV_DEV_ID("ffe42000.serial", &mstp_clks[MSTP024]), /* SCIF2 */
206 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
207 CLKDEV_DEV_ID("ffe43000.serial", &mstp_clks[MSTP023]), /* SCIF3 */
208 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
209 CLKDEV_DEV_ID("ffe44000.serial", &mstp_clks[MSTP022]), /* SCIF4 */
210 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
211 CLKDEV_DEV_ID("ffe45000.serial", &mstp_clks[MSTP021]), /* SCIF5 */
212 CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
213 CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
214 CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
215 CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
216 CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
217 CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
218 CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
219
220 CLKDEV_ICK_ID("clk_a", "rcar_sound", &audio_clk_a),
221 CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b),
222 CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c),
223 CLKDEV_ICK_ID("clk_i", "rcar_sound", &s1_clk),
224 CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),
225 CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP011]),
226 CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP010]),
227 CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP009]),
228 CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP311]),
229 CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP310]),
230 CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
231 CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
232 CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
233 CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP531]),
234 CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP530]),
235 CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP529]),
236 CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP528]),
237 CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP527]),
238 CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP526]),
239 CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP525]),
240 CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP524]),
241 CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP523]),
242 CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]),
243 CLKDEV_ICK_ID("fck", "ffd80000.timer", &mstp_clks[MSTP016]),
244 CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP015]),
245 CLKDEV_ICK_ID("fck", "ffd81000.timer", &mstp_clks[MSTP015]),
246};
247
248void __init r8a7778_clock_init(void)
249{
250 void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
251 u32 mode;
252 int k, ret = 0;
253
254 BUG_ON(!modemr);
255 mode = ioread32(modemr);
256 iounmap(modemr);
257
258 switch (mode & (MD(19) | MD(18) | MD(12) | MD(11))) {
259 case MD(19):
260 extal_clk.rate = 38000000;
261 SH_CLK_SET_RATIO(&plla_clk_ratio, 21, 1);
262 SH_CLK_SET_RATIO(&pllb_clk_ratio, 21, 1);
263 break;
264 case MD(19) | MD(11):
265 extal_clk.rate = 33333333;
266 SH_CLK_SET_RATIO(&plla_clk_ratio, 24, 1);
267 SH_CLK_SET_RATIO(&pllb_clk_ratio, 24, 1);
268 break;
269 case MD(19) | MD(12):
270 extal_clk.rate = 28500000;
271 SH_CLK_SET_RATIO(&plla_clk_ratio, 28, 1);
272 SH_CLK_SET_RATIO(&pllb_clk_ratio, 28, 1);
273 break;
274 case MD(19) | MD(12) | MD(11):
275 extal_clk.rate = 25000000;
276 SH_CLK_SET_RATIO(&plla_clk_ratio, 32, 1);
277 SH_CLK_SET_RATIO(&pllb_clk_ratio, 32, 1);
278 break;
279 case MD(19) | MD(18) | MD(11):
280 extal_clk.rate = 33333333;
281 SH_CLK_SET_RATIO(&plla_clk_ratio, 24, 1);
282 SH_CLK_SET_RATIO(&pllb_clk_ratio, 21, 1);
283 break;
284 case MD(19) | MD(18) | MD(12):
285 extal_clk.rate = 28500000;
286 SH_CLK_SET_RATIO(&plla_clk_ratio, 28, 1);
287 SH_CLK_SET_RATIO(&pllb_clk_ratio, 21, 1);
288 break;
289 case MD(19) | MD(18) | MD(12) | MD(11):
290 extal_clk.rate = 25000000;
291 SH_CLK_SET_RATIO(&plla_clk_ratio, 32, 1);
292 SH_CLK_SET_RATIO(&pllb_clk_ratio, 24, 1);
293 break;
294 default:
295 BUG();
296 }
297
298 if (mode & MD(1)) {
299 SH_CLK_SET_RATIO(&i_clk_ratio, 1, 1);
300 SH_CLK_SET_RATIO(&s_clk_ratio, 1, 3);
301 SH_CLK_SET_RATIO(&s1_clk_ratio, 1, 6);
302 SH_CLK_SET_RATIO(&s3_clk_ratio, 1, 4);
303 SH_CLK_SET_RATIO(&s4_clk_ratio, 1, 8);
304 SH_CLK_SET_RATIO(&p_clk_ratio, 1, 12);
305 SH_CLK_SET_RATIO(&g_clk_ratio, 1, 12);
306 if (mode & MD(2)) {
307 SH_CLK_SET_RATIO(&b_clk_ratio, 1, 18);
308 SH_CLK_SET_RATIO(&out_clk_ratio, 1, 18);
309 } else {
310 SH_CLK_SET_RATIO(&b_clk_ratio, 1, 12);
311 SH_CLK_SET_RATIO(&out_clk_ratio, 1, 12);
312 }
313 } else {
314 SH_CLK_SET_RATIO(&i_clk_ratio, 1, 1);
315 SH_CLK_SET_RATIO(&s_clk_ratio, 1, 4);
316 SH_CLK_SET_RATIO(&s1_clk_ratio, 1, 8);
317 SH_CLK_SET_RATIO(&s3_clk_ratio, 1, 4);
318 SH_CLK_SET_RATIO(&s4_clk_ratio, 1, 8);
319 SH_CLK_SET_RATIO(&p_clk_ratio, 1, 16);
320 SH_CLK_SET_RATIO(&g_clk_ratio, 1, 12);
321 if (mode & MD(2)) {
322 SH_CLK_SET_RATIO(&b_clk_ratio, 1, 16);
323 SH_CLK_SET_RATIO(&out_clk_ratio, 1, 16);
324 } else {
325 SH_CLK_SET_RATIO(&b_clk_ratio, 1, 12);
326 SH_CLK_SET_RATIO(&out_clk_ratio, 1, 12);
327 }
328 }
329
330 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
331 ret = clk_register(main_clks[k]);
332
333 if (!ret)
334 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
335
336 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
337
338 if (!ret)
339 shmobile_clk_init();
340 else
341 panic("failed to setup r8a7778 clocks\n");
342}
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
deleted file mode 100644
index 68c2d06d0eaa..000000000000
--- a/arch/arm/mach-shmobile/clock.c
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * SH-Mobile Clock Framework
3 *
4 * Copyright (C) 2010 Magnus Damm
5 *
6 * Used together with arch/arm/common/clkdev.c and drivers/sh/clk.c.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/export.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/sh_clk.h>
23
24#include "clock.h"
25#include "common.h"
26
27unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk)
28{
29 struct clk_ratio *p = clk->priv;
30
31 return clk->parent->rate / p->div * p->mul;
32};
33
34struct sh_clk_ops shmobile_fixed_ratio_clk_ops = {
35 .recalc = shmobile_fixed_ratio_clk_recalc,
36};
37
38int __init shmobile_clk_init(void)
39{
40 /* Kick the child clocks.. */
41 recalculate_root_clocks();
42
43 /* Enable the necessary init clocks */
44 clk_enable_init_clocks();
45
46 return 0;
47}
diff --git a/arch/arm/mach-shmobile/clock.h b/arch/arm/mach-shmobile/clock.h
deleted file mode 100644
index cf3552ea1019..000000000000
--- a/arch/arm/mach-shmobile/clock.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef CLOCK_H
2#define CLOCK_H
3
4/* legacy clock implementation */
5
6struct clk;
7unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk);
8extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops;
9
10/* clock ratio */
11struct clk_ratio {
12 int mul;
13 int div;
14};
15
16#define SH_CLK_RATIO(name, m, d) \
17static struct clk_ratio name ##_ratio = { \
18 .mul = m, \
19 .div = d, \
20}
21
22#define SH_FIXED_RATIO_CLKg(name, p, r) \
23struct clk name = { \
24 .parent = &p, \
25 .ops = &shmobile_fixed_ratio_clk_ops,\
26 .priv = &r ## _ratio, \
27}
28
29#define SH_FIXED_RATIO_CLK(name, p, r) \
30static SH_FIXED_RATIO_CLKg(name, p, r)
31
32#define SH_FIXED_RATIO_CLK_SET(name, p, m, d) \
33 SH_CLK_RATIO(name, m, d); \
34 SH_FIXED_RATIO_CLK(name, p, name)
35
36#define SH_CLK_SET_RATIO(p, m, d) \
37do { \
38 (p)->mul = m; \
39 (p)->div = d; \
40} while (0)
41
42#endif
diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h
index 8d27ec546a35..9cb11215ceba 100644
--- a/arch/arm/mach-shmobile/common.h
+++ b/arch/arm/mach-shmobile/common.h
@@ -1,10 +1,7 @@
1#ifndef __ARCH_MACH_COMMON_H 1#ifndef __ARCH_MACH_COMMON_H
2#define __ARCH_MACH_COMMON_H 2#define __ARCH_MACH_COMMON_H
3 3
4extern void shmobile_earlytimer_init(void);
5extern void shmobile_init_delay(void); 4extern void shmobile_init_delay(void);
6struct twd_local_timer;
7extern void shmobile_setup_console(void);
8extern void shmobile_boot_vector(void); 5extern void shmobile_boot_vector(void);
9extern unsigned long shmobile_boot_fn; 6extern unsigned long shmobile_boot_fn;
10extern unsigned long shmobile_boot_arg; 7extern unsigned long shmobile_boot_arg;
@@ -18,8 +15,6 @@ extern void shmobile_boot_scu(void);
18extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus); 15extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
19extern void shmobile_smp_scu_cpu_die(unsigned int cpu); 16extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
20extern int shmobile_smp_scu_cpu_kill(unsigned int cpu); 17extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
21struct clk;
22extern int shmobile_clk_init(void);
23extern struct platform_suspend_ops shmobile_suspend_ops; 18extern struct platform_suspend_ops shmobile_suspend_ops;
24 19
25#ifdef CONFIG_SUSPEND 20#ifdef CONFIG_SUSPEND
diff --git a/arch/arm/mach-shmobile/console.c b/arch/arm/mach-shmobile/console.c
deleted file mode 100644
index e329ccbd0a67..000000000000
--- a/arch/arm/mach-shmobile/console.c
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * SH-Mobile Console
3 *
4 * Copyright (C) 2010 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <asm/mach/map.h>
19#include "common.h"
20
21void __init shmobile_setup_console(void)
22{
23 parse_early_param();
24
25 /* Let earlyprintk output early console messages */
26 early_platform_driver_probe("earlyprintk", 1, 1);
27}
diff --git a/arch/arm/mach-shmobile/intc.h b/arch/arm/mach-shmobile/intc.h
deleted file mode 100644
index 40b2ad4ca5b4..000000000000
--- a/arch/arm/mach-shmobile/intc.h
+++ /dev/null
@@ -1,295 +0,0 @@
1#ifndef __ASM_MACH_INTC_H
2#define __ASM_MACH_INTC_H
3#include <linux/sh_intc.h>
4
5#define INTC_IRQ_PINS_ENUM_16L(p) \
6 p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \
7 p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7, \
8 p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \
9 p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15
10
11#define INTC_IRQ_PINS_ENUM_16H(p) \
12 p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \
13 p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23, \
14 p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \
15 p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31
16
17#define INTC_IRQ_PINS_VECT_16L(p, vect) \
18 vect(p ## _IRQ0, 0x0200), vect(p ## _IRQ1, 0x0220), \
19 vect(p ## _IRQ2, 0x0240), vect(p ## _IRQ3, 0x0260), \
20 vect(p ## _IRQ4, 0x0280), vect(p ## _IRQ5, 0x02a0), \
21 vect(p ## _IRQ6, 0x02c0), vect(p ## _IRQ7, 0x02e0), \
22 vect(p ## _IRQ8, 0x0300), vect(p ## _IRQ9, 0x0320), \
23 vect(p ## _IRQ10, 0x0340), vect(p ## _IRQ11, 0x0360), \
24 vect(p ## _IRQ12, 0x0380), vect(p ## _IRQ13, 0x03a0), \
25 vect(p ## _IRQ14, 0x03c0), vect(p ## _IRQ15, 0x03e0)
26
27#define INTC_IRQ_PINS_VECT_16H(p, vect) \
28 vect(p ## _IRQ16, 0x3200), vect(p ## _IRQ17, 0x3220), \
29 vect(p ## _IRQ18, 0x3240), vect(p ## _IRQ19, 0x3260), \
30 vect(p ## _IRQ20, 0x3280), vect(p ## _IRQ21, 0x32a0), \
31 vect(p ## _IRQ22, 0x32c0), vect(p ## _IRQ23, 0x32e0), \
32 vect(p ## _IRQ24, 0x3300), vect(p ## _IRQ25, 0x3320), \
33 vect(p ## _IRQ26, 0x3340), vect(p ## _IRQ27, 0x3360), \
34 vect(p ## _IRQ28, 0x3380), vect(p ## _IRQ29, 0x33a0), \
35 vect(p ## _IRQ30, 0x33c0), vect(p ## _IRQ31, 0x33e0)
36
37#define INTC_IRQ_PINS_MASK_16L(p, base) \
38 { base + 0x40, base + 0x60, 8, /* INTMSK00A / INTMSKCLR00A */ \
39 { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \
40 p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \
41 { base + 0x44, base + 0x64, 8, /* INTMSK10A / INTMSKCLR10A */ \
42 { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \
43 p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } }
44
45#define INTC_IRQ_PINS_MASK_16H(p, base) \
46 { base + 0x48, base + 0x68, 8, /* INTMSK20A / INTMSKCLR20A */ \
47 { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \
48 p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \
49 { base + 0x4c, base + 0x6c, 8, /* INTMSK30A / INTMSKCLR30A */ \
50 { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \
51 p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } }
52
53#define INTC_IRQ_PINS_PRIO_16L(p, base) \
54 { base + 0x10, 0, 32, 4, /* INTPRI00A */ \
55 { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \
56 p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \
57 { base + 0x14, 0, 32, 4, /* INTPRI10A */ \
58 { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \
59 p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } }
60
61#define INTC_IRQ_PINS_PRIO_16H(p, base) \
62 { base + 0x18, 0, 32, 4, /* INTPRI20A */ \
63 { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \
64 p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \
65 { base + 0x1c, 0, 32, 4, /* INTPRI30A */ \
66 { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \
67 p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } }
68
69#define INTC_IRQ_PINS_SENSE_16L(p, base) \
70 { base + 0x00, 32, 4, /* ICR1A */ \
71 { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \
72 p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \
73 { base + 0x04, 32, 4, /* ICR2A */ \
74 { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \
75 p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } }
76
77#define INTC_IRQ_PINS_SENSE_16H(p, base) \
78 { base + 0x08, 32, 4, /* ICR3A */ \
79 { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \
80 p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \
81 { base + 0x0c, 32, 4, /* ICR4A */ \
82 { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \
83 p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } }
84
85#define INTC_IRQ_PINS_ACK_16L(p, base) \
86 { base + 0x20, 0, 8, /* INTREQ00A */ \
87 { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \
88 p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \
89 { base + 0x24, 0, 8, /* INTREQ10A */ \
90 { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \
91 p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } }
92
93#define INTC_IRQ_PINS_ACK_16H(p, base) \
94 { base + 0x28, 0, 8, /* INTREQ20A */ \
95 { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \
96 p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \
97 { base + 0x2c, 0, 8, /* INTREQ30A */ \
98 { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \
99 p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } }
100
101#define INTC_IRQ_PINS_16(p, base, vect, str) \
102 \
103static struct resource p ## _resources[] __initdata = { \
104 [0] = { \
105 .start = base, \
106 .end = base + 0x64, \
107 .flags = IORESOURCE_MEM, \
108 }, \
109}; \
110 \
111enum { \
112 p ## _UNUSED = 0, \
113 INTC_IRQ_PINS_ENUM_16L(p), \
114}; \
115 \
116static struct intc_vect p ## _vectors[] __initdata = { \
117 INTC_IRQ_PINS_VECT_16L(p, vect), \
118}; \
119 \
120static struct intc_mask_reg p ## _mask_registers[] __initdata = { \
121 INTC_IRQ_PINS_MASK_16L(p, base), \
122}; \
123 \
124static struct intc_prio_reg p ## _prio_registers[] __initdata = { \
125 INTC_IRQ_PINS_PRIO_16L(p, base), \
126}; \
127 \
128static struct intc_sense_reg p ## _sense_registers[] __initdata = { \
129 INTC_IRQ_PINS_SENSE_16L(p, base), \
130}; \
131 \
132static struct intc_mask_reg p ## _ack_registers[] __initdata = { \
133 INTC_IRQ_PINS_ACK_16L(p, base), \
134}; \
135 \
136static struct intc_desc p ## _desc __initdata = { \
137 .name = str, \
138 .resource = p ## _resources, \
139 .num_resources = ARRAY_SIZE(p ## _resources), \
140 .hw = INTC_HW_DESC(p ## _vectors, NULL, \
141 p ## _mask_registers, p ## _prio_registers, \
142 p ## _sense_registers, p ## _ack_registers) \
143}
144
145#define INTC_IRQ_PINS_16H(p, base, vect, str) \
146 \
147static struct resource p ## _resources[] __initdata = { \
148 [0] = { \
149 .start = base, \
150 .end = base + 0x64, \
151 .flags = IORESOURCE_MEM, \
152 }, \
153}; \
154 \
155enum { \
156 p ## _UNUSED = 0, \
157 INTC_IRQ_PINS_ENUM_16H(p), \
158}; \
159 \
160static struct intc_vect p ## _vectors[] __initdata = { \
161 INTC_IRQ_PINS_VECT_16H(p, vect), \
162}; \
163 \
164static struct intc_mask_reg p ## _mask_registers[] __initdata = { \
165 INTC_IRQ_PINS_MASK_16H(p, base), \
166}; \
167 \
168static struct intc_prio_reg p ## _prio_registers[] __initdata = { \
169 INTC_IRQ_PINS_PRIO_16H(p, base), \
170}; \
171 \
172static struct intc_sense_reg p ## _sense_registers[] __initdata = { \
173 INTC_IRQ_PINS_SENSE_16H(p, base), \
174}; \
175 \
176static struct intc_mask_reg p ## _ack_registers[] __initdata = { \
177 INTC_IRQ_PINS_ACK_16H(p, base), \
178}; \
179 \
180static struct intc_desc p ## _desc __initdata = { \
181 .name = str, \
182 .resource = p ## _resources, \
183 .num_resources = ARRAY_SIZE(p ## _resources), \
184 .hw = INTC_HW_DESC(p ## _vectors, NULL, \
185 p ## _mask_registers, p ## _prio_registers, \
186 p ## _sense_registers, p ## _ack_registers) \
187}
188
189#define INTC_IRQ_PINS_32(p, base, vect, str) \
190 \
191static struct resource p ## _resources[] __initdata = { \
192 [0] = { \
193 .start = base, \
194 .end = base + 0x6c, \
195 .flags = IORESOURCE_MEM, \
196 }, \
197}; \
198 \
199enum { \
200 p ## _UNUSED = 0, \
201 INTC_IRQ_PINS_ENUM_16L(p), \
202 INTC_IRQ_PINS_ENUM_16H(p), \
203}; \
204 \
205static struct intc_vect p ## _vectors[] __initdata = { \
206 INTC_IRQ_PINS_VECT_16L(p, vect), \
207 INTC_IRQ_PINS_VECT_16H(p, vect), \
208}; \
209 \
210static struct intc_mask_reg p ## _mask_registers[] __initdata = { \
211 INTC_IRQ_PINS_MASK_16L(p, base), \
212 INTC_IRQ_PINS_MASK_16H(p, base), \
213}; \
214 \
215static struct intc_prio_reg p ## _prio_registers[] __initdata = { \
216 INTC_IRQ_PINS_PRIO_16L(p, base), \
217 INTC_IRQ_PINS_PRIO_16H(p, base), \
218}; \
219 \
220static struct intc_sense_reg p ## _sense_registers[] __initdata = { \
221 INTC_IRQ_PINS_SENSE_16L(p, base), \
222 INTC_IRQ_PINS_SENSE_16H(p, base), \
223}; \
224 \
225static struct intc_mask_reg p ## _ack_registers[] __initdata = { \
226 INTC_IRQ_PINS_ACK_16L(p, base), \
227 INTC_IRQ_PINS_ACK_16H(p, base), \
228}; \
229 \
230static struct intc_desc p ## _desc __initdata = { \
231 .name = str, \
232 .resource = p ## _resources, \
233 .num_resources = ARRAY_SIZE(p ## _resources), \
234 .hw = INTC_HW_DESC(p ## _vectors, NULL, \
235 p ## _mask_registers, p ## _prio_registers, \
236 p ## _sense_registers, p ## _ack_registers) \
237}
238
239#define INTC_PINT_E_EMPTY
240#define INTC_PINT_E_NONE 0, 0, 0, 0, 0, 0, 0, 0,
241#define INTC_PINT_E(p) \
242 PINT ## p ## 0, PINT ## p ## 1, PINT ## p ## 2, PINT ## p ## 3, \
243 PINT ## p ## 4, PINT ## p ## 5, PINT ## p ## 6, PINT ## p ## 7,
244
245#define INTC_PINT_V_NONE
246#define INTC_PINT_V(p, vect) \
247 vect(PINT ## p ## 0, 0), vect(PINT ## p ## 1, 1), \
248 vect(PINT ## p ## 2, 2), vect(PINT ## p ## 3, 3), \
249 vect(PINT ## p ## 4, 4), vect(PINT ## p ## 5, 5), \
250 vect(PINT ## p ## 6, 6), vect(PINT ## p ## 7, 7),
251
252#define INTC_PINT(p, mask_reg, sense_base, str, \
253 enums_1, enums_2, enums_3, enums_4, \
254 vect_1, vect_2, vect_3, vect_4, \
255 mask_a, mask_b, mask_c, mask_d, \
256 sense_a, sense_b, sense_c, sense_d) \
257 \
258enum { \
259 PINT ## p ## _UNUSED = 0, \
260 enums_1 enums_2 enums_3 enums_4 \
261}; \
262 \
263static struct intc_vect p ## _vectors[] __initdata = { \
264 vect_1 vect_2 vect_3 vect_4 \
265}; \
266 \
267static struct intc_mask_reg p ## _mask_registers[] __initdata = { \
268 { mask_reg, 0, 32, /* PINTER */ \
269 { mask_a mask_b mask_c mask_d } } \
270}; \
271 \
272static struct intc_sense_reg p ## _sense_registers[] __initdata = { \
273 { sense_base + 0x00, 16, 2, /* PINTCR */ \
274 { sense_a } }, \
275 { sense_base + 0x04, 16, 2, /* PINTCR */ \
276 { sense_b } }, \
277 { sense_base + 0x08, 16, 2, /* PINTCR */ \
278 { sense_c } }, \
279 { sense_base + 0x0c, 16, 2, /* PINTCR */ \
280 { sense_d } }, \
281}; \
282 \
283static struct intc_desc p ## _desc __initdata = { \
284 .name = str, \
285 .hw = INTC_HW_DESC(p ## _vectors, NULL, \
286 p ## _mask_registers, NULL, \
287 p ## _sense_registers, NULL), \
288}
289
290/* INTCS */
291#define INTCS_VECT_BASE 0x3400
292#define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect))
293#define intcs_evt2irq(evt) evt2irq(INTCS_VECT_BASE + (evt))
294
295#endif /* __ASM_MACH_INTC_H */
diff --git a/arch/arm/mach-shmobile/pm-rmobile.h b/arch/arm/mach-shmobile/pm-rmobile.h
index 30a4a421ee31..8146bb6d7237 100644
--- a/arch/arm/mach-shmobile/pm-rmobile.h
+++ b/arch/arm/mach-shmobile/pm-rmobile.h
@@ -12,10 +12,6 @@
12 12
13#include <linux/pm_domain.h> 13#include <linux/pm_domain.h>
14 14
15#define DEFAULT_DEV_LATENCY_NS 250000
16
17struct platform_device;
18
19struct rmobile_pm_domain { 15struct rmobile_pm_domain {
20 struct generic_pm_domain genpd; 16 struct generic_pm_domain genpd;
21 struct dev_power_governor *gov; 17 struct dev_power_governor *gov;
@@ -26,9 +22,4 @@ struct rmobile_pm_domain {
26 bool no_debug; 22 bool no_debug;
27}; 23};
28 24
29struct pm_domain_device {
30 const char *domain_name;
31 struct platform_device *pdev;
32};
33
34#endif /* PM_RMOBILE_H */ 25#endif /* PM_RMOBILE_H */
diff --git a/arch/arm/mach-shmobile/r8a7778.h b/arch/arm/mach-shmobile/r8a7778.h
deleted file mode 100644
index f64fedb1f2cc..000000000000
--- a/arch/arm/mach-shmobile/r8a7778.h
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * Copyright (C) 2013 Renesas Solutions Corp.
3 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
4 * Copyright (C) 2013 Cogent Embedded, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#ifndef __ASM_R8A7778_H__
16#define __ASM_R8A7778_H__
17
18#include <linux/sh_eth.h>
19
20/* HPB-DMA slave IDs */
21enum {
22 HPBDMA_SLAVE_DUMMY,
23 HPBDMA_SLAVE_SDHI0_TX,
24 HPBDMA_SLAVE_SDHI0_RX,
25 HPBDMA_SLAVE_SSI0_TX,
26 HPBDMA_SLAVE_SSI0_RX,
27 HPBDMA_SLAVE_SSI1_TX,
28 HPBDMA_SLAVE_SSI1_RX,
29 HPBDMA_SLAVE_SSI2_TX,
30 HPBDMA_SLAVE_SSI2_RX,
31 HPBDMA_SLAVE_SSI3_TX,
32 HPBDMA_SLAVE_SSI3_RX,
33 HPBDMA_SLAVE_SSI4_TX,
34 HPBDMA_SLAVE_SSI4_RX,
35 HPBDMA_SLAVE_SSI5_TX,
36 HPBDMA_SLAVE_SSI5_RX,
37 HPBDMA_SLAVE_SSI6_TX,
38 HPBDMA_SLAVE_SSI6_RX,
39 HPBDMA_SLAVE_SSI7_TX,
40 HPBDMA_SLAVE_SSI7_RX,
41 HPBDMA_SLAVE_SSI8_TX,
42 HPBDMA_SLAVE_SSI8_RX,
43 HPBDMA_SLAVE_HPBIF0_TX,
44 HPBDMA_SLAVE_HPBIF0_RX,
45 HPBDMA_SLAVE_HPBIF1_TX,
46 HPBDMA_SLAVE_HPBIF1_RX,
47 HPBDMA_SLAVE_HPBIF2_TX,
48 HPBDMA_SLAVE_HPBIF2_RX,
49 HPBDMA_SLAVE_HPBIF3_TX,
50 HPBDMA_SLAVE_HPBIF3_RX,
51 HPBDMA_SLAVE_HPBIF4_TX,
52 HPBDMA_SLAVE_HPBIF4_RX,
53 HPBDMA_SLAVE_HPBIF5_TX,
54 HPBDMA_SLAVE_HPBIF5_RX,
55 HPBDMA_SLAVE_HPBIF6_TX,
56 HPBDMA_SLAVE_HPBIF6_RX,
57 HPBDMA_SLAVE_HPBIF7_TX,
58 HPBDMA_SLAVE_HPBIF7_RX,
59 HPBDMA_SLAVE_HPBIF8_TX,
60 HPBDMA_SLAVE_HPBIF8_RX,
61 HPBDMA_SLAVE_USBFUNC_TX,
62 HPBDMA_SLAVE_USBFUNC_RX,
63};
64
65extern void r8a7778_add_standard_devices(void);
66extern void r8a7778_add_standard_devices_dt(void);
67extern void r8a7778_add_dt_devices(void);
68
69extern void r8a7778_init_late(void);
70extern void r8a7778_init_irq_dt(void);
71extern void r8a7778_clock_init(void);
72extern void r8a7778_init_irq_extpin(int irlm);
73extern void r8a7778_init_irq_extpin_dt(int irlm);
74extern void r8a7778_pinmux_init(void);
75
76extern int r8a7778_usb_phy_power(bool enable);
77
78#endif /* __ASM_R8A7778_H__ */
diff --git a/arch/arm/mach-shmobile/r8a7779.h b/arch/arm/mach-shmobile/r8a7779.h
index db303f76704e..aad833a8f0b8 100644
--- a/arch/arm/mach-shmobile/r8a7779.h
+++ b/arch/arm/mach-shmobile/r8a7779.h
@@ -1,8 +1,6 @@
1#ifndef __ASM_R8A7779_H__ 1#ifndef __ASM_R8A7779_H__
2#define __ASM_R8A7779_H__ 2#define __ASM_R8A7779_H__
3 3
4#include <linux/sh_clk.h>
5
6extern void r8a7779_pm_init(void); 4extern void r8a7779_pm_init(void);
7 5
8#ifdef CONFIG_PM 6#ifdef CONFIG_PM
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index b9116c81e54b..b0c9986d022d 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -16,35 +16,16 @@
16 */ 16 */
17 17
18#include <linux/clk/shmobile.h> 18#include <linux/clk/shmobile.h>
19#include <linux/kernel.h>
20#include <linux/io.h> 19#include <linux/io.h>
21#include <linux/irqchip/arm-gic.h>
22#include <linux/of.h>
23#include <linux/of_platform.h>
24#include <linux/platform_data/dma-rcar-hpbdma.h>
25#include <linux/platform_data/gpio-rcar.h>
26#include <linux/platform_data/irq-renesas-intc-irqpin.h>
27#include <linux/platform_device.h>
28#include <linux/irqchip.h> 20#include <linux/irqchip.h>
29#include <linux/serial_sci.h>
30#include <linux/sh_timer.h>
31#include <linux/pm_runtime.h>
32#include <linux/usb/phy.h>
33#include <linux/usb/hcd.h>
34#include <linux/usb/ehci_pdriver.h>
35#include <linux/usb/ohci_pdriver.h>
36#include <linux/dma-mapping.h>
37 21
38#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
39#include <asm/hardware/cache-l2x0.h>
40 23
41#include "common.h" 24#include "common.h"
42#include "irqs.h" 25#include "irqs.h"
43#include "r8a7778.h"
44 26
45#define MODEMR 0xffcc0020 27#define MODEMR 0xffcc0020
46 28
47#ifdef CONFIG_COMMON_CLK
48static void __init r8a7778_timer_init(void) 29static void __init r8a7778_timer_init(void)
49{ 30{
50 u32 mode; 31 u32 mode;
@@ -55,535 +36,7 @@ static void __init r8a7778_timer_init(void)
55 iounmap(modemr); 36 iounmap(modemr);
56 r8a7778_clocks_init(mode); 37 r8a7778_clocks_init(mode);
57} 38}
58#endif
59 39
60/* SCIF */
61#define R8A7778_SCIF(index, baseaddr, irq) \
62static struct plat_sci_port scif##index##_platform_data = { \
63 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
64 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
65 .type = PORT_SCIF, \
66}; \
67 \
68static struct resource scif##index##_resources[] = { \
69 DEFINE_RES_MEM(baseaddr, 0x100), \
70 DEFINE_RES_IRQ(irq), \
71}
72
73R8A7778_SCIF(0, 0xffe40000, gic_iid(0x66));
74R8A7778_SCIF(1, 0xffe41000, gic_iid(0x67));
75R8A7778_SCIF(2, 0xffe42000, gic_iid(0x68));
76R8A7778_SCIF(3, 0xffe43000, gic_iid(0x69));
77R8A7778_SCIF(4, 0xffe44000, gic_iid(0x6a));
78R8A7778_SCIF(5, 0xffe45000, gic_iid(0x6b));
79
80#define r8a7778_register_scif(index) \
81 platform_device_register_resndata(NULL, "sh-sci", index, \
82 scif##index##_resources, \
83 ARRAY_SIZE(scif##index##_resources), \
84 &scif##index##_platform_data, \
85 sizeof(scif##index##_platform_data))
86
87/* TMU */
88static struct sh_timer_config sh_tmu0_platform_data = {
89 .channels_mask = 7,
90};
91
92static struct resource sh_tmu0_resources[] = {
93 DEFINE_RES_MEM(0xffd80000, 0x30),
94 DEFINE_RES_IRQ(gic_iid(0x40)),
95 DEFINE_RES_IRQ(gic_iid(0x41)),
96 DEFINE_RES_IRQ(gic_iid(0x42)),
97};
98
99#define r8a7778_register_tmu(idx) \
100 platform_device_register_resndata( \
101 NULL, "sh-tmu", idx, \
102 sh_tmu##idx##_resources, \
103 ARRAY_SIZE(sh_tmu##idx##_resources), \
104 &sh_tmu##idx##_platform_data, \
105 sizeof(sh_tmu##idx##_platform_data))
106
107int r8a7778_usb_phy_power(bool enable)
108{
109 static struct usb_phy *phy = NULL;
110 int ret = 0;
111
112 if (!phy)
113 phy = usb_get_phy(USB_PHY_TYPE_USB2);
114
115 if (IS_ERR(phy)) {
116 pr_err("kernel doesn't have usb phy driver\n");
117 return PTR_ERR(phy);
118 }
119
120 if (enable)
121 ret = usb_phy_init(phy);
122 else
123 usb_phy_shutdown(phy);
124
125 return ret;
126}
127
128/* USB */
129static int usb_power_on(struct platform_device *pdev)
130{
131 int ret = r8a7778_usb_phy_power(true);
132
133 if (ret)
134 return ret;
135
136 pm_runtime_enable(&pdev->dev);
137 pm_runtime_get_sync(&pdev->dev);
138
139 return 0;
140}
141
142static void usb_power_off(struct platform_device *pdev)
143{
144 if (r8a7778_usb_phy_power(false))
145 return;
146
147 pm_runtime_put_sync(&pdev->dev);
148 pm_runtime_disable(&pdev->dev);
149}
150
151static int ehci_init_internal_buffer(struct usb_hcd *hcd)
152{
153 /*
154 * Below are recommended values from the datasheet;
155 * see [USB :: Setting of EHCI Internal Buffer].
156 */
157 /* EHCI IP internal buffer setting */
158 iowrite32(0x00ff0040, hcd->regs + 0x0094);
159 /* EHCI IP internal buffer enable */
160 iowrite32(0x00000001, hcd->regs + 0x009C);
161
162 return 0;
163}
164
165static struct usb_ehci_pdata ehci_pdata __initdata = {
166 .power_on = usb_power_on,
167 .power_off = usb_power_off,
168 .power_suspend = usb_power_off,
169 .pre_setup = ehci_init_internal_buffer,
170};
171
172static struct resource ehci_resources[] __initdata = {
173 DEFINE_RES_MEM(0xffe70000, 0x400),
174 DEFINE_RES_IRQ(gic_iid(0x4c)),
175};
176
177static struct usb_ohci_pdata ohci_pdata __initdata = {
178 .power_on = usb_power_on,
179 .power_off = usb_power_off,
180 .power_suspend = usb_power_off,
181};
182
183static struct resource ohci_resources[] __initdata = {
184 DEFINE_RES_MEM(0xffe70400, 0x400),
185 DEFINE_RES_IRQ(gic_iid(0x4c)),
186};
187
188#define USB_PLATFORM_INFO(hci) \
189static struct platform_device_info hci##_info __initdata = { \
190 .name = #hci "-platform", \
191 .id = -1, \
192 .res = hci##_resources, \
193 .num_res = ARRAY_SIZE(hci##_resources), \
194 .data = &hci##_pdata, \
195 .size_data = sizeof(hci##_pdata), \
196 .dma_mask = DMA_BIT_MASK(32), \
197}
198
199USB_PLATFORM_INFO(ehci);
200USB_PLATFORM_INFO(ohci);
201
202/* PFC/GPIO */
203static struct resource pfc_resources[] __initdata = {
204 DEFINE_RES_MEM(0xfffc0000, 0x118),
205};
206
207#define R8A7778_GPIO(idx) \
208static struct resource r8a7778_gpio##idx##_resources[] __initdata = { \
209 DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \
210 DEFINE_RES_IRQ(gic_iid(0x87)), \
211}; \
212 \
213static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data __initdata = { \
214 .gpio_base = 32 * (idx), \
215 .irq_base = GPIO_IRQ_BASE(idx), \
216 .number_of_pins = 32, \
217 .pctl_name = "pfc-r8a7778", \
218}
219
220R8A7778_GPIO(0);
221R8A7778_GPIO(1);
222R8A7778_GPIO(2);
223R8A7778_GPIO(3);
224R8A7778_GPIO(4);
225
226#define r8a7778_register_gpio(idx) \
227 platform_device_register_resndata( \
228 NULL, "gpio_rcar", idx, \
229 r8a7778_gpio##idx##_resources, \
230 ARRAY_SIZE(r8a7778_gpio##idx##_resources), \
231 &r8a7778_gpio##idx##_platform_data, \
232 sizeof(r8a7778_gpio##idx##_platform_data))
233
234void __init r8a7778_pinmux_init(void)
235{
236 platform_device_register_simple(
237 "pfc-r8a7778", -1,
238 pfc_resources,
239 ARRAY_SIZE(pfc_resources));
240
241 r8a7778_register_gpio(0);
242 r8a7778_register_gpio(1);
243 r8a7778_register_gpio(2);
244 r8a7778_register_gpio(3);
245 r8a7778_register_gpio(4);
246};
247
248/* I2C */
249static struct resource i2c_resources[] __initdata = {
250 /* I2C0 */
251 DEFINE_RES_MEM(0xffc70000, 0x1000),
252 DEFINE_RES_IRQ(gic_iid(0x63)),
253 /* I2C1 */
254 DEFINE_RES_MEM(0xffc71000, 0x1000),
255 DEFINE_RES_IRQ(gic_iid(0x6e)),
256 /* I2C2 */
257 DEFINE_RES_MEM(0xffc72000, 0x1000),
258 DEFINE_RES_IRQ(gic_iid(0x6c)),
259 /* I2C3 */
260 DEFINE_RES_MEM(0xffc73000, 0x1000),
261 DEFINE_RES_IRQ(gic_iid(0x6d)),
262};
263
264static void __init r8a7778_register_i2c(int id)
265{
266 BUG_ON(id < 0 || id > 3);
267
268 platform_device_register_simple(
269 "i2c-rcar", id,
270 i2c_resources + (2 * id), 2);
271}
272
273/* HSPI */
274static struct resource hspi_resources[] __initdata = {
275 /* HSPI0 */
276 DEFINE_RES_MEM(0xfffc7000, 0x18),
277 DEFINE_RES_IRQ(gic_iid(0x5f)),
278 /* HSPI1 */
279 DEFINE_RES_MEM(0xfffc8000, 0x18),
280 DEFINE_RES_IRQ(gic_iid(0x74)),
281 /* HSPI2 */
282 DEFINE_RES_MEM(0xfffc6000, 0x18),
283 DEFINE_RES_IRQ(gic_iid(0x75)),
284};
285
286static void __init r8a7778_register_hspi(int id)
287{
288 BUG_ON(id < 0 || id > 2);
289
290 platform_device_register_simple(
291 "sh-hspi", id,
292 hspi_resources + (2 * id), 2);
293}
294
295void __init r8a7778_add_dt_devices(void)
296{
297#ifdef CONFIG_CACHE_L2X0
298 void __iomem *base = ioremap_nocache(0xf0100000, 0x1000);
299 if (base) {
300 /*
301 * Shared attribute override enable, 64K*16way
302 * don't call iounmap(base)
303 */
304 l2x0_init(base, 0x00400000, 0xc20f0fff);
305 }
306#endif
307}
308
309/* HPB-DMA */
310
311/* Asynchronous mode register (ASYNCMDR) bits */
312#define HPB_DMAE_ASYNCMDR_ASMD22_MASK BIT(2) /* SDHI0 */
313#define HPB_DMAE_ASYNCMDR_ASMD22_SINGLE BIT(2) /* SDHI0 */
314#define HPB_DMAE_ASYNCMDR_ASMD22_MULTI 0 /* SDHI0 */
315#define HPB_DMAE_ASYNCMDR_ASMD21_MASK BIT(1) /* SDHI0 */
316#define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1) /* SDHI0 */
317#define HPB_DMAE_ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */
318
319#define HPBDMA_SSI(_id) \
320{ \
321 .id = HPBDMA_SLAVE_SSI## _id ##_TX, \
322 .addr = 0xffd91008 + (_id * 0x40), \
323 .dcr = HPB_DMAE_DCR_CT | \
324 HPB_DMAE_DCR_DIP | \
325 HPB_DMAE_DCR_SPDS_32BIT | \
326 HPB_DMAE_DCR_DMDL | \
327 HPB_DMAE_DCR_DPDS_32BIT, \
328 .port = _id + (_id << 8), \
329 .dma_ch = (28 + _id), \
330}, { \
331 .id = HPBDMA_SLAVE_SSI## _id ##_RX, \
332 .addr = 0xffd9100c + (_id * 0x40), \
333 .dcr = HPB_DMAE_DCR_CT | \
334 HPB_DMAE_DCR_DIP | \
335 HPB_DMAE_DCR_SMDL | \
336 HPB_DMAE_DCR_SPDS_32BIT | \
337 HPB_DMAE_DCR_DPDS_32BIT, \
338 .port = _id + (_id << 8), \
339 .dma_ch = (28 + _id), \
340}
341
342#define HPBDMA_HPBIF(_id) \
343{ \
344 .id = HPBDMA_SLAVE_HPBIF## _id ##_TX, \
345 .addr = 0xffda0000 + (_id * 0x1000), \
346 .dcr = HPB_DMAE_DCR_CT | \
347 HPB_DMAE_DCR_DIP | \
348 HPB_DMAE_DCR_SPDS_32BIT | \
349 HPB_DMAE_DCR_DMDL | \
350 HPB_DMAE_DCR_DPDS_32BIT, \
351 .port = 0x1111, \
352 .dma_ch = (28 + _id), \
353}, { \
354 .id = HPBDMA_SLAVE_HPBIF## _id ##_RX, \
355 .addr = 0xffda0000 + (_id * 0x1000), \
356 .dcr = HPB_DMAE_DCR_CT | \
357 HPB_DMAE_DCR_DIP | \
358 HPB_DMAE_DCR_SMDL | \
359 HPB_DMAE_DCR_SPDS_32BIT | \
360 HPB_DMAE_DCR_DPDS_32BIT, \
361 .port = 0x1111, \
362 .dma_ch = (28 + _id), \
363}
364
365static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
366 {
367 .id = HPBDMA_SLAVE_SDHI0_TX,
368 .addr = 0xffe4c000 + 0x30,
369 .dcr = HPB_DMAE_DCR_SPDS_16BIT |
370 HPB_DMAE_DCR_DMDL |
371 HPB_DMAE_DCR_DPDS_16BIT,
372 .rstr = HPB_DMAE_ASYNCRSTR_ASRST21 |
373 HPB_DMAE_ASYNCRSTR_ASRST22 |
374 HPB_DMAE_ASYNCRSTR_ASRST23,
375 .mdr = HPB_DMAE_ASYNCMDR_ASMD21_MULTI,
376 .mdm = HPB_DMAE_ASYNCMDR_ASMD21_MASK,
377 .port = 0x0D0C,
378 .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
379 .dma_ch = 21,
380 }, {
381 .id = HPBDMA_SLAVE_SDHI0_RX,
382 .addr = 0xffe4c000 + 0x30,
383 .dcr = HPB_DMAE_DCR_SMDL |
384 HPB_DMAE_DCR_SPDS_16BIT |
385 HPB_DMAE_DCR_DPDS_16BIT,
386 .rstr = HPB_DMAE_ASYNCRSTR_ASRST21 |
387 HPB_DMAE_ASYNCRSTR_ASRST22 |
388 HPB_DMAE_ASYNCRSTR_ASRST23,
389 .mdr = HPB_DMAE_ASYNCMDR_ASMD22_MULTI,
390 .mdm = HPB_DMAE_ASYNCMDR_ASMD22_MASK,
391 .port = 0x0D0C,
392 .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
393 .dma_ch = 22,
394 }, {
395 .id = HPBDMA_SLAVE_USBFUNC_TX, /* for D0 */
396 .addr = 0xffe60018,
397 .dcr = HPB_DMAE_DCR_SPDS_32BIT |
398 HPB_DMAE_DCR_DMDL |
399 HPB_DMAE_DCR_DPDS_32BIT,
400 .port = 0x0000,
401 .dma_ch = 14,
402 }, {
403 .id = HPBDMA_SLAVE_USBFUNC_RX, /* for D1 */
404 .addr = 0xffe6001c,
405 .dcr = HPB_DMAE_DCR_SMDL |
406 HPB_DMAE_DCR_SPDS_32BIT |
407 HPB_DMAE_DCR_DPDS_32BIT,
408 .port = 0x0101,
409 .dma_ch = 15,
410 },
411
412 HPBDMA_SSI(0),
413 HPBDMA_SSI(1),
414 HPBDMA_SSI(2),
415 HPBDMA_SSI(3),
416 HPBDMA_SSI(4),
417 HPBDMA_SSI(5),
418 HPBDMA_SSI(6),
419 HPBDMA_SSI(7),
420 HPBDMA_SSI(8),
421
422 HPBDMA_HPBIF(0),
423 HPBDMA_HPBIF(1),
424 HPBDMA_HPBIF(2),
425 HPBDMA_HPBIF(3),
426 HPBDMA_HPBIF(4),
427 HPBDMA_HPBIF(5),
428 HPBDMA_HPBIF(6),
429 HPBDMA_HPBIF(7),
430 HPBDMA_HPBIF(8),
431};
432
433static const struct hpb_dmae_channel hpb_dmae_channels[] = {
434 HPB_DMAE_CHANNEL(0x7c, HPBDMA_SLAVE_USBFUNC_TX), /* ch. 14 */
435 HPB_DMAE_CHANNEL(0x7c, HPBDMA_SLAVE_USBFUNC_RX), /* ch. 15 */
436 HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
437 HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
438 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_TX), /* ch. 28 */
439 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_RX), /* ch. 28 */
440 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
441 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
442 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_TX), /* ch. 29 */
443 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_RX), /* ch. 29 */
444 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
445 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
446 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_TX), /* ch. 30 */
447 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_RX), /* ch. 30 */
448 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
449 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
450 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_TX), /* ch. 31 */
451 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_RX), /* ch. 31 */
452 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
453 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
454 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_TX), /* ch. 32 */
455 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_RX), /* ch. 32 */
456 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
457 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
458 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_TX), /* ch. 33 */
459 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_RX), /* ch. 33 */
460 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
461 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
462 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_TX), /* ch. 34 */
463 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_RX), /* ch. 34 */
464 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
465 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
466 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_TX), /* ch. 35 */
467 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_RX), /* ch. 35 */
468 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
469 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
470 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_TX), /* ch. 36 */
471 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_RX), /* ch. 36 */
472 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
473 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
474};
475
476static struct hpb_dmae_pdata dma_platform_data __initdata = {
477 .slaves = hpb_dmae_slaves,
478 .num_slaves = ARRAY_SIZE(hpb_dmae_slaves),
479 .channels = hpb_dmae_channels,
480 .num_channels = ARRAY_SIZE(hpb_dmae_channels),
481 .ts_shift = {
482 [XMIT_SZ_8BIT] = 0,
483 [XMIT_SZ_16BIT] = 1,
484 [XMIT_SZ_32BIT] = 2,
485 },
486 .num_hw_channels = 39,
487};
488
489static struct resource hpb_dmae_resources[] __initdata = {
490 /* Channel registers */
491 DEFINE_RES_MEM(0xffc08000, 0x1000),
492 /* Common registers */
493 DEFINE_RES_MEM(0xffc09000, 0x170),
494 /* Asynchronous reset registers */
495 DEFINE_RES_MEM(0xffc00300, 4),
496 /* Asynchronous mode registers */
497 DEFINE_RES_MEM(0xffc00400, 4),
498 /* IRQ for DMA channels */
499 DEFINE_RES_NAMED(gic_iid(0x7b), 5, NULL, IORESOURCE_IRQ),
500};
501
502static void __init r8a7778_register_hpb_dmae(void)
503{
504 platform_device_register_resndata(NULL, "hpb-dma-engine",
505 -1, hpb_dmae_resources,
506 ARRAY_SIZE(hpb_dmae_resources),
507 &dma_platform_data,
508 sizeof(dma_platform_data));
509}
510
511void __init r8a7778_add_standard_devices(void)
512{
513 r8a7778_add_dt_devices();
514 r8a7778_register_tmu(0);
515 r8a7778_register_scif(0);
516 r8a7778_register_scif(1);
517 r8a7778_register_scif(2);
518 r8a7778_register_scif(3);
519 r8a7778_register_scif(4);
520 r8a7778_register_scif(5);
521 r8a7778_register_i2c(0);
522 r8a7778_register_i2c(1);
523 r8a7778_register_i2c(2);
524 r8a7778_register_i2c(3);
525 r8a7778_register_hspi(0);
526 r8a7778_register_hspi(1);
527 r8a7778_register_hspi(2);
528
529 r8a7778_register_hpb_dmae();
530}
531
532void __init r8a7778_init_late(void)
533{
534 shmobile_init_late();
535 platform_device_register_full(&ehci_info);
536 platform_device_register_full(&ohci_info);
537}
538
539static struct renesas_intc_irqpin_config irqpin_platform_data __initdata = {
540 .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
541 .sense_bitfield_width = 2,
542};
543
544static struct resource irqpin_resources[] __initdata = {
545 DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
546 DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
547 DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
548 DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */
549 DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */
550 DEFINE_RES_IRQ(gic_iid(0x3b)), /* IRQ0 */
551 DEFINE_RES_IRQ(gic_iid(0x3c)), /* IRQ1 */
552 DEFINE_RES_IRQ(gic_iid(0x3d)), /* IRQ2 */
553 DEFINE_RES_IRQ(gic_iid(0x3e)), /* IRQ3 */
554};
555
556void __init r8a7778_init_irq_extpin_dt(int irlm)
557{
558 void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
559 unsigned long tmp;
560
561 if (!icr0) {
562 pr_warn("r8a7778: unable to setup external irq pin mode\n");
563 return;
564 }
565
566 tmp = ioread32(icr0);
567 if (irlm)
568 tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */
569 else
570 tmp &= ~(1 << 23); /* IRL mode - not supported */
571 tmp |= (1 << 21); /* LVLMODE = 1 */
572 iowrite32(tmp, icr0);
573 iounmap(icr0);
574}
575
576void __init r8a7778_init_irq_extpin(int irlm)
577{
578 r8a7778_init_irq_extpin_dt(irlm);
579 if (irlm)
580 platform_device_register_resndata(
581 NULL, "renesas_intc_irqpin", -1,
582 irqpin_resources, ARRAY_SIZE(irqpin_resources),
583 &irqpin_platform_data, sizeof(irqpin_platform_data));
584}
585
586#ifdef CONFIG_USE_OF
587#define INT2SMSKCR0 0x82288 /* 0xfe782288 */ 40#define INT2SMSKCR0 0x82288 /* 0xfe782288 */
588#define INT2SMSKCR1 0x8228c /* 0xfe78228c */ 41#define INT2SMSKCR1 0x8228c /* 0xfe78228c */
589 42
@@ -592,18 +45,11 @@ void __init r8a7778_init_irq_extpin(int irlm)
592void __init r8a7778_init_irq_dt(void) 45void __init r8a7778_init_irq_dt(void)
593{ 46{
594 void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); 47 void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
595#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
596 void __iomem *gic_dist_base = ioremap_nocache(0xfe438000, 0x1000);
597 void __iomem *gic_cpu_base = ioremap_nocache(0xfe430000, 0x1000);
598#endif
599 48
600 BUG_ON(!base); 49 BUG_ON(!base);
601 50
602#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
603 gic_init(0, 29, gic_dist_base, gic_cpu_base);
604#else
605 irqchip_init(); 51 irqchip_init();
606#endif 52
607 /* route all interrupts to ARM */ 53 /* route all interrupts to ARM */
608 __raw_writel(0x73ffffff, base + INT2NTSR0); 54 __raw_writel(0x73ffffff, base + INT2NTSR0);
609 __raw_writel(0xffffffff, base + INT2NTSR1); 55 __raw_writel(0xffffffff, base + INT2NTSR1);
@@ -624,10 +70,6 @@ DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
624 .init_early = shmobile_init_delay, 70 .init_early = shmobile_init_delay,
625 .init_irq = r8a7778_init_irq_dt, 71 .init_irq = r8a7778_init_irq_dt,
626 .init_late = shmobile_init_late, 72 .init_late = shmobile_init_late,
627#ifdef CONFIG_COMMON_CLK
628 .init_time = r8a7778_timer_init, 73 .init_time = r8a7778_timer_init,
629#endif
630 .dt_compat = r8a7778_compat_dt, 74 .dt_compat = r8a7778_compat_dt,
631MACHINE_END 75MACHINE_END
632
633#endif /* CONFIG_USE_OF */
diff --git a/arch/arm/mach-shmobile/sh-gpio.h b/arch/arm/mach-shmobile/sh-gpio.h
deleted file mode 100644
index 2c4141413db9..000000000000
--- a/arch/arm/mach-shmobile/sh-gpio.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * Generic GPIO API and pinmux table support
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_ARCH_GPIO_H
11#define __ASM_ARCH_GPIO_H
12
13#include <linux/kernel.h>
14#include <linux/errno.h>
15#include <linux/io.h>
16
17/*
18 * FIXME !!
19 *
20 * current gpio frame work doesn't have
21 * the method to control only pull up/down/free.
22 * this function should be replaced by correct gpio function
23 */
24static inline void __init gpio_direction_none(void __iomem * addr)
25{
26 __raw_writeb(0x00, addr);
27}
28
29#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index f1d027aa7a81..c17d4d3881ff 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -77,24 +77,3 @@ void __init shmobile_init_delay(void)
77 shmobile_setup_delay_hz(max_freq, 2, 4); 77 shmobile_setup_delay_hz(max_freq, 2, 4);
78 } 78 }
79} 79}
80
81static void __init shmobile_late_time_init(void)
82{
83 /*
84 * Make sure all compiled-in early timers register themselves.
85 *
86 * Run probe() for two "earlytimer" devices, these will be the
87 * clockevents and clocksource devices respectively. In the event
88 * that only a clockevents device is available, we -ENODEV on the
89 * clocksource and the jiffies clocksource is used transparently
90 * instead. No error handling is necessary here.
91 */
92 early_platform_driver_register_all("earlytimer");
93 early_platform_driver_probe("earlytimer", 2, 0);
94}
95
96void __init shmobile_earlytimer_init(void)
97{
98 late_time_init = shmobile_late_time_init;
99}
100
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 9769f1eefe3b..00b7f7de28a1 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -365,15 +365,21 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
365 user: 365 user:
366 if (LDST_L_BIT(instr)) { 366 if (LDST_L_BIT(instr)) {
367 unsigned long val; 367 unsigned long val;
368 unsigned int __ua_flags = uaccess_save_and_enable();
369
368 get16t_unaligned_check(val, addr); 370 get16t_unaligned_check(val, addr);
371 uaccess_restore(__ua_flags);
369 372
370 /* signed half-word? */ 373 /* signed half-word? */
371 if (instr & 0x40) 374 if (instr & 0x40)
372 val = (signed long)((signed short) val); 375 val = (signed long)((signed short) val);
373 376
374 regs->uregs[rd] = val; 377 regs->uregs[rd] = val;
375 } else 378 } else {
379 unsigned int __ua_flags = uaccess_save_and_enable();
376 put16t_unaligned_check(regs->uregs[rd], addr); 380 put16t_unaligned_check(regs->uregs[rd], addr);
381 uaccess_restore(__ua_flags);
382 }
377 383
378 return TYPE_LDST; 384 return TYPE_LDST;
379 385
@@ -420,14 +426,21 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
420 426
421 user: 427 user:
422 if (load) { 428 if (load) {
423 unsigned long val; 429 unsigned long val, val2;
430 unsigned int __ua_flags = uaccess_save_and_enable();
431
424 get32t_unaligned_check(val, addr); 432 get32t_unaligned_check(val, addr);
433 get32t_unaligned_check(val2, addr + 4);
434
435 uaccess_restore(__ua_flags);
436
425 regs->uregs[rd] = val; 437 regs->uregs[rd] = val;
426 get32t_unaligned_check(val, addr + 4); 438 regs->uregs[rd2] = val2;
427 regs->uregs[rd2] = val;
428 } else { 439 } else {
440 unsigned int __ua_flags = uaccess_save_and_enable();
429 put32t_unaligned_check(regs->uregs[rd], addr); 441 put32t_unaligned_check(regs->uregs[rd], addr);
430 put32t_unaligned_check(regs->uregs[rd2], addr + 4); 442 put32t_unaligned_check(regs->uregs[rd2], addr + 4);
443 uaccess_restore(__ua_flags);
431 } 444 }
432 445
433 return TYPE_LDST; 446 return TYPE_LDST;
@@ -458,10 +471,15 @@ do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *reg
458 trans: 471 trans:
459 if (LDST_L_BIT(instr)) { 472 if (LDST_L_BIT(instr)) {
460 unsigned int val; 473 unsigned int val;
474 unsigned int __ua_flags = uaccess_save_and_enable();
461 get32t_unaligned_check(val, addr); 475 get32t_unaligned_check(val, addr);
476 uaccess_restore(__ua_flags);
462 regs->uregs[rd] = val; 477 regs->uregs[rd] = val;
463 } else 478 } else {
479 unsigned int __ua_flags = uaccess_save_and_enable();
464 put32t_unaligned_check(regs->uregs[rd], addr); 480 put32t_unaligned_check(regs->uregs[rd], addr);
481 uaccess_restore(__ua_flags);
482 }
465 return TYPE_LDST; 483 return TYPE_LDST;
466 484
467 fault: 485 fault:
@@ -531,6 +549,7 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg
531#endif 549#endif
532 550
533 if (user_mode(regs)) { 551 if (user_mode(regs)) {
552 unsigned int __ua_flags = uaccess_save_and_enable();
534 for (regbits = REGMASK_BITS(instr), rd = 0; regbits; 553 for (regbits = REGMASK_BITS(instr), rd = 0; regbits;
535 regbits >>= 1, rd += 1) 554 regbits >>= 1, rd += 1)
536 if (regbits & 1) { 555 if (regbits & 1) {
@@ -542,6 +561,7 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg
542 put32t_unaligned_check(regs->uregs[rd], eaddr); 561 put32t_unaligned_check(regs->uregs[rd], eaddr);
543 eaddr += 4; 562 eaddr += 4;
544 } 563 }
564 uaccess_restore(__ua_flags);
545 } else { 565 } else {
546 for (regbits = REGMASK_BITS(instr), rd = 0; regbits; 566 for (regbits = REGMASK_BITS(instr), rd = 0; regbits;
547 regbits >>= 1, rd += 1) 567 regbits >>= 1, rd += 1)
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index e62604384945..1a7815e5421b 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1249,7 +1249,7 @@ __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1249 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev); 1249 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1250 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; 1250 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1251 dma_addr_t dma_addr, iova; 1251 dma_addr_t dma_addr, iova;
1252 int i, ret = DMA_ERROR_CODE; 1252 int i;
1253 1253
1254 dma_addr = __alloc_iova(mapping, size); 1254 dma_addr = __alloc_iova(mapping, size);
1255 if (dma_addr == DMA_ERROR_CODE) 1255 if (dma_addr == DMA_ERROR_CODE)
@@ -1257,6 +1257,8 @@ __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1257 1257
1258 iova = dma_addr; 1258 iova = dma_addr;
1259 for (i = 0; i < count; ) { 1259 for (i = 0; i < count; ) {
1260 int ret;
1261
1260 unsigned int next_pfn = page_to_pfn(pages[i]) + 1; 1262 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1261 phys_addr_t phys = page_to_phys(pages[i]); 1263 phys_addr_t phys = page_to_phys(pages[i]);
1262 unsigned int len, j; 1264 unsigned int len, j;
diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S
index 71df43547659..39c20afad7ed 100644
--- a/arch/arm/nwfpe/entry.S
+++ b/arch/arm/nwfpe/entry.S
@@ -95,9 +95,10 @@ emulate:
95 reteq r4 @ no, return failure 95 reteq r4 @ no, return failure
96 96
97next: 97next:
98 uaccess_enable r3
98.Lx1: ldrt r6, [r5], #4 @ get the next instruction and 99.Lx1: ldrt r6, [r5], #4 @ get the next instruction and
99 @ increment PC 100 @ increment PC
100 101 uaccess_disable r3
101 and r2, r6, #0x0F000000 @ test for FP insns 102 and r2, r6, #0x0F000000 @ test for FP insns
102 teq r2, #0x0C000000 103 teq r2, #0x0C000000
103 teqne r2, #0x0D000000 104 teqne r2, #0x0D000000
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 79c33eca09a3..7bd22d8e5b11 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -407,7 +407,7 @@ static int gpio_irq_set_type(struct irq_data *d, u32 type)
407 return 0; 407 return 0;
408} 408}
409 409
410static void gpio_irq_handler(unsigned __irq, struct irq_desc *desc) 410static void gpio_irq_handler(struct irq_desc *desc)
411{ 411{
412 struct orion_gpio_chip *ochip = irq_desc_get_handler_data(desc); 412 struct orion_gpio_chip *ochip = irq_desc_get_handler_data(desc);
413 u32 cause, type; 413 u32 cause, type;
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c
index ad9529cc4203..daa1a65f2eb7 100644
--- a/arch/arm/plat-pxa/ssp.c
+++ b/arch/arm/plat-pxa/ssp.c
@@ -107,7 +107,6 @@ static const struct of_device_id pxa_ssp_of_ids[] = {
107 { .compatible = "mvrl,pxa168-ssp", .data = (void *) PXA168_SSP }, 107 { .compatible = "mvrl,pxa168-ssp", .data = (void *) PXA168_SSP },
108 { .compatible = "mrvl,pxa910-ssp", .data = (void *) PXA910_SSP }, 108 { .compatible = "mrvl,pxa910-ssp", .data = (void *) PXA910_SSP },
109 { .compatible = "mrvl,ce4100-ssp", .data = (void *) CE4100_SSP }, 109 { .compatible = "mrvl,ce4100-ssp", .data = (void *) CE4100_SSP },
110 { .compatible = "mrvl,lpss-ssp", .data = (void *) LPSS_SSP },
111 { }, 110 { },
112}; 111};
113MODULE_DEVICE_TABLE(of, pxa_ssp_of_ids); 112MODULE_DEVICE_TABLE(of, pxa_ssp_of_ids);
diff --git a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S
index f00e08075938..10fd99c568c6 100644
--- a/arch/arm/xen/hypercall.S
+++ b/arch/arm/xen/hypercall.S
@@ -98,8 +98,23 @@ ENTRY(privcmd_call)
98 mov r1, r2 98 mov r1, r2
99 mov r2, r3 99 mov r2, r3
100 ldr r3, [sp, #8] 100 ldr r3, [sp, #8]
101 /*
102 * Privcmd calls are issued by the userspace. We need to allow the
103 * kernel to access the userspace memory before issuing the hypercall.
104 */
105 uaccess_enable r4
106
107 /* r4 is loaded now as we use it as scratch register before */
101 ldr r4, [sp, #4] 108 ldr r4, [sp, #4]
102 __HVC(XEN_IMM) 109 __HVC(XEN_IMM)
110
111 /*
112 * Disable userspace access from kernel. This is fine to do it
113 * unconditionally as no set_fs(KERNEL_DS)/set_fs(get_ds()) is
114 * called before.
115 */
116 uaccess_disable r4
117
103 ldm sp!, {r4} 118 ldm sp!, {r4}
104 ret lr 119 ret lr
105ENDPROC(privcmd_call); 120ENDPROC(privcmd_call);
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7d95663c0160..07d1811aa03f 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -32,6 +32,7 @@ config ARM64
32 select GENERIC_CLOCKEVENTS_BROADCAST 32 select GENERIC_CLOCKEVENTS_BROADCAST
33 select GENERIC_CPU_AUTOPROBE 33 select GENERIC_CPU_AUTOPROBE
34 select GENERIC_EARLY_IOREMAP 34 select GENERIC_EARLY_IOREMAP
35 select GENERIC_IDLE_POLL_SETUP
35 select GENERIC_IRQ_PROBE 36 select GENERIC_IRQ_PROBE
36 select GENERIC_IRQ_SHOW 37 select GENERIC_IRQ_SHOW
37 select GENERIC_IRQ_SHOW_LEVEL 38 select GENERIC_IRQ_SHOW_LEVEL
@@ -331,6 +332,22 @@ config ARM64_ERRATUM_845719
331 332
332 If unsure, say Y. 333 If unsure, say Y.
333 334
335config ARM64_ERRATUM_843419
336 bool "Cortex-A53: 843419: A load or store might access an incorrect address"
337 depends on MODULES
338 default y
339 help
340 This option builds kernel modules using the large memory model in
341 order to avoid the use of the ADRP instruction, which can cause
342 a subsequent memory access to use an incorrect address on Cortex-A53
343 parts up to r0p4.
344
345 Note that the kernel itself must be linked with a version of ld
346 which fixes potentially affected ADRP instructions through the
347 use of veneers.
348
349 If unsure, say Y.
350
334endmenu 351endmenu
335 352
336 353
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 23800a19a7bc..8aba80a20306 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -28,10 +28,10 @@ config ARCH_EXYNOS7
28 help 28 help
29 This enables support for Samsung Exynos7 SoC family 29 This enables support for Samsung Exynos7 SoC family
30 30
31config ARCH_FSL_LS2085A 31config ARCH_LAYERSCAPE
32 bool "Freescale LS2085A SOC" 32 bool "ARMv8 based Freescale Layerscape SoC family"
33 help 33 help
34 This enables support for Freescale LS2085A SOC. 34 This enables support for the Freescale Layerscape SoC family.
35 35
36config ARCH_HISI 36config ARCH_HISI
37 bool "Hisilicon SoC Family" 37 bool "Hisilicon SoC Family"
@@ -66,6 +66,11 @@ config ARCH_SEATTLE
66 help 66 help
67 This enables support for AMD Seattle SOC Family 67 This enables support for AMD Seattle SOC Family
68 68
69config ARCH_STRATIX10
70 bool "Altera's Stratix 10 SoCFPGA Family"
71 help
72 This enables support for Altera's Stratix 10 SoCFPGA Family.
73
69config ARCH_TEGRA 74config ARCH_TEGRA
70 bool "NVIDIA Tegra SoC Family" 75 bool "NVIDIA Tegra SoC Family"
71 select ARCH_HAS_RESET_CONTROLLER 76 select ARCH_HAS_RESET_CONTROLLER
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 15ff5b4156fd..f9914d7c1bb0 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -41,6 +41,10 @@ endif
41 41
42CHECKFLAGS += -D__aarch64__ 42CHECKFLAGS += -D__aarch64__
43 43
44ifeq ($(CONFIG_ARM64_ERRATUM_843419), y)
45CFLAGS_MODULE += -mcmodel=large
46endif
47
44# Default value 48# Default value
45head-y := arch/arm64/kernel/head.o 49head-y := arch/arm64/kernel/head.o
46 50
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index d9f88330e7b0..f58560614aef 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -1,3 +1,4 @@
1dts-dirs += altera
1dts-dirs += amd 2dts-dirs += amd
2dts-dirs += apm 3dts-dirs += apm
3dts-dirs += arm 4dts-dirs += arm
diff --git a/arch/arm64/boot/dts/altera/Makefile b/arch/arm64/boot/dts/altera/Makefile
new file mode 100644
index 000000000000..d7a641698d77
--- /dev/null
+++ b/arch/arm64/boot/dts/altera/Makefile
@@ -0,0 +1,5 @@
1dtb-$(CONFIG_ARCH_STRATIX10) += socfpga_stratix10_socdk.dtb
2
3always := $(dtb-y)
4subdir-y := $(dts-dirs)
5clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
new file mode 100644
index 000000000000..445aa678f914
--- /dev/null
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -0,0 +1,358 @@
1/*
2 * Copyright Altera Corporation (C) 2015. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17/dts-v1/;
18
19/ {
20 compatible = "altr,socfpga-stratix10";
21 #address-cells = <2>;
22 #size-cells = <2>;
23
24 cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 cpu0: cpu@0 {
29 compatible = "arm,cortex-a53", "arm,armv8";
30 device_type = "cpu";
31 enable-method = "psci";
32 reg = <0x0>;
33 };
34
35 cpu1: cpu@1 {
36 compatible = "arm,cortex-a53", "arm,armv8";
37 device_type = "cpu";
38 enable-method = "psci";
39 reg = <0x1>;
40 };
41
42 cpu2: cpu@2 {
43 compatible = "arm,cortex-a53", "arm,armv8";
44 device_type = "cpu";
45 enable-method = "psci";
46 reg = <0x2>;
47 };
48
49 cpu3: cpu@3 {
50 compatible = "arm,cortex-a53", "arm,armv8";
51 device_type = "cpu";
52 enable-method = "psci";
53 reg = <0x3>;
54 };
55 };
56
57 pmu {
58 compatible = "arm,armv8-pmuv3";
59 interrupts = <0 120 8>,
60 <0 121 8>,
61 <0 122 8>,
62 <0 123 8>;
63 interrupt-affinity = <&cpu0>,
64 <&cpu1>,
65 <&cpu2>,
66 <&cpu3>;
67 };
68
69 psci {
70 compatible = "arm,psci-0.2";
71 method = "smc";
72 };
73
74 intc: intc@fffc1000 {
75 compatible = "arm,gic-400", "arm,cortex-a15-gic";
76 #interrupt-cells = <3>;
77 interrupt-controller;
78 reg = <0x0 0xfffc1000 0x1000>,
79 <0x0 0xfffc2000 0x2000>,
80 <0x0 0xfffc4000 0x2000>,
81 <0x0 0xfffc6000 0x2000>;
82 };
83
84 soc {
85 #address-cells = <1>;
86 #size-cells = <1>;
87 compatible = "simple-bus";
88 device_type = "soc";
89 interrupt-parent = <&intc>;
90 ranges = <0 0 0 0xffffffff>;
91
92 clkmgr@ffd1000 {
93 compatible = "altr,clk-mgr";
94 reg = <0xffd10000 0x1000>;
95 };
96
97 gmac0: ethernet@ff800000 {
98 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
99 reg = <0xff800000 0x2000>;
100 interrupts = <0 90 4>;
101 interrupt-names = "macirq";
102 mac-address = [00 00 00 00 00 00];
103 status = "disabled";
104 };
105
106 gmac1: ethernet@ff802000 {
107 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
108 reg = <0xff802000 0x2000>;
109 interrupts = <0 91 4>;
110 interrupt-names = "macirq";
111 mac-address = [00 00 00 00 00 00];
112 status = "disabled";
113 };
114
115 gmac2: ethernet@ff804000 {
116 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
117 reg = <0xff804000 0x2000>;
118 interrupts = <0 92 4>;
119 interrupt-names = "macirq";
120 mac-address = [00 00 00 00 00 00];
121 status = "disabled";
122 };
123
124 gpio0: gpio@ffc03200 {
125 #address-cells = <1>;
126 #size-cells = <0>;
127 compatible = "snps,dw-apb-gpio";
128 reg = <0xffc03200 0x100>;
129 status = "disabled";
130
131 porta: gpio-controller@0 {
132 compatible = "snps,dw-apb-gpio-port";
133 gpio-controller;
134 #gpio-cells = <2>;
135 snps,nr-gpios = <24>;
136 reg = <0>;
137 interrupt-controller;
138 #interrupt-cells = <2>;
139 interrupts = <0 110 4>;
140 };
141 };
142
143 gpio1: gpio@ffc03300 {
144 #address-cells = <1>;
145 #size-cells = <0>;
146 compatible = "snps,dw-apb-gpio";
147 reg = <0xffc03300 0x100>;
148 status = "disabled";
149
150 portb: gpio-controller@0 {
151 compatible = "snps,dw-apb-gpio-port";
152 gpio-controller;
153 #gpio-cells = <2>;
154 snps,nr-gpios = <24>;
155 reg = <0>;
156 interrupt-controller;
157 #interrupt-cells = <2>;
158 interrupts = <0 110 4>;
159 };
160 };
161
162 i2c0: i2c@ffc02800 {
163 #address-cells = <1>;
164 #size-cells = <0>;
165 compatible = "snps,designware-i2c";
166 reg = <0xffc02800 0x100>;
167 interrupts = <0 103 4>;
168 status = "disabled";
169 };
170
171 i2c1: i2c@ffc02900 {
172 #address-cells = <1>;
173 #size-cells = <0>;
174 compatible = "snps,designware-i2c";
175 reg = <0xffc02900 0x100>;
176 interrupts = <0 104 4>;
177 status = "disabled";
178 };
179
180 i2c2: i2c@ffc02a00 {
181 #address-cells = <1>;
182 #size-cells = <0>;
183 compatible = "snps,designware-i2c";
184 reg = <0xffc02a00 0x100>;
185 interrupts = <0 105 4>;
186 status = "disabled";
187 };
188
189 i2c3: i2c@ffc02b00 {
190 #address-cells = <1>;
191 #size-cells = <0>;
192 compatible = "snps,designware-i2c";
193 reg = <0xffc02b00 0x100>;
194 interrupts = <0 106 4>;
195 status = "disabled";
196 };
197
198 i2c4: i2c@ffc02c00 {
199 #address-cells = <1>;
200 #size-cells = <0>;
201 compatible = "snps,designware-i2c";
202 reg = <0xffc02c00 0x100>;
203 interrupts = <0 107 4>;
204 status = "disabled";
205 };
206
207 mmc: dwmmc0@ff808000 {
208 #address-cells = <1>;
209 #size-cells = <0>;
210 compatible = "altr,socfpga-dw-mshc";
211 reg = <0xff808000 0x1000>;
212 interrupts = <0 96 4>;
213 fifo-depth = <0x400>;
214 status = "disabled";
215 };
216
217 ocram: sram@ffe00000 {
218 compatible = "mmio-sram";
219 reg = <0xffe00000 0x100000>;
220 };
221
222 rst: rstmgr@ffd11000 {
223 #reset-cells = <1>;
224 compatible = "altr,rst-mgr";
225 reg = <0xffd11000 0x1000>;
226 };
227
228 spi0: spi@ffda4000 {
229 compatible = "snps,dw-apb-ssi";
230 #address-cells = <1>;
231 #size-cells = <0>;
232 reg = <0xffda4000 0x1000>;
233 interrupts = <0 101 4>;
234 num-chipselect = <4>;
235 bus-num = <0>;
236 status = "disabled";
237 };
238
239 spi1: spi@ffda5000 {
240 compatible = "snps,dw-apb-ssi";
241 #address-cells = <1>;
242 #size-cells = <0>;
243 reg = <0xffda5000 0x1000>;
244 interrupts = <0 102 4>;
245 num-chipselect = <4>;
246 bus-num = <0>;
247 status = "disabled";
248 };
249
250 sysmgr: sysmgr@ffd12000 {
251 compatible = "altr,sys-mgr", "syscon";
252 reg = <0xffd12000 0x1000>;
253 };
254
255 /* Local timer */
256 timer {
257 compatible = "arm,armv8-timer";
258 interrupts = <1 13 0xf01>,
259 <1 14 0xf01>,
260 <1 11 0xf01>,
261 <1 10 0xf01>;
262 };
263
264 timer0: timer0@ffc03000 {
265 compatible = "snps,dw-apb-timer";
266 interrupts = <0 113 4>;
267 reg = <0xffc03000 0x100>;
268 };
269
270 timer1: timer1@ffc03100 {
271 compatible = "snps,dw-apb-timer";
272 interrupts = <0 114 4>;
273 reg = <0xffc03100 0x100>;
274 };
275
276 timer2: timer2@ffd00000 {
277 compatible = "snps,dw-apb-timer";
278 interrupts = <0 115 4>;
279 reg = <0xffd00000 0x100>;
280 };
281
282 timer3: timer3@ffd00100 {
283 compatible = "snps,dw-apb-timer";
284 interrupts = <0 116 4>;
285 reg = <0xffd00100 0x100>;
286 };
287
288 uart0: serial0@ffc02000 {
289 compatible = "snps,dw-apb-uart";
290 reg = <0xffc02000 0x100>;
291 interrupts = <0 108 4>;
292 reg-shift = <2>;
293 reg-io-width = <4>;
294 status = "disabled";
295 };
296
297 uart1: serial1@ffc02100 {
298 compatible = "snps,dw-apb-uart";
299 reg = <0xffc02100 0x100>;
300 interrupts = <0 109 4>;
301 reg-shift = <2>;
302 reg-io-width = <4>;
303 status = "disabled";
304 };
305
306 usbphy0: usbphy@0 {
307 #phy-cells = <0>;
308 compatible = "usb-nop-xceiv";
309 status = "okay";
310 };
311
312 usb0: usb@ffb00000 {
313 compatible = "snps,dwc2";
314 reg = <0xffb00000 0x40000>;
315 interrupts = <0 93 4>;
316 phys = <&usbphy0>;
317 phy-names = "usb2-phy";
318 status = "disabled";
319 };
320
321 usb1: usb@ffb40000 {
322 compatible = "snps,dwc2";
323 reg = <0xffb40000 0x40000>;
324 interrupts = <0 94 4>;
325 phys = <&usbphy0>;
326 phy-names = "usb2-phy";
327 status = "disabled";
328 };
329
330 watchdog0: watchdog@ffd00200 {
331 compatible = "snps,dw-wdt";
332 reg = <0xffd00200 0x100>;
333 interrupts = <0 117 4>;
334 status = "disabled";
335 };
336
337 watchdog1: watchdog@ffd00300 {
338 compatible = "snps,dw-wdt";
339 reg = <0xffd00300 0x100>;
340 interrupts = <0 118 4>;
341 status = "disabled";
342 };
343
344 watchdog2: watchdog@ffd00400 {
345 compatible = "snps,dw-wdt";
346 reg = <0xffd00400 0x100>;
347 interrupts = <0 125 4>;
348 status = "disabled";
349 };
350
351 watchdog3: watchdog@ffd00500 {
352 compatible = "snps,dw-wdt";
353 reg = <0xffd00500 0x100>;
354 interrupts = <0 126 4>;
355 status = "disabled";
356 };
357 };
358};
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
new file mode 100644
index 000000000000..41ea2dba2fce
--- /dev/null
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -0,0 +1,39 @@
1/*
2 * Copyright Altera Corporation (C) 2015. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17/include/ "socfpga_stratix10.dtsi"
18
19/ {
20 model = "SoCFPGA Stratix 10 SoCDK";
21
22 aliases {
23 serial0 = &uart0;
24 };
25
26 chosen {
27 stdout-path = "serial0:115200n8";
28 };
29
30 memory {
31 device_type = "memory";
32 /* We expect the bootloader to fill in the reg */
33 reg = <0 0 0 0>;
34 };
35};
36
37&uart0 {
38 status = "okay";
39};
diff --git a/arch/arm64/boot/dts/apm/Makefile b/arch/arm64/boot/dts/apm/Makefile
index a2afabbc1717..c75f17a49471 100644
--- a/arch/arm64/boot/dts/apm/Makefile
+++ b/arch/arm64/boot/dts/apm/Makefile
@@ -1,4 +1,5 @@
1dtb-$(CONFIG_ARCH_XGENE) += apm-mustang.dtb 1dtb-$(CONFIG_ARCH_XGENE) += apm-mustang.dtb
2dtb-$(CONFIG_ARCH_XGENE) += apm-merlin.dtb
2 3
3always := $(dtb-y) 4always := $(dtb-y)
4subdir-y := $(dts-dirs) 5subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/apm/apm-merlin.dts b/arch/arm64/boot/dts/apm/apm-merlin.dts
new file mode 100644
index 000000000000..119a469bd189
--- /dev/null
+++ b/arch/arm64/boot/dts/apm/apm-merlin.dts
@@ -0,0 +1,72 @@
1/*
2 * dts file for AppliedMicro (APM) Merlin Board
3 *
4 * Copyright (C) 2015, Applied Micro Circuits Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 */
11
12/dts-v1/;
13
14/include/ "apm-shadowcat.dtsi"
15
16/ {
17 model = "APM X-Gene Merlin board";
18 compatible = "apm,merlin", "apm,xgene-shadowcat";
19
20 chosen { };
21
22 memory {
23 device_type = "memory";
24 reg = < 0x1 0x00000000 0x0 0x80000000 >;
25 };
26
27 gpio-keys {
28 compatible = "gpio-keys";
29 button@1 {
30 label = "POWER";
31 linux,code = <116>;
32 linux,input-type = <0x1>;
33 interrupts = <0x0 0x28 0x1>;
34 };
35 };
36
37 poweroff_mbox: poweroff_mbox@10548000 {
38 compatible = "syscon";
39 reg = <0x0 0x10548000 0x0 0x30>;
40 };
41
42 poweroff: poweroff@10548010 {
43 compatible = "syscon-poweroff";
44 regmap = <&poweroff_mbox>;
45 offset = <0x10>;
46 mask = <0x1>;
47 };
48};
49
50&serial0 {
51 status = "ok";
52};
53
54&sata1 {
55 status = "ok";
56};
57
58&sata2 {
59 status = "ok";
60};
61
62&sata3 {
63 status = "ok";
64};
65
66&sgenet0 {
67 status = "ok";
68};
69
70&xgenet1 {
71 status = "ok";
72};
diff --git a/arch/arm64/boot/dts/apm/apm-mustang.dts b/arch/arm64/boot/dts/apm/apm-mustang.dts
index 4c55833d8a41..01cdeda93c3a 100644
--- a/arch/arm64/boot/dts/apm/apm-mustang.dts
+++ b/arch/arm64/boot/dts/apm/apm-mustang.dts
@@ -33,6 +33,18 @@
33 interrupts = <0x0 0x2d 0x1>; 33 interrupts = <0x0 0x2d 0x1>;
34 }; 34 };
35 }; 35 };
36
37 poweroff_mbox: poweroff_mbox@10548000 {
38 compatible = "syscon";
39 reg = <0x0 0x10548000 0x0 0x30>;
40 };
41
42 poweroff: poweroff@10548010 {
43 compatible = "syscon-poweroff";
44 regmap = <&poweroff_mbox>;
45 offset = <0x10>;
46 mask = <0x1>;
47 };
36}; 48};
37 49
38&pcie0clk { 50&pcie0clk {
diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
new file mode 100644
index 000000000000..c804f8f1f38c
--- /dev/null
+++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
@@ -0,0 +1,271 @@
1/*
2 * dts file for AppliedMicro (APM) X-Gene Shadowcat SOC
3 *
4 * Copyright (C) 2015, Applied Micro Circuits Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 */
11
12/ {
13 compatible = "apm,xgene-shadowcat";
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
17
18 cpus {
19 #address-cells = <2>;
20 #size-cells = <0>;
21
22 cpu@000 {
23 device_type = "cpu";
24 compatible = "apm,strega", "arm,armv8";
25 reg = <0x0 0x000>;
26 enable-method = "spin-table";
27 cpu-release-addr = <0x1 0x0000fff8>;
28 };
29 cpu@001 {
30 device_type = "cpu";
31 compatible = "apm,strega", "arm,armv8";
32 reg = <0x0 0x001>;
33 enable-method = "spin-table";
34 cpu-release-addr = <0x1 0x0000fff8>;
35 };
36 cpu@100 {
37 device_type = "cpu";
38 compatible = "apm,strega", "arm,armv8";
39 reg = <0x0 0x100>;
40 enable-method = "spin-table";
41 cpu-release-addr = <0x1 0x0000fff8>;
42 };
43 cpu@101 {
44 device_type = "cpu";
45 compatible = "apm,strega", "arm,armv8";
46 reg = <0x0 0x101>;
47 enable-method = "spin-table";
48 cpu-release-addr = <0x1 0x0000fff8>;
49 };
50 cpu@200 {
51 device_type = "cpu";
52 compatible = "apm,strega", "arm,armv8";
53 reg = <0x0 0x200>;
54 enable-method = "spin-table";
55 cpu-release-addr = <0x1 0x0000fff8>;
56 };
57 cpu@201 {
58 device_type = "cpu";
59 compatible = "apm,strega", "arm,armv8";
60 reg = <0x0 0x201>;
61 enable-method = "spin-table";
62 cpu-release-addr = <0x1 0x0000fff8>;
63 };
64 cpu@300 {
65 device_type = "cpu";
66 compatible = "apm,strega", "arm,armv8";
67 reg = <0x0 0x300>;
68 enable-method = "spin-table";
69 cpu-release-addr = <0x1 0x0000fff8>;
70 };
71 cpu@301 {
72 device_type = "cpu";
73 compatible = "apm,strega", "arm,armv8";
74 reg = <0x0 0x301>;
75 enable-method = "spin-table";
76 cpu-release-addr = <0x1 0x0000fff8>;
77 };
78 };
79
80 gic: interrupt-controller@78090000 {
81 compatible = "arm,cortex-a15-gic";
82 #interrupt-cells = <3>;
83 #address-cells = <2>;
84 #size-cells = <2>;
85 interrupt-controller;
86 interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */
87 ranges = <0 0 0 0x79000000 0x0 0x800000>; /* MSI Range */
88 reg = <0x0 0x78090000 0x0 0x10000>, /* GIC Dist */
89 <0x0 0x780A0000 0x0 0x20000>, /* GIC CPU */
90 <0x0 0x780C0000 0x0 0x10000>, /* GIC VCPU Control */
91 <0x0 0x780E0000 0x0 0x20000>; /* GIC VCPU */
92 };
93
94 pmu {
95 compatible = "arm,armv8-pmuv3";
96 interrupts = <1 12 0xff04>;
97 };
98
99 timer {
100 compatible = "arm,armv8-timer";
101 interrupts = <1 0 0xff04>, /* Secure Phys IRQ */
102 <1 13 0xff04>, /* Non-secure Phys IRQ */
103 <1 14 0xff04>, /* Virt IRQ */
104 <1 15 0xff04>; /* Hyp IRQ */
105 clock-frequency = <50000000>;
106 };
107
108 soc {
109 compatible = "simple-bus";
110 #address-cells = <2>;
111 #size-cells = <2>;
112 ranges;
113
114 clocks {
115 #address-cells = <2>;
116 #size-cells = <2>;
117 ranges;
118
119 refclk: refclk {
120 compatible = "fixed-clock";
121 #clock-cells = <1>;
122 clock-frequency = <100000000>;
123 clock-output-names = "refclk";
124 };
125
126 socpll: socpll@17000120 {
127 compatible = "apm,xgene-socpll-clock";
128 #clock-cells = <1>;
129 clocks = <&refclk 0>;
130 reg = <0x0 0x17000120 0x0 0x1000>;
131 clock-output-names = "socpll";
132 };
133
134 socplldiv2: socplldiv2 {
135 compatible = "fixed-factor-clock";
136 #clock-cells = <1>;
137 clocks = <&socpll 0>;
138 clock-mult = <1>;
139 clock-div = <2>;
140 clock-output-names = "socplldiv2";
141 };
142
143 pcie0clk: pcie0clk@1f2bc000 {
144 compatible = "apm,xgene-device-clock";
145 #clock-cells = <1>;
146 clocks = <&socplldiv2 0>;
147 reg = <0x0 0x1f2bc000 0x0 0x1000>;
148 reg-names = "csr-reg";
149 clock-output-names = "pcie0clk";
150 };
151
152 xge0clk: xge0clk@1f61c000 {
153 compatible = "apm,xgene-device-clock";
154 #clock-cells = <1>;
155 clocks = <&socplldiv2 0>;
156 reg = <0x0 0x1f61c000 0x0 0x1000>;
157 reg-names = "csr-reg";
158 enable-mask = <0x3>;
159 csr-mask = <0x3>;
160 clock-output-names = "xge0clk";
161 };
162
163 xge1clk: xge1clk@1f62c000 {
164 compatible = "apm,xgene-device-clock";
165 #clock-cells = <1>;
166 clocks = <&socplldiv2 0>;
167 reg = <0x0 0x1f62c000 0x0 0x1000>;
168 reg-names = "csr-reg";
169 enable-mask = <0x3>;
170 csr-mask = <0x3>;
171 clock-output-names = "xge1clk";
172 };
173 };
174
175 scu: system-clk-controller@17000000 {
176 compatible = "apm,xgene-scu","syscon";
177 reg = <0x0 0x17000000 0x0 0x400>;
178 };
179
180 reboot: reboot@17000014 {
181 compatible = "syscon-reboot";
182 regmap = <&scu>;
183 offset = <0x14>;
184 mask = <0x1>;
185 };
186
187 serial0: serial@10600000 {
188 device_type = "serial";
189 compatible = "ns16550";
190 reg = <0 0x10600000 0x0 0x1000>;
191 reg-shift = <2>;
192 clock-frequency = <10000000>;
193 interrupt-parent = <&gic>;
194 interrupts = <0x0 0x4c 0x4>;
195 };
196
197 sata1: sata@1a000000 {
198 compatible = "apm,xgene-ahci";
199 reg = <0x0 0x1a000000 0x0 0x1000>,
200 <0x0 0x1f200000 0x0 0x1000>,
201 <0x0 0x1f20d000 0x0 0x1000>,
202 <0x0 0x1f20e000 0x0 0x1000>;
203 interrupts = <0x0 0x5a 0x4>;
204 dma-coherent;
205 };
206
207 sata2: sata@1a200000 {
208 compatible = "apm,xgene-ahci";
209 reg = <0x0 0x1a200000 0x0 0x1000>,
210 <0x0 0x1f210000 0x0 0x1000>,
211 <0x0 0x1f21d000 0x0 0x1000>,
212 <0x0 0x1f21e000 0x0 0x1000>;
213 interrupts = <0x0 0x5b 0x4>;
214 dma-coherent;
215 };
216
217 sata3: sata@1a400000 {
218 compatible = "apm,xgene-ahci";
219 reg = <0x0 0x1a400000 0x0 0x1000>,
220 <0x0 0x1f220000 0x0 0x1000>,
221 <0x0 0x1f22d000 0x0 0x1000>,
222 <0x0 0x1f22e000 0x0 0x1000>;
223 interrupts = <0x0 0x5c 0x4>;
224 dma-coherent;
225 };
226
227 sbgpio: sbgpio@17001000{
228 compatible = "apm,xgene-gpio-sb";
229 reg = <0x0 0x17001000 0x0 0x400>;
230 #gpio-cells = <2>;
231 gpio-controller;
232 interrupts = <0x0 0x28 0x1>,
233 <0x0 0x29 0x1>,
234 <0x0 0x2a 0x1>,
235 <0x0 0x2b 0x1>,
236 <0x0 0x2c 0x1>,
237 <0x0 0x2d 0x1>,
238 <0x0 0x2e 0x1>,
239 <0x0 0x2f 0x1>;
240 };
241
242 sgenet0: ethernet@1f610000 {
243 compatible = "apm,xgene2-sgenet";
244 status = "disabled";
245 reg = <0x0 0x1f610000 0x0 0x10000>,
246 <0x0 0x1f600000 0x0 0Xd100>,
247 <0x0 0x20000000 0x0 0X20000>;
248 interrupts = <0 96 4>,
249 <0 97 4>;
250 dma-coherent;
251 clocks = <&xge0clk 0>;
252 local-mac-address = [00 01 73 00 00 01];
253 phy-connection-type = "sgmii";
254 };
255
256 xgenet1: ethernet@1f620000 {
257 compatible = "apm,xgene2-xgenet";
258 status = "disabled";
259 reg = <0x0 0x1f620000 0x0 0x10000>,
260 <0x0 0x1f600000 0x0 0Xd100>,
261 <0x0 0x20000000 0x0 0X220000>;
262 interrupts = <0 108 4>,
263 <0 109 4>;
264 port-id = <1>;
265 dma-coherent;
266 clocks = <&xge1clk 0>;
267 local-mac-address = [00 01 73 00 00 02];
268 phy-connection-type = "xgmii";
269 };
270 };
271};
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index d831bc2ac204..9e65b75d35bc 100644
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -97,6 +97,11 @@
97 clock-frequency = <50000000>; 97 clock-frequency = <50000000>;
98 }; 98 };
99 99
100 pmu {
101 compatible = "apm,potenza-pmu", "arm,armv8-pmuv3";
102 interrupts = <1 12 0xff04>;
103 };
104
100 soc { 105 soc {
101 compatible = "simple-bus"; 106 compatible = "simple-bus";
102 #address-cells = <2>; 107 #address-cells = <2>;
@@ -396,6 +401,18 @@
396 0x0 0x1f 0x4>; 401 0x0 0x1f 0x4>;
397 }; 402 };
398 403
404 scu: system-clk-controller@17000000 {
405 compatible = "apm,xgene-scu","syscon";
406 reg = <0x0 0x17000000 0x0 0x400>;
407 };
408
409 reboot: reboot@17000014 {
410 compatible = "syscon-reboot";
411 regmap = <&scu>;
412 offset = <0x14>;
413 mask = <0x1>;
414 };
415
399 csw: csw@7e200000 { 416 csw: csw@7e200000 {
400 compatible = "apm,xgene-csw", "syscon"; 417 compatible = "apm,xgene-csw", "syscon";
401 reg = <0x0 0x7e200000 0x0 0x1000>; 418 reg = <0x0 0x7e200000 0x0 0x1000>;
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index e3ee96036eca..dd5158eb5872 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -17,6 +17,18 @@
17 }; 17 };
18 }; 18 };
19 19
20 mailbox: mhu@2b1f0000 {
21 compatible = "arm,mhu", "arm,primecell";
22 reg = <0x0 0x2b1f0000 0x0 0x1000>;
23 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
24 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
25 interrupt-names = "mhu_lpri_rx",
26 "mhu_hpri_rx";
27 #mbox-cells = <1>;
28 clocks = <&soc_refclk100mhz>;
29 clock-names = "apb_pclk";
30 };
31
20 gic: interrupt-controller@2c010000 { 32 gic: interrupt-controller@2c010000 {
21 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 33 compatible = "arm,gic-400", "arm,cortex-a15-gic";
22 reg = <0x0 0x2c010000 0 0x1000>, 34 reg = <0x0 0x2c010000 0 0x1000>,
@@ -44,6 +56,53 @@
44 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 56 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
45 }; 57 };
46 58
59 sram: sram@2e000000 {
60 compatible = "arm,juno-sram-ns", "mmio-sram";
61 reg = <0x0 0x2e000000 0x0 0x8000>;
62
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges = <0 0x0 0x2e000000 0x8000>;
66
67 cpu_scp_lpri: scp-shmem@0 {
68 compatible = "arm,juno-scp-shmem";
69 reg = <0x0 0x200>;
70 };
71
72 cpu_scp_hpri: scp-shmem@200 {
73 compatible = "arm,juno-scp-shmem";
74 reg = <0x200 0x200>;
75 };
76 };
77
78 scpi {
79 compatible = "arm,scpi";
80 mboxes = <&mailbox 1>;
81 shmem = <&cpu_scp_hpri>;
82
83 clocks {
84 compatible = "arm,scpi-clocks";
85
86 scpi_dvfs: scpi_clocks@0 {
87 compatible = "arm,scpi-dvfs-clocks";
88 #clock-cells = <1>;
89 clock-indices = <0>, <1>, <2>;
90 clock-output-names = "atlclk", "aplclk","gpuclk";
91 };
92 scpi_clk: scpi_clocks@3 {
93 compatible = "arm,scpi-variable-clocks";
94 #clock-cells = <1>;
95 clock-indices = <3>, <4>;
96 clock-output-names = "pxlclk0", "pxlclk1";
97 };
98 };
99
100 scpi_sensors0: sensors {
101 compatible = "arm,scpi-sensors";
102 #thermal-sensor-cells = <1>;
103 };
104 };
105
47 /include/ "juno-clocks.dtsi" 106 /include/ "juno-clocks.dtsi"
48 107
49 dma@7ff00000 { 108 dma@7ff00000 {
diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index 637e046f0e36..c7c99a42e2e9 100644
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -103,6 +103,14 @@
103 }; 103 };
104 }; 104 };
105 105
106 flash@0,00000000 {
107 /* 2 * 32MiB NOR Flash memory mounted on CS0 */
108 compatible = "arm,vexpress-flash", "cfi-flash";
109 linux,part-probe = "afs";
110 reg = <0 0x00000000 0x04000000>;
111 bank-width = <4>;
112 };
113
106 ethernet@2,00000000 { 114 ethernet@2,00000000 {
107 compatible = "smsc,lan9118", "smsc,lan9115"; 115 compatible = "smsc,lan9118", "smsc,lan9115";
108 reg = <2 0x00000000 0x10000>; 116 reg = <2 0x00000000 0x10000>;
diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts
index c62751153a4f..5eef4aa0c532 100644
--- a/arch/arm64/boot/dts/arm/juno-r1.dts
+++ b/arch/arm64/boot/dts/arm/juno-r1.dts
@@ -34,12 +34,39 @@
34 #address-cells = <2>; 34 #address-cells = <2>;
35 #size-cells = <0>; 35 #size-cells = <0>;
36 36
37 cpu-map {
38 cluster0 {
39 core0 {
40 cpu = <&A57_0>;
41 };
42 core1 {
43 cpu = <&A57_1>;
44 };
45 };
46
47 cluster1 {
48 core0 {
49 cpu = <&A53_0>;
50 };
51 core1 {
52 cpu = <&A53_1>;
53 };
54 core2 {
55 cpu = <&A53_2>;
56 };
57 core3 {
58 cpu = <&A53_3>;
59 };
60 };
61 };
62
37 A57_0: cpu@0 { 63 A57_0: cpu@0 {
38 compatible = "arm,cortex-a57","arm,armv8"; 64 compatible = "arm,cortex-a57","arm,armv8";
39 reg = <0x0 0x0>; 65 reg = <0x0 0x0>;
40 device_type = "cpu"; 66 device_type = "cpu";
41 enable-method = "psci"; 67 enable-method = "psci";
42 next-level-cache = <&A57_L2>; 68 next-level-cache = <&A57_L2>;
69 clocks = <&scpi_dvfs 0>;
43 }; 70 };
44 71
45 A57_1: cpu@1 { 72 A57_1: cpu@1 {
@@ -48,6 +75,7 @@
48 device_type = "cpu"; 75 device_type = "cpu";
49 enable-method = "psci"; 76 enable-method = "psci";
50 next-level-cache = <&A57_L2>; 77 next-level-cache = <&A57_L2>;
78 clocks = <&scpi_dvfs 0>;
51 }; 79 };
52 80
53 A53_0: cpu@100 { 81 A53_0: cpu@100 {
@@ -56,6 +84,7 @@
56 device_type = "cpu"; 84 device_type = "cpu";
57 enable-method = "psci"; 85 enable-method = "psci";
58 next-level-cache = <&A53_L2>; 86 next-level-cache = <&A53_L2>;
87 clocks = <&scpi_dvfs 1>;
59 }; 88 };
60 89
61 A53_1: cpu@101 { 90 A53_1: cpu@101 {
@@ -64,6 +93,7 @@
64 device_type = "cpu"; 93 device_type = "cpu";
65 enable-method = "psci"; 94 enable-method = "psci";
66 next-level-cache = <&A53_L2>; 95 next-level-cache = <&A53_L2>;
96 clocks = <&scpi_dvfs 1>;
67 }; 97 };
68 98
69 A53_2: cpu@102 { 99 A53_2: cpu@102 {
@@ -72,6 +102,7 @@
72 device_type = "cpu"; 102 device_type = "cpu";
73 enable-method = "psci"; 103 enable-method = "psci";
74 next-level-cache = <&A53_L2>; 104 next-level-cache = <&A53_L2>;
105 clocks = <&scpi_dvfs 1>;
75 }; 106 };
76 107
77 A53_3: cpu@103 { 108 A53_3: cpu@103 {
@@ -80,6 +111,7 @@
80 device_type = "cpu"; 111 device_type = "cpu";
81 enable-method = "psci"; 112 enable-method = "psci";
82 next-level-cache = <&A53_L2>; 113 next-level-cache = <&A53_L2>;
114 clocks = <&scpi_dvfs 1>;
83 }; 115 };
84 116
85 A57_L2: l2-cache0 { 117 A57_L2: l2-cache0 {
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index d7cbdd482a61..c02f880584e8 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -34,12 +34,39 @@
34 #address-cells = <2>; 34 #address-cells = <2>;
35 #size-cells = <0>; 35 #size-cells = <0>;
36 36
37 cpu-map {
38 cluster0 {
39 core0 {
40 cpu = <&A57_0>;
41 };
42 core1 {
43 cpu = <&A57_1>;
44 };
45 };
46
47 cluster1 {
48 core0 {
49 cpu = <&A53_0>;
50 };
51 core1 {
52 cpu = <&A53_1>;
53 };
54 core2 {
55 cpu = <&A53_2>;
56 };
57 core3 {
58 cpu = <&A53_3>;
59 };
60 };
61 };
62
37 A57_0: cpu@0 { 63 A57_0: cpu@0 {
38 compatible = "arm,cortex-a57","arm,armv8"; 64 compatible = "arm,cortex-a57","arm,armv8";
39 reg = <0x0 0x0>; 65 reg = <0x0 0x0>;
40 device_type = "cpu"; 66 device_type = "cpu";
41 enable-method = "psci"; 67 enable-method = "psci";
42 next-level-cache = <&A57_L2>; 68 next-level-cache = <&A57_L2>;
69 clocks = <&scpi_dvfs 0>;
43 }; 70 };
44 71
45 A57_1: cpu@1 { 72 A57_1: cpu@1 {
@@ -48,6 +75,7 @@
48 device_type = "cpu"; 75 device_type = "cpu";
49 enable-method = "psci"; 76 enable-method = "psci";
50 next-level-cache = <&A57_L2>; 77 next-level-cache = <&A57_L2>;
78 clocks = <&scpi_dvfs 0>;
51 }; 79 };
52 80
53 A53_0: cpu@100 { 81 A53_0: cpu@100 {
@@ -56,6 +84,7 @@
56 device_type = "cpu"; 84 device_type = "cpu";
57 enable-method = "psci"; 85 enable-method = "psci";
58 next-level-cache = <&A53_L2>; 86 next-level-cache = <&A53_L2>;
87 clocks = <&scpi_dvfs 1>;
59 }; 88 };
60 89
61 A53_1: cpu@101 { 90 A53_1: cpu@101 {
@@ -64,6 +93,7 @@
64 device_type = "cpu"; 93 device_type = "cpu";
65 enable-method = "psci"; 94 enable-method = "psci";
66 next-level-cache = <&A53_L2>; 95 next-level-cache = <&A53_L2>;
96 clocks = <&scpi_dvfs 1>;
67 }; 97 };
68 98
69 A53_2: cpu@102 { 99 A53_2: cpu@102 {
@@ -72,6 +102,7 @@
72 device_type = "cpu"; 102 device_type = "cpu";
73 enable-method = "psci"; 103 enable-method = "psci";
74 next-level-cache = <&A53_L2>; 104 next-level-cache = <&A53_L2>;
105 clocks = <&scpi_dvfs 1>;
75 }; 106 };
76 107
77 A53_3: cpu@103 { 108 A53_3: cpu@103 {
@@ -80,6 +111,7 @@
80 device_type = "cpu"; 111 device_type = "cpu";
81 enable-method = "psci"; 112 enable-method = "psci";
82 next-level-cache = <&A53_L2>; 113 next-level-cache = <&A53_L2>;
114 clocks = <&scpi_dvfs 1>;
83 }; 115 };
84 116
85 A57_L2: l2-cache0 { 117 A57_L2: l2-cache0 {
diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
index 5b1d0181023b..bb3c26d1154d 100644
--- a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
+++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
@@ -186,6 +186,6 @@
186 <0 0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 186 <0 0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
187 <0 0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 187 <0 0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
188 188
189 /include/ "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi" 189 /include/ "vexpress-v2m-rs1.dtsi"
190 }; 190 };
191}; 191};
diff --git a/arch/arm64/boot/dts/arm/vexpress-v2m-rs1.dtsi b/arch/arm64/boot/dts/arm/vexpress-v2m-rs1.dtsi
new file mode 120000
index 000000000000..68fd0f8f1dee
--- /dev/null
+++ b/arch/arm64/boot/dts/arm/vexpress-v2m-rs1.dtsi
@@ -0,0 +1 @@
../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi \ No newline at end of file
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 4f2de3e789ee..c4957a4aa5aa 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -1,4 +1,6 @@
1dtb-$(CONFIG_ARCH_FSL_LS2085A) += fsl-ls2085a-simu.dtb 1dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
2dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
3dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
2 4
3always := $(dtb-y) 5always := $(dtb-y)
4subdir-y := $(dts-dirs) 6subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
new file mode 100644
index 000000000000..4cb996d6e686
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
@@ -0,0 +1,204 @@
1/*
2 * Device Tree file for Freescale LS2080a QDS Board.
3 *
4 * Copyright (C) 2015, Freescale Semiconductor
5 *
6 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPLv2 or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This library is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47/dts-v1/;
48
49/include/ "fsl-ls2080a.dtsi"
50
51/ {
52 model = "Freescale Layerscape 2080a QDS Board";
53 compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
54
55 aliases {
56 serial0 = &serial0;
57 serial1 = &serial1;
58 };
59
60};
61
62&esdhc {
63 status = "okay";
64};
65
66&ifc {
67 status = "okay";
68 #address-cells = <2>;
69 #size-cells = <1>;
70 ranges = <0x0 0x0 0x5 0x80000000 0x08000000
71 0x2 0x0 0x5 0x30000000 0x00010000
72 0x3 0x0 0x5 0x20000000 0x00010000>;
73
74 nor@0,0 {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "cfi-flash";
78 reg = <0x0 0x0 0x8000000>;
79 bank-width = <2>;
80 device-width = <1>;
81 };
82
83 nand@2,0 {
84 compatible = "fsl,ifc-nand";
85 reg = <0x2 0x0 0x10000>;
86 };
87
88 cpld@3,0 {
89 reg = <0x3 0x0 0x10000>;
90 compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
91 };
92};
93
94&i2c0 {
95 status = "okay";
96 pca9547@77 {
97 compatible = "nxp,pca9547";
98 reg = <0x77>;
99 #address-cells = <1>;
100 #size-cells = <0>;
101 i2c@0 {
102 #address-cells = <1>;
103 #size-cells = <0>;
104 reg = <0x00>;
105 rtc@68 {
106 compatible = "dallas,ds3232";
107 reg = <0x68>;
108 };
109 };
110
111 i2c@2 {
112 #address-cells = <1>;
113 #size-cells = <0>;
114 reg = <0x02>;
115
116 ina220@40 {
117 compatible = "ti,ina220";
118 reg = <0x40>;
119 shunt-resistor = <500>;
120 };
121
122 ina220@41 {
123 compatible = "ti,ina220";
124 reg = <0x41>;
125 shunt-resistor = <1000>;
126 };
127 };
128
129 i2c@3 {
130 #address-cells = <1>;
131 #size-cells = <0>;
132 reg = <0x3>;
133
134 adt7481@4c {
135 compatible = "adi,adt7461";
136 reg = <0x4c>;
137 };
138 };
139 };
140};
141
142&i2c1 {
143 status = "disabled";
144};
145
146&i2c2 {
147 status = "disabled";
148};
149
150&i2c3 {
151 status = "disabled";
152};
153
154&dspi {
155 status = "okay";
156 dflash0: n25q128a {
157 #address-cells = <1>;
158 #size-cells = <1>;
159 compatible = "st,m25p80";
160 spi-max-frequency = <3000000>;
161 reg = <0>;
162 };
163 dflash1: sst25wf040b {
164 #address-cells = <1>;
165 #size-cells = <1>;
166 compatible = "st,m25p80";
167 spi-max-frequency = <3000000>;
168 reg = <1>;
169 };
170 dflash2: en25s64 {
171 #address-cells = <1>;
172 #size-cells = <1>;
173 compatible = "st,m25p80";
174 spi-max-frequency = <3000000>;
175 reg = <2>;
176 };
177};
178
179&qspi {
180 status = "okay";
181 qflash0: s25fl008k {
182 #address-cells = <1>;
183 #size-cells = <1>;
184 compatible = "st,m25p80";
185 spi-max-frequency = <20000000>;
186 reg = <0>;
187 };
188};
189
190&sata0 {
191 status = "okay";
192};
193
194&sata1 {
195 status = "okay";
196};
197
198&usb0 {
199 status = "okay";
200};
201
202&usb1 {
203 status = "okay";
204};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
new file mode 100644
index 000000000000..e127f0baab19
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
@@ -0,0 +1,166 @@
1/*
2 * Device Tree file for Freescale LS2080a RDB Board.
3 *
4 * Copyright (C) 2015, Freescale Semiconductor
5 *
6 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPLv2 or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This library is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47/dts-v1/;
48
49/include/ "fsl-ls2080a.dtsi"
50
51/ {
52 model = "Freescale Layerscape 2080a RDB Board";
53 compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
54
55 aliases {
56 serial0 = &serial0;
57 serial1 = &serial1;
58 };
59};
60
61&esdhc {
62 status = "okay";
63};
64
65&ifc {
66 status = "okay";
67 #address-cells = <2>;
68 #size-cells = <1>;
69 ranges = <0x0 0x0 0x5 0x80000000 0x08000000
70 0x2 0x0 0x5 0x30000000 0x00010000
71 0x3 0x0 0x5 0x20000000 0x00010000>;
72
73 nor@0,0 {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 compatible = "cfi-flash";
77 reg = <0x0 0x0 0x8000000>;
78 bank-width = <2>;
79 device-width = <1>;
80 };
81
82 nand@2,0 {
83 compatible = "fsl,ifc-nand";
84 reg = <0x2 0x0 0x10000>;
85 };
86
87 cpld@3,0 {
88 reg = <0x3 0x0 0x10000>;
89 compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
90 };
91
92};
93
94&i2c0 {
95 status = "okay";
96 pca9547@75 {
97 compatible = "nxp,pca9547";
98 reg = <0x75>;
99 #address-cells = <1>;
100 #size-cells = <0>;
101 status = "disabled";
102 i2c@1 {
103 #address-cells = <1>;
104 #size-cells = <0>;
105 reg = <0x01>;
106 rtc@68 {
107 compatible = "dallas,ds3232";
108 reg = <0x68>;
109 };
110 };
111
112 i2c@3 {
113 #address-cells = <1>;
114 #size-cells = <0>;
115 reg = <0x3>;
116
117 adt7481@4c {
118 compatible = "adi,adt7461";
119 reg = <0x4c>;
120 };
121 };
122 };
123};
124
125&i2c1 {
126 status = "disabled";
127};
128
129&i2c2 {
130 status = "disabled";
131};
132
133&i2c3 {
134 status = "disabled";
135};
136
137&dspi {
138 status = "okay";
139 dflash0: n25q512a {
140 #address-cells = <1>;
141 #size-cells = <1>;
142 compatible = "st,m25p80";
143 spi-max-frequency = <3000000>;
144 reg = <0>;
145 };
146};
147
148&qspi {
149 status = "disabled";
150};
151
152&sata0 {
153 status = "okay";
154};
155
156&sata1 {
157 status = "okay";
158};
159
160&usb0 {
161 status = "okay";
162};
163
164&usb1 {
165 status = "okay";
166};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
index 82e2a6fccc64..505d038078a3 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Device Tree file for Freescale LS2085a software Simulator model 2 * Device Tree file for Freescale LS2080a software Simulator model
3 * 3 *
4 * Copyright (C) 2014, Freescale Semiconductor 4 * Copyright (C) 2014-2015, Freescale Semiconductor
5 * 5 *
6 * Bhupesh Sharma <bhupesh.sharma@freescale.com> 6 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
7 * 7 *
@@ -20,11 +20,6 @@
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details. 21 * GNU General Public License for more details.
22 * 22 *
23 * You should have received a copy of the GNU General Public
24 * License along with this library; if not, write to the Free
25 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
26 * MA 02110-1301 USA
27 *
28 * Or, alternatively, 23 * Or, alternatively,
29 * 24 *
30 * b) Permission is hereby granted, free of charge, to any person 25 * b) Permission is hereby granted, free of charge, to any person
@@ -51,11 +46,16 @@
51 46
52/dts-v1/; 47/dts-v1/;
53 48
54/include/ "fsl-ls2085a.dtsi" 49/include/ "fsl-ls2080a.dtsi"
55 50
56/ { 51/ {
57 model = "Freescale Layerscape 2085a software Simulator model"; 52 model = "Freescale Layerscape 2080a software Simulator model";
58 compatible = "fsl,ls2085a-simu", "fsl,ls2085a"; 53 compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
54
55 aliases {
56 serial0 = &serial0;
57 serial1 = &serial1;
58 };
59 59
60 ethernet@2210000 { 60 ethernet@2210000 {
61 compatible = "smsc,lan91c111"; 61 compatible = "smsc,lan91c111";
@@ -63,3 +63,8 @@
63 interrupts = <0 58 0x1>; 63 interrupts = <0 58 0x1>;
64 }; 64 };
65}; 65};
66
67&ifc {
68 status = "okay";
69};
70
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
new file mode 100644
index 000000000000..e81cd48d6245
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -0,0 +1,515 @@
1/*
2 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
3 *
4 * Copyright (C) 2014-2015, Freescale Semiconductor
5 *
6 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPLv2 or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This library is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47/ {
48 compatible = "fsl,ls2080a";
49 interrupt-parent = <&gic>;
50 #address-cells = <2>;
51 #size-cells = <2>;
52
53 cpus {
54 #address-cells = <2>;
55 #size-cells = <0>;
56
57 /*
58 * We expect the enable-method for cpu's to be "psci", but this
59 * is dependent on the SoC FW, which will fill this in.
60 *
61 * Currently supported enable-method is psci v0.2
62 */
63
64 /* We have 4 clusters having 2 Cortex-A57 cores each */
65 cpu@0 {
66 device_type = "cpu";
67 compatible = "arm,cortex-a57";
68 reg = <0x0 0x0>;
69 clocks = <&clockgen 1 0>;
70 };
71
72 cpu@1 {
73 device_type = "cpu";
74 compatible = "arm,cortex-a57";
75 reg = <0x0 0x1>;
76 clocks = <&clockgen 1 0>;
77 };
78
79 cpu@100 {
80 device_type = "cpu";
81 compatible = "arm,cortex-a57";
82 reg = <0x0 0x100>;
83 clocks = <&clockgen 1 1>;
84 };
85
86 cpu@101 {
87 device_type = "cpu";
88 compatible = "arm,cortex-a57";
89 reg = <0x0 0x101>;
90 clocks = <&clockgen 1 1>;
91 };
92
93 cpu@200 {
94 device_type = "cpu";
95 compatible = "arm,cortex-a57";
96 reg = <0x0 0x200>;
97 clocks = <&clockgen 1 2>;
98 };
99
100 cpu@201 {
101 device_type = "cpu";
102 compatible = "arm,cortex-a57";
103 reg = <0x0 0x201>;
104 clocks = <&clockgen 1 2>;
105 };
106
107 cpu@300 {
108 device_type = "cpu";
109 compatible = "arm,cortex-a57";
110 reg = <0x0 0x300>;
111 clocks = <&clockgen 1 3>;
112 };
113
114 cpu@301 {
115 device_type = "cpu";
116 compatible = "arm,cortex-a57";
117 reg = <0x0 0x301>;
118 clocks = <&clockgen 1 3>;
119 };
120 };
121
122 memory@80000000 {
123 device_type = "memory";
124 reg = <0x00000000 0x80000000 0 0x80000000>;
125 /* DRAM space - 1, size : 2 GB DRAM */
126 };
127
128 sysclk: sysclk {
129 compatible = "fixed-clock";
130 #clock-cells = <0>;
131 clock-frequency = <100000000>;
132 clock-output-names = "sysclk";
133 };
134
135 gic: interrupt-controller@6000000 {
136 compatible = "arm,gic-v3";
137 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
138 <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
139 <0x0 0x0c0c0000 0 0x2000>, /* GICC */
140 <0x0 0x0c0d0000 0 0x1000>, /* GICH */
141 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
142 #interrupt-cells = <3>;
143 #address-cells = <2>;
144 #size-cells = <2>;
145 ranges;
146 interrupt-controller;
147 interrupts = <1 9 0x4>;
148
149 its: gic-its@6020000 {
150 compatible = "arm,gic-v3-its";
151 msi-controller;
152 reg = <0x0 0x6020000 0 0x20000>;
153 };
154 };
155
156 timer {
157 compatible = "arm,armv8-timer";
158 interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
159 <1 14 0x8>, /* Physical Non-Secure PPI, active-low */
160 <1 11 0x8>, /* Virtual PPI, active-low */
161 <1 10 0x8>; /* Hypervisor PPI, active-low */
162 };
163
164 pmu {
165 compatible = "arm,armv8-pmuv3";
166 interrupts = <1 7 0x8>; /* PMU PPI, Level low type */
167 };
168
169 soc {
170 compatible = "simple-bus";
171 #address-cells = <2>;
172 #size-cells = <2>;
173 ranges;
174
175 clockgen: clocking@1300000 {
176 compatible = "fsl,ls2080a-clockgen";
177 reg = <0 0x1300000 0 0xa0000>;
178 #clock-cells = <2>;
179 clocks = <&sysclk>;
180 };
181
182 serial0: serial@21c0500 {
183 compatible = "fsl,ns16550", "ns16550a";
184 reg = <0x0 0x21c0500 0x0 0x100>;
185 clocks = <&clockgen 4 3>;
186 interrupts = <0 32 0x4>; /* Level high type */
187 };
188
189 serial1: serial@21c0600 {
190 compatible = "fsl,ns16550", "ns16550a";
191 reg = <0x0 0x21c0600 0x0 0x100>;
192 clocks = <&clockgen 4 3>;
193 interrupts = <0 32 0x4>; /* Level high type */
194 };
195
196 fsl_mc: fsl-mc@80c000000 {
197 compatible = "fsl,qoriq-mc";
198 reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
199 <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
200 };
201
202 smmu: iommu@5000000 {
203 compatible = "arm,mmu-500";
204 reg = <0 0x5000000 0 0x800000>;
205 #global-interrupts = <12>;
206 interrupts = <0 13 4>, /* global secure fault */
207 <0 14 4>, /* combined secure interrupt */
208 <0 15 4>, /* global non-secure fault */
209 <0 16 4>, /* combined non-secure interrupt */
210 /* performance counter interrupts 0-7 */
211 <0 211 4>, <0 212 4>,
212 <0 213 4>, <0 214 4>,
213 <0 215 4>, <0 216 4>,
214 <0 217 4>, <0 218 4>,
215 /* per context interrupt, 64 interrupts */
216 <0 146 4>, <0 147 4>,
217 <0 148 4>, <0 149 4>,
218 <0 150 4>, <0 151 4>,
219 <0 152 4>, <0 153 4>,
220 <0 154 4>, <0 155 4>,
221 <0 156 4>, <0 157 4>,
222 <0 158 4>, <0 159 4>,
223 <0 160 4>, <0 161 4>,
224 <0 162 4>, <0 163 4>,
225 <0 164 4>, <0 165 4>,
226 <0 166 4>, <0 167 4>,
227 <0 168 4>, <0 169 4>,
228 <0 170 4>, <0 171 4>,
229 <0 172 4>, <0 173 4>,
230 <0 174 4>, <0 175 4>,
231 <0 176 4>, <0 177 4>,
232 <0 178 4>, <0 179 4>,
233 <0 180 4>, <0 181 4>,
234 <0 182 4>, <0 183 4>,
235 <0 184 4>, <0 185 4>,
236 <0 186 4>, <0 187 4>,
237 <0 188 4>, <0 189 4>,
238 <0 190 4>, <0 191 4>,
239 <0 192 4>, <0 193 4>,
240 <0 194 4>, <0 195 4>,
241 <0 196 4>, <0 197 4>,
242 <0 198 4>, <0 199 4>,
243 <0 200 4>, <0 201 4>,
244 <0 202 4>, <0 203 4>,
245 <0 204 4>, <0 205 4>,
246 <0 206 4>, <0 207 4>,
247 <0 208 4>, <0 209 4>;
248 mmu-masters = <&fsl_mc 0x300 0>;
249 };
250
251 dspi: dspi@2100000 {
252 status = "disabled";
253 compatible = "fsl,vf610-dspi";
254 #address-cells = <1>;
255 #size-cells = <0>;
256 reg = <0x0 0x2100000 0x0 0x10000>;
257 interrupts = <0 26 0x4>; /* Level high type */
258 clocks = <&clockgen 4 3>;
259 clock-names = "dspi";
260 spi-num-chipselects = <5>;
261 bus-num = <0>;
262 };
263
264 esdhc: esdhc@2140000 {
265 status = "disabled";
266 compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
267 reg = <0x0 0x2140000 0x0 0x10000>;
268 interrupts = <0 28 0x4>; /* Level high type */
269 clock-frequency = <0>; /* Updated by bootloader */
270 voltage-ranges = <1800 1800 3300 3300>;
271 sdhci,auto-cmd12;
272 bus-width = <4>;
273 };
274
275 gpio0: gpio@2300000 {
276 compatible = "fsl,qoriq-gpio";
277 reg = <0x0 0x2300000 0x0 0x10000>;
278 interrupts = <0 36 0x4>; /* Level high type */
279 gpio-controller;
280 #gpio-cells = <2>;
281 interrupt-controller;
282 #interrupt-cells = <2>;
283 };
284
285 gpio1: gpio@2310000 {
286 compatible = "fsl,qoriq-gpio";
287 reg = <0x0 0x2310000 0x0 0x10000>;
288 interrupts = <0 36 0x4>; /* Level high type */
289 gpio-controller;
290 #gpio-cells = <2>;
291 interrupt-controller;
292 #interrupt-cells = <2>;
293 };
294
295 gpio2: gpio@2320000 {
296 compatible = "fsl,qoriq-gpio";
297 reg = <0x0 0x2320000 0x0 0x10000>;
298 interrupts = <0 37 0x4>; /* Level high type */
299 gpio-controller;
300 #gpio-cells = <2>;
301 interrupt-controller;
302 #interrupt-cells = <2>;
303 };
304
305 gpio3: gpio@2330000 {
306 compatible = "fsl,qoriq-gpio";
307 reg = <0x0 0x2330000 0x0 0x10000>;
308 interrupts = <0 37 0x4>; /* Level high type */
309 gpio-controller;
310 #gpio-cells = <2>;
311 interrupt-controller;
312 #interrupt-cells = <2>;
313 };
314
315 i2c0: i2c@2000000 {
316 status = "disabled";
317 compatible = "fsl,vf610-i2c";
318 #address-cells = <1>;
319 #size-cells = <0>;
320 reg = <0x0 0x2000000 0x0 0x10000>;
321 interrupts = <0 34 0x4>; /* Level high type */
322 clock-names = "i2c";
323 clocks = <&clockgen 4 3>;
324 };
325
326 i2c1: i2c@2010000 {
327 status = "disabled";
328 compatible = "fsl,vf610-i2c";
329 #address-cells = <1>;
330 #size-cells = <0>;
331 reg = <0x0 0x2010000 0x0 0x10000>;
332 interrupts = <0 34 0x4>; /* Level high type */
333 clock-names = "i2c";
334 clocks = <&clockgen 4 3>;
335 };
336
337 i2c2: i2c@2020000 {
338 status = "disabled";
339 compatible = "fsl,vf610-i2c";
340 #address-cells = <1>;
341 #size-cells = <0>;
342 reg = <0x0 0x2020000 0x0 0x10000>;
343 interrupts = <0 35 0x4>; /* Level high type */
344 clock-names = "i2c";
345 clocks = <&clockgen 4 3>;
346 };
347
348 i2c3: i2c@2030000 {
349 status = "disabled";
350 compatible = "fsl,vf610-i2c";
351 #address-cells = <1>;
352 #size-cells = <0>;
353 reg = <0x0 0x2030000 0x0 0x10000>;
354 interrupts = <0 35 0x4>; /* Level high type */
355 clock-names = "i2c";
356 clocks = <&clockgen 4 3>;
357 };
358
359 ifc: ifc@2240000 {
360 compatible = "fsl,ifc", "simple-bus";
361 reg = <0x0 0x2240000 0x0 0x20000>;
362 interrupts = <0 21 0x4>; /* Level high type */
363 little-endian;
364 #address-cells = <2>;
365 #size-cells = <1>;
366
367 ranges = <0 0 0x5 0x80000000 0x08000000
368 2 0 0x5 0x30000000 0x00010000
369 3 0 0x5 0x20000000 0x00010000>;
370 };
371
372 qspi: quadspi@20c0000 {
373 status = "disabled";
374 compatible = "fsl,vf610-qspi";
375 #address-cells = <1>;
376 #size-cells = <0>;
377 reg = <0x0 0x20c0000 0x0 0x10000>,
378 <0x0 0x20000000 0x0 0x10000000>;
379 reg-names = "QuadSPI", "QuadSPI-memory";
380 interrupts = <0 25 0x4>; /* Level high type */
381 clocks = <&clockgen 4 3>, <&clockgen 4 3>;
382 clock-names = "qspi_en", "qspi";
383 };
384
385 pcie@3400000 {
386 compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
387 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
388 0x10 0x00000000 0x0 0x00002000>; /* configuration space */
389 reg-names = "regs", "config";
390 interrupts = <0 108 0x4>; /* Level high type */
391 interrupt-names = "intr";
392 #address-cells = <3>;
393 #size-cells = <2>;
394 device_type = "pci";
395 num-lanes = <4>;
396 bus-range = <0x0 0xff>;
397 ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000 /* downstream I/O */
398 0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
399 msi-parent = <&its>;
400 #interrupt-cells = <1>;
401 interrupt-map-mask = <0 0 0 7>;
402 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
403 <0000 0 0 2 &gic 0 0 0 110 4>,
404 <0000 0 0 3 &gic 0 0 0 111 4>,
405 <0000 0 0 4 &gic 0 0 0 112 4>;
406 };
407
408 pcie@3500000 {
409 compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
410 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
411 0x12 0x00000000 0x0 0x00002000>; /* configuration space */
412 reg-names = "regs", "config";
413 interrupts = <0 113 0x4>; /* Level high type */
414 interrupt-names = "intr";
415 #address-cells = <3>;
416 #size-cells = <2>;
417 device_type = "pci";
418 num-lanes = <4>;
419 bus-range = <0x0 0xff>;
420 ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000 /* downstream I/O */
421 0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
422 msi-parent = <&its>;
423 #interrupt-cells = <1>;
424 interrupt-map-mask = <0 0 0 7>;
425 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
426 <0000 0 0 2 &gic 0 0 0 115 4>,
427 <0000 0 0 3 &gic 0 0 0 116 4>,
428 <0000 0 0 4 &gic 0 0 0 117 4>;
429 };
430
431 pcie@3600000 {
432 compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
433 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
434 0x14 0x00000000 0x0 0x00002000>; /* configuration space */
435 reg-names = "regs", "config";
436 interrupts = <0 118 0x4>; /* Level high type */
437 interrupt-names = "intr";
438 #address-cells = <3>;
439 #size-cells = <2>;
440 device_type = "pci";
441 num-lanes = <8>;
442 bus-range = <0x0 0xff>;
443 ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000 /* downstream I/O */
444 0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
445 msi-parent = <&its>;
446 #interrupt-cells = <1>;
447 interrupt-map-mask = <0 0 0 7>;
448 interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
449 <0000 0 0 2 &gic 0 0 0 120 4>,
450 <0000 0 0 3 &gic 0 0 0 121 4>,
451 <0000 0 0 4 &gic 0 0 0 122 4>;
452 };
453
454 pcie@3700000 {
455 compatible = "fsl,ls2080a-pcie", "snps,dw-pcie";
456 reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
457 0x16 0x00000000 0x0 0x00002000>; /* configuration space */
458 reg-names = "regs", "config";
459 interrupts = <0 123 0x4>; /* Level high type */
460 interrupt-names = "intr";
461 #address-cells = <3>;
462 #size-cells = <2>;
463 device_type = "pci";
464 num-lanes = <4>;
465 bus-range = <0x0 0xff>;
466 ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */
467 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
468 msi-parent = <&its>;
469 #interrupt-cells = <1>;
470 interrupt-map-mask = <0 0 0 7>;
471 interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
472 <0000 0 0 2 &gic 0 0 0 125 4>,
473 <0000 0 0 3 &gic 0 0 0 126 4>,
474 <0000 0 0 4 &gic 0 0 0 127 4>;
475 };
476
477 sata0: sata@3200000 {
478 status = "disabled";
479 compatible = "fsl,ls2080a-ahci";
480 reg = <0x0 0x3200000 0x0 0x10000>;
481 interrupts = <0 133 0x4>; /* Level high type */
482 clocks = <&clockgen 4 3>;
483 };
484
485 sata1: sata@3210000 {
486 status = "disabled";
487 compatible = "fsl,ls2080a-ahci";
488 reg = <0x0 0x3210000 0x0 0x10000>;
489 interrupts = <0 136 0x4>; /* Level high type */
490 clocks = <&clockgen 4 3>;
491 };
492
493 usb0: usb3@3100000 {
494 status = "disabled";
495 compatible = "snps,dwc3";
496 reg = <0x0 0x3100000 0x0 0x10000>;
497 interrupts = <0 80 0x4>; /* Level high type */
498 dr_mode = "host";
499 };
500
501 usb1: usb3@3110000 {
502 status = "disabled";
503 compatible = "snps,dwc3";
504 reg = <0x0 0x3110000 0x0 0x10000>;
505 interrupts = <0 81 0x4>; /* Level high type */
506 dr_mode = "host";
507 };
508
509 ccn@4000000 {
510 compatible = "arm,ccn-504";
511 reg = <0x0 0x04000000 0x0 0x01000000>;
512 interrupts = <0 12 4>;
513 };
514 };
515};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
deleted file mode 100644
index e281ceb338c3..000000000000
--- a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
+++ /dev/null
@@ -1,163 +0,0 @@
1/*
2 * Device Tree Include file for Freescale Layerscape-2085A family SoC.
3 *
4 * Copyright (C) 2014, Freescale Semiconductor
5 *
6 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPLv2 or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This library is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public
24 * License along with this library; if not, write to the Free
25 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
26 * MA 02110-1301 USA
27 *
28 * Or, alternatively,
29 *
30 * b) Permission is hereby granted, free of charge, to any person
31 * obtaining a copy of this software and associated documentation
32 * files (the "Software"), to deal in the Software without
33 * restriction, including without limitation the rights to use,
34 * copy, modify, merge, publish, distribute, sublicense, and/or
35 * sell copies of the Software, and to permit persons to whom the
36 * Software is furnished to do so, subject to the following
37 * conditions:
38 *
39 * The above copyright notice and this permission notice shall be
40 * included in all copies or substantial portions of the Software.
41 *
42 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
43 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
44 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
45 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
46 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
47 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
48 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
49 * OTHER DEALINGS IN THE SOFTWARE.
50 */
51
52/ {
53 compatible = "fsl,ls2085a";
54 interrupt-parent = <&gic>;
55 #address-cells = <2>;
56 #size-cells = <2>;
57
58 cpus {
59 #address-cells = <2>;
60 #size-cells = <0>;
61
62 /*
63 * We expect the enable-method for cpu's to be "psci", but this
64 * is dependent on the SoC FW, which will fill this in.
65 *
66 * Currently supported enable-method is psci v0.2
67 */
68
69 /* We have 4 clusters having 2 Cortex-A57 cores each */
70 cpu@0 {
71 device_type = "cpu";
72 compatible = "arm,cortex-a57";
73 reg = <0x0 0x0>;
74 };
75
76 cpu@1 {
77 device_type = "cpu";
78 compatible = "arm,cortex-a57";
79 reg = <0x0 0x1>;
80 };
81
82 cpu@100 {
83 device_type = "cpu";
84 compatible = "arm,cortex-a57";
85 reg = <0x0 0x100>;
86 };
87
88 cpu@101 {
89 device_type = "cpu";
90 compatible = "arm,cortex-a57";
91 reg = <0x0 0x101>;
92 };
93
94 cpu@200 {
95 device_type = "cpu";
96 compatible = "arm,cortex-a57";
97 reg = <0x0 0x200>;
98 };
99
100 cpu@201 {
101 device_type = "cpu";
102 compatible = "arm,cortex-a57";
103 reg = <0x0 0x201>;
104 };
105
106 cpu@300 {
107 device_type = "cpu";
108 compatible = "arm,cortex-a57";
109 reg = <0x0 0x300>;
110 };
111
112 cpu@301 {
113 device_type = "cpu";
114 compatible = "arm,cortex-a57";
115 reg = <0x0 0x301>;
116 };
117 };
118
119 memory@80000000 {
120 device_type = "memory";
121 reg = <0x00000000 0x80000000 0 0x80000000>;
122 /* DRAM space - 1, size : 2 GB DRAM */
123 };
124
125 gic: interrupt-controller@6000000 {
126 compatible = "arm,gic-v3";
127 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
128 <0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */
129 #interrupt-cells = <3>;
130 interrupt-controller;
131 interrupts = <1 9 0x4>;
132 };
133
134 timer {
135 compatible = "arm,armv8-timer";
136 interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
137 <1 14 0x8>, /* Physical Non-Secure PPI, active-low */
138 <1 11 0x8>, /* Virtual PPI, active-low */
139 <1 10 0x8>; /* Hypervisor PPI, active-low */
140 };
141
142 serial0: serial@21c0500 {
143 device_type = "serial";
144 compatible = "fsl,ns16550", "ns16550a";
145 reg = <0x0 0x21c0500 0x0 0x100>;
146 clock-frequency = <0>; /* Updated by bootloader */
147 interrupts = <0 32 0x1>; /* edge triggered */
148 };
149
150 serial1: serial@21c0600 {
151 device_type = "serial";
152 compatible = "fsl,ns16550", "ns16550a";
153 reg = <0x0 0x21c0600 0x0 0x100>;
154 clock-frequency = <0>; /* Updated by bootloader */
155 interrupts = <0 32 0x1>; /* edge triggered */
156 };
157
158 fsl_mc: fsl-mc@80c000000 {
159 compatible = "fsl,qoriq-mc";
160 reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
161 <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
162 };
163};
diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile
index fa81a6ee6473..cd158b80e29b 100644
--- a/arch/arm64/boot/dts/hisilicon/Makefile
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -1,4 +1,4 @@
1dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb 1dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb hip05-d02.dtb
2 2
3always := $(dtb-y) 3always := $(dtb-y)
4subdir-y := $(dts-dirs) 4subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index e36a539468a5..8d43a0fce522 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -17,11 +17,14 @@
17 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; 17 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
18 18
19 aliases { 19 aliases {
20 serial0 = &uart0; 20 serial0 = &uart0; /* On board UART0 */
21 serial1 = &uart1; /* BT UART */
22 serial2 = &uart2; /* LS Expansion UART0 */
23 serial3 = &uart3; /* LS Expansion UART1 */
21 }; 24 };
22 25
23 chosen { 26 chosen {
24 stdout-path = "serial0:115200n8"; 27 stdout-path = "serial3:115200n8";
25 }; 28 };
26 29
27 memory@0 { 30 memory@0 {
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 3f03380815b6..82d2488a0e86 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -5,6 +5,7 @@
5 */ 5 */
6 6
7#include <dt-bindings/interrupt-controller/arm-gic.h> 7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/clock/hi6220-clock.h>
8 9
9/ { 10/ {
10 compatible = "hisilicon,hi6220"; 11 compatible = "hisilicon,hi6220";
@@ -164,8 +165,48 @@
164 compatible = "arm,pl011", "arm,primecell"; 165 compatible = "arm,pl011", "arm,primecell";
165 reg = <0x0 0xf8015000 0x0 0x1000>; 166 reg = <0x0 0xf8015000 0x0 0x1000>;
166 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 167 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
167 clocks = <&ao_ctrl 36>, <&ao_ctrl 36>; 168 clocks = <&ao_ctrl HI6220_UART0_PCLK>,
169 <&ao_ctrl HI6220_UART0_PCLK>;
168 clock-names = "uartclk", "apb_pclk"; 170 clock-names = "uartclk", "apb_pclk";
169 }; 171 };
172
173 uart1: uart@f7111000 {
174 compatible = "arm,pl011", "arm,primecell";
175 reg = <0x0 0xf7111000 0x0 0x1000>;
176 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
177 clocks = <&sys_ctrl HI6220_UART1_PCLK>,
178 <&sys_ctrl HI6220_UART1_PCLK>;
179 clock-names = "uartclk", "apb_pclk";
180 status = "disabled";
181 };
182
183 uart2: uart@f7112000 {
184 compatible = "arm,pl011", "arm,primecell";
185 reg = <0x0 0xf7112000 0x0 0x1000>;
186 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
187 clocks = <&sys_ctrl HI6220_UART2_PCLK>,
188 <&sys_ctrl HI6220_UART2_PCLK>;
189 clock-names = "uartclk", "apb_pclk";
190 status = "disabled";
191 };
192
193 uart3: uart@f7113000 {
194 compatible = "arm,pl011", "arm,primecell";
195 reg = <0x0 0xf7113000 0x0 0x1000>;
196 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
197 clocks = <&sys_ctrl HI6220_UART3_PCLK>,
198 <&sys_ctrl HI6220_UART3_PCLK>;
199 clock-names = "uartclk", "apb_pclk";
200 };
201
202 uart4: uart@f7114000 {
203 compatible = "arm,pl011", "arm,primecell";
204 reg = <0x0 0xf7114000 0x0 0x1000>;
205 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
206 clocks = <&sys_ctrl HI6220_UART4_PCLK>,
207 <&sys_ctrl HI6220_UART4_PCLK>;
208 clock-names = "uartclk", "apb_pclk";
209 status = "disabled";
210 };
170 }; 211 };
171}; 212};
diff --git a/arch/arm64/boot/dts/hisilicon/hip05-d02.dts b/arch/arm64/boot/dts/hisilicon/hip05-d02.dts
new file mode 100644
index 000000000000..ae34e250456f
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hip05-d02.dts
@@ -0,0 +1,36 @@
1/**
2 * dts file for Hisilicon D02 Development Board
3 *
4 * Copyright (C) 2014,2015 Hisilicon Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * publishhed by the Free Software Foundation.
9 *
10 */
11
12/dts-v1/;
13
14#include "hip05.dtsi"
15
16/ {
17 model = "Hisilicon Hip05 D02 Development Board";
18 compatible = "hisilicon,hip05-d02";
19
20 memory@00000000 {
21 device_type = "memory";
22 reg = <0x0 0x00000000 0x0 0x80000000>;
23 };
24
25 aliases {
26 serial0 = &uart0;
27 };
28
29 chosen {
30 stdout-path = "serial0:115200n8";
31 };
32};
33
34&uart0 {
35 status = "ok";
36};
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
new file mode 100644
index 000000000000..4ff16d016e34
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -0,0 +1,271 @@
1/**
2 * dts file for Hisilicon D02 Development Board
3 *
4 * Copyright (C) 2014,2015 Hisilicon Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * publishhed by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13
14/ {
15 compatible = "hisilicon,hip05-d02";
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 psci {
21 compatible = "arm,psci-0.2";
22 method = "smc";
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu-map {
30 cluster0 {
31 core0 {
32 cpu = <&cpu0>;
33 };
34 core1 {
35 cpu = <&cpu1>;
36 };
37 core2 {
38 cpu = <&cpu2>;
39 };
40 core3 {
41 cpu = <&cpu3>;
42 };
43 };
44 cluster1 {
45 core0 {
46 cpu = <&cpu4>;
47 };
48 core1 {
49 cpu = <&cpu5>;
50 };
51 core2 {
52 cpu = <&cpu6>;
53 };
54 core3 {
55 cpu = <&cpu7>;
56 };
57 };
58 cluster2 {
59 core0 {
60 cpu = <&cpu8>;
61 };
62 core1 {
63 cpu = <&cpu9>;
64 };
65 core2 {
66 cpu = <&cpu10>;
67 };
68 core3 {
69 cpu = <&cpu11>;
70 };
71 };
72 cluster3 {
73 core0 {
74 cpu = <&cpu12>;
75 };
76 core1 {
77 cpu = <&cpu13>;
78 };
79 core2 {
80 cpu = <&cpu14>;
81 };
82 core3 {
83 cpu = <&cpu15>;
84 };
85 };
86 };
87
88 cpu0: cpu@20000 {
89 device_type = "cpu";
90 compatible = "arm,cortex-a57", "arm,armv8";
91 reg = <0x20000>;
92 enable-method = "psci";
93 };
94
95 cpu1: cpu@20001 {
96 device_type = "cpu";
97 compatible = "arm,cortex-a57", "arm,armv8";
98 reg = <0x20001>;
99 enable-method = "psci";
100 };
101
102 cpu2: cpu@20002 {
103 device_type = "cpu";
104 compatible = "arm,cortex-a57", "arm,armv8";
105 reg = <0x20002>;
106 enable-method = "psci";
107 };
108
109 cpu3: cpu@20003 {
110 device_type = "cpu";
111 compatible = "arm,cortex-a57", "arm,armv8";
112 reg = <0x20003>;
113 enable-method = "psci";
114 };
115
116 cpu4: cpu@20100 {
117 device_type = "cpu";
118 compatible = "arm,cortex-a57", "arm,armv8";
119 reg = <0x20100>;
120 enable-method = "psci";
121 };
122
123 cpu5: cpu@20101 {
124 device_type = "cpu";
125 compatible = "arm,cortex-a57", "arm,armv8";
126 reg = <0x20101>;
127 enable-method = "psci";
128 };
129
130 cpu6: cpu@20102 {
131 device_type = "cpu";
132 compatible = "arm,cortex-a57", "arm,armv8";
133 reg = <0x20102>;
134 enable-method = "psci";
135 };
136
137 cpu7: cpu@20103 {
138 device_type = "cpu";
139 compatible = "arm,cortex-a57", "arm,armv8";
140 reg = <0x20103>;
141 enable-method = "psci";
142 };
143
144 cpu8: cpu@20200 {
145 device_type = "cpu";
146 compatible = "arm,cortex-a57", "arm,armv8";
147 reg = <0x20200>;
148 enable-method = "psci";
149 };
150
151 cpu9: cpu@20201 {
152 device_type = "cpu";
153 compatible = "arm,cortex-a57", "arm,armv8";
154 reg = <0x20201>;
155 enable-method = "psci";
156 };
157
158 cpu10: cpu@20202 {
159 device_type = "cpu";
160 compatible = "arm,cortex-a57", "arm,armv8";
161 reg = <0x20202>;
162 enable-method = "psci";
163 };
164
165 cpu11: cpu@20203 {
166 device_type = "cpu";
167 compatible = "arm,cortex-a57", "arm,armv8";
168 reg = <0x20203>;
169 enable-method = "psci";
170 };
171
172 cpu12: cpu@20300 {
173 device_type = "cpu";
174 compatible = "arm,cortex-a57", "arm,armv8";
175 reg = <0x20300>;
176 enable-method = "psci";
177 };
178
179 cpu13: cpu@20301 {
180 device_type = "cpu";
181 compatible = "arm,cortex-a57", "arm,armv8";
182 reg = <0x20301>;
183 enable-method = "psci";
184 };
185
186 cpu14: cpu@20302 {
187 device_type = "cpu";
188 compatible = "arm,cortex-a57", "arm,armv8";
189 reg = <0x20302>;
190 enable-method = "psci";
191 };
192
193 cpu15: cpu@20303 {
194 device_type = "cpu";
195 compatible = "arm,cortex-a57", "arm,armv8";
196 reg = <0x20303>;
197 enable-method = "psci";
198 };
199 };
200
201 gic: interrupt-controller@8d000000 {
202 compatible = "arm,gic-v3";
203 #interrupt-cells = <3>;
204 #address-cells = <2>;
205 #size-cells = <2>;
206 ranges;
207 interrupt-controller;
208 #redistributor-regions = <1>;
209 redistributor-stride = <0x0 0x30000>;
210 reg = <0x0 0x8d000000 0 0x10000>, /* GICD */
211 <0x0 0x8d100000 0 0x300000>, /* GICR */
212 <0x0 0xfe000000 0 0x10000>, /* GICC */
213 <0x0 0xfe010000 0 0x10000>, /* GICH */
214 <0x0 0xfe020000 0 0x10000>; /* GICV */
215 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
216
217 its_totems: interrupt-controller@8c000000 {
218 compatible = "arm,gic-v3-its";
219 msi-controller;
220 reg = <0x0 0x8c000000 0x0 0x40000>;
221 };
222 };
223
224 timer {
225 compatible = "arm,armv8-timer";
226 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
227 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
228 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
229 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
230 };
231
232 pmu {
233 compatible = "arm,armv8-pmuv3";
234 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
235 };
236
237 soc {
238 compatible = "simple-bus";
239 #address-cells = <2>;
240 #size-cells = <2>;
241 ranges;
242
243 refclk200mhz: refclk200mhz {
244 compatible = "fixed-clock";
245 #clock-cells = <0>;
246 clock-frequency = <200000000>;
247 };
248
249 uart0: uart@80300000 {
250 compatible = "snps,dw-apb-uart";
251 reg = <0x0 0x80300000 0x0 0x10000>;
252 interrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
253 clocks = <&refclk200mhz>;
254 clock-names = "apb_pclk";
255 reg-shift = <2>;
256 reg-io-width = <4>;
257 status = "disabled";
258 };
259
260 uart1: uart@80310000 {
261 compatible = "snps,dw-apb-uart";
262 reg = <0x0 0x80310000 0x0 0x10000>;
263 interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&refclk200mhz>;
265 clock-names = "apb_pclk";
266 reg-shift = <2>;
267 reg-io-width = <4>;
268 status = "disabled";
269 };
270 };
271};
diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
index e2f6afa7f849..348f4db4f313 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -1,4 +1,5 @@
1dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-dmp.dtb 1dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-dmp.dtb
2dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-stb.dtb
2 3
3always := $(dtb-y) 4always := $(dtb-y)
4subdir-y := $(dts-dirs) 5subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/marvell/berlin4ct-stb.dts b/arch/arm64/boot/dts/marvell/berlin4ct-stb.dts
new file mode 100644
index 000000000000..348c37ecf069
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/berlin4ct-stb.dts
@@ -0,0 +1,66 @@
1/*
2 * Copyright (C) 2015 Marvell Technology Group Ltd.
3 *
4 * Author: Jisheng Zhang <jszhang@marvell.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPLv2 or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/dts-v1/;
46
47#include "berlin4ct.dtsi"
48
49/ {
50 model = "Marvell BG4CT STB board";
51 compatible = "marvell,berlin4ct-stb", "marvell,berlin4ct", "marvell,berlin";
52
53 chosen {
54 stdout-path = "serial0:115200n8";
55 };
56
57 memory {
58 device_type = "memory";
59 /* the first 16MB is for firmwares' usage */
60 reg = <0 0x01000000 0 0x7f000000>;
61 };
62};
63
64&uart0 {
65 status = "okay";
66};
diff --git a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
index dd4a10d605d9..a3b5f1d4a240 100644
--- a/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
+++ b/arch/arm64/boot/dts/marvell/berlin4ct.dtsi
@@ -135,6 +135,96 @@
135 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 135 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
136 }; 136 };
137 137
138 apb@e80000 {
139 compatible = "simple-bus";
140 #address-cells = <1>;
141 #size-cells = <1>;
142
143 ranges = <0 0xe80000 0x10000>;
144 interrupt-parent = <&aic>;
145
146 gpio0: gpio@0400 {
147 compatible = "snps,dw-apb-gpio";
148 reg = <0x0400 0x400>;
149 #address-cells = <1>;
150 #size-cells = <0>;
151
152 porta: gpio-port@0 {
153 compatible = "snps,dw-apb-gpio-port";
154 gpio-controller;
155 #gpio-cells = <2>;
156 snps,nr-gpios = <32>;
157 reg = <0>;
158 interrupt-controller;
159 #interrupt-cells = <2>;
160 interrupts = <0>;
161 };
162 };
163
164 gpio1: gpio@0800 {
165 compatible = "snps,dw-apb-gpio";
166 reg = <0x0800 0x400>;
167 #address-cells = <1>;
168 #size-cells = <0>;
169
170 portb: gpio-port@1 {
171 compatible = "snps,dw-apb-gpio-port";
172 gpio-controller;
173 #gpio-cells = <2>;
174 snps,nr-gpios = <32>;
175 reg = <0>;
176 interrupt-controller;
177 #interrupt-cells = <2>;
178 interrupts = <1>;
179 };
180 };
181
182 gpio2: gpio@0c00 {
183 compatible = "snps,dw-apb-gpio";
184 reg = <0x0c00 0x400>;
185 #address-cells = <1>;
186 #size-cells = <0>;
187
188 portc: gpio-port@2 {
189 compatible = "snps,dw-apb-gpio-port";
190 gpio-controller;
191 #gpio-cells = <2>;
192 snps,nr-gpios = <32>;
193 reg = <0>;
194 interrupt-controller;
195 #interrupt-cells = <2>;
196 interrupts = <2>;
197 };
198 };
199
200 gpio3: gpio@1000 {
201 compatible = "snps,dw-apb-gpio";
202 reg = <0x1000 0x400>;
203 #address-cells = <1>;
204 #size-cells = <0>;
205
206 portd: gpio-port@3 {
207 compatible = "snps,dw-apb-gpio-port";
208 gpio-controller;
209 #gpio-cells = <2>;
210 snps,nr-gpios = <32>;
211 reg = <0>;
212 interrupt-controller;
213 #interrupt-cells = <2>;
214 interrupts = <3>;
215 };
216 };
217
218 aic: interrupt-controller@3800 {
219 compatible = "snps,dw-apb-ictl";
220 reg = <0x3800 0x30>;
221 interrupt-controller;
222 #interrupt-cells = <1>;
223 interrupt-parent = <&gic>;
224 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
225 };
226 };
227
138 apb@fc0000 { 228 apb@fc0000 {
139 compatible = "simple-bus"; 229 compatible = "simple-bus";
140 #address-cells = <1>; 230 #address-cells = <1>;
@@ -151,6 +241,36 @@
151 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 241 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
152 }; 242 };
153 243
244 sm_gpio0: gpio@8000 {
245 compatible = "snps,dw-apb-gpio";
246 reg = <0x8000 0x400>;
247 #address-cells = <1>;
248 #size-cells = <0>;
249
250 porte: gpio-port@4 {
251 compatible = "snps,dw-apb-gpio-port";
252 gpio-controller;
253 #gpio-cells = <2>;
254 snps,nr-gpios = <32>;
255 reg = <0>;
256 };
257 };
258
259 sm_gpio1: gpio@9000 {
260 compatible = "snps,dw-apb-gpio";
261 reg = <0x9000 0x400>;
262 #address-cells = <1>;
263 #size-cells = <0>;
264
265 portf: gpio-port@5 {
266 compatible = "snps,dw-apb-gpio-port";
267 gpio-controller;
268 #gpio-cells = <2>;
269 snps,nr-gpios = <32>;
270 reg = <0>;
271 };
272 };
273
154 uart0: uart@d000 { 274 uart0: uart@d000 {
155 compatible = "snps,dw-apb-uart"; 275 compatible = "snps,dw-apb-uart";
156 reg = <0xd000 0x100>; 276 reg = <0xd000 0x100>;
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee4259ee5..06a15644be38 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -81,7 +81,7 @@
81 }; 81 };
82 82
83 idle-states { 83 idle-states {
84 entry-method = "arm,psci"; 84 entry-method = "psci";
85 85
86 CPU_SLEEP_0: cpu-sleep-0 { 86 CPU_SLEEP_0: cpu-sleep-0 {
87 compatible = "arm,idle-state"; 87 compatible = "arm,idle-state";
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 66804ffbc6d2..6b8abbe68746 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -19,6 +19,7 @@
19/ { 19/ {
20 aliases { 20 aliases {
21 serial0 = &blsp1_uart2; 21 serial0 = &blsp1_uart2;
22 serial1 = &blsp1_uart1;
22 }; 23 };
23 24
24 chosen { 25 chosen {
@@ -33,6 +34,31 @@
33 pinctrl-1 = <&blsp1_uart2_sleep>; 34 pinctrl-1 = <&blsp1_uart2_sleep>;
34 }; 35 };
35 36
37 i2c@78b6000 {
38 /* On Low speed expansion */
39 status = "okay";
40 };
41
42 i2c@78b8000 {
43 /* On High speed expansion */
44 status = "okay";
45 };
46
47 i2c@78ba000 {
48 /* On Low speed expansion */
49 status = "okay";
50 };
51
52 spi@78b7000 {
53 /* On High speed expansion */
54 status = "okay";
55 };
56
57 spi@78b9000 {
58 /* On Low speed expansion */
59 status = "okay";
60 };
61
36 leds { 62 leds {
37 pinctrl-names = "default"; 63 pinctrl-names = "default";
38 pinctrl-0 = <&msmgpio_leds>, 64 pinctrl-0 = <&msmgpio_leds>,
@@ -85,3 +111,7 @@
85 }; 111 };
86 }; 112 };
87}; 113};
114
115&sdhc_1 {
116 status = "okay";
117};
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 568956859088..49ec55a37614 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -13,6 +13,30 @@
13 13
14&msmgpio { 14&msmgpio {
15 15
16 blsp1_uart1_default: blsp1_uart1_default {
17 pinmux {
18 function = "blsp_uart1";
19 pins = "gpio0", "gpio1";
20 };
21 pinconf {
22 pins = "gpio0", "gpio1";
23 drive-strength = <16>;
24 bias-disable;
25 };
26 };
27
28 blsp1_uart1_sleep: blsp1_uart1_sleep {
29 pinmux {
30 function = "gpio";
31 pins = "gpio0", "gpio1";
32 };
33 pinconf {
34 pins = "gpio0", "gpio1";
35 drive-strength = <2>;
36 bias-pull-down;
37 };
38 };
39
16 blsp1_uart2_default: blsp1_uart2_default { 40 blsp1_uart2_default: blsp1_uart2_default {
17 pinmux { 41 pinmux {
18 function = "blsp_uart2"; 42 function = "blsp_uart2";
@@ -27,7 +51,7 @@
27 51
28 blsp1_uart2_sleep: blsp1_uart2_sleep { 52 blsp1_uart2_sleep: blsp1_uart2_sleep {
29 pinmux { 53 pinmux {
30 function = "blsp_uart2"; 54 function = "gpio";
31 pins = "gpio4", "gpio5"; 55 pins = "gpio4", "gpio5";
32 }; 56 };
33 pinconf { 57 pinconf {
@@ -241,6 +265,30 @@
241 }; 265 };
242 }; 266 };
243 267
268 i2c2_default: i2c2_default {
269 pinmux {
270 function = "blsp_i2c2";
271 pins = "gpio6", "gpio7";
272 };
273 pinconf {
274 pins = "gpio6", "gpio7";
275 drive-strength = <2>;
276 bias-disable = <0>;
277 };
278 };
279
280 i2c2_sleep: i2c2_sleep {
281 pinmux {
282 function = "gpio";
283 pins = "gpio6", "gpio7";
284 };
285 pinconf {
286 pins = "gpio6", "gpio7";
287 drive-strength = <2>;
288 bias-disable = <0>;
289 };
290 };
291
244 i2c4_default: i2c4_default { 292 i2c4_default: i2c4_default {
245 pinmux { 293 pinmux {
246 function = "blsp_i2c4"; 294 function = "blsp_i2c4";
@@ -255,7 +303,7 @@
255 303
256 i2c4_sleep: i2c4_sleep { 304 i2c4_sleep: i2c4_sleep {
257 pinmux { 305 pinmux {
258 function = "blsp_i2c4"; 306 function = "gpio";
259 pins = "gpio14", "gpio15"; 307 pins = "gpio14", "gpio15";
260 }; 308 };
261 pinconf { 309 pinconf {
@@ -265,6 +313,30 @@
265 }; 313 };
266 }; 314 };
267 315
316 i2c6_default: i2c6_default {
317 pinmux {
318 function = "blsp_i2c6";
319 pins = "gpio22", "gpio23";
320 };
321 pinconf {
322 pins = "gpio22", "gpio23";
323 drive-strength = <2>;
324 bias-disable = <0>;
325 };
326 };
327
328 i2c6_sleep: i2c6_sleep {
329 pinmux {
330 function = "gpio";
331 pins = "gpio22", "gpio23";
332 };
333 pinconf {
334 pins = "gpio22", "gpio23";
335 drive-strength = <2>;
336 bias-disable = <0>;
337 };
338 };
339
268 sdhc2_cd_pin { 340 sdhc2_cd_pin {
269 sdc2_cd_on: cd_on { 341 sdc2_cd_on: cd_on {
270 pinmux { 342 pinmux {
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 5911de008dd5..8d184ff19642 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -99,9 +99,19 @@
99 compatible = "qcom,gcc-msm8916"; 99 compatible = "qcom,gcc-msm8916";
100 #clock-cells = <1>; 100 #clock-cells = <1>;
101 #reset-cells = <1>; 101 #reset-cells = <1>;
102 #power-domain-cells = <1>;
102 reg = <0x1800000 0x80000>; 103 reg = <0x1800000 0x80000>;
103 }; 104 };
104 105
106 blsp1_uart1: serial@78af000 {
107 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
108 reg = <0x78af000 0x200>;
109 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
110 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
111 clock-names = "core", "iface";
112 status = "disabled";
113 };
114
105 blsp1_uart2: serial@78b0000 { 115 blsp1_uart2: serial@78b0000 {
106 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; 116 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
107 reg = <0x78b0000 0x200>; 117 reg = <0x78b0000 0x200>;
@@ -224,6 +234,21 @@
224 status = "disabled"; 234 status = "disabled";
225 }; 235 };
226 236
237 blsp_i2c2: i2c@78b6000 {
238 compatible = "qcom,i2c-qup-v2.2.1";
239 reg = <0x78b6000 0x1000>;
240 interrupts = <GIC_SPI 96 0>;
241 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
242 <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
243 clock-names = "iface", "core";
244 pinctrl-names = "default", "sleep";
245 pinctrl-0 = <&i2c2_default>;
246 pinctrl-1 = <&i2c2_sleep>;
247 #address-cells = <1>;
248 #size-cells = <0>;
249 status = "disabled";
250 };
251
227 blsp_i2c4: i2c@78b8000 { 252 blsp_i2c4: i2c@78b8000 {
228 compatible = "qcom,i2c-qup-v2.2.1"; 253 compatible = "qcom,i2c-qup-v2.2.1";
229 reg = <0x78b8000 0x1000>; 254 reg = <0x78b8000 0x1000>;
@@ -239,6 +264,21 @@
239 status = "disabled"; 264 status = "disabled";
240 }; 265 };
241 266
267 blsp_i2c6: i2c@78ba000 {
268 compatible = "qcom,i2c-qup-v2.2.1";
269 reg = <0x78ba000 0x1000>;
270 interrupts = <GIC_SPI 100 0>;
271 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
272 <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
273 clock-names = "iface", "core";
274 pinctrl-names = "default", "sleep";
275 pinctrl-0 = <&i2c6_default>;
276 pinctrl-1 = <&i2c6_sleep>;
277 #address-cells = <1>;
278 #size-cells = <0>;
279 status = "disabled";
280 };
281
242 sdhc_1: sdhci@07824000 { 282 sdhc_1: sdhci@07824000 {
243 compatible = "qcom,sdhci-msm-v4"; 283 compatible = "qcom,sdhci-msm-v4";
244 reg = <0x07824900 0x11c>, <0x07824000 0x800>; 284 reg = <0x07824900 0x11c>, <0x07824000 0x800>;
@@ -390,6 +430,13 @@
390 interrupt-controller; 430 interrupt-controller;
391 #interrupt-cells = <4>; 431 #interrupt-cells = <4>;
392 }; 432 };
433
434 rng@22000 {
435 compatible = "qcom,prng";
436 reg = <0x00022000 0x200>;
437 clocks = <&gcc GCC_PRNG_AHB_CLK>;
438 clock-names = "core";
439 };
393 }; 440 };
394}; 441};
395 442
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a712bea3bf2c..cc093a482aa4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -106,7 +106,7 @@
106 }; 106 };
107 107
108 idle-states { 108 idle-states {
109 entry-method = "arm,psci"; 109 entry-method = "psci";
110 110
111 cpu_sleep: cpu-sleep-0 { 111 cpu_sleep: cpu-sleep-0 {
112 compatible = "arm,idle-state"; 112 compatible = "arm,idle-state";
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 34d71dd86781..8f07e923dd5f 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -34,11 +34,12 @@ CONFIG_MODULE_UNLOAD=y
34CONFIG_ARCH_BCM_IPROC=y 34CONFIG_ARCH_BCM_IPROC=y
35CONFIG_ARCH_BERLIN=y 35CONFIG_ARCH_BERLIN=y
36CONFIG_ARCH_EXYNOS7=y 36CONFIG_ARCH_EXYNOS7=y
37CONFIG_ARCH_FSL_LS2085A=y 37CONFIG_ARCH_LAYERSCAPE=y
38CONFIG_ARCH_HISI=y 38CONFIG_ARCH_HISI=y
39CONFIG_ARCH_MEDIATEK=y 39CONFIG_ARCH_MEDIATEK=y
40CONFIG_ARCH_ROCKCHIP=y 40CONFIG_ARCH_ROCKCHIP=y
41CONFIG_ARCH_SEATTLE=y 41CONFIG_ARCH_SEATTLE=y
42CONFIG_ARCH_STRATIX10=y
42CONFIG_ARCH_TEGRA=y 43CONFIG_ARCH_TEGRA=y
43CONFIG_ARCH_TEGRA_132_SOC=y 44CONFIG_ARCH_TEGRA_132_SOC=y
44CONFIG_ARCH_QCOM=y 45CONFIG_ARCH_QCOM=y
diff --git a/arch/arm64/include/asm/hardirq.h b/arch/arm64/include/asm/hardirq.h
index 2bb7009bdac7..a57601f9d17c 100644
--- a/arch/arm64/include/asm/hardirq.h
+++ b/arch/arm64/include/asm/hardirq.h
@@ -43,9 +43,4 @@ static inline void ack_bad_irq(unsigned int irq)
43 irq_err_count++; 43 irq_err_count++;
44} 44}
45 45
46/*
47 * No arch-specific IRQ flags.
48 */
49#define set_irq_flags(irq, flags)
50
51#endif /* __ASM_HARDIRQ_H */ 46#endif /* __ASM_HARDIRQ_H */
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 7605e095217f..9694f2654593 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -95,6 +95,7 @@
95 SCTLR_EL2_SA | SCTLR_EL2_I) 95 SCTLR_EL2_SA | SCTLR_EL2_I)
96 96
97/* TCR_EL2 Registers bits */ 97/* TCR_EL2 Registers bits */
98#define TCR_EL2_RES1 ((1 << 31) | (1 << 23))
98#define TCR_EL2_TBI (1 << 20) 99#define TCR_EL2_TBI (1 << 20)
99#define TCR_EL2_PS (7 << 16) 100#define TCR_EL2_PS (7 << 16)
100#define TCR_EL2_PS_40B (2 << 16) 101#define TCR_EL2_PS_40B (2 << 16)
@@ -106,9 +107,10 @@
106#define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \ 107#define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \
107 TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ) 108 TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ)
108 109
109#define TCR_EL2_FLAGS (TCR_EL2_PS_40B) 110#define TCR_EL2_FLAGS (TCR_EL2_RES1 | TCR_EL2_PS_40B)
110 111
111/* VTCR_EL2 Registers bits */ 112/* VTCR_EL2 Registers bits */
113#define VTCR_EL2_RES1 (1 << 31)
112#define VTCR_EL2_PS_MASK (7 << 16) 114#define VTCR_EL2_PS_MASK (7 << 16)
113#define VTCR_EL2_TG0_MASK (1 << 14) 115#define VTCR_EL2_TG0_MASK (1 << 14)
114#define VTCR_EL2_TG0_4K (0 << 14) 116#define VTCR_EL2_TG0_4K (0 << 14)
@@ -147,7 +149,8 @@
147 */ 149 */
148#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SH0_INNER | \ 150#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SH0_INNER | \
149 VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ 151 VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \
150 VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B) 152 VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B | \
153 VTCR_EL2_RES1)
151#define VTTBR_X (38 - VTCR_EL2_T0SZ_40B) 154#define VTTBR_X (38 - VTCR_EL2_T0SZ_40B)
152#else 155#else
153/* 156/*
@@ -158,7 +161,8 @@
158 */ 161 */
159#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SH0_INNER | \ 162#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SH0_INNER | \
160 VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ 163 VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \
161 VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B) 164 VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B | \
165 VTCR_EL2_RES1)
162#define VTTBR_X (37 - VTCR_EL2_T0SZ_40B) 166#define VTTBR_X (37 - VTCR_EL2_T0SZ_40B)
163#endif 167#endif
164 168
@@ -168,7 +172,6 @@
168#define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT) 172#define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT)
169 173
170/* Hyp System Trap Register */ 174/* Hyp System Trap Register */
171#define HSTR_EL2_TTEE (1 << 16)
172#define HSTR_EL2_T(x) (1 << x) 175#define HSTR_EL2_T(x) (1 << x)
173 176
174/* Hyp Coproccessor Trap Register Shifts */ 177/* Hyp Coproccessor Trap Register Shifts */
diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h
index 67fa0de3d483..5e377101f919 100644
--- a/arch/arm64/include/asm/kvm_asm.h
+++ b/arch/arm64/include/asm/kvm_asm.h
@@ -53,9 +53,7 @@
53#define IFSR32_EL2 25 /* Instruction Fault Status Register */ 53#define IFSR32_EL2 25 /* Instruction Fault Status Register */
54#define FPEXC32_EL2 26 /* Floating-Point Exception Control Register */ 54#define FPEXC32_EL2 26 /* Floating-Point Exception Control Register */
55#define DBGVCR32_EL2 27 /* Debug Vector Catch Register */ 55#define DBGVCR32_EL2 27 /* Debug Vector Catch Register */
56#define TEECR32_EL1 28 /* ThumbEE Configuration Register */ 56#define NR_SYS_REGS 28
57#define TEEHBR32_EL1 29 /* ThumbEE Handler Base Register */
58#define NR_SYS_REGS 30
59 57
60/* 32bit mapping */ 58/* 32bit mapping */
61#define c0_MPIDR (MPIDR_EL1 * 2) /* MultiProcessor ID Register */ 59#define c0_MPIDR (MPIDR_EL1 * 2) /* MultiProcessor ID Register */
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 415938dc45cf..ed039688c221 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -30,19 +30,16 @@
30 30
31#define __KVM_HAVE_ARCH_INTC_INITIALIZED 31#define __KVM_HAVE_ARCH_INTC_INITIALIZED
32 32
33#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
34#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
35#else
36#define KVM_MAX_VCPUS 0
37#endif
38
39#define KVM_USER_MEM_SLOTS 32 33#define KVM_USER_MEM_SLOTS 32
40#define KVM_PRIVATE_MEM_SLOTS 4 34#define KVM_PRIVATE_MEM_SLOTS 4
41#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 35#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
36#define KVM_HALT_POLL_NS_DEFAULT 500000
42 37
43#include <kvm/arm_vgic.h> 38#include <kvm/arm_vgic.h>
44#include <kvm/arm_arch_timer.h> 39#include <kvm/arm_arch_timer.h>
45 40
41#define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
42
46#define KVM_VCPU_MAX_FEATURES 3 43#define KVM_VCPU_MAX_FEATURES 3
47 44
48int __attribute_const__ kvm_target_cpu(void); 45int __attribute_const__ kvm_target_cpu(void);
@@ -195,6 +192,7 @@ struct kvm_vm_stat {
195 192
196struct kvm_vcpu_stat { 193struct kvm_vcpu_stat {
197 u32 halt_successful_poll; 194 u32 halt_successful_poll;
195 u32 halt_attempted_poll;
198 u32 halt_wakeup; 196 u32 halt_wakeup;
199}; 197};
200 198
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 6900b2d95371..26b066690593 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -26,13 +26,9 @@
26 * Software defined PTE bits definition. 26 * Software defined PTE bits definition.
27 */ 27 */
28#define PTE_VALID (_AT(pteval_t, 1) << 0) 28#define PTE_VALID (_AT(pteval_t, 1) << 0)
29#define PTE_WRITE (PTE_DBM) /* same as DBM (51) */
29#define PTE_DIRTY (_AT(pteval_t, 1) << 55) 30#define PTE_DIRTY (_AT(pteval_t, 1) << 55)
30#define PTE_SPECIAL (_AT(pteval_t, 1) << 56) 31#define PTE_SPECIAL (_AT(pteval_t, 1) << 56)
31#ifdef CONFIG_ARM64_HW_AFDBM
32#define PTE_WRITE (PTE_DBM) /* same as DBM */
33#else
34#define PTE_WRITE (_AT(pteval_t, 1) << 57)
35#endif
36#define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */ 32#define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */
37 33
38/* 34/*
@@ -83,7 +79,7 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
83#define PAGE_S2 __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY) 79#define PAGE_S2 __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
84#define PAGE_S2_DEVICE __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN) 80#define PAGE_S2_DEVICE __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN)
85 81
86#define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_TYPE_MASK) | PTE_PROT_NONE | PTE_PXN | PTE_UXN) 82#define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_PXN | PTE_UXN)
87#define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE) 83#define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
88#define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE) 84#define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE)
89#define PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN) 85#define PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
@@ -146,7 +142,7 @@ extern struct page *empty_zero_page;
146#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN)) 142#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
147 143
148#ifdef CONFIG_ARM64_HW_AFDBM 144#ifdef CONFIG_ARM64_HW_AFDBM
149#define pte_hw_dirty(pte) (!(pte_val(pte) & PTE_RDONLY)) 145#define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
150#else 146#else
151#define pte_hw_dirty(pte) (0) 147#define pte_hw_dirty(pte) (0)
152#endif 148#endif
@@ -238,7 +234,7 @@ extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
238 * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via 234 * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
239 * the page fault mechanism. Checking the dirty status of a pte becomes: 235 * the page fault mechanism. Checking the dirty status of a pte becomes:
240 * 236 *
241 * PTE_DIRTY || !PTE_RDONLY 237 * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
242 */ 238 */
243static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 239static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
244 pte_t *ptep, pte_t pte) 240 pte_t *ptep, pte_t pte)
@@ -500,10 +496,10 @@ static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
500static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 496static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
501{ 497{
502 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY | 498 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
503 PTE_PROT_NONE | PTE_WRITE | PTE_TYPE_MASK; 499 PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
504 /* preserve the hardware dirty information */ 500 /* preserve the hardware dirty information */
505 if (pte_hw_dirty(pte)) 501 if (pte_hw_dirty(pte))
506 newprot |= PTE_DIRTY; 502 pte = pte_mkdirty(pte);
507 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); 503 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
508 return pte; 504 return pte;
509} 505}
diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
index 9b3b62ac9c24..cebf78661a55 100644
--- a/arch/arm64/kernel/debug-monitors.c
+++ b/arch/arm64/kernel/debug-monitors.c
@@ -134,7 +134,7 @@ static int os_lock_notify(struct notifier_block *self,
134 unsigned long action, void *data) 134 unsigned long action, void *data)
135{ 135{
136 int cpu = (unsigned long)data; 136 int cpu = (unsigned long)data;
137 if (action == CPU_ONLINE) 137 if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
138 smp_call_function_single(cpu, clear_os_lock, NULL, 1); 138 smp_call_function_single(cpu, clear_os_lock, NULL, 1);
139 return NOTIFY_OK; 139 return NOTIFY_OK;
140} 140}
diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c
index e8ca6eaedd02..13671a9cf016 100644
--- a/arch/arm64/kernel/efi.c
+++ b/arch/arm64/kernel/efi.c
@@ -258,7 +258,8 @@ static bool __init efi_virtmap_init(void)
258 */ 258 */
259 if (!is_normal_ram(md)) 259 if (!is_normal_ram(md))
260 prot = __pgprot(PROT_DEVICE_nGnRE); 260 prot = __pgprot(PROT_DEVICE_nGnRE);
261 else if (md->type == EFI_RUNTIME_SERVICES_CODE) 261 else if (md->type == EFI_RUNTIME_SERVICES_CODE ||
262 !PAGE_ALIGNED(md->phys_addr))
262 prot = PAGE_KERNEL_EXEC; 263 prot = PAGE_KERNEL_EXEC;
263 else 264 else
264 prot = PAGE_KERNEL; 265 prot = PAGE_KERNEL;
diff --git a/arch/arm64/kernel/entry-ftrace.S b/arch/arm64/kernel/entry-ftrace.S
index 08cafc518b9a..0f03a8fe2314 100644
--- a/arch/arm64/kernel/entry-ftrace.S
+++ b/arch/arm64/kernel/entry-ftrace.S
@@ -178,6 +178,24 @@ ENTRY(ftrace_stub)
178ENDPROC(ftrace_stub) 178ENDPROC(ftrace_stub)
179 179
180#ifdef CONFIG_FUNCTION_GRAPH_TRACER 180#ifdef CONFIG_FUNCTION_GRAPH_TRACER
181 /* save return value regs*/
182 .macro save_return_regs
183 sub sp, sp, #64
184 stp x0, x1, [sp]
185 stp x2, x3, [sp, #16]
186 stp x4, x5, [sp, #32]
187 stp x6, x7, [sp, #48]
188 .endm
189
190 /* restore return value regs*/
191 .macro restore_return_regs
192 ldp x0, x1, [sp]
193 ldp x2, x3, [sp, #16]
194 ldp x4, x5, [sp, #32]
195 ldp x6, x7, [sp, #48]
196 add sp, sp, #64
197 .endm
198
181/* 199/*
182 * void ftrace_graph_caller(void) 200 * void ftrace_graph_caller(void)
183 * 201 *
@@ -204,11 +222,11 @@ ENDPROC(ftrace_graph_caller)
204 * only when CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST is enabled. 222 * only when CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST is enabled.
205 */ 223 */
206ENTRY(return_to_handler) 224ENTRY(return_to_handler)
207 str x0, [sp, #-16]! 225 save_return_regs
208 mov x0, x29 // parent's fp 226 mov x0, x29 // parent's fp
209 bl ftrace_return_to_handler// addr = ftrace_return_to_hander(fp); 227 bl ftrace_return_to_handler// addr = ftrace_return_to_hander(fp);
210 mov x30, x0 // restore the original return address 228 mov x30, x0 // restore the original return address
211 ldr x0, [sp], #16 229 restore_return_regs
212 ret 230 ret
213END(return_to_handler) 231END(return_to_handler)
214#endif /* CONFIG_FUNCTION_GRAPH_TRACER */ 232#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index a055be6125cf..90d09eddd5b2 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -523,6 +523,11 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems
523 msr hstr_el2, xzr // Disable CP15 traps to EL2 523 msr hstr_el2, xzr // Disable CP15 traps to EL2
524#endif 524#endif
525 525
526 /* EL2 debug */
527 mrs x0, pmcr_el0 // Disable debug access traps
528 ubfx x0, x0, #11, #5 // to EL2 and allow access to
529 msr mdcr_el2, x0 // all PMU counters from EL1
530
526 /* Stage-2 translation */ 531 /* Stage-2 translation */
527 msr vttbr_el2, xzr 532 msr vttbr_el2, xzr
528 533
diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c
index c97040ecf838..bba85c8f8037 100644
--- a/arch/arm64/kernel/hw_breakpoint.c
+++ b/arch/arm64/kernel/hw_breakpoint.c
@@ -872,7 +872,7 @@ static int hw_breakpoint_reset_notify(struct notifier_block *self,
872 void *hcpu) 872 void *hcpu)
873{ 873{
874 int cpu = (long)hcpu; 874 int cpu = (long)hcpu;
875 if (action == CPU_ONLINE) 875 if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
876 smp_call_function_single(cpu, hw_breakpoint_reset, NULL, 1); 876 smp_call_function_single(cpu, hw_breakpoint_reset, NULL, 1);
877 return NOTIFY_OK; 877 return NOTIFY_OK;
878} 878}
diff --git a/arch/arm64/kernel/module.c b/arch/arm64/kernel/module.c
index 67bf4107f6ef..876eb8df50bf 100644
--- a/arch/arm64/kernel/module.c
+++ b/arch/arm64/kernel/module.c
@@ -332,12 +332,14 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
332 ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 0, 21, 332 ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 0, 21,
333 AARCH64_INSN_IMM_ADR); 333 AARCH64_INSN_IMM_ADR);
334 break; 334 break;
335#ifndef CONFIG_ARM64_ERRATUM_843419
335 case R_AARCH64_ADR_PREL_PG_HI21_NC: 336 case R_AARCH64_ADR_PREL_PG_HI21_NC:
336 overflow_check = false; 337 overflow_check = false;
337 case R_AARCH64_ADR_PREL_PG_HI21: 338 case R_AARCH64_ADR_PREL_PG_HI21:
338 ovf = reloc_insn_imm(RELOC_OP_PAGE, loc, val, 12, 21, 339 ovf = reloc_insn_imm(RELOC_OP_PAGE, loc, val, 12, 21,
339 AARCH64_INSN_IMM_ADR); 340 AARCH64_INSN_IMM_ADR);
340 break; 341 break;
342#endif
341 case R_AARCH64_ADD_ABS_LO12_NC: 343 case R_AARCH64_ADD_ABS_LO12_NC:
342 case R_AARCH64_LDST8_ABS_LO12_NC: 344 case R_AARCH64_LDST8_ABS_LO12_NC:
343 overflow_check = false; 345 overflow_check = false;
diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
index 948f0ad2de23..71ef6dc89ae5 100644
--- a/arch/arm64/kernel/signal32.c
+++ b/arch/arm64/kernel/signal32.c
@@ -212,14 +212,32 @@ int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)
212 212
213/* 213/*
214 * VFP save/restore code. 214 * VFP save/restore code.
215 *
216 * We have to be careful with endianness, since the fpsimd context-switch
217 * code operates on 128-bit (Q) register values whereas the compat ABI
218 * uses an array of 64-bit (D) registers. Consequently, we need to swap
219 * the two halves of each Q register when running on a big-endian CPU.
215 */ 220 */
221union __fpsimd_vreg {
222 __uint128_t raw;
223 struct {
224#ifdef __AARCH64EB__
225 u64 hi;
226 u64 lo;
227#else
228 u64 lo;
229 u64 hi;
230#endif
231 };
232};
233
216static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame) 234static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame)
217{ 235{
218 struct fpsimd_state *fpsimd = &current->thread.fpsimd_state; 236 struct fpsimd_state *fpsimd = &current->thread.fpsimd_state;
219 compat_ulong_t magic = VFP_MAGIC; 237 compat_ulong_t magic = VFP_MAGIC;
220 compat_ulong_t size = VFP_STORAGE_SIZE; 238 compat_ulong_t size = VFP_STORAGE_SIZE;
221 compat_ulong_t fpscr, fpexc; 239 compat_ulong_t fpscr, fpexc;
222 int err = 0; 240 int i, err = 0;
223 241
224 /* 242 /*
225 * Save the hardware registers to the fpsimd_state structure. 243 * Save the hardware registers to the fpsimd_state structure.
@@ -235,10 +253,15 @@ static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame)
235 /* 253 /*
236 * Now copy the FP registers. Since the registers are packed, 254 * Now copy the FP registers. Since the registers are packed,
237 * we can copy the prefix we want (V0-V15) as it is. 255 * we can copy the prefix we want (V0-V15) as it is.
238 * FIXME: Won't work if big endian.
239 */ 256 */
240 err |= __copy_to_user(&frame->ufp.fpregs, fpsimd->vregs, 257 for (i = 0; i < ARRAY_SIZE(frame->ufp.fpregs); i += 2) {
241 sizeof(frame->ufp.fpregs)); 258 union __fpsimd_vreg vreg = {
259 .raw = fpsimd->vregs[i >> 1],
260 };
261
262 __put_user_error(vreg.lo, &frame->ufp.fpregs[i], err);
263 __put_user_error(vreg.hi, &frame->ufp.fpregs[i + 1], err);
264 }
242 265
243 /* Create an AArch32 fpscr from the fpsr and the fpcr. */ 266 /* Create an AArch32 fpscr from the fpsr and the fpcr. */
244 fpscr = (fpsimd->fpsr & VFP_FPSCR_STAT_MASK) | 267 fpscr = (fpsimd->fpsr & VFP_FPSCR_STAT_MASK) |
@@ -263,7 +286,7 @@ static int compat_restore_vfp_context(struct compat_vfp_sigframe __user *frame)
263 compat_ulong_t magic = VFP_MAGIC; 286 compat_ulong_t magic = VFP_MAGIC;
264 compat_ulong_t size = VFP_STORAGE_SIZE; 287 compat_ulong_t size = VFP_STORAGE_SIZE;
265 compat_ulong_t fpscr; 288 compat_ulong_t fpscr;
266 int err = 0; 289 int i, err = 0;
267 290
268 __get_user_error(magic, &frame->magic, err); 291 __get_user_error(magic, &frame->magic, err);
269 __get_user_error(size, &frame->size, err); 292 __get_user_error(size, &frame->size, err);
@@ -273,12 +296,14 @@ static int compat_restore_vfp_context(struct compat_vfp_sigframe __user *frame)
273 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) 296 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
274 return -EINVAL; 297 return -EINVAL;
275 298
276 /* 299 /* Copy the FP registers into the start of the fpsimd_state. */
277 * Copy the FP registers into the start of the fpsimd_state. 300 for (i = 0; i < ARRAY_SIZE(frame->ufp.fpregs); i += 2) {
278 * FIXME: Won't work if big endian. 301 union __fpsimd_vreg vreg;
279 */ 302
280 err |= __copy_from_user(fpsimd.vregs, frame->ufp.fpregs, 303 __get_user_error(vreg.lo, &frame->ufp.fpregs[i], err);
281 sizeof(frame->ufp.fpregs)); 304 __get_user_error(vreg.hi, &frame->ufp.fpregs[i + 1], err);
305 fpsimd.vregs[i >> 1] = vreg.raw;
306 }
282 307
283 /* Extract the fpsr and the fpcr from the fpscr */ 308 /* Extract the fpsr and the fpcr from the fpscr */
284 __get_user_error(fpscr, &frame->ufp.fpscr, err); 309 __get_user_error(fpscr, &frame->ufp.fpscr, err);
diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
index bfffe8f4bd53..5c7e920e4861 100644
--- a/arch/arm64/kvm/Kconfig
+++ b/arch/arm64/kvm/Kconfig
@@ -41,15 +41,4 @@ config KVM_ARM_HOST
41 ---help--- 41 ---help---
42 Provides host support for ARM processors. 42 Provides host support for ARM processors.
43 43
44config KVM_ARM_MAX_VCPUS
45 int "Number maximum supported virtual CPUs per VM"
46 depends on KVM_ARM_HOST
47 default 4
48 help
49 Static number of max supported virtual CPUs per VM.
50
51 If you choose a high number, the vcpu structures will be quite
52 large, so only choose a reasonable number that you expect to
53 actually use.
54
55endif # VIRTUALIZATION 44endif # VIRTUALIZATION
diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
index 37c89ea2c572..e5836138ec42 100644
--- a/arch/arm64/kvm/hyp.S
+++ b/arch/arm64/kvm/hyp.S
@@ -433,20 +433,13 @@
433 mrs x5, ifsr32_el2 433 mrs x5, ifsr32_el2
434 stp x4, x5, [x3] 434 stp x4, x5, [x3]
435 435
436 skip_fpsimd_state x8, 3f 436 skip_fpsimd_state x8, 2f
437 mrs x6, fpexc32_el2 437 mrs x6, fpexc32_el2
438 str x6, [x3, #16] 438 str x6, [x3, #16]
4393: 4392:
440 skip_debug_state x8, 2f 440 skip_debug_state x8, 1f
441 mrs x7, dbgvcr32_el2 441 mrs x7, dbgvcr32_el2
442 str x7, [x3, #24] 442 str x7, [x3, #24]
4432:
444 skip_tee_state x8, 1f
445
446 add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
447 mrs x4, teecr32_el1
448 mrs x5, teehbr32_el1
449 stp x4, x5, [x3]
4501: 4431:
451.endm 444.endm
452 445
@@ -466,16 +459,9 @@
466 msr dacr32_el2, x4 459 msr dacr32_el2, x4
467 msr ifsr32_el2, x5 460 msr ifsr32_el2, x5
468 461
469 skip_debug_state x8, 2f 462 skip_debug_state x8, 1f
470 ldr x7, [x3, #24] 463 ldr x7, [x3, #24]
471 msr dbgvcr32_el2, x7 464 msr dbgvcr32_el2, x7
4722:
473 skip_tee_state x8, 1f
474
475 add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
476 ldp x4, x5, [x3]
477 msr teecr32_el1, x4
478 msr teehbr32_el1, x5
4791: 4651:
480.endm 466.endm
481 467
@@ -570,8 +556,6 @@ alternative_endif
570 mrs x3, cntv_ctl_el0 556 mrs x3, cntv_ctl_el0
571 and x3, x3, #3 557 and x3, x3, #3
572 str w3, [x0, #VCPU_TIMER_CNTV_CTL] 558 str w3, [x0, #VCPU_TIMER_CNTV_CTL]
573 bic x3, x3, #1 // Clear Enable
574 msr cntv_ctl_el0, x3
575 559
576 isb 560 isb
577 561
@@ -579,6 +563,9 @@ alternative_endif
579 str x3, [x0, #VCPU_TIMER_CNTV_CVAL] 563 str x3, [x0, #VCPU_TIMER_CNTV_CVAL]
580 564
5811: 5651:
566 // Disable the virtual timer
567 msr cntv_ctl_el0, xzr
568
582 // Allow physical timer/counter access for the host 569 // Allow physical timer/counter access for the host
583 mrs x2, cnthctl_el2 570 mrs x2, cnthctl_el2
584 orr x2, x2, #3 571 orr x2, x2, #3
@@ -753,6 +740,9 @@ ENTRY(__kvm_vcpu_run)
753 // Guest context 740 // Guest context
754 add x2, x0, #VCPU_CONTEXT 741 add x2, x0, #VCPU_CONTEXT
755 742
743 // We must restore the 32-bit state before the sysregs, thanks
744 // to Cortex-A57 erratum #852523.
745 restore_guest_32bit_state
756 bl __restore_sysregs 746 bl __restore_sysregs
757 747
758 skip_debug_state x3, 1f 748 skip_debug_state x3, 1f
@@ -760,7 +750,6 @@ ENTRY(__kvm_vcpu_run)
760 kern_hyp_va x3 750 kern_hyp_va x3
761 bl __restore_debug 751 bl __restore_debug
7621: 7521:
763 restore_guest_32bit_state
764 restore_guest_regs 753 restore_guest_regs
765 754
766 // That's it, no more messing around. 755 // That's it, no more messing around.
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index b41607d270ac..d03d3af17e7e 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -272,7 +272,7 @@ static int set_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
272{ 272{
273 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg]; 273 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg];
274 274
275 if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0) 275 if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
276 return -EFAULT; 276 return -EFAULT;
277 return 0; 277 return 0;
278} 278}
@@ -314,7 +314,7 @@ static int set_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
314{ 314{
315 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg]; 315 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg];
316 316
317 if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0) 317 if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
318 return -EFAULT; 318 return -EFAULT;
319 319
320 return 0; 320 return 0;
@@ -358,7 +358,7 @@ static int set_wvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
358{ 358{
359 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg]; 359 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg];
360 360
361 if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0) 361 if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
362 return -EFAULT; 362 return -EFAULT;
363 return 0; 363 return 0;
364} 364}
@@ -400,7 +400,7 @@ static int set_wcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
400{ 400{
401 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg]; 401 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg];
402 402
403 if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0) 403 if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
404 return -EFAULT; 404 return -EFAULT;
405 return 0; 405 return 0;
406} 406}
@@ -539,13 +539,6 @@ static const struct sys_reg_desc sys_reg_descs[] = {
539 { Op0(0b10), Op1(0b000), CRn(0b0111), CRm(0b1110), Op2(0b110), 539 { Op0(0b10), Op1(0b000), CRn(0b0111), CRm(0b1110), Op2(0b110),
540 trap_dbgauthstatus_el1 }, 540 trap_dbgauthstatus_el1 },
541 541
542 /* TEECR32_EL1 */
543 { Op0(0b10), Op1(0b010), CRn(0b0000), CRm(0b0000), Op2(0b000),
544 NULL, reset_val, TEECR32_EL1, 0 },
545 /* TEEHBR32_EL1 */
546 { Op0(0b10), Op1(0b010), CRn(0b0001), CRm(0b0000), Op2(0b000),
547 NULL, reset_val, TEEHBR32_EL1, 0 },
548
549 /* MDCCSR_EL1 */ 542 /* MDCCSR_EL1 */
550 { Op0(0b10), Op1(0b011), CRn(0b0000), CRm(0b0001), Op2(0b000), 543 { Op0(0b10), Op1(0b011), CRn(0b0000), CRm(0b0001), Op2(0b000),
551 trap_raz_wi }, 544 trap_raz_wi },
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 0bcc4bc94b4a..99224dcebdc5 100644
--- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c
@@ -100,7 +100,7 @@ static void *__dma_alloc_coherent(struct device *dev, size_t size,
100 if (IS_ENABLED(CONFIG_ZONE_DMA) && 100 if (IS_ENABLED(CONFIG_ZONE_DMA) &&
101 dev->coherent_dma_mask <= DMA_BIT_MASK(32)) 101 dev->coherent_dma_mask <= DMA_BIT_MASK(32))
102 flags |= GFP_DMA; 102 flags |= GFP_DMA;
103 if (IS_ENABLED(CONFIG_DMA_CMA) && (flags & __GFP_WAIT)) { 103 if (dev_get_cma_area(dev) && (flags & __GFP_WAIT)) {
104 struct page *page; 104 struct page *page;
105 void *addr; 105 void *addr;
106 106
diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild
index f61f2dd67464..241b9b9729d8 100644
--- a/arch/avr32/include/asm/Kbuild
+++ b/arch/avr32/include/asm/Kbuild
@@ -20,4 +20,5 @@ generic-y += sections.h
20generic-y += topology.h 20generic-y += topology.h
21generic-y += trace_clock.h 21generic-y += trace_clock.h
22generic-y += vga.h 22generic-y += vga.h
23generic-y += word-at-a-time.h
23generic-y += xor.h 24generic-y += xor.h
diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c
index d51ff8f1c541..96cabad68489 100644
--- a/arch/avr32/mach-at32ap/extint.c
+++ b/arch/avr32/mach-at32ap/extint.c
@@ -144,7 +144,7 @@ static struct irq_chip eic_chip = {
144 .irq_set_type = eic_set_irq_type, 144 .irq_set_type = eic_set_irq_type,
145}; 145};
146 146
147static void demux_eic_irq(unsigned int irq, struct irq_desc *desc) 147static void demux_eic_irq(struct irq_desc *desc)
148{ 148{
149 struct eic *eic = irq_desc_get_handler_data(desc); 149 struct eic *eic = irq_desc_get_handler_data(desc);
150 unsigned long status, pending; 150 unsigned long status, pending;
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index 157a5e0e789f..4f61378c3453 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -281,7 +281,7 @@ static struct irq_chip gpio_irqchip = {
281 .irq_set_type = gpio_irq_type, 281 .irq_set_type = gpio_irq_type,
282}; 282};
283 283
284static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) 284static void gpio_irq_handler(struct irq_desc *desc)
285{ 285{
286 struct pio_device *pio = irq_desc_get_chip_data(desc); 286 struct pio_device *pio = irq_desc_get_chip_data(desc);
287 unsigned gpio_irq; 287 unsigned gpio_irq;
diff --git a/arch/blackfin/include/asm/Kbuild b/arch/blackfin/include/asm/Kbuild
index 61cd1e786a14..91d49c0a3118 100644
--- a/arch/blackfin/include/asm/Kbuild
+++ b/arch/blackfin/include/asm/Kbuild
@@ -46,4 +46,5 @@ generic-y += types.h
46generic-y += ucontext.h 46generic-y += ucontext.h
47generic-y += unaligned.h 47generic-y += unaligned.h
48generic-y += user.h 48generic-y += user.h
49generic-y += word-at-a-time.h
49generic-y += xor.h 50generic-y += xor.h
diff --git a/arch/blackfin/include/asm/irq_handler.h b/arch/blackfin/include/asm/irq_handler.h
index 4b2a992794d7..d2f90c72378e 100644
--- a/arch/blackfin/include/asm/irq_handler.h
+++ b/arch/blackfin/include/asm/irq_handler.h
@@ -60,7 +60,7 @@ extern void bfin_internal_mask_irq(unsigned int irq);
60extern void bfin_internal_unmask_irq(unsigned int irq); 60extern void bfin_internal_unmask_irq(unsigned int irq);
61 61
62struct irq_desc; 62struct irq_desc;
63extern void bfin_demux_mac_status_irq(unsigned int, struct irq_desc *); 63extern void bfin_demux_mac_status_irq(struct irq_desc *);
64extern void bfin_demux_gpio_irq(unsigned int, struct irq_desc *); 64extern void bfin_demux_gpio_irq(struct irq_desc *);
65 65
66#endif 66#endif
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c
index 0ba25764b8c0..052cde5ed2e4 100644
--- a/arch/blackfin/kernel/irqchip.c
+++ b/arch/blackfin/kernel/irqchip.c
@@ -107,7 +107,7 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
107 * than crashing, do something sensible. 107 * than crashing, do something sensible.
108 */ 108 */
109 if (irq >= NR_IRQS) 109 if (irq >= NR_IRQS)
110 handle_bad_irq(irq, &bad_irq_desc); 110 handle_bad_irq(&bad_irq_desc);
111 else 111 else
112 generic_handle_irq(irq); 112 generic_handle_irq(irq);
113 113
diff --git a/arch/blackfin/mach-bf537/ints-priority.c b/arch/blackfin/mach-bf537/ints-priority.c
index 14b2f74554dc..a48baae4384d 100644
--- a/arch/blackfin/mach-bf537/ints-priority.c
+++ b/arch/blackfin/mach-bf537/ints-priority.c
@@ -89,8 +89,7 @@ static struct irq_chip bf537_generic_error_irqchip = {
89 .irq_unmask = bf537_generic_error_unmask_irq, 89 .irq_unmask = bf537_generic_error_unmask_irq,
90}; 90};
91 91
92static void bf537_demux_error_irq(unsigned int int_err_irq, 92static void bf537_demux_error_irq(struct irq_desc *inta_desc)
93 struct irq_desc *inta_desc)
94{ 93{
95 int irq = 0; 94 int irq = 0;
96 95
@@ -182,15 +181,12 @@ static struct irq_chip bf537_mac_rx_irqchip = {
182 .irq_unmask = bf537_mac_rx_unmask_irq, 181 .irq_unmask = bf537_mac_rx_unmask_irq,
183}; 182};
184 183
185static void bf537_demux_mac_rx_irq(unsigned int __int_irq, 184static void bf537_demux_mac_rx_irq(struct irq_desc *desc)
186 struct irq_desc *desc)
187{ 185{
188 unsigned int int_irq = irq_desc_get_irq(desc);
189
190 if (bfin_read_DMA1_IRQ_STATUS() & (DMA_DONE | DMA_ERR)) 186 if (bfin_read_DMA1_IRQ_STATUS() & (DMA_DONE | DMA_ERR))
191 bfin_handle_irq(IRQ_MAC_RX); 187 bfin_handle_irq(IRQ_MAC_RX);
192 else 188 else
193 bfin_demux_gpio_irq(int_irq, desc); 189 bfin_demux_gpio_irq(desc);
194} 190}
195#endif 191#endif
196 192
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index a6d1b03cdf36..e8d4d748d0fd 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -656,8 +656,7 @@ static struct irq_chip bfin_mac_status_irqchip = {
656 .irq_set_wake = bfin_mac_status_set_wake, 656 .irq_set_wake = bfin_mac_status_set_wake,
657}; 657};
658 658
659void bfin_demux_mac_status_irq(unsigned int int_err_irq, 659void bfin_demux_mac_status_irq(struct irq_desc *inta_desc)
660 struct irq_desc *inta_desc)
661{ 660{
662 int i, irq = 0; 661 int i, irq = 0;
663 u32 status = bfin_read_EMAC_SYSTAT(); 662 u32 status = bfin_read_EMAC_SYSTAT();
@@ -825,7 +824,7 @@ static void bfin_demux_gpio_block(unsigned int irq)
825 } 824 }
826} 825}
827 826
828void bfin_demux_gpio_irq(unsigned int __inta_irq, struct irq_desc *desc) 827void bfin_demux_gpio_irq(struct irq_desc *desc)
829{ 828{
830 unsigned int inta_irq = irq_desc_get_irq(desc); 829 unsigned int inta_irq = irq_desc_get_irq(desc);
831 unsigned int irq; 830 unsigned int irq;
diff --git a/arch/c6x/include/asm/Kbuild b/arch/c6x/include/asm/Kbuild
index f17c4dc6050c..945544ec603e 100644
--- a/arch/c6x/include/asm/Kbuild
+++ b/arch/c6x/include/asm/Kbuild
@@ -59,4 +59,5 @@ generic-y += types.h
59generic-y += ucontext.h 59generic-y += ucontext.h
60generic-y += user.h 60generic-y += user.h
61generic-y += vga.h 61generic-y += vga.h
62generic-y += word-at-a-time.h
62generic-y += xor.h 63generic-y += xor.h
diff --git a/arch/c6x/platforms/megamod-pic.c b/arch/c6x/platforms/megamod-pic.c
index d487698e978a..ddcb45d7dfa7 100644
--- a/arch/c6x/platforms/megamod-pic.c
+++ b/arch/c6x/platforms/megamod-pic.c
@@ -93,7 +93,7 @@ static struct irq_chip megamod_chip = {
93 .irq_unmask = unmask_megamod, 93 .irq_unmask = unmask_megamod,
94}; 94};
95 95
96static void megamod_irq_cascade(unsigned int __irq, struct irq_desc *desc) 96static void megamod_irq_cascade(struct irq_desc *desc)
97{ 97{
98 struct megamod_cascade_data *cascade; 98 struct megamod_cascade_data *cascade;
99 struct megamod_pic *pic; 99 struct megamod_pic *pic;
diff --git a/arch/cris/include/asm/Kbuild b/arch/cris/include/asm/Kbuild
index b7f68192d15b..1778805f6380 100644
--- a/arch/cris/include/asm/Kbuild
+++ b/arch/cris/include/asm/Kbuild
@@ -43,4 +43,5 @@ generic-y += topology.h
43generic-y += trace_clock.h 43generic-y += trace_clock.h
44generic-y += types.h 44generic-y += types.h
45generic-y += vga.h 45generic-y += vga.h
46generic-y += word-at-a-time.h
46generic-y += xor.h 47generic-y += xor.h
diff --git a/arch/frv/include/asm/Kbuild b/arch/frv/include/asm/Kbuild
index 8e47b832cc76..1fa084cf1a43 100644
--- a/arch/frv/include/asm/Kbuild
+++ b/arch/frv/include/asm/Kbuild
@@ -7,3 +7,4 @@ generic-y += mcs_spinlock.h
7generic-y += mm-arch-hooks.h 7generic-y += mm-arch-hooks.h
8generic-y += preempt.h 8generic-y += preempt.h
9generic-y += trace_clock.h 9generic-y += trace_clock.h
10generic-y += word-at-a-time.h
diff --git a/arch/frv/mb93090-mb00/pci-vdk.c b/arch/frv/mb93090-mb00/pci-vdk.c
index f9c86c475bbd..f211839e2cae 100644
--- a/arch/frv/mb93090-mb00/pci-vdk.c
+++ b/arch/frv/mb93090-mb00/pci-vdk.c
@@ -294,6 +294,8 @@ void pcibios_fixup_bus(struct pci_bus *bus)
294 printk("### PCIBIOS_FIXUP_BUS(%d)\n",bus->number); 294 printk("### PCIBIOS_FIXUP_BUS(%d)\n",bus->number);
295#endif 295#endif
296 296
297 pci_read_bridge_bases(bus);
298
297 if (bus->number == 0) { 299 if (bus->number == 0) {
298 struct pci_dev *dev; 300 struct pci_dev *dev;
299 list_for_each_entry(dev, &bus->devices, bus_list) { 301 list_for_each_entry(dev, &bus->devices, bus_list) {
diff --git a/arch/hexagon/include/asm/Kbuild b/arch/hexagon/include/asm/Kbuild
index daee37bd0999..db8ddabc6bd2 100644
--- a/arch/hexagon/include/asm/Kbuild
+++ b/arch/hexagon/include/asm/Kbuild
@@ -58,4 +58,5 @@ generic-y += types.h
58generic-y += ucontext.h 58generic-y += ucontext.h
59generic-y += unaligned.h 59generic-y += unaligned.h
60generic-y += vga.h 60generic-y += vga.h
61generic-y += word-at-a-time.h
61generic-y += xor.h 62generic-y += xor.h
diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild
index 9de3ba12f6b9..502a91d8dbbd 100644
--- a/arch/ia64/include/asm/Kbuild
+++ b/arch/ia64/include/asm/Kbuild
@@ -8,3 +8,4 @@ generic-y += mm-arch-hooks.h
8generic-y += preempt.h 8generic-y += preempt.h
9generic-y += trace_clock.h 9generic-y += trace_clock.h
10generic-y += vtime.h 10generic-y += vtime.h
11generic-y += word-at-a-time.h
diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h
index 95c39b95e97e..99c96a5e6016 100644
--- a/arch/ia64/include/asm/unistd.h
+++ b/arch/ia64/include/asm/unistd.h
@@ -11,7 +11,7 @@
11 11
12 12
13 13
14#define NR_syscalls 319 /* length of syscall table */ 14#define NR_syscalls 321 /* length of syscall table */
15 15
16/* 16/*
17 * The following defines stop scripts/checksyscalls.sh from complaining about 17 * The following defines stop scripts/checksyscalls.sh from complaining about
diff --git a/arch/ia64/include/uapi/asm/unistd.h b/arch/ia64/include/uapi/asm/unistd.h
index 461079560c78..98e94e19a5a0 100644
--- a/arch/ia64/include/uapi/asm/unistd.h
+++ b/arch/ia64/include/uapi/asm/unistd.h
@@ -332,5 +332,7 @@
332#define __NR_memfd_create 1340 332#define __NR_memfd_create 1340
333#define __NR_bpf 1341 333#define __NR_bpf 1341
334#define __NR_execveat 1342 334#define __NR_execveat 1342
335#define __NR_userfaultfd 1343
336#define __NR_membarrier 1344
335 337
336#endif /* _UAPI_ASM_IA64_UNISTD_H */ 338#endif /* _UAPI_ASM_IA64_UNISTD_H */
diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S
index ae0de7bf5525..37cc7a65cd3e 100644
--- a/arch/ia64/kernel/entry.S
+++ b/arch/ia64/kernel/entry.S
@@ -1768,5 +1768,7 @@ sys_call_table:
1768 data8 sys_memfd_create // 1340 1768 data8 sys_memfd_create // 1340
1769 data8 sys_bpf 1769 data8 sys_bpf
1770 data8 sys_execveat 1770 data8 sys_execveat
1771 data8 sys_userfaultfd
1772 data8 sys_membarrier
1771 1773
1772 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls 1774 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index d89b6013c941..7cc3be9fa7c6 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -533,9 +533,10 @@ void pcibios_fixup_bus(struct pci_bus *b)
533{ 533{
534 struct pci_dev *dev; 534 struct pci_dev *dev;
535 535
536 if (b->self) 536 if (b->self) {
537 pci_read_bridge_bases(b);
537 pcibios_fixup_bridge_resources(b->self); 538 pcibios_fixup_bridge_resources(b->self);
538 539 }
539 list_for_each_entry(dev, &b->devices, bus_list) 540 list_for_each_entry(dev, &b->devices, bus_list)
540 pcibios_fixup_device_resources(dev); 541 pcibios_fixup_device_resources(dev);
541 platform_pci_fixup_bus(b); 542 platform_pci_fixup_bus(b);
diff --git a/arch/m32r/include/asm/Kbuild b/arch/m32r/include/asm/Kbuild
index e0eb704ca1fa..fd104bd221ce 100644
--- a/arch/m32r/include/asm/Kbuild
+++ b/arch/m32r/include/asm/Kbuild
@@ -9,3 +9,4 @@ generic-y += module.h
9generic-y += preempt.h 9generic-y += preempt.h
10generic-y += sections.h 10generic-y += sections.h
11generic-y += trace_clock.h 11generic-y += trace_clock.h
12generic-y += word-at-a-time.h
diff --git a/arch/m68k/amiga/amiints.c b/arch/m68k/amiga/amiints.c
index 47b5f90002ab..7ff739e94896 100644
--- a/arch/m68k/amiga/amiints.c
+++ b/arch/m68k/amiga/amiints.c
@@ -46,7 +46,7 @@ static struct irq_chip amiga_irq_chip = {
46 * The builtin Amiga hardware interrupt handlers. 46 * The builtin Amiga hardware interrupt handlers.
47 */ 47 */
48 48
49static void ami_int1(unsigned int irq, struct irq_desc *desc) 49static void ami_int1(struct irq_desc *desc)
50{ 50{
51 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar; 51 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
52 52
@@ -69,7 +69,7 @@ static void ami_int1(unsigned int irq, struct irq_desc *desc)
69 } 69 }
70} 70}
71 71
72static void ami_int3(unsigned int irq, struct irq_desc *desc) 72static void ami_int3(struct irq_desc *desc)
73{ 73{
74 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar; 74 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
75 75
@@ -92,7 +92,7 @@ static void ami_int3(unsigned int irq, struct irq_desc *desc)
92 } 92 }
93} 93}
94 94
95static void ami_int4(unsigned int irq, struct irq_desc *desc) 95static void ami_int4(struct irq_desc *desc)
96{ 96{
97 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar; 97 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
98 98
@@ -121,7 +121,7 @@ static void ami_int4(unsigned int irq, struct irq_desc *desc)
121 } 121 }
122} 122}
123 123
124static void ami_int5(unsigned int irq, struct irq_desc *desc) 124static void ami_int5(struct irq_desc *desc)
125{ 125{
126 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar; 126 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
127 127
diff --git a/arch/m68k/coldfire/intc-5272.c b/arch/m68k/coldfire/intc-5272.c
index 47371de60427..b0a19e207a63 100644
--- a/arch/m68k/coldfire/intc-5272.c
+++ b/arch/m68k/coldfire/intc-5272.c
@@ -143,12 +143,10 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type)
143 * We need to be careful with the masking/acking due to the side effects 143 * We need to be careful with the masking/acking due to the side effects
144 * of masking an interrupt. 144 * of masking an interrupt.
145 */ 145 */
146static void intc_external_irq(unsigned int __irq, struct irq_desc *desc) 146static void intc_external_irq(struct irq_desc *desc)
147{ 147{
148 unsigned int irq = irq_desc_get_irq(desc);
149
150 irq_desc_get_chip(desc)->irq_ack(&desc->irq_data); 148 irq_desc_get_chip(desc)->irq_ack(&desc->irq_data);
151 handle_simple_irq(irq, desc); 149 handle_simple_irq(desc);
152} 150}
153 151
154static struct irq_chip intc_irq_chip = { 152static struct irq_chip intc_irq_chip = {
diff --git a/arch/m68k/configs/amiga_defconfig b/arch/m68k/configs/amiga_defconfig
index 0b6b40d37b95..5b4ec541ba7c 100644
--- a/arch/m68k/configs/amiga_defconfig
+++ b/arch/m68k/configs/amiga_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -57,7 +58,6 @@ CONFIG_NET_IPGRE_DEMUX=m
57CONFIG_NET_IPGRE=m 58CONFIG_NET_IPGRE=m
58CONFIG_NET_IPVTI=m 59CONFIG_NET_IPVTI=m
59CONFIG_NET_FOU_IP_TUNNELS=y 60CONFIG_NET_FOU_IP_TUNNELS=y
60CONFIG_GENEVE_CORE=m
61CONFIG_INET_AH=m 61CONFIG_INET_AH=m
62CONFIG_INET_ESP=m 62CONFIG_INET_ESP=m
63CONFIG_INET_IPCOMP=m 63CONFIG_INET_IPCOMP=m
@@ -67,10 +67,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
67# CONFIG_INET_LRO is not set 67# CONFIG_INET_LRO is not set
68CONFIG_INET_DIAG=m 68CONFIG_INET_DIAG=m
69CONFIG_INET_UDP_DIAG=m 69CONFIG_INET_UDP_DIAG=m
70CONFIG_IPV6=m
70CONFIG_IPV6_ROUTER_PREF=y 71CONFIG_IPV6_ROUTER_PREF=y
71CONFIG_INET6_AH=m 72CONFIG_INET6_AH=m
72CONFIG_INET6_ESP=m 73CONFIG_INET6_ESP=m
73CONFIG_INET6_IPCOMP=m 74CONFIG_INET6_IPCOMP=m
75CONFIG_IPV6_ILA=m
74CONFIG_IPV6_VTI=m 76CONFIG_IPV6_VTI=m
75CONFIG_IPV6_GRE=m 77CONFIG_IPV6_GRE=m
76CONFIG_NETFILTER=y 78CONFIG_NETFILTER=y
@@ -179,6 +181,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
179CONFIG_IP_SET_LIST_SET=m 181CONFIG_IP_SET_LIST_SET=m
180CONFIG_NF_CONNTRACK_IPV4=m 182CONFIG_NF_CONNTRACK_IPV4=m
181CONFIG_NFT_CHAIN_ROUTE_IPV4=m 183CONFIG_NFT_CHAIN_ROUTE_IPV4=m
184CONFIG_NFT_DUP_IPV4=m
182CONFIG_NF_TABLES_ARP=m 185CONFIG_NF_TABLES_ARP=m
183CONFIG_NF_LOG_ARP=m 186CONFIG_NF_LOG_ARP=m
184CONFIG_NFT_CHAIN_NAT_IPV4=m 187CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -206,6 +209,7 @@ CONFIG_IP_NF_ARPFILTER=m
206CONFIG_IP_NF_ARP_MANGLE=m 209CONFIG_IP_NF_ARP_MANGLE=m
207CONFIG_NF_CONNTRACK_IPV6=m 210CONFIG_NF_CONNTRACK_IPV6=m
208CONFIG_NFT_CHAIN_ROUTE_IPV6=m 211CONFIG_NFT_CHAIN_ROUTE_IPV6=m
212CONFIG_NFT_DUP_IPV6=m
209CONFIG_NFT_CHAIN_NAT_IPV6=m 213CONFIG_NFT_CHAIN_NAT_IPV6=m
210CONFIG_NFT_MASQ_IPV6=m 214CONFIG_NFT_MASQ_IPV6=m
211CONFIG_NFT_REDIR_IPV6=m 215CONFIG_NFT_REDIR_IPV6=m
@@ -271,6 +275,7 @@ CONFIG_NETLINK_DIAG=m
271CONFIG_MPLS=y 275CONFIG_MPLS=y
272CONFIG_NET_MPLS_GSO=m 276CONFIG_NET_MPLS_GSO=m
273CONFIG_MPLS_ROUTING=m 277CONFIG_MPLS_ROUTING=m
278CONFIG_MPLS_IPTUNNEL=m
274# CONFIG_WIRELESS is not set 279# CONFIG_WIRELESS is not set
275# CONFIG_UEVENT_HELPER is not set 280# CONFIG_UEVENT_HELPER is not set
276CONFIG_DEVTMPFS=y 281CONFIG_DEVTMPFS=y
@@ -370,6 +375,7 @@ CONFIG_ZORRO8390=y
370# CONFIG_NET_VENDOR_SEEQ is not set 375# CONFIG_NET_VENDOR_SEEQ is not set
371# CONFIG_NET_VENDOR_SMSC is not set 376# CONFIG_NET_VENDOR_SMSC is not set
372# CONFIG_NET_VENDOR_STMICRO is not set 377# CONFIG_NET_VENDOR_STMICRO is not set
378# CONFIG_NET_VENDOR_SYNOPSYS is not set
373# CONFIG_NET_VENDOR_VIA is not set 379# CONFIG_NET_VENDOR_VIA is not set
374# CONFIG_NET_VENDOR_WIZNET is not set 380# CONFIG_NET_VENDOR_WIZNET is not set
375CONFIG_PPP=m 381CONFIG_PPP=m
@@ -537,6 +543,7 @@ CONFIG_TEST_USER_COPY=m
537CONFIG_TEST_BPF=m 543CONFIG_TEST_BPF=m
538CONFIG_TEST_FIRMWARE=m 544CONFIG_TEST_FIRMWARE=m
539CONFIG_TEST_UDELAY=m 545CONFIG_TEST_UDELAY=m
546CONFIG_TEST_STATIC_KEYS=m
540CONFIG_EARLY_PRINTK=y 547CONFIG_EARLY_PRINTK=y
541CONFIG_ENCRYPTED_KEYS=m 548CONFIG_ENCRYPTED_KEYS=m
542CONFIG_CRYPTO_RSA=m 549CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/configs/apollo_defconfig b/arch/m68k/configs/apollo_defconfig
index eeb3a8991fc4..6e5198e2c124 100644
--- a/arch/m68k/configs/apollo_defconfig
+++ b/arch/m68k/configs/apollo_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -55,7 +56,6 @@ CONFIG_NET_IPGRE_DEMUX=m
55CONFIG_NET_IPGRE=m 56CONFIG_NET_IPGRE=m
56CONFIG_NET_IPVTI=m 57CONFIG_NET_IPVTI=m
57CONFIG_NET_FOU_IP_TUNNELS=y 58CONFIG_NET_FOU_IP_TUNNELS=y
58CONFIG_GENEVE_CORE=m
59CONFIG_INET_AH=m 59CONFIG_INET_AH=m
60CONFIG_INET_ESP=m 60CONFIG_INET_ESP=m
61CONFIG_INET_IPCOMP=m 61CONFIG_INET_IPCOMP=m
@@ -65,10 +65,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
65# CONFIG_INET_LRO is not set 65# CONFIG_INET_LRO is not set
66CONFIG_INET_DIAG=m 66CONFIG_INET_DIAG=m
67CONFIG_INET_UDP_DIAG=m 67CONFIG_INET_UDP_DIAG=m
68CONFIG_IPV6=m
68CONFIG_IPV6_ROUTER_PREF=y 69CONFIG_IPV6_ROUTER_PREF=y
69CONFIG_INET6_AH=m 70CONFIG_INET6_AH=m
70CONFIG_INET6_ESP=m 71CONFIG_INET6_ESP=m
71CONFIG_INET6_IPCOMP=m 72CONFIG_INET6_IPCOMP=m
73CONFIG_IPV6_ILA=m
72CONFIG_IPV6_VTI=m 74CONFIG_IPV6_VTI=m
73CONFIG_IPV6_GRE=m 75CONFIG_IPV6_GRE=m
74CONFIG_NETFILTER=y 76CONFIG_NETFILTER=y
@@ -177,6 +179,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
177CONFIG_IP_SET_LIST_SET=m 179CONFIG_IP_SET_LIST_SET=m
178CONFIG_NF_CONNTRACK_IPV4=m 180CONFIG_NF_CONNTRACK_IPV4=m
179CONFIG_NFT_CHAIN_ROUTE_IPV4=m 181CONFIG_NFT_CHAIN_ROUTE_IPV4=m
182CONFIG_NFT_DUP_IPV4=m
180CONFIG_NF_TABLES_ARP=m 183CONFIG_NF_TABLES_ARP=m
181CONFIG_NF_LOG_ARP=m 184CONFIG_NF_LOG_ARP=m
182CONFIG_NFT_CHAIN_NAT_IPV4=m 185CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -204,6 +207,7 @@ CONFIG_IP_NF_ARPFILTER=m
204CONFIG_IP_NF_ARP_MANGLE=m 207CONFIG_IP_NF_ARP_MANGLE=m
205CONFIG_NF_CONNTRACK_IPV6=m 208CONFIG_NF_CONNTRACK_IPV6=m
206CONFIG_NFT_CHAIN_ROUTE_IPV6=m 209CONFIG_NFT_CHAIN_ROUTE_IPV6=m
210CONFIG_NFT_DUP_IPV6=m
207CONFIG_NFT_CHAIN_NAT_IPV6=m 211CONFIG_NFT_CHAIN_NAT_IPV6=m
208CONFIG_NFT_MASQ_IPV6=m 212CONFIG_NFT_MASQ_IPV6=m
209CONFIG_NFT_REDIR_IPV6=m 213CONFIG_NFT_REDIR_IPV6=m
@@ -269,6 +273,7 @@ CONFIG_NETLINK_DIAG=m
269CONFIG_MPLS=y 273CONFIG_MPLS=y
270CONFIG_NET_MPLS_GSO=m 274CONFIG_NET_MPLS_GSO=m
271CONFIG_MPLS_ROUTING=m 275CONFIG_MPLS_ROUTING=m
276CONFIG_MPLS_IPTUNNEL=m
272# CONFIG_WIRELESS is not set 277# CONFIG_WIRELESS is not set
273# CONFIG_UEVENT_HELPER is not set 278# CONFIG_UEVENT_HELPER is not set
274CONFIG_DEVTMPFS=y 279CONFIG_DEVTMPFS=y
@@ -344,6 +349,7 @@ CONFIG_VETH=m
344# CONFIG_NET_VENDOR_SAMSUNG is not set 349# CONFIG_NET_VENDOR_SAMSUNG is not set
345# CONFIG_NET_VENDOR_SEEQ is not set 350# CONFIG_NET_VENDOR_SEEQ is not set
346# CONFIG_NET_VENDOR_STMICRO is not set 351# CONFIG_NET_VENDOR_STMICRO is not set
352# CONFIG_NET_VENDOR_SYNOPSYS is not set
347# CONFIG_NET_VENDOR_VIA is not set 353# CONFIG_NET_VENDOR_VIA is not set
348# CONFIG_NET_VENDOR_WIZNET is not set 354# CONFIG_NET_VENDOR_WIZNET is not set
349CONFIG_PPP=m 355CONFIG_PPP=m
@@ -495,6 +501,7 @@ CONFIG_TEST_USER_COPY=m
495CONFIG_TEST_BPF=m 501CONFIG_TEST_BPF=m
496CONFIG_TEST_FIRMWARE=m 502CONFIG_TEST_FIRMWARE=m
497CONFIG_TEST_UDELAY=m 503CONFIG_TEST_UDELAY=m
504CONFIG_TEST_STATIC_KEYS=m
498CONFIG_EARLY_PRINTK=y 505CONFIG_EARLY_PRINTK=y
499CONFIG_ENCRYPTED_KEYS=m 506CONFIG_ENCRYPTED_KEYS=m
500CONFIG_CRYPTO_RSA=m 507CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/configs/atari_defconfig b/arch/m68k/configs/atari_defconfig
index 3a7006654ce9..f75600b0ca23 100644
--- a/arch/m68k/configs/atari_defconfig
+++ b/arch/m68k/configs/atari_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -55,7 +56,6 @@ CONFIG_NET_IPGRE_DEMUX=m
55CONFIG_NET_IPGRE=m 56CONFIG_NET_IPGRE=m
56CONFIG_NET_IPVTI=m 57CONFIG_NET_IPVTI=m
57CONFIG_NET_FOU_IP_TUNNELS=y 58CONFIG_NET_FOU_IP_TUNNELS=y
58CONFIG_GENEVE_CORE=m
59CONFIG_INET_AH=m 59CONFIG_INET_AH=m
60CONFIG_INET_ESP=m 60CONFIG_INET_ESP=m
61CONFIG_INET_IPCOMP=m 61CONFIG_INET_IPCOMP=m
@@ -65,10 +65,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
65# CONFIG_INET_LRO is not set 65# CONFIG_INET_LRO is not set
66CONFIG_INET_DIAG=m 66CONFIG_INET_DIAG=m
67CONFIG_INET_UDP_DIAG=m 67CONFIG_INET_UDP_DIAG=m
68CONFIG_IPV6=m
68CONFIG_IPV6_ROUTER_PREF=y 69CONFIG_IPV6_ROUTER_PREF=y
69CONFIG_INET6_AH=m 70CONFIG_INET6_AH=m
70CONFIG_INET6_ESP=m 71CONFIG_INET6_ESP=m
71CONFIG_INET6_IPCOMP=m 72CONFIG_INET6_IPCOMP=m
73CONFIG_IPV6_ILA=m
72CONFIG_IPV6_VTI=m 74CONFIG_IPV6_VTI=m
73CONFIG_IPV6_GRE=m 75CONFIG_IPV6_GRE=m
74CONFIG_NETFILTER=y 76CONFIG_NETFILTER=y
@@ -177,6 +179,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
177CONFIG_IP_SET_LIST_SET=m 179CONFIG_IP_SET_LIST_SET=m
178CONFIG_NF_CONNTRACK_IPV4=m 180CONFIG_NF_CONNTRACK_IPV4=m
179CONFIG_NFT_CHAIN_ROUTE_IPV4=m 181CONFIG_NFT_CHAIN_ROUTE_IPV4=m
182CONFIG_NFT_DUP_IPV4=m
180CONFIG_NF_TABLES_ARP=m 183CONFIG_NF_TABLES_ARP=m
181CONFIG_NF_LOG_ARP=m 184CONFIG_NF_LOG_ARP=m
182CONFIG_NFT_CHAIN_NAT_IPV4=m 185CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -204,6 +207,7 @@ CONFIG_IP_NF_ARPFILTER=m
204CONFIG_IP_NF_ARP_MANGLE=m 207CONFIG_IP_NF_ARP_MANGLE=m
205CONFIG_NF_CONNTRACK_IPV6=m 208CONFIG_NF_CONNTRACK_IPV6=m
206CONFIG_NFT_CHAIN_ROUTE_IPV6=m 209CONFIG_NFT_CHAIN_ROUTE_IPV6=m
210CONFIG_NFT_DUP_IPV6=m
207CONFIG_NFT_CHAIN_NAT_IPV6=m 211CONFIG_NFT_CHAIN_NAT_IPV6=m
208CONFIG_NFT_MASQ_IPV6=m 212CONFIG_NFT_MASQ_IPV6=m
209CONFIG_NFT_REDIR_IPV6=m 213CONFIG_NFT_REDIR_IPV6=m
@@ -269,6 +273,7 @@ CONFIG_NETLINK_DIAG=m
269CONFIG_MPLS=y 273CONFIG_MPLS=y
270CONFIG_NET_MPLS_GSO=m 274CONFIG_NET_MPLS_GSO=m
271CONFIG_MPLS_ROUTING=m 275CONFIG_MPLS_ROUTING=m
276CONFIG_MPLS_IPTUNNEL=m
272# CONFIG_WIRELESS is not set 277# CONFIG_WIRELESS is not set
273# CONFIG_UEVENT_HELPER is not set 278# CONFIG_UEVENT_HELPER is not set
274CONFIG_DEVTMPFS=y 279CONFIG_DEVTMPFS=y
@@ -355,6 +360,7 @@ CONFIG_NE2000=y
355# CONFIG_NET_VENDOR_SEEQ is not set 360# CONFIG_NET_VENDOR_SEEQ is not set
356CONFIG_SMC91X=y 361CONFIG_SMC91X=y
357# CONFIG_NET_VENDOR_STMICRO is not set 362# CONFIG_NET_VENDOR_STMICRO is not set
363# CONFIG_NET_VENDOR_SYNOPSYS is not set
358# CONFIG_NET_VENDOR_VIA is not set 364# CONFIG_NET_VENDOR_VIA is not set
359# CONFIG_NET_VENDOR_WIZNET is not set 365# CONFIG_NET_VENDOR_WIZNET is not set
360CONFIG_PPP=m 366CONFIG_PPP=m
@@ -517,6 +523,7 @@ CONFIG_TEST_USER_COPY=m
517CONFIG_TEST_BPF=m 523CONFIG_TEST_BPF=m
518CONFIG_TEST_FIRMWARE=m 524CONFIG_TEST_FIRMWARE=m
519CONFIG_TEST_UDELAY=m 525CONFIG_TEST_UDELAY=m
526CONFIG_TEST_STATIC_KEYS=m
520CONFIG_EARLY_PRINTK=y 527CONFIG_EARLY_PRINTK=y
521CONFIG_ENCRYPTED_KEYS=m 528CONFIG_ENCRYPTED_KEYS=m
522CONFIG_CRYPTO_RSA=m 529CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/configs/bvme6000_defconfig b/arch/m68k/configs/bvme6000_defconfig
index 0586b323a673..a42d91c389a6 100644
--- a/arch/m68k/configs/bvme6000_defconfig
+++ b/arch/m68k/configs/bvme6000_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -53,7 +54,6 @@ CONFIG_NET_IPGRE_DEMUX=m
53CONFIG_NET_IPGRE=m 54CONFIG_NET_IPGRE=m
54CONFIG_NET_IPVTI=m 55CONFIG_NET_IPVTI=m
55CONFIG_NET_FOU_IP_TUNNELS=y 56CONFIG_NET_FOU_IP_TUNNELS=y
56CONFIG_GENEVE_CORE=m
57CONFIG_INET_AH=m 57CONFIG_INET_AH=m
58CONFIG_INET_ESP=m 58CONFIG_INET_ESP=m
59CONFIG_INET_IPCOMP=m 59CONFIG_INET_IPCOMP=m
@@ -63,10 +63,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
63# CONFIG_INET_LRO is not set 63# CONFIG_INET_LRO is not set
64CONFIG_INET_DIAG=m 64CONFIG_INET_DIAG=m
65CONFIG_INET_UDP_DIAG=m 65CONFIG_INET_UDP_DIAG=m
66CONFIG_IPV6=m
66CONFIG_IPV6_ROUTER_PREF=y 67CONFIG_IPV6_ROUTER_PREF=y
67CONFIG_INET6_AH=m 68CONFIG_INET6_AH=m
68CONFIG_INET6_ESP=m 69CONFIG_INET6_ESP=m
69CONFIG_INET6_IPCOMP=m 70CONFIG_INET6_IPCOMP=m
71CONFIG_IPV6_ILA=m
70CONFIG_IPV6_VTI=m 72CONFIG_IPV6_VTI=m
71CONFIG_IPV6_GRE=m 73CONFIG_IPV6_GRE=m
72CONFIG_NETFILTER=y 74CONFIG_NETFILTER=y
@@ -175,6 +177,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
175CONFIG_IP_SET_LIST_SET=m 177CONFIG_IP_SET_LIST_SET=m
176CONFIG_NF_CONNTRACK_IPV4=m 178CONFIG_NF_CONNTRACK_IPV4=m
177CONFIG_NFT_CHAIN_ROUTE_IPV4=m 179CONFIG_NFT_CHAIN_ROUTE_IPV4=m
180CONFIG_NFT_DUP_IPV4=m
178CONFIG_NF_TABLES_ARP=m 181CONFIG_NF_TABLES_ARP=m
179CONFIG_NF_LOG_ARP=m 182CONFIG_NF_LOG_ARP=m
180CONFIG_NFT_CHAIN_NAT_IPV4=m 183CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -202,6 +205,7 @@ CONFIG_IP_NF_ARPFILTER=m
202CONFIG_IP_NF_ARP_MANGLE=m 205CONFIG_IP_NF_ARP_MANGLE=m
203CONFIG_NF_CONNTRACK_IPV6=m 206CONFIG_NF_CONNTRACK_IPV6=m
204CONFIG_NFT_CHAIN_ROUTE_IPV6=m 207CONFIG_NFT_CHAIN_ROUTE_IPV6=m
208CONFIG_NFT_DUP_IPV6=m
205CONFIG_NFT_CHAIN_NAT_IPV6=m 209CONFIG_NFT_CHAIN_NAT_IPV6=m
206CONFIG_NFT_MASQ_IPV6=m 210CONFIG_NFT_MASQ_IPV6=m
207CONFIG_NFT_REDIR_IPV6=m 211CONFIG_NFT_REDIR_IPV6=m
@@ -267,6 +271,7 @@ CONFIG_NETLINK_DIAG=m
267CONFIG_MPLS=y 271CONFIG_MPLS=y
268CONFIG_NET_MPLS_GSO=m 272CONFIG_NET_MPLS_GSO=m
269CONFIG_MPLS_ROUTING=m 273CONFIG_MPLS_ROUTING=m
274CONFIG_MPLS_IPTUNNEL=m
270# CONFIG_WIRELESS is not set 275# CONFIG_WIRELESS is not set
271# CONFIG_UEVENT_HELPER is not set 276# CONFIG_UEVENT_HELPER is not set
272CONFIG_DEVTMPFS=y 277CONFIG_DEVTMPFS=y
@@ -343,6 +348,7 @@ CONFIG_BVME6000_NET=y
343# CONFIG_NET_VENDOR_SAMSUNG is not set 348# CONFIG_NET_VENDOR_SAMSUNG is not set
344# CONFIG_NET_VENDOR_SEEQ is not set 349# CONFIG_NET_VENDOR_SEEQ is not set
345# CONFIG_NET_VENDOR_STMICRO is not set 350# CONFIG_NET_VENDOR_STMICRO is not set
351# CONFIG_NET_VENDOR_SYNOPSYS is not set
346# CONFIG_NET_VENDOR_VIA is not set 352# CONFIG_NET_VENDOR_VIA is not set
347# CONFIG_NET_VENDOR_WIZNET is not set 353# CONFIG_NET_VENDOR_WIZNET is not set
348CONFIG_PPP=m 354CONFIG_PPP=m
@@ -488,6 +494,7 @@ CONFIG_TEST_USER_COPY=m
488CONFIG_TEST_BPF=m 494CONFIG_TEST_BPF=m
489CONFIG_TEST_FIRMWARE=m 495CONFIG_TEST_FIRMWARE=m
490CONFIG_TEST_UDELAY=m 496CONFIG_TEST_UDELAY=m
497CONFIG_TEST_STATIC_KEYS=m
491CONFIG_EARLY_PRINTK=y 498CONFIG_EARLY_PRINTK=y
492CONFIG_ENCRYPTED_KEYS=m 499CONFIG_ENCRYPTED_KEYS=m
493CONFIG_CRYPTO_RSA=m 500CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/configs/hp300_defconfig b/arch/m68k/configs/hp300_defconfig
index ad1dbce07aa4..77f4a11083e9 100644
--- a/arch/m68k/configs/hp300_defconfig
+++ b/arch/m68k/configs/hp300_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -55,7 +56,6 @@ CONFIG_NET_IPGRE_DEMUX=m
55CONFIG_NET_IPGRE=m 56CONFIG_NET_IPGRE=m
56CONFIG_NET_IPVTI=m 57CONFIG_NET_IPVTI=m
57CONFIG_NET_FOU_IP_TUNNELS=y 58CONFIG_NET_FOU_IP_TUNNELS=y
58CONFIG_GENEVE_CORE=m
59CONFIG_INET_AH=m 59CONFIG_INET_AH=m
60CONFIG_INET_ESP=m 60CONFIG_INET_ESP=m
61CONFIG_INET_IPCOMP=m 61CONFIG_INET_IPCOMP=m
@@ -65,10 +65,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
65# CONFIG_INET_LRO is not set 65# CONFIG_INET_LRO is not set
66CONFIG_INET_DIAG=m 66CONFIG_INET_DIAG=m
67CONFIG_INET_UDP_DIAG=m 67CONFIG_INET_UDP_DIAG=m
68CONFIG_IPV6=m
68CONFIG_IPV6_ROUTER_PREF=y 69CONFIG_IPV6_ROUTER_PREF=y
69CONFIG_INET6_AH=m 70CONFIG_INET6_AH=m
70CONFIG_INET6_ESP=m 71CONFIG_INET6_ESP=m
71CONFIG_INET6_IPCOMP=m 72CONFIG_INET6_IPCOMP=m
73CONFIG_IPV6_ILA=m
72CONFIG_IPV6_VTI=m 74CONFIG_IPV6_VTI=m
73CONFIG_IPV6_GRE=m 75CONFIG_IPV6_GRE=m
74CONFIG_NETFILTER=y 76CONFIG_NETFILTER=y
@@ -177,6 +179,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
177CONFIG_IP_SET_LIST_SET=m 179CONFIG_IP_SET_LIST_SET=m
178CONFIG_NF_CONNTRACK_IPV4=m 180CONFIG_NF_CONNTRACK_IPV4=m
179CONFIG_NFT_CHAIN_ROUTE_IPV4=m 181CONFIG_NFT_CHAIN_ROUTE_IPV4=m
182CONFIG_NFT_DUP_IPV4=m
180CONFIG_NF_TABLES_ARP=m 183CONFIG_NF_TABLES_ARP=m
181CONFIG_NF_LOG_ARP=m 184CONFIG_NF_LOG_ARP=m
182CONFIG_NFT_CHAIN_NAT_IPV4=m 185CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -204,6 +207,7 @@ CONFIG_IP_NF_ARPFILTER=m
204CONFIG_IP_NF_ARP_MANGLE=m 207CONFIG_IP_NF_ARP_MANGLE=m
205CONFIG_NF_CONNTRACK_IPV6=m 208CONFIG_NF_CONNTRACK_IPV6=m
206CONFIG_NFT_CHAIN_ROUTE_IPV6=m 209CONFIG_NFT_CHAIN_ROUTE_IPV6=m
210CONFIG_NFT_DUP_IPV6=m
207CONFIG_NFT_CHAIN_NAT_IPV6=m 211CONFIG_NFT_CHAIN_NAT_IPV6=m
208CONFIG_NFT_MASQ_IPV6=m 212CONFIG_NFT_MASQ_IPV6=m
209CONFIG_NFT_REDIR_IPV6=m 213CONFIG_NFT_REDIR_IPV6=m
@@ -269,6 +273,7 @@ CONFIG_NETLINK_DIAG=m
269CONFIG_MPLS=y 273CONFIG_MPLS=y
270CONFIG_NET_MPLS_GSO=m 274CONFIG_NET_MPLS_GSO=m
271CONFIG_MPLS_ROUTING=m 275CONFIG_MPLS_ROUTING=m
276CONFIG_MPLS_IPTUNNEL=m
272# CONFIG_WIRELESS is not set 277# CONFIG_WIRELESS is not set
273# CONFIG_UEVENT_HELPER is not set 278# CONFIG_UEVENT_HELPER is not set
274CONFIG_DEVTMPFS=y 279CONFIG_DEVTMPFS=y
@@ -345,6 +350,7 @@ CONFIG_HPLANCE=y
345# CONFIG_NET_VENDOR_SAMSUNG is not set 350# CONFIG_NET_VENDOR_SAMSUNG is not set
346# CONFIG_NET_VENDOR_SEEQ is not set 351# CONFIG_NET_VENDOR_SEEQ is not set
347# CONFIG_NET_VENDOR_STMICRO is not set 352# CONFIG_NET_VENDOR_STMICRO is not set
353# CONFIG_NET_VENDOR_SYNOPSYS is not set
348# CONFIG_NET_VENDOR_VIA is not set 354# CONFIG_NET_VENDOR_VIA is not set
349# CONFIG_NET_VENDOR_WIZNET is not set 355# CONFIG_NET_VENDOR_WIZNET is not set
350CONFIG_PPP=m 356CONFIG_PPP=m
@@ -497,6 +503,7 @@ CONFIG_TEST_USER_COPY=m
497CONFIG_TEST_BPF=m 503CONFIG_TEST_BPF=m
498CONFIG_TEST_FIRMWARE=m 504CONFIG_TEST_FIRMWARE=m
499CONFIG_TEST_UDELAY=m 505CONFIG_TEST_UDELAY=m
506CONFIG_TEST_STATIC_KEYS=m
500CONFIG_EARLY_PRINTK=y 507CONFIG_EARLY_PRINTK=y
501CONFIG_ENCRYPTED_KEYS=m 508CONFIG_ENCRYPTED_KEYS=m
502CONFIG_CRYPTO_RSA=m 509CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/configs/mac_defconfig b/arch/m68k/configs/mac_defconfig
index b44acacaecf4..5a329f77329b 100644
--- a/arch/m68k/configs/mac_defconfig
+++ b/arch/m68k/configs/mac_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -54,7 +55,6 @@ CONFIG_NET_IPGRE_DEMUX=m
54CONFIG_NET_IPGRE=m 55CONFIG_NET_IPGRE=m
55CONFIG_NET_IPVTI=m 56CONFIG_NET_IPVTI=m
56CONFIG_NET_FOU_IP_TUNNELS=y 57CONFIG_NET_FOU_IP_TUNNELS=y
57CONFIG_GENEVE_CORE=m
58CONFIG_INET_AH=m 58CONFIG_INET_AH=m
59CONFIG_INET_ESP=m 59CONFIG_INET_ESP=m
60CONFIG_INET_IPCOMP=m 60CONFIG_INET_IPCOMP=m
@@ -64,10 +64,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
64# CONFIG_INET_LRO is not set 64# CONFIG_INET_LRO is not set
65CONFIG_INET_DIAG=m 65CONFIG_INET_DIAG=m
66CONFIG_INET_UDP_DIAG=m 66CONFIG_INET_UDP_DIAG=m
67CONFIG_IPV6=m
67CONFIG_IPV6_ROUTER_PREF=y 68CONFIG_IPV6_ROUTER_PREF=y
68CONFIG_INET6_AH=m 69CONFIG_INET6_AH=m
69CONFIG_INET6_ESP=m 70CONFIG_INET6_ESP=m
70CONFIG_INET6_IPCOMP=m 71CONFIG_INET6_IPCOMP=m
72CONFIG_IPV6_ILA=m
71CONFIG_IPV6_VTI=m 73CONFIG_IPV6_VTI=m
72CONFIG_IPV6_GRE=m 74CONFIG_IPV6_GRE=m
73CONFIG_NETFILTER=y 75CONFIG_NETFILTER=y
@@ -176,6 +178,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
176CONFIG_IP_SET_LIST_SET=m 178CONFIG_IP_SET_LIST_SET=m
177CONFIG_NF_CONNTRACK_IPV4=m 179CONFIG_NF_CONNTRACK_IPV4=m
178CONFIG_NFT_CHAIN_ROUTE_IPV4=m 180CONFIG_NFT_CHAIN_ROUTE_IPV4=m
181CONFIG_NFT_DUP_IPV4=m
179CONFIG_NF_TABLES_ARP=m 182CONFIG_NF_TABLES_ARP=m
180CONFIG_NF_LOG_ARP=m 183CONFIG_NF_LOG_ARP=m
181CONFIG_NFT_CHAIN_NAT_IPV4=m 184CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -203,6 +206,7 @@ CONFIG_IP_NF_ARPFILTER=m
203CONFIG_IP_NF_ARP_MANGLE=m 206CONFIG_IP_NF_ARP_MANGLE=m
204CONFIG_NF_CONNTRACK_IPV6=m 207CONFIG_NF_CONNTRACK_IPV6=m
205CONFIG_NFT_CHAIN_ROUTE_IPV6=m 208CONFIG_NFT_CHAIN_ROUTE_IPV6=m
209CONFIG_NFT_DUP_IPV6=m
206CONFIG_NFT_CHAIN_NAT_IPV6=m 210CONFIG_NFT_CHAIN_NAT_IPV6=m
207CONFIG_NFT_MASQ_IPV6=m 211CONFIG_NFT_MASQ_IPV6=m
208CONFIG_NFT_REDIR_IPV6=m 212CONFIG_NFT_REDIR_IPV6=m
@@ -271,6 +275,7 @@ CONFIG_NETLINK_DIAG=m
271CONFIG_MPLS=y 275CONFIG_MPLS=y
272CONFIG_NET_MPLS_GSO=m 276CONFIG_NET_MPLS_GSO=m
273CONFIG_MPLS_ROUTING=m 277CONFIG_MPLS_ROUTING=m
278CONFIG_MPLS_IPTUNNEL=m
274# CONFIG_WIRELESS is not set 279# CONFIG_WIRELESS is not set
275# CONFIG_UEVENT_HELPER is not set 280# CONFIG_UEVENT_HELPER is not set
276CONFIG_DEVTMPFS=y 281CONFIG_DEVTMPFS=y
@@ -364,6 +369,7 @@ CONFIG_MAC8390=y
364# CONFIG_NET_VENDOR_SEEQ is not set 369# CONFIG_NET_VENDOR_SEEQ is not set
365# CONFIG_NET_VENDOR_SMSC is not set 370# CONFIG_NET_VENDOR_SMSC is not set
366# CONFIG_NET_VENDOR_STMICRO is not set 371# CONFIG_NET_VENDOR_STMICRO is not set
372# CONFIG_NET_VENDOR_SYNOPSYS is not set
367# CONFIG_NET_VENDOR_VIA is not set 373# CONFIG_NET_VENDOR_VIA is not set
368# CONFIG_NET_VENDOR_WIZNET is not set 374# CONFIG_NET_VENDOR_WIZNET is not set
369CONFIG_PPP=m 375CONFIG_PPP=m
@@ -519,6 +525,7 @@ CONFIG_TEST_USER_COPY=m
519CONFIG_TEST_BPF=m 525CONFIG_TEST_BPF=m
520CONFIG_TEST_FIRMWARE=m 526CONFIG_TEST_FIRMWARE=m
521CONFIG_TEST_UDELAY=m 527CONFIG_TEST_UDELAY=m
528CONFIG_TEST_STATIC_KEYS=m
522CONFIG_EARLY_PRINTK=y 529CONFIG_EARLY_PRINTK=y
523CONFIG_ENCRYPTED_KEYS=m 530CONFIG_ENCRYPTED_KEYS=m
524CONFIG_CRYPTO_RSA=m 531CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/configs/multi_defconfig b/arch/m68k/configs/multi_defconfig
index 8afca3753db1..83c80d2030ec 100644
--- a/arch/m68k/configs/multi_defconfig
+++ b/arch/m68k/configs/multi_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -64,7 +65,6 @@ CONFIG_NET_IPGRE_DEMUX=m
64CONFIG_NET_IPGRE=m 65CONFIG_NET_IPGRE=m
65CONFIG_NET_IPVTI=m 66CONFIG_NET_IPVTI=m
66CONFIG_NET_FOU_IP_TUNNELS=y 67CONFIG_NET_FOU_IP_TUNNELS=y
67CONFIG_GENEVE_CORE=m
68CONFIG_INET_AH=m 68CONFIG_INET_AH=m
69CONFIG_INET_ESP=m 69CONFIG_INET_ESP=m
70CONFIG_INET_IPCOMP=m 70CONFIG_INET_IPCOMP=m
@@ -74,10 +74,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
74# CONFIG_INET_LRO is not set 74# CONFIG_INET_LRO is not set
75CONFIG_INET_DIAG=m 75CONFIG_INET_DIAG=m
76CONFIG_INET_UDP_DIAG=m 76CONFIG_INET_UDP_DIAG=m
77CONFIG_IPV6=m
77CONFIG_IPV6_ROUTER_PREF=y 78CONFIG_IPV6_ROUTER_PREF=y
78CONFIG_INET6_AH=m 79CONFIG_INET6_AH=m
79CONFIG_INET6_ESP=m 80CONFIG_INET6_ESP=m
80CONFIG_INET6_IPCOMP=m 81CONFIG_INET6_IPCOMP=m
82CONFIG_IPV6_ILA=m
81CONFIG_IPV6_VTI=m 83CONFIG_IPV6_VTI=m
82CONFIG_IPV6_GRE=m 84CONFIG_IPV6_GRE=m
83CONFIG_NETFILTER=y 85CONFIG_NETFILTER=y
@@ -186,6 +188,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
186CONFIG_IP_SET_LIST_SET=m 188CONFIG_IP_SET_LIST_SET=m
187CONFIG_NF_CONNTRACK_IPV4=m 189CONFIG_NF_CONNTRACK_IPV4=m
188CONFIG_NFT_CHAIN_ROUTE_IPV4=m 190CONFIG_NFT_CHAIN_ROUTE_IPV4=m
191CONFIG_NFT_DUP_IPV4=m
189CONFIG_NF_TABLES_ARP=m 192CONFIG_NF_TABLES_ARP=m
190CONFIG_NF_LOG_ARP=m 193CONFIG_NF_LOG_ARP=m
191CONFIG_NFT_CHAIN_NAT_IPV4=m 194CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -213,6 +216,7 @@ CONFIG_IP_NF_ARPFILTER=m
213CONFIG_IP_NF_ARP_MANGLE=m 216CONFIG_IP_NF_ARP_MANGLE=m
214CONFIG_NF_CONNTRACK_IPV6=m 217CONFIG_NF_CONNTRACK_IPV6=m
215CONFIG_NFT_CHAIN_ROUTE_IPV6=m 218CONFIG_NFT_CHAIN_ROUTE_IPV6=m
219CONFIG_NFT_DUP_IPV6=m
216CONFIG_NFT_CHAIN_NAT_IPV6=m 220CONFIG_NFT_CHAIN_NAT_IPV6=m
217CONFIG_NFT_MASQ_IPV6=m 221CONFIG_NFT_MASQ_IPV6=m
218CONFIG_NFT_REDIR_IPV6=m 222CONFIG_NFT_REDIR_IPV6=m
@@ -281,6 +285,7 @@ CONFIG_NETLINK_DIAG=m
281CONFIG_MPLS=y 285CONFIG_MPLS=y
282CONFIG_NET_MPLS_GSO=m 286CONFIG_NET_MPLS_GSO=m
283CONFIG_MPLS_ROUTING=m 287CONFIG_MPLS_ROUTING=m
288CONFIG_MPLS_IPTUNNEL=m
284# CONFIG_WIRELESS is not set 289# CONFIG_WIRELESS is not set
285# CONFIG_UEVENT_HELPER is not set 290# CONFIG_UEVENT_HELPER is not set
286CONFIG_DEVTMPFS=y 291CONFIG_DEVTMPFS=y
@@ -410,6 +415,7 @@ CONFIG_ZORRO8390=y
410# CONFIG_NET_VENDOR_SEEQ is not set 415# CONFIG_NET_VENDOR_SEEQ is not set
411CONFIG_SMC91X=y 416CONFIG_SMC91X=y
412# CONFIG_NET_VENDOR_STMICRO is not set 417# CONFIG_NET_VENDOR_STMICRO is not set
418# CONFIG_NET_VENDOR_SYNOPSYS is not set
413# CONFIG_NET_VENDOR_VIA is not set 419# CONFIG_NET_VENDOR_VIA is not set
414# CONFIG_NET_VENDOR_WIZNET is not set 420# CONFIG_NET_VENDOR_WIZNET is not set
415CONFIG_PLIP=m 421CONFIG_PLIP=m
@@ -599,6 +605,7 @@ CONFIG_TEST_USER_COPY=m
599CONFIG_TEST_BPF=m 605CONFIG_TEST_BPF=m
600CONFIG_TEST_FIRMWARE=m 606CONFIG_TEST_FIRMWARE=m
601CONFIG_TEST_UDELAY=m 607CONFIG_TEST_UDELAY=m
608CONFIG_TEST_STATIC_KEYS=m
602CONFIG_EARLY_PRINTK=y 609CONFIG_EARLY_PRINTK=y
603CONFIG_ENCRYPTED_KEYS=m 610CONFIG_ENCRYPTED_KEYS=m
604CONFIG_CRYPTO_RSA=m 611CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/configs/mvme147_defconfig b/arch/m68k/configs/mvme147_defconfig
index ef00875994d9..6cb42c3bf5a2 100644
--- a/arch/m68k/configs/mvme147_defconfig
+++ b/arch/m68k/configs/mvme147_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -52,7 +53,6 @@ CONFIG_NET_IPGRE_DEMUX=m
52CONFIG_NET_IPGRE=m 53CONFIG_NET_IPGRE=m
53CONFIG_NET_IPVTI=m 54CONFIG_NET_IPVTI=m
54CONFIG_NET_FOU_IP_TUNNELS=y 55CONFIG_NET_FOU_IP_TUNNELS=y
55CONFIG_GENEVE_CORE=m
56CONFIG_INET_AH=m 56CONFIG_INET_AH=m
57CONFIG_INET_ESP=m 57CONFIG_INET_ESP=m
58CONFIG_INET_IPCOMP=m 58CONFIG_INET_IPCOMP=m
@@ -62,10 +62,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
62# CONFIG_INET_LRO is not set 62# CONFIG_INET_LRO is not set
63CONFIG_INET_DIAG=m 63CONFIG_INET_DIAG=m
64CONFIG_INET_UDP_DIAG=m 64CONFIG_INET_UDP_DIAG=m
65CONFIG_IPV6=m
65CONFIG_IPV6_ROUTER_PREF=y 66CONFIG_IPV6_ROUTER_PREF=y
66CONFIG_INET6_AH=m 67CONFIG_INET6_AH=m
67CONFIG_INET6_ESP=m 68CONFIG_INET6_ESP=m
68CONFIG_INET6_IPCOMP=m 69CONFIG_INET6_IPCOMP=m
70CONFIG_IPV6_ILA=m
69CONFIG_IPV6_VTI=m 71CONFIG_IPV6_VTI=m
70CONFIG_IPV6_GRE=m 72CONFIG_IPV6_GRE=m
71CONFIG_NETFILTER=y 73CONFIG_NETFILTER=y
@@ -174,6 +176,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
174CONFIG_IP_SET_LIST_SET=m 176CONFIG_IP_SET_LIST_SET=m
175CONFIG_NF_CONNTRACK_IPV4=m 177CONFIG_NF_CONNTRACK_IPV4=m
176CONFIG_NFT_CHAIN_ROUTE_IPV4=m 178CONFIG_NFT_CHAIN_ROUTE_IPV4=m
179CONFIG_NFT_DUP_IPV4=m
177CONFIG_NF_TABLES_ARP=m 180CONFIG_NF_TABLES_ARP=m
178CONFIG_NF_LOG_ARP=m 181CONFIG_NF_LOG_ARP=m
179CONFIG_NFT_CHAIN_NAT_IPV4=m 182CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -201,6 +204,7 @@ CONFIG_IP_NF_ARPFILTER=m
201CONFIG_IP_NF_ARP_MANGLE=m 204CONFIG_IP_NF_ARP_MANGLE=m
202CONFIG_NF_CONNTRACK_IPV6=m 205CONFIG_NF_CONNTRACK_IPV6=m
203CONFIG_NFT_CHAIN_ROUTE_IPV6=m 206CONFIG_NFT_CHAIN_ROUTE_IPV6=m
207CONFIG_NFT_DUP_IPV6=m
204CONFIG_NFT_CHAIN_NAT_IPV6=m 208CONFIG_NFT_CHAIN_NAT_IPV6=m
205CONFIG_NFT_MASQ_IPV6=m 209CONFIG_NFT_MASQ_IPV6=m
206CONFIG_NFT_REDIR_IPV6=m 210CONFIG_NFT_REDIR_IPV6=m
@@ -266,6 +270,7 @@ CONFIG_NETLINK_DIAG=m
266CONFIG_MPLS=y 270CONFIG_MPLS=y
267CONFIG_NET_MPLS_GSO=m 271CONFIG_NET_MPLS_GSO=m
268CONFIG_MPLS_ROUTING=m 272CONFIG_MPLS_ROUTING=m
273CONFIG_MPLS_IPTUNNEL=m
269# CONFIG_WIRELESS is not set 274# CONFIG_WIRELESS is not set
270# CONFIG_UEVENT_HELPER is not set 275# CONFIG_UEVENT_HELPER is not set
271CONFIG_DEVTMPFS=y 276CONFIG_DEVTMPFS=y
@@ -343,6 +348,7 @@ CONFIG_MVME147_NET=y
343# CONFIG_NET_VENDOR_SAMSUNG is not set 348# CONFIG_NET_VENDOR_SAMSUNG is not set
344# CONFIG_NET_VENDOR_SEEQ is not set 349# CONFIG_NET_VENDOR_SEEQ is not set
345# CONFIG_NET_VENDOR_STMICRO is not set 350# CONFIG_NET_VENDOR_STMICRO is not set
351# CONFIG_NET_VENDOR_SYNOPSYS is not set
346# CONFIG_NET_VENDOR_VIA is not set 352# CONFIG_NET_VENDOR_VIA is not set
347# CONFIG_NET_VENDOR_WIZNET is not set 353# CONFIG_NET_VENDOR_WIZNET is not set
348CONFIG_PPP=m 354CONFIG_PPP=m
@@ -488,6 +494,7 @@ CONFIG_TEST_USER_COPY=m
488CONFIG_TEST_BPF=m 494CONFIG_TEST_BPF=m
489CONFIG_TEST_FIRMWARE=m 495CONFIG_TEST_FIRMWARE=m
490CONFIG_TEST_UDELAY=m 496CONFIG_TEST_UDELAY=m
497CONFIG_TEST_STATIC_KEYS=m
491CONFIG_EARLY_PRINTK=y 498CONFIG_EARLY_PRINTK=y
492CONFIG_ENCRYPTED_KEYS=m 499CONFIG_ENCRYPTED_KEYS=m
493CONFIG_CRYPTO_RSA=m 500CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/configs/mvme16x_defconfig b/arch/m68k/configs/mvme16x_defconfig
index 387c2bd90ff1..c7508c30330c 100644
--- a/arch/m68k/configs/mvme16x_defconfig
+++ b/arch/m68k/configs/mvme16x_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -53,7 +54,6 @@ CONFIG_NET_IPGRE_DEMUX=m
53CONFIG_NET_IPGRE=m 54CONFIG_NET_IPGRE=m
54CONFIG_NET_IPVTI=m 55CONFIG_NET_IPVTI=m
55CONFIG_NET_FOU_IP_TUNNELS=y 56CONFIG_NET_FOU_IP_TUNNELS=y
56CONFIG_GENEVE_CORE=m
57CONFIG_INET_AH=m 57CONFIG_INET_AH=m
58CONFIG_INET_ESP=m 58CONFIG_INET_ESP=m
59CONFIG_INET_IPCOMP=m 59CONFIG_INET_IPCOMP=m
@@ -63,10 +63,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
63# CONFIG_INET_LRO is not set 63# CONFIG_INET_LRO is not set
64CONFIG_INET_DIAG=m 64CONFIG_INET_DIAG=m
65CONFIG_INET_UDP_DIAG=m 65CONFIG_INET_UDP_DIAG=m
66CONFIG_IPV6=m
66CONFIG_IPV6_ROUTER_PREF=y 67CONFIG_IPV6_ROUTER_PREF=y
67CONFIG_INET6_AH=m 68CONFIG_INET6_AH=m
68CONFIG_INET6_ESP=m 69CONFIG_INET6_ESP=m
69CONFIG_INET6_IPCOMP=m 70CONFIG_INET6_IPCOMP=m
71CONFIG_IPV6_ILA=m
70CONFIG_IPV6_VTI=m 72CONFIG_IPV6_VTI=m
71CONFIG_IPV6_GRE=m 73CONFIG_IPV6_GRE=m
72CONFIG_NETFILTER=y 74CONFIG_NETFILTER=y
@@ -175,6 +177,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
175CONFIG_IP_SET_LIST_SET=m 177CONFIG_IP_SET_LIST_SET=m
176CONFIG_NF_CONNTRACK_IPV4=m 178CONFIG_NF_CONNTRACK_IPV4=m
177CONFIG_NFT_CHAIN_ROUTE_IPV4=m 179CONFIG_NFT_CHAIN_ROUTE_IPV4=m
180CONFIG_NFT_DUP_IPV4=m
178CONFIG_NF_TABLES_ARP=m 181CONFIG_NF_TABLES_ARP=m
179CONFIG_NF_LOG_ARP=m 182CONFIG_NF_LOG_ARP=m
180CONFIG_NFT_CHAIN_NAT_IPV4=m 183CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -202,6 +205,7 @@ CONFIG_IP_NF_ARPFILTER=m
202CONFIG_IP_NF_ARP_MANGLE=m 205CONFIG_IP_NF_ARP_MANGLE=m
203CONFIG_NF_CONNTRACK_IPV6=m 206CONFIG_NF_CONNTRACK_IPV6=m
204CONFIG_NFT_CHAIN_ROUTE_IPV6=m 207CONFIG_NFT_CHAIN_ROUTE_IPV6=m
208CONFIG_NFT_DUP_IPV6=m
205CONFIG_NFT_CHAIN_NAT_IPV6=m 209CONFIG_NFT_CHAIN_NAT_IPV6=m
206CONFIG_NFT_MASQ_IPV6=m 210CONFIG_NFT_MASQ_IPV6=m
207CONFIG_NFT_REDIR_IPV6=m 211CONFIG_NFT_REDIR_IPV6=m
@@ -267,6 +271,7 @@ CONFIG_NETLINK_DIAG=m
267CONFIG_MPLS=y 271CONFIG_MPLS=y
268CONFIG_NET_MPLS_GSO=m 272CONFIG_NET_MPLS_GSO=m
269CONFIG_MPLS_ROUTING=m 273CONFIG_MPLS_ROUTING=m
274CONFIG_MPLS_IPTUNNEL=m
270# CONFIG_WIRELESS is not set 275# CONFIG_WIRELESS is not set
271# CONFIG_UEVENT_HELPER is not set 276# CONFIG_UEVENT_HELPER is not set
272CONFIG_DEVTMPFS=y 277CONFIG_DEVTMPFS=y
@@ -343,6 +348,7 @@ CONFIG_MVME16x_NET=y
343# CONFIG_NET_VENDOR_SAMSUNG is not set 348# CONFIG_NET_VENDOR_SAMSUNG is not set
344# CONFIG_NET_VENDOR_SEEQ is not set 349# CONFIG_NET_VENDOR_SEEQ is not set
345# CONFIG_NET_VENDOR_STMICRO is not set 350# CONFIG_NET_VENDOR_STMICRO is not set
351# CONFIG_NET_VENDOR_SYNOPSYS is not set
346# CONFIG_NET_VENDOR_VIA is not set 352# CONFIG_NET_VENDOR_VIA is not set
347# CONFIG_NET_VENDOR_WIZNET is not set 353# CONFIG_NET_VENDOR_WIZNET is not set
348CONFIG_PPP=m 354CONFIG_PPP=m
@@ -488,6 +494,7 @@ CONFIG_TEST_USER_COPY=m
488CONFIG_TEST_BPF=m 494CONFIG_TEST_BPF=m
489CONFIG_TEST_FIRMWARE=m 495CONFIG_TEST_FIRMWARE=m
490CONFIG_TEST_UDELAY=m 496CONFIG_TEST_UDELAY=m
497CONFIG_TEST_STATIC_KEYS=m
491CONFIG_EARLY_PRINTK=y 498CONFIG_EARLY_PRINTK=y
492CONFIG_ENCRYPTED_KEYS=m 499CONFIG_ENCRYPTED_KEYS=m
493CONFIG_CRYPTO_RSA=m 500CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/configs/q40_defconfig b/arch/m68k/configs/q40_defconfig
index 35355c1bc714..64b71664a303 100644
--- a/arch/m68k/configs/q40_defconfig
+++ b/arch/m68k/configs/q40_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -53,7 +54,6 @@ CONFIG_NET_IPGRE_DEMUX=m
53CONFIG_NET_IPGRE=m 54CONFIG_NET_IPGRE=m
54CONFIG_NET_IPVTI=m 55CONFIG_NET_IPVTI=m
55CONFIG_NET_FOU_IP_TUNNELS=y 56CONFIG_NET_FOU_IP_TUNNELS=y
56CONFIG_GENEVE_CORE=m
57CONFIG_INET_AH=m 57CONFIG_INET_AH=m
58CONFIG_INET_ESP=m 58CONFIG_INET_ESP=m
59CONFIG_INET_IPCOMP=m 59CONFIG_INET_IPCOMP=m
@@ -63,10 +63,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
63# CONFIG_INET_LRO is not set 63# CONFIG_INET_LRO is not set
64CONFIG_INET_DIAG=m 64CONFIG_INET_DIAG=m
65CONFIG_INET_UDP_DIAG=m 65CONFIG_INET_UDP_DIAG=m
66CONFIG_IPV6=m
66CONFIG_IPV6_ROUTER_PREF=y 67CONFIG_IPV6_ROUTER_PREF=y
67CONFIG_INET6_AH=m 68CONFIG_INET6_AH=m
68CONFIG_INET6_ESP=m 69CONFIG_INET6_ESP=m
69CONFIG_INET6_IPCOMP=m 70CONFIG_INET6_IPCOMP=m
71CONFIG_IPV6_ILA=m
70CONFIG_IPV6_VTI=m 72CONFIG_IPV6_VTI=m
71CONFIG_IPV6_GRE=m 73CONFIG_IPV6_GRE=m
72CONFIG_NETFILTER=y 74CONFIG_NETFILTER=y
@@ -175,6 +177,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
175CONFIG_IP_SET_LIST_SET=m 177CONFIG_IP_SET_LIST_SET=m
176CONFIG_NF_CONNTRACK_IPV4=m 178CONFIG_NF_CONNTRACK_IPV4=m
177CONFIG_NFT_CHAIN_ROUTE_IPV4=m 179CONFIG_NFT_CHAIN_ROUTE_IPV4=m
180CONFIG_NFT_DUP_IPV4=m
178CONFIG_NF_TABLES_ARP=m 181CONFIG_NF_TABLES_ARP=m
179CONFIG_NF_LOG_ARP=m 182CONFIG_NF_LOG_ARP=m
180CONFIG_NFT_CHAIN_NAT_IPV4=m 183CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -202,6 +205,7 @@ CONFIG_IP_NF_ARPFILTER=m
202CONFIG_IP_NF_ARP_MANGLE=m 205CONFIG_IP_NF_ARP_MANGLE=m
203CONFIG_NF_CONNTRACK_IPV6=m 206CONFIG_NF_CONNTRACK_IPV6=m
204CONFIG_NFT_CHAIN_ROUTE_IPV6=m 207CONFIG_NFT_CHAIN_ROUTE_IPV6=m
208CONFIG_NFT_DUP_IPV6=m
205CONFIG_NFT_CHAIN_NAT_IPV6=m 209CONFIG_NFT_CHAIN_NAT_IPV6=m
206CONFIG_NFT_MASQ_IPV6=m 210CONFIG_NFT_MASQ_IPV6=m
207CONFIG_NFT_REDIR_IPV6=m 211CONFIG_NFT_REDIR_IPV6=m
@@ -267,6 +271,7 @@ CONFIG_NETLINK_DIAG=m
267CONFIG_MPLS=y 271CONFIG_MPLS=y
268CONFIG_NET_MPLS_GSO=m 272CONFIG_NET_MPLS_GSO=m
269CONFIG_MPLS_ROUTING=m 273CONFIG_MPLS_ROUTING=m
274CONFIG_MPLS_IPTUNNEL=m
270# CONFIG_WIRELESS is not set 275# CONFIG_WIRELESS is not set
271# CONFIG_UEVENT_HELPER is not set 276# CONFIG_UEVENT_HELPER is not set
272CONFIG_DEVTMPFS=y 277CONFIG_DEVTMPFS=y
@@ -354,6 +359,7 @@ CONFIG_NE2000=y
354# CONFIG_NET_VENDOR_SEEQ is not set 359# CONFIG_NET_VENDOR_SEEQ is not set
355# CONFIG_NET_VENDOR_SMSC is not set 360# CONFIG_NET_VENDOR_SMSC is not set
356# CONFIG_NET_VENDOR_STMICRO is not set 361# CONFIG_NET_VENDOR_STMICRO is not set
362# CONFIG_NET_VENDOR_SYNOPSYS is not set
357# CONFIG_NET_VENDOR_VIA is not set 363# CONFIG_NET_VENDOR_VIA is not set
358# CONFIG_NET_VENDOR_WIZNET is not set 364# CONFIG_NET_VENDOR_WIZNET is not set
359CONFIG_PLIP=m 365CONFIG_PLIP=m
@@ -510,6 +516,7 @@ CONFIG_TEST_USER_COPY=m
510CONFIG_TEST_BPF=m 516CONFIG_TEST_BPF=m
511CONFIG_TEST_FIRMWARE=m 517CONFIG_TEST_FIRMWARE=m
512CONFIG_TEST_UDELAY=m 518CONFIG_TEST_UDELAY=m
519CONFIG_TEST_STATIC_KEYS=m
513CONFIG_EARLY_PRINTK=y 520CONFIG_EARLY_PRINTK=y
514CONFIG_ENCRYPTED_KEYS=m 521CONFIG_ENCRYPTED_KEYS=m
515CONFIG_CRYPTO_RSA=m 522CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/configs/sun3_defconfig b/arch/m68k/configs/sun3_defconfig
index 8442d267b877..9a4cab78a2ea 100644
--- a/arch/m68k/configs/sun3_defconfig
+++ b/arch/m68k/configs/sun3_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -50,7 +51,6 @@ CONFIG_NET_IPGRE_DEMUX=m
50CONFIG_NET_IPGRE=m 51CONFIG_NET_IPGRE=m
51CONFIG_NET_IPVTI=m 52CONFIG_NET_IPVTI=m
52CONFIG_NET_FOU_IP_TUNNELS=y 53CONFIG_NET_FOU_IP_TUNNELS=y
53CONFIG_GENEVE_CORE=m
54CONFIG_INET_AH=m 54CONFIG_INET_AH=m
55CONFIG_INET_ESP=m 55CONFIG_INET_ESP=m
56CONFIG_INET_IPCOMP=m 56CONFIG_INET_IPCOMP=m
@@ -60,10 +60,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
60# CONFIG_INET_LRO is not set 60# CONFIG_INET_LRO is not set
61CONFIG_INET_DIAG=m 61CONFIG_INET_DIAG=m
62CONFIG_INET_UDP_DIAG=m 62CONFIG_INET_UDP_DIAG=m
63CONFIG_IPV6=m
63CONFIG_IPV6_ROUTER_PREF=y 64CONFIG_IPV6_ROUTER_PREF=y
64CONFIG_INET6_AH=m 65CONFIG_INET6_AH=m
65CONFIG_INET6_ESP=m 66CONFIG_INET6_ESP=m
66CONFIG_INET6_IPCOMP=m 67CONFIG_INET6_IPCOMP=m
68CONFIG_IPV6_ILA=m
67CONFIG_IPV6_VTI=m 69CONFIG_IPV6_VTI=m
68CONFIG_IPV6_GRE=m 70CONFIG_IPV6_GRE=m
69CONFIG_NETFILTER=y 71CONFIG_NETFILTER=y
@@ -172,6 +174,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
172CONFIG_IP_SET_LIST_SET=m 174CONFIG_IP_SET_LIST_SET=m
173CONFIG_NF_CONNTRACK_IPV4=m 175CONFIG_NF_CONNTRACK_IPV4=m
174CONFIG_NFT_CHAIN_ROUTE_IPV4=m 176CONFIG_NFT_CHAIN_ROUTE_IPV4=m
177CONFIG_NFT_DUP_IPV4=m
175CONFIG_NF_TABLES_ARP=m 178CONFIG_NF_TABLES_ARP=m
176CONFIG_NF_LOG_ARP=m 179CONFIG_NF_LOG_ARP=m
177CONFIG_NFT_CHAIN_NAT_IPV4=m 180CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -199,6 +202,7 @@ CONFIG_IP_NF_ARPFILTER=m
199CONFIG_IP_NF_ARP_MANGLE=m 202CONFIG_IP_NF_ARP_MANGLE=m
200CONFIG_NF_CONNTRACK_IPV6=m 203CONFIG_NF_CONNTRACK_IPV6=m
201CONFIG_NFT_CHAIN_ROUTE_IPV6=m 204CONFIG_NFT_CHAIN_ROUTE_IPV6=m
205CONFIG_NFT_DUP_IPV6=m
202CONFIG_NFT_CHAIN_NAT_IPV6=m 206CONFIG_NFT_CHAIN_NAT_IPV6=m
203CONFIG_NFT_MASQ_IPV6=m 207CONFIG_NFT_MASQ_IPV6=m
204CONFIG_NFT_REDIR_IPV6=m 208CONFIG_NFT_REDIR_IPV6=m
@@ -264,6 +268,7 @@ CONFIG_NETLINK_DIAG=m
264CONFIG_MPLS=y 268CONFIG_MPLS=y
265CONFIG_NET_MPLS_GSO=m 269CONFIG_NET_MPLS_GSO=m
266CONFIG_MPLS_ROUTING=m 270CONFIG_MPLS_ROUTING=m
271CONFIG_MPLS_IPTUNNEL=m
267# CONFIG_WIRELESS is not set 272# CONFIG_WIRELESS is not set
268# CONFIG_UEVENT_HELPER is not set 273# CONFIG_UEVENT_HELPER is not set
269CONFIG_DEVTMPFS=y 274CONFIG_DEVTMPFS=y
@@ -341,6 +346,7 @@ CONFIG_SUN3_82586=y
341# CONFIG_NET_VENDOR_SEEQ is not set 346# CONFIG_NET_VENDOR_SEEQ is not set
342# CONFIG_NET_VENDOR_STMICRO is not set 347# CONFIG_NET_VENDOR_STMICRO is not set
343# CONFIG_NET_VENDOR_SUN is not set 348# CONFIG_NET_VENDOR_SUN is not set
349# CONFIG_NET_VENDOR_SYNOPSYS is not set
344# CONFIG_NET_VENDOR_VIA is not set 350# CONFIG_NET_VENDOR_VIA is not set
345# CONFIG_NET_VENDOR_WIZNET is not set 351# CONFIG_NET_VENDOR_WIZNET is not set
346CONFIG_PPP=m 352CONFIG_PPP=m
@@ -489,6 +495,7 @@ CONFIG_TEST_USER_COPY=m
489CONFIG_TEST_BPF=m 495CONFIG_TEST_BPF=m
490CONFIG_TEST_FIRMWARE=m 496CONFIG_TEST_FIRMWARE=m
491CONFIG_TEST_UDELAY=m 497CONFIG_TEST_UDELAY=m
498CONFIG_TEST_STATIC_KEYS=m
492CONFIG_ENCRYPTED_KEYS=m 499CONFIG_ENCRYPTED_KEYS=m
493CONFIG_CRYPTO_RSA=m 500CONFIG_CRYPTO_RSA=m
494CONFIG_CRYPTO_MANAGER=y 501CONFIG_CRYPTO_MANAGER=y
diff --git a/arch/m68k/configs/sun3x_defconfig b/arch/m68k/configs/sun3x_defconfig
index 0e1b542e1555..1a2eaac13dbd 100644
--- a/arch/m68k/configs/sun3x_defconfig
+++ b/arch/m68k/configs/sun3x_defconfig
@@ -10,6 +10,7 @@ CONFIG_LOG_BUF_SHIFT=16
10# CONFIG_PID_NS is not set 10# CONFIG_PID_NS is not set
11# CONFIG_NET_NS is not set 11# CONFIG_NET_NS is not set
12CONFIG_BLK_DEV_INITRD=y 12CONFIG_BLK_DEV_INITRD=y
13CONFIG_USERFAULTFD=y
13CONFIG_SLAB=y 14CONFIG_SLAB=y
14CONFIG_MODULES=y 15CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -50,7 +51,6 @@ CONFIG_NET_IPGRE_DEMUX=m
50CONFIG_NET_IPGRE=m 51CONFIG_NET_IPGRE=m
51CONFIG_NET_IPVTI=m 52CONFIG_NET_IPVTI=m
52CONFIG_NET_FOU_IP_TUNNELS=y 53CONFIG_NET_FOU_IP_TUNNELS=y
53CONFIG_GENEVE_CORE=m
54CONFIG_INET_AH=m 54CONFIG_INET_AH=m
55CONFIG_INET_ESP=m 55CONFIG_INET_ESP=m
56CONFIG_INET_IPCOMP=m 56CONFIG_INET_IPCOMP=m
@@ -60,10 +60,12 @@ CONFIG_INET_XFRM_MODE_BEET=m
60# CONFIG_INET_LRO is not set 60# CONFIG_INET_LRO is not set
61CONFIG_INET_DIAG=m 61CONFIG_INET_DIAG=m
62CONFIG_INET_UDP_DIAG=m 62CONFIG_INET_UDP_DIAG=m
63CONFIG_IPV6=m
63CONFIG_IPV6_ROUTER_PREF=y 64CONFIG_IPV6_ROUTER_PREF=y
64CONFIG_INET6_AH=m 65CONFIG_INET6_AH=m
65CONFIG_INET6_ESP=m 66CONFIG_INET6_ESP=m
66CONFIG_INET6_IPCOMP=m 67CONFIG_INET6_IPCOMP=m
68CONFIG_IPV6_ILA=m
67CONFIG_IPV6_VTI=m 69CONFIG_IPV6_VTI=m
68CONFIG_IPV6_GRE=m 70CONFIG_IPV6_GRE=m
69CONFIG_NETFILTER=y 71CONFIG_NETFILTER=y
@@ -172,6 +174,7 @@ CONFIG_IP_SET_HASH_NETIFACE=m
172CONFIG_IP_SET_LIST_SET=m 174CONFIG_IP_SET_LIST_SET=m
173CONFIG_NF_CONNTRACK_IPV4=m 175CONFIG_NF_CONNTRACK_IPV4=m
174CONFIG_NFT_CHAIN_ROUTE_IPV4=m 176CONFIG_NFT_CHAIN_ROUTE_IPV4=m
177CONFIG_NFT_DUP_IPV4=m
175CONFIG_NF_TABLES_ARP=m 178CONFIG_NF_TABLES_ARP=m
176CONFIG_NF_LOG_ARP=m 179CONFIG_NF_LOG_ARP=m
177CONFIG_NFT_CHAIN_NAT_IPV4=m 180CONFIG_NFT_CHAIN_NAT_IPV4=m
@@ -199,6 +202,7 @@ CONFIG_IP_NF_ARPFILTER=m
199CONFIG_IP_NF_ARP_MANGLE=m 202CONFIG_IP_NF_ARP_MANGLE=m
200CONFIG_NF_CONNTRACK_IPV6=m 203CONFIG_NF_CONNTRACK_IPV6=m
201CONFIG_NFT_CHAIN_ROUTE_IPV6=m 204CONFIG_NFT_CHAIN_ROUTE_IPV6=m
205CONFIG_NFT_DUP_IPV6=m
202CONFIG_NFT_CHAIN_NAT_IPV6=m 206CONFIG_NFT_CHAIN_NAT_IPV6=m
203CONFIG_NFT_MASQ_IPV6=m 207CONFIG_NFT_MASQ_IPV6=m
204CONFIG_NFT_REDIR_IPV6=m 208CONFIG_NFT_REDIR_IPV6=m
@@ -264,6 +268,7 @@ CONFIG_NETLINK_DIAG=m
264CONFIG_MPLS=y 268CONFIG_MPLS=y
265CONFIG_NET_MPLS_GSO=m 269CONFIG_NET_MPLS_GSO=m
266CONFIG_MPLS_ROUTING=m 270CONFIG_MPLS_ROUTING=m
271CONFIG_MPLS_IPTUNNEL=m
267# CONFIG_WIRELESS is not set 272# CONFIG_WIRELESS is not set
268# CONFIG_UEVENT_HELPER is not set 273# CONFIG_UEVENT_HELPER is not set
269CONFIG_DEVTMPFS=y 274CONFIG_DEVTMPFS=y
@@ -341,6 +346,7 @@ CONFIG_SUN3LANCE=y
341# CONFIG_NET_VENDOR_SAMSUNG is not set 346# CONFIG_NET_VENDOR_SAMSUNG is not set
342# CONFIG_NET_VENDOR_SEEQ is not set 347# CONFIG_NET_VENDOR_SEEQ is not set
343# CONFIG_NET_VENDOR_STMICRO is not set 348# CONFIG_NET_VENDOR_STMICRO is not set
349# CONFIG_NET_VENDOR_SYNOPSYS is not set
344# CONFIG_NET_VENDOR_VIA is not set 350# CONFIG_NET_VENDOR_VIA is not set
345# CONFIG_NET_VENDOR_WIZNET is not set 351# CONFIG_NET_VENDOR_WIZNET is not set
346CONFIG_PPP=m 352CONFIG_PPP=m
@@ -489,6 +495,7 @@ CONFIG_TEST_USER_COPY=m
489CONFIG_TEST_BPF=m 495CONFIG_TEST_BPF=m
490CONFIG_TEST_FIRMWARE=m 496CONFIG_TEST_FIRMWARE=m
491CONFIG_TEST_UDELAY=m 497CONFIG_TEST_UDELAY=m
498CONFIG_TEST_STATIC_KEYS=m
492CONFIG_EARLY_PRINTK=y 499CONFIG_EARLY_PRINTK=y
493CONFIG_ENCRYPTED_KEYS=m 500CONFIG_ENCRYPTED_KEYS=m
494CONFIG_CRYPTO_RSA=m 501CONFIG_CRYPTO_RSA=m
diff --git a/arch/m68k/include/asm/irq.h b/arch/m68k/include/asm/irq.h
index 81ca118d58af..a644f4a53b94 100644
--- a/arch/m68k/include/asm/irq.h
+++ b/arch/m68k/include/asm/irq.h
@@ -64,8 +64,7 @@ extern void m68k_setup_auto_interrupt(void (*handler)(unsigned int,
64 struct pt_regs *)); 64 struct pt_regs *));
65extern void m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt); 65extern void m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt);
66extern void m68k_setup_irq_controller(struct irq_chip *, 66extern void m68k_setup_irq_controller(struct irq_chip *,
67 void (*handle)(unsigned int irq, 67 void (*handle)(struct irq_desc *desc),
68 struct irq_desc *desc),
69 unsigned int irq, unsigned int cnt); 68 unsigned int irq, unsigned int cnt);
70 69
71extern unsigned int irq_canonicalize(unsigned int irq); 70extern unsigned int irq_canonicalize(unsigned int irq);
diff --git a/arch/m68k/include/asm/linkage.h b/arch/m68k/include/asm/linkage.h
index 5a822bb790f7..066e74f666ae 100644
--- a/arch/m68k/include/asm/linkage.h
+++ b/arch/m68k/include/asm/linkage.h
@@ -4,4 +4,34 @@
4#define __ALIGN .align 4 4#define __ALIGN .align 4
5#define __ALIGN_STR ".align 4" 5#define __ALIGN_STR ".align 4"
6 6
7/*
8 * Make sure the compiler doesn't do anything stupid with the
9 * arguments on the stack - they are owned by the *caller*, not
10 * the callee. This just fools gcc into not spilling into them,
11 * and keeps it from doing tailcall recursion and/or using the
12 * stack slots for temporaries, since they are live and "used"
13 * all the way to the end of the function.
14 */
15#define asmlinkage_protect(n, ret, args...) \
16 __asmlinkage_protect##n(ret, ##args)
17#define __asmlinkage_protect_n(ret, args...) \
18 __asm__ __volatile__ ("" : "=r" (ret) : "0" (ret), ##args)
19#define __asmlinkage_protect0(ret) \
20 __asmlinkage_protect_n(ret)
21#define __asmlinkage_protect1(ret, arg1) \
22 __asmlinkage_protect_n(ret, "m" (arg1))
23#define __asmlinkage_protect2(ret, arg1, arg2) \
24 __asmlinkage_protect_n(ret, "m" (arg1), "m" (arg2))
25#define __asmlinkage_protect3(ret, arg1, arg2, arg3) \
26 __asmlinkage_protect_n(ret, "m" (arg1), "m" (arg2), "m" (arg3))
27#define __asmlinkage_protect4(ret, arg1, arg2, arg3, arg4) \
28 __asmlinkage_protect_n(ret, "m" (arg1), "m" (arg2), "m" (arg3), \
29 "m" (arg4))
30#define __asmlinkage_protect5(ret, arg1, arg2, arg3, arg4, arg5) \
31 __asmlinkage_protect_n(ret, "m" (arg1), "m" (arg2), "m" (arg3), \
32 "m" (arg4), "m" (arg5))
33#define __asmlinkage_protect6(ret, arg1, arg2, arg3, arg4, arg5, arg6) \
34 __asmlinkage_protect_n(ret, "m" (arg1), "m" (arg2), "m" (arg3), \
35 "m" (arg4), "m" (arg5), "m" (arg6))
36
7#endif 37#endif
diff --git a/arch/m68k/include/asm/mac_via.h b/arch/m68k/include/asm/mac_via.h
index fe3fc9ae1b69..53c632c85b03 100644
--- a/arch/m68k/include/asm/mac_via.h
+++ b/arch/m68k/include/asm/mac_via.h
@@ -261,7 +261,7 @@ extern void via_irq_enable(int);
261extern void via_irq_disable(int); 261extern void via_irq_disable(int);
262extern void via_nubus_irq_startup(int irq); 262extern void via_nubus_irq_startup(int irq);
263extern void via_nubus_irq_shutdown(int irq); 263extern void via_nubus_irq_shutdown(int irq);
264extern void via1_irq(unsigned int irq, struct irq_desc *desc); 264extern void via1_irq(struct irq_desc *desc);
265extern void via1_set_head(int); 265extern void via1_set_head(int);
266extern int via2_scsi_drq_pending(void); 266extern int via2_scsi_drq_pending(void);
267 267
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 244e0dbe45db..0793a7f17417 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -4,7 +4,7 @@
4#include <uapi/asm/unistd.h> 4#include <uapi/asm/unistd.h>
5 5
6 6
7#define NR_syscalls 356 7#define NR_syscalls 375
8 8
9#define __ARCH_WANT_OLD_READDIR 9#define __ARCH_WANT_OLD_READDIR
10#define __ARCH_WANT_OLD_STAT 10#define __ARCH_WANT_OLD_STAT
diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h
index 61fb6cb9d2ae..5e6fae6c275f 100644
--- a/arch/m68k/include/uapi/asm/unistd.h
+++ b/arch/m68k/include/uapi/asm/unistd.h
@@ -361,5 +361,24 @@
361#define __NR_memfd_create 353 361#define __NR_memfd_create 353
362#define __NR_bpf 354 362#define __NR_bpf 354
363#define __NR_execveat 355 363#define __NR_execveat 355
364#define __NR_socket 356
365#define __NR_socketpair 357
366#define __NR_bind 358
367#define __NR_connect 359
368#define __NR_listen 360
369#define __NR_accept4 361
370#define __NR_getsockopt 362
371#define __NR_setsockopt 363
372#define __NR_getsockname 364
373#define __NR_getpeername 365
374#define __NR_sendto 366
375#define __NR_sendmsg 367
376#define __NR_recvfrom 368
377#define __NR_recvmsg 369
378#define __NR_shutdown 370
379#define __NR_recvmmsg 371
380#define __NR_sendmmsg 372
381#define __NR_userfaultfd 373
382#define __NR_membarrier 374
364 383
365#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ 384#endif /* _UAPI_ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index a0ec4303f2c8..5dd0e80042f5 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -376,4 +376,22 @@ ENTRY(sys_call_table)
376 .long sys_memfd_create 376 .long sys_memfd_create
377 .long sys_bpf 377 .long sys_bpf
378 .long sys_execveat /* 355 */ 378 .long sys_execveat /* 355 */
379 379 .long sys_socket
380 .long sys_socketpair
381 .long sys_bind
382 .long sys_connect
383 .long sys_listen /* 360 */
384 .long sys_accept4
385 .long sys_getsockopt
386 .long sys_setsockopt
387 .long sys_getsockname
388 .long sys_getpeername /* 365 */
389 .long sys_sendto
390 .long sys_sendmsg
391 .long sys_recvfrom
392 .long sys_recvmsg
393 .long sys_shutdown /* 370 */
394 .long sys_recvmmsg
395 .long sys_sendmmsg
396 .long sys_userfaultfd
397 .long sys_membarrier
diff --git a/arch/m68k/mac/baboon.c b/arch/m68k/mac/baboon.c
index 3fe0e43d44f6..f6f7d42713ec 100644
--- a/arch/m68k/mac/baboon.c
+++ b/arch/m68k/mac/baboon.c
@@ -45,7 +45,7 @@ void __init baboon_init(void)
45 * Baboon interrupt handler. This works a lot like a VIA. 45 * Baboon interrupt handler. This works a lot like a VIA.
46 */ 46 */
47 47
48static void baboon_irq(unsigned int irq, struct irq_desc *desc) 48static void baboon_irq(struct irq_desc *desc)
49{ 49{
50 int irq_bit, irq_num; 50 int irq_bit, irq_num;
51 unsigned char events; 51 unsigned char events;
diff --git a/arch/m68k/mac/oss.c b/arch/m68k/mac/oss.c
index 191610d97689..55d6592783f5 100644
--- a/arch/m68k/mac/oss.c
+++ b/arch/m68k/mac/oss.c
@@ -63,7 +63,7 @@ void __init oss_nubus_init(void)
63 * Handle miscellaneous OSS interrupts. 63 * Handle miscellaneous OSS interrupts.
64 */ 64 */
65 65
66static void oss_irq(unsigned int __irq, struct irq_desc *desc) 66static void oss_irq(struct irq_desc *desc)
67{ 67{
68 int events = oss->irq_pending & 68 int events = oss->irq_pending &
69 (OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM); 69 (OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM);
@@ -99,7 +99,7 @@ static void oss_irq(unsigned int __irq, struct irq_desc *desc)
99 * Unlike the VIA/RBV this is on its own autovector interrupt level. 99 * Unlike the VIA/RBV this is on its own autovector interrupt level.
100 */ 100 */
101 101
102static void oss_nubus_irq(unsigned int irq, struct irq_desc *desc) 102static void oss_nubus_irq(struct irq_desc *desc)
103{ 103{
104 int events, irq_bit, i; 104 int events, irq_bit, i;
105 105
diff --git a/arch/m68k/mac/psc.c b/arch/m68k/mac/psc.c
index 3b9e302e7a37..cd38f29955c8 100644
--- a/arch/m68k/mac/psc.c
+++ b/arch/m68k/mac/psc.c
@@ -113,7 +113,7 @@ void __init psc_init(void)
113 * PSC interrupt handler. It's a lot like the VIA interrupt handler. 113 * PSC interrupt handler. It's a lot like the VIA interrupt handler.
114 */ 114 */
115 115
116static void psc_irq(unsigned int __irq, struct irq_desc *desc) 116static void psc_irq(struct irq_desc *desc)
117{ 117{
118 unsigned int offset = (unsigned int)irq_desc_get_handler_data(desc); 118 unsigned int offset = (unsigned int)irq_desc_get_handler_data(desc);
119 unsigned int irq = irq_desc_get_irq(desc); 119 unsigned int irq = irq_desc_get_irq(desc);
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
index e198dec868e4..ce56e04386e7 100644
--- a/arch/m68k/mac/via.c
+++ b/arch/m68k/mac/via.c
@@ -446,7 +446,7 @@ void via_nubus_irq_shutdown(int irq)
446 * via6522.c :-), disable/pending masks added. 446 * via6522.c :-), disable/pending masks added.
447 */ 447 */
448 448
449void via1_irq(unsigned int irq, struct irq_desc *desc) 449void via1_irq(struct irq_desc *desc)
450{ 450{
451 int irq_num; 451 int irq_num;
452 unsigned char irq_bit, events; 452 unsigned char irq_bit, events;
@@ -467,7 +467,7 @@ void via1_irq(unsigned int irq, struct irq_desc *desc)
467 } while (events >= irq_bit); 467 } while (events >= irq_bit);
468} 468}
469 469
470static void via2_irq(unsigned int irq, struct irq_desc *desc) 470static void via2_irq(struct irq_desc *desc)
471{ 471{
472 int irq_num; 472 int irq_num;
473 unsigned char irq_bit, events; 473 unsigned char irq_bit, events;
@@ -493,7 +493,7 @@ static void via2_irq(unsigned int irq, struct irq_desc *desc)
493 * VIA2 dispatcher as a fast interrupt handler. 493 * VIA2 dispatcher as a fast interrupt handler.
494 */ 494 */
495 495
496void via_nubus_irq(unsigned int irq, struct irq_desc *desc) 496static void via_nubus_irq(struct irq_desc *desc)
497{ 497{
498 int slot_irq; 498 int slot_irq;
499 unsigned char slot_bit, events; 499 unsigned char slot_bit, events;
diff --git a/arch/metag/include/asm/Kbuild b/arch/metag/include/asm/Kbuild
index df31353fd200..29acb89daaaa 100644
--- a/arch/metag/include/asm/Kbuild
+++ b/arch/metag/include/asm/Kbuild
@@ -54,4 +54,5 @@ generic-y += ucontext.h
54generic-y += unaligned.h 54generic-y += unaligned.h
55generic-y += user.h 55generic-y += user.h
56generic-y += vga.h 56generic-y += vga.h
57generic-y += word-at-a-time.h
57generic-y += xor.h 58generic-y += xor.h
diff --git a/arch/metag/kernel/irq.c b/arch/metag/kernel/irq.c
index a336094a7a6c..3074b64793e6 100644
--- a/arch/metag/kernel/irq.c
+++ b/arch/metag/kernel/irq.c
@@ -94,13 +94,11 @@ void do_IRQ(int irq, struct pt_regs *regs)
94 "MOV D0.5,%0\n" 94 "MOV D0.5,%0\n"
95 "MOV D1Ar1,%1\n" 95 "MOV D1Ar1,%1\n"
96 "MOV D1RtP,%2\n" 96 "MOV D1RtP,%2\n"
97 "MOV D0Ar2,%3\n"
98 "SWAP A0StP,D0.5\n" 97 "SWAP A0StP,D0.5\n"
99 "SWAP PC,D1RtP\n" 98 "SWAP PC,D1RtP\n"
100 "MOV A0StP,D0.5\n" 99 "MOV A0StP,D0.5\n"
101 : 100 :
102 : "r" (isp), "r" (irq), "r" (desc->handle_irq), 101 : "r" (isp), "r" (desc), "r" (desc->handle_irq)
103 "r" (desc)
104 : "memory", "cc", "D1Ar1", "D0Ar2", "D1Ar3", "D0Ar4", 102 : "memory", "cc", "D1Ar1", "D0Ar2", "D1Ar3", "D0Ar4",
105 "D1Ar5", "D0Ar6", "D0Re0", "D1Re0", "D0.4", "D1RtP", 103 "D1Ar5", "D0Ar6", "D0Re0", "D1Re0", "D0.4", "D1RtP",
106 "D0.5" 104 "D0.5"
diff --git a/arch/microblaze/include/asm/Kbuild b/arch/microblaze/include/asm/Kbuild
index 2f222f355c4b..b0ae88c9fed9 100644
--- a/arch/microblaze/include/asm/Kbuild
+++ b/arch/microblaze/include/asm/Kbuild
@@ -10,3 +10,4 @@ generic-y += mm-arch-hooks.h
10generic-y += preempt.h 10generic-y += preempt.h
11generic-y += syscalls.h 11generic-y += syscalls.h
12generic-y += trace_clock.h 12generic-y += trace_clock.h
13generic-y += word-at-a-time.h
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 6b8b75266801..ae838ed5fcf2 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -863,7 +863,14 @@ void pcibios_setup_bus_devices(struct pci_bus *bus)
863 863
864void pcibios_fixup_bus(struct pci_bus *bus) 864void pcibios_fixup_bus(struct pci_bus *bus)
865{ 865{
866 /* Fixup the bus */ 866 /* When called from the generic PCI probe, read PCI<->PCI bridge
867 * bases. This is -not- called when generating the PCI tree from
868 * the OF device-tree.
869 */
870 if (bus->self != NULL)
871 pci_read_bridge_bases(bus);
872
873 /* Now fixup the bus bus */
867 pcibios_setup_bus_self(bus); 874 pcibios_setup_bus_self(bus);
868 875
869 /* Now fixup devices on that bus */ 876 /* Now fixup devices on that bus */
diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c
index 4c496c50edf6..da9f9220048f 100644
--- a/arch/mips/alchemy/common/irq.c
+++ b/arch/mips/alchemy/common/irq.c
@@ -851,7 +851,7 @@ static struct syscore_ops alchemy_gpic_pmops = {
851 851
852/* create chained handlers for the 4 IC requests to the MIPS IRQ ctrl */ 852/* create chained handlers for the 4 IC requests to the MIPS IRQ ctrl */
853#define DISP(name, base, addr) \ 853#define DISP(name, base, addr) \
854static void au1000_##name##_dispatch(unsigned int irq, struct irq_desc *d) \ 854static void au1000_##name##_dispatch(struct irq_desc *d) \
855{ \ 855{ \
856 unsigned long r = __raw_readl((void __iomem *)KSEG1ADDR(addr)); \ 856 unsigned long r = __raw_readl((void __iomem *)KSEG1ADDR(addr)); \
857 if (likely(r)) \ 857 if (likely(r)) \
@@ -865,7 +865,7 @@ DISP(ic0r1, AU1000_INTC0_INT_BASE, AU1000_IC0_PHYS_ADDR + IC_REQ1INT)
865DISP(ic1r0, AU1000_INTC1_INT_BASE, AU1000_IC1_PHYS_ADDR + IC_REQ0INT) 865DISP(ic1r0, AU1000_INTC1_INT_BASE, AU1000_IC1_PHYS_ADDR + IC_REQ0INT)
866DISP(ic1r1, AU1000_INTC1_INT_BASE, AU1000_IC1_PHYS_ADDR + IC_REQ1INT) 866DISP(ic1r1, AU1000_INTC1_INT_BASE, AU1000_IC1_PHYS_ADDR + IC_REQ1INT)
867 867
868static void alchemy_gpic_dispatch(unsigned int irq, struct irq_desc *d) 868static void alchemy_gpic_dispatch(struct irq_desc *d)
869{ 869{
870 int i = __raw_readl(AU1300_GPIC_ADDR + AU1300_GPIC_PRIENC); 870 int i = __raw_readl(AU1300_GPIC_ADDR + AU1300_GPIC_PRIENC);
871 generic_handle_irq(ALCHEMY_GPIC_INT_BASE + i); 871 generic_handle_irq(ALCHEMY_GPIC_INT_BASE + i);
diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c
index 324ad72d7c36..faeddf119fd4 100644
--- a/arch/mips/alchemy/devboards/bcsr.c
+++ b/arch/mips/alchemy/devboards/bcsr.c
@@ -86,7 +86,7 @@ EXPORT_SYMBOL_GPL(bcsr_mod);
86/* 86/*
87 * DB1200/PB1200 CPLD IRQ muxer 87 * DB1200/PB1200 CPLD IRQ muxer
88 */ 88 */
89static void bcsr_csc_handler(unsigned int irq, struct irq_desc *d) 89static void bcsr_csc_handler(struct irq_desc *d)
90{ 90{
91 unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT); 91 unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT);
92 struct irq_chip *chip = irq_desc_get_chip(d); 92 struct irq_chip *chip = irq_desc_get_chip(d);
diff --git a/arch/mips/ath25/ar2315.c b/arch/mips/ath25/ar2315.c
index ec9a371f1e62..8da996142d6a 100644
--- a/arch/mips/ath25/ar2315.c
+++ b/arch/mips/ath25/ar2315.c
@@ -69,7 +69,7 @@ static struct irqaction ar2315_ahb_err_interrupt = {
69 .name = "ar2315-ahb-error", 69 .name = "ar2315-ahb-error",
70}; 70};
71 71
72static void ar2315_misc_irq_handler(unsigned irq, struct irq_desc *desc) 72static void ar2315_misc_irq_handler(struct irq_desc *desc)
73{ 73{
74 u32 pending = ar2315_rst_reg_read(AR2315_ISR) & 74 u32 pending = ar2315_rst_reg_read(AR2315_ISR) &
75 ar2315_rst_reg_read(AR2315_IMR); 75 ar2315_rst_reg_read(AR2315_IMR);
diff --git a/arch/mips/ath25/ar5312.c b/arch/mips/ath25/ar5312.c
index e63e38fa4880..acd55a9cffe3 100644
--- a/arch/mips/ath25/ar5312.c
+++ b/arch/mips/ath25/ar5312.c
@@ -73,7 +73,7 @@ static struct irqaction ar5312_ahb_err_interrupt = {
73 .name = "ar5312-ahb-error", 73 .name = "ar5312-ahb-error",
74}; 74};
75 75
76static void ar5312_misc_irq_handler(unsigned irq, struct irq_desc *desc) 76static void ar5312_misc_irq_handler(struct irq_desc *desc)
77{ 77{
78 u32 pending = ar5312_rst_reg_read(AR5312_ISR) & 78 u32 pending = ar5312_rst_reg_read(AR5312_ISR) &
79 ar5312_rst_reg_read(AR5312_IMR); 79 ar5312_rst_reg_read(AR5312_IMR);
diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c
index 807132b838b2..eeb3953ed8ac 100644
--- a/arch/mips/ath79/irq.c
+++ b/arch/mips/ath79/irq.c
@@ -26,7 +26,7 @@
26#include "common.h" 26#include "common.h"
27#include "machtypes.h" 27#include "machtypes.h"
28 28
29static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) 29static void ath79_misc_irq_handler(struct irq_desc *desc)
30{ 30{
31 void __iomem *base = ath79_reset_base; 31 void __iomem *base = ath79_reset_base;
32 u32 pending; 32 u32 pending;
@@ -119,7 +119,7 @@ static void __init ath79_misc_irq_init(void)
119 irq_set_chained_handler(ATH79_CPU_IRQ(6), ath79_misc_irq_handler); 119 irq_set_chained_handler(ATH79_CPU_IRQ(6), ath79_misc_irq_handler);
120} 120}
121 121
122static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) 122static void ar934x_ip2_irq_dispatch(struct irq_desc *desc)
123{ 123{
124 u32 status; 124 u32 status;
125 125
@@ -148,7 +148,7 @@ static void ar934x_ip2_irq_init(void)
148 irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); 148 irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch);
149} 149}
150 150
151static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) 151static void qca955x_ip2_irq_dispatch(struct irq_desc *desc)
152{ 152{
153 u32 status; 153 u32 status;
154 154
@@ -171,7 +171,7 @@ static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
171 } 171 }
172} 172}
173 173
174static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc) 174static void qca955x_ip3_irq_dispatch(struct irq_desc *desc)
175{ 175{
176 u32 status; 176 u32 status;
177 177
@@ -293,8 +293,26 @@ static int __init ath79_misc_intc_of_init(
293 293
294 return 0; 294 return 0;
295} 295}
296IRQCHIP_DECLARE(ath79_misc_intc, "qca,ar7100-misc-intc", 296
297 ath79_misc_intc_of_init); 297static int __init ar7100_misc_intc_of_init(
298 struct device_node *node, struct device_node *parent)
299{
300 ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
301 return ath79_misc_intc_of_init(node, parent);
302}
303
304IRQCHIP_DECLARE(ar7100_misc_intc, "qca,ar7100-misc-intc",
305 ar7100_misc_intc_of_init);
306
307static int __init ar7240_misc_intc_of_init(
308 struct device_node *node, struct device_node *parent)
309{
310 ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
311 return ath79_misc_intc_of_init(node, parent);
312}
313
314IRQCHIP_DECLARE(ar7240_misc_intc, "qca,ar7240-misc-intc",
315 ar7240_misc_intc_of_init);
298 316
299static int __init ar79_cpu_intc_of_init( 317static int __init ar79_cpu_intc_of_init(
300 struct device_node *node, struct device_node *parent) 318 struct device_node *node, struct device_node *parent)
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index f26c3c661cca..0352bc8d56b3 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -2221,7 +2221,7 @@ static irqreturn_t octeon_irq_cib_handler(int my_irq, void *data)
2221 if (irqd_get_trigger_type(irq_data) & 2221 if (irqd_get_trigger_type(irq_data) &
2222 IRQ_TYPE_EDGE_BOTH) 2222 IRQ_TYPE_EDGE_BOTH)
2223 cvmx_write_csr(host_data->raw_reg, 1ull << i); 2223 cvmx_write_csr(host_data->raw_reg, 1ull << i);
2224 generic_handle_irq_desc(irq, desc); 2224 generic_handle_irq_desc(desc);
2225 } 2225 }
2226 } 2226 }
2227 2227
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 89a628455bc2..bd634259eab9 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -933,7 +933,7 @@ void __init plat_mem_setup(void)
933 while ((boot_mem_map.nr_map < BOOT_MEM_MAP_MAX) 933 while ((boot_mem_map.nr_map < BOOT_MEM_MAP_MAX)
934 && (total < MAX_MEMORY)) { 934 && (total < MAX_MEMORY)) {
935 memory = cvmx_bootmem_phy_alloc(mem_alloc_size, 935 memory = cvmx_bootmem_phy_alloc(mem_alloc_size,
936 __pa_symbol(&__init_end), -1, 936 __pa_symbol(&_end), -1,
937 0x100000, 937 0x100000,
938 CVMX_BOOTMEM_FLAG_NO_LOCKING); 938 CVMX_BOOTMEM_FLAG_NO_LOCKING);
939 if (memory >= 0) { 939 if (memory >= 0) {
diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild
index 40ec4ca3f946..c7fe4d01e79c 100644
--- a/arch/mips/include/asm/Kbuild
+++ b/arch/mips/include/asm/Kbuild
@@ -17,4 +17,5 @@ generic-y += segment.h
17generic-y += serial.h 17generic-y += serial.h
18generic-y += trace_clock.h 18generic-y += trace_clock.h
19generic-y += user.h 19generic-y += user.h
20generic-y += word-at-a-time.h
20generic-y += xor.h 21generic-y += xor.h
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 9801ac982655..fe67f12ac239 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -20,6 +20,9 @@
20#ifndef cpu_has_tlb 20#ifndef cpu_has_tlb
21#define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB) 21#define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB)
22#endif 22#endif
23#ifndef cpu_has_ftlb
24#define cpu_has_ftlb (cpu_data[0].options & MIPS_CPU_FTLB)
25#endif
23#ifndef cpu_has_tlbinv 26#ifndef cpu_has_tlbinv
24#define cpu_has_tlbinv (cpu_data[0].options & MIPS_CPU_TLBINV) 27#define cpu_has_tlbinv (cpu_data[0].options & MIPS_CPU_TLBINV)
25#endif 28#endif
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index cd89e9855775..82ad15f11049 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -385,6 +385,7 @@ enum cpu_type_enum {
385#define MIPS_CPU_CDMM 0x4000000000ull /* CPU has Common Device Memory Map */ 385#define MIPS_CPU_CDMM 0x4000000000ull /* CPU has Common Device Memory Map */
386#define MIPS_CPU_BP_GHIST 0x8000000000ull /* R12K+ Branch Prediction Global History */ 386#define MIPS_CPU_BP_GHIST 0x8000000000ull /* R12K+ Branch Prediction Global History */
387#define MIPS_CPU_SP 0x10000000000ull /* Small (1KB) page support */ 387#define MIPS_CPU_SP 0x10000000000ull /* Small (1KB) page support */
388#define MIPS_CPU_FTLB 0x20000000000ull /* CPU has Fixed-page-size TLB */
388 389
389/* 390/*
390 * CPU ASE encodings 391 * CPU ASE encodings
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h
index e8c8d9d0c45f..5a1a882e0a75 100644
--- a/arch/mips/include/asm/kvm_host.h
+++ b/arch/mips/include/asm/kvm_host.h
@@ -61,6 +61,7 @@
61#define KVM_PRIVATE_MEM_SLOTS 0 61#define KVM_PRIVATE_MEM_SLOTS 0
62 62
63#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 63#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
64#define KVM_HALT_POLL_NS_DEFAULT 500000
64 65
65 66
66 67
@@ -128,6 +129,7 @@ struct kvm_vcpu_stat {
128 u32 msa_disabled_exits; 129 u32 msa_disabled_exits;
129 u32 flush_dcache_exits; 130 u32 flush_dcache_exits;
130 u32 halt_successful_poll; 131 u32 halt_successful_poll;
132 u32 halt_attempted_poll;
131 u32 halt_wakeup; 133 u32 halt_wakeup;
132}; 134};
133 135
diff --git a/arch/mips/include/asm/maar.h b/arch/mips/include/asm/maar.h
index b02891f9caaf..21d9607c80d7 100644
--- a/arch/mips/include/asm/maar.h
+++ b/arch/mips/include/asm/maar.h
@@ -66,6 +66,15 @@ static inline void write_maar_pair(unsigned idx, phys_addr_t lower,
66} 66}
67 67
68/** 68/**
69 * maar_init() - initialise MAARs
70 *
71 * Performs initialisation of MAARs for the current CPU, making use of the
72 * platforms implementation of platform_maar_init where necessary and
73 * duplicating the setup it provides on secondary CPUs.
74 */
75extern void maar_init(void);
76
77/**
69 * struct maar_config - MAAR configuration data 78 * struct maar_config - MAAR configuration data
70 * @lower: The lowest address that the MAAR pair will affect. Must be 79 * @lower: The lowest address that the MAAR pair will affect. Must be
71 * aligned to a 2^16 byte boundary. 80 * aligned to a 2^16 byte boundary.
diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
index d75b75e78ebb..1f1927ab4269 100644
--- a/arch/mips/include/asm/mips-cm.h
+++ b/arch/mips/include/asm/mips-cm.h
@@ -194,6 +194,7 @@ BUILD_CM_RW(reg3_mask, MIPS_CM_GCB_OFS + 0xc8)
194BUILD_CM_R_(gic_status, MIPS_CM_GCB_OFS + 0xd0) 194BUILD_CM_R_(gic_status, MIPS_CM_GCB_OFS + 0xd0)
195BUILD_CM_R_(cpc_status, MIPS_CM_GCB_OFS + 0xf0) 195BUILD_CM_R_(cpc_status, MIPS_CM_GCB_OFS + 0xf0)
196BUILD_CM_RW(l2_config, MIPS_CM_GCB_OFS + 0x130) 196BUILD_CM_RW(l2_config, MIPS_CM_GCB_OFS + 0x130)
197BUILD_CM_RW(sys_config2, MIPS_CM_GCB_OFS + 0x150)
197 198
198/* Core Local & Core Other register accessor functions */ 199/* Core Local & Core Other register accessor functions */
199BUILD_CM_Cx_RW(reset_release, 0x00) 200BUILD_CM_Cx_RW(reset_release, 0x00)
@@ -316,6 +317,10 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80)
316#define CM_GCR_L2_CONFIG_ASSOC_SHF 0 317#define CM_GCR_L2_CONFIG_ASSOC_SHF 0
317#define CM_GCR_L2_CONFIG_ASSOC_MSK (_ULCAST_(0xff) << 0) 318#define CM_GCR_L2_CONFIG_ASSOC_MSK (_ULCAST_(0xff) << 0)
318 319
320/* GCR_SYS_CONFIG2 register fields */
321#define CM_GCR_SYS_CONFIG2_MAXVPW_SHF 0
322#define CM_GCR_SYS_CONFIG2_MAXVPW_MSK (_ULCAST_(0xf) << 0)
323
319/* GCR_Cx_COHERENCE register fields */ 324/* GCR_Cx_COHERENCE register fields */
320#define CM_GCR_Cx_COHERENCE_COHDOMAINEN_SHF 0 325#define CM_GCR_Cx_COHERENCE_COHDOMAINEN_SHF 0
321#define CM_GCR_Cx_COHERENCE_COHDOMAINEN_MSK (_ULCAST_(0xff) << 0) 326#define CM_GCR_Cx_COHERENCE_COHDOMAINEN_MSK (_ULCAST_(0xff) << 0)
@@ -405,4 +410,38 @@ static inline int mips_cm_revision(void)
405 return read_gcr_rev(); 410 return read_gcr_rev();
406} 411}
407 412
413/**
414 * mips_cm_max_vp_width() - return the width in bits of VP indices
415 *
416 * Return: the width, in bits, of VP indices in fields that combine core & VP
417 * indices.
418 */
419static inline unsigned int mips_cm_max_vp_width(void)
420{
421 extern int smp_num_siblings;
422
423 if (mips_cm_revision() >= CM_REV_CM3)
424 return read_gcr_sys_config2() & CM_GCR_SYS_CONFIG2_MAXVPW_MSK;
425
426 return smp_num_siblings;
427}
428
429/**
430 * mips_cm_vp_id() - calculate the hardware VP ID for a CPU
431 * @cpu: the CPU whose VP ID to calculate
432 *
433 * Hardware such as the GIC uses identifiers for VPs which may not match the
434 * CPU numbers used by Linux. This function calculates the hardware VP
435 * identifier corresponding to a given CPU.
436 *
437 * Return: the VP ID for the CPU.
438 */
439static inline unsigned int mips_cm_vp_id(unsigned int cpu)
440{
441 unsigned int core = cpu_data[cpu].core;
442 unsigned int vp = cpu_vpe_id(&cpu_data[cpu]);
443
444 return (core * mips_cm_max_vp_width()) + vp;
445}
446
408#endif /* __MIPS_ASM_MIPS_CM_H__ */ 447#endif /* __MIPS_ASM_MIPS_CM_H__ */
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index d3cd8eac81e3..c64781cf649f 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -487,6 +487,8 @@
487 487
488/* Bits specific to the MIPS32/64 PRA. */ 488/* Bits specific to the MIPS32/64 PRA. */
489#define MIPS_CONF_MT (_ULCAST_(7) << 7) 489#define MIPS_CONF_MT (_ULCAST_(7) << 7)
490#define MIPS_CONF_MT_TLB (_ULCAST_(1) << 7)
491#define MIPS_CONF_MT_FTLB (_ULCAST_(4) << 7)
490#define MIPS_CONF_AR (_ULCAST_(7) << 10) 492#define MIPS_CONF_AR (_ULCAST_(7) << 10)
491#define MIPS_CONF_AT (_ULCAST_(3) << 13) 493#define MIPS_CONF_AT (_ULCAST_(3) << 13)
492#define MIPS_CONF_M (_ULCAST_(1) << 31) 494#define MIPS_CONF_M (_ULCAST_(1) << 31)
diff --git a/arch/mips/include/asm/netlogic/common.h b/arch/mips/include/asm/netlogic/common.h
index 2a4c128277e4..be52c2125d71 100644
--- a/arch/mips/include/asm/netlogic/common.h
+++ b/arch/mips/include/asm/netlogic/common.h
@@ -57,8 +57,8 @@
57#include <asm/mach-netlogic/multi-node.h> 57#include <asm/mach-netlogic/multi-node.h>
58 58
59struct irq_desc; 59struct irq_desc;
60void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc); 60void nlm_smp_function_ipi_handler(struct irq_desc *desc);
61void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc); 61void nlm_smp_resched_ipi_handler(struct irq_desc *desc);
62void nlm_smp_irq_init(int hwcpuid); 62void nlm_smp_irq_init(int hwcpuid);
63void nlm_boot_secondary_cpus(void); 63void nlm_boot_secondary_cpus(void);
64int nlm_wakeup_secondary_cpus(void); 64int nlm_wakeup_secondary_cpus(void);
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index c03088f9f514..cfabadb135d9 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -377,16 +377,18 @@
377#define __NR_memfd_create (__NR_Linux + 354) 377#define __NR_memfd_create (__NR_Linux + 354)
378#define __NR_bpf (__NR_Linux + 355) 378#define __NR_bpf (__NR_Linux + 355)
379#define __NR_execveat (__NR_Linux + 356) 379#define __NR_execveat (__NR_Linux + 356)
380#define __NR_userfaultfd (__NR_Linux + 357)
381#define __NR_membarrier (__NR_Linux + 358)
380 382
381/* 383/*
382 * Offset of the last Linux o32 flavoured syscall 384 * Offset of the last Linux o32 flavoured syscall
383 */ 385 */
384#define __NR_Linux_syscalls 356 386#define __NR_Linux_syscalls 358
385 387
386#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 388#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
387 389
388#define __NR_O32_Linux 4000 390#define __NR_O32_Linux 4000
389#define __NR_O32_Linux_syscalls 356 391#define __NR_O32_Linux_syscalls 358
390 392
391#if _MIPS_SIM == _MIPS_SIM_ABI64 393#if _MIPS_SIM == _MIPS_SIM_ABI64
392 394
@@ -711,16 +713,18 @@
711#define __NR_memfd_create (__NR_Linux + 314) 713#define __NR_memfd_create (__NR_Linux + 314)
712#define __NR_bpf (__NR_Linux + 315) 714#define __NR_bpf (__NR_Linux + 315)
713#define __NR_execveat (__NR_Linux + 316) 715#define __NR_execveat (__NR_Linux + 316)
716#define __NR_userfaultfd (__NR_Linux + 317)
717#define __NR_membarrier (__NR_Linux + 318)
714 718
715/* 719/*
716 * Offset of the last Linux 64-bit flavoured syscall 720 * Offset of the last Linux 64-bit flavoured syscall
717 */ 721 */
718#define __NR_Linux_syscalls 316 722#define __NR_Linux_syscalls 318
719 723
720#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 724#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
721 725
722#define __NR_64_Linux 5000 726#define __NR_64_Linux 5000
723#define __NR_64_Linux_syscalls 316 727#define __NR_64_Linux_syscalls 318
724 728
725#if _MIPS_SIM == _MIPS_SIM_NABI32 729#if _MIPS_SIM == _MIPS_SIM_NABI32
726 730
@@ -1049,15 +1053,17 @@
1049#define __NR_memfd_create (__NR_Linux + 318) 1053#define __NR_memfd_create (__NR_Linux + 318)
1050#define __NR_bpf (__NR_Linux + 319) 1054#define __NR_bpf (__NR_Linux + 319)
1051#define __NR_execveat (__NR_Linux + 320) 1055#define __NR_execveat (__NR_Linux + 320)
1056#define __NR_userfaultfd (__NR_Linux + 321)
1057#define __NR_membarrier (__NR_Linux + 322)
1052 1058
1053/* 1059/*
1054 * Offset of the last N32 flavoured syscall 1060 * Offset of the last N32 flavoured syscall
1055 */ 1061 */
1056#define __NR_Linux_syscalls 320 1062#define __NR_Linux_syscalls 322
1057 1063
1058#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1064#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1059 1065
1060#define __NR_N32_Linux 6000 1066#define __NR_N32_Linux 6000
1061#define __NR_N32_Linux_syscalls 320 1067#define __NR_N32_Linux_syscalls 322
1062 1068
1063#endif /* _UAPI_ASM_UNISTD_H */ 1069#endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index 4e62bf85d0b0..459cb017306c 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -26,6 +26,7 @@
26#include <linux/power/jz4740-battery.h> 26#include <linux/power/jz4740-battery.h>
27#include <linux/power/gpio-charger.h> 27#include <linux/power/gpio-charger.h>
28 28
29#include <asm/mach-jz4740/gpio.h>
29#include <asm/mach-jz4740/jz4740_fb.h> 30#include <asm/mach-jz4740/jz4740_fb.h>
30#include <asm/mach-jz4740/jz4740_mmc.h> 31#include <asm/mach-jz4740/jz4740_mmc.h>
31#include <asm/mach-jz4740/jz4740_nand.h> 32#include <asm/mach-jz4740/jz4740_nand.h>
diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c
index 6cd69fdaa1c5..8c6d76c9b2d6 100644
--- a/arch/mips/jz4740/gpio.c
+++ b/arch/mips/jz4740/gpio.c
@@ -28,6 +28,7 @@
28#include <linux/seq_file.h> 28#include <linux/seq_file.h>
29 29
30#include <asm/mach-jz4740/base.h> 30#include <asm/mach-jz4740/base.h>
31#include <asm/mach-jz4740/gpio.h>
31 32
32#define JZ4740_GPIO_BASE_A (32*0) 33#define JZ4740_GPIO_BASE_A (32*0)
33#define JZ4740_GPIO_BASE_B (32*1) 34#define JZ4740_GPIO_BASE_B (32*1)
@@ -291,7 +292,7 @@ static void jz_gpio_check_trigger_both(struct jz_gpio_chip *chip, unsigned int i
291 writel(mask, reg); 292 writel(mask, reg);
292} 293}
293 294
294static void jz_gpio_irq_demux_handler(unsigned int irq, struct irq_desc *desc) 295static void jz_gpio_irq_demux_handler(struct irq_desc *desc)
295{ 296{
296 uint32_t flag; 297 uint32_t flag;
297 unsigned int gpio_irq; 298 unsigned int gpio_irq;
diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
index 9f71c06aebf6..209ded16806b 100644
--- a/arch/mips/kernel/cps-vec.S
+++ b/arch/mips/kernel/cps-vec.S
@@ -39,6 +39,7 @@
39 mfc0 \dest, CP0_CONFIG, 3 39 mfc0 \dest, CP0_CONFIG, 3
40 andi \dest, \dest, MIPS_CONF3_MT 40 andi \dest, \dest, MIPS_CONF3_MT
41 beqz \dest, \nomt 41 beqz \dest, \nomt
42 nop
42 .endm 43 .endm
43 44
44.section .text.cps-vec 45.section .text.cps-vec
@@ -223,10 +224,9 @@ LEAF(excep_ejtag)
223 END(excep_ejtag) 224 END(excep_ejtag)
224 225
225LEAF(mips_cps_core_init) 226LEAF(mips_cps_core_init)
226#ifdef CONFIG_MIPS_MT 227#ifdef CONFIG_MIPS_MT_SMP
227 /* Check that the core implements the MT ASE */ 228 /* Check that the core implements the MT ASE */
228 has_mt t0, 3f 229 has_mt t0, 3f
229 nop
230 230
231 .set push 231 .set push
232 .set mips64r2 232 .set mips64r2
@@ -310,8 +310,9 @@ LEAF(mips_cps_boot_vpes)
310 PTR_ADDU t0, t0, t1 310 PTR_ADDU t0, t0, t1
311 311
312 /* Calculate this VPEs ID. If the core doesn't support MT use 0 */ 312 /* Calculate this VPEs ID. If the core doesn't support MT use 0 */
313 li t9, 0
314#ifdef CONFIG_MIPS_MT_SMP
313 has_mt ta2, 1f 315 has_mt ta2, 1f
314 li t9, 0
315 316
316 /* Find the number of VPEs present in the core */ 317 /* Find the number of VPEs present in the core */
317 mfc0 t1, CP0_MVPCONF0 318 mfc0 t1, CP0_MVPCONF0
@@ -330,6 +331,7 @@ LEAF(mips_cps_boot_vpes)
330 /* Retrieve the VPE ID from EBase.CPUNum */ 331 /* Retrieve the VPE ID from EBase.CPUNum */
331 mfc0 t9, $15, 1 332 mfc0 t9, $15, 1
332 and t9, t9, t1 333 and t9, t9, t1
334#endif
333 335
3341: /* Calculate a pointer to this VPEs struct vpe_boot_config */ 3361: /* Calculate a pointer to this VPEs struct vpe_boot_config */
335 li t1, VPEBOOTCFG_SIZE 337 li t1, VPEBOOTCFG_SIZE
@@ -337,7 +339,7 @@ LEAF(mips_cps_boot_vpes)
337 PTR_L ta3, COREBOOTCFG_VPECONFIG(t0) 339 PTR_L ta3, COREBOOTCFG_VPECONFIG(t0)
338 PTR_ADDU v0, v0, ta3 340 PTR_ADDU v0, v0, ta3
339 341
340#ifdef CONFIG_MIPS_MT 342#ifdef CONFIG_MIPS_MT_SMP
341 343
342 /* If the core doesn't support MT then return */ 344 /* If the core doesn't support MT then return */
343 bnez ta2, 1f 345 bnez ta2, 1f
@@ -451,7 +453,7 @@ LEAF(mips_cps_boot_vpes)
451 453
4522: .set pop 4542: .set pop
453 455
454#endif /* CONFIG_MIPS_MT */ 456#endif /* CONFIG_MIPS_MT_SMP */
455 457
456 /* Return */ 458 /* Return */
457 jr ra 459 jr ra
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 571a8e6ea5bd..09a51d091941 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -410,16 +410,18 @@ static int set_ftlb_enable(struct cpuinfo_mips *c, int enable)
410static inline unsigned int decode_config0(struct cpuinfo_mips *c) 410static inline unsigned int decode_config0(struct cpuinfo_mips *c)
411{ 411{
412 unsigned int config0; 412 unsigned int config0;
413 int isa; 413 int isa, mt;
414 414
415 config0 = read_c0_config(); 415 config0 = read_c0_config();
416 416
417 /* 417 /*
418 * Look for Standard TLB or Dual VTLB and FTLB 418 * Look for Standard TLB or Dual VTLB and FTLB
419 */ 419 */
420 if ((((config0 & MIPS_CONF_MT) >> 7) == 1) || 420 mt = config0 & MIPS_CONF_MT;
421 (((config0 & MIPS_CONF_MT) >> 7) == 4)) 421 if (mt == MIPS_CONF_MT_TLB)
422 c->options |= MIPS_CPU_TLB; 422 c->options |= MIPS_CPU_TLB;
423 else if (mt == MIPS_CONF_MT_FTLB)
424 c->options |= MIPS_CPU_TLB | MIPS_CPU_FTLB;
423 425
424 isa = (config0 & MIPS_CONF_AT) >> 13; 426 isa = (config0 & MIPS_CONF_AT) >> 13;
425 switch (isa) { 427 switch (isa) {
@@ -559,15 +561,18 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c)
559 if (cpu_has_tlb) { 561 if (cpu_has_tlb) {
560 if (((config4 & MIPS_CONF4_IE) >> 29) == 2) 562 if (((config4 & MIPS_CONF4_IE) >> 29) == 2)
561 c->options |= MIPS_CPU_TLBINV; 563 c->options |= MIPS_CPU_TLBINV;
564
562 /* 565 /*
563 * This is a bit ugly. R6 has dropped that field from 566 * R6 has dropped the MMUExtDef field from config4.
564 * config4 and the only valid configuration is VTLB+FTLB so 567 * On R6 the fields always describe the FTLB, and only if it is
565 * set a good value for mmuextdef for that case. 568 * present according to Config.MT.
566 */ 569 */
567 if (cpu_has_mips_r6) 570 if (!cpu_has_mips_r6)
571 mmuextdef = config4 & MIPS_CONF4_MMUEXTDEF;
572 else if (cpu_has_ftlb)
568 mmuextdef = MIPS_CONF4_MMUEXTDEF_VTLBSIZEEXT; 573 mmuextdef = MIPS_CONF4_MMUEXTDEF_VTLBSIZEEXT;
569 else 574 else
570 mmuextdef = config4 & MIPS_CONF4_MMUEXTDEF; 575 mmuextdef = 0;
571 576
572 switch (mmuextdef) { 577 switch (mmuextdef) {
573 case MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT: 578 case MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT:
diff --git a/arch/mips/kernel/octeon_switch.S b/arch/mips/kernel/octeon_switch.S
index 423ae83af1fb..3375745b9198 100644
--- a/arch/mips/kernel/octeon_switch.S
+++ b/arch/mips/kernel/octeon_switch.S
@@ -18,7 +18,7 @@
18 .set pop 18 .set pop
19/* 19/*
20 * task_struct *resume(task_struct *prev, task_struct *next, 20 * task_struct *resume(task_struct *prev, task_struct *next,
21 * struct thread_info *next_ti, int usedfpu) 21 * struct thread_info *next_ti)
22 */ 22 */
23 .align 7 23 .align 7
24 LEAF(resume) 24 LEAF(resume)
@@ -28,30 +28,6 @@
28 cpu_save_nonscratch a0 28 cpu_save_nonscratch a0
29 LONG_S ra, THREAD_REG31(a0) 29 LONG_S ra, THREAD_REG31(a0)
30 30
31 /*
32 * check if we need to save FPU registers
33 */
34 .set push
35 .set noreorder
36 beqz a3, 1f
37 PTR_L t3, TASK_THREAD_INFO(a0)
38 .set pop
39
40 /*
41 * clear saved user stack CU1 bit
42 */
43 LONG_L t0, ST_OFF(t3)
44 li t1, ~ST0_CU1
45 and t0, t0, t1
46 LONG_S t0, ST_OFF(t3)
47
48 .set push
49 .set arch=mips64r2
50 fpu_save_double a0 t0 t1 # c0_status passed in t0
51 # clobbers t1
52 .set pop
531:
54
55#if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0 31#if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
56 /* Check if we need to store CVMSEG state */ 32 /* Check if we need to store CVMSEG state */
57 dmfc0 t0, $11,7 /* CvmMemCtl */ 33 dmfc0 t0, $11,7 /* CvmMemCtl */
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 5087a4b72e6b..ac27ef7d4d0e 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -31,18 +31,8 @@
31#define ST_OFF (_THREAD_SIZE - 32 - PT_SIZE + PT_STATUS) 31#define ST_OFF (_THREAD_SIZE - 32 - PT_SIZE + PT_STATUS)
32 32
33/* 33/*
34 * FPU context is saved iff the process has used it's FPU in the current
35 * time slice as indicated by TIF_USEDFPU. In any case, the CU1 bit for user
36 * space STATUS register should be 0, so that a process *always* starts its
37 * userland with FPU disabled after each context switch.
38 *
39 * FPU will be enabled as soon as the process accesses FPU again, through
40 * do_cpu() trap.
41 */
42
43/*
44 * task_struct *resume(task_struct *prev, task_struct *next, 34 * task_struct *resume(task_struct *prev, task_struct *next,
45 * struct thread_info *next_ti, int usedfpu) 35 * struct thread_info *next_ti)
46 */ 36 */
47LEAF(resume) 37LEAF(resume)
48 mfc0 t1, CP0_STATUS 38 mfc0 t1, CP0_STATUS
@@ -50,22 +40,6 @@ LEAF(resume)
50 cpu_save_nonscratch a0 40 cpu_save_nonscratch a0
51 sw ra, THREAD_REG31(a0) 41 sw ra, THREAD_REG31(a0)
52 42
53 beqz a3, 1f
54
55 PTR_L t3, TASK_THREAD_INFO(a0)
56
57 /*
58 * clear saved user stack CU1 bit
59 */
60 lw t0, ST_OFF(t3)
61 li t1, ~ST0_CU1
62 and t0, t0, t1
63 sw t0, ST_OFF(t3)
64
65 fpu_save_single a0, t0 # clobbers t0
66
671:
68
69#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP) 43#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
70 PTR_LA t8, __stack_chk_guard 44 PTR_LA t8, __stack_chk_guard
71 LONG_L t9, TASK_STACK_CANARY(a1) 45 LONG_L t9, TASK_STACK_CANARY(a1)
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 4cc13508d967..65a74e4f0f45 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -36,16 +36,8 @@ NESTED(handle_sys, PT_SIZE, sp)
36 lw t1, PT_EPC(sp) # skip syscall on return 36 lw t1, PT_EPC(sp) # skip syscall on return
37 37
38 subu v0, v0, __NR_O32_Linux # check syscall number 38 subu v0, v0, __NR_O32_Linux # check syscall number
39 sltiu t0, v0, __NR_O32_Linux_syscalls + 1
40 addiu t1, 4 # skip to next instruction 39 addiu t1, 4 # skip to next instruction
41 sw t1, PT_EPC(sp) 40 sw t1, PT_EPC(sp)
42 beqz t0, illegal_syscall
43
44 sll t0, v0, 2
45 la t1, sys_call_table
46 addu t1, t0
47 lw t2, (t1) # syscall routine
48 beqz t2, illegal_syscall
49 41
50 sw a3, PT_R26(sp) # save a3 for syscall restarting 42 sw a3, PT_R26(sp) # save a3 for syscall restarting
51 43
@@ -96,6 +88,16 @@ loads_done:
96 li t1, _TIF_WORK_SYSCALL_ENTRY 88 li t1, _TIF_WORK_SYSCALL_ENTRY
97 and t0, t1 89 and t0, t1
98 bnez t0, syscall_trace_entry # -> yes 90 bnez t0, syscall_trace_entry # -> yes
91syscall_common:
92 sltiu t0, v0, __NR_O32_Linux_syscalls + 1
93 beqz t0, illegal_syscall
94
95 sll t0, v0, 2
96 la t1, sys_call_table
97 addu t1, t0
98 lw t2, (t1) # syscall routine
99
100 beqz t2, illegal_syscall
99 101
100 jalr t2 # Do The Real Thing (TM) 102 jalr t2 # Do The Real Thing (TM)
101 103
@@ -116,7 +118,7 @@ o32_syscall_exit:
116 118
117syscall_trace_entry: 119syscall_trace_entry:
118 SAVE_STATIC 120 SAVE_STATIC
119 move s0, t2 121 move s0, v0
120 move a0, sp 122 move a0, sp
121 123
122 /* 124 /*
@@ -129,27 +131,18 @@ syscall_trace_entry:
129 131
1301: jal syscall_trace_enter 1321: jal syscall_trace_enter
131 133
132 bltz v0, 2f # seccomp failed? Skip syscall 134 bltz v0, 1f # seccomp failed? Skip syscall
135
136 move v0, s0 # restore syscall
133 137
134 move t0, s0
135 RESTORE_STATIC 138 RESTORE_STATIC
136 lw a0, PT_R4(sp) # Restore argument registers 139 lw a0, PT_R4(sp) # Restore argument registers
137 lw a1, PT_R5(sp) 140 lw a1, PT_R5(sp)
138 lw a2, PT_R6(sp) 141 lw a2, PT_R6(sp)
139 lw a3, PT_R7(sp) 142 lw a3, PT_R7(sp)
140 jalr t0 143 j syscall_common
141
142 li t0, -EMAXERRNO - 1 # error?
143 sltu t0, t0, v0
144 sw t0, PT_R7(sp) # set error flag
145 beqz t0, 1f
146
147 lw t1, PT_R2(sp) # syscall number
148 negu v0 # error
149 sw t1, PT_R0(sp) # save it for syscall restarting
1501: sw v0, PT_R2(sp) # result
151 144
1522: j syscall_exit 1451: j syscall_exit
153 146
154/* ------------------------------------------------------------------------ */ 147/* ------------------------------------------------------------------------ */
155 148
@@ -599,3 +592,5 @@ EXPORT(sys_call_table)
599 PTR sys_memfd_create 592 PTR sys_memfd_create
600 PTR sys_bpf /* 4355 */ 593 PTR sys_bpf /* 4355 */
601 PTR sys_execveat 594 PTR sys_execveat
595 PTR sys_userfaultfd
596 PTR sys_membarrier
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index a6f6b762c47a..e732981cf99f 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -39,18 +39,11 @@ NESTED(handle_sys64, PT_SIZE, sp)
39 .set at 39 .set at
40#endif 40#endif
41 41
42 dsubu t0, v0, __NR_64_Linux # check syscall number
43 sltiu t0, t0, __NR_64_Linux_syscalls + 1
44#if !defined(CONFIG_MIPS32_O32) && !defined(CONFIG_MIPS32_N32) 42#if !defined(CONFIG_MIPS32_O32) && !defined(CONFIG_MIPS32_N32)
45 ld t1, PT_EPC(sp) # skip syscall on return 43 ld t1, PT_EPC(sp) # skip syscall on return
46 daddiu t1, 4 # skip to next instruction 44 daddiu t1, 4 # skip to next instruction
47 sd t1, PT_EPC(sp) 45 sd t1, PT_EPC(sp)
48#endif 46#endif
49 beqz t0, illegal_syscall
50
51 dsll t0, v0, 3 # offset into table
52 ld t2, (sys_call_table - (__NR_64_Linux * 8))(t0)
53 # syscall routine
54 47
55 sd a3, PT_R26(sp) # save a3 for syscall restarting 48 sd a3, PT_R26(sp) # save a3 for syscall restarting
56 49
@@ -59,6 +52,17 @@ NESTED(handle_sys64, PT_SIZE, sp)
59 and t0, t1, t0 52 and t0, t1, t0
60 bnez t0, syscall_trace_entry 53 bnez t0, syscall_trace_entry
61 54
55syscall_common:
56 dsubu t2, v0, __NR_64_Linux
57 sltiu t0, t2, __NR_64_Linux_syscalls + 1
58 beqz t0, illegal_syscall
59
60 dsll t0, t2, 3 # offset into table
61 dla t2, sys_call_table
62 daddu t0, t2, t0
63 ld t2, (t0) # syscall routine
64 beqz t2, illegal_syscall
65
62 jalr t2 # Do The Real Thing (TM) 66 jalr t2 # Do The Real Thing (TM)
63 67
64 li t0, -EMAXERRNO - 1 # error? 68 li t0, -EMAXERRNO - 1 # error?
@@ -78,14 +82,14 @@ n64_syscall_exit:
78 82
79syscall_trace_entry: 83syscall_trace_entry:
80 SAVE_STATIC 84 SAVE_STATIC
81 move s0, t2 85 move s0, v0
82 move a0, sp 86 move a0, sp
83 move a1, v0 87 move a1, v0
84 jal syscall_trace_enter 88 jal syscall_trace_enter
85 89
86 bltz v0, 2f # seccomp failed? Skip syscall 90 bltz v0, 1f # seccomp failed? Skip syscall
87 91
88 move t0, s0 92 move v0, s0
89 RESTORE_STATIC 93 RESTORE_STATIC
90 ld a0, PT_R4(sp) # Restore argument registers 94 ld a0, PT_R4(sp) # Restore argument registers
91 ld a1, PT_R5(sp) 95 ld a1, PT_R5(sp)
@@ -93,19 +97,9 @@ syscall_trace_entry:
93 ld a3, PT_R7(sp) 97 ld a3, PT_R7(sp)
94 ld a4, PT_R8(sp) 98 ld a4, PT_R8(sp)
95 ld a5, PT_R9(sp) 99 ld a5, PT_R9(sp)
96 jalr t0 100 j syscall_common
97
98 li t0, -EMAXERRNO - 1 # error?
99 sltu t0, t0, v0
100 sd t0, PT_R7(sp) # set error flag
101 beqz t0, 1f
102
103 ld t1, PT_R2(sp) # syscall number
104 dnegu v0 # error
105 sd t1, PT_R0(sp) # save it for syscall restarting
1061: sd v0, PT_R2(sp) # result
107 101
1082: j syscall_exit 1021: j syscall_exit
109 103
110illegal_syscall: 104illegal_syscall:
111 /* This also isn't a 64-bit syscall, throw an error. */ 105 /* This also isn't a 64-bit syscall, throw an error. */
@@ -436,4 +430,6 @@ EXPORT(sys_call_table)
436 PTR sys_memfd_create 430 PTR sys_memfd_create
437 PTR sys_bpf /* 5315 */ 431 PTR sys_bpf /* 5315 */
438 PTR sys_execveat 432 PTR sys_execveat
433 PTR sys_userfaultfd
434 PTR sys_membarrier
439 .size sys_call_table,.-sys_call_table 435 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 4b2010654c46..c79484397584 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -52,6 +52,7 @@ NESTED(handle_sysn32, PT_SIZE, sp)
52 and t0, t1, t0 52 and t0, t1, t0
53 bnez t0, n32_syscall_trace_entry 53 bnez t0, n32_syscall_trace_entry
54 54
55syscall_common:
55 jalr t2 # Do The Real Thing (TM) 56 jalr t2 # Do The Real Thing (TM)
56 57
57 li t0, -EMAXERRNO - 1 # error? 58 li t0, -EMAXERRNO - 1 # error?
@@ -75,9 +76,9 @@ n32_syscall_trace_entry:
75 move a1, v0 76 move a1, v0
76 jal syscall_trace_enter 77 jal syscall_trace_enter
77 78
78 bltz v0, 2f # seccomp failed? Skip syscall 79 bltz v0, 1f # seccomp failed? Skip syscall
79 80
80 move t0, s0 81 move t2, s0
81 RESTORE_STATIC 82 RESTORE_STATIC
82 ld a0, PT_R4(sp) # Restore argument registers 83 ld a0, PT_R4(sp) # Restore argument registers
83 ld a1, PT_R5(sp) 84 ld a1, PT_R5(sp)
@@ -85,19 +86,9 @@ n32_syscall_trace_entry:
85 ld a3, PT_R7(sp) 86 ld a3, PT_R7(sp)
86 ld a4, PT_R8(sp) 87 ld a4, PT_R8(sp)
87 ld a5, PT_R9(sp) 88 ld a5, PT_R9(sp)
88 jalr t0 89 j syscall_common
89 90
90 li t0, -EMAXERRNO - 1 # error? 911: j syscall_exit
91 sltu t0, t0, v0
92 sd t0, PT_R7(sp) # set error flag
93 beqz t0, 1f
94
95 ld t1, PT_R2(sp) # syscall number
96 dnegu v0 # error
97 sd t1, PT_R0(sp) # save it for syscall restarting
981: sd v0, PT_R2(sp) # result
99
1002: j syscall_exit
101 92
102not_n32_scall: 93not_n32_scall:
103 /* This is not an n32 compatibility syscall, pass it on to 94 /* This is not an n32 compatibility syscall, pass it on to
@@ -429,4 +420,6 @@ EXPORT(sysn32_call_table)
429 PTR sys_memfd_create 420 PTR sys_memfd_create
430 PTR sys_bpf 421 PTR sys_bpf
431 PTR compat_sys_execveat /* 6320 */ 422 PTR compat_sys_execveat /* 6320 */
423 PTR sys_userfaultfd
424 PTR sys_membarrier
432 .size sysn32_call_table,.-sysn32_call_table 425 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index f543ff4feef9..6369cfd390c6 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -87,6 +87,7 @@ loads_done:
87 and t0, t1, t0 87 and t0, t1, t0
88 bnez t0, trace_a_syscall 88 bnez t0, trace_a_syscall
89 89
90syscall_common:
90 jalr t2 # Do The Real Thing (TM) 91 jalr t2 # Do The Real Thing (TM)
91 92
92 li t0, -EMAXERRNO - 1 # error? 93 li t0, -EMAXERRNO - 1 # error?
@@ -130,9 +131,9 @@ trace_a_syscall:
130 131
1311: jal syscall_trace_enter 1321: jal syscall_trace_enter
132 133
133 bltz v0, 2f # seccomp failed? Skip syscall 134 bltz v0, 1f # seccomp failed? Skip syscall
134 135
135 move t0, s0 136 move t2, s0
136 RESTORE_STATIC 137 RESTORE_STATIC
137 ld a0, PT_R4(sp) # Restore argument registers 138 ld a0, PT_R4(sp) # Restore argument registers
138 ld a1, PT_R5(sp) 139 ld a1, PT_R5(sp)
@@ -142,19 +143,9 @@ trace_a_syscall:
142 ld a5, PT_R9(sp) 143 ld a5, PT_R9(sp)
143 ld a6, PT_R10(sp) 144 ld a6, PT_R10(sp)
144 ld a7, PT_R11(sp) # For indirect syscalls 145 ld a7, PT_R11(sp) # For indirect syscalls
145 jalr t0 146 j syscall_common
146 147
147 li t0, -EMAXERRNO - 1 # error? 1481: j syscall_exit
148 sltu t0, t0, v0
149 sd t0, PT_R7(sp) # set error flag
150 beqz t0, 1f
151
152 ld t1, PT_R2(sp) # syscall number
153 dnegu v0 # error
154 sd t1, PT_R0(sp) # save it for syscall restarting
1551: sd v0, PT_R2(sp) # result
156
1572: j syscall_exit
158 149
159/* ------------------------------------------------------------------------ */ 150/* ------------------------------------------------------------------------ */
160 151
@@ -584,4 +575,6 @@ EXPORT(sys32_call_table)
584 PTR sys_memfd_create 575 PTR sys_memfd_create
585 PTR sys_bpf /* 4355 */ 576 PTR sys_bpf /* 4355 */
586 PTR compat_sys_execveat 577 PTR compat_sys_execveat
578 PTR sys_userfaultfd
579 PTR sys_membarrier
587 .size sys32_call_table,.-sys32_call_table 580 .size sys32_call_table,.-sys32_call_table
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 35b8316002f8..479515109e5b 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -338,7 +338,7 @@ static void __init bootmem_init(void)
338 if (end <= reserved_end) 338 if (end <= reserved_end)
339 continue; 339 continue;
340#ifdef CONFIG_BLK_DEV_INITRD 340#ifdef CONFIG_BLK_DEV_INITRD
341 /* mapstart should be after initrd_end */ 341 /* Skip zones before initrd and initrd itself */
342 if (initrd_end && end <= (unsigned long)PFN_UP(__pa(initrd_end))) 342 if (initrd_end && end <= (unsigned long)PFN_UP(__pa(initrd_end)))
343 continue; 343 continue;
344#endif 344#endif
@@ -371,6 +371,14 @@ static void __init bootmem_init(void)
371 max_low_pfn = PFN_DOWN(HIGHMEM_START); 371 max_low_pfn = PFN_DOWN(HIGHMEM_START);
372 } 372 }
373 373
374#ifdef CONFIG_BLK_DEV_INITRD
375 /*
376 * mapstart should be after initrd_end
377 */
378 if (initrd_end)
379 mapstart = max(mapstart, (unsigned long)PFN_UP(__pa(initrd_end)));
380#endif
381
374 /* 382 /*
375 * Initialize the boot-time allocator with low memory only. 383 * Initialize the boot-time allocator with low memory only.
376 */ 384 */
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index a31896c33716..bd4385a8e6e8 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -42,6 +42,7 @@
42#include <asm/mmu_context.h> 42#include <asm/mmu_context.h>
43#include <asm/time.h> 43#include <asm/time.h>
44#include <asm/setup.h> 44#include <asm/setup.h>
45#include <asm/maar.h>
45 46
46cpumask_t cpu_callin_map; /* Bitmask of started secondaries */ 47cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
47 48
@@ -157,6 +158,7 @@ asmlinkage void start_secondary(void)
157 mips_clockevent_init(); 158 mips_clockevent_init();
158 mp_ops->init_secondary(); 159 mp_ops->init_secondary();
159 cpu_report(); 160 cpu_report();
161 maar_init();
160 162
161 /* 163 /*
162 * XXX parity protection should be folded in here when it's converted 164 * XXX parity protection should be folded in here when it's converted
diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c
index cd4c129ce743..49ff3bfc007e 100644
--- a/arch/mips/kvm/mips.c
+++ b/arch/mips/kvm/mips.c
@@ -55,6 +55,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
55 { "msa_disabled", VCPU_STAT(msa_disabled_exits), KVM_STAT_VCPU }, 55 { "msa_disabled", VCPU_STAT(msa_disabled_exits), KVM_STAT_VCPU },
56 { "flush_dcache", VCPU_STAT(flush_dcache_exits), KVM_STAT_VCPU }, 56 { "flush_dcache", VCPU_STAT(flush_dcache_exits), KVM_STAT_VCPU },
57 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), KVM_STAT_VCPU }, 57 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), KVM_STAT_VCPU },
58 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), KVM_STAT_VCPU },
58 { "halt_wakeup", VCPU_STAT(halt_wakeup), KVM_STAT_VCPU }, 59 { "halt_wakeup", VCPU_STAT(halt_wakeup), KVM_STAT_VCPU },
59 {NULL} 60 {NULL}
60}; 61};
diff --git a/arch/mips/loongson64/common/env.c b/arch/mips/loongson64/common/env.c
index f6c44dd332e2..d6d07ad56180 100644
--- a/arch/mips/loongson64/common/env.c
+++ b/arch/mips/loongson64/common/env.c
@@ -64,6 +64,9 @@ void __init prom_init_env(void)
64 } 64 }
65 if (memsize == 0) 65 if (memsize == 0)
66 memsize = 256; 66 memsize = 256;
67
68 loongson_sysconf.nr_uarts = 1;
69
67 pr_info("memsize=%u, highmemsize=%u\n", memsize, highmemsize); 70 pr_info("memsize=%u, highmemsize=%u\n", memsize, highmemsize);
68#else 71#else
69 struct boot_params *boot_p; 72 struct boot_params *boot_p;
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index a914dc1cb6d1..d8117be729a2 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -100,7 +100,7 @@ static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
100 else 100 else
101#endif 101#endif
102#if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32) 102#if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32)
103 if (dev->coherent_dma_mask < DMA_BIT_MASK(64)) 103 if (dev->coherent_dma_mask < DMA_BIT_MASK(sizeof(phys_addr_t) * 8))
104 dma_flag = __GFP_DMA; 104 dma_flag = __GFP_DMA;
105 else 105 else
106#endif 106#endif
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 66d0f49c5bec..8770e619185e 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -44,6 +44,7 @@
44#include <asm/pgalloc.h> 44#include <asm/pgalloc.h>
45#include <asm/tlb.h> 45#include <asm/tlb.h>
46#include <asm/fixmap.h> 46#include <asm/fixmap.h>
47#include <asm/maar.h>
47 48
48/* 49/*
49 * We have up to 8 empty zeroed pages so we can map one of the right colour 50 * We have up to 8 empty zeroed pages so we can map one of the right colour
@@ -252,6 +253,119 @@ void __init fixrange_init(unsigned long start, unsigned long end,
252#endif 253#endif
253} 254}
254 255
256unsigned __weak platform_maar_init(unsigned num_pairs)
257{
258 struct maar_config cfg[BOOT_MEM_MAP_MAX];
259 unsigned i, num_configured, num_cfg = 0;
260 phys_addr_t skip;
261
262 for (i = 0; i < boot_mem_map.nr_map; i++) {
263 switch (boot_mem_map.map[i].type) {
264 case BOOT_MEM_RAM:
265 case BOOT_MEM_INIT_RAM:
266 break;
267 default:
268 continue;
269 }
270
271 skip = 0x10000 - (boot_mem_map.map[i].addr & 0xffff);
272
273 cfg[num_cfg].lower = boot_mem_map.map[i].addr;
274 cfg[num_cfg].lower += skip;
275
276 cfg[num_cfg].upper = cfg[num_cfg].lower;
277 cfg[num_cfg].upper += boot_mem_map.map[i].size - 1;
278 cfg[num_cfg].upper -= skip;
279
280 cfg[num_cfg].attrs = MIPS_MAAR_S;
281 num_cfg++;
282 }
283
284 num_configured = maar_config(cfg, num_cfg, num_pairs);
285 if (num_configured < num_cfg)
286 pr_warn("Not enough MAAR pairs (%u) for all bootmem regions (%u)\n",
287 num_pairs, num_cfg);
288
289 return num_configured;
290}
291
292void maar_init(void)
293{
294 unsigned num_maars, used, i;
295 phys_addr_t lower, upper, attr;
296 static struct {
297 struct maar_config cfgs[3];
298 unsigned used;
299 } recorded = { { { 0 } }, 0 };
300
301 if (!cpu_has_maar)
302 return;
303
304 /* Detect the number of MAARs */
305 write_c0_maari(~0);
306 back_to_back_c0_hazard();
307 num_maars = read_c0_maari() + 1;
308
309 /* MAARs should be in pairs */
310 WARN_ON(num_maars % 2);
311
312 /* Set MAARs using values we recorded already */
313 if (recorded.used) {
314 used = maar_config(recorded.cfgs, recorded.used, num_maars / 2);
315 BUG_ON(used != recorded.used);
316 } else {
317 /* Configure the required MAARs */
318 used = platform_maar_init(num_maars / 2);
319 }
320
321 /* Disable any further MAARs */
322 for (i = (used * 2); i < num_maars; i++) {
323 write_c0_maari(i);
324 back_to_back_c0_hazard();
325 write_c0_maar(0);
326 back_to_back_c0_hazard();
327 }
328
329 if (recorded.used)
330 return;
331
332 pr_info("MAAR configuration:\n");
333 for (i = 0; i < num_maars; i += 2) {
334 write_c0_maari(i);
335 back_to_back_c0_hazard();
336 upper = read_c0_maar();
337
338 write_c0_maari(i + 1);
339 back_to_back_c0_hazard();
340 lower = read_c0_maar();
341
342 attr = lower & upper;
343 lower = (lower & MIPS_MAAR_ADDR) << 4;
344 upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff;
345
346 pr_info(" [%d]: ", i / 2);
347 if (!(attr & MIPS_MAAR_V)) {
348 pr_cont("disabled\n");
349 continue;
350 }
351
352 pr_cont("%pa-%pa", &lower, &upper);
353
354 if (attr & MIPS_MAAR_S)
355 pr_cont(" speculate");
356
357 pr_cont("\n");
358
359 /* Record the setup for use on secondary CPUs */
360 if (used <= ARRAY_SIZE(recorded.cfgs)) {
361 recorded.cfgs[recorded.used].lower = lower;
362 recorded.cfgs[recorded.used].upper = upper;
363 recorded.cfgs[recorded.used].attrs = attr;
364 recorded.used++;
365 }
366 }
367}
368
255#ifndef CONFIG_NEED_MULTIPLE_NODES 369#ifndef CONFIG_NEED_MULTIPLE_NODES
256int page_is_ram(unsigned long pagenr) 370int page_is_ram(unsigned long pagenr)
257{ 371{
@@ -334,69 +448,6 @@ static inline void mem_init_free_highmem(void)
334#endif 448#endif
335} 449}
336 450
337unsigned __weak platform_maar_init(unsigned num_pairs)
338{
339 struct maar_config cfg[BOOT_MEM_MAP_MAX];
340 unsigned i, num_configured, num_cfg = 0;
341 phys_addr_t skip;
342
343 for (i = 0; i < boot_mem_map.nr_map; i++) {
344 switch (boot_mem_map.map[i].type) {
345 case BOOT_MEM_RAM:
346 case BOOT_MEM_INIT_RAM:
347 break;
348 default:
349 continue;
350 }
351
352 skip = 0x10000 - (boot_mem_map.map[i].addr & 0xffff);
353
354 cfg[num_cfg].lower = boot_mem_map.map[i].addr;
355 cfg[num_cfg].lower += skip;
356
357 cfg[num_cfg].upper = cfg[num_cfg].lower;
358 cfg[num_cfg].upper += boot_mem_map.map[i].size - 1;
359 cfg[num_cfg].upper -= skip;
360
361 cfg[num_cfg].attrs = MIPS_MAAR_S;
362 num_cfg++;
363 }
364
365 num_configured = maar_config(cfg, num_cfg, num_pairs);
366 if (num_configured < num_cfg)
367 pr_warn("Not enough MAAR pairs (%u) for all bootmem regions (%u)\n",
368 num_pairs, num_cfg);
369
370 return num_configured;
371}
372
373static void maar_init(void)
374{
375 unsigned num_maars, used, i;
376
377 if (!cpu_has_maar)
378 return;
379
380 /* Detect the number of MAARs */
381 write_c0_maari(~0);
382 back_to_back_c0_hazard();
383 num_maars = read_c0_maari() + 1;
384
385 /* MAARs should be in pairs */
386 WARN_ON(num_maars % 2);
387
388 /* Configure the required MAARs */
389 used = platform_maar_init(num_maars / 2);
390
391 /* Disable any further MAARs */
392 for (i = (used * 2); i < num_maars; i++) {
393 write_c0_maari(i);
394 back_to_back_c0_hazard();
395 write_c0_maar(0);
396 back_to_back_c0_hazard();
397 }
398}
399
400void __init mem_init(void) 451void __init mem_init(void)
401{ 452{
402#ifdef CONFIG_HIGHMEM 453#ifdef CONFIG_HIGHMEM
diff --git a/arch/mips/net/bpf_jit_asm.S b/arch/mips/net/bpf_jit_asm.S
index e92726099be0..5d2e0c8d29c0 100644
--- a/arch/mips/net/bpf_jit_asm.S
+++ b/arch/mips/net/bpf_jit_asm.S
@@ -57,15 +57,28 @@
57 57
58LEAF(sk_load_word) 58LEAF(sk_load_word)
59 is_offset_negative(word) 59 is_offset_negative(word)
60 .globl sk_load_word_positive 60FEXPORT(sk_load_word_positive)
61sk_load_word_positive:
62 is_offset_in_header(4, word) 61 is_offset_in_header(4, word)
63 /* Offset within header boundaries */ 62 /* Offset within header boundaries */
64 PTR_ADDU t1, $r_skb_data, offset 63 PTR_ADDU t1, $r_skb_data, offset
64 .set reorder
65 lw $r_A, 0(t1) 65 lw $r_A, 0(t1)
66 .set noreorder
66#ifdef CONFIG_CPU_LITTLE_ENDIAN 67#ifdef CONFIG_CPU_LITTLE_ENDIAN
68# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
67 wsbh t0, $r_A 69 wsbh t0, $r_A
68 rotr $r_A, t0, 16 70 rotr $r_A, t0, 16
71# else
72 sll t0, $r_A, 24
73 srl t1, $r_A, 24
74 srl t2, $r_A, 8
75 or t0, t0, t1
76 andi t2, t2, 0xff00
77 andi t1, $r_A, 0xff00
78 or t0, t0, t2
79 sll t1, t1, 8
80 or $r_A, t0, t1
81# endif
69#endif 82#endif
70 jr $r_ra 83 jr $r_ra
71 move $r_ret, zero 84 move $r_ret, zero
@@ -73,15 +86,24 @@ sk_load_word_positive:
73 86
74LEAF(sk_load_half) 87LEAF(sk_load_half)
75 is_offset_negative(half) 88 is_offset_negative(half)
76 .globl sk_load_half_positive 89FEXPORT(sk_load_half_positive)
77sk_load_half_positive:
78 is_offset_in_header(2, half) 90 is_offset_in_header(2, half)
79 /* Offset within header boundaries */ 91 /* Offset within header boundaries */
80 PTR_ADDU t1, $r_skb_data, offset 92 PTR_ADDU t1, $r_skb_data, offset
93 .set reorder
81 lh $r_A, 0(t1) 94 lh $r_A, 0(t1)
95 .set noreorder
82#ifdef CONFIG_CPU_LITTLE_ENDIAN 96#ifdef CONFIG_CPU_LITTLE_ENDIAN
97# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
83 wsbh t0, $r_A 98 wsbh t0, $r_A
84 seh $r_A, t0 99 seh $r_A, t0
100# else
101 sll t0, $r_A, 24
102 andi t1, $r_A, 0xff00
103 sra t0, t0, 16
104 srl t1, t1, 8
105 or $r_A, t0, t1
106# endif
85#endif 107#endif
86 jr $r_ra 108 jr $r_ra
87 move $r_ret, zero 109 move $r_ret, zero
@@ -89,8 +111,7 @@ sk_load_half_positive:
89 111
90LEAF(sk_load_byte) 112LEAF(sk_load_byte)
91 is_offset_negative(byte) 113 is_offset_negative(byte)
92 .globl sk_load_byte_positive 114FEXPORT(sk_load_byte_positive)
93sk_load_byte_positive:
94 is_offset_in_header(1, byte) 115 is_offset_in_header(1, byte)
95 /* Offset within header boundaries */ 116 /* Offset within header boundaries */
96 PTR_ADDU t1, $r_skb_data, offset 117 PTR_ADDU t1, $r_skb_data, offset
@@ -148,23 +169,47 @@ sk_load_byte_positive:
148NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp) 169NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
149 bpf_slow_path_common(4) 170 bpf_slow_path_common(4)
150#ifdef CONFIG_CPU_LITTLE_ENDIAN 171#ifdef CONFIG_CPU_LITTLE_ENDIAN
172# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
151 wsbh t0, $r_s0 173 wsbh t0, $r_s0
152 jr $r_ra 174 jr $r_ra
153 rotr $r_A, t0, 16 175 rotr $r_A, t0, 16
154#endif 176# else
177 sll t0, $r_s0, 24
178 srl t1, $r_s0, 24
179 srl t2, $r_s0, 8
180 or t0, t0, t1
181 andi t2, t2, 0xff00
182 andi t1, $r_s0, 0xff00
183 or t0, t0, t2
184 sll t1, t1, 8
185 jr $r_ra
186 or $r_A, t0, t1
187# endif
188#else
155 jr $r_ra 189 jr $r_ra
156 move $r_A, $r_s0 190 move $r_A, $r_s0
191#endif
157 192
158 END(bpf_slow_path_word) 193 END(bpf_slow_path_word)
159 194
160NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp) 195NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
161 bpf_slow_path_common(2) 196 bpf_slow_path_common(2)
162#ifdef CONFIG_CPU_LITTLE_ENDIAN 197#ifdef CONFIG_CPU_LITTLE_ENDIAN
198# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
163 jr $r_ra 199 jr $r_ra
164 wsbh $r_A, $r_s0 200 wsbh $r_A, $r_s0
165#endif 201# else
202 sll t0, $r_s0, 8
203 andi t1, $r_s0, 0xff00
204 andi t0, t0, 0xff00
205 srl t1, t1, 8
206 jr $r_ra
207 or $r_A, t0, t1
208# endif
209#else
166 jr $r_ra 210 jr $r_ra
167 move $r_A, $r_s0 211 move $r_A, $r_s0
212#endif
168 213
169 END(bpf_slow_path_half) 214 END(bpf_slow_path_half)
170 215
diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index 0136b4f9c9cd..10d86d54880a 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -82,7 +82,7 @@ void nlm_send_ipi_mask(const struct cpumask *mask, unsigned int action)
82} 82}
83 83
84/* IRQ_IPI_SMP_FUNCTION Handler */ 84/* IRQ_IPI_SMP_FUNCTION Handler */
85void nlm_smp_function_ipi_handler(unsigned int __irq, struct irq_desc *desc) 85void nlm_smp_function_ipi_handler(struct irq_desc *desc)
86{ 86{
87 unsigned int irq = irq_desc_get_irq(desc); 87 unsigned int irq = irq_desc_get_irq(desc);
88 clear_c0_eimr(irq); 88 clear_c0_eimr(irq);
@@ -92,7 +92,7 @@ void nlm_smp_function_ipi_handler(unsigned int __irq, struct irq_desc *desc)
92} 92}
93 93
94/* IRQ_IPI_SMP_RESCHEDULE handler */ 94/* IRQ_IPI_SMP_RESCHEDULE handler */
95void nlm_smp_resched_ipi_handler(unsigned int __irq, struct irq_desc *desc) 95void nlm_smp_resched_ipi_handler(struct irq_desc *desc)
96{ 96{
97 unsigned int irq = irq_desc_get_irq(desc); 97 unsigned int irq = irq_desc_get_irq(desc);
98 clear_c0_eimr(irq); 98 clear_c0_eimr(irq);
diff --git a/arch/mips/pci/pci-ar2315.c b/arch/mips/pci/pci-ar2315.c
index f8d0acb4f973..b4fa6413c4e5 100644
--- a/arch/mips/pci/pci-ar2315.c
+++ b/arch/mips/pci/pci-ar2315.c
@@ -318,7 +318,7 @@ static int ar2315_pci_host_setup(struct ar2315_pci_ctrl *apc)
318 return 0; 318 return 0;
319} 319}
320 320
321static void ar2315_pci_irq_handler(unsigned irq, struct irq_desc *desc) 321static void ar2315_pci_irq_handler(struct irq_desc *desc)
322{ 322{
323 struct ar2315_pci_ctrl *apc = irq_desc_get_handler_data(desc); 323 struct ar2315_pci_ctrl *apc = irq_desc_get_handler_data(desc);
324 u32 pending = ar2315_pci_reg_read(apc, AR2315_PCI_ISR) & 324 u32 pending = ar2315_pci_reg_read(apc, AR2315_PCI_ISR) &
diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c
index ad35a5e6a56c..7db963deec73 100644
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -226,7 +226,7 @@ static struct pci_ops ar71xx_pci_ops = {
226 .write = ar71xx_pci_write_config, 226 .write = ar71xx_pci_write_config,
227}; 227};
228 228
229static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc) 229static void ar71xx_pci_irq_handler(struct irq_desc *desc)
230{ 230{
231 struct ar71xx_pci_controller *apc; 231 struct ar71xx_pci_controller *apc;
232 void __iomem *base = ath79_reset_base; 232 void __iomem *base = ath79_reset_base;
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
index 907d11dd921b..2013dad700df 100644
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -225,7 +225,7 @@ static struct pci_ops ar724x_pci_ops = {
225 .write = ar724x_pci_write, 225 .write = ar724x_pci_write,
226}; 226};
227 227
228static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc) 228static void ar724x_pci_irq_handler(struct irq_desc *desc)
229{ 229{
230 struct ar724x_pci_controller *apc; 230 struct ar724x_pci_controller *apc;
231 void __iomem *base; 231 void __iomem *base;
diff --git a/arch/mips/pci/pci-rt3883.c b/arch/mips/pci/pci-rt3883.c
index 53c8efaf1572..ed6732f9aa87 100644
--- a/arch/mips/pci/pci-rt3883.c
+++ b/arch/mips/pci/pci-rt3883.c
@@ -129,7 +129,7 @@ static void rt3883_pci_write_cfg32(struct rt3883_pci_controller *rpc,
129 rt3883_pci_w32(rpc, val, RT3883_PCI_REG_CFGDATA); 129 rt3883_pci_w32(rpc, val, RT3883_PCI_REG_CFGDATA);
130} 130}
131 131
132static void rt3883_pci_irq_handler(unsigned int __irq, struct irq_desc *desc) 132static void rt3883_pci_irq_handler(struct irq_desc *desc)
133{ 133{
134 struct rt3883_pci_controller *rpc; 134 struct rt3883_pci_controller *rpc;
135 u32 pending; 135 u32 pending;
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index c6996cf67a5c..b8a0bf5766f2 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -311,6 +311,12 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
311 311
312void pcibios_fixup_bus(struct pci_bus *bus) 312void pcibios_fixup_bus(struct pci_bus *bus)
313{ 313{
314 struct pci_dev *dev = bus->self;
315
316 if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
317 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
318 pci_read_bridge_bases(bus);
319 }
314} 320}
315 321
316EXPORT_SYMBOL(PCIBIOS_MIN_IO); 322EXPORT_SYMBOL(PCIBIOS_MIN_IO);
diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c
index 8c624a8b9ea2..4cf77f358395 100644
--- a/arch/mips/ralink/irq.c
+++ b/arch/mips/ralink/irq.c
@@ -96,7 +96,7 @@ unsigned int get_c0_compare_int(void)
96 return CP0_LEGACY_COMPARE_IRQ; 96 return CP0_LEGACY_COMPARE_IRQ;
97} 97}
98 98
99static void ralink_intc_irq_handler(unsigned int irq, struct irq_desc *desc) 99static void ralink_intc_irq_handler(struct irq_desc *desc)
100{ 100{
101 u32 pending = rt_intc_r32(INTC_REG_STATUS0); 101 u32 pending = rt_intc_r32(INTC_REG_STATUS0);
102 102
diff --git a/arch/mn10300/include/asm/Kbuild b/arch/mn10300/include/asm/Kbuild
index 6edb9ee6128e..1c8dd0f5cd5d 100644
--- a/arch/mn10300/include/asm/Kbuild
+++ b/arch/mn10300/include/asm/Kbuild
@@ -9,3 +9,4 @@ generic-y += mm-arch-hooks.h
9generic-y += preempt.h 9generic-y += preempt.h
10generic-y += sections.h 10generic-y += sections.h
11generic-y += trace_clock.h 11generic-y += trace_clock.h
12generic-y += word-at-a-time.h
diff --git a/arch/mn10300/unit-asb2305/pci.c b/arch/mn10300/unit-asb2305/pci.c
index deaa893efba5..3dfe2d31c67b 100644
--- a/arch/mn10300/unit-asb2305/pci.c
+++ b/arch/mn10300/unit-asb2305/pci.c
@@ -324,6 +324,7 @@ void pcibios_fixup_bus(struct pci_bus *bus)
324 struct pci_dev *dev; 324 struct pci_dev *dev;
325 325
326 if (bus->self) { 326 if (bus->self) {
327 pci_read_bridge_bases(bus);
327 pcibios_fixup_bridge_resources(bus->self); 328 pcibios_fixup_bridge_resources(bus->self);
328 } 329 }
329 330
diff --git a/arch/nios2/include/asm/Kbuild b/arch/nios2/include/asm/Kbuild
index 914864eb5a25..d63330e88379 100644
--- a/arch/nios2/include/asm/Kbuild
+++ b/arch/nios2/include/asm/Kbuild
@@ -61,4 +61,5 @@ generic-y += types.h
61generic-y += unaligned.h 61generic-y += unaligned.h
62generic-y += user.h 62generic-y += user.h
63generic-y += vga.h 63generic-y += vga.h
64generic-y += word-at-a-time.h
64generic-y += xor.h 65generic-y += xor.h
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 73eddda53b8e..4eec430d8fa8 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -28,6 +28,9 @@ BOOTCFLAGS += -m64
28endif 28endif
29ifdef CONFIG_CPU_BIG_ENDIAN 29ifdef CONFIG_CPU_BIG_ENDIAN
30BOOTCFLAGS += -mbig-endian 30BOOTCFLAGS += -mbig-endian
31else
32BOOTCFLAGS += -mlittle-endian
33BOOTCFLAGS += $(call cc-option,-mabi=elfv2)
31endif 34endif
32 35
33BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc 36BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc
diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild
index ab9f4e0ed4cf..ac1662956e0c 100644
--- a/arch/powerpc/include/asm/Kbuild
+++ b/arch/powerpc/include/asm/Kbuild
@@ -7,3 +7,4 @@ generic-y += mcs_spinlock.h
7generic-y += preempt.h 7generic-y += preempt.h
8generic-y += rwsem.h 8generic-y += rwsem.h
9generic-y += vtime.h 9generic-y += vtime.h
10generic-y += word-at-a-time.h
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 98eebbf66340..827a38d7a9db 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -44,6 +44,7 @@
44#ifdef CONFIG_KVM_MMIO 44#ifdef CONFIG_KVM_MMIO
45#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 45#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
46#endif 46#endif
47#define KVM_HALT_POLL_NS_DEFAULT 500000
47 48
48/* These values are internal and can be increased later */ 49/* These values are internal and can be increased later */
49#define KVM_NR_IRQCHIPS 1 50#define KVM_NR_IRQCHIPS 1
@@ -108,6 +109,7 @@ struct kvm_vcpu_stat {
108 u32 dec_exits; 109 u32 dec_exits;
109 u32 ext_intr_exits; 110 u32 ext_intr_exits;
110 u32 halt_successful_poll; 111 u32 halt_successful_poll;
112 u32 halt_attempted_poll;
111 u32 halt_wakeup; 113 u32 halt_wakeup;
112 u32 dbell_exits; 114 u32 dbell_exits;
113 u32 gdbell_exits; 115 u32 gdbell_exits;
diff --git a/arch/powerpc/include/asm/qe_ic.h b/arch/powerpc/include/asm/qe_ic.h
index 25784cc959a0..1e155ca6d33c 100644
--- a/arch/powerpc/include/asm/qe_ic.h
+++ b/arch/powerpc/include/asm/qe_ic.h
@@ -59,14 +59,14 @@ enum qe_ic_grp_id {
59 59
60#ifdef CONFIG_QUICC_ENGINE 60#ifdef CONFIG_QUICC_ENGINE
61void qe_ic_init(struct device_node *node, unsigned int flags, 61void qe_ic_init(struct device_node *node, unsigned int flags,
62 void (*low_handler)(unsigned int irq, struct irq_desc *desc), 62 void (*low_handler)(struct irq_desc *desc),
63 void (*high_handler)(unsigned int irq, struct irq_desc *desc)); 63 void (*high_handler)(struct irq_desc *desc));
64unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic); 64unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic);
65unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic); 65unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic);
66#else 66#else
67static inline void qe_ic_init(struct device_node *node, unsigned int flags, 67static inline void qe_ic_init(struct device_node *node, unsigned int flags,
68 void (*low_handler)(unsigned int irq, struct irq_desc *desc), 68 void (*low_handler)(struct irq_desc *desc),
69 void (*high_handler)(unsigned int irq, struct irq_desc *desc)) 69 void (*high_handler)(struct irq_desc *desc))
70{} 70{}
71static inline unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic) 71static inline unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic)
72{ return 0; } 72{ return 0; }
@@ -78,8 +78,7 @@ void qe_ic_set_highest_priority(unsigned int virq, int high);
78int qe_ic_set_priority(unsigned int virq, unsigned int priority); 78int qe_ic_set_priority(unsigned int virq, unsigned int priority);
79int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high); 79int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high);
80 80
81static inline void qe_ic_cascade_low_ipic(unsigned int irq, 81static inline void qe_ic_cascade_low_ipic(struct irq_desc *desc)
82 struct irq_desc *desc)
83{ 82{
84 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc); 83 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
85 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); 84 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
@@ -88,8 +87,7 @@ static inline void qe_ic_cascade_low_ipic(unsigned int irq,
88 generic_handle_irq(cascade_irq); 87 generic_handle_irq(cascade_irq);
89} 88}
90 89
91static inline void qe_ic_cascade_high_ipic(unsigned int irq, 90static inline void qe_ic_cascade_high_ipic(struct irq_desc *desc)
92 struct irq_desc *desc)
93{ 91{
94 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc); 92 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
95 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); 93 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
@@ -98,8 +96,7 @@ static inline void qe_ic_cascade_high_ipic(unsigned int irq,
98 generic_handle_irq(cascade_irq); 96 generic_handle_irq(cascade_irq);
99} 97}
100 98
101static inline void qe_ic_cascade_low_mpic(unsigned int irq, 99static inline void qe_ic_cascade_low_mpic(struct irq_desc *desc)
102 struct irq_desc *desc)
103{ 100{
104 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc); 101 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
105 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); 102 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
@@ -111,8 +108,7 @@ static inline void qe_ic_cascade_low_mpic(unsigned int irq,
111 chip->irq_eoi(&desc->irq_data); 108 chip->irq_eoi(&desc->irq_data);
112} 109}
113 110
114static inline void qe_ic_cascade_high_mpic(unsigned int irq, 111static inline void qe_ic_cascade_high_mpic(struct irq_desc *desc)
115 struct irq_desc *desc)
116{ 112{
117 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc); 113 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
118 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); 114 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
@@ -124,8 +120,7 @@ static inline void qe_ic_cascade_high_mpic(unsigned int irq,
124 chip->irq_eoi(&desc->irq_data); 120 chip->irq_eoi(&desc->irq_data);
125} 121}
126 122
127static inline void qe_ic_cascade_muxed_mpic(unsigned int irq, 123static inline void qe_ic_cascade_muxed_mpic(struct irq_desc *desc)
128 struct irq_desc *desc)
129{ 124{
130 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc); 125 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
131 unsigned int cascade_irq; 126 unsigned int cascade_irq;
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 71f2b3f02cf8..126d0c4f9b7d 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -368,3 +368,5 @@ SYSCALL_SPU(memfd_create)
368SYSCALL_SPU(bpf) 368SYSCALL_SPU(bpf)
369COMPAT_SYS(execveat) 369COMPAT_SYS(execveat)
370PPC64ONLY(switch_endian) 370PPC64ONLY(switch_endian)
371SYSCALL_SPU(userfaultfd)
372SYSCALL_SPU(membarrier)
diff --git a/arch/powerpc/include/asm/tsi108_pci.h b/arch/powerpc/include/asm/tsi108_pci.h
index 5653d7cc3e24..ae59d5b672b0 100644
--- a/arch/powerpc/include/asm/tsi108_pci.h
+++ b/arch/powerpc/include/asm/tsi108_pci.h
@@ -39,7 +39,7 @@
39 39
40extern int tsi108_setup_pci(struct device_node *dev, u32 cfg_phys, int primary); 40extern int tsi108_setup_pci(struct device_node *dev, u32 cfg_phys, int primary);
41extern void tsi108_pci_int_init(struct device_node *node); 41extern void tsi108_pci_int_init(struct device_node *node);
42extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc); 42extern void tsi108_irq_cascade(struct irq_desc *desc);
43extern void tsi108_clear_pci_cfg_error(void); 43extern void tsi108_clear_pci_cfg_error(void);
44 44
45#endif /* _ASM_POWERPC_TSI108_PCI_H */ 45#endif /* _ASM_POWERPC_TSI108_PCI_H */
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index f4f8b667d75b..13411be86041 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -12,7 +12,7 @@
12#include <uapi/asm/unistd.h> 12#include <uapi/asm/unistd.h>
13 13
14 14
15#define __NR_syscalls 364 15#define __NR_syscalls 366
16 16
17#define __NR__exit __NR_exit 17#define __NR__exit __NR_exit
18#define NR_syscalls __NR_syscalls 18#define NR_syscalls __NR_syscalls
diff --git a/arch/powerpc/include/uapi/asm/unistd.h b/arch/powerpc/include/uapi/asm/unistd.h
index e4aa173dae62..6337738018aa 100644
--- a/arch/powerpc/include/uapi/asm/unistd.h
+++ b/arch/powerpc/include/uapi/asm/unistd.h
@@ -386,5 +386,7 @@
386#define __NR_bpf 361 386#define __NR_bpf 361
387#define __NR_execveat 362 387#define __NR_execveat 362
388#define __NR_switch_endian 363 388#define __NR_switch_endian 363
389#define __NR_userfaultfd 364
390#define __NR_membarrier 365
389 391
390#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */ 392#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 45096033d37b..290559df1e8b 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -441,7 +441,7 @@ void migrate_irqs(void)
441 441
442 chip = irq_data_get_irq_chip(data); 442 chip = irq_data_get_irq_chip(data);
443 443
444 cpumask_and(mask, data->affinity, map); 444 cpumask_and(mask, irq_data_get_affinity_mask(data), map);
445 if (cpumask_any(mask) >= nr_cpu_ids) { 445 if (cpumask_any(mask) >= nr_cpu_ids) {
446 pr_warn("Breaking affinity for irq %i\n", irq); 446 pr_warn("Breaking affinity for irq %i\n", irq);
447 cpumask_copy(mask, map); 447 cpumask_copy(mask, map);
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index a1d0632d97c6..7587b2ae5f77 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1032,7 +1032,13 @@ void pcibios_set_master(struct pci_dev *dev)
1032 1032
1033void pcibios_fixup_bus(struct pci_bus *bus) 1033void pcibios_fixup_bus(struct pci_bus *bus)
1034{ 1034{
1035 /* Fixup the bus */ 1035 /* When called from the generic PCI probe, read PCI<->PCI bridge
1036 * bases. This is -not- called when generating the PCI tree from
1037 * the OF device-tree.
1038 */
1039 pci_read_bridge_bases(bus);
1040
1041 /* Now fixup the bus bus */
1036 pcibios_setup_bus_self(bus); 1042 pcibios_setup_bus_self(bus);
1037 1043
1038 /* Now fixup devices on that bus */ 1044 /* Now fixup devices on that bus */
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index bb02e9f6944e..ad8c9db61237 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -38,6 +38,7 @@
38#include <asm/udbg.h> 38#include <asm/udbg.h>
39#include <asm/mmu_context.h> 39#include <asm/mmu_context.h>
40#include <asm/epapr_hcalls.h> 40#include <asm/epapr_hcalls.h>
41#include <asm/code-patching.h>
41 42
42#define DBG(fmt...) 43#define DBG(fmt...)
43 44
@@ -109,6 +110,8 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
109 * This is called very early on the boot process, after a minimal 110 * This is called very early on the boot process, after a minimal
110 * MMU environment has been set up but before MMU_init is called. 111 * MMU environment has been set up but before MMU_init is called.
111 */ 112 */
113extern unsigned int memset_nocache_branch; /* Insn to be replaced by NOP */
114
112notrace void __init machine_init(u64 dt_ptr) 115notrace void __init machine_init(u64 dt_ptr)
113{ 116{
114 lockdep_init(); 117 lockdep_init();
@@ -116,6 +119,9 @@ notrace void __init machine_init(u64 dt_ptr)
116 /* Enable early debugging if any specified (see udbg.h) */ 119 /* Enable early debugging if any specified (see udbg.h) */
117 udbg_early_init(); 120 udbg_early_init();
118 121
122 patch_instruction((unsigned int *)&memcpy, PPC_INST_NOP);
123 patch_instruction(&memset_nocache_branch, PPC_INST_NOP);
124
119 /* Do some early initialization based on the flat device tree */ 125 /* Do some early initialization based on the flat device tree */
120 early_init_devtree(__va(dt_ptr)); 126 early_init_devtree(__va(dt_ptr));
121 127
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index d75bf325f54a..099c79d8c160 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -53,6 +53,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
53 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 53 { "ext_intr", VCPU_STAT(ext_intr_exits) },
54 { "queue_intr", VCPU_STAT(queue_intr) }, 54 { "queue_intr", VCPU_STAT(queue_intr) },
55 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), }, 55 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
56 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
56 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 57 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
57 { "pf_storage", VCPU_STAT(pf_storage) }, 58 { "pf_storage", VCPU_STAT(pf_storage) },
58 { "sp_storage", VCPU_STAT(sp_storage) }, 59 { "sp_storage", VCPU_STAT(sp_storage) },
@@ -828,12 +829,15 @@ int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
828 unsigned long size = kvmppc_get_gpr(vcpu, 4); 829 unsigned long size = kvmppc_get_gpr(vcpu, 4);
829 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 830 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
830 u64 buf; 831 u64 buf;
832 int srcu_idx;
831 int ret; 833 int ret;
832 834
833 if (!is_power_of_2(size) || (size > sizeof(buf))) 835 if (!is_power_of_2(size) || (size > sizeof(buf)))
834 return H_TOO_HARD; 836 return H_TOO_HARD;
835 837
838 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
836 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf); 839 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
840 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
837 if (ret != 0) 841 if (ret != 0)
838 return H_TOO_HARD; 842 return H_TOO_HARD;
839 843
@@ -868,6 +872,7 @@ int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
868 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 872 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
869 unsigned long val = kvmppc_get_gpr(vcpu, 6); 873 unsigned long val = kvmppc_get_gpr(vcpu, 6);
870 u64 buf; 874 u64 buf;
875 int srcu_idx;
871 int ret; 876 int ret;
872 877
873 switch (size) { 878 switch (size) {
@@ -891,7 +896,9 @@ int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
891 return H_TOO_HARD; 896 return H_TOO_HARD;
892 } 897 }
893 898
899 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
894 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf); 900 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
901 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
895 if (ret != 0) 902 if (ret != 0)
896 return H_TOO_HARD; 903 return H_TOO_HARD;
897 904
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 9754e6815e52..228049786888 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -2692,9 +2692,13 @@ static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
2692 2692
2693 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 2693 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
2694 (vc->vcore_state == VCORE_RUNNING || 2694 (vc->vcore_state == VCORE_RUNNING ||
2695 vc->vcore_state == VCORE_EXITING)) 2695 vc->vcore_state == VCORE_EXITING ||
2696 vc->vcore_state == VCORE_PIGGYBACK))
2696 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 2697 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE);
2697 2698
2699 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
2700 kvmppc_vcore_end_preempt(vc);
2701
2698 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 2702 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
2699 kvmppc_remove_runnable(vc, vcpu); 2703 kvmppc_remove_runnable(vc, vcpu);
2700 vcpu->stat.signal_exits++; 2704 vcpu->stat.signal_exits++;
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 2273dcacef39..b98889e9851d 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1257,6 +1257,7 @@ mc_cont:
1257 bl kvmhv_accumulate_time 1257 bl kvmhv_accumulate_time
1258#endif 1258#endif
1259 1259
1260 mr r3, r12
1260 /* Increment exit count, poke other threads to exit */ 1261 /* Increment exit count, poke other threads to exit */
1261 bl kvmhv_commence_exit 1262 bl kvmhv_commence_exit
1262 nop 1263 nop
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index ae458f0fd061..fd5875179e5c 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -63,6 +63,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
63 { "dec", VCPU_STAT(dec_exits) }, 63 { "dec", VCPU_STAT(dec_exits) },
64 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 64 { "ext_intr", VCPU_STAT(ext_intr_exits) },
65 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) }, 65 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
66 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
66 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 67 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
67 { "doorbell", VCPU_STAT(dbell_exits) }, 68 { "doorbell", VCPU_STAT(dbell_exits) },
68 { "guest doorbell", VCPU_STAT(gdbell_exits) }, 69 { "guest doorbell", VCPU_STAT(gdbell_exits) },
diff --git a/arch/powerpc/lib/copy_32.S b/arch/powerpc/lib/copy_32.S
index 2ef50c629470..c44df2dbedd5 100644
--- a/arch/powerpc/lib/copy_32.S
+++ b/arch/powerpc/lib/copy_32.S
@@ -73,6 +73,10 @@ CACHELINE_MASK = (L1_CACHE_BYTES-1)
73 * Use dcbz on the complete cache lines in the destination 73 * Use dcbz on the complete cache lines in the destination
74 * to set them to zero. This requires that the destination 74 * to set them to zero. This requires that the destination
75 * area is cacheable. -- paulus 75 * area is cacheable. -- paulus
76 *
77 * During early init, cache might not be active yet, so dcbz cannot be used.
78 * We therefore skip the optimised bloc that uses dcbz. This jump is
79 * replaced by a nop once cache is active. This is done in machine_init()
76 */ 80 */
77_GLOBAL(memset) 81_GLOBAL(memset)
78 rlwimi r4,r4,8,16,23 82 rlwimi r4,r4,8,16,23
@@ -88,6 +92,8 @@ _GLOBAL(memset)
88 subf r6,r0,r6 92 subf r6,r0,r6
89 cmplwi 0,r4,0 93 cmplwi 0,r4,0
90 bne 2f /* Use normal procedure if r4 is not zero */ 94 bne 2f /* Use normal procedure if r4 is not zero */
95_GLOBAL(memset_nocache_branch)
96 b 2f /* Skip optimised bloc until cache is enabled */
91 97
92 clrlwi r7,r6,32-LG_CACHELINE_BYTES 98 clrlwi r7,r6,32-LG_CACHELINE_BYTES
93 add r8,r7,r5 99 add r8,r7,r5
@@ -128,6 +134,10 @@ _GLOBAL(memset)
128 * the destination area is cacheable. 134 * the destination area is cacheable.
129 * We only use this version if the source and dest don't overlap. 135 * We only use this version if the source and dest don't overlap.
130 * -- paulus. 136 * -- paulus.
137 *
138 * During early init, cache might not be active yet, so dcbz cannot be used.
139 * We therefore jump to generic_memcpy which doesn't use dcbz. This jump is
140 * replaced by a nop once cache is active. This is done in machine_init()
131 */ 141 */
132_GLOBAL(memmove) 142_GLOBAL(memmove)
133 cmplw 0,r3,r4 143 cmplw 0,r3,r4
@@ -135,6 +145,7 @@ _GLOBAL(memmove)
135 /* fall through */ 145 /* fall through */
136 146
137_GLOBAL(memcpy) 147_GLOBAL(memcpy)
148 b generic_memcpy
138 add r7,r3,r5 /* test if the src & dst overlap */ 149 add r7,r3,r5 /* test if the src & dst overlap */
139 add r8,r4,r5 150 add r8,r4,r5
140 cmplw 0,r4,r7 151 cmplw 0,r4,r7
diff --git a/arch/powerpc/mm/hugepage-hash64.c b/arch/powerpc/mm/hugepage-hash64.c
index 43dafb9d6a46..4d87122cf6a7 100644
--- a/arch/powerpc/mm/hugepage-hash64.c
+++ b/arch/powerpc/mm/hugepage-hash64.c
@@ -85,7 +85,6 @@ int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
85 BUG_ON(index >= 4096); 85 BUG_ON(index >= 4096);
86 86
87 vpn = hpt_vpn(ea, vsid, ssize); 87 vpn = hpt_vpn(ea, vsid, ssize);
88 hash = hpt_hash(vpn, shift, ssize);
89 hpte_slot_array = get_hpte_slot_array(pmdp); 88 hpte_slot_array = get_hpte_slot_array(pmdp);
90 if (psize == MMU_PAGE_4K) { 89 if (psize == MMU_PAGE_4K) {
91 /* 90 /*
@@ -101,6 +100,7 @@ int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
101 valid = hpte_valid(hpte_slot_array, index); 100 valid = hpte_valid(hpte_slot_array, index);
102 if (valid) { 101 if (valid) {
103 /* update the hpte bits */ 102 /* update the hpte bits */
103 hash = hpt_hash(vpn, shift, ssize);
104 hidx = hpte_hash_index(hpte_slot_array, index); 104 hidx = hpte_hash_index(hpte_slot_array, index);
105 if (hidx & _PTEIDX_SECONDARY) 105 if (hidx & _PTEIDX_SECONDARY)
106 hash = ~hash; 106 hash = ~hash;
@@ -126,6 +126,7 @@ int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
126 if (!valid) { 126 if (!valid) {
127 unsigned long hpte_group; 127 unsigned long hpte_group;
128 128
129 hash = hpt_hash(vpn, shift, ssize);
129 /* insert new entry */ 130 /* insert new entry */
130 pa = pmd_pfn(__pmd(old_pmd)) << PAGE_SHIFT; 131 pa = pmd_pfn(__pmd(old_pmd)) << PAGE_SHIFT;
131 new_pmd |= _PAGE_HASHPTE; 132 new_pmd |= _PAGE_HASHPTE;
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
index 11090ab4bf59..0035d146df73 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
@@ -104,9 +104,10 @@ cpld_pic_get_irq(int offset, u8 ignore, u8 __iomem *statusp,
104 return irq_linear_revmap(cpld_pic_host, cpld_irq); 104 return irq_linear_revmap(cpld_pic_host, cpld_irq);
105} 105}
106 106
107static void 107static void cpld_pic_cascade(struct irq_desc *desc)
108cpld_pic_cascade(unsigned int irq, struct irq_desc *desc)
109{ 108{
109 unsigned int irq;
110
110 irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status, 111 irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status,
111 &cpld_regs->pci_mask); 112 &cpld_regs->pci_mask);
112 if (irq != NO_IRQ) { 113 if (irq != NO_IRQ) {
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c
index 32cae33c4266..8fb95480fd73 100644
--- a/arch/powerpc/platforms/52xx/media5200.c
+++ b/arch/powerpc/platforms/52xx/media5200.c
@@ -80,7 +80,7 @@ static struct irq_chip media5200_irq_chip = {
80 .irq_mask_ack = media5200_irq_mask, 80 .irq_mask_ack = media5200_irq_mask,
81}; 81};
82 82
83void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc) 83static void media5200_irq_cascade(struct irq_desc *desc)
84{ 84{
85 struct irq_chip *chip = irq_desc_get_chip(desc); 85 struct irq_chip *chip = irq_desc_get_chip(desc);
86 int sub_virq, val; 86 int sub_virq, val;
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index 63016621aff8..78ac19aefa4d 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -191,7 +191,7 @@ static struct irq_chip mpc52xx_gpt_irq_chip = {
191 .irq_set_type = mpc52xx_gpt_irq_set_type, 191 .irq_set_type = mpc52xx_gpt_irq_set_type,
192}; 192};
193 193
194void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc) 194static void mpc52xx_gpt_irq_cascade(struct irq_desc *desc)
195{ 195{
196 struct mpc52xx_gpt_priv *gpt = irq_desc_get_handler_data(desc); 196 struct mpc52xx_gpt_priv *gpt = irq_desc_get_handler_data(desc);
197 int sub_virq; 197 int sub_virq;
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 2944bc84b9d6..4fe2074c88cb 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -196,7 +196,7 @@ static int mpc52xx_extirq_set_type(struct irq_data *d, unsigned int flow_type)
196 ctrl_reg |= (type << (22 - (l2irq * 2))); 196 ctrl_reg |= (type << (22 - (l2irq * 2)));
197 out_be32(&intr->ctrl, ctrl_reg); 197 out_be32(&intr->ctrl, ctrl_reg);
198 198
199 __irq_set_handler_locked(d->irq, handler); 199 irq_set_handler_locked(d, handler);
200 200
201 return 0; 201 return 0;
202} 202}
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index 74861a7fb807..60e89fc9c753 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -78,7 +78,7 @@ static struct irq_chip pq2ads_pci_ic = {
78 .irq_disable = pq2ads_pci_mask_irq 78 .irq_disable = pq2ads_pci_mask_irq
79}; 79};
80 80
81static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc) 81static void pq2ads_pci_irq_demux(struct irq_desc *desc)
82{ 82{
83 struct pq2ads_pci_pic *priv = irq_desc_get_handler_data(desc); 83 struct pq2ads_pci_pic *priv = irq_desc_get_handler_data(desc);
84 u32 stat, mask, pend; 84 u32 stat, mask, pend;
diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c
index 7bfb9b184dd4..23791de7b688 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -49,7 +49,7 @@ int __init mpc85xx_common_publish_devices(void)
49 return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL); 49 return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
50} 50}
51#ifdef CONFIG_CPM2 51#ifdef CONFIG_CPM2
52static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) 52static void cpm2_cascade(struct irq_desc *desc)
53{ 53{
54 struct irq_chip *chip = irq_desc_get_chip(desc); 54 struct irq_chip *chip = irq_desc_get_chip(desc);
55 int cascade_irq; 55 int cascade_irq;
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index b0753e222086..5ac70de3e48a 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -192,8 +192,7 @@ void mpc85xx_cds_fixup_bus(struct pci_bus *bus)
192} 192}
193 193
194#ifdef CONFIG_PPC_I8259 194#ifdef CONFIG_PPC_I8259
195static void mpc85xx_8259_cascade_handler(unsigned int irq, 195static void mpc85xx_8259_cascade_handler(struct irq_desc *desc)
196 struct irq_desc *desc)
197{ 196{
198 unsigned int cascade_irq = i8259_irq(); 197 unsigned int cascade_irq = i8259_irq();
199 198
@@ -202,7 +201,7 @@ static void mpc85xx_8259_cascade_handler(unsigned int irq,
202 generic_handle_irq(cascade_irq); 201 generic_handle_irq(cascade_irq);
203 202
204 /* check for any interrupts from the shared IRQ line */ 203 /* check for any interrupts from the shared IRQ line */
205 handle_fasteoi_irq(irq, desc); 204 handle_fasteoi_irq(desc);
206} 205}
207 206
208static irqreturn_t mpc85xx_8259_cascade_action(int irq, void *dev_id) 207static irqreturn_t mpc85xx_8259_cascade_action(int irq, void *dev_id)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index ffdf02121a7c..f858306dba6a 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -46,7 +46,7 @@
46#endif 46#endif
47 47
48#ifdef CONFIG_PPC_I8259 48#ifdef CONFIG_PPC_I8259
49static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc) 49static void mpc85xx_8259_cascade(struct irq_desc *desc)
50{ 50{
51 struct irq_chip *chip = irq_desc_get_chip(desc); 51 struct irq_chip *chip = irq_desc_get_chip(desc);
52 unsigned int cascade_irq = i8259_irq(); 52 unsigned int cascade_irq = i8259_irq();
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index 55a9682b9529..b02d6a5bb035 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -91,9 +91,10 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)
91 (irq_hw_number_t)i); 91 (irq_hw_number_t)i);
92} 92}
93 93
94void socrates_fpga_pic_cascade(unsigned int irq, struct irq_desc *desc) 94static void socrates_fpga_pic_cascade(struct irq_desc *desc)
95{ 95{
96 struct irq_chip *chip = irq_desc_get_chip(desc); 96 struct irq_chip *chip = irq_desc_get_chip(desc);
97 unsigned int irq = irq_desc_get_irq(desc);
97 unsigned int cascade_irq; 98 unsigned int cascade_irq;
98 99
99 /* 100 /*
diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c
index d5b98c0f958a..845defa1fd19 100644
--- a/arch/powerpc/platforms/86xx/pic.c
+++ b/arch/powerpc/platforms/86xx/pic.c
@@ -17,7 +17,7 @@
17#include <asm/i8259.h> 17#include <asm/i8259.h>
18 18
19#ifdef CONFIG_PPC_I8259 19#ifdef CONFIG_PPC_I8259
20static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc) 20static void mpc86xx_8259_cascade(struct irq_desc *desc)
21{ 21{
22 struct irq_chip *chip = irq_desc_get_chip(desc); 22 struct irq_chip *chip = irq_desc_get_chip(desc);
23 unsigned int cascade_irq = i8259_irq(); 23 unsigned int cascade_irq = i8259_irq();
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index d3037747031d..c289fc77b4ba 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -214,7 +214,7 @@ void mpc8xx_restart(char *cmd)
214 panic("Restart failed\n"); 214 panic("Restart failed\n");
215} 215}
216 216
217static void cpm_cascade(unsigned int irq, struct irq_desc *desc) 217static void cpm_cascade(struct irq_desc *desc)
218{ 218{
219 struct irq_chip *chip = irq_desc_get_chip(desc); 219 struct irq_chip *chip = irq_desc_get_chip(desc);
220 int cascade_irq = cpm_get_irq(); 220 int cascade_irq = cpm_get_irq();
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index 306888acb737..e0e68a1c0d3c 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -93,7 +93,7 @@ static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
93 dcr_write(msic->dcr_host, dcr_n, val); 93 dcr_write(msic->dcr_host, dcr_n, val);
94} 94}
95 95
96static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc) 96static void axon_msi_cascade(struct irq_desc *desc)
97{ 97{
98 struct irq_chip *chip = irq_desc_get_chip(desc); 98 struct irq_chip *chip = irq_desc_get_chip(desc);
99 struct axon_msic *msic = irq_desc_get_handler_data(desc); 99 struct axon_msic *msic = irq_desc_get_handler_data(desc);
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index a15f1efc295f..9f609fc8d331 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -99,11 +99,12 @@ static void iic_ioexc_eoi(struct irq_data *d)
99{ 99{
100} 100}
101 101
102static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc) 102static void iic_ioexc_cascade(struct irq_desc *desc)
103{ 103{
104 struct irq_chip *chip = irq_desc_get_chip(desc); 104 struct irq_chip *chip = irq_desc_get_chip(desc);
105 struct cbe_iic_regs __iomem *node_iic = 105 struct cbe_iic_regs __iomem *node_iic =
106 (void __iomem *)irq_desc_get_handler_data(desc); 106 (void __iomem *)irq_desc_get_handler_data(desc);
107 unsigned int irq = irq_desc_get_irq(desc);
107 unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC; 108 unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC;
108 unsigned long bits, ack; 109 unsigned long bits, ack;
109 int cascade; 110 int cascade;
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 1f72f4ab6353..9d27de62dc62 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -199,7 +199,7 @@ static const struct irq_domain_ops spider_host_ops = {
199 .xlate = spider_host_xlate, 199 .xlate = spider_host_xlate,
200}; 200};
201 201
202static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc) 202static void spider_irq_cascade(struct irq_desc *desc)
203{ 203{
204 struct irq_chip *chip = irq_desc_get_chip(desc); 204 struct irq_chip *chip = irq_desc_get_chip(desc);
205 struct spider_pic *pic = irq_desc_get_handler_data(desc); 205 struct spider_pic *pic = irq_desc_get_handler_data(desc);
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 15ebc4e8a151..987d1b8d68e3 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -363,7 +363,7 @@ void __init chrp_setup_arch(void)
363 if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0); 363 if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
364} 364}
365 365
366static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc) 366static void chrp_8259_cascade(struct irq_desc *desc)
367{ 367{
368 struct irq_chip *chip = irq_desc_get_chip(desc); 368 struct irq_chip *chip = irq_desc_get_chip(desc);
369 unsigned int cascade_irq = i8259_irq(); 369 unsigned int cascade_irq = i8259_irq();
diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
index 9dd154d6f89a..9b7975706bfc 100644
--- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
@@ -120,8 +120,7 @@ static unsigned int __hlwd_pic_get_irq(struct irq_domain *h)
120 return irq_linear_revmap(h, irq); 120 return irq_linear_revmap(h, irq);
121} 121}
122 122
123static void hlwd_pic_irq_cascade(unsigned int cascade_virq, 123static void hlwd_pic_irq_cascade(struct irq_desc *desc)
124 struct irq_desc *desc)
125{ 124{
126 struct irq_chip *chip = irq_desc_get_chip(desc); 125 struct irq_chip *chip = irq_desc_get_chip(desc);
127 struct irq_domain *irq_domain = irq_desc_get_handler_data(desc); 126 struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);
diff --git a/arch/powerpc/platforms/embedded6xx/mvme5100.c b/arch/powerpc/platforms/embedded6xx/mvme5100.c
index 1613303177e6..8f65aa3747f5 100644
--- a/arch/powerpc/platforms/embedded6xx/mvme5100.c
+++ b/arch/powerpc/platforms/embedded6xx/mvme5100.c
@@ -42,7 +42,7 @@
42static phys_addr_t pci_membase; 42static phys_addr_t pci_membase;
43static u_char *restart; 43static u_char *restart;
44 44
45static void mvme5100_8259_cascade(unsigned int irq, struct irq_desc *desc) 45static void mvme5100_8259_cascade(struct irq_desc *desc)
46{ 46{
47 struct irq_chip *chip = irq_desc_get_chip(desc); 47 struct irq_chip *chip = irq_desc_get_chip(desc);
48 unsigned int cascade_irq = i8259_irq(); 48 unsigned int cascade_irq = i8259_irq();
diff --git a/arch/powerpc/platforms/pasemi/msi.c b/arch/powerpc/platforms/pasemi/msi.c
index e66ef1943338..b304a9fe55cc 100644
--- a/arch/powerpc/platforms/pasemi/msi.c
+++ b/arch/powerpc/platforms/pasemi/msi.c
@@ -63,6 +63,7 @@ static struct irq_chip mpic_pasemi_msi_chip = {
63static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev) 63static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
64{ 64{
65 struct msi_desc *entry; 65 struct msi_desc *entry;
66 irq_hw_number_t hwirq;
66 67
67 pr_debug("pasemi_msi_teardown_msi_irqs, pdev %p\n", pdev); 68 pr_debug("pasemi_msi_teardown_msi_irqs, pdev %p\n", pdev);
68 69
@@ -70,10 +71,10 @@ static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
70 if (entry->irq == NO_IRQ) 71 if (entry->irq == NO_IRQ)
71 continue; 72 continue;
72 73
74 hwirq = virq_to_hw(entry->irq);
73 irq_set_msi_desc(entry->irq, NULL); 75 irq_set_msi_desc(entry->irq, NULL);
74 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap,
75 virq_to_hw(entry->irq), ALLOC_CHUNK);
76 irq_dispose_mapping(entry->irq); 76 irq_dispose_mapping(entry->irq);
77 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, ALLOC_CHUNK);
77 } 78 }
78 79
79 return; 80 return;
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 2927cd5c8303..414fd1a00fda 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -2049,9 +2049,23 @@ static long pnv_pci_ioda2_setup_default_config(struct pnv_ioda_pe *pe)
2049 struct iommu_table *tbl = NULL; 2049 struct iommu_table *tbl = NULL;
2050 long rc; 2050 long rc;
2051 2051
2052 /*
2053 * crashkernel= specifies the kdump kernel's maximum memory at
2054 * some offset and there is no guaranteed the result is a power
2055 * of 2, which will cause errors later.
2056 */
2057 const u64 max_memory = __rounddown_pow_of_two(memory_hotplug_max());
2058
2059 /*
2060 * In memory constrained environments, e.g. kdump kernel, the
2061 * DMA window can be larger than available memory, which will
2062 * cause errors later.
2063 */
2064 const u64 window_size = min((u64)pe->table_group.tce32_size, max_memory);
2065
2052 rc = pnv_pci_ioda2_create_table(&pe->table_group, 0, 2066 rc = pnv_pci_ioda2_create_table(&pe->table_group, 0,
2053 IOMMU_PAGE_SHIFT_4K, 2067 IOMMU_PAGE_SHIFT_4K,
2054 pe->table_group.tce32_size, 2068 window_size,
2055 POWERNV_IOMMU_DEFAULT_LEVELS, &tbl); 2069 POWERNV_IOMMU_DEFAULT_LEVELS, &tbl);
2056 if (rc) { 2070 if (rc) {
2057 pe_err(pe, "Failed to create 32-bit TCE table, err %ld", 2071 pe_err(pe, "Failed to create 32-bit TCE table, err %ld",
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 9b2480b265c0..f2dd77234240 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -99,6 +99,7 @@ void pnv_teardown_msi_irqs(struct pci_dev *pdev)
99 struct pci_controller *hose = pci_bus_to_host(pdev->bus); 99 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
100 struct pnv_phb *phb = hose->private_data; 100 struct pnv_phb *phb = hose->private_data;
101 struct msi_desc *entry; 101 struct msi_desc *entry;
102 irq_hw_number_t hwirq;
102 103
103 if (WARN_ON(!phb)) 104 if (WARN_ON(!phb))
104 return; 105 return;
@@ -106,10 +107,10 @@ void pnv_teardown_msi_irqs(struct pci_dev *pdev)
106 for_each_pci_msi_entry(entry, pdev) { 107 for_each_pci_msi_entry(entry, pdev) {
107 if (entry->irq == NO_IRQ) 108 if (entry->irq == NO_IRQ)
108 continue; 109 continue;
110 hwirq = virq_to_hw(entry->irq);
109 irq_set_msi_desc(entry->irq, NULL); 111 irq_set_msi_desc(entry->irq, NULL);
110 msi_bitmap_free_hwirqs(&phb->msi_bmp,
111 virq_to_hw(entry->irq) - phb->msi_base, 1);
112 irq_dispose_mapping(entry->irq); 112 irq_dispose_mapping(entry->irq);
113 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, 1);
113 } 114 }
114} 115}
115#endif /* CONFIG_PCI_MSI */ 116#endif /* CONFIG_PCI_MSI */
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index 47d9cebe7159..db17827eb746 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -422,8 +422,10 @@ static ssize_t dlpar_cpu_probe(const char *buf, size_t count)
422 422
423 dn = dlpar_configure_connector(cpu_to_be32(drc_index), parent); 423 dn = dlpar_configure_connector(cpu_to_be32(drc_index), parent);
424 of_node_put(parent); 424 of_node_put(parent);
425 if (!dn) 425 if (!dn) {
426 dlpar_release_drc(drc_index);
426 return -EINVAL; 427 return -EINVAL;
428 }
427 429
428 rc = dlpar_attach_node(dn); 430 rc = dlpar_attach_node(dn);
429 if (rc) { 431 if (rc) {
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 39a74fad3e04..9a83eb71b030 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -111,7 +111,7 @@ static void __init fwnmi_init(void)
111 fwnmi_active = 1; 111 fwnmi_active = 1;
112} 112}
113 113
114static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) 114static void pseries_8259_cascade(struct irq_desc *desc)
115{ 115{
116 struct irq_chip *chip = irq_desc_get_chip(desc); 116 struct irq_chip *chip = irq_desc_get_chip(desc);
117 unsigned int cascade_irq = i8259_irq(); 117 unsigned int cascade_irq = i8259_irq();
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index a11bd1d433ad..9e86074719a9 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -155,9 +155,9 @@ static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type)
155 155
156 irqd_set_trigger_type(d, flow_type); 156 irqd_set_trigger_type(d, flow_type);
157 if (flow_type & IRQ_TYPE_LEVEL_LOW) 157 if (flow_type & IRQ_TYPE_LEVEL_LOW)
158 __irq_set_handler_locked(d->irq, handle_level_irq); 158 irq_set_handler_locked(d, handle_level_irq);
159 else 159 else
160 __irq_set_handler_locked(d->irq, handle_edge_irq); 160 irq_set_handler_locked(d, handle_edge_irq);
161 161
162 /* internal IRQ senses are LEVEL_LOW 162 /* internal IRQ senses are LEVEL_LOW
163 * EXT IRQ and Port C IRQ senses are programmable 163 * EXT IRQ and Port C IRQ senses are programmable
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 5916da1856a7..48a576aa47b9 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -128,15 +128,16 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
128{ 128{
129 struct msi_desc *entry; 129 struct msi_desc *entry;
130 struct fsl_msi *msi_data; 130 struct fsl_msi *msi_data;
131 irq_hw_number_t hwirq;
131 132
132 for_each_pci_msi_entry(entry, pdev) { 133 for_each_pci_msi_entry(entry, pdev) {
133 if (entry->irq == NO_IRQ) 134 if (entry->irq == NO_IRQ)
134 continue; 135 continue;
136 hwirq = virq_to_hw(entry->irq);
135 msi_data = irq_get_chip_data(entry->irq); 137 msi_data = irq_get_chip_data(entry->irq);
136 irq_set_msi_desc(entry->irq, NULL); 138 irq_set_msi_desc(entry->irq, NULL);
137 msi_bitmap_free_hwirqs(&msi_data->bitmap,
138 virq_to_hw(entry->irq), 1);
139 irq_dispose_mapping(entry->irq); 139 irq_dispose_mapping(entry->irq);
140 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
140 } 141 }
141 142
142 return; 143 return;
diff --git a/arch/powerpc/sysdev/ge/ge_pic.c b/arch/powerpc/sysdev/ge/ge_pic.c
index 2bcb78bb3a15..d57b77573068 100644
--- a/arch/powerpc/sysdev/ge/ge_pic.c
+++ b/arch/powerpc/sysdev/ge/ge_pic.c
@@ -91,7 +91,7 @@ static int gef_pic_cascade_irq;
91 * should be masked out. 91 * should be masked out.
92 */ 92 */
93 93
94void gef_pic_cascade(unsigned int irq, struct irq_desc *desc) 94static void gef_pic_cascade(struct irq_desc *desc)
95{ 95{
96 struct irq_chip *chip = irq_desc_get_chip(desc); 96 struct irq_chip *chip = irq_desc_get_chip(desc);
97 unsigned int cascade_irq; 97 unsigned int cascade_irq;
diff --git a/arch/powerpc/sysdev/ge/ge_pic.h b/arch/powerpc/sysdev/ge/ge_pic.h
index 908dbd9826b6..5bf7e4b81e36 100644
--- a/arch/powerpc/sysdev/ge/ge_pic.h
+++ b/arch/powerpc/sysdev/ge/ge_pic.h
@@ -1,8 +1,6 @@
1#ifndef __GEF_PIC_H__ 1#ifndef __GEF_PIC_H__
2#define __GEF_PIC_H__ 2#define __GEF_PIC_H__
3 3
4
5void gef_pic_cascade(unsigned int, struct irq_desc *);
6unsigned int gef_pic_get_irq(void); 4unsigned int gef_pic_get_irq(void);
7void gef_pic_init(struct device_node *); 5void gef_pic_init(struct device_node *);
8 6
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 6b2b68914810..b1297ab1599b 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -624,10 +624,10 @@ static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type)
624 624
625 irqd_set_trigger_type(d, flow_type); 625 irqd_set_trigger_type(d, flow_type);
626 if (flow_type & IRQ_TYPE_LEVEL_LOW) { 626 if (flow_type & IRQ_TYPE_LEVEL_LOW) {
627 __irq_set_handler_locked(d->irq, handle_level_irq); 627 irq_set_handler_locked(d, handle_level_irq);
628 d->chip = &ipic_level_irq_chip; 628 d->chip = &ipic_level_irq_chip;
629 } else { 629 } else {
630 __irq_set_handler_locked(d->irq, handle_edge_irq); 630 irq_set_handler_locked(d, handle_edge_irq);
631 d->chip = &ipic_edge_irq_chip; 631 d->chip = &ipic_edge_irq_chip;
632 } 632 }
633 633
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index d93a78be4346..9a423975853a 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -55,7 +55,7 @@ static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
55 unsigned int siel = in_be32(&siu_reg->sc_siel); 55 unsigned int siel = in_be32(&siu_reg->sc_siel);
56 siel |= mpc8xx_irqd_to_bit(d); 56 siel |= mpc8xx_irqd_to_bit(d);
57 out_be32(&siu_reg->sc_siel, siel); 57 out_be32(&siu_reg->sc_siel, siel);
58 __irq_set_handler_locked(d->irq, handle_edge_irq); 58 irq_set_handler_locked(d, handle_edge_irq);
59 } 59 }
60 return 0; 60 return 0;
61} 61}
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 97a8ae8f94dd..537e5db85a06 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1181,7 +1181,7 @@ static int mpic_host_xlate(struct irq_domain *h, struct device_node *ct,
1181} 1181}
1182 1182
1183/* IRQ handler for a secondary MPIC cascaded from another IRQ controller */ 1183/* IRQ handler for a secondary MPIC cascaded from another IRQ controller */
1184static void mpic_cascade(unsigned int irq, struct irq_desc *desc) 1184static void mpic_cascade(struct irq_desc *desc)
1185{ 1185{
1186 struct irq_chip *chip = irq_desc_get_chip(desc); 1186 struct irq_chip *chip = irq_desc_get_chip(desc);
1187 struct mpic *mpic = irq_desc_get_handler_data(desc); 1187 struct mpic *mpic = irq_desc_get_handler_data(desc);
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index 70fbd5694a8b..2cbc7e29b85f 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -107,15 +107,16 @@ static u64 find_u4_magic_addr(struct pci_dev *pdev, unsigned int hwirq)
107static void u3msi_teardown_msi_irqs(struct pci_dev *pdev) 107static void u3msi_teardown_msi_irqs(struct pci_dev *pdev)
108{ 108{
109 struct msi_desc *entry; 109 struct msi_desc *entry;
110 irq_hw_number_t hwirq;
110 111
111 for_each_pci_msi_entry(entry, pdev) { 112 for_each_pci_msi_entry(entry, pdev) {
112 if (entry->irq == NO_IRQ) 113 if (entry->irq == NO_IRQ)
113 continue; 114 continue;
114 115
116 hwirq = virq_to_hw(entry->irq);
115 irq_set_msi_desc(entry->irq, NULL); 117 irq_set_msi_desc(entry->irq, NULL);
116 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap,
117 virq_to_hw(entry->irq), 1);
118 irq_dispose_mapping(entry->irq); 118 irq_dispose_mapping(entry->irq);
119 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, 1);
119 } 120 }
120 121
121 return; 122 return;
diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c b/arch/powerpc/sysdev/ppc4xx_msi.c
index 24d0470c1698..8fb806135043 100644
--- a/arch/powerpc/sysdev/ppc4xx_msi.c
+++ b/arch/powerpc/sysdev/ppc4xx_msi.c
@@ -124,16 +124,17 @@ void ppc4xx_teardown_msi_irqs(struct pci_dev *dev)
124{ 124{
125 struct msi_desc *entry; 125 struct msi_desc *entry;
126 struct ppc4xx_msi *msi_data = &ppc4xx_msi; 126 struct ppc4xx_msi *msi_data = &ppc4xx_msi;
127 irq_hw_number_t hwirq;
127 128
128 dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n"); 129 dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n");
129 130
130 for_each_pci_msi_entry(entry, dev) { 131 for_each_pci_msi_entry(entry, dev) {
131 if (entry->irq == NO_IRQ) 132 if (entry->irq == NO_IRQ)
132 continue; 133 continue;
134 hwirq = virq_to_hw(entry->irq);
133 irq_set_msi_desc(entry->irq, NULL); 135 irq_set_msi_desc(entry->irq, NULL);
134 msi_bitmap_free_hwirqs(&msi_data->bitmap,
135 virq_to_hw(entry->irq), 1);
136 irq_dispose_mapping(entry->irq); 136 irq_dispose_mapping(entry->irq);
137 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
137 } 138 }
138} 139}
139 140
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 47b352e4bc74..fbcc1f855a7f 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -311,8 +311,8 @@ unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)
311} 311}
312 312
313void __init qe_ic_init(struct device_node *node, unsigned int flags, 313void __init qe_ic_init(struct device_node *node, unsigned int flags,
314 void (*low_handler)(unsigned int irq, struct irq_desc *desc), 314 void (*low_handler)(struct irq_desc *desc),
315 void (*high_handler)(unsigned int irq, struct irq_desc *desc)) 315 void (*high_handler)(struct irq_desc *desc))
316{ 316{
317 struct qe_ic *qe_ic; 317 struct qe_ic *qe_ic;
318 struct resource res; 318 struct resource res;
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index 57b54476e747..379de955aae3 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -428,7 +428,7 @@ void __init tsi108_pci_int_init(struct device_node *node)
428 init_pci_source(); 428 init_pci_source();
429} 429}
430 430
431void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc) 431void tsi108_irq_cascade(struct irq_desc *desc)
432{ 432{
433 struct irq_chip *chip = irq_desc_get_chip(desc); 433 struct irq_chip *chip = irq_desc_get_chip(desc);
434 unsigned int cascade_irq = get_pci_source(); 434 unsigned int cascade_irq = get_pci_source();
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index d77345338671..6893d8f236df 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -194,7 +194,7 @@ static const struct irq_domain_ops uic_host_ops = {
194 .xlate = irq_domain_xlate_twocell, 194 .xlate = irq_domain_xlate_twocell,
195}; 195};
196 196
197void uic_irq_cascade(unsigned int virq, struct irq_desc *desc) 197static void uic_irq_cascade(struct irq_desc *desc)
198{ 198{
199 struct irq_chip *chip = irq_desc_get_chip(desc); 199 struct irq_chip *chip = irq_desc_get_chip(desc);
200 struct irq_data *idata = irq_desc_get_irq_data(desc); 200 struct irq_data *idata = irq_desc_get_irq_data(desc);
diff --git a/arch/powerpc/sysdev/xics/ics-opal.c b/arch/powerpc/sysdev/xics/ics-opal.c
index 11ac964d5175..27c936c080a6 100644
--- a/arch/powerpc/sysdev/xics/ics-opal.c
+++ b/arch/powerpc/sysdev/xics/ics-opal.c
@@ -54,7 +54,7 @@ static void ics_opal_unmask_irq(struct irq_data *d)
54 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS) 54 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
55 return; 55 return;
56 56
57 server = xics_get_irq_server(d->irq, d->affinity, 0); 57 server = xics_get_irq_server(d->irq, irq_data_get_affinity_mask(d), 0);
58 server = ics_opal_mangle_server(server); 58 server = ics_opal_mangle_server(server);
59 59
60 rc = opal_set_xive(hw_irq, server, DEFAULT_PRIORITY); 60 rc = opal_set_xive(hw_irq, server, DEFAULT_PRIORITY);
diff --git a/arch/powerpc/sysdev/xics/ics-rtas.c b/arch/powerpc/sysdev/xics/ics-rtas.c
index d1c625c4cc5a..3854dd41558d 100644
--- a/arch/powerpc/sysdev/xics/ics-rtas.c
+++ b/arch/powerpc/sysdev/xics/ics-rtas.c
@@ -47,7 +47,7 @@ static void ics_rtas_unmask_irq(struct irq_data *d)
47 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS) 47 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
48 return; 48 return;
49 49
50 server = xics_get_irq_server(d->irq, d->affinity, 0); 50 server = xics_get_irq_server(d->irq, irq_data_get_affinity_mask(d), 0);
51 51
52 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, hw_irq, server, 52 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, hw_irq, server,
53 DEFAULT_PRIORITY); 53 DEFAULT_PRIORITY);
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c
index 43b8b275bc5c..0f52d7955796 100644
--- a/arch/powerpc/sysdev/xilinx_intc.c
+++ b/arch/powerpc/sysdev/xilinx_intc.c
@@ -222,7 +222,7 @@ int xilinx_intc_get_irq(void)
222/* 222/*
223 * Support code for cascading to 8259 interrupt controllers 223 * Support code for cascading to 8259 interrupt controllers
224 */ 224 */
225static void xilinx_i8259_cascade(unsigned int irq, struct irq_desc *desc) 225static void xilinx_i8259_cascade(struct irq_desc *desc)
226{ 226{
227 struct irq_chip *chip = irq_desc_get_chip(desc); 227 struct irq_chip *chip = irq_desc_get_chip(desc);
228 unsigned int cascade_irq = i8259_irq(); 228 unsigned int cascade_irq = i8259_irq();
diff --git a/arch/s390/configs/zfcpdump_defconfig b/arch/s390/configs/zfcpdump_defconfig
index 1b0184a0f7f2..92805d604173 100644
--- a/arch/s390/configs/zfcpdump_defconfig
+++ b/arch/s390/configs/zfcpdump_defconfig
@@ -1,7 +1,6 @@
1# CONFIG_SWAP is not set 1# CONFIG_SWAP is not set
2CONFIG_NO_HZ=y 2CONFIG_NO_HZ=y
3CONFIG_HIGH_RES_TIMERS=y 3CONFIG_HIGH_RES_TIMERS=y
4CONFIG_RCU_FAST_NO_HZ=y
5CONFIG_BLK_DEV_INITRD=y 4CONFIG_BLK_DEV_INITRD=y
6CONFIG_CC_OPTIMIZE_FOR_SIZE=y 5CONFIG_CC_OPTIMIZE_FOR_SIZE=y
7# CONFIG_COMPAT_BRK is not set 6# CONFIG_COMPAT_BRK is not set
@@ -54,10 +53,6 @@ CONFIG_RAW_DRIVER=y
54# CONFIG_MONWRITER is not set 53# CONFIG_MONWRITER is not set
55# CONFIG_S390_VMUR is not set 54# CONFIG_S390_VMUR is not set
56# CONFIG_HID is not set 55# CONFIG_HID is not set
57CONFIG_MEMSTICK=y
58CONFIG_MEMSTICK_DEBUG=y
59CONFIG_MEMSTICK_UNSAFE_RESUME=y
60CONFIG_MSPRO_BLOCK=y
61# CONFIG_IOMMU_SUPPORT is not set 56# CONFIG_IOMMU_SUPPORT is not set
62CONFIG_EXT2_FS=y 57CONFIG_EXT2_FS=y
63CONFIG_EXT3_FS=y 58CONFIG_EXT3_FS=y
diff --git a/arch/s390/include/asm/Kbuild b/arch/s390/include/asm/Kbuild
index 5ad26dd94d77..9043d2e1e2ae 100644
--- a/arch/s390/include/asm/Kbuild
+++ b/arch/s390/include/asm/Kbuild
@@ -6,3 +6,4 @@ generic-y += mcs_spinlock.h
6generic-y += mm-arch-hooks.h 6generic-y += mm-arch-hooks.h
7generic-y += preempt.h 7generic-y += preempt.h
8generic-y += trace_clock.h 8generic-y += trace_clock.h
9generic-y += word-at-a-time.h
diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
index 3d012e071647..8ced426091e1 100644
--- a/arch/s390/include/asm/kvm_host.h
+++ b/arch/s390/include/asm/kvm_host.h
@@ -35,6 +35,7 @@
35 */ 35 */
36#define KVM_NR_IRQCHIPS 1 36#define KVM_NR_IRQCHIPS 1
37#define KVM_IRQCHIP_NUM_PINS 4096 37#define KVM_IRQCHIP_NUM_PINS 4096
38#define KVM_HALT_POLL_NS_DEFAULT 0
38 39
39#define SIGP_CTRL_C 0x80 40#define SIGP_CTRL_C 0x80
40#define SIGP_CTRL_SCN_MASK 0x3f 41#define SIGP_CTRL_SCN_MASK 0x3f
@@ -210,6 +211,7 @@ struct kvm_vcpu_stat {
210 u32 exit_validity; 211 u32 exit_validity;
211 u32 exit_instruction; 212 u32 exit_instruction;
212 u32 halt_successful_poll; 213 u32 halt_successful_poll;
214 u32 halt_attempted_poll;
213 u32 halt_wakeup; 215 u32 halt_wakeup;
214 u32 instruction_lctl; 216 u32 instruction_lctl;
215 u32 instruction_lctlg; 217 u32 instruction_lctlg;
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 525cef73b085..02613bad8bbb 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -8,28 +8,8 @@
8 8
9#include <uapi/asm/unistd.h> 9#include <uapi/asm/unistd.h>
10 10
11
12#define __IGNORE_time 11#define __IGNORE_time
13 12
14/* Ignore system calls that are also reachable via sys_socketcall */
15#define __IGNORE_recvmmsg
16#define __IGNORE_sendmmsg
17#define __IGNORE_socket
18#define __IGNORE_socketpair
19#define __IGNORE_bind
20#define __IGNORE_connect
21#define __IGNORE_listen
22#define __IGNORE_accept4
23#define __IGNORE_getsockopt
24#define __IGNORE_setsockopt
25#define __IGNORE_getsockname
26#define __IGNORE_getpeername
27#define __IGNORE_sendto
28#define __IGNORE_sendmsg
29#define __IGNORE_recvfrom
30#define __IGNORE_recvmsg
31#define __IGNORE_shutdown
32
33#define __ARCH_WANT_OLD_READDIR 13#define __ARCH_WANT_OLD_READDIR
34#define __ARCH_WANT_SYS_ALARM 14#define __ARCH_WANT_SYS_ALARM
35#define __ARCH_WANT_SYS_GETHOSTNAME 15#define __ARCH_WANT_SYS_GETHOSTNAME
diff --git a/arch/s390/include/uapi/asm/unistd.h b/arch/s390/include/uapi/asm/unistd.h
index 59d2bb4e2d0c..a848adba1504 100644
--- a/arch/s390/include/uapi/asm/unistd.h
+++ b/arch/s390/include/uapi/asm/unistd.h
@@ -290,7 +290,26 @@
290#define __NR_s390_pci_mmio_write 352 290#define __NR_s390_pci_mmio_write 352
291#define __NR_s390_pci_mmio_read 353 291#define __NR_s390_pci_mmio_read 353
292#define __NR_execveat 354 292#define __NR_execveat 354
293#define NR_syscalls 355 293#define __NR_userfaultfd 355
294#define __NR_membarrier 356
295#define __NR_recvmmsg 357
296#define __NR_sendmmsg 358
297#define __NR_socket 359
298#define __NR_socketpair 360
299#define __NR_bind 361
300#define __NR_connect 362
301#define __NR_listen 363
302#define __NR_accept4 364
303#define __NR_getsockopt 365
304#define __NR_setsockopt 366
305#define __NR_getsockname 367
306#define __NR_getpeername 368
307#define __NR_sendto 369
308#define __NR_sendmsg 370
309#define __NR_recvfrom 371
310#define __NR_recvmsg 372
311#define __NR_shutdown 373
312#define NR_syscalls 374
294 313
295/* 314/*
296 * There are some system calls that are not present on 64 bit, some 315 * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/compat_signal.c b/arch/s390/kernel/compat_signal.c
index eb4664238613..e0f9d270b30f 100644
--- a/arch/s390/kernel/compat_signal.c
+++ b/arch/s390/kernel/compat_signal.c
@@ -48,6 +48,19 @@ typedef struct
48 struct ucontext32 uc; 48 struct ucontext32 uc;
49} rt_sigframe32; 49} rt_sigframe32;
50 50
51static inline void sigset_to_sigset32(unsigned long *set64,
52 compat_sigset_word *set32)
53{
54 set32[0] = (compat_sigset_word) set64[0];
55 set32[1] = (compat_sigset_word)(set64[0] >> 32);
56}
57
58static inline void sigset32_to_sigset(compat_sigset_word *set32,
59 unsigned long *set64)
60{
61 set64[0] = (unsigned long) set32[0] | ((unsigned long) set32[1] << 32);
62}
63
51int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from) 64int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from)
52{ 65{
53 int err; 66 int err;
@@ -281,10 +294,12 @@ COMPAT_SYSCALL_DEFINE0(sigreturn)
281{ 294{
282 struct pt_regs *regs = task_pt_regs(current); 295 struct pt_regs *regs = task_pt_regs(current);
283 sigframe32 __user *frame = (sigframe32 __user *)regs->gprs[15]; 296 sigframe32 __user *frame = (sigframe32 __user *)regs->gprs[15];
297 compat_sigset_t cset;
284 sigset_t set; 298 sigset_t set;
285 299
286 if (__copy_from_user(&set.sig, &frame->sc.oldmask, _SIGMASK_COPY_SIZE32)) 300 if (__copy_from_user(&cset.sig, &frame->sc.oldmask, _SIGMASK_COPY_SIZE32))
287 goto badframe; 301 goto badframe;
302 sigset32_to_sigset(cset.sig, set.sig);
288 set_current_blocked(&set); 303 set_current_blocked(&set);
289 save_fpu_regs(); 304 save_fpu_regs();
290 if (restore_sigregs32(regs, &frame->sregs)) 305 if (restore_sigregs32(regs, &frame->sregs))
@@ -302,10 +317,12 @@ COMPAT_SYSCALL_DEFINE0(rt_sigreturn)
302{ 317{
303 struct pt_regs *regs = task_pt_regs(current); 318 struct pt_regs *regs = task_pt_regs(current);
304 rt_sigframe32 __user *frame = (rt_sigframe32 __user *)regs->gprs[15]; 319 rt_sigframe32 __user *frame = (rt_sigframe32 __user *)regs->gprs[15];
320 compat_sigset_t cset;
305 sigset_t set; 321 sigset_t set;
306 322
307 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) 323 if (__copy_from_user(&cset, &frame->uc.uc_sigmask, sizeof(cset)))
308 goto badframe; 324 goto badframe;
325 sigset32_to_sigset(cset.sig, set.sig);
309 set_current_blocked(&set); 326 set_current_blocked(&set);
310 if (compat_restore_altstack(&frame->uc.uc_stack)) 327 if (compat_restore_altstack(&frame->uc.uc_stack))
311 goto badframe; 328 goto badframe;
@@ -377,7 +394,7 @@ static int setup_frame32(struct ksignal *ksig, sigset_t *set,
377 return -EFAULT; 394 return -EFAULT;
378 395
379 /* Create struct sigcontext32 on the signal stack */ 396 /* Create struct sigcontext32 on the signal stack */
380 memcpy(&sc.oldmask, &set->sig, _SIGMASK_COPY_SIZE32); 397 sigset_to_sigset32(set->sig, sc.oldmask);
381 sc.sregs = (__u32)(unsigned long __force) &frame->sregs; 398 sc.sregs = (__u32)(unsigned long __force) &frame->sregs;
382 if (__copy_to_user(&frame->sc, &sc, sizeof(frame->sc))) 399 if (__copy_to_user(&frame->sc, &sc, sizeof(frame->sc)))
383 return -EFAULT; 400 return -EFAULT;
@@ -438,6 +455,7 @@ static int setup_frame32(struct ksignal *ksig, sigset_t *set,
438static int setup_rt_frame32(struct ksignal *ksig, sigset_t *set, 455static int setup_rt_frame32(struct ksignal *ksig, sigset_t *set,
439 struct pt_regs *regs) 456 struct pt_regs *regs)
440{ 457{
458 compat_sigset_t cset;
441 rt_sigframe32 __user *frame; 459 rt_sigframe32 __user *frame;
442 unsigned long restorer; 460 unsigned long restorer;
443 size_t frame_size; 461 size_t frame_size;
@@ -485,11 +503,12 @@ static int setup_rt_frame32(struct ksignal *ksig, sigset_t *set,
485 store_sigregs(); 503 store_sigregs();
486 504
487 /* Create ucontext on the signal stack. */ 505 /* Create ucontext on the signal stack. */
506 sigset_to_sigset32(set->sig, cset.sig);
488 if (__put_user(uc_flags, &frame->uc.uc_flags) || 507 if (__put_user(uc_flags, &frame->uc.uc_flags) ||
489 __put_user(0, &frame->uc.uc_link) || 508 __put_user(0, &frame->uc.uc_link) ||
490 __compat_save_altstack(&frame->uc.uc_stack, regs->gprs[15]) || 509 __compat_save_altstack(&frame->uc.uc_stack, regs->gprs[15]) ||
491 save_sigregs32(regs, &frame->uc.uc_mcontext) || 510 save_sigregs32(regs, &frame->uc.uc_mcontext) ||
492 __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)) || 511 __copy_to_user(&frame->uc.uc_sigmask, &cset, sizeof(cset)) ||
493 save_sigregs_ext32(regs, &frame->uc.uc_mcontext_ext)) 512 save_sigregs_ext32(regs, &frame->uc.uc_mcontext_ext))
494 return -EFAULT; 513 return -EFAULT;
495 514
diff --git a/arch/s390/kernel/compat_wrapper.c b/arch/s390/kernel/compat_wrapper.c
index f8498dde67b1..09f194052df3 100644
--- a/arch/s390/kernel/compat_wrapper.c
+++ b/arch/s390/kernel/compat_wrapper.c
@@ -52,15 +52,13 @@
52 * the regular system call wrappers. 52 * the regular system call wrappers.
53 */ 53 */
54#define COMPAT_SYSCALL_WRAPx(x, name, ...) \ 54#define COMPAT_SYSCALL_WRAPx(x, name, ...) \
55 asmlinkage long sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)); \ 55asmlinkage long sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)); \
56 asmlinkage long compat_sys##name(__MAP(x,__SC_COMPAT_TYPE,__VA_ARGS__));\ 56asmlinkage long notrace compat_sys##name(__MAP(x,__SC_COMPAT_TYPE,__VA_ARGS__));\
57 asmlinkage long compat_sys##name(__MAP(x,__SC_COMPAT_TYPE,__VA_ARGS__)) \ 57asmlinkage long notrace compat_sys##name(__MAP(x,__SC_COMPAT_TYPE,__VA_ARGS__)) \
58 { \ 58{ \
59 return sys##name(__MAP(x,__SC_COMPAT_CAST,__VA_ARGS__)); \ 59 return sys##name(__MAP(x,__SC_COMPAT_CAST,__VA_ARGS__)); \
60 } 60}
61 61
62COMPAT_SYSCALL_WRAP1(exit, int, error_code);
63COMPAT_SYSCALL_WRAP1(close, unsigned int, fd);
64COMPAT_SYSCALL_WRAP2(creat, const char __user *, pathname, umode_t, mode); 62COMPAT_SYSCALL_WRAP2(creat, const char __user *, pathname, umode_t, mode);
65COMPAT_SYSCALL_WRAP2(link, const char __user *, oldname, const char __user *, newname); 63COMPAT_SYSCALL_WRAP2(link, const char __user *, oldname, const char __user *, newname);
66COMPAT_SYSCALL_WRAP1(unlink, const char __user *, pathname); 64COMPAT_SYSCALL_WRAP1(unlink, const char __user *, pathname);
@@ -68,23 +66,16 @@ COMPAT_SYSCALL_WRAP1(chdir, const char __user *, filename);
68COMPAT_SYSCALL_WRAP3(mknod, const char __user *, filename, umode_t, mode, unsigned, dev); 66COMPAT_SYSCALL_WRAP3(mknod, const char __user *, filename, umode_t, mode, unsigned, dev);
69COMPAT_SYSCALL_WRAP2(chmod, const char __user *, filename, umode_t, mode); 67COMPAT_SYSCALL_WRAP2(chmod, const char __user *, filename, umode_t, mode);
70COMPAT_SYSCALL_WRAP1(oldumount, char __user *, name); 68COMPAT_SYSCALL_WRAP1(oldumount, char __user *, name);
71COMPAT_SYSCALL_WRAP1(alarm, unsigned int, seconds);
72COMPAT_SYSCALL_WRAP2(access, const char __user *, filename, int, mode); 69COMPAT_SYSCALL_WRAP2(access, const char __user *, filename, int, mode);
73COMPAT_SYSCALL_WRAP1(nice, int, increment);
74COMPAT_SYSCALL_WRAP2(kill, int, pid, int, sig);
75COMPAT_SYSCALL_WRAP2(rename, const char __user *, oldname, const char __user *, newname); 70COMPAT_SYSCALL_WRAP2(rename, const char __user *, oldname, const char __user *, newname);
76COMPAT_SYSCALL_WRAP2(mkdir, const char __user *, pathname, umode_t, mode); 71COMPAT_SYSCALL_WRAP2(mkdir, const char __user *, pathname, umode_t, mode);
77COMPAT_SYSCALL_WRAP1(rmdir, const char __user *, pathname); 72COMPAT_SYSCALL_WRAP1(rmdir, const char __user *, pathname);
78COMPAT_SYSCALL_WRAP1(dup, unsigned int, fildes);
79COMPAT_SYSCALL_WRAP1(pipe, int __user *, fildes); 73COMPAT_SYSCALL_WRAP1(pipe, int __user *, fildes);
80COMPAT_SYSCALL_WRAP1(brk, unsigned long, brk); 74COMPAT_SYSCALL_WRAP1(brk, unsigned long, brk);
81COMPAT_SYSCALL_WRAP2(signal, int, sig, __sighandler_t, handler); 75COMPAT_SYSCALL_WRAP2(signal, int, sig, __sighandler_t, handler);
82COMPAT_SYSCALL_WRAP1(acct, const char __user *, name); 76COMPAT_SYSCALL_WRAP1(acct, const char __user *, name);
83COMPAT_SYSCALL_WRAP2(umount, char __user *, name, int, flags); 77COMPAT_SYSCALL_WRAP2(umount, char __user *, name, int, flags);
84COMPAT_SYSCALL_WRAP2(setpgid, pid_t, pid, pid_t, pgid);
85COMPAT_SYSCALL_WRAP1(umask, int, mask);
86COMPAT_SYSCALL_WRAP1(chroot, const char __user *, filename); 78COMPAT_SYSCALL_WRAP1(chroot, const char __user *, filename);
87COMPAT_SYSCALL_WRAP2(dup2, unsigned int, oldfd, unsigned int, newfd);
88COMPAT_SYSCALL_WRAP3(sigsuspend, int, unused1, int, unused2, old_sigset_t, mask); 79COMPAT_SYSCALL_WRAP3(sigsuspend, int, unused1, int, unused2, old_sigset_t, mask);
89COMPAT_SYSCALL_WRAP2(sethostname, char __user *, name, int, len); 80COMPAT_SYSCALL_WRAP2(sethostname, char __user *, name, int, len);
90COMPAT_SYSCALL_WRAP2(symlink, const char __user *, old, const char __user *, new); 81COMPAT_SYSCALL_WRAP2(symlink, const char __user *, old, const char __user *, new);
@@ -93,37 +84,23 @@ COMPAT_SYSCALL_WRAP1(uselib, const char __user *, library);
93COMPAT_SYSCALL_WRAP2(swapon, const char __user *, specialfile, int, swap_flags); 84COMPAT_SYSCALL_WRAP2(swapon, const char __user *, specialfile, int, swap_flags);
94COMPAT_SYSCALL_WRAP4(reboot, int, magic1, int, magic2, unsigned int, cmd, void __user *, arg); 85COMPAT_SYSCALL_WRAP4(reboot, int, magic1, int, magic2, unsigned int, cmd, void __user *, arg);
95COMPAT_SYSCALL_WRAP2(munmap, unsigned long, addr, size_t, len); 86COMPAT_SYSCALL_WRAP2(munmap, unsigned long, addr, size_t, len);
96COMPAT_SYSCALL_WRAP2(fchmod, unsigned int, fd, umode_t, mode);
97COMPAT_SYSCALL_WRAP2(getpriority, int, which, int, who);
98COMPAT_SYSCALL_WRAP3(setpriority, int, which, int, who, int, niceval);
99COMPAT_SYSCALL_WRAP3(syslog, int, type, char __user *, buf, int, len); 87COMPAT_SYSCALL_WRAP3(syslog, int, type, char __user *, buf, int, len);
100COMPAT_SYSCALL_WRAP1(swapoff, const char __user *, specialfile); 88COMPAT_SYSCALL_WRAP1(swapoff, const char __user *, specialfile);
101COMPAT_SYSCALL_WRAP1(fsync, unsigned int, fd);
102COMPAT_SYSCALL_WRAP2(setdomainname, char __user *, name, int, len); 89COMPAT_SYSCALL_WRAP2(setdomainname, char __user *, name, int, len);
103COMPAT_SYSCALL_WRAP1(newuname, struct new_utsname __user *, name); 90COMPAT_SYSCALL_WRAP1(newuname, struct new_utsname __user *, name);
104COMPAT_SYSCALL_WRAP3(mprotect, unsigned long, start, size_t, len, unsigned long, prot); 91COMPAT_SYSCALL_WRAP3(mprotect, unsigned long, start, size_t, len, unsigned long, prot);
105COMPAT_SYSCALL_WRAP3(init_module, void __user *, umod, unsigned long, len, const char __user *, uargs); 92COMPAT_SYSCALL_WRAP3(init_module, void __user *, umod, unsigned long, len, const char __user *, uargs);
106COMPAT_SYSCALL_WRAP2(delete_module, const char __user *, name_user, unsigned int, flags); 93COMPAT_SYSCALL_WRAP2(delete_module, const char __user *, name_user, unsigned int, flags);
107COMPAT_SYSCALL_WRAP4(quotactl, unsigned int, cmd, const char __user *, special, qid_t, id, void __user *, addr); 94COMPAT_SYSCALL_WRAP4(quotactl, unsigned int, cmd, const char __user *, special, qid_t, id, void __user *, addr);
108COMPAT_SYSCALL_WRAP1(getpgid, pid_t, pid);
109COMPAT_SYSCALL_WRAP1(fchdir, unsigned int, fd);
110COMPAT_SYSCALL_WRAP2(bdflush, int, func, long, data); 95COMPAT_SYSCALL_WRAP2(bdflush, int, func, long, data);
111COMPAT_SYSCALL_WRAP3(sysfs, int, option, unsigned long, arg1, unsigned long, arg2); 96COMPAT_SYSCALL_WRAP3(sysfs, int, option, unsigned long, arg1, unsigned long, arg2);
112COMPAT_SYSCALL_WRAP1(s390_personality, unsigned int, personality);
113COMPAT_SYSCALL_WRAP5(llseek, unsigned int, fd, unsigned long, high, unsigned long, low, loff_t __user *, result, unsigned int, whence); 97COMPAT_SYSCALL_WRAP5(llseek, unsigned int, fd, unsigned long, high, unsigned long, low, loff_t __user *, result, unsigned int, whence);
114COMPAT_SYSCALL_WRAP2(flock, unsigned int, fd, unsigned int, cmd);
115COMPAT_SYSCALL_WRAP3(msync, unsigned long, start, size_t, len, int, flags); 98COMPAT_SYSCALL_WRAP3(msync, unsigned long, start, size_t, len, int, flags);
116COMPAT_SYSCALL_WRAP1(getsid, pid_t, pid);
117COMPAT_SYSCALL_WRAP1(fdatasync, unsigned int, fd);
118COMPAT_SYSCALL_WRAP2(mlock, unsigned long, start, size_t, len); 99COMPAT_SYSCALL_WRAP2(mlock, unsigned long, start, size_t, len);
119COMPAT_SYSCALL_WRAP2(munlock, unsigned long, start, size_t, len); 100COMPAT_SYSCALL_WRAP2(munlock, unsigned long, start, size_t, len);
120COMPAT_SYSCALL_WRAP1(mlockall, int, flags);
121COMPAT_SYSCALL_WRAP2(sched_setparam, pid_t, pid, struct sched_param __user *, param); 101COMPAT_SYSCALL_WRAP2(sched_setparam, pid_t, pid, struct sched_param __user *, param);
122COMPAT_SYSCALL_WRAP2(sched_getparam, pid_t, pid, struct sched_param __user *, param); 102COMPAT_SYSCALL_WRAP2(sched_getparam, pid_t, pid, struct sched_param __user *, param);
123COMPAT_SYSCALL_WRAP3(sched_setscheduler, pid_t, pid, int, policy, struct sched_param __user *, param); 103COMPAT_SYSCALL_WRAP3(sched_setscheduler, pid_t, pid, int, policy, struct sched_param __user *, param);
124COMPAT_SYSCALL_WRAP1(sched_getscheduler, pid_t, pid);
125COMPAT_SYSCALL_WRAP1(sched_get_priority_max, int, policy);
126COMPAT_SYSCALL_WRAP1(sched_get_priority_min, int, policy);
127COMPAT_SYSCALL_WRAP5(mremap, unsigned long, addr, unsigned long, old_len, unsigned long, new_len, unsigned long, flags, unsigned long, new_addr); 104COMPAT_SYSCALL_WRAP5(mremap, unsigned long, addr, unsigned long, old_len, unsigned long, new_len, unsigned long, flags, unsigned long, new_addr);
128COMPAT_SYSCALL_WRAP3(poll, struct pollfd __user *, ufds, unsigned int, nfds, int, timeout); 105COMPAT_SYSCALL_WRAP3(poll, struct pollfd __user *, ufds, unsigned int, nfds, int, timeout);
129COMPAT_SYSCALL_WRAP5(prctl, int, option, unsigned long, arg2, unsigned long, arg3, unsigned long, arg4, unsigned long, arg5); 106COMPAT_SYSCALL_WRAP5(prctl, int, option, unsigned long, arg2, unsigned long, arg3, unsigned long, arg4, unsigned long, arg5);
@@ -131,20 +108,11 @@ COMPAT_SYSCALL_WRAP2(getcwd, char __user *, buf, unsigned long, size);
131COMPAT_SYSCALL_WRAP2(capget, cap_user_header_t, header, cap_user_data_t, dataptr); 108COMPAT_SYSCALL_WRAP2(capget, cap_user_header_t, header, cap_user_data_t, dataptr);
132COMPAT_SYSCALL_WRAP2(capset, cap_user_header_t, header, const cap_user_data_t, data); 109COMPAT_SYSCALL_WRAP2(capset, cap_user_header_t, header, const cap_user_data_t, data);
133COMPAT_SYSCALL_WRAP3(lchown, const char __user *, filename, uid_t, user, gid_t, group); 110COMPAT_SYSCALL_WRAP3(lchown, const char __user *, filename, uid_t, user, gid_t, group);
134COMPAT_SYSCALL_WRAP2(setreuid, uid_t, ruid, uid_t, euid);
135COMPAT_SYSCALL_WRAP2(setregid, gid_t, rgid, gid_t, egid);
136COMPAT_SYSCALL_WRAP2(getgroups, int, gidsetsize, gid_t __user *, grouplist); 111COMPAT_SYSCALL_WRAP2(getgroups, int, gidsetsize, gid_t __user *, grouplist);
137COMPAT_SYSCALL_WRAP2(setgroups, int, gidsetsize, gid_t __user *, grouplist); 112COMPAT_SYSCALL_WRAP2(setgroups, int, gidsetsize, gid_t __user *, grouplist);
138COMPAT_SYSCALL_WRAP3(fchown, unsigned int, fd, uid_t, user, gid_t, group);
139COMPAT_SYSCALL_WRAP3(setresuid, uid_t, ruid, uid_t, euid, uid_t, suid);
140COMPAT_SYSCALL_WRAP3(getresuid, uid_t __user *, ruid, uid_t __user *, euid, uid_t __user *, suid); 113COMPAT_SYSCALL_WRAP3(getresuid, uid_t __user *, ruid, uid_t __user *, euid, uid_t __user *, suid);
141COMPAT_SYSCALL_WRAP3(setresgid, gid_t, rgid, gid_t, egid, gid_t, sgid);
142COMPAT_SYSCALL_WRAP3(getresgid, gid_t __user *, rgid, gid_t __user *, egid, gid_t __user *, sgid); 114COMPAT_SYSCALL_WRAP3(getresgid, gid_t __user *, rgid, gid_t __user *, egid, gid_t __user *, sgid);
143COMPAT_SYSCALL_WRAP3(chown, const char __user *, filename, uid_t, user, gid_t, group); 115COMPAT_SYSCALL_WRAP3(chown, const char __user *, filename, uid_t, user, gid_t, group);
144COMPAT_SYSCALL_WRAP1(setuid, uid_t, uid);
145COMPAT_SYSCALL_WRAP1(setgid, gid_t, gid);
146COMPAT_SYSCALL_WRAP1(setfsuid, uid_t, uid);
147COMPAT_SYSCALL_WRAP1(setfsgid, gid_t, gid);
148COMPAT_SYSCALL_WRAP2(pivot_root, const char __user *, new_root, const char __user *, put_old); 116COMPAT_SYSCALL_WRAP2(pivot_root, const char __user *, new_root, const char __user *, put_old);
149COMPAT_SYSCALL_WRAP3(mincore, unsigned long, start, size_t, len, unsigned char __user *, vec); 117COMPAT_SYSCALL_WRAP3(mincore, unsigned long, start, size_t, len, unsigned char __user *, vec);
150COMPAT_SYSCALL_WRAP3(madvise, unsigned long, start, size_t, len, int, behavior); 118COMPAT_SYSCALL_WRAP3(madvise, unsigned long, start, size_t, len, int, behavior);
@@ -161,23 +129,16 @@ COMPAT_SYSCALL_WRAP3(flistxattr, int, fd, char __user *, list, size_t, size);
161COMPAT_SYSCALL_WRAP2(removexattr, const char __user *, path, const char __user *, name); 129COMPAT_SYSCALL_WRAP2(removexattr, const char __user *, path, const char __user *, name);
162COMPAT_SYSCALL_WRAP2(lremovexattr, const char __user *, path, const char __user *, name); 130COMPAT_SYSCALL_WRAP2(lremovexattr, const char __user *, path, const char __user *, name);
163COMPAT_SYSCALL_WRAP2(fremovexattr, int, fd, const char __user *, name); 131COMPAT_SYSCALL_WRAP2(fremovexattr, int, fd, const char __user *, name);
164COMPAT_SYSCALL_WRAP1(exit_group, int, error_code);
165COMPAT_SYSCALL_WRAP1(set_tid_address, int __user *, tidptr); 132COMPAT_SYSCALL_WRAP1(set_tid_address, int __user *, tidptr);
166COMPAT_SYSCALL_WRAP1(epoll_create, int, size);
167COMPAT_SYSCALL_WRAP4(epoll_ctl, int, epfd, int, op, int, fd, struct epoll_event __user *, event); 133COMPAT_SYSCALL_WRAP4(epoll_ctl, int, epfd, int, op, int, fd, struct epoll_event __user *, event);
168COMPAT_SYSCALL_WRAP4(epoll_wait, int, epfd, struct epoll_event __user *, events, int, maxevents, int, timeout); 134COMPAT_SYSCALL_WRAP4(epoll_wait, int, epfd, struct epoll_event __user *, events, int, maxevents, int, timeout);
169COMPAT_SYSCALL_WRAP1(timer_getoverrun, timer_t, timer_id);
170COMPAT_SYSCALL_WRAP1(timer_delete, compat_timer_t, compat_timer_id);
171COMPAT_SYSCALL_WRAP1(io_destroy, aio_context_t, ctx); 135COMPAT_SYSCALL_WRAP1(io_destroy, aio_context_t, ctx);
172COMPAT_SYSCALL_WRAP3(io_cancel, aio_context_t, ctx_id, struct iocb __user *, iocb, struct io_event __user *, result); 136COMPAT_SYSCALL_WRAP3(io_cancel, aio_context_t, ctx_id, struct iocb __user *, iocb, struct io_event __user *, result);
173COMPAT_SYSCALL_WRAP1(mq_unlink, const char __user *, name); 137COMPAT_SYSCALL_WRAP1(mq_unlink, const char __user *, name);
174COMPAT_SYSCALL_WRAP5(add_key, const char __user *, tp, const char __user *, dsc, const void __user *, pld, size_t, len, key_serial_t, id); 138COMPAT_SYSCALL_WRAP5(add_key, const char __user *, tp, const char __user *, dsc, const void __user *, pld, size_t, len, key_serial_t, id);
175COMPAT_SYSCALL_WRAP4(request_key, const char __user *, tp, const char __user *, dsc, const char __user *, info, key_serial_t, id); 139COMPAT_SYSCALL_WRAP4(request_key, const char __user *, tp, const char __user *, dsc, const char __user *, info, key_serial_t, id);
176COMPAT_SYSCALL_WRAP5(remap_file_pages, unsigned long, start, unsigned long, size, unsigned long, prot, unsigned long, pgoff, unsigned long, flags); 140COMPAT_SYSCALL_WRAP5(remap_file_pages, unsigned long, start, unsigned long, size, unsigned long, prot, unsigned long, pgoff, unsigned long, flags);
177COMPAT_SYSCALL_WRAP3(ioprio_set, int, which, int, who, int, ioprio);
178COMPAT_SYSCALL_WRAP2(ioprio_get, int, which, int, who);
179COMPAT_SYSCALL_WRAP3(inotify_add_watch, int, fd, const char __user *, path, u32, mask); 141COMPAT_SYSCALL_WRAP3(inotify_add_watch, int, fd, const char __user *, path, u32, mask);
180COMPAT_SYSCALL_WRAP2(inotify_rm_watch, int, fd, __s32, wd);
181COMPAT_SYSCALL_WRAP3(mkdirat, int, dfd, const char __user *, pathname, umode_t, mode); 142COMPAT_SYSCALL_WRAP3(mkdirat, int, dfd, const char __user *, pathname, umode_t, mode);
182COMPAT_SYSCALL_WRAP4(mknodat, int, dfd, const char __user *, filename, umode_t, mode, unsigned, dev); 143COMPAT_SYSCALL_WRAP4(mknodat, int, dfd, const char __user *, filename, umode_t, mode, unsigned, dev);
183COMPAT_SYSCALL_WRAP5(fchownat, int, dfd, const char __user *, filename, uid_t, user, gid_t, group, int, flag); 144COMPAT_SYSCALL_WRAP5(fchownat, int, dfd, const char __user *, filename, uid_t, user, gid_t, group, int, flag);
@@ -192,23 +153,11 @@ COMPAT_SYSCALL_WRAP1(unshare, unsigned long, unshare_flags);
192COMPAT_SYSCALL_WRAP6(splice, int, fd_in, loff_t __user *, off_in, int, fd_out, loff_t __user *, off_out, size_t, len, unsigned int, flags); 153COMPAT_SYSCALL_WRAP6(splice, int, fd_in, loff_t __user *, off_in, int, fd_out, loff_t __user *, off_out, size_t, len, unsigned int, flags);
193COMPAT_SYSCALL_WRAP4(tee, int, fdin, int, fdout, size_t, len, unsigned int, flags); 154COMPAT_SYSCALL_WRAP4(tee, int, fdin, int, fdout, size_t, len, unsigned int, flags);
194COMPAT_SYSCALL_WRAP3(getcpu, unsigned __user *, cpu, unsigned __user *, node, struct getcpu_cache __user *, cache); 155COMPAT_SYSCALL_WRAP3(getcpu, unsigned __user *, cpu, unsigned __user *, node, struct getcpu_cache __user *, cache);
195COMPAT_SYSCALL_WRAP1(eventfd, unsigned int, count);
196COMPAT_SYSCALL_WRAP2(timerfd_create, int, clockid, int, flags);
197COMPAT_SYSCALL_WRAP2(eventfd2, unsigned int, count, int, flags);
198COMPAT_SYSCALL_WRAP1(inotify_init1, int, flags);
199COMPAT_SYSCALL_WRAP2(pipe2, int __user *, fildes, int, flags); 156COMPAT_SYSCALL_WRAP2(pipe2, int __user *, fildes, int, flags);
200COMPAT_SYSCALL_WRAP3(dup3, unsigned int, oldfd, unsigned int, newfd, int, flags);
201COMPAT_SYSCALL_WRAP1(epoll_create1, int, flags);
202COMPAT_SYSCALL_WRAP2(tkill, int, pid, int, sig);
203COMPAT_SYSCALL_WRAP3(tgkill, int, tgid, int, pid, int, sig);
204COMPAT_SYSCALL_WRAP5(perf_event_open, struct perf_event_attr __user *, attr_uptr, pid_t, pid, int, cpu, int, group_fd, unsigned long, flags); 157COMPAT_SYSCALL_WRAP5(perf_event_open, struct perf_event_attr __user *, attr_uptr, pid_t, pid, int, cpu, int, group_fd, unsigned long, flags);
205COMPAT_SYSCALL_WRAP5(clone, unsigned long, newsp, unsigned long, clone_flags, int __user *, parent_tidptr, int __user *, child_tidptr, unsigned long, tls); 158COMPAT_SYSCALL_WRAP5(clone, unsigned long, newsp, unsigned long, clone_flags, int __user *, parent_tidptr, int __user *, child_tidptr, unsigned long, tls);
206COMPAT_SYSCALL_WRAP2(fanotify_init, unsigned int, flags, unsigned int, event_f_flags);
207COMPAT_SYSCALL_WRAP4(prlimit64, pid_t, pid, unsigned int, resource, const struct rlimit64 __user *, new_rlim, struct rlimit64 __user *, old_rlim); 159COMPAT_SYSCALL_WRAP4(prlimit64, pid_t, pid, unsigned int, resource, const struct rlimit64 __user *, new_rlim, struct rlimit64 __user *, old_rlim);
208COMPAT_SYSCALL_WRAP5(name_to_handle_at, int, dfd, const char __user *, name, struct file_handle __user *, handle, int __user *, mnt_id, int, flag); 160COMPAT_SYSCALL_WRAP5(name_to_handle_at, int, dfd, const char __user *, name, struct file_handle __user *, handle, int __user *, mnt_id, int, flag);
209COMPAT_SYSCALL_WRAP1(syncfs, int, fd);
210COMPAT_SYSCALL_WRAP2(setns, int, fd, int, nstype);
211COMPAT_SYSCALL_WRAP2(s390_runtime_instr, int, command, int, signum);
212COMPAT_SYSCALL_WRAP5(kcmp, pid_t, pid1, pid_t, pid2, int, type, unsigned long, idx1, unsigned long, idx2); 161COMPAT_SYSCALL_WRAP5(kcmp, pid_t, pid1, pid_t, pid2, int, type, unsigned long, idx1, unsigned long, idx2);
213COMPAT_SYSCALL_WRAP3(finit_module, int, fd, const char __user *, uargs, int, flags); 162COMPAT_SYSCALL_WRAP3(finit_module, int, fd, const char __user *, uargs, int, flags);
214COMPAT_SYSCALL_WRAP3(sched_setattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, flags); 163COMPAT_SYSCALL_WRAP3(sched_setattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, flags);
@@ -220,3 +169,10 @@ COMPAT_SYSCALL_WRAP2(memfd_create, const char __user *, uname, unsigned int, fla
220COMPAT_SYSCALL_WRAP3(bpf, int, cmd, union bpf_attr *, attr, unsigned int, size); 169COMPAT_SYSCALL_WRAP3(bpf, int, cmd, union bpf_attr *, attr, unsigned int, size);
221COMPAT_SYSCALL_WRAP3(s390_pci_mmio_write, const unsigned long, mmio_addr, const void __user *, user_buffer, const size_t, length); 170COMPAT_SYSCALL_WRAP3(s390_pci_mmio_write, const unsigned long, mmio_addr, const void __user *, user_buffer, const size_t, length);
222COMPAT_SYSCALL_WRAP3(s390_pci_mmio_read, const unsigned long, mmio_addr, void __user *, user_buffer, const size_t, length); 171COMPAT_SYSCALL_WRAP3(s390_pci_mmio_read, const unsigned long, mmio_addr, void __user *, user_buffer, const size_t, length);
172COMPAT_SYSCALL_WRAP4(socketpair, int, family, int, type, int, protocol, int __user *, usockvec);
173COMPAT_SYSCALL_WRAP3(bind, int, fd, struct sockaddr __user *, umyaddr, int, addrlen);
174COMPAT_SYSCALL_WRAP3(connect, int, fd, struct sockaddr __user *, uservaddr, int, addrlen);
175COMPAT_SYSCALL_WRAP4(accept4, int, fd, struct sockaddr __user *, upeer_sockaddr, int __user *, upeer_addrlen, int, flags);
176COMPAT_SYSCALL_WRAP3(getsockname, int, fd, struct sockaddr __user *, usockaddr, int __user *, usockaddr_len);
177COMPAT_SYSCALL_WRAP3(getpeername, int, fd, struct sockaddr __user *, usockaddr, int __user *, usockaddr_len);
178COMPAT_SYSCALL_WRAP6(sendto, int, fd, void __user *, buff, size_t, len, unsigned int, flags, struct sockaddr __user *, addr, int, addr_len);
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 247b7aae4c6d..09b039d7983d 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -1191,6 +1191,7 @@ cleanup_critical:
1191 clg %r9,BASED(.Lcleanup_save_fpu_fpc_end) 1191 clg %r9,BASED(.Lcleanup_save_fpu_fpc_end)
1192 jhe 1f 1192 jhe 1f
1193 lg %r2,__LC_CURRENT 1193 lg %r2,__LC_CURRENT
1194 aghi %r2,__TASK_thread
11940: # Store floating-point controls 11950: # Store floating-point controls
1195 stfpc __THREAD_FPU_fpc(%r2) 1196 stfpc __THREAD_FPU_fpc(%r2)
11961: # Load register save area and check if VX is active 11971: # Load register save area and check if VX is active
@@ -1252,6 +1253,7 @@ cleanup_critical:
1252 clg %r9,BASED(.Lcleanup_load_fpu_regs_vx_ctl) 1253 clg %r9,BASED(.Lcleanup_load_fpu_regs_vx_ctl)
1253 jhe 6f 1254 jhe 6f
1254 lg %r4,__LC_CURRENT 1255 lg %r4,__LC_CURRENT
1256 aghi %r4,__TASK_thread
1255 lfpc __THREAD_FPU_fpc(%r4) 1257 lfpc __THREAD_FPU_fpc(%r4)
1256 tm __THREAD_FPU_flags+3(%r4),FPU_USE_VX # VX-enabled task ? 1258 tm __THREAD_FPU_flags+3(%r4),FPU_USE_VX # VX-enabled task ?
1257 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area 1259 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_cf.c
index 56fdad479115..a9563409c36e 100644
--- a/arch/s390/kernel/perf_cpum_cf.c
+++ b/arch/s390/kernel/perf_cpum_cf.c
@@ -157,10 +157,14 @@ static int validate_ctr_auth(const struct hw_perf_event *hwc)
157 157
158 cpuhw = &get_cpu_var(cpu_hw_events); 158 cpuhw = &get_cpu_var(cpu_hw_events);
159 159
160 /* check authorization for cpu counter sets */ 160 /* Check authorization for cpu counter sets.
161 * If the particular CPU counter set is not authorized,
162 * return with -ENOENT in order to fall back to other
163 * PMUs that might suffice the event request.
164 */
161 ctrs_state = cpumf_state_ctl[hwc->config_base]; 165 ctrs_state = cpumf_state_ctl[hwc->config_base];
162 if (!(ctrs_state & cpuhw->info.auth_ctl)) 166 if (!(ctrs_state & cpuhw->info.auth_ctl))
163 err = -EPERM; 167 err = -ENOENT;
164 168
165 put_cpu_var(cpu_hw_events); 169 put_cpu_var(cpu_hw_events);
166 return err; 170 return err;
@@ -536,7 +540,7 @@ static int cpumf_pmu_add(struct perf_event *event, int flags)
536 */ 540 */
537 if (!(cpuhw->flags & PERF_EVENT_TXN)) 541 if (!(cpuhw->flags & PERF_EVENT_TXN))
538 if (validate_ctr_auth(&event->hw)) 542 if (validate_ctr_auth(&event->hw))
539 return -EPERM; 543 return -ENOENT;
540 544
541 ctr_set_enable(&cpuhw->state, event->hw.config_base); 545 ctr_set_enable(&cpuhw->state, event->hw.config_base);
542 event->hw.state = PERF_HES_UPTODATE | PERF_HES_STOPPED; 546 event->hw.state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
@@ -611,7 +615,7 @@ static int cpumf_pmu_commit_txn(struct pmu *pmu)
611 state = cpuhw->state & ~((1 << CPUMF_LCCTL_ENABLE_SHIFT) - 1); 615 state = cpuhw->state & ~((1 << CPUMF_LCCTL_ENABLE_SHIFT) - 1);
612 state >>= CPUMF_LCCTL_ENABLE_SHIFT; 616 state >>= CPUMF_LCCTL_ENABLE_SHIFT;
613 if ((state & cpuhw->info.auth_ctl) != state) 617 if ((state & cpuhw->info.auth_ctl) != state)
614 return -EPERM; 618 return -ENOENT;
615 619
616 cpuhw->flags &= ~PERF_EVENT_TXN; 620 cpuhw->flags &= ~PERF_EVENT_TXN;
617 perf_pmu_enable(pmu); 621 perf_pmu_enable(pmu);
diff --git a/arch/s390/kernel/swsusp.S b/arch/s390/kernel/swsusp.S
index ca6294645dd3..2d6b6e81f812 100644
--- a/arch/s390/kernel/swsusp.S
+++ b/arch/s390/kernel/swsusp.S
@@ -30,6 +30,9 @@ ENTRY(swsusp_arch_suspend)
30 aghi %r15,-STACK_FRAME_OVERHEAD 30 aghi %r15,-STACK_FRAME_OVERHEAD
31 stg %r1,__SF_BACKCHAIN(%r15) 31 stg %r1,__SF_BACKCHAIN(%r15)
32 32
33 /* Store FPU registers */
34 brasl %r14,save_fpu_regs
35
33 /* Deactivate DAT */ 36 /* Deactivate DAT */
34 stnsm __SF_EMPTY(%r15),0xfb 37 stnsm __SF_EMPTY(%r15),0xfb
35 38
@@ -47,23 +50,6 @@ ENTRY(swsusp_arch_suspend)
47 50
48 /* Store registers */ 51 /* Store registers */
49 mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */ 52 mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
50 stfpc 0x31c(%r1) /* store fpu control */
51 std 0,0x200(%r1) /* store f0 */
52 std 1,0x208(%r1) /* store f1 */
53 std 2,0x210(%r1) /* store f2 */
54 std 3,0x218(%r1) /* store f3 */
55 std 4,0x220(%r1) /* store f4 */
56 std 5,0x228(%r1) /* store f5 */
57 std 6,0x230(%r1) /* store f6 */
58 std 7,0x238(%r1) /* store f7 */
59 std 8,0x240(%r1) /* store f8 */
60 std 9,0x248(%r1) /* store f9 */
61 std 10,0x250(%r1) /* store f10 */
62 std 11,0x258(%r1) /* store f11 */
63 std 12,0x260(%r1) /* store f12 */
64 std 13,0x268(%r1) /* store f13 */
65 std 14,0x270(%r1) /* store f14 */
66 std 15,0x278(%r1) /* store f15 */
67 stam %a0,%a15,0x340(%r1) /* store access registers */ 53 stam %a0,%a15,0x340(%r1) /* store access registers */
68 stctg %c0,%c15,0x380(%r1) /* store control registers */ 54 stctg %c0,%c15,0x380(%r1) /* store control registers */
69 stmg %r0,%r15,0x280(%r1) /* store general registers */ 55 stmg %r0,%r15,0x280(%r1) /* store general registers */
@@ -249,24 +235,6 @@ restore_registers:
249 lctlg %c0,%c15,0x380(%r13) /* load control registers */ 235 lctlg %c0,%c15,0x380(%r13) /* load control registers */
250 lam %a0,%a15,0x340(%r13) /* load access registers */ 236 lam %a0,%a15,0x340(%r13) /* load access registers */
251 237
252 lfpc 0x31c(%r13) /* load fpu control */
253 ld 0,0x200(%r13) /* load f0 */
254 ld 1,0x208(%r13) /* load f1 */
255 ld 2,0x210(%r13) /* load f2 */
256 ld 3,0x218(%r13) /* load f3 */
257 ld 4,0x220(%r13) /* load f4 */
258 ld 5,0x228(%r13) /* load f5 */
259 ld 6,0x230(%r13) /* load f6 */
260 ld 7,0x238(%r13) /* load f7 */
261 ld 8,0x240(%r13) /* load f8 */
262 ld 9,0x248(%r13) /* load f9 */
263 ld 10,0x250(%r13) /* load f10 */
264 ld 11,0x258(%r13) /* load f11 */
265 ld 12,0x260(%r13) /* load f12 */
266 ld 13,0x268(%r13) /* load f13 */
267 ld 14,0x270(%r13) /* load f14 */
268 ld 15,0x278(%r13) /* load f15 */
269
270 /* Load old stack */ 238 /* Load old stack */
271 lg %r15,0x2f8(%r13) 239 lg %r15,0x2f8(%r13)
272 240
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index f3f4a137aef6..8c56929c8d82 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -9,12 +9,12 @@
9#define NI_SYSCALL SYSCALL(sys_ni_syscall,sys_ni_syscall) 9#define NI_SYSCALL SYSCALL(sys_ni_syscall,sys_ni_syscall)
10 10
11NI_SYSCALL /* 0 */ 11NI_SYSCALL /* 0 */
12SYSCALL(sys_exit,compat_sys_exit) 12SYSCALL(sys_exit,sys_exit)
13SYSCALL(sys_fork,sys_fork) 13SYSCALL(sys_fork,sys_fork)
14SYSCALL(sys_read,compat_sys_s390_read) 14SYSCALL(sys_read,compat_sys_s390_read)
15SYSCALL(sys_write,compat_sys_s390_write) 15SYSCALL(sys_write,compat_sys_s390_write)
16SYSCALL(sys_open,compat_sys_open) /* 5 */ 16SYSCALL(sys_open,compat_sys_open) /* 5 */
17SYSCALL(sys_close,compat_sys_close) 17SYSCALL(sys_close,sys_close)
18SYSCALL(sys_restart_syscall,sys_restart_syscall) 18SYSCALL(sys_restart_syscall,sys_restart_syscall)
19SYSCALL(sys_creat,compat_sys_creat) 19SYSCALL(sys_creat,compat_sys_creat)
20SYSCALL(sys_link,compat_sys_link) 20SYSCALL(sys_link,compat_sys_link)
@@ -35,21 +35,21 @@ SYSCALL(sys_ni_syscall,compat_sys_s390_setuid16) /* old setuid16 syscall*/
35SYSCALL(sys_ni_syscall,compat_sys_s390_getuid16) /* old getuid16 syscall*/ 35SYSCALL(sys_ni_syscall,compat_sys_s390_getuid16) /* old getuid16 syscall*/
36SYSCALL(sys_ni_syscall,compat_sys_stime) /* 25 old stime syscall */ 36SYSCALL(sys_ni_syscall,compat_sys_stime) /* 25 old stime syscall */
37SYSCALL(sys_ptrace,compat_sys_ptrace) 37SYSCALL(sys_ptrace,compat_sys_ptrace)
38SYSCALL(sys_alarm,compat_sys_alarm) 38SYSCALL(sys_alarm,sys_alarm)
39NI_SYSCALL /* old fstat syscall */ 39NI_SYSCALL /* old fstat syscall */
40SYSCALL(sys_pause,sys_pause) 40SYSCALL(sys_pause,sys_pause)
41SYSCALL(sys_utime,compat_sys_utime) /* 30 */ 41SYSCALL(sys_utime,compat_sys_utime) /* 30 */
42NI_SYSCALL /* old stty syscall */ 42NI_SYSCALL /* old stty syscall */
43NI_SYSCALL /* old gtty syscall */ 43NI_SYSCALL /* old gtty syscall */
44SYSCALL(sys_access,compat_sys_access) 44SYSCALL(sys_access,compat_sys_access)
45SYSCALL(sys_nice,compat_sys_nice) 45SYSCALL(sys_nice,sys_nice)
46NI_SYSCALL /* 35 old ftime syscall */ 46NI_SYSCALL /* 35 old ftime syscall */
47SYSCALL(sys_sync,sys_sync) 47SYSCALL(sys_sync,sys_sync)
48SYSCALL(sys_kill,compat_sys_kill) 48SYSCALL(sys_kill,sys_kill)
49SYSCALL(sys_rename,compat_sys_rename) 49SYSCALL(sys_rename,compat_sys_rename)
50SYSCALL(sys_mkdir,compat_sys_mkdir) 50SYSCALL(sys_mkdir,compat_sys_mkdir)
51SYSCALL(sys_rmdir,compat_sys_rmdir) /* 40 */ 51SYSCALL(sys_rmdir,compat_sys_rmdir) /* 40 */
52SYSCALL(sys_dup,compat_sys_dup) 52SYSCALL(sys_dup,sys_dup)
53SYSCALL(sys_pipe,compat_sys_pipe) 53SYSCALL(sys_pipe,compat_sys_pipe)
54SYSCALL(sys_times,compat_sys_times) 54SYSCALL(sys_times,compat_sys_times)
55NI_SYSCALL /* old prof syscall */ 55NI_SYSCALL /* old prof syscall */
@@ -65,13 +65,13 @@ NI_SYSCALL /* old lock syscall */
65SYSCALL(sys_ioctl,compat_sys_ioctl) 65SYSCALL(sys_ioctl,compat_sys_ioctl)
66SYSCALL(sys_fcntl,compat_sys_fcntl) /* 55 */ 66SYSCALL(sys_fcntl,compat_sys_fcntl) /* 55 */
67NI_SYSCALL /* intel mpx syscall */ 67NI_SYSCALL /* intel mpx syscall */
68SYSCALL(sys_setpgid,compat_sys_setpgid) 68SYSCALL(sys_setpgid,sys_setpgid)
69NI_SYSCALL /* old ulimit syscall */ 69NI_SYSCALL /* old ulimit syscall */
70NI_SYSCALL /* old uname syscall */ 70NI_SYSCALL /* old uname syscall */
71SYSCALL(sys_umask,compat_sys_umask) /* 60 */ 71SYSCALL(sys_umask,sys_umask) /* 60 */
72SYSCALL(sys_chroot,compat_sys_chroot) 72SYSCALL(sys_chroot,compat_sys_chroot)
73SYSCALL(sys_ustat,compat_sys_ustat) 73SYSCALL(sys_ustat,compat_sys_ustat)
74SYSCALL(sys_dup2,compat_sys_dup2) 74SYSCALL(sys_dup2,sys_dup2)
75SYSCALL(sys_getppid,sys_getppid) 75SYSCALL(sys_getppid,sys_getppid)
76SYSCALL(sys_getpgrp,sys_getpgrp) /* 65 */ 76SYSCALL(sys_getpgrp,sys_getpgrp) /* 65 */
77SYSCALL(sys_setsid,sys_setsid) 77SYSCALL(sys_setsid,sys_setsid)
@@ -102,10 +102,10 @@ SYSCALL(sys_old_mmap,compat_sys_s390_old_mmap) /* 90 */
102SYSCALL(sys_munmap,compat_sys_munmap) 102SYSCALL(sys_munmap,compat_sys_munmap)
103SYSCALL(sys_truncate,compat_sys_truncate) 103SYSCALL(sys_truncate,compat_sys_truncate)
104SYSCALL(sys_ftruncate,compat_sys_ftruncate) 104SYSCALL(sys_ftruncate,compat_sys_ftruncate)
105SYSCALL(sys_fchmod,compat_sys_fchmod) 105SYSCALL(sys_fchmod,sys_fchmod)
106SYSCALL(sys_ni_syscall,compat_sys_s390_fchown16) /* 95 old fchown16 syscall*/ 106SYSCALL(sys_ni_syscall,compat_sys_s390_fchown16) /* 95 old fchown16 syscall*/
107SYSCALL(sys_getpriority,compat_sys_getpriority) 107SYSCALL(sys_getpriority,sys_getpriority)
108SYSCALL(sys_setpriority,compat_sys_setpriority) 108SYSCALL(sys_setpriority,sys_setpriority)
109NI_SYSCALL /* old profil syscall */ 109NI_SYSCALL /* old profil syscall */
110SYSCALL(sys_statfs,compat_sys_statfs) 110SYSCALL(sys_statfs,compat_sys_statfs)
111SYSCALL(sys_fstatfs,compat_sys_fstatfs) /* 100 */ 111SYSCALL(sys_fstatfs,compat_sys_fstatfs) /* 100 */
@@ -126,7 +126,7 @@ SYSCALL(sys_wait4,compat_sys_wait4)
126SYSCALL(sys_swapoff,compat_sys_swapoff) /* 115 */ 126SYSCALL(sys_swapoff,compat_sys_swapoff) /* 115 */
127SYSCALL(sys_sysinfo,compat_sys_sysinfo) 127SYSCALL(sys_sysinfo,compat_sys_sysinfo)
128SYSCALL(sys_s390_ipc,compat_sys_s390_ipc) 128SYSCALL(sys_s390_ipc,compat_sys_s390_ipc)
129SYSCALL(sys_fsync,compat_sys_fsync) 129SYSCALL(sys_fsync,sys_fsync)
130SYSCALL(sys_sigreturn,compat_sys_sigreturn) 130SYSCALL(sys_sigreturn,compat_sys_sigreturn)
131SYSCALL(sys_clone,compat_sys_clone) /* 120 */ 131SYSCALL(sys_clone,compat_sys_clone) /* 120 */
132SYSCALL(sys_setdomainname,compat_sys_setdomainname) 132SYSCALL(sys_setdomainname,compat_sys_setdomainname)
@@ -140,35 +140,35 @@ SYSCALL(sys_init_module,compat_sys_init_module)
140SYSCALL(sys_delete_module,compat_sys_delete_module) 140SYSCALL(sys_delete_module,compat_sys_delete_module)
141NI_SYSCALL /* 130: old get_kernel_syms */ 141NI_SYSCALL /* 130: old get_kernel_syms */
142SYSCALL(sys_quotactl,compat_sys_quotactl) 142SYSCALL(sys_quotactl,compat_sys_quotactl)
143SYSCALL(sys_getpgid,compat_sys_getpgid) 143SYSCALL(sys_getpgid,sys_getpgid)
144SYSCALL(sys_fchdir,compat_sys_fchdir) 144SYSCALL(sys_fchdir,sys_fchdir)
145SYSCALL(sys_bdflush,compat_sys_bdflush) 145SYSCALL(sys_bdflush,compat_sys_bdflush)
146SYSCALL(sys_sysfs,compat_sys_sysfs) /* 135 */ 146SYSCALL(sys_sysfs,compat_sys_sysfs) /* 135 */
147SYSCALL(sys_s390_personality,compat_sys_s390_personality) 147SYSCALL(sys_s390_personality,sys_s390_personality)
148NI_SYSCALL /* for afs_syscall */ 148NI_SYSCALL /* for afs_syscall */
149SYSCALL(sys_ni_syscall,compat_sys_s390_setfsuid16) /* old setfsuid16 syscall */ 149SYSCALL(sys_ni_syscall,compat_sys_s390_setfsuid16) /* old setfsuid16 syscall */
150SYSCALL(sys_ni_syscall,compat_sys_s390_setfsgid16) /* old setfsgid16 syscall */ 150SYSCALL(sys_ni_syscall,compat_sys_s390_setfsgid16) /* old setfsgid16 syscall */
151SYSCALL(sys_llseek,compat_sys_llseek) /* 140 */ 151SYSCALL(sys_llseek,compat_sys_llseek) /* 140 */
152SYSCALL(sys_getdents,compat_sys_getdents) 152SYSCALL(sys_getdents,compat_sys_getdents)
153SYSCALL(sys_select,compat_sys_select) 153SYSCALL(sys_select,compat_sys_select)
154SYSCALL(sys_flock,compat_sys_flock) 154SYSCALL(sys_flock,sys_flock)
155SYSCALL(sys_msync,compat_sys_msync) 155SYSCALL(sys_msync,compat_sys_msync)
156SYSCALL(sys_readv,compat_sys_readv) /* 145 */ 156SYSCALL(sys_readv,compat_sys_readv) /* 145 */
157SYSCALL(sys_writev,compat_sys_writev) 157SYSCALL(sys_writev,compat_sys_writev)
158SYSCALL(sys_getsid,compat_sys_getsid) 158SYSCALL(sys_getsid,sys_getsid)
159SYSCALL(sys_fdatasync,compat_sys_fdatasync) 159SYSCALL(sys_fdatasync,sys_fdatasync)
160SYSCALL(sys_sysctl,compat_sys_sysctl) 160SYSCALL(sys_sysctl,compat_sys_sysctl)
161SYSCALL(sys_mlock,compat_sys_mlock) /* 150 */ 161SYSCALL(sys_mlock,compat_sys_mlock) /* 150 */
162SYSCALL(sys_munlock,compat_sys_munlock) 162SYSCALL(sys_munlock,compat_sys_munlock)
163SYSCALL(sys_mlockall,compat_sys_mlockall) 163SYSCALL(sys_mlockall,sys_mlockall)
164SYSCALL(sys_munlockall,sys_munlockall) 164SYSCALL(sys_munlockall,sys_munlockall)
165SYSCALL(sys_sched_setparam,compat_sys_sched_setparam) 165SYSCALL(sys_sched_setparam,compat_sys_sched_setparam)
166SYSCALL(sys_sched_getparam,compat_sys_sched_getparam) /* 155 */ 166SYSCALL(sys_sched_getparam,compat_sys_sched_getparam) /* 155 */
167SYSCALL(sys_sched_setscheduler,compat_sys_sched_setscheduler) 167SYSCALL(sys_sched_setscheduler,compat_sys_sched_setscheduler)
168SYSCALL(sys_sched_getscheduler,compat_sys_sched_getscheduler) 168SYSCALL(sys_sched_getscheduler,sys_sched_getscheduler)
169SYSCALL(sys_sched_yield,sys_sched_yield) 169SYSCALL(sys_sched_yield,sys_sched_yield)
170SYSCALL(sys_sched_get_priority_max,compat_sys_sched_get_priority_max) 170SYSCALL(sys_sched_get_priority_max,sys_sched_get_priority_max)
171SYSCALL(sys_sched_get_priority_min,compat_sys_sched_get_priority_min) /* 160 */ 171SYSCALL(sys_sched_get_priority_min,sys_sched_get_priority_min) /* 160 */
172SYSCALL(sys_sched_rr_get_interval,compat_sys_sched_rr_get_interval) 172SYSCALL(sys_sched_rr_get_interval,compat_sys_sched_rr_get_interval)
173SYSCALL(sys_nanosleep,compat_sys_nanosleep) 173SYSCALL(sys_nanosleep,compat_sys_nanosleep)
174SYSCALL(sys_mremap,compat_sys_mremap) 174SYSCALL(sys_mremap,compat_sys_mremap)
@@ -211,20 +211,20 @@ SYSCALL(sys_getuid,sys_getuid)
211SYSCALL(sys_getgid,sys_getgid) /* 200 */ 211SYSCALL(sys_getgid,sys_getgid) /* 200 */
212SYSCALL(sys_geteuid,sys_geteuid) 212SYSCALL(sys_geteuid,sys_geteuid)
213SYSCALL(sys_getegid,sys_getegid) 213SYSCALL(sys_getegid,sys_getegid)
214SYSCALL(sys_setreuid,compat_sys_setreuid) 214SYSCALL(sys_setreuid,sys_setreuid)
215SYSCALL(sys_setregid,compat_sys_setregid) 215SYSCALL(sys_setregid,sys_setregid)
216SYSCALL(sys_getgroups,compat_sys_getgroups) /* 205 */ 216SYSCALL(sys_getgroups,compat_sys_getgroups) /* 205 */
217SYSCALL(sys_setgroups,compat_sys_setgroups) 217SYSCALL(sys_setgroups,compat_sys_setgroups)
218SYSCALL(sys_fchown,compat_sys_fchown) 218SYSCALL(sys_fchown,sys_fchown)
219SYSCALL(sys_setresuid,compat_sys_setresuid) 219SYSCALL(sys_setresuid,sys_setresuid)
220SYSCALL(sys_getresuid,compat_sys_getresuid) 220SYSCALL(sys_getresuid,compat_sys_getresuid)
221SYSCALL(sys_setresgid,compat_sys_setresgid) /* 210 */ 221SYSCALL(sys_setresgid,sys_setresgid) /* 210 */
222SYSCALL(sys_getresgid,compat_sys_getresgid) 222SYSCALL(sys_getresgid,compat_sys_getresgid)
223SYSCALL(sys_chown,compat_sys_chown) 223SYSCALL(sys_chown,compat_sys_chown)
224SYSCALL(sys_setuid,compat_sys_setuid) 224SYSCALL(sys_setuid,sys_setuid)
225SYSCALL(sys_setgid,compat_sys_setgid) 225SYSCALL(sys_setgid,sys_setgid)
226SYSCALL(sys_setfsuid,compat_sys_setfsuid) /* 215 */ 226SYSCALL(sys_setfsuid,sys_setfsuid) /* 215 */
227SYSCALL(sys_setfsgid,compat_sys_setfsgid) 227SYSCALL(sys_setfsgid,sys_setfsgid)
228SYSCALL(sys_pivot_root,compat_sys_pivot_root) 228SYSCALL(sys_pivot_root,compat_sys_pivot_root)
229SYSCALL(sys_mincore,compat_sys_mincore) 229SYSCALL(sys_mincore,compat_sys_mincore)
230SYSCALL(sys_madvise,compat_sys_madvise) 230SYSCALL(sys_madvise,compat_sys_madvise)
@@ -245,19 +245,19 @@ SYSCALL(sys_removexattr,compat_sys_removexattr)
245SYSCALL(sys_lremovexattr,compat_sys_lremovexattr) 245SYSCALL(sys_lremovexattr,compat_sys_lremovexattr)
246SYSCALL(sys_fremovexattr,compat_sys_fremovexattr) /* 235 */ 246SYSCALL(sys_fremovexattr,compat_sys_fremovexattr) /* 235 */
247SYSCALL(sys_gettid,sys_gettid) 247SYSCALL(sys_gettid,sys_gettid)
248SYSCALL(sys_tkill,compat_sys_tkill) 248SYSCALL(sys_tkill,sys_tkill)
249SYSCALL(sys_futex,compat_sys_futex) 249SYSCALL(sys_futex,compat_sys_futex)
250SYSCALL(sys_sched_setaffinity,compat_sys_sched_setaffinity) 250SYSCALL(sys_sched_setaffinity,compat_sys_sched_setaffinity)
251SYSCALL(sys_sched_getaffinity,compat_sys_sched_getaffinity) /* 240 */ 251SYSCALL(sys_sched_getaffinity,compat_sys_sched_getaffinity) /* 240 */
252SYSCALL(sys_tgkill,compat_sys_tgkill) 252SYSCALL(sys_tgkill,sys_tgkill)
253NI_SYSCALL /* reserved for TUX */ 253NI_SYSCALL /* reserved for TUX */
254SYSCALL(sys_io_setup,compat_sys_io_setup) 254SYSCALL(sys_io_setup,compat_sys_io_setup)
255SYSCALL(sys_io_destroy,compat_sys_io_destroy) 255SYSCALL(sys_io_destroy,compat_sys_io_destroy)
256SYSCALL(sys_io_getevents,compat_sys_io_getevents) /* 245 */ 256SYSCALL(sys_io_getevents,compat_sys_io_getevents) /* 245 */
257SYSCALL(sys_io_submit,compat_sys_io_submit) 257SYSCALL(sys_io_submit,compat_sys_io_submit)
258SYSCALL(sys_io_cancel,compat_sys_io_cancel) 258SYSCALL(sys_io_cancel,compat_sys_io_cancel)
259SYSCALL(sys_exit_group,compat_sys_exit_group) 259SYSCALL(sys_exit_group,sys_exit_group)
260SYSCALL(sys_epoll_create,compat_sys_epoll_create) 260SYSCALL(sys_epoll_create,sys_epoll_create)
261SYSCALL(sys_epoll_ctl,compat_sys_epoll_ctl) /* 250 */ 261SYSCALL(sys_epoll_ctl,compat_sys_epoll_ctl) /* 250 */
262SYSCALL(sys_epoll_wait,compat_sys_epoll_wait) 262SYSCALL(sys_epoll_wait,compat_sys_epoll_wait)
263SYSCALL(sys_set_tid_address,compat_sys_set_tid_address) 263SYSCALL(sys_set_tid_address,compat_sys_set_tid_address)
@@ -265,8 +265,8 @@ SYSCALL(sys_fadvise64_64,compat_sys_s390_fadvise64)
265SYSCALL(sys_timer_create,compat_sys_timer_create) 265SYSCALL(sys_timer_create,compat_sys_timer_create)
266SYSCALL(sys_timer_settime,compat_sys_timer_settime) /* 255 */ 266SYSCALL(sys_timer_settime,compat_sys_timer_settime) /* 255 */
267SYSCALL(sys_timer_gettime,compat_sys_timer_gettime) 267SYSCALL(sys_timer_gettime,compat_sys_timer_gettime)
268SYSCALL(sys_timer_getoverrun,compat_sys_timer_getoverrun) 268SYSCALL(sys_timer_getoverrun,sys_timer_getoverrun)
269SYSCALL(sys_timer_delete,compat_sys_timer_delete) 269SYSCALL(sys_timer_delete,sys_timer_delete)
270SYSCALL(sys_clock_settime,compat_sys_clock_settime) 270SYSCALL(sys_clock_settime,compat_sys_clock_settime)
271SYSCALL(sys_clock_gettime,compat_sys_clock_gettime) /* 260 */ 271SYSCALL(sys_clock_gettime,compat_sys_clock_gettime) /* 260 */
272SYSCALL(sys_clock_getres,compat_sys_clock_getres) 272SYSCALL(sys_clock_getres,compat_sys_clock_getres)
@@ -290,11 +290,11 @@ SYSCALL(sys_add_key,compat_sys_add_key)
290SYSCALL(sys_request_key,compat_sys_request_key) 290SYSCALL(sys_request_key,compat_sys_request_key)
291SYSCALL(sys_keyctl,compat_sys_keyctl) /* 280 */ 291SYSCALL(sys_keyctl,compat_sys_keyctl) /* 280 */
292SYSCALL(sys_waitid,compat_sys_waitid) 292SYSCALL(sys_waitid,compat_sys_waitid)
293SYSCALL(sys_ioprio_set,compat_sys_ioprio_set) 293SYSCALL(sys_ioprio_set,sys_ioprio_set)
294SYSCALL(sys_ioprio_get,compat_sys_ioprio_get) 294SYSCALL(sys_ioprio_get,sys_ioprio_get)
295SYSCALL(sys_inotify_init,sys_inotify_init) 295SYSCALL(sys_inotify_init,sys_inotify_init)
296SYSCALL(sys_inotify_add_watch,compat_sys_inotify_add_watch) /* 285 */ 296SYSCALL(sys_inotify_add_watch,compat_sys_inotify_add_watch) /* 285 */
297SYSCALL(sys_inotify_rm_watch,compat_sys_inotify_rm_watch) 297SYSCALL(sys_inotify_rm_watch,sys_inotify_rm_watch)
298SYSCALL(sys_migrate_pages,compat_sys_migrate_pages) 298SYSCALL(sys_migrate_pages,compat_sys_migrate_pages)
299SYSCALL(sys_openat,compat_sys_openat) 299SYSCALL(sys_openat,compat_sys_openat)
300SYSCALL(sys_mkdirat,compat_sys_mkdirat) 300SYSCALL(sys_mkdirat,compat_sys_mkdirat)
@@ -326,31 +326,31 @@ SYSCALL(sys_fallocate,compat_sys_s390_fallocate)
326SYSCALL(sys_utimensat,compat_sys_utimensat) /* 315 */ 326SYSCALL(sys_utimensat,compat_sys_utimensat) /* 315 */
327SYSCALL(sys_signalfd,compat_sys_signalfd) 327SYSCALL(sys_signalfd,compat_sys_signalfd)
328NI_SYSCALL /* 317 old sys_timer_fd */ 328NI_SYSCALL /* 317 old sys_timer_fd */
329SYSCALL(sys_eventfd,compat_sys_eventfd) 329SYSCALL(sys_eventfd,sys_eventfd)
330SYSCALL(sys_timerfd_create,compat_sys_timerfd_create) 330SYSCALL(sys_timerfd_create,sys_timerfd_create)
331SYSCALL(sys_timerfd_settime,compat_sys_timerfd_settime) /* 320 */ 331SYSCALL(sys_timerfd_settime,compat_sys_timerfd_settime) /* 320 */
332SYSCALL(sys_timerfd_gettime,compat_sys_timerfd_gettime) 332SYSCALL(sys_timerfd_gettime,compat_sys_timerfd_gettime)
333SYSCALL(sys_signalfd4,compat_sys_signalfd4) 333SYSCALL(sys_signalfd4,compat_sys_signalfd4)
334SYSCALL(sys_eventfd2,compat_sys_eventfd2) 334SYSCALL(sys_eventfd2,sys_eventfd2)
335SYSCALL(sys_inotify_init1,compat_sys_inotify_init1) 335SYSCALL(sys_inotify_init1,sys_inotify_init1)
336SYSCALL(sys_pipe2,compat_sys_pipe2) /* 325 */ 336SYSCALL(sys_pipe2,compat_sys_pipe2) /* 325 */
337SYSCALL(sys_dup3,compat_sys_dup3) 337SYSCALL(sys_dup3,sys_dup3)
338SYSCALL(sys_epoll_create1,compat_sys_epoll_create1) 338SYSCALL(sys_epoll_create1,sys_epoll_create1)
339SYSCALL(sys_preadv,compat_sys_preadv) 339SYSCALL(sys_preadv,compat_sys_preadv)
340SYSCALL(sys_pwritev,compat_sys_pwritev) 340SYSCALL(sys_pwritev,compat_sys_pwritev)
341SYSCALL(sys_rt_tgsigqueueinfo,compat_sys_rt_tgsigqueueinfo) /* 330 */ 341SYSCALL(sys_rt_tgsigqueueinfo,compat_sys_rt_tgsigqueueinfo) /* 330 */
342SYSCALL(sys_perf_event_open,compat_sys_perf_event_open) 342SYSCALL(sys_perf_event_open,compat_sys_perf_event_open)
343SYSCALL(sys_fanotify_init,compat_sys_fanotify_init) 343SYSCALL(sys_fanotify_init,sys_fanotify_init)
344SYSCALL(sys_fanotify_mark,compat_sys_fanotify_mark) 344SYSCALL(sys_fanotify_mark,compat_sys_fanotify_mark)
345SYSCALL(sys_prlimit64,compat_sys_prlimit64) 345SYSCALL(sys_prlimit64,compat_sys_prlimit64)
346SYSCALL(sys_name_to_handle_at,compat_sys_name_to_handle_at) /* 335 */ 346SYSCALL(sys_name_to_handle_at,compat_sys_name_to_handle_at) /* 335 */
347SYSCALL(sys_open_by_handle_at,compat_sys_open_by_handle_at) 347SYSCALL(sys_open_by_handle_at,compat_sys_open_by_handle_at)
348SYSCALL(sys_clock_adjtime,compat_sys_clock_adjtime) 348SYSCALL(sys_clock_adjtime,compat_sys_clock_adjtime)
349SYSCALL(sys_syncfs,compat_sys_syncfs) 349SYSCALL(sys_syncfs,sys_syncfs)
350SYSCALL(sys_setns,compat_sys_setns) 350SYSCALL(sys_setns,sys_setns)
351SYSCALL(sys_process_vm_readv,compat_sys_process_vm_readv) /* 340 */ 351SYSCALL(sys_process_vm_readv,compat_sys_process_vm_readv) /* 340 */
352SYSCALL(sys_process_vm_writev,compat_sys_process_vm_writev) 352SYSCALL(sys_process_vm_writev,compat_sys_process_vm_writev)
353SYSCALL(sys_s390_runtime_instr,compat_sys_s390_runtime_instr) 353SYSCALL(sys_s390_runtime_instr,sys_s390_runtime_instr)
354SYSCALL(sys_kcmp,compat_sys_kcmp) 354SYSCALL(sys_kcmp,compat_sys_kcmp)
355SYSCALL(sys_finit_module,compat_sys_finit_module) 355SYSCALL(sys_finit_module,compat_sys_finit_module)
356SYSCALL(sys_sched_setattr,compat_sys_sched_setattr) /* 345 */ 356SYSCALL(sys_sched_setattr,compat_sys_sched_setattr) /* 345 */
@@ -363,3 +363,22 @@ SYSCALL(sys_bpf,compat_sys_bpf)
363SYSCALL(sys_s390_pci_mmio_write,compat_sys_s390_pci_mmio_write) 363SYSCALL(sys_s390_pci_mmio_write,compat_sys_s390_pci_mmio_write)
364SYSCALL(sys_s390_pci_mmio_read,compat_sys_s390_pci_mmio_read) 364SYSCALL(sys_s390_pci_mmio_read,compat_sys_s390_pci_mmio_read)
365SYSCALL(sys_execveat,compat_sys_execveat) 365SYSCALL(sys_execveat,compat_sys_execveat)
366SYSCALL(sys_userfaultfd,sys_userfaultfd) /* 355 */
367SYSCALL(sys_membarrier,sys_membarrier)
368SYSCALL(sys_recvmmsg,compat_sys_recvmmsg)
369SYSCALL(sys_sendmmsg,compat_sys_sendmmsg)
370SYSCALL(sys_socket,sys_socket)
371SYSCALL(sys_socketpair,compat_sys_socketpair) /* 360 */
372SYSCALL(sys_bind,sys_bind)
373SYSCALL(sys_connect,sys_connect)
374SYSCALL(sys_listen,sys_listen)
375SYSCALL(sys_accept4,sys_accept4)
376SYSCALL(sys_getsockopt,compat_sys_getsockopt) /* 365 */
377SYSCALL(sys_setsockopt,compat_sys_setsockopt)
378SYSCALL(sys_getsockname,compat_sys_getsockname)
379SYSCALL(sys_getpeername,compat_sys_getpeername)
380SYSCALL(sys_sendto,compat_sys_sendto)
381SYSCALL(sys_sendmsg,compat_sys_sendmsg) /* 370 */
382SYSCALL(sys_recvfrom,compat_sys_recvfrom)
383SYSCALL(sys_recvmsg,compat_sys_recvmsg)
384SYSCALL(sys_shutdown,sys_shutdown)
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index b9ce650e9e99..c8653435c70d 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -89,17 +89,21 @@ static int do_account_vtime(struct task_struct *tsk, int hardirq_offset)
89 if (smp_cpu_mtid && 89 if (smp_cpu_mtid &&
90 time_after64(jiffies_64, __this_cpu_read(mt_scaling_jiffies))) { 90 time_after64(jiffies_64, __this_cpu_read(mt_scaling_jiffies))) {
91 u64 cycles_new[32], *cycles_old; 91 u64 cycles_new[32], *cycles_old;
92 u64 delta, mult, div; 92 u64 delta, fac, mult, div;
93 93
94 cycles_old = this_cpu_ptr(mt_cycles); 94 cycles_old = this_cpu_ptr(mt_cycles);
95 if (stcctm5(smp_cpu_mtid + 1, cycles_new) < 2) { 95 if (stcctm5(smp_cpu_mtid + 1, cycles_new) < 2) {
96 fac = 1;
96 mult = div = 0; 97 mult = div = 0;
97 for (i = 0; i <= smp_cpu_mtid; i++) { 98 for (i = 0; i <= smp_cpu_mtid; i++) {
98 delta = cycles_new[i] - cycles_old[i]; 99 delta = cycles_new[i] - cycles_old[i];
99 mult += delta; 100 div += delta;
100 div += (i + 1) * delta; 101 mult *= i + 1;
102 mult += delta * fac;
103 fac *= i + 1;
101 } 104 }
102 if (mult > 0) { 105 div *= fac;
106 if (div > 0) {
103 /* Update scaling factor */ 107 /* Update scaling factor */
104 __this_cpu_write(mt_scaling_mult, mult); 108 __this_cpu_write(mt_scaling_mult, mult);
105 __this_cpu_write(mt_scaling_div, div); 109 __this_cpu_write(mt_scaling_div, div);
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index c91eb941b444..0a67c40eece9 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -63,6 +63,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
63 { "exit_program_interruption", VCPU_STAT(exit_program_interruption) }, 63 { "exit_program_interruption", VCPU_STAT(exit_program_interruption) },
64 { "exit_instr_and_program_int", VCPU_STAT(exit_instr_and_program) }, 64 { "exit_instr_and_program_int", VCPU_STAT(exit_instr_and_program) },
65 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) }, 65 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
66 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
66 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 67 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
67 { "instruction_lctlg", VCPU_STAT(instruction_lctlg) }, 68 { "instruction_lctlg", VCPU_STAT(instruction_lctlg) },
68 { "instruction_lctl", VCPU_STAT(instruction_lctl) }, 69 { "instruction_lctl", VCPU_STAT(instruction_lctl) },
@@ -1574,7 +1575,7 @@ static void kvm_s390_vcpu_request(struct kvm_vcpu *vcpu)
1574 1575
1575static void kvm_s390_vcpu_request_handled(struct kvm_vcpu *vcpu) 1576static void kvm_s390_vcpu_request_handled(struct kvm_vcpu *vcpu)
1576{ 1577{
1577 atomic_or(PROG_REQUEST, &vcpu->arch.sie_block->prog20); 1578 atomic_andnot(PROG_REQUEST, &vcpu->arch.sie_block->prog20);
1578} 1579}
1579 1580
1580/* 1581/*
diff --git a/arch/score/include/asm/Kbuild b/arch/score/include/asm/Kbuild
index 92ffe397b893..a05218ff3fe4 100644
--- a/arch/score/include/asm/Kbuild
+++ b/arch/score/include/asm/Kbuild
@@ -13,3 +13,4 @@ generic-y += sections.h
13generic-y += trace_clock.h 13generic-y += trace_clock.h
14generic-y += xor.h 14generic-y += xor.h
15generic-y += serial.h 15generic-y += serial.h
16generic-y += word-at-a-time.h
diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
index 6f97a8f0d0d6..6129aef6db76 100644
--- a/arch/sh/boards/mach-se/7343/irq.c
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -29,7 +29,7 @@
29static void __iomem *se7343_irq_regs; 29static void __iomem *se7343_irq_regs;
30struct irq_domain *se7343_irq_domain; 30struct irq_domain *se7343_irq_domain;
31 31
32static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) 32static void se7343_irq_demux(struct irq_desc *desc)
33{ 33{
34 struct irq_data *data = irq_desc_get_irq_data(desc); 34 struct irq_data *data = irq_desc_get_irq_data(desc);
35 struct irq_chip *chip = irq_data_get_irq_chip(data); 35 struct irq_chip *chip = irq_data_get_irq_chip(data);
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index 60aebd14ccf8..24c74a88290c 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -28,7 +28,7 @@
28static void __iomem *se7722_irq_regs; 28static void __iomem *se7722_irq_regs;
29struct irq_domain *se7722_irq_domain; 29struct irq_domain *se7722_irq_domain;
30 30
31static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) 31static void se7722_irq_demux(struct irq_desc *desc)
32{ 32{
33 struct irq_data *data = irq_desc_get_irq_data(desc); 33 struct irq_data *data = irq_desc_get_irq_data(desc);
34 struct irq_chip *chip = irq_data_get_irq_chip(data); 34 struct irq_chip *chip = irq_data_get_irq_chip(data);
diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
index 9f2033898652..64e681e66c57 100644
--- a/arch/sh/boards/mach-se/7724/irq.c
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -92,7 +92,7 @@ static struct irq_chip se7724_irq_chip __read_mostly = {
92 .irq_unmask = enable_se7724_irq, 92 .irq_unmask = enable_se7724_irq,
93}; 93};
94 94
95static void se7724_irq_demux(unsigned int __irq, struct irq_desc *desc) 95static void se7724_irq_demux(struct irq_desc *desc)
96{ 96{
97 unsigned int irq = irq_desc_get_irq(desc); 97 unsigned int irq = irq_desc_get_irq(desc);
98 struct fpga_irq set = get_fpga_irq(irq); 98 struct fpga_irq set = get_fpga_irq(irq);
diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c
index 24555c364d5b..1fb2cbee25f2 100644
--- a/arch/sh/boards/mach-x3proto/gpio.c
+++ b/arch/sh/boards/mach-x3proto/gpio.c
@@ -60,7 +60,7 @@ static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
60 return virq; 60 return virq;
61} 61}
62 62
63static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 63static void x3proto_gpio_irq_handler(struct irq_desc *desc)
64{ 64{
65 struct irq_data *data = irq_desc_get_irq_data(desc); 65 struct irq_data *data = irq_desc_get_irq_data(desc);
66 struct irq_chip *chip = irq_data_get_irq_chip(data); 66 struct irq_chip *chip = irq_data_get_irq_chip(data);
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index e9735616bdc8..8180092502f7 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -56,7 +56,7 @@ static struct irq_chip hd64461_irq_chip = {
56 .irq_unmask = hd64461_unmask_irq, 56 .irq_unmask = hd64461_unmask_irq,
57}; 57};
58 58
59static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc) 59static void hd64461_irq_demux(struct irq_desc *desc)
60{ 60{
61 unsigned short intv = __raw_readw(HD64461_NIRR); 61 unsigned short intv = __raw_readw(HD64461_NIRR);
62 unsigned int ext_irq = HD64461_IRQBASE; 62 unsigned int ext_irq = HD64461_IRQBASE;
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c
index 0299f052a2ef..42efcf85f721 100644
--- a/arch/sparc/kernel/leon_kernel.c
+++ b/arch/sparc/kernel/leon_kernel.c
@@ -53,7 +53,7 @@ static inline unsigned int leon_eirq_get(int cpu)
53} 53}
54 54
55/* Handle one or multiple IRQs from the extended interrupt controller */ 55/* Handle one or multiple IRQs from the extended interrupt controller */
56static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc) 56static void leon_handle_ext_irq(struct irq_desc *desc)
57{ 57{
58 unsigned int eirq; 58 unsigned int eirq;
59 struct irq_bucket *p; 59 struct irq_bucket *p;
diff --git a/arch/sparc/kernel/leon_pci_grpci1.c b/arch/sparc/kernel/leon_pci_grpci1.c
index 3382f7b3eeef..1e77128a8f88 100644
--- a/arch/sparc/kernel/leon_pci_grpci1.c
+++ b/arch/sparc/kernel/leon_pci_grpci1.c
@@ -357,7 +357,7 @@ static struct irq_chip grpci1_irq = {
357}; 357};
358 358
359/* Handle one or multiple IRQs from the PCI core */ 359/* Handle one or multiple IRQs from the PCI core */
360static void grpci1_pci_flow_irq(unsigned int irq, struct irq_desc *desc) 360static void grpci1_pci_flow_irq(struct irq_desc *desc)
361{ 361{
362 struct grpci1_priv *priv = grpci1priv; 362 struct grpci1_priv *priv = grpci1priv;
363 int i, ack = 0; 363 int i, ack = 0;
diff --git a/arch/sparc/kernel/leon_pci_grpci2.c b/arch/sparc/kernel/leon_pci_grpci2.c
index 814fb1729b12..f727c4de1316 100644
--- a/arch/sparc/kernel/leon_pci_grpci2.c
+++ b/arch/sparc/kernel/leon_pci_grpci2.c
@@ -498,7 +498,7 @@ static struct irq_chip grpci2_irq = {
498}; 498};
499 499
500/* Handle one or multiple IRQs from the PCI core */ 500/* Handle one or multiple IRQs from the PCI core */
501static void grpci2_pci_flow_irq(unsigned int irq, struct irq_desc *desc) 501static void grpci2_pci_flow_irq(struct irq_desc *desc)
502{ 502{
503 struct grpci2_priv *priv = grpci2priv; 503 struct grpci2_priv *priv = grpci2priv;
504 int i, ack = 0; 504 int i, ack = 0;
diff --git a/arch/tile/gxio/mpipe.c b/arch/tile/gxio/mpipe.c
index ee186e13dfe6..f102048d9c0e 100644
--- a/arch/tile/gxio/mpipe.c
+++ b/arch/tile/gxio/mpipe.c
@@ -19,6 +19,7 @@
19#include <linux/errno.h> 19#include <linux/errno.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/string.h>
22 23
23#include <gxio/iorpc_globals.h> 24#include <gxio/iorpc_globals.h>
24#include <gxio/iorpc_mpipe.h> 25#include <gxio/iorpc_mpipe.h>
@@ -29,32 +30,6 @@
29/* HACK: Avoid pointless "shadow" warnings. */ 30/* HACK: Avoid pointless "shadow" warnings. */
30#define link link_shadow 31#define link link_shadow
31 32
32/**
33 * strscpy - Copy a C-string into a sized buffer, but only if it fits
34 * @dest: Where to copy the string to
35 * @src: Where to copy the string from
36 * @size: size of destination buffer
37 *
38 * Use this routine to avoid copying too-long strings.
39 * The routine returns the total number of bytes copied
40 * (including the trailing NUL) or zero if the buffer wasn't
41 * big enough. To ensure that programmers pay attention
42 * to the return code, the destination has a single NUL
43 * written at the front (if size is non-zero) when the
44 * buffer is not big enough.
45 */
46static size_t strscpy(char *dest, const char *src, size_t size)
47{
48 size_t len = strnlen(src, size) + 1;
49 if (len > size) {
50 if (size)
51 dest[0] = '\0';
52 return 0;
53 }
54 memcpy(dest, src, len);
55 return len;
56}
57
58int gxio_mpipe_init(gxio_mpipe_context_t *context, unsigned int mpipe_index) 33int gxio_mpipe_init(gxio_mpipe_context_t *context, unsigned int mpipe_index)
59{ 34{
60 char file[32]; 35 char file[32];
@@ -540,7 +515,7 @@ int gxio_mpipe_link_instance(const char *link_name)
540 if (!context) 515 if (!context)
541 return GXIO_ERR_NO_DEVICE; 516 return GXIO_ERR_NO_DEVICE;
542 517
543 if (strscpy(name.name, link_name, sizeof(name.name)) == 0) 518 if (strscpy(name.name, link_name, sizeof(name.name)) < 0)
544 return GXIO_ERR_NO_DEVICE; 519 return GXIO_ERR_NO_DEVICE;
545 520
546 return gxio_mpipe_info_instance_aux(context, name); 521 return gxio_mpipe_info_instance_aux(context, name);
@@ -559,7 +534,7 @@ int gxio_mpipe_link_enumerate_mac(int idx, char *link_name, uint8_t *link_mac)
559 534
560 rv = gxio_mpipe_info_enumerate_aux(context, idx, &name, &mac); 535 rv = gxio_mpipe_info_enumerate_aux(context, idx, &name, &mac);
561 if (rv >= 0) { 536 if (rv >= 0) {
562 if (strscpy(link_name, name.name, sizeof(name.name)) == 0) 537 if (strscpy(link_name, name.name, sizeof(name.name)) < 0)
563 return GXIO_ERR_INVAL_MEMORY_SIZE; 538 return GXIO_ERR_INVAL_MEMORY_SIZE;
564 memcpy(link_mac, mac.mac, sizeof(mac.mac)); 539 memcpy(link_mac, mac.mac, sizeof(mac.mac));
565 } 540 }
@@ -576,7 +551,7 @@ int gxio_mpipe_link_open(gxio_mpipe_link_t *link,
576 _gxio_mpipe_link_name_t name; 551 _gxio_mpipe_link_name_t name;
577 int rv; 552 int rv;
578 553
579 if (strscpy(name.name, link_name, sizeof(name.name)) == 0) 554 if (strscpy(name.name, link_name, sizeof(name.name)) < 0)
580 return GXIO_ERR_NO_DEVICE; 555 return GXIO_ERR_NO_DEVICE;
581 556
582 rv = gxio_mpipe_link_open_aux(context, name, flags); 557 rv = gxio_mpipe_link_open_aux(context, name, flags);
diff --git a/arch/tile/include/asm/Kbuild b/arch/tile/include/asm/Kbuild
index ba35c41c71ff..0b6cacaad933 100644
--- a/arch/tile/include/asm/Kbuild
+++ b/arch/tile/include/asm/Kbuild
@@ -40,4 +40,5 @@ generic-y += termbits.h
40generic-y += termios.h 40generic-y += termios.h
41generic-y += trace_clock.h 41generic-y += trace_clock.h
42generic-y += types.h 42generic-y += types.h
43generic-y += word-at-a-time.h
43generic-y += xor.h 44generic-y += xor.h
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index b3f73fd764a3..4c017d0d2de8 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -304,17 +304,16 @@ static struct irq_chip tilegx_legacy_irq_chip = {
304 * to Linux which just calls handle_level_irq() after clearing the 304 * to Linux which just calls handle_level_irq() after clearing the
305 * MAC INTx Assert status bit associated with this interrupt. 305 * MAC INTx Assert status bit associated with this interrupt.
306 */ 306 */
307static void trio_handle_level_irq(unsigned int __irq, struct irq_desc *desc) 307static void trio_handle_level_irq(struct irq_desc *desc)
308{ 308{
309 struct pci_controller *controller = irq_desc_get_handler_data(desc); 309 struct pci_controller *controller = irq_desc_get_handler_data(desc);
310 gxio_trio_context_t *trio_context = controller->trio; 310 gxio_trio_context_t *trio_context = controller->trio;
311 uint64_t intx = (uint64_t)irq_desc_get_chip_data(desc); 311 uint64_t intx = (uint64_t)irq_desc_get_chip_data(desc);
312 unsigned int irq = irq_desc_get_irq(desc);
313 int mac = controller->mac; 312 int mac = controller->mac;
314 unsigned int reg_offset; 313 unsigned int reg_offset;
315 uint64_t level_mask; 314 uint64_t level_mask;
316 315
317 handle_level_irq(irq, desc); 316 handle_level_irq(desc);
318 317
319 /* 318 /*
320 * Clear the INTx Level status, otherwise future interrupts are 319 * Clear the INTx Level status, otherwise future interrupts are
diff --git a/arch/tile/kernel/usb.c b/arch/tile/kernel/usb.c
index f0da5a237e94..9f1e05e12255 100644
--- a/arch/tile/kernel/usb.c
+++ b/arch/tile/kernel/usb.c
@@ -22,6 +22,7 @@
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/usb/tilegx.h> 23#include <linux/usb/tilegx.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/module.h>
25#include <linux/types.h> 26#include <linux/types.h>
26 27
27static u64 ehci_dmamask = DMA_BIT_MASK(32); 28static u64 ehci_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/um/include/asm/Kbuild b/arch/um/include/asm/Kbuild
index 149ec55f9c46..904f3ebf4220 100644
--- a/arch/um/include/asm/Kbuild
+++ b/arch/um/include/asm/Kbuild
@@ -25,4 +25,5 @@ generic-y += preempt.h
25generic-y += switch_to.h 25generic-y += switch_to.h
26generic-y += topology.h 26generic-y += topology.h
27generic-y += trace_clock.h 27generic-y += trace_clock.h
28generic-y += word-at-a-time.h
28generic-y += xor.h 29generic-y += xor.h
diff --git a/arch/unicore32/include/asm/Kbuild b/arch/unicore32/include/asm/Kbuild
index 1fc7a286dc6f..256c45b3ae34 100644
--- a/arch/unicore32/include/asm/Kbuild
+++ b/arch/unicore32/include/asm/Kbuild
@@ -62,4 +62,5 @@ generic-y += ucontext.h
62generic-y += unaligned.h 62generic-y += unaligned.h
63generic-y += user.h 63generic-y += user.h
64generic-y += vga.h 64generic-y += vga.h
65generic-y += word-at-a-time.h
65generic-y += xor.h 66generic-y += xor.h
diff --git a/arch/unicore32/kernel/irq.c b/arch/unicore32/kernel/irq.c
index c53729d92e8d..eb1fd0030359 100644
--- a/arch/unicore32/kernel/irq.c
+++ b/arch/unicore32/kernel/irq.c
@@ -112,7 +112,7 @@ static struct irq_chip puv3_low_gpio_chip = {
112 * irq_controller_lock held, and IRQs disabled. Decode the IRQ 112 * irq_controller_lock held, and IRQs disabled. Decode the IRQ
113 * and call the handler. 113 * and call the handler.
114 */ 114 */
115static void puv3_gpio_handler(unsigned int __irq, struct irq_desc *desc) 115static void puv3_gpio_handler(struct irq_desc *desc)
116{ 116{
117 unsigned int mask, irq; 117 unsigned int mask, irq;
118 118
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 7aef2d52daa0..328c8352480c 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1006,7 +1006,7 @@ config X86_THERMAL_VECTOR
1006 depends on X86_MCE_INTEL 1006 depends on X86_MCE_INTEL
1007 1007
1008config X86_LEGACY_VM86 1008config X86_LEGACY_VM86
1009 bool "Legacy VM86 support (obsolete)" 1009 bool "Legacy VM86 support"
1010 default n 1010 default n
1011 depends on X86_32 1011 depends on X86_32
1012 ---help--- 1012 ---help---
@@ -1018,19 +1018,20 @@ config X86_LEGACY_VM86
1018 available to accelerate real mode DOS programs. However, any 1018 available to accelerate real mode DOS programs. However, any
1019 recent version of DOSEMU, X, or vbetool should be fully 1019 recent version of DOSEMU, X, or vbetool should be fully
1020 functional even without kernel VM86 support, as they will all 1020 functional even without kernel VM86 support, as they will all
1021 fall back to (pretty well performing) software emulation. 1021 fall back to software emulation. Nevertheless, if you are using
1022 a 16-bit DOS program where 16-bit performance matters, vm86
1023 mode might be faster than emulation and you might want to
1024 enable this option.
1022 1025
1023 Anything that works on a 64-bit kernel is unlikely to need 1026 Note that any app that works on a 64-bit kernel is unlikely to
1024 this option, as 64-bit kernels don't, and can't, support V8086 1027 need this option, as 64-bit kernels don't, and can't, support
1025 mode. This option is also unrelated to 16-bit protected mode 1028 V8086 mode. This option is also unrelated to 16-bit protected
1026 and is not needed to run most 16-bit programs under Wine. 1029 mode and is not needed to run most 16-bit programs under Wine.
1027 1030
1028 Enabling this option adds considerable attack surface to the 1031 Enabling this option increases the complexity of the kernel
1029 kernel and slows down system calls and exception handling. 1032 and slows down exception handling a tiny bit.
1030 1033
1031 Unless you use very old userspace or need the last drop of 1034 If unsure, say N here.
1032 performance in your real mode DOS games and can't use KVM,
1033 say N here.
1034 1035
1035config VM86 1036config VM86
1036 bool 1037 bool
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index d3033183ed70..055a01de7c8d 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -1128,7 +1128,18 @@ END(error_exit)
1128 1128
1129/* Runs on exception stack */ 1129/* Runs on exception stack */
1130ENTRY(nmi) 1130ENTRY(nmi)
1131 /*
1132 * Fix up the exception frame if we're on Xen.
1133 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1134 * one value to the stack on native, so it may clobber the rdx
1135 * scratch slot, but it won't clobber any of the important
1136 * slots past it.
1137 *
1138 * Xen is a different story, because the Xen frame itself overlaps
1139 * the "NMI executing" variable.
1140 */
1131 PARAVIRT_ADJUST_EXCEPTION_FRAME 1141 PARAVIRT_ADJUST_EXCEPTION_FRAME
1142
1132 /* 1143 /*
1133 * We allow breakpoints in NMIs. If a breakpoint occurs, then 1144 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1134 * the iretq it performs will take us out of NMI context. 1145 * the iretq it performs will take us out of NMI context.
@@ -1179,9 +1190,12 @@ ENTRY(nmi)
1179 * we don't want to enable interrupts, because then we'll end 1190 * we don't want to enable interrupts, because then we'll end
1180 * up in an awkward situation in which IRQs are on but NMIs 1191 * up in an awkward situation in which IRQs are on but NMIs
1181 * are off. 1192 * are off.
1193 *
1194 * We also must not push anything to the stack before switching
1195 * stacks lest we corrupt the "NMI executing" variable.
1182 */ 1196 */
1183 1197
1184 SWAPGS 1198 SWAPGS_UNSAFE_STACK
1185 cld 1199 cld
1186 movq %rsp, %rdx 1200 movq %rsp, %rdx
1187 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 1201 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 477fc28050e4..9727b3b48bd1 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -193,7 +193,7 @@
193#define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */ 193#define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */
194#define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ 194#define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
195#define X86_FEATURE_HWP ( 7*32+ 10) /* "hwp" Intel HWP */ 195#define X86_FEATURE_HWP ( 7*32+ 10) /* "hwp" Intel HWP */
196#define X86_FEATURE_HWP_NOITFY ( 7*32+ 11) /* Intel HWP_NOTIFY */ 196#define X86_FEATURE_HWP_NOTIFY ( 7*32+ 11) /* Intel HWP_NOTIFY */
197#define X86_FEATURE_HWP_ACT_WINDOW ( 7*32+ 12) /* Intel HWP_ACT_WINDOW */ 197#define X86_FEATURE_HWP_ACT_WINDOW ( 7*32+ 12) /* Intel HWP_ACT_WINDOW */
198#define X86_FEATURE_HWP_EPP ( 7*32+13) /* Intel HWP_EPP */ 198#define X86_FEATURE_HWP_EPP ( 7*32+13) /* Intel HWP_EPP */
199#define X86_FEATURE_HWP_PKG_REQ ( 7*32+14) /* Intel HWP_PKG_REQ */ 199#define X86_FEATURE_HWP_PKG_REQ ( 7*32+14) /* Intel HWP_PKG_REQ */
@@ -241,6 +241,7 @@
241#define X86_FEATURE_AVX512PF ( 9*32+26) /* AVX-512 Prefetch */ 241#define X86_FEATURE_AVX512PF ( 9*32+26) /* AVX-512 Prefetch */
242#define X86_FEATURE_AVX512ER ( 9*32+27) /* AVX-512 Exponential and Reciprocal */ 242#define X86_FEATURE_AVX512ER ( 9*32+27) /* AVX-512 Exponential and Reciprocal */
243#define X86_FEATURE_AVX512CD ( 9*32+28) /* AVX-512 Conflict Detection */ 243#define X86_FEATURE_AVX512CD ( 9*32+28) /* AVX-512 Conflict Detection */
244#define X86_FEATURE_SHA_NI ( 9*32+29) /* SHA1/SHA256 Instruction Extensions */
244 245
245/* Extended state features, CPUID level 0x0000000d:1 (eax), word 10 */ 246/* Extended state features, CPUID level 0x0000000d:1 (eax), word 10 */
246#define X86_FEATURE_XSAVEOPT (10*32+ 0) /* XSAVEOPT */ 247#define X86_FEATURE_XSAVEOPT (10*32+ 0) /* XSAVEOPT */
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h
index 155162ea0e00..ae68be92f755 100644
--- a/arch/x86/include/asm/efi.h
+++ b/arch/x86/include/asm/efi.h
@@ -86,6 +86,18 @@ extern u64 asmlinkage efi_call(void *fp, ...);
86extern void __iomem *__init efi_ioremap(unsigned long addr, unsigned long size, 86extern void __iomem *__init efi_ioremap(unsigned long addr, unsigned long size,
87 u32 type, u64 attribute); 87 u32 type, u64 attribute);
88 88
89#ifdef CONFIG_KASAN
90/*
91 * CONFIG_KASAN may redefine memset to __memset. __memset function is present
92 * only in kernel binary. Since the EFI stub linked into a separate binary it
93 * doesn't have __memset(). So we should use standard memset from
94 * arch/x86/boot/compressed/string.c. The same applies to memcpy and memmove.
95 */
96#undef memcpy
97#undef memset
98#undef memmove
99#endif
100
89#endif /* CONFIG_X86_32 */ 101#endif /* CONFIG_X86_32 */
90 102
91extern struct efi_scratch efi_scratch; 103extern struct efi_scratch efi_scratch;
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index c12e845f59e6..2beee0382088 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -40,6 +40,7 @@
40 40
41#define KVM_PIO_PAGE_OFFSET 1 41#define KVM_PIO_PAGE_OFFSET 1
42#define KVM_COALESCED_MMIO_PAGE_OFFSET 2 42#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
43#define KVM_HALT_POLL_NS_DEFAULT 500000
43 44
44#define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 45#define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
45 46
@@ -711,6 +712,7 @@ struct kvm_vcpu_stat {
711 u32 nmi_window_exits; 712 u32 nmi_window_exits;
712 u32 halt_exits; 713 u32 halt_exits;
713 u32 halt_successful_poll; 714 u32 halt_successful_poll;
715 u32 halt_attempted_poll;
714 u32 halt_wakeup; 716 u32 halt_wakeup;
715 u32 request_irq_exits; 717 u32 request_irq_exits;
716 u32 irq_exits; 718 u32 irq_exits;
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index c1c0a1c14344..b8c14bb7fc8f 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -141,6 +141,8 @@
141#define DEBUGCTLMSR_BTS_OFF_USR (1UL << 10) 141#define DEBUGCTLMSR_BTS_OFF_USR (1UL << 10)
142#define DEBUGCTLMSR_FREEZE_LBRS_ON_PMI (1UL << 11) 142#define DEBUGCTLMSR_FREEZE_LBRS_ON_PMI (1UL << 11)
143 143
144#define MSR_PEBS_FRONTEND 0x000003f7
145
144#define MSR_IA32_POWER_CTL 0x000001fc 146#define MSR_IA32_POWER_CTL 0x000001fc
145 147
146#define MSR_IA32_MC0_CTL 0x00000400 148#define MSR_IA32_MC0_CTL 0x00000400
@@ -331,6 +333,7 @@
331/* C1E active bits in int pending message */ 333/* C1E active bits in int pending message */
332#define K8_INTP_C1E_ACTIVE_MASK 0x18000000 334#define K8_INTP_C1E_ACTIVE_MASK 0x18000000
333#define MSR_K8_TSEG_ADDR 0xc0010112 335#define MSR_K8_TSEG_ADDR 0xc0010112
336#define MSR_K8_TSEG_MASK 0xc0010113
334#define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000 /* MtrrFixDramEn bit */ 337#define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000 /* MtrrFixDramEn bit */
335#define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000 /* MtrrFixDramModEn bit */ 338#define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000 /* MtrrFixDramModEn bit */
336#define K8_MTRR_RDMEM_WRMEM_MASK 0x18181818 /* Mask: RdMem|WrMem */ 339#define K8_MTRR_RDMEM_WRMEM_MASK 0x18181818 /* Mask: RdMem|WrMem */
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index ce029e4fa7c6..31247b5bff7c 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -97,7 +97,6 @@ struct pv_lazy_ops {
97struct pv_time_ops { 97struct pv_time_ops {
98 unsigned long long (*sched_clock)(void); 98 unsigned long long (*sched_clock)(void);
99 unsigned long long (*steal_clock)(int cpu); 99 unsigned long long (*steal_clock)(int cpu);
100 unsigned long (*get_tsc_khz)(void);
101}; 100};
102 101
103struct pv_cpu_ops { 102struct pv_cpu_ops {
diff --git a/arch/x86/include/asm/pvclock-abi.h b/arch/x86/include/asm/pvclock-abi.h
index 655e07a48f6c..67f08230103a 100644
--- a/arch/x86/include/asm/pvclock-abi.h
+++ b/arch/x86/include/asm/pvclock-abi.h
@@ -41,6 +41,7 @@ struct pvclock_wall_clock {
41 41
42#define PVCLOCK_TSC_STABLE_BIT (1 << 0) 42#define PVCLOCK_TSC_STABLE_BIT (1 << 0)
43#define PVCLOCK_GUEST_STOPPED (1 << 1) 43#define PVCLOCK_GUEST_STOPPED (1 << 1)
44/* PVCLOCK_COUNTS_FROM_ZERO broke ABI and can't be used anymore. */
44#define PVCLOCK_COUNTS_FROM_ZERO (1 << 2) 45#define PVCLOCK_COUNTS_FROM_ZERO (1 << 2)
45#endif /* __ASSEMBLY__ */ 46#endif /* __ASSEMBLY__ */
46#endif /* _ASM_X86_PVCLOCK_ABI_H */ 47#endif /* _ASM_X86_PVCLOCK_ABI_H */
diff --git a/arch/x86/include/asm/qspinlock.h b/arch/x86/include/asm/qspinlock.h
index 9d51fae1cba3..eaba08076030 100644
--- a/arch/x86/include/asm/qspinlock.h
+++ b/arch/x86/include/asm/qspinlock.h
@@ -39,18 +39,27 @@ static inline void queued_spin_unlock(struct qspinlock *lock)
39} 39}
40#endif 40#endif
41 41
42#define virt_queued_spin_lock virt_queued_spin_lock 42#ifdef CONFIG_PARAVIRT
43 43#define virt_spin_lock virt_spin_lock
44static inline bool virt_queued_spin_lock(struct qspinlock *lock) 44static inline bool virt_spin_lock(struct qspinlock *lock)
45{ 45{
46 if (!static_cpu_has(X86_FEATURE_HYPERVISOR)) 46 if (!static_cpu_has(X86_FEATURE_HYPERVISOR))
47 return false; 47 return false;
48 48
49 while (atomic_cmpxchg(&lock->val, 0, _Q_LOCKED_VAL) != 0) 49 /*
50 cpu_relax(); 50 * On hypervisors without PARAVIRT_SPINLOCKS support we fall
51 * back to a Test-and-Set spinlock, because fair locks have
52 * horrible lock 'holder' preemption issues.
53 */
54
55 do {
56 while (atomic_read(&lock->val) != 0)
57 cpu_relax();
58 } while (atomic_cmpxchg(&lock->val, 0, _Q_LOCKED_VAL) != 0);
51 59
52 return true; 60 return true;
53} 61}
62#endif /* CONFIG_PARAVIRT */
54 63
55#include <asm-generic/qspinlock.h> 64#include <asm-generic/qspinlock.h>
56 65
diff --git a/arch/x86/include/uapi/asm/bitsperlong.h b/arch/x86/include/uapi/asm/bitsperlong.h
index b0ae1c4dc791..217909b4d6f5 100644
--- a/arch/x86/include/uapi/asm/bitsperlong.h
+++ b/arch/x86/include/uapi/asm/bitsperlong.h
@@ -1,7 +1,7 @@
1#ifndef __ASM_X86_BITSPERLONG_H 1#ifndef __ASM_X86_BITSPERLONG_H
2#define __ASM_X86_BITSPERLONG_H 2#define __ASM_X86_BITSPERLONG_H
3 3
4#ifdef __x86_64__ 4#if defined(__x86_64__) && !defined(__ILP32__)
5# define __BITS_PER_LONG 64 5# define __BITS_PER_LONG 64
6#else 6#else
7# define __BITS_PER_LONG 32 7# define __BITS_PER_LONG 32
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index c42827eb86cf..25f909362b7a 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -338,10 +338,15 @@ done:
338 338
339static void __init_or_module optimize_nops(struct alt_instr *a, u8 *instr) 339static void __init_or_module optimize_nops(struct alt_instr *a, u8 *instr)
340{ 340{
341 unsigned long flags;
342
341 if (instr[0] != 0x90) 343 if (instr[0] != 0x90)
342 return; 344 return;
343 345
346 local_irq_save(flags);
344 add_nops(instr + (a->instrlen - a->padlen), a->padlen); 347 add_nops(instr + (a->instrlen - a->padlen), a->padlen);
348 sync_core();
349 local_irq_restore(flags);
345 350
346 DUMP_BYTES(instr, a->instrlen, "%p: [%d:%d) optimized NOPs: ", 351 DUMP_BYTES(instr, a->instrlen, "%p: [%d:%d) optimized NOPs: ",
347 instr, a->instrlen - a->padlen, a->padlen); 352 instr, a->instrlen - a->padlen, a->padlen);
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 3ca3e46aa405..24e94ce454e2 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -336,6 +336,13 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
336 apic_write(APIC_LVTT, lvtt_value); 336 apic_write(APIC_LVTT, lvtt_value);
337 337
338 if (lvtt_value & APIC_LVT_TIMER_TSCDEADLINE) { 338 if (lvtt_value & APIC_LVT_TIMER_TSCDEADLINE) {
339 /*
340 * See Intel SDM: TSC-Deadline Mode chapter. In xAPIC mode,
341 * writing to the APIC LVTT and TSC_DEADLINE MSR isn't serialized.
342 * According to Intel, MFENCE can do the serialization here.
343 */
344 asm volatile("mfence" : : : "memory");
345
339 printk_once(KERN_DEBUG "TSC deadline timer enabled\n"); 346 printk_once(KERN_DEBUG "TSC deadline timer enabled\n");
340 return; 347 return;
341 } 348 }
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 38a76f826530..5c60bb162622 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2522,6 +2522,7 @@ void __init setup_ioapic_dest(void)
2522 int pin, ioapic, irq, irq_entry; 2522 int pin, ioapic, irq, irq_entry;
2523 const struct cpumask *mask; 2523 const struct cpumask *mask;
2524 struct irq_data *idata; 2524 struct irq_data *idata;
2525 struct irq_chip *chip;
2525 2526
2526 if (skip_ioapic_setup == 1) 2527 if (skip_ioapic_setup == 1)
2527 return; 2528 return;
@@ -2545,9 +2546,9 @@ void __init setup_ioapic_dest(void)
2545 else 2546 else
2546 mask = apic->target_cpus(); 2547 mask = apic->target_cpus();
2547 2548
2548 irq_set_affinity(irq, mask); 2549 chip = irq_data_get_irq_chip(idata);
2550 chip->irq_set_affinity(idata, mask, false);
2549 } 2551 }
2550
2551} 2552}
2552#endif 2553#endif
2553 2554
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 1bbd0fe2c806..836d11b92811 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -489,10 +489,8 @@ static int apic_set_affinity(struct irq_data *irq_data,
489 489
490 err = assign_irq_vector(irq, data, dest); 490 err = assign_irq_vector(irq, data, dest);
491 if (err) { 491 if (err) {
492 struct irq_data *top = irq_get_irq_data(irq);
493
494 if (assign_irq_vector(irq, data, 492 if (assign_irq_vector(irq, data,
495 irq_data_get_affinity_mask(top))) 493 irq_data_get_affinity_mask(irq_data)))
496 pr_err("Failed to recover vector for irq %d\n", irq); 494 pr_err("Failed to recover vector for irq %d\n", irq);
497 return err; 495 return err;
498 } 496 }
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 07ce52c22ec8..de22ea7ff82f 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1110,10 +1110,10 @@ void print_cpu_info(struct cpuinfo_x86 *c)
1110 else 1110 else
1111 printk(KERN_CONT "%d86", c->x86); 1111 printk(KERN_CONT "%d86", c->x86);
1112 1112
1113 printk(KERN_CONT " (fam: %02x, model: %02x", c->x86, c->x86_model); 1113 printk(KERN_CONT " (family: 0x%x, model: 0x%x", c->x86, c->x86_model);
1114 1114
1115 if (c->x86_mask || c->cpuid_level >= 0) 1115 if (c->x86_mask || c->cpuid_level >= 0)
1116 printk(KERN_CONT ", stepping: %02x)\n", c->x86_mask); 1116 printk(KERN_CONT ", stepping: 0x%x)\n", c->x86_mask);
1117 else 1117 else
1118 printk(KERN_CONT ")\n"); 1118 printk(KERN_CONT ")\n");
1119 1119
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index 381c8b9b3a33..20e242ea1bc4 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -34,11 +34,10 @@
34struct ms_hyperv_info ms_hyperv; 34struct ms_hyperv_info ms_hyperv;
35EXPORT_SYMBOL_GPL(ms_hyperv); 35EXPORT_SYMBOL_GPL(ms_hyperv);
36 36
37static void (*hv_kexec_handler)(void);
38static void (*hv_crash_handler)(struct pt_regs *regs);
39
40#if IS_ENABLED(CONFIG_HYPERV) 37#if IS_ENABLED(CONFIG_HYPERV)
41static void (*vmbus_handler)(void); 38static void (*vmbus_handler)(void);
39static void (*hv_kexec_handler)(void);
40static void (*hv_crash_handler)(struct pt_regs *regs);
42 41
43void hyperv_vector_handler(struct pt_regs *regs) 42void hyperv_vector_handler(struct pt_regs *regs)
44{ 43{
@@ -96,8 +95,8 @@ void hv_remove_crash_handler(void)
96 hv_crash_handler = NULL; 95 hv_crash_handler = NULL;
97} 96}
98EXPORT_SYMBOL_GPL(hv_remove_crash_handler); 97EXPORT_SYMBOL_GPL(hv_remove_crash_handler);
99#endif
100 98
99#ifdef CONFIG_KEXEC_CORE
101static void hv_machine_shutdown(void) 100static void hv_machine_shutdown(void)
102{ 101{
103 if (kexec_in_progress && hv_kexec_handler) 102 if (kexec_in_progress && hv_kexec_handler)
@@ -111,7 +110,8 @@ static void hv_machine_crash_shutdown(struct pt_regs *regs)
111 hv_crash_handler(regs); 110 hv_crash_handler(regs);
112 native_machine_crash_shutdown(regs); 111 native_machine_crash_shutdown(regs);
113} 112}
114 113#endif /* CONFIG_KEXEC_CORE */
114#endif /* CONFIG_HYPERV */
115 115
116static uint32_t __init ms_hyperv_platform(void) 116static uint32_t __init ms_hyperv_platform(void)
117{ 117{
@@ -186,8 +186,10 @@ static void __init ms_hyperv_init_platform(void)
186 no_timer_check = 1; 186 no_timer_check = 1;
187#endif 187#endif
188 188
189#if IS_ENABLED(CONFIG_HYPERV) && defined(CONFIG_KEXEC_CORE)
189 machine_ops.shutdown = hv_machine_shutdown; 190 machine_ops.shutdown = hv_machine_shutdown;
190 machine_ops.crash_shutdown = hv_machine_crash_shutdown; 191 machine_ops.crash_shutdown = hv_machine_crash_shutdown;
192#endif
191 mark_tsc_unstable("running on Hyper-V"); 193 mark_tsc_unstable("running on Hyper-V");
192} 194}
193 195
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 5edf6d868fc1..165be83a7fa4 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -47,6 +47,7 @@ enum extra_reg_type {
47 EXTRA_REG_RSP_1 = 1, /* offcore_response_1 */ 47 EXTRA_REG_RSP_1 = 1, /* offcore_response_1 */
48 EXTRA_REG_LBR = 2, /* lbr_select */ 48 EXTRA_REG_LBR = 2, /* lbr_select */
49 EXTRA_REG_LDLAT = 3, /* ld_lat_threshold */ 49 EXTRA_REG_LDLAT = 3, /* ld_lat_threshold */
50 EXTRA_REG_FE = 4, /* fe_* */
50 51
51 EXTRA_REG_MAX /* number of entries needed */ 52 EXTRA_REG_MAX /* number of entries needed */
52}; 53};
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index cd9b6d0b10bf..f63360be2238 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -205,6 +205,11 @@ static struct extra_reg intel_skl_extra_regs[] __read_mostly = {
205 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x3fffff8fffull, RSP_0), 205 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x3fffff8fffull, RSP_0),
206 INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0x3fffff8fffull, RSP_1), 206 INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0x3fffff8fffull, RSP_1),
207 INTEL_UEVENT_PEBS_LDLAT_EXTRA_REG(0x01cd), 207 INTEL_UEVENT_PEBS_LDLAT_EXTRA_REG(0x01cd),
208 /*
209 * Note the low 8 bits eventsel code is not a continuous field, containing
210 * some #GPing bits. These are masked out.
211 */
212 INTEL_UEVENT_EXTRA_REG(0x01c6, MSR_PEBS_FRONTEND, 0x7fff17, FE),
208 EVENT_EXTRA_END 213 EVENT_EXTRA_END
209}; 214};
210 215
@@ -250,7 +255,7 @@ struct event_constraint intel_bdw_event_constraints[] = {
250 FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */ 255 FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
251 FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */ 256 FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */
252 INTEL_UEVENT_CONSTRAINT(0x148, 0x4), /* L1D_PEND_MISS.PENDING */ 257 INTEL_UEVENT_CONSTRAINT(0x148, 0x4), /* L1D_PEND_MISS.PENDING */
253 INTEL_EVENT_CONSTRAINT(0xa3, 0x4), /* CYCLE_ACTIVITY.* */ 258 INTEL_UEVENT_CONSTRAINT(0x8a3, 0x4), /* CYCLE_ACTIVITY.CYCLES_L1D_MISS */
254 EVENT_CONSTRAINT_END 259 EVENT_CONSTRAINT_END
255}; 260};
256 261
@@ -2316,9 +2321,12 @@ static struct event_constraint *
2316intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx, 2321intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
2317 struct perf_event *event) 2322 struct perf_event *event)
2318{ 2323{
2319 struct event_constraint *c1 = cpuc->event_constraint[idx]; 2324 struct event_constraint *c1 = NULL;
2320 struct event_constraint *c2; 2325 struct event_constraint *c2;
2321 2326
2327 if (idx >= 0) /* fake does < 0 */
2328 c1 = cpuc->event_constraint[idx];
2329
2322 /* 2330 /*
2323 * first time only 2331 * first time only
2324 * - static constraint: no change across incremental scheduling calls 2332 * - static constraint: no change across incremental scheduling calls
@@ -2888,6 +2896,8 @@ PMU_FORMAT_ATTR(offcore_rsp, "config1:0-63");
2888 2896
2889PMU_FORMAT_ATTR(ldlat, "config1:0-15"); 2897PMU_FORMAT_ATTR(ldlat, "config1:0-15");
2890 2898
2899PMU_FORMAT_ATTR(frontend, "config1:0-23");
2900
2891static struct attribute *intel_arch3_formats_attr[] = { 2901static struct attribute *intel_arch3_formats_attr[] = {
2892 &format_attr_event.attr, 2902 &format_attr_event.attr,
2893 &format_attr_umask.attr, 2903 &format_attr_umask.attr,
@@ -2904,6 +2914,11 @@ static struct attribute *intel_arch3_formats_attr[] = {
2904 NULL, 2914 NULL,
2905}; 2915};
2906 2916
2917static struct attribute *skl_format_attr[] = {
2918 &format_attr_frontend.attr,
2919 NULL,
2920};
2921
2907static __initconst const struct x86_pmu core_pmu = { 2922static __initconst const struct x86_pmu core_pmu = {
2908 .name = "core", 2923 .name = "core",
2909 .handle_irq = x86_pmu_handle_irq, 2924 .handle_irq = x86_pmu_handle_irq,
@@ -3513,7 +3528,8 @@ __init int intel_pmu_init(void)
3513 3528
3514 x86_pmu.hw_config = hsw_hw_config; 3529 x86_pmu.hw_config = hsw_hw_config;
3515 x86_pmu.get_event_constraints = hsw_get_event_constraints; 3530 x86_pmu.get_event_constraints = hsw_get_event_constraints;
3516 x86_pmu.cpu_events = hsw_events_attrs; 3531 x86_pmu.format_attrs = merge_attr(intel_arch3_formats_attr,
3532 skl_format_attr);
3517 WARN_ON(!x86_pmu.format_attrs); 3533 WARN_ON(!x86_pmu.format_attrs);
3518 x86_pmu.cpu_events = hsw_events_attrs; 3534 x86_pmu.cpu_events = hsw_events_attrs;
3519 pr_cont("Skylake events, "); 3535 pr_cont("Skylake events, ");
diff --git a/arch/x86/kernel/cpu/perf_event_intel_bts.c b/arch/x86/kernel/cpu/perf_event_intel_bts.c
index 54690e885759..d1c0f254afbe 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_bts.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_bts.c
@@ -222,6 +222,7 @@ static void __bts_event_start(struct perf_event *event)
222 if (!buf || bts_buffer_is_full(buf, bts)) 222 if (!buf || bts_buffer_is_full(buf, bts))
223 return; 223 return;
224 224
225 event->hw.itrace_started = 1;
225 event->hw.state = 0; 226 event->hw.state = 0;
226 227
227 if (!buf->snapshot) 228 if (!buf->snapshot)
diff --git a/arch/x86/kernel/cpu/perf_event_msr.c b/arch/x86/kernel/cpu/perf_event_msr.c
index 086b12eae794..f32ac13934f2 100644
--- a/arch/x86/kernel/cpu/perf_event_msr.c
+++ b/arch/x86/kernel/cpu/perf_event_msr.c
@@ -10,12 +10,12 @@ enum perf_msr_id {
10 PERF_MSR_EVENT_MAX, 10 PERF_MSR_EVENT_MAX,
11}; 11};
12 12
13bool test_aperfmperf(int idx) 13static bool test_aperfmperf(int idx)
14{ 14{
15 return boot_cpu_has(X86_FEATURE_APERFMPERF); 15 return boot_cpu_has(X86_FEATURE_APERFMPERF);
16} 16}
17 17
18bool test_intel(int idx) 18static bool test_intel(int idx)
19{ 19{
20 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || 20 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
21 boot_cpu_data.x86 != 6) 21 boot_cpu_data.x86 != 6)
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 3d423a101fae..608fb26c7254 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -37,7 +37,7 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
37 { X86_FEATURE_PLN, CR_EAX, 4, 0x00000006, 0 }, 37 { X86_FEATURE_PLN, CR_EAX, 4, 0x00000006, 0 },
38 { X86_FEATURE_PTS, CR_EAX, 6, 0x00000006, 0 }, 38 { X86_FEATURE_PTS, CR_EAX, 6, 0x00000006, 0 },
39 { X86_FEATURE_HWP, CR_EAX, 7, 0x00000006, 0 }, 39 { X86_FEATURE_HWP, CR_EAX, 7, 0x00000006, 0 },
40 { X86_FEATURE_HWP_NOITFY, CR_EAX, 8, 0x00000006, 0 }, 40 { X86_FEATURE_HWP_NOTIFY, CR_EAX, 8, 0x00000006, 0 },
41 { X86_FEATURE_HWP_ACT_WINDOW, CR_EAX, 9, 0x00000006, 0 }, 41 { X86_FEATURE_HWP_ACT_WINDOW, CR_EAX, 9, 0x00000006, 0 },
42 { X86_FEATURE_HWP_EPP, CR_EAX,10, 0x00000006, 0 }, 42 { X86_FEATURE_HWP_EPP, CR_EAX,10, 0x00000006, 0 },
43 { X86_FEATURE_HWP_PKG_REQ, CR_EAX,11, 0x00000006, 0 }, 43 { X86_FEATURE_HWP_PKG_REQ, CR_EAX,11, 0x00000006, 0 },
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index e068d6683dba..74ca2fe7a0b3 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -185,10 +185,9 @@ void native_machine_crash_shutdown(struct pt_regs *regs)
185} 185}
186 186
187#ifdef CONFIG_KEXEC_FILE 187#ifdef CONFIG_KEXEC_FILE
188static int get_nr_ram_ranges_callback(unsigned long start_pfn, 188static int get_nr_ram_ranges_callback(u64 start, u64 end, void *arg)
189 unsigned long nr_pfn, void *arg)
190{ 189{
191 int *nr_ranges = arg; 190 unsigned int *nr_ranges = arg;
192 191
193 (*nr_ranges)++; 192 (*nr_ranges)++;
194 return 0; 193 return 0;
@@ -214,7 +213,7 @@ static void fill_up_crash_elf_data(struct crash_elf_data *ced,
214 213
215 ced->image = image; 214 ced->image = image;
216 215
217 walk_system_ram_range(0, -1, &nr_ranges, 216 walk_system_ram_res(0, -1, &nr_ranges,
218 get_nr_ram_ranges_callback); 217 get_nr_ram_ranges_callback);
219 218
220 ced->max_nr_ranges = nr_ranges; 219 ced->max_nr_ranges = nr_ranges;
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index c80cf6699678..38da8f29a9c8 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -68,11 +68,10 @@ static inline void *current_stack(void)
68 return (void *)(current_stack_pointer() & ~(THREAD_SIZE - 1)); 68 return (void *)(current_stack_pointer() & ~(THREAD_SIZE - 1));
69} 69}
70 70
71static inline int 71static inline int execute_on_irq_stack(int overflow, struct irq_desc *desc)
72execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq)
73{ 72{
74 struct irq_stack *curstk, *irqstk; 73 struct irq_stack *curstk, *irqstk;
75 u32 *isp, *prev_esp, arg1, arg2; 74 u32 *isp, *prev_esp, arg1;
76 75
77 curstk = (struct irq_stack *) current_stack(); 76 curstk = (struct irq_stack *) current_stack();
78 irqstk = __this_cpu_read(hardirq_stack); 77 irqstk = __this_cpu_read(hardirq_stack);
@@ -98,8 +97,8 @@ execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq)
98 asm volatile("xchgl %%ebx,%%esp \n" 97 asm volatile("xchgl %%ebx,%%esp \n"
99 "call *%%edi \n" 98 "call *%%edi \n"
100 "movl %%ebx,%%esp \n" 99 "movl %%ebx,%%esp \n"
101 : "=a" (arg1), "=d" (arg2), "=b" (isp) 100 : "=a" (arg1), "=b" (isp)
102 : "0" (irq), "1" (desc), "2" (isp), 101 : "0" (desc), "1" (isp),
103 "D" (desc->handle_irq) 102 "D" (desc->handle_irq)
104 : "memory", "cc", "ecx"); 103 : "memory", "cc", "ecx");
105 return 1; 104 return 1;
@@ -150,19 +149,15 @@ void do_softirq_own_stack(void)
150 149
151bool handle_irq(struct irq_desc *desc, struct pt_regs *regs) 150bool handle_irq(struct irq_desc *desc, struct pt_regs *regs)
152{ 151{
153 unsigned int irq; 152 int overflow = check_stack_overflow();
154 int overflow;
155
156 overflow = check_stack_overflow();
157 153
158 if (IS_ERR_OR_NULL(desc)) 154 if (IS_ERR_OR_NULL(desc))
159 return false; 155 return false;
160 156
161 irq = irq_desc_get_irq(desc); 157 if (user_mode(regs) || !execute_on_irq_stack(overflow, desc)) {
162 if (user_mode(regs) || !execute_on_irq_stack(overflow, desc, irq)) {
163 if (unlikely(overflow)) 158 if (unlikely(overflow))
164 print_stack_overflow(); 159 print_stack_overflow();
165 generic_handle_irq_desc(irq, desc); 160 generic_handle_irq_desc(desc);
166 } 161 }
167 162
168 return true; 163 return true;
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index ff16ccb918f2..c767cf2bc80a 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -75,6 +75,6 @@ bool handle_irq(struct irq_desc *desc, struct pt_regs *regs)
75 if (unlikely(IS_ERR_OR_NULL(desc))) 75 if (unlikely(IS_ERR_OR_NULL(desc)))
76 return false; 76 return false;
77 77
78 generic_handle_irq_desc(irq_desc_get_irq(desc), desc); 78 generic_handle_irq_desc(desc);
79 return true; 79 return true;
80} 80}
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index 2bcc0525f1c1..6acc9dd91f36 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -58,7 +58,7 @@ static struct ldt_struct *alloc_ldt_struct(int size)
58 if (alloc_size > PAGE_SIZE) 58 if (alloc_size > PAGE_SIZE)
59 new_ldt->entries = vzalloc(alloc_size); 59 new_ldt->entries = vzalloc(alloc_size);
60 else 60 else
61 new_ldt->entries = kzalloc(PAGE_SIZE, GFP_KERNEL); 61 new_ldt->entries = (void *)get_zeroed_page(GFP_KERNEL);
62 62
63 if (!new_ldt->entries) { 63 if (!new_ldt->entries) {
64 kfree(new_ldt); 64 kfree(new_ldt);
@@ -95,7 +95,7 @@ static void free_ldt_struct(struct ldt_struct *ldt)
95 if (ldt->size * LDT_ENTRY_SIZE > PAGE_SIZE) 95 if (ldt->size * LDT_ENTRY_SIZE > PAGE_SIZE)
96 vfree(ldt->entries); 96 vfree(ldt->entries);
97 else 97 else
98 kfree(ldt->entries); 98 free_page((unsigned long)ldt->entries);
99 kfree(ldt); 99 kfree(ldt);
100} 100}
101 101
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index f68e48f5f6c2..c2130aef3f9d 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -41,10 +41,18 @@
41#include <asm/timer.h> 41#include <asm/timer.h>
42#include <asm/special_insns.h> 42#include <asm/special_insns.h>
43 43
44/* nop stub */ 44/*
45void _paravirt_nop(void) 45 * nop stub, which must not clobber anything *including the stack* to
46{ 46 * avoid confusing the entry prologues.
47} 47 */
48extern void _paravirt_nop(void);
49asm (".pushsection .entry.text, \"ax\"\n"
50 ".global _paravirt_nop\n"
51 "_paravirt_nop:\n\t"
52 "ret\n\t"
53 ".size _paravirt_nop, . - _paravirt_nop\n\t"
54 ".type _paravirt_nop, @function\n\t"
55 ".popsection");
48 56
49/* identity function, which can be inlined */ 57/* identity function, which can be inlined */
50u32 _paravirt_ident_32(u32 x) 58u32 _paravirt_ident_32(u32 x)
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 84b8ef82a159..1b55de1267cf 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -131,8 +131,8 @@ void dma_generic_free_coherent(struct device *dev, size_t size, void *vaddr,
131 131
132bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp) 132bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp)
133{ 133{
134 *gfp = dma_alloc_coherent_gfp_flags(*dev, *gfp);
135 *gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); 134 *gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
135 *gfp = dma_alloc_coherent_gfp_flags(*dev, *gfp);
136 136
137 if (!*dev) 137 if (!*dev)
138 *dev = &x86_dma_fallback_dev; 138 *dev = &x86_dma_fallback_dev;
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 6d0e62ae8516..39e585a554b7 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -506,3 +506,58 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
506 return randomize_range(mm->brk, range_end, 0) ? : mm->brk; 506 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
507} 507}
508 508
509/*
510 * Called from fs/proc with a reference on @p to find the function
511 * which called into schedule(). This needs to be done carefully
512 * because the task might wake up and we might look at a stack
513 * changing under us.
514 */
515unsigned long get_wchan(struct task_struct *p)
516{
517 unsigned long start, bottom, top, sp, fp, ip;
518 int count = 0;
519
520 if (!p || p == current || p->state == TASK_RUNNING)
521 return 0;
522
523 start = (unsigned long)task_stack_page(p);
524 if (!start)
525 return 0;
526
527 /*
528 * Layout of the stack page:
529 *
530 * ----------- topmax = start + THREAD_SIZE - sizeof(unsigned long)
531 * PADDING
532 * ----------- top = topmax - TOP_OF_KERNEL_STACK_PADDING
533 * stack
534 * ----------- bottom = start + sizeof(thread_info)
535 * thread_info
536 * ----------- start
537 *
538 * The tasks stack pointer points at the location where the
539 * framepointer is stored. The data on the stack is:
540 * ... IP FP ... IP FP
541 *
542 * We need to read FP and IP, so we need to adjust the upper
543 * bound by another unsigned long.
544 */
545 top = start + THREAD_SIZE - TOP_OF_KERNEL_STACK_PADDING;
546 top -= 2 * sizeof(unsigned long);
547 bottom = start + sizeof(struct thread_info);
548
549 sp = READ_ONCE(p->thread.sp);
550 if (sp < bottom || sp > top)
551 return 0;
552
553 fp = READ_ONCE(*(unsigned long *)sp);
554 do {
555 if (fp < bottom || fp > top)
556 return 0;
557 ip = READ_ONCE(*(unsigned long *)(fp + sizeof(unsigned long)));
558 if (!in_sched_functions(ip))
559 return ip;
560 fp = READ_ONCE(*(unsigned long *)fp);
561 } while (count++ < 16 && p->state != TASK_RUNNING);
562 return 0;
563}
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index c13df2c735f8..737527b40e5b 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -324,31 +324,3 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
324 324
325 return prev_p; 325 return prev_p;
326} 326}
327
328#define top_esp (THREAD_SIZE - sizeof(unsigned long))
329#define top_ebp (THREAD_SIZE - 2*sizeof(unsigned long))
330
331unsigned long get_wchan(struct task_struct *p)
332{
333 unsigned long bp, sp, ip;
334 unsigned long stack_page;
335 int count = 0;
336 if (!p || p == current || p->state == TASK_RUNNING)
337 return 0;
338 stack_page = (unsigned long)task_stack_page(p);
339 sp = p->thread.sp;
340 if (!stack_page || sp < stack_page || sp > top_esp+stack_page)
341 return 0;
342 /* include/asm-i386/system.h:switch_to() pushes bp last. */
343 bp = *(unsigned long *) sp;
344 do {
345 if (bp < stack_page || bp > top_ebp+stack_page)
346 return 0;
347 ip = *(unsigned long *) (bp+4);
348 if (!in_sched_functions(ip))
349 return ip;
350 bp = *(unsigned long *) bp;
351 } while (count++ < 16);
352 return 0;
353}
354
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 3c1bbcf12924..b35921a670b2 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -499,30 +499,6 @@ void set_personality_ia32(bool x32)
499} 499}
500EXPORT_SYMBOL_GPL(set_personality_ia32); 500EXPORT_SYMBOL_GPL(set_personality_ia32);
501 501
502unsigned long get_wchan(struct task_struct *p)
503{
504 unsigned long stack;
505 u64 fp, ip;
506 int count = 0;
507
508 if (!p || p == current || p->state == TASK_RUNNING)
509 return 0;
510 stack = (unsigned long)task_stack_page(p);
511 if (p->thread.sp < stack || p->thread.sp >= stack+THREAD_SIZE)
512 return 0;
513 fp = *(u64 *)(p->thread.sp);
514 do {
515 if (fp < (unsigned long)stack ||
516 fp >= (unsigned long)stack+THREAD_SIZE)
517 return 0;
518 ip = *(u64 *)(fp+8);
519 if (!in_sched_functions(ip))
520 return ip;
521 fp = *(u64 *)fp;
522 } while (count++ < 16);
523 return 0;
524}
525
526long do_arch_prctl(struct task_struct *task, int code, unsigned long addr) 502long do_arch_prctl(struct task_struct *task, int code, unsigned long addr)
527{ 503{
528 int ret = 0; 504 int ret = 0;
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index c8d52cb4cb6e..c3f7602cd038 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -21,6 +21,7 @@
21#include <asm/hypervisor.h> 21#include <asm/hypervisor.h>
22#include <asm/nmi.h> 22#include <asm/nmi.h>
23#include <asm/x86_init.h> 23#include <asm/x86_init.h>
24#include <asm/geode.h>
24 25
25unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */ 26unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */
26EXPORT_SYMBOL(cpu_khz); 27EXPORT_SYMBOL(cpu_khz);
@@ -1013,15 +1014,17 @@ EXPORT_SYMBOL_GPL(mark_tsc_unstable);
1013 1014
1014static void __init check_system_tsc_reliable(void) 1015static void __init check_system_tsc_reliable(void)
1015{ 1016{
1016#ifdef CONFIG_MGEODE_LX 1017#if defined(CONFIG_MGEODEGX1) || defined(CONFIG_MGEODE_LX) || defined(CONFIG_X86_GENERIC)
1017 /* RTSC counts during suspend */ 1018 if (is_geode_lx()) {
1019 /* RTSC counts during suspend */
1018#define RTSC_SUSP 0x100 1020#define RTSC_SUSP 0x100
1019 unsigned long res_low, res_high; 1021 unsigned long res_low, res_high;
1020 1022
1021 rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high); 1023 rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
1022 /* Geode_LX - the OLPC CPU has a very reliable TSC */ 1024 /* Geode_LX - the OLPC CPU has a very reliable TSC */
1023 if (res_low & RTSC_SUSP) 1025 if (res_low & RTSC_SUSP)
1024 tsc_clocksource_reliable = 1; 1026 tsc_clocksource_reliable = 1;
1027 }
1025#endif 1028#endif
1026 if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) 1029 if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
1027 tsc_clocksource_reliable = 1; 1030 tsc_clocksource_reliable = 1;
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
index abd8b856bd2b..524619351961 100644
--- a/arch/x86/kernel/vm86_32.c
+++ b/arch/x86/kernel/vm86_32.c
@@ -45,6 +45,7 @@
45#include <linux/audit.h> 45#include <linux/audit.h>
46#include <linux/stddef.h> 46#include <linux/stddef.h>
47#include <linux/slab.h> 47#include <linux/slab.h>
48#include <linux/security.h>
48 49
49#include <asm/uaccess.h> 50#include <asm/uaccess.h>
50#include <asm/io.h> 51#include <asm/io.h>
@@ -232,6 +233,32 @@ static long do_sys_vm86(struct vm86plus_struct __user *user_vm86, bool plus)
232 struct pt_regs *regs = current_pt_regs(); 233 struct pt_regs *regs = current_pt_regs();
233 unsigned long err = 0; 234 unsigned long err = 0;
234 235
236 err = security_mmap_addr(0);
237 if (err) {
238 /*
239 * vm86 cannot virtualize the address space, so vm86 users
240 * need to manage the low 1MB themselves using mmap. Given
241 * that BIOS places important data in the first page, vm86
242 * is essentially useless if mmap_min_addr != 0. DOSEMU,
243 * for example, won't even bother trying to use vm86 if it
244 * can't map a page at virtual address 0.
245 *
246 * To reduce the available kernel attack surface, simply
247 * disallow vm86(old) for users who cannot mmap at va 0.
248 *
249 * The implementation of security_mmap_addr will allow
250 * suitably privileged users to map va 0 even if
251 * vm.mmap_min_addr is set above 0, and we want this
252 * behavior for vm86 as well, as it ensures that legacy
253 * tools like vbetool will not fail just because of
254 * vm.mmap_min_addr.
255 */
256 pr_info_once("Denied a call to vm86(old) from %s[%d] (uid: %d). Set the vm.mmap_min_addr sysctl to 0 and/or adjust LSM mmap_min_addr policy to enable vm86 if you are using a vm86-based DOS emulator.\n",
257 current->comm, task_pid_nr(current),
258 from_kuid_munged(&init_user_ns, current_uid()));
259 return -EPERM;
260 }
261
235 if (!vm86) { 262 if (!vm86) {
236 if (!(vm86 = kzalloc(sizeof(*vm86), GFP_KERNEL))) 263 if (!(vm86 = kzalloc(sizeof(*vm86), GFP_KERNEL)))
237 return -ENOMEM; 264 return -ENOMEM;
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 69088a1ba509..ff606f507913 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -3322,7 +3322,7 @@ walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep)
3322 break; 3322 break;
3323 3323
3324 reserved |= is_shadow_zero_bits_set(&vcpu->arch.mmu, spte, 3324 reserved |= is_shadow_zero_bits_set(&vcpu->arch.mmu, spte,
3325 leaf); 3325 iterator.level);
3326 } 3326 }
3327 3327
3328 walk_shadow_page_lockless_end(vcpu); 3328 walk_shadow_page_lockless_end(vcpu);
@@ -3614,7 +3614,7 @@ static void
3614__reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, 3614__reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3615 struct rsvd_bits_validate *rsvd_check, 3615 struct rsvd_bits_validate *rsvd_check,
3616 int maxphyaddr, int level, bool nx, bool gbpages, 3616 int maxphyaddr, int level, bool nx, bool gbpages,
3617 bool pse) 3617 bool pse, bool amd)
3618{ 3618{
3619 u64 exb_bit_rsvd = 0; 3619 u64 exb_bit_rsvd = 0;
3620 u64 gbpages_bit_rsvd = 0; 3620 u64 gbpages_bit_rsvd = 0;
@@ -3631,7 +3631,7 @@ __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3631 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for 3631 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
3632 * leaf entries) on AMD CPUs only. 3632 * leaf entries) on AMD CPUs only.
3633 */ 3633 */
3634 if (guest_cpuid_is_amd(vcpu)) 3634 if (amd)
3635 nonleaf_bit8_rsvd = rsvd_bits(8, 8); 3635 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
3636 3636
3637 switch (level) { 3637 switch (level) {
@@ -3699,7 +3699,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3699 __reset_rsvds_bits_mask(vcpu, &context->guest_rsvd_check, 3699 __reset_rsvds_bits_mask(vcpu, &context->guest_rsvd_check,
3700 cpuid_maxphyaddr(vcpu), context->root_level, 3700 cpuid_maxphyaddr(vcpu), context->root_level,
3701 context->nx, guest_cpuid_has_gbpages(vcpu), 3701 context->nx, guest_cpuid_has_gbpages(vcpu),
3702 is_pse(vcpu)); 3702 is_pse(vcpu), guest_cpuid_is_amd(vcpu));
3703} 3703}
3704 3704
3705static void 3705static void
@@ -3749,13 +3749,24 @@ static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
3749void 3749void
3750reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) 3750reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
3751{ 3751{
3752 /*
3753 * Passing "true" to the last argument is okay; it adds a check
3754 * on bit 8 of the SPTEs which KVM doesn't use anyway.
3755 */
3752 __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check, 3756 __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check,
3753 boot_cpu_data.x86_phys_bits, 3757 boot_cpu_data.x86_phys_bits,
3754 context->shadow_root_level, context->nx, 3758 context->shadow_root_level, context->nx,
3755 guest_cpuid_has_gbpages(vcpu), is_pse(vcpu)); 3759 guest_cpuid_has_gbpages(vcpu), is_pse(vcpu),
3760 true);
3756} 3761}
3757EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask); 3762EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask);
3758 3763
3764static inline bool boot_cpu_is_amd(void)
3765{
3766 WARN_ON_ONCE(!tdp_enabled);
3767 return shadow_x_mask == 0;
3768}
3769
3759/* 3770/*
3760 * the direct page table on host, use as much mmu features as 3771 * the direct page table on host, use as much mmu features as
3761 * possible, however, kvm currently does not do execution-protection. 3772 * possible, however, kvm currently does not do execution-protection.
@@ -3764,11 +3775,11 @@ static void
3764reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, 3775reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
3765 struct kvm_mmu *context) 3776 struct kvm_mmu *context)
3766{ 3777{
3767 if (guest_cpuid_is_amd(vcpu)) 3778 if (boot_cpu_is_amd())
3768 __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check, 3779 __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check,
3769 boot_cpu_data.x86_phys_bits, 3780 boot_cpu_data.x86_phys_bits,
3770 context->shadow_root_level, false, 3781 context->shadow_root_level, false,
3771 cpu_has_gbpages, true); 3782 cpu_has_gbpages, true, true);
3772 else 3783 else
3773 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, 3784 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
3774 boot_cpu_data.x86_phys_bits, 3785 boot_cpu_data.x86_phys_bits,
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index fdb8cb63a6c0..2f9ed1ff0632 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -202,6 +202,7 @@ module_param(npt, int, S_IRUGO);
202static int nested = true; 202static int nested = true;
203module_param(nested, int, S_IRUGO); 203module_param(nested, int, S_IRUGO);
204 204
205static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
205static void svm_flush_tlb(struct kvm_vcpu *vcpu); 206static void svm_flush_tlb(struct kvm_vcpu *vcpu);
206static void svm_complete_interrupts(struct vcpu_svm *svm); 207static void svm_complete_interrupts(struct vcpu_svm *svm);
207 208
@@ -513,7 +514,7 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
513 struct vcpu_svm *svm = to_svm(vcpu); 514 struct vcpu_svm *svm = to_svm(vcpu);
514 515
515 if (svm->vmcb->control.next_rip != 0) { 516 if (svm->vmcb->control.next_rip != 0) {
516 WARN_ON(!static_cpu_has(X86_FEATURE_NRIPS)); 517 WARN_ON_ONCE(!static_cpu_has(X86_FEATURE_NRIPS));
517 svm->next_rip = svm->vmcb->control.next_rip; 518 svm->next_rip = svm->vmcb->control.next_rip;
518 } 519 }
519 520
@@ -865,64 +866,6 @@ static void svm_disable_lbrv(struct vcpu_svm *svm)
865 set_msr_interception(msrpm, MSR_IA32_LASTINTTOIP, 0, 0); 866 set_msr_interception(msrpm, MSR_IA32_LASTINTTOIP, 0, 0);
866} 867}
867 868
868#define MTRR_TYPE_UC_MINUS 7
869#define MTRR2PROTVAL_INVALID 0xff
870
871static u8 mtrr2protval[8];
872
873static u8 fallback_mtrr_type(int mtrr)
874{
875 /*
876 * WT and WP aren't always available in the host PAT. Treat
877 * them as UC and UC- respectively. Everything else should be
878 * there.
879 */
880 switch (mtrr)
881 {
882 case MTRR_TYPE_WRTHROUGH:
883 return MTRR_TYPE_UNCACHABLE;
884 case MTRR_TYPE_WRPROT:
885 return MTRR_TYPE_UC_MINUS;
886 default:
887 BUG();
888 }
889}
890
891static void build_mtrr2protval(void)
892{
893 int i;
894 u64 pat;
895
896 for (i = 0; i < 8; i++)
897 mtrr2protval[i] = MTRR2PROTVAL_INVALID;
898
899 /* Ignore the invalid MTRR types. */
900 mtrr2protval[2] = 0;
901 mtrr2protval[3] = 0;
902
903 /*
904 * Use host PAT value to figure out the mapping from guest MTRR
905 * values to nested page table PAT/PCD/PWT values. We do not
906 * want to change the host PAT value every time we enter the
907 * guest.
908 */
909 rdmsrl(MSR_IA32_CR_PAT, pat);
910 for (i = 0; i < 8; i++) {
911 u8 mtrr = pat >> (8 * i);
912
913 if (mtrr2protval[mtrr] == MTRR2PROTVAL_INVALID)
914 mtrr2protval[mtrr] = __cm_idx2pte(i);
915 }
916
917 for (i = 0; i < 8; i++) {
918 if (mtrr2protval[i] == MTRR2PROTVAL_INVALID) {
919 u8 fallback = fallback_mtrr_type(i);
920 mtrr2protval[i] = mtrr2protval[fallback];
921 BUG_ON(mtrr2protval[i] == MTRR2PROTVAL_INVALID);
922 }
923 }
924}
925
926static __init int svm_hardware_setup(void) 869static __init int svm_hardware_setup(void)
927{ 870{
928 int cpu; 871 int cpu;
@@ -989,7 +932,6 @@ static __init int svm_hardware_setup(void)
989 } else 932 } else
990 kvm_disable_tdp(); 933 kvm_disable_tdp();
991 934
992 build_mtrr2protval();
993 return 0; 935 return 0;
994 936
995err: 937err:
@@ -1144,43 +1086,6 @@ static u64 svm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1144 return target_tsc - tsc; 1086 return target_tsc - tsc;
1145} 1087}
1146 1088
1147static void svm_set_guest_pat(struct vcpu_svm *svm, u64 *g_pat)
1148{
1149 struct kvm_vcpu *vcpu = &svm->vcpu;
1150
1151 /* Unlike Intel, AMD takes the guest's CR0.CD into account.
1152 *
1153 * AMD does not have IPAT. To emulate it for the case of guests
1154 * with no assigned devices, just set everything to WB. If guests
1155 * have assigned devices, however, we cannot force WB for RAM
1156 * pages only, so use the guest PAT directly.
1157 */
1158 if (!kvm_arch_has_assigned_device(vcpu->kvm))
1159 *g_pat = 0x0606060606060606;
1160 else
1161 *g_pat = vcpu->arch.pat;
1162}
1163
1164static u64 svm_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
1165{
1166 u8 mtrr;
1167
1168 /*
1169 * 1. MMIO: trust guest MTRR, so same as item 3.
1170 * 2. No passthrough: always map as WB, and force guest PAT to WB as well
1171 * 3. Passthrough: can't guarantee the result, try to trust guest.
1172 */
1173 if (!is_mmio && !kvm_arch_has_assigned_device(vcpu->kvm))
1174 return 0;
1175
1176 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED) &&
1177 kvm_read_cr0(vcpu) & X86_CR0_CD)
1178 return _PAGE_NOCACHE;
1179
1180 mtrr = kvm_mtrr_get_guest_memory_type(vcpu, gfn);
1181 return mtrr2protval[mtrr];
1182}
1183
1184static void init_vmcb(struct vcpu_svm *svm, bool init_event) 1089static void init_vmcb(struct vcpu_svm *svm, bool init_event)
1185{ 1090{
1186 struct vmcb_control_area *control = &svm->vmcb->control; 1091 struct vmcb_control_area *control = &svm->vmcb->control;
@@ -1263,7 +1168,8 @@ static void init_vmcb(struct vcpu_svm *svm, bool init_event)
1263 * svm_set_cr0() sets PG and WP and clears NW and CD on save->cr0. 1168 * svm_set_cr0() sets PG and WP and clears NW and CD on save->cr0.
1264 * It also updates the guest-visible cr0 value. 1169 * It also updates the guest-visible cr0 value.
1265 */ 1170 */
1266 (void)kvm_set_cr0(&svm->vcpu, X86_CR0_NW | X86_CR0_CD | X86_CR0_ET); 1171 svm_set_cr0(&svm->vcpu, X86_CR0_NW | X86_CR0_CD | X86_CR0_ET);
1172 kvm_mmu_reset_context(&svm->vcpu);
1267 1173
1268 save->cr4 = X86_CR4_PAE; 1174 save->cr4 = X86_CR4_PAE;
1269 /* rdx = ?? */ 1175 /* rdx = ?? */
@@ -1276,7 +1182,6 @@ static void init_vmcb(struct vcpu_svm *svm, bool init_event)
1276 clr_cr_intercept(svm, INTERCEPT_CR3_READ); 1182 clr_cr_intercept(svm, INTERCEPT_CR3_READ);
1277 clr_cr_intercept(svm, INTERCEPT_CR3_WRITE); 1183 clr_cr_intercept(svm, INTERCEPT_CR3_WRITE);
1278 save->g_pat = svm->vcpu.arch.pat; 1184 save->g_pat = svm->vcpu.arch.pat;
1279 svm_set_guest_pat(svm, &save->g_pat);
1280 save->cr3 = 0; 1185 save->cr3 = 0;
1281 save->cr4 = 0; 1186 save->cr4 = 0;
1282 } 1187 }
@@ -1671,10 +1576,13 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
1671 1576
1672 if (!vcpu->fpu_active) 1577 if (!vcpu->fpu_active)
1673 cr0 |= X86_CR0_TS; 1578 cr0 |= X86_CR0_TS;
1674 1579 /*
1675 /* These are emulated via page tables. */ 1580 * re-enable caching here because the QEMU bios
1676 cr0 &= ~(X86_CR0_CD | X86_CR0_NW); 1581 * does not do it - this results in some delay at
1677 1582 * reboot
1583 */
1584 if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
1585 cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
1678 svm->vmcb->save.cr0 = cr0; 1586 svm->vmcb->save.cr0 = cr0;
1679 mark_dirty(svm->vmcb, VMCB_CR); 1587 mark_dirty(svm->vmcb, VMCB_CR);
1680 update_cr0_intercept(svm); 1588 update_cr0_intercept(svm);
@@ -3349,16 +3257,6 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
3349 case MSR_VM_IGNNE: 3257 case MSR_VM_IGNNE:
3350 vcpu_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data); 3258 vcpu_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data);
3351 break; 3259 break;
3352 case MSR_IA32_CR_PAT:
3353 if (npt_enabled) {
3354 if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data))
3355 return 1;
3356 vcpu->arch.pat = data;
3357 svm_set_guest_pat(svm, &svm->vmcb->save.g_pat);
3358 mark_dirty(svm->vmcb, VMCB_NPT);
3359 break;
3360 }
3361 /* fall through */
3362 default: 3260 default:
3363 return kvm_set_msr_common(vcpu, msr); 3261 return kvm_set_msr_common(vcpu, msr);
3364 } 3262 }
@@ -4193,6 +4091,11 @@ static bool svm_has_high_real_mode_segbase(void)
4193 return true; 4091 return true;
4194} 4092}
4195 4093
4094static u64 svm_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
4095{
4096 return 0;
4097}
4098
4196static void svm_cpuid_update(struct kvm_vcpu *vcpu) 4099static void svm_cpuid_update(struct kvm_vcpu *vcpu)
4197{ 4100{
4198} 4101}
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index d01986832afc..06ef4908ba61 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6064,6 +6064,8 @@ static __init int hardware_setup(void)
6064 memcpy(vmx_msr_bitmap_longmode_x2apic, 6064 memcpy(vmx_msr_bitmap_longmode_x2apic,
6065 vmx_msr_bitmap_longmode, PAGE_SIZE); 6065 vmx_msr_bitmap_longmode, PAGE_SIZE);
6066 6066
6067 set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */
6068
6067 if (enable_apicv) { 6069 if (enable_apicv) {
6068 for (msr = 0x800; msr <= 0x8ff; msr++) 6070 for (msr = 0x800; msr <= 0x8ff; msr++)
6069 vmx_disable_intercept_msr_read_x2apic(msr); 6071 vmx_disable_intercept_msr_read_x2apic(msr);
@@ -8615,17 +8617,22 @@ static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
8615 u64 ipat = 0; 8617 u64 ipat = 0;
8616 8618
8617 /* For VT-d and EPT combination 8619 /* For VT-d and EPT combination
8618 * 1. MMIO: guest may want to apply WC, trust it. 8620 * 1. MMIO: always map as UC
8619 * 2. EPT with VT-d: 8621 * 2. EPT with VT-d:
8620 * a. VT-d without snooping control feature: can't guarantee the 8622 * a. VT-d without snooping control feature: can't guarantee the
8621 * result, try to trust guest. So the same as item 1. 8623 * result, try to trust guest.
8622 * b. VT-d with snooping control feature: snooping control feature of 8624 * b. VT-d with snooping control feature: snooping control feature of
8623 * VT-d engine can guarantee the cache correctness. Just set it 8625 * VT-d engine can guarantee the cache correctness. Just set it
8624 * to WB to keep consistent with host. So the same as item 3. 8626 * to WB to keep consistent with host. So the same as item 3.
8625 * 3. EPT without VT-d: always map as WB and set IPAT=1 to keep 8627 * 3. EPT without VT-d: always map as WB and set IPAT=1 to keep
8626 * consistent with host MTRR 8628 * consistent with host MTRR
8627 */ 8629 */
8628 if (!is_mmio && !kvm_arch_has_noncoherent_dma(vcpu->kvm)) { 8630 if (is_mmio) {
8631 cache = MTRR_TYPE_UNCACHABLE;
8632 goto exit;
8633 }
8634
8635 if (!kvm_arch_has_noncoherent_dma(vcpu->kvm)) {
8629 ipat = VMX_EPT_IPAT_BIT; 8636 ipat = VMX_EPT_IPAT_BIT;
8630 cache = MTRR_TYPE_WRBACK; 8637 cache = MTRR_TYPE_WRBACK;
8631 goto exit; 8638 goto exit;
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index a60bdbccff51..92511d4b7236 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -149,6 +149,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
149 { "nmi_window", VCPU_STAT(nmi_window_exits) }, 149 { "nmi_window", VCPU_STAT(nmi_window_exits) },
150 { "halt_exits", VCPU_STAT(halt_exits) }, 150 { "halt_exits", VCPU_STAT(halt_exits) },
151 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) }, 151 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
152 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
152 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 153 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
153 { "hypercalls", VCPU_STAT(hypercalls) }, 154 { "hypercalls", VCPU_STAT(hypercalls) },
154 { "request_irq", VCPU_STAT(request_irq_exits) }, 155 { "request_irq", VCPU_STAT(request_irq_exits) },
@@ -1707,8 +1708,6 @@ static int kvm_guest_time_update(struct kvm_vcpu *v)
1707 vcpu->pvclock_set_guest_stopped_request = false; 1708 vcpu->pvclock_set_guest_stopped_request = false;
1708 } 1709 }
1709 1710
1710 pvclock_flags |= PVCLOCK_COUNTS_FROM_ZERO;
1711
1712 /* If the host uses TSC clocksource, then it is stable */ 1711 /* If the host uses TSC clocksource, then it is stable */
1713 if (use_master_clock) 1712 if (use_master_clock)
1714 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT; 1713 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
@@ -2006,8 +2005,6 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2006 &vcpu->requests); 2005 &vcpu->requests);
2007 2006
2008 ka->boot_vcpu_runs_old_kvmclock = tmp; 2007 ka->boot_vcpu_runs_old_kvmclock = tmp;
2009
2010 ka->kvmclock_offset = -get_kernel_ns();
2011 } 2008 }
2012 2009
2013 vcpu->arch.time = data; 2010 vcpu->arch.time = data;
@@ -2189,6 +2186,8 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2189 case MSR_IA32_LASTINTFROMIP: 2186 case MSR_IA32_LASTINTFROMIP:
2190 case MSR_IA32_LASTINTTOIP: 2187 case MSR_IA32_LASTINTTOIP:
2191 case MSR_K8_SYSCFG: 2188 case MSR_K8_SYSCFG:
2189 case MSR_K8_TSEG_ADDR:
2190 case MSR_K8_TSEG_MASK:
2192 case MSR_K7_HWCR: 2191 case MSR_K7_HWCR:
2193 case MSR_VM_HSAVE_PA: 2192 case MSR_VM_HSAVE_PA:
2194 case MSR_K8_INT_PENDING_MSG: 2193 case MSR_K8_INT_PENDING_MSG:
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 161804de124a..a0d09f6c6533 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -1015,7 +1015,7 @@ static struct clock_event_device lguest_clockevent = {
1015 * This is the Guest timer interrupt handler (hardware interrupt 0). We just 1015 * This is the Guest timer interrupt handler (hardware interrupt 0). We just
1016 * call the clockevent infrastructure and it does whatever needs doing. 1016 * call the clockevent infrastructure and it does whatever needs doing.
1017 */ 1017 */
1018static void lguest_time_irq(unsigned int irq, struct irq_desc *desc) 1018static void lguest_time_irq(struct irq_desc *desc)
1019{ 1019{
1020 unsigned long flags; 1020 unsigned long flags;
1021 1021
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 30564e2752d3..df48430c279b 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -1132,7 +1132,7 @@ void mark_rodata_ro(void)
1132 * has been zapped already via cleanup_highmem(). 1132 * has been zapped already via cleanup_highmem().
1133 */ 1133 */
1134 all_end = roundup((unsigned long)_brk_end, PMD_SIZE); 1134 all_end = roundup((unsigned long)_brk_end, PMD_SIZE);
1135 set_memory_nx(rodata_start, (all_end - rodata_start) >> PAGE_SHIFT); 1135 set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT);
1136 1136
1137 rodata_test(); 1137 rodata_test();
1138 1138
diff --git a/arch/x86/mm/srat.c b/arch/x86/mm/srat.c
index 66338a60aa6e..c2aea63bee20 100644
--- a/arch/x86/mm/srat.c
+++ b/arch/x86/mm/srat.c
@@ -192,10 +192,11 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
192 192
193 node_set(node, numa_nodes_parsed); 193 node_set(node, numa_nodes_parsed);
194 194
195 pr_info("SRAT: Node %u PXM %u [mem %#010Lx-%#010Lx]%s\n", 195 pr_info("SRAT: Node %u PXM %u [mem %#010Lx-%#010Lx]%s%s\n",
196 node, pxm, 196 node, pxm,
197 (unsigned long long) start, (unsigned long long) end - 1, 197 (unsigned long long) start, (unsigned long long) end - 1,
198 hotpluggable ? " hotplug" : ""); 198 hotpluggable ? " hotplug" : "",
199 ma->flags & ACPI_SRAT_MEM_NON_VOLATILE ? " non-volatile" : "");
199 200
200 /* Mark hotplug range in memblock. */ 201 /* Mark hotplug range in memblock. */
201 if (hotpluggable && memblock_mark_hotplug(start, ma->length)) 202 if (hotpluggable && memblock_mark_hotplug(start, ma->length))
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 09d3afc0a181..dc78a4a9a466 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -166,6 +166,7 @@ void pcibios_fixup_bus(struct pci_bus *b)
166{ 166{
167 struct pci_dev *dev; 167 struct pci_dev *dev;
168 168
169 pci_read_bridge_bases(b);
169 list_for_each_entry(dev, &b->devices, bus_list) 170 list_for_each_entry(dev, &b->devices, bus_list)
170 pcibios_fixup_device_resources(dev); 171 pcibios_fixup_device_resources(dev);
171} 172}
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index 1db84c0758b7..6a28ded74211 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -705,6 +705,70 @@ out:
705} 705}
706 706
707/* 707/*
708 * Iterate the EFI memory map in reverse order because the regions
709 * will be mapped top-down. The end result is the same as if we had
710 * mapped things forward, but doesn't require us to change the
711 * existing implementation of efi_map_region().
712 */
713static inline void *efi_map_next_entry_reverse(void *entry)
714{
715 /* Initial call */
716 if (!entry)
717 return memmap.map_end - memmap.desc_size;
718
719 entry -= memmap.desc_size;
720 if (entry < memmap.map)
721 return NULL;
722
723 return entry;
724}
725
726/*
727 * efi_map_next_entry - Return the next EFI memory map descriptor
728 * @entry: Previous EFI memory map descriptor
729 *
730 * This is a helper function to iterate over the EFI memory map, which
731 * we do in different orders depending on the current configuration.
732 *
733 * To begin traversing the memory map @entry must be %NULL.
734 *
735 * Returns %NULL when we reach the end of the memory map.
736 */
737static void *efi_map_next_entry(void *entry)
738{
739 if (!efi_enabled(EFI_OLD_MEMMAP) && efi_enabled(EFI_64BIT)) {
740 /*
741 * Starting in UEFI v2.5 the EFI_PROPERTIES_TABLE
742 * config table feature requires us to map all entries
743 * in the same order as they appear in the EFI memory
744 * map. That is to say, entry N must have a lower
745 * virtual address than entry N+1. This is because the
746 * firmware toolchain leaves relative references in
747 * the code/data sections, which are split and become
748 * separate EFI memory regions. Mapping things
749 * out-of-order leads to the firmware accessing
750 * unmapped addresses.
751 *
752 * Since we need to map things this way whether or not
753 * the kernel actually makes use of
754 * EFI_PROPERTIES_TABLE, let's just switch to this
755 * scheme by default for 64-bit.
756 */
757 return efi_map_next_entry_reverse(entry);
758 }
759
760 /* Initial call */
761 if (!entry)
762 return memmap.map;
763
764 entry += memmap.desc_size;
765 if (entry >= memmap.map_end)
766 return NULL;
767
768 return entry;
769}
770
771/*
708 * Map the efi memory ranges of the runtime services and update new_mmap with 772 * Map the efi memory ranges of the runtime services and update new_mmap with
709 * virtual addresses. 773 * virtual addresses.
710 */ 774 */
@@ -714,7 +778,8 @@ static void * __init efi_map_regions(int *count, int *pg_shift)
714 unsigned long left = 0; 778 unsigned long left = 0;
715 efi_memory_desc_t *md; 779 efi_memory_desc_t *md;
716 780
717 for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) { 781 p = NULL;
782 while ((p = efi_map_next_entry(p))) {
718 md = p; 783 md = p;
719 if (!(md->attribute & EFI_MEMORY_RUNTIME)) { 784 if (!(md->attribute & EFI_MEMORY_RUNTIME)) {
720#ifdef CONFIG_X86_64 785#ifdef CONFIG_X86_64
diff --git a/arch/xtensa/include/asm/Kbuild b/arch/xtensa/include/asm/Kbuild
index 63c223dff5f1..b56855a1382a 100644
--- a/arch/xtensa/include/asm/Kbuild
+++ b/arch/xtensa/include/asm/Kbuild
@@ -28,4 +28,5 @@ generic-y += statfs.h
28generic-y += termios.h 28generic-y += termios.h
29generic-y += topology.h 29generic-y += topology.h
30generic-y += trace_clock.h 30generic-y += trace_clock.h
31generic-y += word-at-a-time.h
31generic-y += xor.h 32generic-y += xor.h
diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c
index d27b4dcf221f..b848cc3dc913 100644
--- a/arch/xtensa/kernel/pci.c
+++ b/arch/xtensa/kernel/pci.c
@@ -210,6 +210,10 @@ subsys_initcall(pcibios_init);
210 210
211void pcibios_fixup_bus(struct pci_bus *bus) 211void pcibios_fixup_bus(struct pci_bus *bus)
212{ 212{
213 if (bus->parent) {
214 /* This is a subordinate bridge */
215 pci_read_bridge_bases(bus);
216 }
213} 217}
214 218
215void pcibios_set_master(struct pci_dev *dev) 219void pcibios_set_master(struct pci_dev *dev)
diff --git a/block/bio-integrity.c b/block/bio-integrity.c
index 4aecca79374a..14b8faf8b09d 100644
--- a/block/bio-integrity.c
+++ b/block/bio-integrity.c
@@ -140,6 +140,11 @@ int bio_integrity_add_page(struct bio *bio, struct page *page,
140 140
141 iv = bip->bip_vec + bip->bip_vcnt; 141 iv = bip->bip_vec + bip->bip_vcnt;
142 142
143 if (bip->bip_vcnt &&
144 bvec_gap_to_prev(bdev_get_queue(bio->bi_bdev),
145 &bip->bip_vec[bip->bip_vcnt - 1], offset))
146 return 0;
147
143 iv->bv_page = page; 148 iv->bv_page = page;
144 iv->bv_len = len; 149 iv->bv_len = len;
145 iv->bv_offset = offset; 150 iv->bv_offset = offset;
diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c
index ac8370cb2515..55512dd62633 100644
--- a/block/blk-cgroup.c
+++ b/block/blk-cgroup.c
@@ -370,6 +370,9 @@ static void blkg_destroy_all(struct request_queue *q)
370 blkg_destroy(blkg); 370 blkg_destroy(blkg);
371 spin_unlock(&blkcg->lock); 371 spin_unlock(&blkcg->lock);
372 } 372 }
373
374 q->root_blkg = NULL;
375 q->root_rl.blkg = NULL;
373} 376}
374 377
375/* 378/*
diff --git a/block/blk-integrity.c b/block/blk-integrity.c
index f548b64be092..75f29cf70188 100644
--- a/block/blk-integrity.c
+++ b/block/blk-integrity.c
@@ -204,6 +204,9 @@ bool blk_integrity_merge_rq(struct request_queue *q, struct request *req,
204 q->limits.max_integrity_segments) 204 q->limits.max_integrity_segments)
205 return false; 205 return false;
206 206
207 if (integrity_req_gap_back_merge(req, next->bio))
208 return false;
209
207 return true; 210 return true;
208} 211}
209EXPORT_SYMBOL(blk_integrity_merge_rq); 212EXPORT_SYMBOL(blk_integrity_merge_rq);
diff --git a/block/blk-map.c b/block/blk-map.c
index 233841644c9d..f565e11f465a 100644
--- a/block/blk-map.c
+++ b/block/blk-map.c
@@ -9,6 +9,24 @@
9 9
10#include "blk.h" 10#include "blk.h"
11 11
12static bool iovec_gap_to_prv(struct request_queue *q,
13 struct iovec *prv, struct iovec *cur)
14{
15 unsigned long prev_end;
16
17 if (!queue_virt_boundary(q))
18 return false;
19
20 if (prv->iov_base == NULL && prv->iov_len == 0)
21 /* prv is not set - don't check */
22 return false;
23
24 prev_end = (unsigned long)(prv->iov_base + prv->iov_len);
25
26 return (((unsigned long)cur->iov_base & queue_virt_boundary(q)) ||
27 prev_end & queue_virt_boundary(q));
28}
29
12int blk_rq_append_bio(struct request_queue *q, struct request *rq, 30int blk_rq_append_bio(struct request_queue *q, struct request *rq,
13 struct bio *bio) 31 struct bio *bio)
14{ 32{
@@ -67,7 +85,7 @@ int blk_rq_map_user_iov(struct request_queue *q, struct request *rq,
67 struct bio *bio; 85 struct bio *bio;
68 int unaligned = 0; 86 int unaligned = 0;
69 struct iov_iter i; 87 struct iov_iter i;
70 struct iovec iov; 88 struct iovec iov, prv = {.iov_base = NULL, .iov_len = 0};
71 89
72 if (!iter || !iter->count) 90 if (!iter || !iter->count)
73 return -EINVAL; 91 return -EINVAL;
@@ -81,8 +99,12 @@ int blk_rq_map_user_iov(struct request_queue *q, struct request *rq,
81 /* 99 /*
82 * Keep going so we check length of all segments 100 * Keep going so we check length of all segments
83 */ 101 */
84 if (uaddr & queue_dma_alignment(q)) 102 if ((uaddr & queue_dma_alignment(q)) ||
103 iovec_gap_to_prv(q, &prv, &iov))
85 unaligned = 1; 104 unaligned = 1;
105
106 prv.iov_base = iov.iov_base;
107 prv.iov_len = iov.iov_len;
86 } 108 }
87 109
88 if (unaligned || (q->dma_pad_mask & iter->count) || map_data) 110 if (unaligned || (q->dma_pad_mask & iter->count) || map_data)
diff --git a/block/blk-merge.c b/block/blk-merge.c
index d088cffb8105..c4e9c37f3e38 100644
--- a/block/blk-merge.c
+++ b/block/blk-merge.c
@@ -66,36 +66,33 @@ static struct bio *blk_bio_segment_split(struct request_queue *q,
66 struct bio *bio, 66 struct bio *bio,
67 struct bio_set *bs) 67 struct bio_set *bs)
68{ 68{
69 struct bio *split; 69 struct bio_vec bv, bvprv, *bvprvp = NULL;
70 struct bio_vec bv, bvprv;
71 struct bvec_iter iter; 70 struct bvec_iter iter;
72 unsigned seg_size = 0, nsegs = 0, sectors = 0; 71 unsigned seg_size = 0, nsegs = 0, sectors = 0;
73 int prev = 0;
74 72
75 bio_for_each_segment(bv, bio, iter) { 73 bio_for_each_segment(bv, bio, iter) {
76 sectors += bv.bv_len >> 9; 74 if (sectors + (bv.bv_len >> 9) > queue_max_sectors(q))
77
78 if (sectors > queue_max_sectors(q))
79 goto split; 75 goto split;
80 76
81 /* 77 /*
82 * If the queue doesn't support SG gaps and adding this 78 * If the queue doesn't support SG gaps and adding this
83 * offset would create a gap, disallow it. 79 * offset would create a gap, disallow it.
84 */ 80 */
85 if (prev && bvec_gap_to_prev(q, &bvprv, bv.bv_offset)) 81 if (bvprvp && bvec_gap_to_prev(q, bvprvp, bv.bv_offset))
86 goto split; 82 goto split;
87 83
88 if (prev && blk_queue_cluster(q)) { 84 if (bvprvp && blk_queue_cluster(q)) {
89 if (seg_size + bv.bv_len > queue_max_segment_size(q)) 85 if (seg_size + bv.bv_len > queue_max_segment_size(q))
90 goto new_segment; 86 goto new_segment;
91 if (!BIOVEC_PHYS_MERGEABLE(&bvprv, &bv)) 87 if (!BIOVEC_PHYS_MERGEABLE(bvprvp, &bv))
92 goto new_segment; 88 goto new_segment;
93 if (!BIOVEC_SEG_BOUNDARY(q, &bvprv, &bv)) 89 if (!BIOVEC_SEG_BOUNDARY(q, bvprvp, &bv))
94 goto new_segment; 90 goto new_segment;
95 91
96 seg_size += bv.bv_len; 92 seg_size += bv.bv_len;
97 bvprv = bv; 93 bvprv = bv;
98 prev = 1; 94 bvprvp = &bv;
95 sectors += bv.bv_len >> 9;
99 continue; 96 continue;
100 } 97 }
101new_segment: 98new_segment:
@@ -104,23 +101,14 @@ new_segment:
104 101
105 nsegs++; 102 nsegs++;
106 bvprv = bv; 103 bvprv = bv;
107 prev = 1; 104 bvprvp = &bv;
108 seg_size = bv.bv_len; 105 seg_size = bv.bv_len;
106 sectors += bv.bv_len >> 9;
109 } 107 }
110 108
111 return NULL; 109 return NULL;
112split: 110split:
113 split = bio_clone_bioset(bio, GFP_NOIO, bs); 111 return bio_split(bio, sectors, GFP_NOIO, bs);
114
115 split->bi_iter.bi_size -= iter.bi_size;
116 bio->bi_iter = iter;
117
118 if (bio_integrity(bio)) {
119 bio_integrity_advance(bio, split->bi_iter.bi_size);
120 bio_integrity_trim(split, 0, bio_sectors(split));
121 }
122
123 return split;
124} 112}
125 113
126void blk_queue_split(struct request_queue *q, struct bio **bio, 114void blk_queue_split(struct request_queue *q, struct bio **bio,
@@ -439,6 +427,11 @@ no_merge:
439int ll_back_merge_fn(struct request_queue *q, struct request *req, 427int ll_back_merge_fn(struct request_queue *q, struct request *req,
440 struct bio *bio) 428 struct bio *bio)
441{ 429{
430 if (req_gap_back_merge(req, bio))
431 return 0;
432 if (blk_integrity_rq(req) &&
433 integrity_req_gap_back_merge(req, bio))
434 return 0;
442 if (blk_rq_sectors(req) + bio_sectors(bio) > 435 if (blk_rq_sectors(req) + bio_sectors(bio) >
443 blk_rq_get_max_sectors(req)) { 436 blk_rq_get_max_sectors(req)) {
444 req->cmd_flags |= REQ_NOMERGE; 437 req->cmd_flags |= REQ_NOMERGE;
@@ -457,6 +450,12 @@ int ll_back_merge_fn(struct request_queue *q, struct request *req,
457int ll_front_merge_fn(struct request_queue *q, struct request *req, 450int ll_front_merge_fn(struct request_queue *q, struct request *req,
458 struct bio *bio) 451 struct bio *bio)
459{ 452{
453
454 if (req_gap_front_merge(req, bio))
455 return 0;
456 if (blk_integrity_rq(req) &&
457 integrity_req_gap_front_merge(req, bio))
458 return 0;
460 if (blk_rq_sectors(req) + bio_sectors(bio) > 459 if (blk_rq_sectors(req) + bio_sectors(bio) >
461 blk_rq_get_max_sectors(req)) { 460 blk_rq_get_max_sectors(req)) {
462 req->cmd_flags |= REQ_NOMERGE; 461 req->cmd_flags |= REQ_NOMERGE;
@@ -483,14 +482,6 @@ static bool req_no_special_merge(struct request *req)
483 return !q->mq_ops && req->special; 482 return !q->mq_ops && req->special;
484} 483}
485 484
486static int req_gap_to_prev(struct request *req, struct bio *next)
487{
488 struct bio *prev = req->biotail;
489
490 return bvec_gap_to_prev(req->q, &prev->bi_io_vec[prev->bi_vcnt - 1],
491 next->bi_io_vec[0].bv_offset);
492}
493
494static int ll_merge_requests_fn(struct request_queue *q, struct request *req, 485static int ll_merge_requests_fn(struct request_queue *q, struct request *req,
495 struct request *next) 486 struct request *next)
496{ 487{
@@ -505,7 +496,7 @@ static int ll_merge_requests_fn(struct request_queue *q, struct request *req,
505 if (req_no_special_merge(req) || req_no_special_merge(next)) 496 if (req_no_special_merge(req) || req_no_special_merge(next))
506 return 0; 497 return 0;
507 498
508 if (req_gap_to_prev(req, next->bio)) 499 if (req_gap_back_merge(req, next->bio))
509 return 0; 500 return 0;
510 501
511 /* 502 /*
@@ -713,10 +704,6 @@ bool blk_rq_merge_ok(struct request *rq, struct bio *bio)
713 !blk_write_same_mergeable(rq->bio, bio)) 704 !blk_write_same_mergeable(rq->bio, bio))
714 return false; 705 return false;
715 706
716 /* Only check gaps if the bio carries data */
717 if (bio_has_data(bio) && req_gap_to_prev(rq, bio))
718 return false;
719
720 return true; 707 return true;
721} 708}
722 709
diff --git a/block/blk-mq-cpumap.c b/block/blk-mq-cpumap.c
index 1e28ddb656b8..8764c241e5bb 100644
--- a/block/blk-mq-cpumap.c
+++ b/block/blk-mq-cpumap.c
@@ -31,7 +31,8 @@ static int get_first_sibling(unsigned int cpu)
31 return cpu; 31 return cpu;
32} 32}
33 33
34int blk_mq_update_queue_map(unsigned int *map, unsigned int nr_queues) 34int blk_mq_update_queue_map(unsigned int *map, unsigned int nr_queues,
35 const struct cpumask *online_mask)
35{ 36{
36 unsigned int i, nr_cpus, nr_uniq_cpus, queue, first_sibling; 37 unsigned int i, nr_cpus, nr_uniq_cpus, queue, first_sibling;
37 cpumask_var_t cpus; 38 cpumask_var_t cpus;
@@ -41,7 +42,7 @@ int blk_mq_update_queue_map(unsigned int *map, unsigned int nr_queues)
41 42
42 cpumask_clear(cpus); 43 cpumask_clear(cpus);
43 nr_cpus = nr_uniq_cpus = 0; 44 nr_cpus = nr_uniq_cpus = 0;
44 for_each_online_cpu(i) { 45 for_each_cpu(i, online_mask) {
45 nr_cpus++; 46 nr_cpus++;
46 first_sibling = get_first_sibling(i); 47 first_sibling = get_first_sibling(i);
47 if (!cpumask_test_cpu(first_sibling, cpus)) 48 if (!cpumask_test_cpu(first_sibling, cpus))
@@ -51,7 +52,7 @@ int blk_mq_update_queue_map(unsigned int *map, unsigned int nr_queues)
51 52
52 queue = 0; 53 queue = 0;
53 for_each_possible_cpu(i) { 54 for_each_possible_cpu(i) {
54 if (!cpu_online(i)) { 55 if (!cpumask_test_cpu(i, online_mask)) {
55 map[i] = 0; 56 map[i] = 0;
56 continue; 57 continue;
57 } 58 }
@@ -95,7 +96,7 @@ unsigned int *blk_mq_make_queue_map(struct blk_mq_tag_set *set)
95 if (!map) 96 if (!map)
96 return NULL; 97 return NULL;
97 98
98 if (!blk_mq_update_queue_map(map, set->nr_hw_queues)) 99 if (!blk_mq_update_queue_map(map, set->nr_hw_queues, cpu_online_mask))
99 return map; 100 return map;
100 101
101 kfree(map); 102 kfree(map);
diff --git a/block/blk-mq-sysfs.c b/block/blk-mq-sysfs.c
index 279c5d674edf..788fffd9b409 100644
--- a/block/blk-mq-sysfs.c
+++ b/block/blk-mq-sysfs.c
@@ -229,8 +229,6 @@ static ssize_t blk_mq_hw_sysfs_cpus_show(struct blk_mq_hw_ctx *hctx, char *page)
229 unsigned int i, first = 1; 229 unsigned int i, first = 1;
230 ssize_t ret = 0; 230 ssize_t ret = 0;
231 231
232 blk_mq_disable_hotplug();
233
234 for_each_cpu(i, hctx->cpumask) { 232 for_each_cpu(i, hctx->cpumask) {
235 if (first) 233 if (first)
236 ret += sprintf(ret + page, "%u", i); 234 ret += sprintf(ret + page, "%u", i);
@@ -240,8 +238,6 @@ static ssize_t blk_mq_hw_sysfs_cpus_show(struct blk_mq_hw_ctx *hctx, char *page)
240 first = 0; 238 first = 0;
241 } 239 }
242 240
243 blk_mq_enable_hotplug();
244
245 ret += sprintf(ret + page, "\n"); 241 ret += sprintf(ret + page, "\n");
246 return ret; 242 return ret;
247} 243}
@@ -343,7 +339,7 @@ static void blk_mq_unregister_hctx(struct blk_mq_hw_ctx *hctx)
343 struct blk_mq_ctx *ctx; 339 struct blk_mq_ctx *ctx;
344 int i; 340 int i;
345 341
346 if (!hctx->nr_ctx || !(hctx->flags & BLK_MQ_F_SYSFS_UP)) 342 if (!hctx->nr_ctx)
347 return; 343 return;
348 344
349 hctx_for_each_ctx(hctx, ctx, i) 345 hctx_for_each_ctx(hctx, ctx, i)
@@ -358,7 +354,7 @@ static int blk_mq_register_hctx(struct blk_mq_hw_ctx *hctx)
358 struct blk_mq_ctx *ctx; 354 struct blk_mq_ctx *ctx;
359 int i, ret; 355 int i, ret;
360 356
361 if (!hctx->nr_ctx || !(hctx->flags & BLK_MQ_F_SYSFS_UP)) 357 if (!hctx->nr_ctx)
362 return 0; 358 return 0;
363 359
364 ret = kobject_add(&hctx->kobj, &q->mq_kobj, "%u", hctx->queue_num); 360 ret = kobject_add(&hctx->kobj, &q->mq_kobj, "%u", hctx->queue_num);
@@ -381,6 +377,8 @@ void blk_mq_unregister_disk(struct gendisk *disk)
381 struct blk_mq_ctx *ctx; 377 struct blk_mq_ctx *ctx;
382 int i, j; 378 int i, j;
383 379
380 blk_mq_disable_hotplug();
381
384 queue_for_each_hw_ctx(q, hctx, i) { 382 queue_for_each_hw_ctx(q, hctx, i) {
385 blk_mq_unregister_hctx(hctx); 383 blk_mq_unregister_hctx(hctx);
386 384
@@ -395,6 +393,9 @@ void blk_mq_unregister_disk(struct gendisk *disk)
395 kobject_put(&q->mq_kobj); 393 kobject_put(&q->mq_kobj);
396 394
397 kobject_put(&disk_to_dev(disk)->kobj); 395 kobject_put(&disk_to_dev(disk)->kobj);
396
397 q->mq_sysfs_init_done = false;
398 blk_mq_enable_hotplug();
398} 399}
399 400
400static void blk_mq_sysfs_init(struct request_queue *q) 401static void blk_mq_sysfs_init(struct request_queue *q)
@@ -425,27 +426,30 @@ int blk_mq_register_disk(struct gendisk *disk)
425 struct blk_mq_hw_ctx *hctx; 426 struct blk_mq_hw_ctx *hctx;
426 int ret, i; 427 int ret, i;
427 428
429 blk_mq_disable_hotplug();
430
428 blk_mq_sysfs_init(q); 431 blk_mq_sysfs_init(q);
429 432
430 ret = kobject_add(&q->mq_kobj, kobject_get(&dev->kobj), "%s", "mq"); 433 ret = kobject_add(&q->mq_kobj, kobject_get(&dev->kobj), "%s", "mq");
431 if (ret < 0) 434 if (ret < 0)
432 return ret; 435 goto out;
433 436
434 kobject_uevent(&q->mq_kobj, KOBJ_ADD); 437 kobject_uevent(&q->mq_kobj, KOBJ_ADD);
435 438
436 queue_for_each_hw_ctx(q, hctx, i) { 439 queue_for_each_hw_ctx(q, hctx, i) {
437 hctx->flags |= BLK_MQ_F_SYSFS_UP;
438 ret = blk_mq_register_hctx(hctx); 440 ret = blk_mq_register_hctx(hctx);
439 if (ret) 441 if (ret)
440 break; 442 break;
441 } 443 }
442 444
443 if (ret) { 445 if (ret)
444 blk_mq_unregister_disk(disk); 446 blk_mq_unregister_disk(disk);
445 return ret; 447 else
446 } 448 q->mq_sysfs_init_done = true;
449out:
450 blk_mq_enable_hotplug();
447 451
448 return 0; 452 return ret;
449} 453}
450EXPORT_SYMBOL_GPL(blk_mq_register_disk); 454EXPORT_SYMBOL_GPL(blk_mq_register_disk);
451 455
@@ -454,6 +458,9 @@ void blk_mq_sysfs_unregister(struct request_queue *q)
454 struct blk_mq_hw_ctx *hctx; 458 struct blk_mq_hw_ctx *hctx;
455 int i; 459 int i;
456 460
461 if (!q->mq_sysfs_init_done)
462 return;
463
457 queue_for_each_hw_ctx(q, hctx, i) 464 queue_for_each_hw_ctx(q, hctx, i)
458 blk_mq_unregister_hctx(hctx); 465 blk_mq_unregister_hctx(hctx);
459} 466}
@@ -463,6 +470,9 @@ int blk_mq_sysfs_register(struct request_queue *q)
463 struct blk_mq_hw_ctx *hctx; 470 struct blk_mq_hw_ctx *hctx;
464 int i, ret = 0; 471 int i, ret = 0;
465 472
473 if (!q->mq_sysfs_init_done)
474 return ret;
475
466 queue_for_each_hw_ctx(q, hctx, i) { 476 queue_for_each_hw_ctx(q, hctx, i) {
467 ret = blk_mq_register_hctx(hctx); 477 ret = blk_mq_register_hctx(hctx);
468 if (ret) 478 if (ret)
diff --git a/block/blk-mq-tag.c b/block/blk-mq-tag.c
index 9115c6d59948..ed96474d75cb 100644
--- a/block/blk-mq-tag.c
+++ b/block/blk-mq-tag.c
@@ -471,17 +471,30 @@ void blk_mq_all_tag_busy_iter(struct blk_mq_tags *tags, busy_tag_iter_fn *fn,
471} 471}
472EXPORT_SYMBOL(blk_mq_all_tag_busy_iter); 472EXPORT_SYMBOL(blk_mq_all_tag_busy_iter);
473 473
474void blk_mq_tag_busy_iter(struct blk_mq_hw_ctx *hctx, busy_iter_fn *fn, 474void blk_mq_queue_tag_busy_iter(struct request_queue *q, busy_iter_fn *fn,
475 void *priv) 475 void *priv)
476{ 476{
477 struct blk_mq_tags *tags = hctx->tags; 477 struct blk_mq_hw_ctx *hctx;
478 int i;
479
480
481 queue_for_each_hw_ctx(q, hctx, i) {
482 struct blk_mq_tags *tags = hctx->tags;
483
484 /*
485 * If not software queues are currently mapped to this
486 * hardware queue, there's nothing to check
487 */
488 if (!blk_mq_hw_queue_mapped(hctx))
489 continue;
490
491 if (tags->nr_reserved_tags)
492 bt_for_each(hctx, &tags->breserved_tags, 0, fn, priv, true);
493 bt_for_each(hctx, &tags->bitmap_tags, tags->nr_reserved_tags, fn, priv,
494 false);
495 }
478 496
479 if (tags->nr_reserved_tags)
480 bt_for_each(hctx, &tags->breserved_tags, 0, fn, priv, true);
481 bt_for_each(hctx, &tags->bitmap_tags, tags->nr_reserved_tags, fn, priv,
482 false);
483} 497}
484EXPORT_SYMBOL(blk_mq_tag_busy_iter);
485 498
486static unsigned int bt_unused_tags(struct blk_mq_bitmap_tags *bt) 499static unsigned int bt_unused_tags(struct blk_mq_bitmap_tags *bt)
487{ 500{
diff --git a/block/blk-mq-tag.h b/block/blk-mq-tag.h
index 9eb2cf4f01cb..d468a79f2c4a 100644
--- a/block/blk-mq-tag.h
+++ b/block/blk-mq-tag.h
@@ -58,6 +58,8 @@ extern ssize_t blk_mq_tag_sysfs_show(struct blk_mq_tags *tags, char *page);
58extern void blk_mq_tag_init_last_tag(struct blk_mq_tags *tags, unsigned int *last_tag); 58extern void blk_mq_tag_init_last_tag(struct blk_mq_tags *tags, unsigned int *last_tag);
59extern int blk_mq_tag_update_depth(struct blk_mq_tags *tags, unsigned int depth); 59extern int blk_mq_tag_update_depth(struct blk_mq_tags *tags, unsigned int depth);
60extern void blk_mq_tag_wakeup_all(struct blk_mq_tags *tags, bool); 60extern void blk_mq_tag_wakeup_all(struct blk_mq_tags *tags, bool);
61void blk_mq_queue_tag_busy_iter(struct request_queue *q, busy_iter_fn *fn,
62 void *priv);
61 63
62enum { 64enum {
63 BLK_MQ_TAG_CACHE_MIN = 1, 65 BLK_MQ_TAG_CACHE_MIN = 1,
diff --git a/block/blk-mq.c b/block/blk-mq.c
index f2d67b4047a0..7785ae96267a 100644
--- a/block/blk-mq.c
+++ b/block/blk-mq.c
@@ -393,14 +393,16 @@ void __blk_mq_complete_request(struct request *rq)
393 * Ends all I/O on a request. It does not handle partial completions. 393 * Ends all I/O on a request. It does not handle partial completions.
394 * The actual completion happens out-of-order, through a IPI handler. 394 * The actual completion happens out-of-order, through a IPI handler.
395 **/ 395 **/
396void blk_mq_complete_request(struct request *rq) 396void blk_mq_complete_request(struct request *rq, int error)
397{ 397{
398 struct request_queue *q = rq->q; 398 struct request_queue *q = rq->q;
399 399
400 if (unlikely(blk_should_fake_timeout(q))) 400 if (unlikely(blk_should_fake_timeout(q)))
401 return; 401 return;
402 if (!blk_mark_rq_complete(rq)) 402 if (!blk_mark_rq_complete(rq)) {
403 rq->errors = error;
403 __blk_mq_complete_request(rq); 404 __blk_mq_complete_request(rq);
405 }
404} 406}
405EXPORT_SYMBOL(blk_mq_complete_request); 407EXPORT_SYMBOL(blk_mq_complete_request);
406 408
@@ -616,10 +618,8 @@ static void blk_mq_check_expired(struct blk_mq_hw_ctx *hctx,
616 * If a request wasn't started before the queue was 618 * If a request wasn't started before the queue was
617 * marked dying, kill it here or it'll go unnoticed. 619 * marked dying, kill it here or it'll go unnoticed.
618 */ 620 */
619 if (unlikely(blk_queue_dying(rq->q))) { 621 if (unlikely(blk_queue_dying(rq->q)))
620 rq->errors = -EIO; 622 blk_mq_complete_request(rq, -EIO);
621 blk_mq_complete_request(rq);
622 }
623 return; 623 return;
624 } 624 }
625 if (rq->cmd_flags & REQ_NO_TIMEOUT) 625 if (rq->cmd_flags & REQ_NO_TIMEOUT)
@@ -641,24 +641,16 @@ static void blk_mq_rq_timer(unsigned long priv)
641 .next = 0, 641 .next = 0,
642 .next_set = 0, 642 .next_set = 0,
643 }; 643 };
644 struct blk_mq_hw_ctx *hctx;
645 int i; 644 int i;
646 645
647 queue_for_each_hw_ctx(q, hctx, i) { 646 blk_mq_queue_tag_busy_iter(q, blk_mq_check_expired, &data);
648 /*
649 * If not software queues are currently mapped to this
650 * hardware queue, there's nothing to check
651 */
652 if (!blk_mq_hw_queue_mapped(hctx))
653 continue;
654
655 blk_mq_tag_busy_iter(hctx, blk_mq_check_expired, &data);
656 }
657 647
658 if (data.next_set) { 648 if (data.next_set) {
659 data.next = blk_rq_timeout(round_jiffies_up(data.next)); 649 data.next = blk_rq_timeout(round_jiffies_up(data.next));
660 mod_timer(&q->timeout, data.next); 650 mod_timer(&q->timeout, data.next);
661 } else { 651 } else {
652 struct blk_mq_hw_ctx *hctx;
653
662 queue_for_each_hw_ctx(q, hctx, i) { 654 queue_for_each_hw_ctx(q, hctx, i) {
663 /* the hctx may be unmapped, so check it here */ 655 /* the hctx may be unmapped, so check it here */
664 if (blk_mq_hw_queue_mapped(hctx)) 656 if (blk_mq_hw_queue_mapped(hctx))
@@ -1789,13 +1781,19 @@ static void blk_mq_init_cpu_queues(struct request_queue *q,
1789 } 1781 }
1790} 1782}
1791 1783
1792static void blk_mq_map_swqueue(struct request_queue *q) 1784static void blk_mq_map_swqueue(struct request_queue *q,
1785 const struct cpumask *online_mask)
1793{ 1786{
1794 unsigned int i; 1787 unsigned int i;
1795 struct blk_mq_hw_ctx *hctx; 1788 struct blk_mq_hw_ctx *hctx;
1796 struct blk_mq_ctx *ctx; 1789 struct blk_mq_ctx *ctx;
1797 struct blk_mq_tag_set *set = q->tag_set; 1790 struct blk_mq_tag_set *set = q->tag_set;
1798 1791
1792 /*
1793 * Avoid others reading imcomplete hctx->cpumask through sysfs
1794 */
1795 mutex_lock(&q->sysfs_lock);
1796
1799 queue_for_each_hw_ctx(q, hctx, i) { 1797 queue_for_each_hw_ctx(q, hctx, i) {
1800 cpumask_clear(hctx->cpumask); 1798 cpumask_clear(hctx->cpumask);
1801 hctx->nr_ctx = 0; 1799 hctx->nr_ctx = 0;
@@ -1806,16 +1804,17 @@ static void blk_mq_map_swqueue(struct request_queue *q)
1806 */ 1804 */
1807 queue_for_each_ctx(q, ctx, i) { 1805 queue_for_each_ctx(q, ctx, i) {
1808 /* If the cpu isn't online, the cpu is mapped to first hctx */ 1806 /* If the cpu isn't online, the cpu is mapped to first hctx */
1809 if (!cpu_online(i)) 1807 if (!cpumask_test_cpu(i, online_mask))
1810 continue; 1808 continue;
1811 1809
1812 hctx = q->mq_ops->map_queue(q, i); 1810 hctx = q->mq_ops->map_queue(q, i);
1813 cpumask_set_cpu(i, hctx->cpumask); 1811 cpumask_set_cpu(i, hctx->cpumask);
1814 cpumask_set_cpu(i, hctx->tags->cpumask);
1815 ctx->index_hw = hctx->nr_ctx; 1812 ctx->index_hw = hctx->nr_ctx;
1816 hctx->ctxs[hctx->nr_ctx++] = ctx; 1813 hctx->ctxs[hctx->nr_ctx++] = ctx;
1817 } 1814 }
1818 1815
1816 mutex_unlock(&q->sysfs_lock);
1817
1819 queue_for_each_hw_ctx(q, hctx, i) { 1818 queue_for_each_hw_ctx(q, hctx, i) {
1820 struct blk_mq_ctxmap *map = &hctx->ctx_map; 1819 struct blk_mq_ctxmap *map = &hctx->ctx_map;
1821 1820
@@ -1851,6 +1850,14 @@ static void blk_mq_map_swqueue(struct request_queue *q)
1851 hctx->next_cpu = cpumask_first(hctx->cpumask); 1850 hctx->next_cpu = cpumask_first(hctx->cpumask);
1852 hctx->next_cpu_batch = BLK_MQ_CPU_WORK_BATCH; 1851 hctx->next_cpu_batch = BLK_MQ_CPU_WORK_BATCH;
1853 } 1852 }
1853
1854 queue_for_each_ctx(q, ctx, i) {
1855 if (!cpumask_test_cpu(i, online_mask))
1856 continue;
1857
1858 hctx = q->mq_ops->map_queue(q, i);
1859 cpumask_set_cpu(i, hctx->tags->cpumask);
1860 }
1854} 1861}
1855 1862
1856static void blk_mq_update_tag_set_depth(struct blk_mq_tag_set *set) 1863static void blk_mq_update_tag_set_depth(struct blk_mq_tag_set *set)
@@ -1918,6 +1925,9 @@ void blk_mq_release(struct request_queue *q)
1918 kfree(hctx); 1925 kfree(hctx);
1919 } 1926 }
1920 1927
1928 kfree(q->mq_map);
1929 q->mq_map = NULL;
1930
1921 kfree(q->queue_hw_ctx); 1931 kfree(q->queue_hw_ctx);
1922 1932
1923 /* ctx kobj stays in queue_ctx */ 1933 /* ctx kobj stays in queue_ctx */
@@ -2027,13 +2037,15 @@ struct request_queue *blk_mq_init_allocated_queue(struct blk_mq_tag_set *set,
2027 if (blk_mq_init_hw_queues(q, set)) 2037 if (blk_mq_init_hw_queues(q, set))
2028 goto err_hctxs; 2038 goto err_hctxs;
2029 2039
2040 get_online_cpus();
2030 mutex_lock(&all_q_mutex); 2041 mutex_lock(&all_q_mutex);
2031 list_add_tail(&q->all_q_node, &all_q_list);
2032 mutex_unlock(&all_q_mutex);
2033 2042
2043 list_add_tail(&q->all_q_node, &all_q_list);
2034 blk_mq_add_queue_tag_set(set, q); 2044 blk_mq_add_queue_tag_set(set, q);
2045 blk_mq_map_swqueue(q, cpu_online_mask);
2035 2046
2036 blk_mq_map_swqueue(q); 2047 mutex_unlock(&all_q_mutex);
2048 put_online_cpus();
2037 2049
2038 return q; 2050 return q;
2039 2051
@@ -2057,30 +2069,27 @@ void blk_mq_free_queue(struct request_queue *q)
2057{ 2069{
2058 struct blk_mq_tag_set *set = q->tag_set; 2070 struct blk_mq_tag_set *set = q->tag_set;
2059 2071
2072 mutex_lock(&all_q_mutex);
2073 list_del_init(&q->all_q_node);
2074 mutex_unlock(&all_q_mutex);
2075
2060 blk_mq_del_queue_tag_set(q); 2076 blk_mq_del_queue_tag_set(q);
2061 2077
2062 blk_mq_exit_hw_queues(q, set, set->nr_hw_queues); 2078 blk_mq_exit_hw_queues(q, set, set->nr_hw_queues);
2063 blk_mq_free_hw_queues(q, set); 2079 blk_mq_free_hw_queues(q, set);
2064 2080
2065 percpu_ref_exit(&q->mq_usage_counter); 2081 percpu_ref_exit(&q->mq_usage_counter);
2066
2067 kfree(q->mq_map);
2068
2069 q->mq_map = NULL;
2070
2071 mutex_lock(&all_q_mutex);
2072 list_del_init(&q->all_q_node);
2073 mutex_unlock(&all_q_mutex);
2074} 2082}
2075 2083
2076/* Basically redo blk_mq_init_queue with queue frozen */ 2084/* Basically redo blk_mq_init_queue with queue frozen */
2077static void blk_mq_queue_reinit(struct request_queue *q) 2085static void blk_mq_queue_reinit(struct request_queue *q,
2086 const struct cpumask *online_mask)
2078{ 2087{
2079 WARN_ON_ONCE(!atomic_read(&q->mq_freeze_depth)); 2088 WARN_ON_ONCE(!atomic_read(&q->mq_freeze_depth));
2080 2089
2081 blk_mq_sysfs_unregister(q); 2090 blk_mq_sysfs_unregister(q);
2082 2091
2083 blk_mq_update_queue_map(q->mq_map, q->nr_hw_queues); 2092 blk_mq_update_queue_map(q->mq_map, q->nr_hw_queues, online_mask);
2084 2093
2085 /* 2094 /*
2086 * redo blk_mq_init_cpu_queues and blk_mq_init_hw_queues. FIXME: maybe 2095 * redo blk_mq_init_cpu_queues and blk_mq_init_hw_queues. FIXME: maybe
@@ -2088,7 +2097,7 @@ static void blk_mq_queue_reinit(struct request_queue *q)
2088 * involves free and re-allocate memory, worthy doing?) 2097 * involves free and re-allocate memory, worthy doing?)
2089 */ 2098 */
2090 2099
2091 blk_mq_map_swqueue(q); 2100 blk_mq_map_swqueue(q, online_mask);
2092 2101
2093 blk_mq_sysfs_register(q); 2102 blk_mq_sysfs_register(q);
2094} 2103}
@@ -2097,16 +2106,43 @@ static int blk_mq_queue_reinit_notify(struct notifier_block *nb,
2097 unsigned long action, void *hcpu) 2106 unsigned long action, void *hcpu)
2098{ 2107{
2099 struct request_queue *q; 2108 struct request_queue *q;
2109 int cpu = (unsigned long)hcpu;
2110 /*
2111 * New online cpumask which is going to be set in this hotplug event.
2112 * Declare this cpumasks as global as cpu-hotplug operation is invoked
2113 * one-by-one and dynamically allocating this could result in a failure.
2114 */
2115 static struct cpumask online_new;
2100 2116
2101 /* 2117 /*
2102 * Before new mappings are established, hotadded cpu might already 2118 * Before hotadded cpu starts handling requests, new mappings must
2103 * start handling requests. This doesn't break anything as we map 2119 * be established. Otherwise, these requests in hw queue might
2104 * offline CPUs to first hardware queue. We will re-init the queue 2120 * never be dispatched.
2105 * below to get optimal settings. 2121 *
2122 * For example, there is a single hw queue (hctx) and two CPU queues
2123 * (ctx0 for CPU0, and ctx1 for CPU1).
2124 *
2125 * Now CPU1 is just onlined and a request is inserted into
2126 * ctx1->rq_list and set bit0 in pending bitmap as ctx1->index_hw is
2127 * still zero.
2128 *
2129 * And then while running hw queue, flush_busy_ctxs() finds bit0 is
2130 * set in pending bitmap and tries to retrieve requests in
2131 * hctx->ctxs[0]->rq_list. But htx->ctxs[0] is a pointer to ctx0,
2132 * so the request in ctx1->rq_list is ignored.
2106 */ 2133 */
2107 if (action != CPU_DEAD && action != CPU_DEAD_FROZEN && 2134 switch (action & ~CPU_TASKS_FROZEN) {
2108 action != CPU_ONLINE && action != CPU_ONLINE_FROZEN) 2135 case CPU_DEAD:
2136 case CPU_UP_CANCELED:
2137 cpumask_copy(&online_new, cpu_online_mask);
2138 break;
2139 case CPU_UP_PREPARE:
2140 cpumask_copy(&online_new, cpu_online_mask);
2141 cpumask_set_cpu(cpu, &online_new);
2142 break;
2143 default:
2109 return NOTIFY_OK; 2144 return NOTIFY_OK;
2145 }
2110 2146
2111 mutex_lock(&all_q_mutex); 2147 mutex_lock(&all_q_mutex);
2112 2148
@@ -2130,7 +2166,7 @@ static int blk_mq_queue_reinit_notify(struct notifier_block *nb,
2130 } 2166 }
2131 2167
2132 list_for_each_entry(q, &all_q_list, all_q_node) 2168 list_for_each_entry(q, &all_q_list, all_q_node)
2133 blk_mq_queue_reinit(q); 2169 blk_mq_queue_reinit(q, &online_new);
2134 2170
2135 list_for_each_entry(q, &all_q_list, all_q_node) 2171 list_for_each_entry(q, &all_q_list, all_q_node)
2136 blk_mq_unfreeze_queue(q); 2172 blk_mq_unfreeze_queue(q);
diff --git a/block/blk-mq.h b/block/blk-mq.h
index 6a48c4c0d8a2..f4fea7964910 100644
--- a/block/blk-mq.h
+++ b/block/blk-mq.h
@@ -51,7 +51,8 @@ void blk_mq_disable_hotplug(void);
51 * CPU -> queue mappings 51 * CPU -> queue mappings
52 */ 52 */
53extern unsigned int *blk_mq_make_queue_map(struct blk_mq_tag_set *set); 53extern unsigned int *blk_mq_make_queue_map(struct blk_mq_tag_set *set);
54extern int blk_mq_update_queue_map(unsigned int *map, unsigned int nr_queues); 54extern int blk_mq_update_queue_map(unsigned int *map, unsigned int nr_queues,
55 const struct cpumask *online_mask);
55extern int blk_mq_hw_queue_to_node(unsigned int *map, unsigned int); 56extern int blk_mq_hw_queue_to_node(unsigned int *map, unsigned int);
56 57
57/* 58/*
diff --git a/block/bounce.c b/block/bounce.c
index 0611aea1cfe9..1cb5dd3a5da1 100644
--- a/block/bounce.c
+++ b/block/bounce.c
@@ -128,12 +128,14 @@ static void bounce_end_io(struct bio *bio, mempool_t *pool)
128 struct bio *bio_orig = bio->bi_private; 128 struct bio *bio_orig = bio->bi_private;
129 struct bio_vec *bvec, *org_vec; 129 struct bio_vec *bvec, *org_vec;
130 int i; 130 int i;
131 int start = bio_orig->bi_iter.bi_idx;
131 132
132 /* 133 /*
133 * free up bounce indirect pages used 134 * free up bounce indirect pages used
134 */ 135 */
135 bio_for_each_segment_all(bvec, bio, i) { 136 bio_for_each_segment_all(bvec, bio, i) {
136 org_vec = bio_orig->bi_io_vec + i; 137 org_vec = bio_orig->bi_io_vec + i + start;
138
137 if (bvec->bv_page == org_vec->bv_page) 139 if (bvec->bv_page == org_vec->bv_page)
138 continue; 140 continue;
139 141
diff --git a/crypto/asymmetric_keys/x509_public_key.c b/crypto/asymmetric_keys/x509_public_key.c
index 6d88dd15c98d..197096632412 100644
--- a/crypto/asymmetric_keys/x509_public_key.c
+++ b/crypto/asymmetric_keys/x509_public_key.c
@@ -332,10 +332,6 @@ static int x509_key_preparse(struct key_preparsed_payload *prep)
332 srlen = cert->raw_serial_size; 332 srlen = cert->raw_serial_size;
333 q = cert->raw_serial; 333 q = cert->raw_serial;
334 } 334 }
335 if (srlen > 1 && *q == 0) {
336 srlen--;
337 q++;
338 }
339 335
340 ret = -ENOMEM; 336 ret = -ENOMEM;
341 desc = kmalloc(sulen + 2 + srlen * 2 + 1, GFP_KERNEL); 337 desc = kmalloc(sulen + 2 + srlen * 2 + 1, GFP_KERNEL);
diff --git a/crypto/testmgr.c b/crypto/testmgr.c
index 35c2de136971..fa18753f5c34 100644
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -940,6 +940,7 @@ static int __test_skcipher(struct crypto_skcipher *tfm, int enc,
940 char *xbuf[XBUFSIZE]; 940 char *xbuf[XBUFSIZE];
941 char *xoutbuf[XBUFSIZE]; 941 char *xoutbuf[XBUFSIZE];
942 int ret = -ENOMEM; 942 int ret = -ENOMEM;
943 unsigned int ivsize = crypto_skcipher_ivsize(tfm);
943 944
944 if (testmgr_alloc_buf(xbuf)) 945 if (testmgr_alloc_buf(xbuf))
945 goto out_nobuf; 946 goto out_nobuf;
@@ -975,7 +976,7 @@ static int __test_skcipher(struct crypto_skcipher *tfm, int enc,
975 continue; 976 continue;
976 977
977 if (template[i].iv) 978 if (template[i].iv)
978 memcpy(iv, template[i].iv, MAX_IVLEN); 979 memcpy(iv, template[i].iv, ivsize);
979 else 980 else
980 memset(iv, 0, MAX_IVLEN); 981 memset(iv, 0, MAX_IVLEN);
981 982
@@ -1051,7 +1052,7 @@ static int __test_skcipher(struct crypto_skcipher *tfm, int enc,
1051 continue; 1052 continue;
1052 1053
1053 if (template[i].iv) 1054 if (template[i].iv)
1054 memcpy(iv, template[i].iv, MAX_IVLEN); 1055 memcpy(iv, template[i].iv, ivsize);
1055 else 1056 else
1056 memset(iv, 0, MAX_IVLEN); 1057 memset(iv, 0, MAX_IVLEN);
1057 1058
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 46506e7687cd..a212cefae524 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -315,14 +315,10 @@ static void acpi_bus_osc_support(void)
315 315
316 capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE; 316 capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
317 capbuf[OSC_SUPPORT_DWORD] = OSC_SB_PR3_SUPPORT; /* _PR3 is in use */ 317 capbuf[OSC_SUPPORT_DWORD] = OSC_SB_PR3_SUPPORT; /* _PR3 is in use */
318#if defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR) ||\ 318 if (IS_ENABLED(CONFIG_ACPI_PROCESSOR_AGGREGATOR))
319 defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR_MODULE) 319 capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PAD_SUPPORT;
320 capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PAD_SUPPORT; 320 if (IS_ENABLED(CONFIG_ACPI_PROCESSOR))
321#endif 321 capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PPC_OST_SUPPORT;
322
323#if defined(CONFIG_ACPI_PROCESSOR) || defined(CONFIG_ACPI_PROCESSOR_MODULE)
324 capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PPC_OST_SUPPORT;
325#endif
326 322
327 capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_HOTPLUG_OST_SUPPORT; 323 capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_HOTPLUG_OST_SUPPORT;
328 324
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index 2614a839c60d..42c66b64c12c 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -1044,8 +1044,10 @@ static int acpi_ec_query(struct acpi_ec *ec, u8 *data)
1044 goto err_exit; 1044 goto err_exit;
1045 1045
1046 mutex_lock(&ec->mutex); 1046 mutex_lock(&ec->mutex);
1047 result = -ENODATA;
1047 list_for_each_entry(handler, &ec->list, node) { 1048 list_for_each_entry(handler, &ec->list, node) {
1048 if (value == handler->query_bit) { 1049 if (value == handler->query_bit) {
1050 result = 0;
1049 q->handler = acpi_ec_get_query_handler(handler); 1051 q->handler = acpi_ec_get_query_handler(handler);
1050 ec_dbg_evt("Query(0x%02x) scheduled", 1052 ec_dbg_evt("Query(0x%02x) scheduled",
1051 q->handler->query_bit); 1053 q->handler->query_bit);
diff --git a/drivers/acpi/int340x_thermal.c b/drivers/acpi/int340x_thermal.c
index 9dcf83682e36..33505c651f62 100644
--- a/drivers/acpi/int340x_thermal.c
+++ b/drivers/acpi/int340x_thermal.c
@@ -33,13 +33,12 @@ static const struct acpi_device_id int340x_thermal_device_ids[] = {
33static int int340x_thermal_handler_attach(struct acpi_device *adev, 33static int int340x_thermal_handler_attach(struct acpi_device *adev,
34 const struct acpi_device_id *id) 34 const struct acpi_device_id *id)
35{ 35{
36#if defined(CONFIG_INT340X_THERMAL) || defined(CONFIG_INT340X_THERMAL_MODULE) 36 if (IS_ENABLED(CONFIG_INT340X_THERMAL))
37 acpi_create_platform_device(adev); 37 acpi_create_platform_device(adev);
38#elif defined(INTEL_SOC_DTS_THERMAL) || defined(INTEL_SOC_DTS_THERMAL_MODULE)
39 /* Intel SoC DTS thermal driver needs INT3401 to set IRQ descriptor */ 38 /* Intel SoC DTS thermal driver needs INT3401 to set IRQ descriptor */
40 if (id->driver_data == INT3401_DEVICE) 39 else if (IS_ENABLED(CONFIG_INTEL_SOC_DTS_THERMAL) &&
40 id->driver_data == INT3401_DEVICE)
41 acpi_create_platform_device(adev); 41 acpi_create_platform_device(adev);
42#endif
43 return 1; 42 return 1;
44} 43}
45 44
diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
index 6da0f9beab19..c9336751e5e3 100644
--- a/drivers/acpi/pci_irq.c
+++ b/drivers/acpi/pci_irq.c
@@ -372,6 +372,7 @@ static int acpi_isa_register_gsi(struct pci_dev *dev)
372 372
373 /* Interrupt Line values above 0xF are forbidden */ 373 /* Interrupt Line values above 0xF are forbidden */
374 if (dev->irq > 0 && (dev->irq <= 0xF) && 374 if (dev->irq > 0 && (dev->irq <= 0xF) &&
375 acpi_isa_irq_available(dev->irq) &&
375 (acpi_isa_irq_to_gsi(dev->irq, &dev_gsi) == 0)) { 376 (acpi_isa_irq_to_gsi(dev->irq, &dev_gsi) == 0)) {
376 dev_warn(&dev->dev, "PCI INT %c: no GSI - using ISA IRQ %d\n", 377 dev_warn(&dev->dev, "PCI INT %c: no GSI - using ISA IRQ %d\n",
377 pin_name(dev->pin), dev->irq); 378 pin_name(dev->pin), dev->irq);
diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c
index 3b4ea98e3ea0..7c8408b946ca 100644
--- a/drivers/acpi/pci_link.c
+++ b/drivers/acpi/pci_link.c
@@ -498,8 +498,7 @@ int __init acpi_irq_penalty_init(void)
498 PIRQ_PENALTY_PCI_POSSIBLE; 498 PIRQ_PENALTY_PCI_POSSIBLE;
499 } 499 }
500 } 500 }
501 /* Add a penalty for the SCI */ 501
502 acpi_irq_penalty[acpi_gbl_FADT.sci_interrupt] += PIRQ_PENALTY_PCI_USING;
503 return 0; 502 return 0;
504} 503}
505 504
@@ -553,6 +552,13 @@ static int acpi_pci_link_allocate(struct acpi_pci_link *link)
553 irq = link->irq.possible[i]; 552 irq = link->irq.possible[i];
554 } 553 }
555 } 554 }
555 if (acpi_irq_penalty[irq] >= PIRQ_PENALTY_ISA_ALWAYS) {
556 printk(KERN_ERR PREFIX "No IRQ available for %s [%s]. "
557 "Try pci=noacpi or acpi=off\n",
558 acpi_device_name(link->device),
559 acpi_device_bid(link->device));
560 return -ENODEV;
561 }
556 562
557 /* Attempt to enable the link device at this IRQ. */ 563 /* Attempt to enable the link device at this IRQ. */
558 if (acpi_pci_link_set(link, irq)) { 564 if (acpi_pci_link_set(link, irq)) {
@@ -821,6 +827,12 @@ void acpi_penalize_isa_irq(int irq, int active)
821 } 827 }
822} 828}
823 829
830bool acpi_isa_irq_available(int irq)
831{
832 return irq >= 0 && (irq >= ARRAY_SIZE(acpi_irq_penalty) ||
833 acpi_irq_penalty[irq] < PIRQ_PENALTY_ISA_ALWAYS);
834}
835
824/* 836/*
825 * Penalize IRQ used by ACPI SCI. If ACPI SCI pin attributes conflict with 837 * Penalize IRQ used by ACPI SCI. If ACPI SCI pin attributes conflict with
826 * PCI IRQ attributes, mark ACPI SCI as ISA_ALWAYS so it won't be use for 838 * PCI IRQ attributes, mark ACPI SCI as ISA_ALWAYS so it won't be use for
diff --git a/drivers/atm/he.c b/drivers/atm/he.c
index a8da3a50e374..0f5cb37636bc 100644
--- a/drivers/atm/he.c
+++ b/drivers/atm/he.c
@@ -1578,9 +1578,7 @@ he_stop(struct he_dev *he_dev)
1578 1578
1579 kfree(he_dev->rbpl_virt); 1579 kfree(he_dev->rbpl_virt);
1580 kfree(he_dev->rbpl_table); 1580 kfree(he_dev->rbpl_table);
1581 1581 dma_pool_destroy(he_dev->rbpl_pool);
1582 if (he_dev->rbpl_pool)
1583 dma_pool_destroy(he_dev->rbpl_pool);
1584 1582
1585 if (he_dev->rbrq_base) 1583 if (he_dev->rbrq_base)
1586 dma_free_coherent(&he_dev->pci_dev->dev, CONFIG_RBRQ_SIZE * sizeof(struct he_rbrq), 1584 dma_free_coherent(&he_dev->pci_dev->dev, CONFIG_RBRQ_SIZE * sizeof(struct he_rbrq),
@@ -1594,8 +1592,7 @@ he_stop(struct he_dev *he_dev)
1594 dma_free_coherent(&he_dev->pci_dev->dev, CONFIG_TBRQ_SIZE * sizeof(struct he_tbrq), 1592 dma_free_coherent(&he_dev->pci_dev->dev, CONFIG_TBRQ_SIZE * sizeof(struct he_tbrq),
1595 he_dev->tpdrq_base, he_dev->tpdrq_phys); 1593 he_dev->tpdrq_base, he_dev->tpdrq_phys);
1596 1594
1597 if (he_dev->tpd_pool) 1595 dma_pool_destroy(he_dev->tpd_pool);
1598 dma_pool_destroy(he_dev->tpd_pool);
1599 1596
1600 if (he_dev->pci_dev) { 1597 if (he_dev->pci_dev) {
1601 pci_read_config_word(he_dev->pci_dev, PCI_COMMAND, &command); 1598 pci_read_config_word(he_dev->pci_dev, PCI_COMMAND, &command);
diff --git a/drivers/atm/solos-pci.c b/drivers/atm/solos-pci.c
index 74e18b0a6d89..3d7fb6516f74 100644
--- a/drivers/atm/solos-pci.c
+++ b/drivers/atm/solos-pci.c
@@ -805,7 +805,12 @@ static void solos_bh(unsigned long card_arg)
805 continue; 805 continue;
806 } 806 }
807 807
808 skb = alloc_skb(size + 1, GFP_ATOMIC); 808 /* Use netdev_alloc_skb() because it adds NET_SKB_PAD of
809 * headroom, and ensures we can route packets back out an
810 * Ethernet interface (for example) without having to
811 * reallocate. Adding NET_IP_ALIGN also ensures that both
812 * PPPoATM and PPPoEoBR2684 packets end up aligned. */
813 skb = netdev_alloc_skb_ip_align(NULL, size + 1);
809 if (!skb) { 814 if (!skb) {
810 if (net_ratelimit()) 815 if (net_ratelimit())
811 dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n"); 816 dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
@@ -869,7 +874,10 @@ static void solos_bh(unsigned long card_arg)
869 /* Allocate RX skbs for any ports which need them */ 874 /* Allocate RX skbs for any ports which need them */
870 if (card->using_dma && card->atmdev[port] && 875 if (card->using_dma && card->atmdev[port] &&
871 !card->rx_skb[port]) { 876 !card->rx_skb[port]) {
872 struct sk_buff *skb = alloc_skb(RX_DMA_SIZE, GFP_ATOMIC); 877 /* Unlike the MMIO case (qv) we can't add NET_IP_ALIGN
878 * here; the FPGA can only DMA to addresses which are
879 * aligned to 4 bytes. */
880 struct sk_buff *skb = dev_alloc_skb(RX_DMA_SIZE);
873 if (skb) { 881 if (skb) {
874 SKB_CB(skb)->dma_addr = 882 SKB_CB(skb)->dma_addr =
875 dma_map_single(&card->dev->dev, skb->data, 883 dma_map_single(&card->dev->dev, skb->data,
diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 764280a91776..e9fd32e91668 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -148,7 +148,11 @@ static void cache_shared_cpu_map_remove(unsigned int cpu)
148 148
149 if (sibling == cpu) /* skip itself */ 149 if (sibling == cpu) /* skip itself */
150 continue; 150 continue;
151
151 sib_cpu_ci = get_cpu_cacheinfo(sibling); 152 sib_cpu_ci = get_cpu_cacheinfo(sibling);
153 if (!sib_cpu_ci->info_list)
154 continue;
155
152 sib_leaf = sib_cpu_ci->info_list + index; 156 sib_leaf = sib_cpu_ci->info_list + index;
153 cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map); 157 cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
154 cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map); 158 cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
@@ -159,6 +163,9 @@ static void cache_shared_cpu_map_remove(unsigned int cpu)
159 163
160static void free_cache_attributes(unsigned int cpu) 164static void free_cache_attributes(unsigned int cpu)
161{ 165{
166 if (!per_cpu_cacheinfo(cpu))
167 return;
168
162 cache_shared_cpu_map_remove(cpu); 169 cache_shared_cpu_map_remove(cpu);
163 170
164 kfree(per_cpu_cacheinfo(cpu)); 171 kfree(per_cpu_cacheinfo(cpu));
@@ -514,8 +521,7 @@ static int cacheinfo_cpu_callback(struct notifier_block *nfb,
514 break; 521 break;
515 case CPU_DEAD: 522 case CPU_DEAD:
516 cache_remove_dev(cpu); 523 cache_remove_dev(cpu);
517 if (per_cpu_cacheinfo(cpu)) 524 free_cache_attributes(cpu);
518 free_cache_attributes(cpu);
519 break; 525 break;
520 } 526 }
521 return notifier_from_errno(rc); 527 return notifier_from_errno(rc);
diff --git a/drivers/base/platform-msi.c b/drivers/base/platform-msi.c
index 1857a5dd0816..134483daac25 100644
--- a/drivers/base/platform-msi.c
+++ b/drivers/base/platform-msi.c
@@ -63,20 +63,8 @@ static int platform_msi_init(struct irq_domain *domain,
63 unsigned int virq, irq_hw_number_t hwirq, 63 unsigned int virq, irq_hw_number_t hwirq,
64 msi_alloc_info_t *arg) 64 msi_alloc_info_t *arg)
65{ 65{
66 struct irq_data *data; 66 return irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
67 67 info->chip, info->chip_data);
68 irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
69 info->chip, info->chip_data);
70
71 /*
72 * Save the MSI descriptor in handler_data so that the
73 * irq_write_msi_msg callback can retrieve it (and the
74 * associated device).
75 */
76 data = irq_domain_get_irq_data(domain, virq);
77 data->handler_data = arg->desc;
78
79 return 0;
80} 68}
81#else 69#else
82#define platform_msi_set_desc NULL 70#define platform_msi_set_desc NULL
@@ -97,7 +85,7 @@ static void platform_msi_update_dom_ops(struct msi_domain_info *info)
97 85
98static void platform_msi_write_msg(struct irq_data *data, struct msi_msg *msg) 86static void platform_msi_write_msg(struct irq_data *data, struct msi_msg *msg)
99{ 87{
100 struct msi_desc *desc = irq_data_get_irq_handler_data(data); 88 struct msi_desc *desc = irq_data_get_msi_desc(data);
101 struct platform_msi_priv_data *priv_data; 89 struct platform_msi_priv_data *priv_data;
102 90
103 priv_data = desc->platform.msi_priv_data; 91 priv_data = desc->platform.msi_priv_data;
diff --git a/drivers/base/power/opp.c b/drivers/base/power/opp.c
index 28cd75c535b0..7ae7cd990fbf 100644
--- a/drivers/base/power/opp.c
+++ b/drivers/base/power/opp.c
@@ -892,10 +892,17 @@ static int opp_get_microvolt(struct dev_pm_opp *opp, struct device *dev)
892 u32 microvolt[3] = {0}; 892 u32 microvolt[3] = {0};
893 int count, ret; 893 int count, ret;
894 894
895 count = of_property_count_u32_elems(opp->np, "opp-microvolt"); 895 /* Missing property isn't a problem, but an invalid entry is */
896 if (!count) 896 if (!of_find_property(opp->np, "opp-microvolt", NULL))
897 return 0; 897 return 0;
898 898
899 count = of_property_count_u32_elems(opp->np, "opp-microvolt");
900 if (count < 0) {
901 dev_err(dev, "%s: Invalid opp-microvolt property (%d)\n",
902 __func__, count);
903 return count;
904 }
905
899 /* There can be one or three elements here */ 906 /* There can be one or three elements here */
900 if (count != 1 && count != 3) { 907 if (count != 1 && count != 3) {
901 dev_err(dev, "%s: Invalid number of elements in opp-microvolt property (%d)\n", 908 dev_err(dev, "%s: Invalid number of elements in opp-microvolt property (%d)\n",
@@ -1063,7 +1070,7 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_add);
1063 * share a common logic which is isolated here. 1070 * share a common logic which is isolated here.
1064 * 1071 *
1065 * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the 1072 * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
1066 * copy operation, returns 0 if no modifcation was done OR modification was 1073 * copy operation, returns 0 if no modification was done OR modification was
1067 * successful. 1074 * successful.
1068 * 1075 *
1069 * Locking: The internal device_opp and opp structures are RCU protected. 1076 * Locking: The internal device_opp and opp structures are RCU protected.
@@ -1151,7 +1158,7 @@ unlock:
1151 * mutex locking or synchronize_rcu() blocking calls cannot be used. 1158 * mutex locking or synchronize_rcu() blocking calls cannot be used.
1152 * 1159 *
1153 * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the 1160 * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
1154 * copy operation, returns 0 if no modifcation was done OR modification was 1161 * copy operation, returns 0 if no modification was done OR modification was
1155 * successful. 1162 * successful.
1156 */ 1163 */
1157int dev_pm_opp_enable(struct device *dev, unsigned long freq) 1164int dev_pm_opp_enable(struct device *dev, unsigned long freq)
@@ -1177,7 +1184,7 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_enable);
1177 * mutex locking or synchronize_rcu() blocking calls cannot be used. 1184 * mutex locking or synchronize_rcu() blocking calls cannot be used.
1178 * 1185 *
1179 * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the 1186 * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the
1180 * copy operation, returns 0 if no modifcation was done OR modification was 1187 * copy operation, returns 0 if no modification was done OR modification was
1181 * successful. 1188 * successful.
1182 */ 1189 */
1183int dev_pm_opp_disable(struct device *dev, unsigned long freq) 1190int dev_pm_opp_disable(struct device *dev, unsigned long freq)
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index f9889b6bc02c..674f800a3b57 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -1486,17 +1486,16 @@ static void loop_handle_cmd(struct loop_cmd *cmd)
1486{ 1486{
1487 const bool write = cmd->rq->cmd_flags & REQ_WRITE; 1487 const bool write = cmd->rq->cmd_flags & REQ_WRITE;
1488 struct loop_device *lo = cmd->rq->q->queuedata; 1488 struct loop_device *lo = cmd->rq->q->queuedata;
1489 int ret = -EIO; 1489 int ret = 0;
1490 1490
1491 if (write && (lo->lo_flags & LO_FLAGS_READ_ONLY)) 1491 if (write && (lo->lo_flags & LO_FLAGS_READ_ONLY)) {
1492 ret = -EIO;
1492 goto failed; 1493 goto failed;
1494 }
1493 1495
1494 ret = do_req_filebacked(lo, cmd->rq); 1496 ret = do_req_filebacked(lo, cmd->rq);
1495
1496 failed: 1497 failed:
1497 if (ret) 1498 blk_mq_complete_request(cmd->rq, ret ? -EIO : 0);
1498 cmd->rq->errors = -EIO;
1499 blk_mq_complete_request(cmd->rq);
1500} 1499}
1501 1500
1502static void loop_queue_write_work(struct work_struct *work) 1501static void loop_queue_write_work(struct work_struct *work)
diff --git a/drivers/block/null_blk.c b/drivers/block/null_blk.c
index 17269a3b85f2..1c9e4fe5aa44 100644
--- a/drivers/block/null_blk.c
+++ b/drivers/block/null_blk.c
@@ -289,7 +289,7 @@ static inline void null_handle_cmd(struct nullb_cmd *cmd)
289 case NULL_IRQ_SOFTIRQ: 289 case NULL_IRQ_SOFTIRQ:
290 switch (queue_mode) { 290 switch (queue_mode) {
291 case NULL_Q_MQ: 291 case NULL_Q_MQ:
292 blk_mq_complete_request(cmd->rq); 292 blk_mq_complete_request(cmd->rq, cmd->rq->errors);
293 break; 293 break;
294 case NULL_Q_RQ: 294 case NULL_Q_RQ:
295 blk_complete_request(cmd->rq); 295 blk_complete_request(cmd->rq);
@@ -406,6 +406,22 @@ static struct blk_mq_ops null_mq_ops = {
406 .complete = null_softirq_done_fn, 406 .complete = null_softirq_done_fn,
407}; 407};
408 408
409static void cleanup_queue(struct nullb_queue *nq)
410{
411 kfree(nq->tag_map);
412 kfree(nq->cmds);
413}
414
415static void cleanup_queues(struct nullb *nullb)
416{
417 int i;
418
419 for (i = 0; i < nullb->nr_queues; i++)
420 cleanup_queue(&nullb->queues[i]);
421
422 kfree(nullb->queues);
423}
424
409static void null_del_dev(struct nullb *nullb) 425static void null_del_dev(struct nullb *nullb)
410{ 426{
411 list_del_init(&nullb->list); 427 list_del_init(&nullb->list);
@@ -415,6 +431,7 @@ static void null_del_dev(struct nullb *nullb)
415 if (queue_mode == NULL_Q_MQ) 431 if (queue_mode == NULL_Q_MQ)
416 blk_mq_free_tag_set(&nullb->tag_set); 432 blk_mq_free_tag_set(&nullb->tag_set);
417 put_disk(nullb->disk); 433 put_disk(nullb->disk);
434 cleanup_queues(nullb);
418 kfree(nullb); 435 kfree(nullb);
419} 436}
420 437
@@ -459,22 +476,6 @@ static int setup_commands(struct nullb_queue *nq)
459 return 0; 476 return 0;
460} 477}
461 478
462static void cleanup_queue(struct nullb_queue *nq)
463{
464 kfree(nq->tag_map);
465 kfree(nq->cmds);
466}
467
468static void cleanup_queues(struct nullb *nullb)
469{
470 int i;
471
472 for (i = 0; i < nullb->nr_queues; i++)
473 cleanup_queue(&nullb->queues[i]);
474
475 kfree(nullb->queues);
476}
477
478static int setup_queues(struct nullb *nullb) 479static int setup_queues(struct nullb *nullb)
479{ 480{
480 nullb->queues = kzalloc(submit_queues * sizeof(struct nullb_queue), 481 nullb->queues = kzalloc(submit_queues * sizeof(struct nullb_queue),
@@ -588,8 +589,7 @@ static int null_add_dev(void)
588 blk_queue_physical_block_size(nullb->q, bs); 589 blk_queue_physical_block_size(nullb->q, bs);
589 590
590 size = gb * 1024 * 1024 * 1024ULL; 591 size = gb * 1024 * 1024 * 1024ULL;
591 sector_div(size, bs); 592 set_capacity(disk, size >> 9);
592 set_capacity(disk, size);
593 593
594 disk->flags |= GENHD_FL_EXT_DEVT | GENHD_FL_SUPPRESS_PARTITION_INFO; 594 disk->flags |= GENHD_FL_EXT_DEVT | GENHD_FL_SUPPRESS_PARTITION_INFO;
595 disk->major = null_major; 595 disk->major = null_major;
diff --git a/drivers/block/nvme-core.c b/drivers/block/nvme-core.c
index b97fc3fe0916..6f04771f1019 100644
--- a/drivers/block/nvme-core.c
+++ b/drivers/block/nvme-core.c
@@ -618,16 +618,15 @@ static void req_completion(struct nvme_queue *nvmeq, void *ctx,
618 spin_unlock_irqrestore(req->q->queue_lock, flags); 618 spin_unlock_irqrestore(req->q->queue_lock, flags);
619 return; 619 return;
620 } 620 }
621
621 if (req->cmd_type == REQ_TYPE_DRV_PRIV) { 622 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
622 if (cmd_rq->ctx == CMD_CTX_CANCELLED) 623 if (cmd_rq->ctx == CMD_CTX_CANCELLED)
623 req->errors = -EINTR; 624 status = -EINTR;
624 else
625 req->errors = status;
626 } else { 625 } else {
627 req->errors = nvme_error_status(status); 626 status = nvme_error_status(status);
628 } 627 }
629 } else 628 }
630 req->errors = 0; 629
631 if (req->cmd_type == REQ_TYPE_DRV_PRIV) { 630 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
632 u32 result = le32_to_cpup(&cqe->result); 631 u32 result = le32_to_cpup(&cqe->result);
633 req->special = (void *)(uintptr_t)result; 632 req->special = (void *)(uintptr_t)result;
@@ -650,7 +649,7 @@ static void req_completion(struct nvme_queue *nvmeq, void *ctx,
650 } 649 }
651 nvme_free_iod(nvmeq->dev, iod); 650 nvme_free_iod(nvmeq->dev, iod);
652 651
653 blk_mq_complete_request(req); 652 blk_mq_complete_request(req, status);
654} 653}
655 654
656/* length is in bytes. gfp flags indicates whether we may sleep. */ 655/* length is in bytes. gfp flags indicates whether we may sleep. */
@@ -863,8 +862,7 @@ static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
863 if (ns && ns->ms && !blk_integrity_rq(req)) { 862 if (ns && ns->ms && !blk_integrity_rq(req)) {
864 if (!(ns->pi_type && ns->ms == 8) && 863 if (!(ns->pi_type && ns->ms == 8) &&
865 req->cmd_type != REQ_TYPE_DRV_PRIV) { 864 req->cmd_type != REQ_TYPE_DRV_PRIV) {
866 req->errors = -EFAULT; 865 blk_mq_complete_request(req, -EFAULT);
867 blk_mq_complete_request(req);
868 return BLK_MQ_RQ_QUEUE_OK; 866 return BLK_MQ_RQ_QUEUE_OK;
869 } 867 }
870 } 868 }
@@ -2439,6 +2437,22 @@ static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2439 list_sort(NULL, &dev->namespaces, ns_cmp); 2437 list_sort(NULL, &dev->namespaces, ns_cmp);
2440} 2438}
2441 2439
2440static void nvme_set_irq_hints(struct nvme_dev *dev)
2441{
2442 struct nvme_queue *nvmeq;
2443 int i;
2444
2445 for (i = 0; i < dev->online_queues; i++) {
2446 nvmeq = dev->queues[i];
2447
2448 if (!nvmeq->tags || !(*nvmeq->tags))
2449 continue;
2450
2451 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2452 blk_mq_tags_cpumask(*nvmeq->tags));
2453 }
2454}
2455
2442static void nvme_dev_scan(struct work_struct *work) 2456static void nvme_dev_scan(struct work_struct *work)
2443{ 2457{
2444 struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work); 2458 struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
@@ -2450,6 +2464,7 @@ static void nvme_dev_scan(struct work_struct *work)
2450 return; 2464 return;
2451 nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn)); 2465 nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2452 kfree(ctrl); 2466 kfree(ctrl);
2467 nvme_set_irq_hints(dev);
2453} 2468}
2454 2469
2455/* 2470/*
@@ -2953,22 +2968,6 @@ static const struct file_operations nvme_dev_fops = {
2953 .compat_ioctl = nvme_dev_ioctl, 2968 .compat_ioctl = nvme_dev_ioctl,
2954}; 2969};
2955 2970
2956static void nvme_set_irq_hints(struct nvme_dev *dev)
2957{
2958 struct nvme_queue *nvmeq;
2959 int i;
2960
2961 for (i = 0; i < dev->online_queues; i++) {
2962 nvmeq = dev->queues[i];
2963
2964 if (!nvmeq->tags || !(*nvmeq->tags))
2965 continue;
2966
2967 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2968 blk_mq_tags_cpumask(*nvmeq->tags));
2969 }
2970}
2971
2972static int nvme_dev_start(struct nvme_dev *dev) 2971static int nvme_dev_start(struct nvme_dev *dev)
2973{ 2972{
2974 int result; 2973 int result;
@@ -3010,8 +3009,6 @@ static int nvme_dev_start(struct nvme_dev *dev)
3010 if (result) 3009 if (result)
3011 goto free_tags; 3010 goto free_tags;
3012 3011
3013 nvme_set_irq_hints(dev);
3014
3015 dev->event_limit = 1; 3012 dev->event_limit = 1;
3016 return result; 3013 return result;
3017 3014
@@ -3062,7 +3059,6 @@ static int nvme_dev_resume(struct nvme_dev *dev)
3062 } else { 3059 } else {
3063 nvme_unfreeze_queues(dev); 3060 nvme_unfreeze_queues(dev);
3064 nvme_dev_add(dev); 3061 nvme_dev_add(dev);
3065 nvme_set_irq_hints(dev);
3066 } 3062 }
3067 return 0; 3063 return 0;
3068} 3064}
diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c
index e93899cc6f60..6ca35495a5be 100644
--- a/drivers/block/virtio_blk.c
+++ b/drivers/block/virtio_blk.c
@@ -144,7 +144,7 @@ static void virtblk_done(struct virtqueue *vq)
144 do { 144 do {
145 virtqueue_disable_cb(vq); 145 virtqueue_disable_cb(vq);
146 while ((vbr = virtqueue_get_buf(vblk->vqs[qid].vq, &len)) != NULL) { 146 while ((vbr = virtqueue_get_buf(vblk->vqs[qid].vq, &len)) != NULL) {
147 blk_mq_complete_request(vbr->req); 147 blk_mq_complete_request(vbr->req, vbr->req->errors);
148 req_done = true; 148 req_done = true;
149 } 149 }
150 if (unlikely(virtqueue_is_broken(vq))) 150 if (unlikely(virtqueue_is_broken(vq)))
diff --git a/drivers/block/xen-blkback/xenbus.c b/drivers/block/xen-blkback/xenbus.c
index deb3f001791f..767657565de6 100644
--- a/drivers/block/xen-blkback/xenbus.c
+++ b/drivers/block/xen-blkback/xenbus.c
@@ -212,6 +212,9 @@ static int xen_blkif_map(struct xen_blkif *blkif, grant_ref_t *gref,
212 212
213static int xen_blkif_disconnect(struct xen_blkif *blkif) 213static int xen_blkif_disconnect(struct xen_blkif *blkif)
214{ 214{
215 struct pending_req *req, *n;
216 int i = 0, j;
217
215 if (blkif->xenblkd) { 218 if (blkif->xenblkd) {
216 kthread_stop(blkif->xenblkd); 219 kthread_stop(blkif->xenblkd);
217 wake_up(&blkif->shutdown_wq); 220 wake_up(&blkif->shutdown_wq);
@@ -238,13 +241,28 @@ static int xen_blkif_disconnect(struct xen_blkif *blkif)
238 /* Remove all persistent grants and the cache of ballooned pages. */ 241 /* Remove all persistent grants and the cache of ballooned pages. */
239 xen_blkbk_free_caches(blkif); 242 xen_blkbk_free_caches(blkif);
240 243
244 /* Check that there is no request in use */
245 list_for_each_entry_safe(req, n, &blkif->pending_free, free_list) {
246 list_del(&req->free_list);
247
248 for (j = 0; j < MAX_INDIRECT_SEGMENTS; j++)
249 kfree(req->segments[j]);
250
251 for (j = 0; j < MAX_INDIRECT_PAGES; j++)
252 kfree(req->indirect_pages[j]);
253
254 kfree(req);
255 i++;
256 }
257
258 WARN_ON(i != (XEN_BLKIF_REQS_PER_PAGE * blkif->nr_ring_pages));
259 blkif->nr_ring_pages = 0;
260
241 return 0; 261 return 0;
242} 262}
243 263
244static void xen_blkif_free(struct xen_blkif *blkif) 264static void xen_blkif_free(struct xen_blkif *blkif)
245{ 265{
246 struct pending_req *req, *n;
247 int i = 0, j;
248 266
249 xen_blkif_disconnect(blkif); 267 xen_blkif_disconnect(blkif);
250 xen_vbd_free(&blkif->vbd); 268 xen_vbd_free(&blkif->vbd);
@@ -257,22 +275,6 @@ static void xen_blkif_free(struct xen_blkif *blkif)
257 BUG_ON(!list_empty(&blkif->free_pages)); 275 BUG_ON(!list_empty(&blkif->free_pages));
258 BUG_ON(!RB_EMPTY_ROOT(&blkif->persistent_gnts)); 276 BUG_ON(!RB_EMPTY_ROOT(&blkif->persistent_gnts));
259 277
260 /* Check that there is no request in use */
261 list_for_each_entry_safe(req, n, &blkif->pending_free, free_list) {
262 list_del(&req->free_list);
263
264 for (j = 0; j < MAX_INDIRECT_SEGMENTS; j++)
265 kfree(req->segments[j]);
266
267 for (j = 0; j < MAX_INDIRECT_PAGES; j++)
268 kfree(req->indirect_pages[j]);
269
270 kfree(req);
271 i++;
272 }
273
274 WARN_ON(i != (XEN_BLKIF_REQS_PER_PAGE * blkif->nr_ring_pages));
275
276 kmem_cache_free(xen_blkif_cachep, blkif); 278 kmem_cache_free(xen_blkif_cachep, blkif);
277} 279}
278 280
diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c
index 0823a96902f8..611170896b8c 100644
--- a/drivers/block/xen-blkfront.c
+++ b/drivers/block/xen-blkfront.c
@@ -1142,6 +1142,7 @@ static irqreturn_t blkif_interrupt(int irq, void *dev_id)
1142 RING_IDX i, rp; 1142 RING_IDX i, rp;
1143 unsigned long flags; 1143 unsigned long flags;
1144 struct blkfront_info *info = (struct blkfront_info *)dev_id; 1144 struct blkfront_info *info = (struct blkfront_info *)dev_id;
1145 int error;
1145 1146
1146 spin_lock_irqsave(&info->io_lock, flags); 1147 spin_lock_irqsave(&info->io_lock, flags);
1147 1148
@@ -1182,37 +1183,37 @@ static irqreturn_t blkif_interrupt(int irq, void *dev_id)
1182 continue; 1183 continue;
1183 } 1184 }
1184 1185
1185 req->errors = (bret->status == BLKIF_RSP_OKAY) ? 0 : -EIO; 1186 error = (bret->status == BLKIF_RSP_OKAY) ? 0 : -EIO;
1186 switch (bret->operation) { 1187 switch (bret->operation) {
1187 case BLKIF_OP_DISCARD: 1188 case BLKIF_OP_DISCARD:
1188 if (unlikely(bret->status == BLKIF_RSP_EOPNOTSUPP)) { 1189 if (unlikely(bret->status == BLKIF_RSP_EOPNOTSUPP)) {
1189 struct request_queue *rq = info->rq; 1190 struct request_queue *rq = info->rq;
1190 printk(KERN_WARNING "blkfront: %s: %s op failed\n", 1191 printk(KERN_WARNING "blkfront: %s: %s op failed\n",
1191 info->gd->disk_name, op_name(bret->operation)); 1192 info->gd->disk_name, op_name(bret->operation));
1192 req->errors = -EOPNOTSUPP; 1193 error = -EOPNOTSUPP;
1193 info->feature_discard = 0; 1194 info->feature_discard = 0;
1194 info->feature_secdiscard = 0; 1195 info->feature_secdiscard = 0;
1195 queue_flag_clear(QUEUE_FLAG_DISCARD, rq); 1196 queue_flag_clear(QUEUE_FLAG_DISCARD, rq);
1196 queue_flag_clear(QUEUE_FLAG_SECDISCARD, rq); 1197 queue_flag_clear(QUEUE_FLAG_SECDISCARD, rq);
1197 } 1198 }
1198 blk_mq_complete_request(req); 1199 blk_mq_complete_request(req, error);
1199 break; 1200 break;
1200 case BLKIF_OP_FLUSH_DISKCACHE: 1201 case BLKIF_OP_FLUSH_DISKCACHE:
1201 case BLKIF_OP_WRITE_BARRIER: 1202 case BLKIF_OP_WRITE_BARRIER:
1202 if (unlikely(bret->status == BLKIF_RSP_EOPNOTSUPP)) { 1203 if (unlikely(bret->status == BLKIF_RSP_EOPNOTSUPP)) {
1203 printk(KERN_WARNING "blkfront: %s: %s op failed\n", 1204 printk(KERN_WARNING "blkfront: %s: %s op failed\n",
1204 info->gd->disk_name, op_name(bret->operation)); 1205 info->gd->disk_name, op_name(bret->operation));
1205 req->errors = -EOPNOTSUPP; 1206 error = -EOPNOTSUPP;
1206 } 1207 }
1207 if (unlikely(bret->status == BLKIF_RSP_ERROR && 1208 if (unlikely(bret->status == BLKIF_RSP_ERROR &&
1208 info->shadow[id].req.u.rw.nr_segments == 0)) { 1209 info->shadow[id].req.u.rw.nr_segments == 0)) {
1209 printk(KERN_WARNING "blkfront: %s: empty %s op failed\n", 1210 printk(KERN_WARNING "blkfront: %s: empty %s op failed\n",
1210 info->gd->disk_name, op_name(bret->operation)); 1211 info->gd->disk_name, op_name(bret->operation));
1211 req->errors = -EOPNOTSUPP; 1212 error = -EOPNOTSUPP;
1212 } 1213 }
1213 if (unlikely(req->errors)) { 1214 if (unlikely(error)) {
1214 if (req->errors == -EOPNOTSUPP) 1215 if (error == -EOPNOTSUPP)
1215 req->errors = 0; 1216 error = 0;
1216 info->feature_flush = 0; 1217 info->feature_flush = 0;
1217 xlvbd_flush(info); 1218 xlvbd_flush(info);
1218 } 1219 }
@@ -1223,7 +1224,7 @@ static irqreturn_t blkif_interrupt(int irq, void *dev_id)
1223 dev_dbg(&info->xbdev->dev, "Bad return from blkdev data " 1224 dev_dbg(&info->xbdev->dev, "Bad return from blkdev data "
1224 "request: %x\n", bret->status); 1225 "request: %x\n", bret->status);
1225 1226
1226 blk_mq_complete_request(req); 1227 blk_mq_complete_request(req, error);
1227 break; 1228 break;
1228 default: 1229 default:
1229 BUG(); 1230 BUG();
diff --git a/drivers/block/zram/zcomp.c b/drivers/block/zram/zcomp.c
index 965d1afb0eaa..5cb13ca3a3ac 100644
--- a/drivers/block/zram/zcomp.c
+++ b/drivers/block/zram/zcomp.c
@@ -330,12 +330,14 @@ void zcomp_destroy(struct zcomp *comp)
330 * allocate new zcomp and initialize it. return compressing 330 * allocate new zcomp and initialize it. return compressing
331 * backend pointer or ERR_PTR if things went bad. ERR_PTR(-EINVAL) 331 * backend pointer or ERR_PTR if things went bad. ERR_PTR(-EINVAL)
332 * if requested algorithm is not supported, ERR_PTR(-ENOMEM) in 332 * if requested algorithm is not supported, ERR_PTR(-ENOMEM) in
333 * case of allocation error. 333 * case of allocation error, or any other error potentially
334 * returned by functions zcomp_strm_{multi,single}_create.
334 */ 335 */
335struct zcomp *zcomp_create(const char *compress, int max_strm) 336struct zcomp *zcomp_create(const char *compress, int max_strm)
336{ 337{
337 struct zcomp *comp; 338 struct zcomp *comp;
338 struct zcomp_backend *backend; 339 struct zcomp_backend *backend;
340 int error;
339 341
340 backend = find_backend(compress); 342 backend = find_backend(compress);
341 if (!backend) 343 if (!backend)
@@ -347,12 +349,12 @@ struct zcomp *zcomp_create(const char *compress, int max_strm)
347 349
348 comp->backend = backend; 350 comp->backend = backend;
349 if (max_strm > 1) 351 if (max_strm > 1)
350 zcomp_strm_multi_create(comp, max_strm); 352 error = zcomp_strm_multi_create(comp, max_strm);
351 else 353 else
352 zcomp_strm_single_create(comp); 354 error = zcomp_strm_single_create(comp);
353 if (!comp->stream) { 355 if (error) {
354 kfree(comp); 356 kfree(comp);
355 return ERR_PTR(-ENOMEM); 357 return ERR_PTR(error);
356 } 358 }
357 return comp; 359 return comp;
358} 360}
diff --git a/drivers/char/hw_random/xgene-rng.c b/drivers/char/hw_random/xgene-rng.c
index c37cf754a985..3c77645405e5 100644
--- a/drivers/char/hw_random/xgene-rng.c
+++ b/drivers/char/hw_random/xgene-rng.c
@@ -344,11 +344,12 @@ static int xgene_rng_probe(struct platform_device *pdev)
344 if (IS_ERR(ctx->csr_base)) 344 if (IS_ERR(ctx->csr_base))
345 return PTR_ERR(ctx->csr_base); 345 return PTR_ERR(ctx->csr_base);
346 346
347 ctx->irq = platform_get_irq(pdev, 0); 347 rc = platform_get_irq(pdev, 0);
348 if (ctx->irq < 0) { 348 if (rc < 0) {
349 dev_err(&pdev->dev, "No IRQ resource\n"); 349 dev_err(&pdev->dev, "No IRQ resource\n");
350 return ctx->irq; 350 return rc;
351 } 351 }
352 ctx->irq = rc;
352 353
353 dev_dbg(&pdev->dev, "APM X-Gene RNG BASE %p ALARM IRQ %d", 354 dev_dbg(&pdev->dev, "APM X-Gene RNG BASE %p ALARM IRQ %d",
354 ctx->csr_base, ctx->irq); 355 ctx->csr_base, ctx->irq);
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 43e2c3ad6c31..0ebcf449778a 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -2437,7 +2437,8 @@ static int __clk_init(struct device *dev, struct clk *clk_user)
2437 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { 2437 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
2438 if (orphan->num_parents && orphan->ops->get_parent) { 2438 if (orphan->num_parents && orphan->ops->get_parent) {
2439 i = orphan->ops->get_parent(orphan->hw); 2439 i = orphan->ops->get_parent(orphan->hw);
2440 if (!strcmp(core->name, orphan->parent_names[i])) 2440 if (i >= 0 && i < orphan->num_parents &&
2441 !strcmp(core->name, orphan->parent_names[i]))
2441 clk_core_reparent(orphan, core); 2442 clk_core_reparent(orphan, core);
2442 continue; 2443 continue;
2443 } 2444 }
diff --git a/drivers/clk/h8300/clk-h8s2678.c b/drivers/clk/h8300/clk-h8s2678.c
index 2a38eb4a2552..6cf38dc1c929 100644
--- a/drivers/clk/h8300/clk-h8s2678.c
+++ b/drivers/clk/h8300/clk-h8s2678.c
@@ -8,6 +8,7 @@
8#include <linux/err.h> 8#include <linux/err.h>
9#include <linux/device.h> 9#include <linux/device.h>
10#include <linux/of_address.h> 10#include <linux/of_address.h>
11#include <linux/slab.h>
11 12
12static DEFINE_SPINLOCK(clklock); 13static DEFINE_SPINLOCK(clklock);
13 14
diff --git a/drivers/clk/hisilicon/Kconfig b/drivers/clk/hisilicon/Kconfig
index 2c16807341dc..e43485448612 100644
--- a/drivers/clk/hisilicon/Kconfig
+++ b/drivers/clk/hisilicon/Kconfig
@@ -1,6 +1,12 @@
1config COMMON_CLK_HI6220 1config COMMON_CLK_HI6220
2 bool "Hi6220 Clock Driver" 2 bool "Hi6220 Clock Driver"
3 depends on (ARCH_HISI || COMPILE_TEST) && MAILBOX 3 depends on ARCH_HISI || COMPILE_TEST
4 default ARCH_HISI 4 default ARCH_HISI
5 help 5 help
6 Build the Hisilicon Hi6220 clock driver based on the common clock framework. 6 Build the Hisilicon Hi6220 clock driver based on the common clock framework.
7
8config STUB_CLK_HI6220
9 bool "Hi6220 Stub Clock Driver"
10 depends on COMMON_CLK_HI6220 && MAILBOX
11 help
12 Build the Hisilicon Hi6220 stub clock driver.
diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
index 4a1001a11f04..74dba31590f9 100644
--- a/drivers/clk/hisilicon/Makefile
+++ b/drivers/clk/hisilicon/Makefile
@@ -7,4 +7,5 @@ obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o
7obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o 7obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o
8obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o 8obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o
9obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o 9obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o
10obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o clk-hi6220-stub.o 10obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o
11obj-$(CONFIG_STUB_CLK_HI6220) += clk-hi6220-stub.o
diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
index ec1a4c1dacf1..c4c141cab444 100644
--- a/drivers/clk/imx/clk-imx25.c
+++ b/drivers/clk/imx/clk-imx25.c
@@ -86,6 +86,16 @@ enum mx25_clks {
86 86
87static struct clk *clk[clk_max]; 87static struct clk *clk[clk_max];
88 88
89static struct clk ** const uart_clks[] __initconst = {
90 &clk[uart_ipg_per],
91 &clk[uart1_ipg],
92 &clk[uart2_ipg],
93 &clk[uart3_ipg],
94 &clk[uart4_ipg],
95 &clk[uart5_ipg],
96 NULL
97};
98
89static int __init __mx25_clocks_init(unsigned long osc_rate, 99static int __init __mx25_clocks_init(unsigned long osc_rate,
90 void __iomem *ccm_base) 100 void __iomem *ccm_base)
91{ 101{
@@ -233,6 +243,8 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
233 */ 243 */
234 clk_set_parent(clk[cko_sel], clk[ipg]); 244 clk_set_parent(clk[cko_sel], clk[ipg]);
235 245
246 imx_register_uart_clocks(uart_clks);
247
236 return 0; 248 return 0;
237} 249}
238 250
diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c
index d9d50d54ef2a..0d7b8df04dfa 100644
--- a/drivers/clk/imx/clk-imx27.c
+++ b/drivers/clk/imx/clk-imx27.c
@@ -47,6 +47,17 @@ static const char *ssi_sel_clks[] = { "spll_gate", "mpll", };
47static struct clk *clk[IMX27_CLK_MAX]; 47static struct clk *clk[IMX27_CLK_MAX];
48static struct clk_onecell_data clk_data; 48static struct clk_onecell_data clk_data;
49 49
50static struct clk ** const uart_clks[] __initconst = {
51 &clk[IMX27_CLK_PER1_GATE],
52 &clk[IMX27_CLK_UART1_IPG_GATE],
53 &clk[IMX27_CLK_UART2_IPG_GATE],
54 &clk[IMX27_CLK_UART3_IPG_GATE],
55 &clk[IMX27_CLK_UART4_IPG_GATE],
56 &clk[IMX27_CLK_UART5_IPG_GATE],
57 &clk[IMX27_CLK_UART6_IPG_GATE],
58 NULL
59};
60
50static void __init _mx27_clocks_init(unsigned long fref) 61static void __init _mx27_clocks_init(unsigned long fref)
51{ 62{
52 BUG_ON(!ccm); 63 BUG_ON(!ccm);
@@ -163,6 +174,8 @@ static void __init _mx27_clocks_init(unsigned long fref)
163 174
164 clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]); 175 clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
165 176
177 imx_register_uart_clocks(uart_clks);
178
166 imx_print_silicon_rev("i.MX27", mx27_revision()); 179 imx_print_silicon_rev("i.MX27", mx27_revision());
167} 180}
168 181
diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c
index 1f8383475bb3..f65b8b1a974a 100644
--- a/drivers/clk/imx/clk-imx31.c
+++ b/drivers/clk/imx/clk-imx31.c
@@ -62,7 +62,17 @@ enum mx31_clks {
62static struct clk *clk[clk_max]; 62static struct clk *clk[clk_max];
63static struct clk_onecell_data clk_data; 63static struct clk_onecell_data clk_data;
64 64
65int __init mx31_clocks_init(unsigned long fref) 65static struct clk ** const uart_clks[] __initconst = {
66 &clk[ipg],
67 &clk[uart1_gate],
68 &clk[uart2_gate],
69 &clk[uart3_gate],
70 &clk[uart4_gate],
71 &clk[uart5_gate],
72 NULL
73};
74
75static void __init _mx31_clocks_init(unsigned long fref)
66{ 76{
67 void __iomem *base; 77 void __iomem *base;
68 struct device_node *np; 78 struct device_node *np;
@@ -132,6 +142,12 @@ int __init mx31_clocks_init(unsigned long fref)
132 142
133 imx_check_clocks(clk, ARRAY_SIZE(clk)); 143 imx_check_clocks(clk, ARRAY_SIZE(clk));
134 144
145 clk_set_parent(clk[csi], clk[upll]);
146 clk_prepare_enable(clk[emi_gate]);
147 clk_prepare_enable(clk[iim_gate]);
148 mx31_revision();
149 clk_disable_unprepare(clk[iim_gate]);
150
135 np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm"); 151 np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm");
136 152
137 if (np) { 153 if (np) {
@@ -139,6 +155,13 @@ int __init mx31_clocks_init(unsigned long fref)
139 clk_data.clk_num = ARRAY_SIZE(clk); 155 clk_data.clk_num = ARRAY_SIZE(clk);
140 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); 156 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
141 } 157 }
158}
159
160int __init mx31_clocks_init(void)
161{
162 u32 fref = 26000000; /* default */
163
164 _mx31_clocks_init(fref);
142 165
143 clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); 166 clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");
144 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); 167 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
@@ -194,12 +217,8 @@ int __init mx31_clocks_init(unsigned long fref)
194 clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma"); 217 clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma");
195 clk_register_clkdev(clk[iim_gate], "iim", NULL); 218 clk_register_clkdev(clk[iim_gate], "iim", NULL);
196 219
197 clk_set_parent(clk[csi], clk[upll]);
198 clk_prepare_enable(clk[emi_gate]);
199 clk_prepare_enable(clk[iim_gate]);
200 mx31_revision();
201 clk_disable_unprepare(clk[iim_gate]);
202 220
221 imx_register_uart_clocks(uart_clks);
203 mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT, GPT_TYPE_IMX31); 222 mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT, GPT_TYPE_IMX31);
204 223
205 return 0; 224 return 0;
@@ -218,5 +237,7 @@ int __init mx31_clocks_init_dt(void)
218 break; 237 break;
219 } 238 }
220 239
221 return mx31_clocks_init(fref); 240 _mx31_clocks_init(fref);
241
242 return 0;
222} 243}
diff --git a/drivers/clk/imx/clk-imx35.c b/drivers/clk/imx/clk-imx35.c
index 8623cd4e49fd..a71d24cb4c06 100644
--- a/drivers/clk/imx/clk-imx35.c
+++ b/drivers/clk/imx/clk-imx35.c
@@ -84,7 +84,15 @@ enum mx35_clks {
84 84
85static struct clk *clk[clk_max]; 85static struct clk *clk[clk_max];
86 86
87int __init mx35_clocks_init(void) 87static struct clk ** const uart_clks[] __initconst = {
88 &clk[ipg],
89 &clk[uart1_gate],
90 &clk[uart2_gate],
91 &clk[uart3_gate],
92 NULL
93};
94
95static void __init _mx35_clocks_init(void)
88{ 96{
89 void __iomem *base; 97 void __iomem *base;
90 u32 pdr0, consumer_sel, hsp_sel; 98 u32 pdr0, consumer_sel, hsp_sel;
@@ -220,6 +228,32 @@ int __init mx35_clocks_init(void)
220 228
221 imx_check_clocks(clk, ARRAY_SIZE(clk)); 229 imx_check_clocks(clk, ARRAY_SIZE(clk));
222 230
231 clk_prepare_enable(clk[spba_gate]);
232 clk_prepare_enable(clk[gpio1_gate]);
233 clk_prepare_enable(clk[gpio2_gate]);
234 clk_prepare_enable(clk[gpio3_gate]);
235 clk_prepare_enable(clk[iim_gate]);
236 clk_prepare_enable(clk[emi_gate]);
237 clk_prepare_enable(clk[max_gate]);
238 clk_prepare_enable(clk[iomuxc_gate]);
239
240 /*
241 * SCC is needed to boot via mmc after a watchdog reset. The clock code
242 * before conversion to common clk also enabled UART1 (which isn't
243 * handled here and not needed for mmc) and IIM (which is enabled
244 * unconditionally above).
245 */
246 clk_prepare_enable(clk[scc_gate]);
247
248 imx_register_uart_clocks(uart_clks);
249
250 imx_print_silicon_rev("i.MX35", mx35_revision());
251}
252
253int __init mx35_clocks_init(void)
254{
255 _mx35_clocks_init();
256
223 clk_register_clkdev(clk[pata_gate], NULL, "pata_imx"); 257 clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");
224 clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0"); 258 clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");
225 clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1"); 259 clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
@@ -279,25 +313,6 @@ int __init mx35_clocks_init(void)
279 clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); 313 clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
280 clk_register_clkdev(clk[admux_gate], "audmux", NULL); 314 clk_register_clkdev(clk[admux_gate], "audmux", NULL);
281 315
282 clk_prepare_enable(clk[spba_gate]);
283 clk_prepare_enable(clk[gpio1_gate]);
284 clk_prepare_enable(clk[gpio2_gate]);
285 clk_prepare_enable(clk[gpio3_gate]);
286 clk_prepare_enable(clk[iim_gate]);
287 clk_prepare_enable(clk[emi_gate]);
288 clk_prepare_enable(clk[max_gate]);
289 clk_prepare_enable(clk[iomuxc_gate]);
290
291 /*
292 * SCC is needed to boot via mmc after a watchdog reset. The clock code
293 * before conversion to common clk also enabled UART1 (which isn't
294 * handled here and not needed for mmc) and IIM (which is enabled
295 * unconditionally above).
296 */
297 clk_prepare_enable(clk[scc_gate]);
298
299 imx_print_silicon_rev("i.MX35", mx35_revision());
300
301 mxc_timer_init(MX35_GPT1_BASE_ADDR, MX35_INT_GPT, GPT_TYPE_IMX31); 316 mxc_timer_init(MX35_GPT1_BASE_ADDR, MX35_INT_GPT, GPT_TYPE_IMX31);
302 317
303 return 0; 318 return 0;
@@ -305,10 +320,10 @@ int __init mx35_clocks_init(void)
305 320
306static void __init mx35_clocks_init_dt(struct device_node *ccm_node) 321static void __init mx35_clocks_init_dt(struct device_node *ccm_node)
307{ 322{
323 _mx35_clocks_init();
324
308 clk_data.clks = clk; 325 clk_data.clks = clk;
309 clk_data.clk_num = ARRAY_SIZE(clk); 326 clk_data.clk_num = ARRAY_SIZE(clk);
310 of_clk_add_provider(ccm_node, of_clk_src_onecell_get, &clk_data); 327 of_clk_add_provider(ccm_node, of_clk_src_onecell_get, &clk_data);
311
312 mx35_clocks_init();
313} 328}
314CLK_OF_DECLARE(imx35, "fsl,imx35-ccm", mx35_clocks_init_dt); 329CLK_OF_DECLARE(imx35, "fsl,imx35-ccm", mx35_clocks_init_dt);
diff --git a/drivers/clk/imx/clk-imx51-imx53.c b/drivers/clk/imx/clk-imx51-imx53.c
index a7e4f394be0d..c6770348d2ab 100644
--- a/drivers/clk/imx/clk-imx51-imx53.c
+++ b/drivers/clk/imx/clk-imx51-imx53.c
@@ -130,6 +130,20 @@ static const char *cpu_podf_sels[] = { "pll1_sw", "step_sel" };
130static struct clk *clk[IMX5_CLK_END]; 130static struct clk *clk[IMX5_CLK_END];
131static struct clk_onecell_data clk_data; 131static struct clk_onecell_data clk_data;
132 132
133static struct clk ** const uart_clks[] __initconst = {
134 &clk[IMX5_CLK_UART1_IPG_GATE],
135 &clk[IMX5_CLK_UART1_PER_GATE],
136 &clk[IMX5_CLK_UART2_IPG_GATE],
137 &clk[IMX5_CLK_UART2_PER_GATE],
138 &clk[IMX5_CLK_UART3_IPG_GATE],
139 &clk[IMX5_CLK_UART3_PER_GATE],
140 &clk[IMX5_CLK_UART4_IPG_GATE],
141 &clk[IMX5_CLK_UART4_PER_GATE],
142 &clk[IMX5_CLK_UART5_IPG_GATE],
143 &clk[IMX5_CLK_UART5_PER_GATE],
144 NULL
145};
146
133static void __init mx5_clocks_common_init(void __iomem *ccm_base) 147static void __init mx5_clocks_common_init(void __iomem *ccm_base)
134{ 148{
135 clk[IMX5_CLK_DUMMY] = imx_clk_fixed("dummy", 0); 149 clk[IMX5_CLK_DUMMY] = imx_clk_fixed("dummy", 0);
@@ -310,6 +324,8 @@ static void __init mx5_clocks_common_init(void __iomem *ccm_base)
310 clk_prepare_enable(clk[IMX5_CLK_TMAX1]); 324 clk_prepare_enable(clk[IMX5_CLK_TMAX1]);
311 clk_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */ 325 clk_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */
312 clk_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */ 326 clk_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */
327
328 imx_register_uart_clocks(uart_clks);
313} 329}
314 330
315static void __init mx50_clocks_init(struct device_node *np) 331static void __init mx50_clocks_init(struct device_node *np)
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index b2c1c047dc94..c1935081d34a 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -119,6 +119,7 @@ static unsigned int share_count_ssi1;
119static unsigned int share_count_ssi2; 119static unsigned int share_count_ssi2;
120static unsigned int share_count_ssi3; 120static unsigned int share_count_ssi3;
121static unsigned int share_count_mipi_core_cfg; 121static unsigned int share_count_mipi_core_cfg;
122static unsigned int share_count_spdif;
122 123
123static inline int clk_on_imx6q(void) 124static inline int clk_on_imx6q(void)
124{ 125{
@@ -130,6 +131,12 @@ static inline int clk_on_imx6dl(void)
130 return of_machine_is_compatible("fsl,imx6dl"); 131 return of_machine_is_compatible("fsl,imx6dl");
131} 132}
132 133
134static struct clk ** const uart_clks[] __initconst = {
135 &clk[IMX6QDL_CLK_UART_IPG],
136 &clk[IMX6QDL_CLK_UART_SERIAL],
137 NULL
138};
139
133static void __init imx6q_clocks_init(struct device_node *ccm_node) 140static void __init imx6q_clocks_init(struct device_node *ccm_node)
134{ 141{
135 struct device_node *np; 142 struct device_node *np;
@@ -456,7 +463,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
456 clk[IMX6QDL_CLK_SATA] = imx_clk_gate2("sata", "ahb", base + 0x7c, 4); 463 clk[IMX6QDL_CLK_SATA] = imx_clk_gate2("sata", "ahb", base + 0x7c, 4);
457 clk[IMX6QDL_CLK_SDMA] = imx_clk_gate2("sdma", "ahb", base + 0x7c, 6); 464 clk[IMX6QDL_CLK_SDMA] = imx_clk_gate2("sdma", "ahb", base + 0x7c, 6);
458 clk[IMX6QDL_CLK_SPBA] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12); 465 clk[IMX6QDL_CLK_SPBA] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12);
459 clk[IMX6QDL_CLK_SPDIF] = imx_clk_gate2("spdif", "spdif_podf", base + 0x7c, 14); 466 clk[IMX6QDL_CLK_SPDIF] = imx_clk_gate2_shared("spdif", "spdif_podf", base + 0x7c, 14, &share_count_spdif);
467 clk[IMX6QDL_CLK_SPDIF_GCLK] = imx_clk_gate2_shared("spdif_gclk", "ipg", base + 0x7c, 14, &share_count_spdif);
460 clk[IMX6QDL_CLK_SSI1_IPG] = imx_clk_gate2_shared("ssi1_ipg", "ipg", base + 0x7c, 18, &share_count_ssi1); 468 clk[IMX6QDL_CLK_SSI1_IPG] = imx_clk_gate2_shared("ssi1_ipg", "ipg", base + 0x7c, 18, &share_count_ssi1);
461 clk[IMX6QDL_CLK_SSI2_IPG] = imx_clk_gate2_shared("ssi2_ipg", "ipg", base + 0x7c, 20, &share_count_ssi2); 469 clk[IMX6QDL_CLK_SSI2_IPG] = imx_clk_gate2_shared("ssi2_ipg", "ipg", base + 0x7c, 20, &share_count_ssi2);
462 clk[IMX6QDL_CLK_SSI3_IPG] = imx_clk_gate2_shared("ssi3_ipg", "ipg", base + 0x7c, 22, &share_count_ssi3); 470 clk[IMX6QDL_CLK_SSI3_IPG] = imx_clk_gate2_shared("ssi3_ipg", "ipg", base + 0x7c, 22, &share_count_ssi3);
@@ -541,5 +549,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
541 /* All existing boards with PCIe use LVDS1 */ 549 /* All existing boards with PCIe use LVDS1 */
542 if (IS_ENABLED(CONFIG_PCI_IMX6)) 550 if (IS_ENABLED(CONFIG_PCI_IMX6))
543 clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]); 551 clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]);
552
553 imx_register_uart_clocks(uart_clks);
544} 554}
545CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init); 555CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c
index a0d4cf26cfa9..1be6230a07af 100644
--- a/drivers/clk/imx/clk-imx6sl.c
+++ b/drivers/clk/imx/clk-imx6sl.c
@@ -97,6 +97,7 @@ static struct clk_div_table video_div_table[] = {
97static unsigned int share_count_ssi1; 97static unsigned int share_count_ssi1;
98static unsigned int share_count_ssi2; 98static unsigned int share_count_ssi2;
99static unsigned int share_count_ssi3; 99static unsigned int share_count_ssi3;
100static unsigned int share_count_spdif;
100 101
101static struct clk *clks[IMX6SL_CLK_END]; 102static struct clk *clks[IMX6SL_CLK_END];
102static struct clk_onecell_data clk_data; 103static struct clk_onecell_data clk_data;
@@ -184,6 +185,12 @@ void imx6sl_set_wait_clk(bool enter)
184 imx6sl_enable_pll_arm(false); 185 imx6sl_enable_pll_arm(false);
185} 186}
186 187
188static struct clk ** const uart_clks[] __initconst = {
189 &clks[IMX6SL_CLK_UART],
190 &clks[IMX6SL_CLK_UART_SERIAL],
191 NULL
192};
193
187static void __init imx6sl_clocks_init(struct device_node *ccm_node) 194static void __init imx6sl_clocks_init(struct device_node *ccm_node)
188{ 195{
189 struct device_node *np; 196 struct device_node *np;
@@ -391,7 +398,8 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
391 clks[IMX6SL_CLK_PWM4] = imx_clk_gate2("pwm4", "perclk", base + 0x78, 22); 398 clks[IMX6SL_CLK_PWM4] = imx_clk_gate2("pwm4", "perclk", base + 0x78, 22);
392 clks[IMX6SL_CLK_SDMA] = imx_clk_gate2("sdma", "ipg", base + 0x7c, 6); 399 clks[IMX6SL_CLK_SDMA] = imx_clk_gate2("sdma", "ipg", base + 0x7c, 6);
393 clks[IMX6SL_CLK_SPBA] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12); 400 clks[IMX6SL_CLK_SPBA] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12);
394 clks[IMX6SL_CLK_SPDIF] = imx_clk_gate2("spdif", "spdif0_podf", base + 0x7c, 14); 401 clks[IMX6SL_CLK_SPDIF] = imx_clk_gate2_shared("spdif", "spdif0_podf", base + 0x7c, 14, &share_count_spdif);
402 clks[IMX6SL_CLK_SPDIF_GCLK] = imx_clk_gate2_shared("spdif_gclk", "ipg", base + 0x7c, 14, &share_count_spdif);
395 clks[IMX6SL_CLK_SSI1_IPG] = imx_clk_gate2_shared("ssi1_ipg", "ipg", base + 0x7c, 18, &share_count_ssi1); 403 clks[IMX6SL_CLK_SSI1_IPG] = imx_clk_gate2_shared("ssi1_ipg", "ipg", base + 0x7c, 18, &share_count_ssi1);
396 clks[IMX6SL_CLK_SSI2_IPG] = imx_clk_gate2_shared("ssi2_ipg", "ipg", base + 0x7c, 20, &share_count_ssi2); 404 clks[IMX6SL_CLK_SSI2_IPG] = imx_clk_gate2_shared("ssi2_ipg", "ipg", base + 0x7c, 20, &share_count_ssi2);
397 clks[IMX6SL_CLK_SSI3_IPG] = imx_clk_gate2_shared("ssi3_ipg", "ipg", base + 0x7c, 22, &share_count_ssi3); 405 clks[IMX6SL_CLK_SSI3_IPG] = imx_clk_gate2_shared("ssi3_ipg", "ipg", base + 0x7c, 22, &share_count_ssi3);
@@ -439,5 +447,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
439 447
440 clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL], 448 clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL],
441 clks[IMX6SL_CLK_PLL2_PFD2]); 449 clks[IMX6SL_CLK_PLL2_PFD2]);
450
451 imx_register_uart_clocks(uart_clks);
442} 452}
443CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init); 453CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index 5b95c2c2bf52..fea125eb4330 100644
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -135,6 +135,12 @@ static u32 share_count_ssi1;
135static u32 share_count_ssi2; 135static u32 share_count_ssi2;
136static u32 share_count_ssi3; 136static u32 share_count_ssi3;
137 137
138static struct clk ** const uart_clks[] __initconst = {
139 &clks[IMX6SX_CLK_UART_IPG],
140 &clks[IMX6SX_CLK_UART_SERIAL],
141 NULL
142};
143
138static void __init imx6sx_clocks_init(struct device_node *ccm_node) 144static void __init imx6sx_clocks_init(struct device_node *ccm_node)
139{ 145{
140 struct device_node *np; 146 struct device_node *np;
@@ -454,6 +460,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
454 clks[IMX6SX_CLK_SPBA] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12); 460 clks[IMX6SX_CLK_SPBA] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12);
455 clks[IMX6SX_CLK_AUDIO] = imx_clk_gate2_shared("audio", "audio_podf", base + 0x7c, 14, &share_count_audio); 461 clks[IMX6SX_CLK_AUDIO] = imx_clk_gate2_shared("audio", "audio_podf", base + 0x7c, 14, &share_count_audio);
456 clks[IMX6SX_CLK_SPDIF] = imx_clk_gate2_shared("spdif", "spdif_podf", base + 0x7c, 14, &share_count_audio); 462 clks[IMX6SX_CLK_SPDIF] = imx_clk_gate2_shared("spdif", "spdif_podf", base + 0x7c, 14, &share_count_audio);
463 clks[IMX6SX_CLK_SPDIF_GCLK] = imx_clk_gate2_shared("spdif_gclk", "ipg", base + 0x7c, 14, &share_count_audio);
457 clks[IMX6SX_CLK_SSI1_IPG] = imx_clk_gate2_shared("ssi1_ipg", "ipg", base + 0x7c, 18, &share_count_ssi1); 464 clks[IMX6SX_CLK_SSI1_IPG] = imx_clk_gate2_shared("ssi1_ipg", "ipg", base + 0x7c, 18, &share_count_ssi1);
458 clks[IMX6SX_CLK_SSI2_IPG] = imx_clk_gate2_shared("ssi2_ipg", "ipg", base + 0x7c, 20, &share_count_ssi2); 465 clks[IMX6SX_CLK_SSI2_IPG] = imx_clk_gate2_shared("ssi2_ipg", "ipg", base + 0x7c, 20, &share_count_ssi2);
459 clks[IMX6SX_CLK_SSI3_IPG] = imx_clk_gate2_shared("ssi3_ipg", "ipg", base + 0x7c, 22, &share_count_ssi3); 466 clks[IMX6SX_CLK_SSI3_IPG] = imx_clk_gate2_shared("ssi3_ipg", "ipg", base + 0x7c, 22, &share_count_ssi3);
@@ -557,5 +564,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
557 564
558 clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]); 565 clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
559 clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]); 566 clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
567
568 imx_register_uart_clocks(uart_clks);
560} 569}
561CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init); 570CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c
index aaa36650695f..01718d05e952 100644
--- a/drivers/clk/imx/clk-imx6ul.c
+++ b/drivers/clk/imx/clk-imx6ul.c
@@ -407,6 +407,24 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
407 clk_data.clk_num = ARRAY_SIZE(clks); 407 clk_data.clk_num = ARRAY_SIZE(clks);
408 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); 408 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
409 409
410 /*
411 * Lower the AHB clock rate before changing the parent clock source,
412 * as AHB clock rate can NOT be higher than 133MHz, but its parent
413 * will be switched from 396MHz PFD to 528MHz PLL in order to increase
414 * AXI clock rate, so we need to lower AHB rate first to make sure at
415 * any time, AHB rate is <= 133MHz.
416 */
417 clk_set_rate(clks[IMX6UL_CLK_AHB], 99000000);
418
419 /* Change periph_pre clock to pll2_bus to adjust AXI rate to 264MHz */
420 clk_set_parent(clks[IMX6UL_CLK_PERIPH_CLK2_SEL], clks[IMX6UL_CLK_PLL3_USB_OTG]);
421 clk_set_parent(clks[IMX6UL_CLK_PERIPH], clks[IMX6UL_CLK_PERIPH_CLK2]);
422 clk_set_parent(clks[IMX6UL_CLK_PERIPH_PRE], clks[IMX6UL_CLK_PLL2_BUS]);
423 clk_set_parent(clks[IMX6UL_CLK_PERIPH], clks[IMX6UL_CLK_PERIPH_PRE]);
424
425 /* Make sure AHB rate is 132MHz */
426 clk_set_rate(clks[IMX6UL_CLK_AHB], 132000000);
427
410 /* set perclk to from OSC */ 428 /* set perclk to from OSC */
411 clk_set_parent(clks[IMX6UL_CLK_PERCLK_SEL], clks[IMX6UL_CLK_OSC]); 429 clk_set_parent(clks[IMX6UL_CLK_PERCLK_SEL], clks[IMX6UL_CLK_OSC]);
412 430
diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c
index 71f3a94b472c..448ef321948b 100644
--- a/drivers/clk/imx/clk-imx7d.c
+++ b/drivers/clk/imx/clk-imx7d.c
@@ -363,6 +363,17 @@ static const char *pll_video_bypass_sel[] = { "pll_video_main", "pll_video_main_
363 363
364static struct clk_onecell_data clk_data; 364static struct clk_onecell_data clk_data;
365 365
366static struct clk ** const uart_clks[] __initconst = {
367 &clks[IMX7D_UART1_ROOT_CLK],
368 &clks[IMX7D_UART2_ROOT_CLK],
369 &clks[IMX7D_UART3_ROOT_CLK],
370 &clks[IMX7D_UART4_ROOT_CLK],
371 &clks[IMX7D_UART5_ROOT_CLK],
372 &clks[IMX7D_UART6_ROOT_CLK],
373 &clks[IMX7D_UART7_ROOT_CLK],
374 NULL
375};
376
366static void __init imx7d_clocks_init(struct device_node *ccm_node) 377static void __init imx7d_clocks_init(struct device_node *ccm_node)
367{ 378{
368 struct device_node *np; 379 struct device_node *np;
@@ -818,6 +829,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
818 clks[IMX7D_CSI_MCLK_ROOT_CLK] = imx_clk_gate2("csi_mclk_root_clk", "csi_mclk_post_div", base + 0x4490, 0); 829 clks[IMX7D_CSI_MCLK_ROOT_CLK] = imx_clk_gate2("csi_mclk_root_clk", "csi_mclk_post_div", base + 0x4490, 0);
819 clks[IMX7D_AUDIO_MCLK_ROOT_CLK] = imx_clk_gate2("audio_mclk_root_clk", "audio_mclk_post_div", base + 0x4790, 0); 830 clks[IMX7D_AUDIO_MCLK_ROOT_CLK] = imx_clk_gate2("audio_mclk_root_clk", "audio_mclk_post_div", base + 0x4790, 0);
820 clks[IMX7D_WRCLK_ROOT_CLK] = imx_clk_gate2("wrclk_root_clk", "wrclk_post_div", base + 0x47a0, 0); 831 clks[IMX7D_WRCLK_ROOT_CLK] = imx_clk_gate2("wrclk_root_clk", "wrclk_post_div", base + 0x47a0, 0);
832 clks[IMX7D_ADC_ROOT_CLK] = imx_clk_gate2("adc_root_clk", "ipg_root_clk", base + 0x4200, 0);
821 833
822 clks[IMX7D_GPT_3M_CLK] = imx_clk_fixed_factor("gpt_3m", "osc", 1, 8); 834 clks[IMX7D_GPT_3M_CLK] = imx_clk_fixed_factor("gpt_3m", "osc", 1, 8);
823 835
@@ -856,5 +868,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
856 /* set uart module clock's parent clock source that must be great then 80MHz */ 868 /* set uart module clock's parent clock source that must be great then 80MHz */
857 clk_set_parent(clks[IMX7D_UART1_ROOT_SRC], clks[IMX7D_OSC_24M_CLK]); 869 clk_set_parent(clks[IMX7D_UART1_ROOT_SRC], clks[IMX7D_OSC_24M_CLK]);
858 870
871 imx_register_uart_clocks(uart_clks);
872
859} 873}
860CLK_OF_DECLARE(imx7d, "fsl,imx7d-ccm", imx7d_clocks_init); 874CLK_OF_DECLARE(imx7d, "fsl,imx7d-ccm", imx7d_clocks_init);
diff --git a/drivers/clk/imx/clk-vf610.c b/drivers/clk/imx/clk-vf610.c
index bff45ead7389..d1b1c95177bb 100644
--- a/drivers/clk/imx/clk-vf610.c
+++ b/drivers/clk/imx/clk-vf610.c
@@ -387,6 +387,7 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
387 387
388 clk[VF610_CLK_SNVS] = imx_clk_gate2("snvs-rtc", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(7)); 388 clk[VF610_CLK_SNVS] = imx_clk_gate2("snvs-rtc", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(7));
389 clk[VF610_CLK_DAP] = imx_clk_gate("dap", "platform_bus", CCM_CCSR, 24); 389 clk[VF610_CLK_DAP] = imx_clk_gate("dap", "platform_bus", CCM_CCSR, 24);
390 clk[VF610_CLK_OCOTP] = imx_clk_gate("ocotp", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(5));
390 391
391 imx_check_clocks(clk, ARRAY_SIZE(clk)); 392 imx_check_clocks(clk, ARRAY_SIZE(clk));
392 393
diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
index df12b5307175..a634b1185be3 100644
--- a/drivers/clk/imx/clk.c
+++ b/drivers/clk/imx/clk.c
@@ -73,3 +73,41 @@ void imx_cscmr1_fixup(u32 *val)
73 *val ^= CSCMR1_FIXUP; 73 *val ^= CSCMR1_FIXUP;
74 return; 74 return;
75} 75}
76
77static int imx_keep_uart_clocks __initdata;
78static struct clk ** const *imx_uart_clocks __initdata;
79
80static int __init imx_keep_uart_clocks_param(char *str)
81{
82 imx_keep_uart_clocks = 1;
83
84 return 0;
85}
86__setup_param("earlycon", imx_keep_uart_earlycon,
87 imx_keep_uart_clocks_param, 0);
88__setup_param("earlyprintk", imx_keep_uart_earlyprintk,
89 imx_keep_uart_clocks_param, 0);
90
91void __init imx_register_uart_clocks(struct clk ** const clks[])
92{
93 if (imx_keep_uart_clocks) {
94 int i;
95
96 imx_uart_clocks = clks;
97 for (i = 0; imx_uart_clocks[i]; i++)
98 clk_prepare_enable(*imx_uart_clocks[i]);
99 }
100}
101
102static int __init imx_clk_disable_uart(void)
103{
104 if (imx_keep_uart_clocks && imx_uart_clocks) {
105 int i;
106
107 for (i = 0; imx_uart_clocks[i]; i++)
108 clk_disable_unprepare(*imx_uart_clocks[i]);
109 }
110
111 return 0;
112}
113late_initcall_sync(imx_clk_disable_uart);
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 1049b0c7d818..c94ac5c26226 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -7,6 +7,7 @@
7extern spinlock_t imx_ccm_lock; 7extern spinlock_t imx_ccm_lock;
8 8
9void imx_check_clocks(struct clk *clks[], unsigned int count); 9void imx_check_clocks(struct clk *clks[], unsigned int count);
10void imx_register_uart_clocks(struct clk ** const clks[]);
10 11
11extern void imx_cscmr1_fixup(u32 *val); 12extern void imx_cscmr1_fixup(u32 *val);
12 13
diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index ed02bbc7b11f..abb47608713b 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -716,6 +716,8 @@ static const char *const rk3188_critical_clocks[] __initconst = {
716 "aclk_cpu", 716 "aclk_cpu",
717 "aclk_peri", 717 "aclk_peri",
718 "hclk_peri", 718 "hclk_peri",
719 "pclk_cpu",
720 "pclk_peri",
719}; 721};
720 722
721static void __init rk3188_common_clk_init(struct device_node *np) 723static void __init rk3188_common_clk_init(struct device_node *np)
@@ -744,8 +746,6 @@ static void __init rk3188_common_clk_init(struct device_node *np)
744 746
745 rockchip_clk_register_branches(common_clk_branches, 747 rockchip_clk_register_branches(common_clk_branches,
746 ARRAY_SIZE(common_clk_branches)); 748 ARRAY_SIZE(common_clk_branches));
747 rockchip_clk_protect_critical(rk3188_critical_clocks,
748 ARRAY_SIZE(rk3188_critical_clocks));
749 749
750 rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0), 750 rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),
751 ROCKCHIP_SOFTRST_HIWORD_MASK); 751 ROCKCHIP_SOFTRST_HIWORD_MASK);
@@ -765,6 +765,8 @@ static void __init rk3066a_clk_init(struct device_node *np)
765 mux_armclk_p, ARRAY_SIZE(mux_armclk_p), 765 mux_armclk_p, ARRAY_SIZE(mux_armclk_p),
766 &rk3066_cpuclk_data, rk3066_cpuclk_rates, 766 &rk3066_cpuclk_data, rk3066_cpuclk_rates,
767 ARRAY_SIZE(rk3066_cpuclk_rates)); 767 ARRAY_SIZE(rk3066_cpuclk_rates));
768 rockchip_clk_protect_critical(rk3188_critical_clocks,
769 ARRAY_SIZE(rk3188_critical_clocks));
768} 770}
769CLK_OF_DECLARE(rk3066a_cru, "rockchip,rk3066a-cru", rk3066a_clk_init); 771CLK_OF_DECLARE(rk3066a_cru, "rockchip,rk3066a-cru", rk3066a_clk_init);
770 772
@@ -801,6 +803,9 @@ static void __init rk3188a_clk_init(struct device_node *np)
801 pr_warn("%s: missing clocks to reparent aclk_cpu_pre to gpll\n", 803 pr_warn("%s: missing clocks to reparent aclk_cpu_pre to gpll\n",
802 __func__); 804 __func__);
803 } 805 }
806
807 rockchip_clk_protect_critical(rk3188_critical_clocks,
808 ARRAY_SIZE(rk3188_critical_clocks));
804} 809}
805CLK_OF_DECLARE(rk3188a_cru, "rockchip,rk3188a-cru", rk3188a_clk_init); 810CLK_OF_DECLARE(rk3188a_cru, "rockchip,rk3188a-cru", rk3188a_clk_init);
806 811
diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index 9c5d61e698ef..7e6b783e6eee 100644
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -818,6 +818,10 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
818 GATE(0, "sclk_timer00", "xin24m", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(24), 0, GFLAGS), 818 GATE(0, "sclk_timer00", "xin24m", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(24), 0, GFLAGS),
819}; 819};
820 820
821static const char *const rk3368_critical_clocks[] __initconst = {
822 "pclk_pd_pmu",
823};
824
821static void __init rk3368_clk_init(struct device_node *np) 825static void __init rk3368_clk_init(struct device_node *np)
822{ 826{
823 void __iomem *reg_base; 827 void __iomem *reg_base;
@@ -862,6 +866,8 @@ static void __init rk3368_clk_init(struct device_node *np)
862 RK3368_GRF_SOC_STATUS0); 866 RK3368_GRF_SOC_STATUS0);
863 rockchip_clk_register_branches(rk3368_clk_branches, 867 rockchip_clk_register_branches(rk3368_clk_branches,
864 ARRAY_SIZE(rk3368_clk_branches)); 868 ARRAY_SIZE(rk3368_clk_branches));
869 rockchip_clk_protect_critical(rk3368_critical_clocks,
870 ARRAY_SIZE(rk3368_critical_clocks));
865 871
866 rockchip_clk_register_armclk(ARMCLKB, "armclkb", 872 rockchip_clk_register_armclk(ARMCLKB, "armclkb",
867 mux_armclkb_p, ARRAY_SIZE(mux_armclkb_p), 873 mux_armclkb_p, ARRAY_SIZE(mux_armclkb_p),
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index 55b83c7ef878..5bebf8cb0d70 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -222,9 +222,13 @@ PNAME(mout_mpll_user_p) = { "fin_pll", "mout_mpll" };
222PNAME(mout_bpll_user_p) = { "fin_pll", "mout_bpll" }; 222PNAME(mout_bpll_user_p) = { "fin_pll", "mout_bpll" };
223PNAME(mout_aclk166_p) = { "mout_cpll", "mout_mpll_user" }; 223PNAME(mout_aclk166_p) = { "mout_cpll", "mout_mpll_user" };
224PNAME(mout_aclk200_p) = { "mout_mpll_user", "mout_bpll_user" }; 224PNAME(mout_aclk200_p) = { "mout_mpll_user", "mout_bpll_user" };
225PNAME(mout_aclk300_p) = { "mout_aclk300_disp1_mid",
226 "mout_aclk300_disp1_mid1" };
225PNAME(mout_aclk400_p) = { "mout_aclk400_g3d_mid", "mout_gpll" }; 227PNAME(mout_aclk400_p) = { "mout_aclk400_g3d_mid", "mout_gpll" };
226PNAME(mout_aclk200_sub_p) = { "fin_pll", "div_aclk200" }; 228PNAME(mout_aclk200_sub_p) = { "fin_pll", "div_aclk200" };
227PNAME(mout_aclk266_sub_p) = { "fin_pll", "div_aclk266" }; 229PNAME(mout_aclk266_sub_p) = { "fin_pll", "div_aclk266" };
230PNAME(mout_aclk300_sub_p) = { "fin_pll", "div_aclk300_disp" };
231PNAME(mout_aclk300_disp1_mid1_p) = { "mout_vpll", "mout_cpll" };
228PNAME(mout_aclk333_sub_p) = { "fin_pll", "div_aclk333" }; 232PNAME(mout_aclk333_sub_p) = { "fin_pll", "div_aclk333" };
229PNAME(mout_aclk400_isp_sub_p) = { "fin_pll", "div_aclk400_isp" }; 233PNAME(mout_aclk400_isp_sub_p) = { "fin_pll", "div_aclk400_isp" };
230PNAME(mout_hdmi_p) = { "div_hdmi_pixel", "sclk_hdmiphy" }; 234PNAME(mout_hdmi_p) = { "div_hdmi_pixel", "sclk_hdmiphy" };
@@ -303,9 +307,13 @@ static struct samsung_mux_clock exynos5250_mux_clks[] __initdata = {
303 */ 307 */
304 MUX(0, "mout_aclk166", mout_aclk166_p, SRC_TOP0, 8, 1), 308 MUX(0, "mout_aclk166", mout_aclk166_p, SRC_TOP0, 8, 1),
305 MUX(0, "mout_aclk200", mout_aclk200_p, SRC_TOP0, 12, 1), 309 MUX(0, "mout_aclk200", mout_aclk200_p, SRC_TOP0, 12, 1),
310 MUX(0, "mout_aclk300_disp1_mid", mout_aclk200_p, SRC_TOP0, 14, 1),
311 MUX(0, "mout_aclk300", mout_aclk300_p, SRC_TOP0, 15, 1),
306 MUX(0, "mout_aclk333", mout_aclk166_p, SRC_TOP0, 16, 1), 312 MUX(0, "mout_aclk333", mout_aclk166_p, SRC_TOP0, 16, 1),
307 MUX(0, "mout_aclk400_g3d_mid", mout_aclk200_p, SRC_TOP0, 20, 1), 313 MUX(0, "mout_aclk400_g3d_mid", mout_aclk200_p, SRC_TOP0, 20, 1),
308 314
315 MUX(0, "mout_aclk300_disp1_mid1", mout_aclk300_disp1_mid1_p, SRC_TOP1,
316 8, 1),
309 MUX(0, "mout_aclk400_isp", mout_aclk200_p, SRC_TOP1, 24, 1), 317 MUX(0, "mout_aclk400_isp", mout_aclk200_p, SRC_TOP1, 24, 1),
310 MUX(0, "mout_aclk400_g3d", mout_aclk400_p, SRC_TOP1, 28, 1), 318 MUX(0, "mout_aclk400_g3d", mout_aclk400_p, SRC_TOP1, 28, 1),
311 319
@@ -316,7 +324,10 @@ static struct samsung_mux_clock exynos5250_mux_clks[] __initdata = {
316 MUX(0, "mout_bpll_user", mout_bpll_user_p, SRC_TOP2, 24, 1), 324 MUX(0, "mout_bpll_user", mout_bpll_user_p, SRC_TOP2, 24, 1),
317 MUX(CLK_MOUT_GPLL, "mout_gpll", mout_gpll_p, SRC_TOP2, 28, 1), 325 MUX(CLK_MOUT_GPLL, "mout_gpll", mout_gpll_p, SRC_TOP2, 28, 1),
318 326
319 MUX(0, "mout_aclk200_disp1_sub", mout_aclk200_sub_p, SRC_TOP3, 4, 1), 327 MUX(CLK_MOUT_ACLK200_DISP1_SUB, "mout_aclk200_disp1_sub",
328 mout_aclk200_sub_p, SRC_TOP3, 4, 1),
329 MUX(CLK_MOUT_ACLK300_DISP1_SUB, "mout_aclk300_disp1_sub",
330 mout_aclk300_sub_p, SRC_TOP3, 6, 1),
320 MUX(0, "mout_aclk266_gscl_sub", mout_aclk266_sub_p, SRC_TOP3, 8, 1), 331 MUX(0, "mout_aclk266_gscl_sub", mout_aclk266_sub_p, SRC_TOP3, 8, 1),
321 MUX(0, "mout_aclk_266_isp_sub", mout_aclk266_sub_p, SRC_TOP3, 16, 1), 332 MUX(0, "mout_aclk_266_isp_sub", mout_aclk266_sub_p, SRC_TOP3, 16, 1),
322 MUX(0, "mout_aclk_400_isp_sub", mout_aclk400_isp_sub_p, 333 MUX(0, "mout_aclk_400_isp_sub", mout_aclk400_isp_sub_p,
@@ -392,6 +403,7 @@ static struct samsung_div_clock exynos5250_div_clks[] __initdata = {
392 DIV(0, "div_aclk333", "mout_aclk333", DIV_TOP0, 20, 3), 403 DIV(0, "div_aclk333", "mout_aclk333", DIV_TOP0, 20, 3),
393 DIV(0, "div_aclk400_g3d", "mout_aclk400_g3d", DIV_TOP0, 404 DIV(0, "div_aclk400_g3d", "mout_aclk400_g3d", DIV_TOP0,
394 24, 3), 405 24, 3),
406 DIV(0, "div_aclk300_disp", "mout_aclk300", DIV_TOP0, 28, 3),
395 407
396 DIV(0, "div_aclk400_isp", "mout_aclk400_isp", DIV_TOP1, 20, 3), 408 DIV(0, "div_aclk400_isp", "mout_aclk400_isp", DIV_TOP1, 20, 3),
397 DIV(0, "div_aclk66_pre", "mout_mpll_user", DIV_TOP1, 24, 3), 409 DIV(0, "div_aclk66_pre", "mout_mpll_user", DIV_TOP1, 24, 3),
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index 83ccf142ff2a..576cd0354d48 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -307,7 +307,7 @@ static const struct clkgen_quadfs_data st_fs660c32_F_416 = {
307 .get_rate = clk_fs660c32_dig_get_rate, 307 .get_rate = clk_fs660c32_dig_get_rate,
308}; 308};
309 309
310static const struct clkgen_quadfs_data st_fs660c32_C_407 = { 310static const struct clkgen_quadfs_data st_fs660c32_C = {
311 .nrst_present = true, 311 .nrst_present = true,
312 .nrst = { CLKGEN_FIELD(0x2f0, 0x1, 0), 312 .nrst = { CLKGEN_FIELD(0x2f0, 0x1, 0),
313 CLKGEN_FIELD(0x2f0, 0x1, 1), 313 CLKGEN_FIELD(0x2f0, 0x1, 1),
@@ -350,7 +350,7 @@ static const struct clkgen_quadfs_data st_fs660c32_C_407 = {
350 .get_rate = clk_fs660c32_dig_get_rate, 350 .get_rate = clk_fs660c32_dig_get_rate,
351}; 351};
352 352
353static const struct clkgen_quadfs_data st_fs660c32_D_407 = { 353static const struct clkgen_quadfs_data st_fs660c32_D = {
354 .nrst_present = true, 354 .nrst_present = true,
355 .nrst = { CLKGEN_FIELD(0x2a0, 0x1, 0), 355 .nrst = { CLKGEN_FIELD(0x2a0, 0x1, 0),
356 CLKGEN_FIELD(0x2a0, 0x1, 1), 356 CLKGEN_FIELD(0x2a0, 0x1, 1),
@@ -1077,11 +1077,11 @@ static const struct of_device_id quadfs_of_match[] = {
1077 }, 1077 },
1078 { 1078 {
1079 .compatible = "st,stih407-quadfs660-C", 1079 .compatible = "st,stih407-quadfs660-C",
1080 .data = &st_fs660c32_C_407 1080 .data = &st_fs660c32_C
1081 }, 1081 },
1082 { 1082 {
1083 .compatible = "st,stih407-quadfs660-D", 1083 .compatible = "st,stih407-quadfs660-D",
1084 .data = &st_fs660c32_D_407 1084 .data = &st_fs660c32_D
1085 }, 1085 },
1086 {} 1086 {}
1087}; 1087};
diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c
index 47a38a994cac..b2a332cf8985 100644
--- a/drivers/clk/st/clkgen-pll.c
+++ b/drivers/clk/st/clkgen-pll.c
@@ -193,7 +193,7 @@ static const struct clkgen_pll_data st_pll3200c32_407_a0 = {
193 .ops = &stm_pll3200c32_ops, 193 .ops = &stm_pll3200c32_ops,
194}; 194};
195 195
196static const struct clkgen_pll_data st_pll3200c32_407_c0_0 = { 196static const struct clkgen_pll_data st_pll3200c32_cx_0 = {
197 /* 407 C0 PLL0 */ 197 /* 407 C0 PLL0 */
198 .pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8), 198 .pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8),
199 .locked_status = CLKGEN_FIELD(0x2a0, 0x1, 24), 199 .locked_status = CLKGEN_FIELD(0x2a0, 0x1, 24),
@@ -205,7 +205,7 @@ static const struct clkgen_pll_data st_pll3200c32_407_c0_0 = {
205 .ops = &stm_pll3200c32_ops, 205 .ops = &stm_pll3200c32_ops,
206}; 206};
207 207
208static const struct clkgen_pll_data st_pll3200c32_407_c0_1 = { 208static const struct clkgen_pll_data st_pll3200c32_cx_1 = {
209 /* 407 C0 PLL1 */ 209 /* 407 C0 PLL1 */
210 .pdn_status = CLKGEN_FIELD(0x2c8, 0x1, 8), 210 .pdn_status = CLKGEN_FIELD(0x2c8, 0x1, 8),
211 .locked_status = CLKGEN_FIELD(0x2c8, 0x1, 24), 211 .locked_status = CLKGEN_FIELD(0x2c8, 0x1, 24),
@@ -624,12 +624,12 @@ static const struct of_device_id c32_pll_of_match[] = {
624 .data = &st_pll3200c32_407_a0, 624 .data = &st_pll3200c32_407_a0,
625 }, 625 },
626 { 626 {
627 .compatible = "st,stih407-plls-c32-c0_0", 627 .compatible = "st,plls-c32-cx_0",
628 .data = &st_pll3200c32_407_c0_0, 628 .data = &st_pll3200c32_cx_0,
629 }, 629 },
630 { 630 {
631 .compatible = "st,stih407-plls-c32-c0_1", 631 .compatible = "st,plls-c32-cx_1",
632 .data = &st_pll3200c32_407_c0_1, 632 .data = &st_pll3200c32_cx_1,
633 }, 633 },
634 { 634 {
635 .compatible = "st,stih407-plls-c32-a9", 635 .compatible = "st,stih407-plls-c32-a9",
diff --git a/drivers/clk/tegra/clk-dfll.c b/drivers/clk/tegra/clk-dfll.c
index c2ff859ee0e8..c4e3a52e225b 100644
--- a/drivers/clk/tegra/clk-dfll.c
+++ b/drivers/clk/tegra/clk-dfll.c
@@ -682,11 +682,17 @@ static int find_lut_index_for_rate(struct tegra_dfll *td, unsigned long rate)
682 struct dev_pm_opp *opp; 682 struct dev_pm_opp *opp;
683 int i, uv; 683 int i, uv;
684 684
685 rcu_read_lock();
686
685 opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate); 687 opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate);
686 if (IS_ERR(opp)) 688 if (IS_ERR(opp)) {
689 rcu_read_unlock();
687 return PTR_ERR(opp); 690 return PTR_ERR(opp);
691 }
688 uv = dev_pm_opp_get_voltage(opp); 692 uv = dev_pm_opp_get_voltage(opp);
689 693
694 rcu_read_unlock();
695
690 for (i = 0; i < td->i2c_lut_size; i++) { 696 for (i = 0; i < td->i2c_lut_size; i++) {
691 if (regulator_list_voltage(td->vdd_reg, td->i2c_lut[i]) == uv) 697 if (regulator_list_voltage(td->vdd_reg, td->i2c_lut[i]) == uv)
692 return i; 698 return i;
diff --git a/drivers/clocksource/rockchip_timer.c b/drivers/clocksource/rockchip_timer.c
index bb2c2b050964..d3c1742ded1a 100644
--- a/drivers/clocksource/rockchip_timer.c
+++ b/drivers/clocksource/rockchip_timer.c
@@ -148,7 +148,7 @@ static void __init rk_timer_init(struct device_node *np)
148 bc_timer.freq = clk_get_rate(timer_clk); 148 bc_timer.freq = clk_get_rate(timer_clk);
149 149
150 irq = irq_of_parse_and_map(np, 0); 150 irq = irq_of_parse_and_map(np, 0);
151 if (irq == NO_IRQ) { 151 if (!irq) {
152 pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME); 152 pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME);
153 return; 153 return;
154 } 154 }
diff --git a/drivers/clocksource/timer-keystone.c b/drivers/clocksource/timer-keystone.c
index edacf3902e10..1cea08cf603e 100644
--- a/drivers/clocksource/timer-keystone.c
+++ b/drivers/clocksource/timer-keystone.c
@@ -152,7 +152,7 @@ static void __init keystone_timer_init(struct device_node *np)
152 int irq, error; 152 int irq, error;
153 153
154 irq = irq_of_parse_and_map(np, 0); 154 irq = irq_of_parse_and_map(np, 0);
155 if (irq == NO_IRQ) { 155 if (!irq) {
156 pr_err("%s: failed to map interrupts\n", __func__); 156 pr_err("%s: failed to map interrupts\n", __func__);
157 return; 157 return;
158 } 158 }
diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
index 15b921a9248c..798277227de7 100644
--- a/drivers/cpufreq/acpi-cpufreq.c
+++ b/drivers/cpufreq/acpi-cpufreq.c
@@ -375,12 +375,11 @@ static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
375 375
376 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu); 376 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
377 377
378 policy = cpufreq_cpu_get(cpu); 378 policy = cpufreq_cpu_get_raw(cpu);
379 if (unlikely(!policy)) 379 if (unlikely(!policy))
380 return 0; 380 return 0;
381 381
382 data = policy->driver_data; 382 data = policy->driver_data;
383 cpufreq_cpu_put(policy);
384 if (unlikely(!data || !data->freq_table)) 383 if (unlikely(!data || !data->freq_table))
385 return 0; 384 return 0;
386 385
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 6633b3fa996e..ef5ed9470de9 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -238,13 +238,13 @@ int cpufreq_generic_init(struct cpufreq_policy *policy,
238} 238}
239EXPORT_SYMBOL_GPL(cpufreq_generic_init); 239EXPORT_SYMBOL_GPL(cpufreq_generic_init);
240 240
241/* Only for cpufreq core internal use */ 241struct cpufreq_policy *cpufreq_cpu_get_raw(unsigned int cpu)
242static struct cpufreq_policy *cpufreq_cpu_get_raw(unsigned int cpu)
243{ 242{
244 struct cpufreq_policy *policy = per_cpu(cpufreq_cpu_data, cpu); 243 struct cpufreq_policy *policy = per_cpu(cpufreq_cpu_data, cpu);
245 244
246 return policy && cpumask_test_cpu(cpu, policy->cpus) ? policy : NULL; 245 return policy && cpumask_test_cpu(cpu, policy->cpus) ? policy : NULL;
247} 246}
247EXPORT_SYMBOL_GPL(cpufreq_cpu_get_raw);
248 248
249unsigned int cpufreq_generic_get(unsigned int cpu) 249unsigned int cpufreq_generic_get(unsigned int cpu)
250{ 250{
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 07bc7aa6b224..d234719065a5 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -461,7 +461,7 @@ config CRYPTO_DEV_QCE
461 461
462config CRYPTO_DEV_VMX 462config CRYPTO_DEV_VMX
463 bool "Support for VMX cryptographic acceleration instructions" 463 bool "Support for VMX cryptographic acceleration instructions"
464 depends on PPC64 464 depends on PPC64 && VSX
465 help 465 help
466 Support for VMX cryptographic acceleration instructions. 466 Support for VMX cryptographic acceleration instructions.
467 467
diff --git a/drivers/crypto/marvell/cesa.h b/drivers/crypto/marvell/cesa.h
index b60698b30d30..bc2a55bc35e4 100644
--- a/drivers/crypto/marvell/cesa.h
+++ b/drivers/crypto/marvell/cesa.h
@@ -687,6 +687,33 @@ static inline u32 mv_cesa_get_int_mask(struct mv_cesa_engine *engine)
687 687
688int mv_cesa_queue_req(struct crypto_async_request *req); 688int mv_cesa_queue_req(struct crypto_async_request *req);
689 689
690/*
691 * Helper function that indicates whether a crypto request needs to be
692 * cleaned up or not after being enqueued using mv_cesa_queue_req().
693 */
694static inline int mv_cesa_req_needs_cleanup(struct crypto_async_request *req,
695 int ret)
696{
697 /*
698 * The queue still had some space, the request was queued
699 * normally, so there's no need to clean it up.
700 */
701 if (ret == -EINPROGRESS)
702 return false;
703
704 /*
705 * The queue had not space left, but since the request is
706 * flagged with CRYPTO_TFM_REQ_MAY_BACKLOG, it was added to
707 * the backlog and will be processed later. There's no need to
708 * clean it up.
709 */
710 if (ret == -EBUSY && req->flags & CRYPTO_TFM_REQ_MAY_BACKLOG)
711 return false;
712
713 /* Request wasn't queued, we need to clean it up */
714 return true;
715}
716
690/* TDMA functions */ 717/* TDMA functions */
691 718
692static inline void mv_cesa_req_dma_iter_init(struct mv_cesa_dma_iter *iter, 719static inline void mv_cesa_req_dma_iter_init(struct mv_cesa_dma_iter *iter,
diff --git a/drivers/crypto/marvell/cipher.c b/drivers/crypto/marvell/cipher.c
index 0745cf3b9c0e..3df2f4e7adb2 100644
--- a/drivers/crypto/marvell/cipher.c
+++ b/drivers/crypto/marvell/cipher.c
@@ -189,7 +189,6 @@ static inline void mv_cesa_ablkcipher_prepare(struct crypto_async_request *req,
189{ 189{
190 struct ablkcipher_request *ablkreq = ablkcipher_request_cast(req); 190 struct ablkcipher_request *ablkreq = ablkcipher_request_cast(req);
191 struct mv_cesa_ablkcipher_req *creq = ablkcipher_request_ctx(ablkreq); 191 struct mv_cesa_ablkcipher_req *creq = ablkcipher_request_ctx(ablkreq);
192
193 creq->req.base.engine = engine; 192 creq->req.base.engine = engine;
194 193
195 if (creq->req.base.type == CESA_DMA_REQ) 194 if (creq->req.base.type == CESA_DMA_REQ)
@@ -431,7 +430,7 @@ static int mv_cesa_des_op(struct ablkcipher_request *req,
431 return ret; 430 return ret;
432 431
433 ret = mv_cesa_queue_req(&req->base); 432 ret = mv_cesa_queue_req(&req->base);
434 if (ret && ret != -EINPROGRESS) 433 if (mv_cesa_req_needs_cleanup(&req->base, ret))
435 mv_cesa_ablkcipher_cleanup(req); 434 mv_cesa_ablkcipher_cleanup(req);
436 435
437 return ret; 436 return ret;
@@ -551,7 +550,7 @@ static int mv_cesa_des3_op(struct ablkcipher_request *req,
551 return ret; 550 return ret;
552 551
553 ret = mv_cesa_queue_req(&req->base); 552 ret = mv_cesa_queue_req(&req->base);
554 if (ret && ret != -EINPROGRESS) 553 if (mv_cesa_req_needs_cleanup(&req->base, ret))
555 mv_cesa_ablkcipher_cleanup(req); 554 mv_cesa_ablkcipher_cleanup(req);
556 555
557 return ret; 556 return ret;
@@ -693,7 +692,7 @@ static int mv_cesa_aes_op(struct ablkcipher_request *req,
693 return ret; 692 return ret;
694 693
695 ret = mv_cesa_queue_req(&req->base); 694 ret = mv_cesa_queue_req(&req->base);
696 if (ret && ret != -EINPROGRESS) 695 if (mv_cesa_req_needs_cleanup(&req->base, ret))
697 mv_cesa_ablkcipher_cleanup(req); 696 mv_cesa_ablkcipher_cleanup(req);
698 697
699 return ret; 698 return ret;
diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
index ae9272eb9c1a..e8d0d7128137 100644
--- a/drivers/crypto/marvell/hash.c
+++ b/drivers/crypto/marvell/hash.c
@@ -739,10 +739,8 @@ static int mv_cesa_ahash_update(struct ahash_request *req)
739 return 0; 739 return 0;
740 740
741 ret = mv_cesa_queue_req(&req->base); 741 ret = mv_cesa_queue_req(&req->base);
742 if (ret && ret != -EINPROGRESS) { 742 if (mv_cesa_req_needs_cleanup(&req->base, ret))
743 mv_cesa_ahash_cleanup(req); 743 mv_cesa_ahash_cleanup(req);
744 return ret;
745 }
746 744
747 return ret; 745 return ret;
748} 746}
@@ -766,7 +764,7 @@ static int mv_cesa_ahash_final(struct ahash_request *req)
766 return 0; 764 return 0;
767 765
768 ret = mv_cesa_queue_req(&req->base); 766 ret = mv_cesa_queue_req(&req->base);
769 if (ret && ret != -EINPROGRESS) 767 if (mv_cesa_req_needs_cleanup(&req->base, ret))
770 mv_cesa_ahash_cleanup(req); 768 mv_cesa_ahash_cleanup(req);
771 769
772 return ret; 770 return ret;
@@ -791,7 +789,7 @@ static int mv_cesa_ahash_finup(struct ahash_request *req)
791 return 0; 789 return 0;
792 790
793 ret = mv_cesa_queue_req(&req->base); 791 ret = mv_cesa_queue_req(&req->base);
794 if (ret && ret != -EINPROGRESS) 792 if (mv_cesa_req_needs_cleanup(&req->base, ret))
795 mv_cesa_ahash_cleanup(req); 793 mv_cesa_ahash_cleanup(req);
796 794
797 return ret; 795 return ret;
diff --git a/drivers/crypto/qat/qat_common/adf_aer.c b/drivers/crypto/qat/qat_common/adf_aer.c
index a57b4194de28..0a5ca0ba5d64 100644
--- a/drivers/crypto/qat/qat_common/adf_aer.c
+++ b/drivers/crypto/qat/qat_common/adf_aer.c
@@ -88,6 +88,9 @@ static void adf_dev_restore(struct adf_accel_dev *accel_dev)
88 struct pci_dev *parent = pdev->bus->self; 88 struct pci_dev *parent = pdev->bus->self;
89 uint16_t bridge_ctl = 0; 89 uint16_t bridge_ctl = 0;
90 90
91 if (accel_dev->is_vf)
92 return;
93
91 dev_info(&GET_DEV(accel_dev), "Resetting device qat_dev%d\n", 94 dev_info(&GET_DEV(accel_dev), "Resetting device qat_dev%d\n",
92 accel_dev->accel_id); 95 accel_dev->accel_id);
93 96
diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c
index e070c316e8b7..a19ee127edca 100644
--- a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c
+++ b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c
@@ -104,7 +104,7 @@ static int sun4i_ss_opti_poll(struct ablkcipher_request *areq)
104 sg_miter_next(&mo); 104 sg_miter_next(&mo);
105 oo = 0; 105 oo = 0;
106 } 106 }
107 } while (mo.length > 0); 107 } while (oleft > 0);
108 108
109 if (areq->info) { 109 if (areq->info) {
110 for (i = 0; i < 4 && i < ivsize / 4; i++) { 110 for (i = 0; i < 4 && i < ivsize / 4; i++) {
diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index ca1b362d77e2..3927ed9fdbd5 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -53,7 +53,7 @@ static struct devfreq *find_device_devfreq(struct device *dev)
53{ 53{
54 struct devfreq *tmp_devfreq; 54 struct devfreq *tmp_devfreq;
55 55
56 if (unlikely(IS_ERR_OR_NULL(dev))) { 56 if (IS_ERR_OR_NULL(dev)) {
57 pr_err("DEVFREQ: %s: Invalid parameters\n", __func__); 57 pr_err("DEVFREQ: %s: Invalid parameters\n", __func__);
58 return ERR_PTR(-EINVAL); 58 return ERR_PTR(-EINVAL);
59 } 59 }
@@ -133,7 +133,7 @@ static struct devfreq_governor *find_devfreq_governor(const char *name)
133{ 133{
134 struct devfreq_governor *tmp_governor; 134 struct devfreq_governor *tmp_governor;
135 135
136 if (unlikely(IS_ERR_OR_NULL(name))) { 136 if (IS_ERR_OR_NULL(name)) {
137 pr_err("DEVFREQ: %s: Invalid parameters\n", __func__); 137 pr_err("DEVFREQ: %s: Invalid parameters\n", __func__);
138 return ERR_PTR(-EINVAL); 138 return ERR_PTR(-EINVAL);
139 } 139 }
@@ -177,10 +177,10 @@ int update_devfreq(struct devfreq *devfreq)
177 return err; 177 return err;
178 178
179 /* 179 /*
180 * Adjust the freuqency with user freq and QoS. 180 * Adjust the frequency with user freq and QoS.
181 * 181 *
182 * List from the highest proiority 182 * List from the highest priority
183 * max_freq (probably called by thermal when it's too hot) 183 * max_freq
184 * min_freq 184 * min_freq
185 */ 185 */
186 186
@@ -482,7 +482,7 @@ struct devfreq *devfreq_add_device(struct device *dev,
482 devfreq->profile->max_state * 482 devfreq->profile->max_state *
483 devfreq->profile->max_state, 483 devfreq->profile->max_state,
484 GFP_KERNEL); 484 GFP_KERNEL);
485 devfreq->time_in_state = devm_kzalloc(dev, sizeof(unsigned int) * 485 devfreq->time_in_state = devm_kzalloc(dev, sizeof(unsigned long) *
486 devfreq->profile->max_state, 486 devfreq->profile->max_state,
487 GFP_KERNEL); 487 GFP_KERNEL);
488 devfreq->last_stat_updated = jiffies; 488 devfreq->last_stat_updated = jiffies;
diff --git a/drivers/devfreq/event/exynos-ppmu.c b/drivers/devfreq/event/exynos-ppmu.c
index f9901f52a225..f312485f1451 100644
--- a/drivers/devfreq/event/exynos-ppmu.c
+++ b/drivers/devfreq/event/exynos-ppmu.c
@@ -319,7 +319,8 @@ static int exynos_ppmu_v2_get_event(struct devfreq_event_dev *edev,
319 case PPMU_PMNCNT3: 319 case PPMU_PMNCNT3:
320 pmcnt_high = __raw_readl(info->ppmu.base + PPMU_V2_PMCNT3_HIGH); 320 pmcnt_high = __raw_readl(info->ppmu.base + PPMU_V2_PMCNT3_HIGH);
321 pmcnt_low = __raw_readl(info->ppmu.base + PPMU_V2_PMCNT3_LOW); 321 pmcnt_low = __raw_readl(info->ppmu.base + PPMU_V2_PMCNT3_LOW);
322 load_count = (u64)((pmcnt_high & 0xff) << 32) + (u64)pmcnt_low; 322 load_count = ((u64)((pmcnt_high & 0xff)) << 32)
323 + (u64)pmcnt_low;
323 break; 324 break;
324 } 325 }
325 edata->load_count = load_count; 326 edata->load_count = load_count;
diff --git a/drivers/devfreq/governor_simpleondemand.c b/drivers/devfreq/governor_simpleondemand.c
index 0720ba84ca92..ae72ba5e78df 100644
--- a/drivers/devfreq/governor_simpleondemand.c
+++ b/drivers/devfreq/governor_simpleondemand.c
@@ -21,17 +21,20 @@
21static int devfreq_simple_ondemand_func(struct devfreq *df, 21static int devfreq_simple_ondemand_func(struct devfreq *df,
22 unsigned long *freq) 22 unsigned long *freq)
23{ 23{
24 struct devfreq_dev_status stat; 24 int err;
25 int err = df->profile->get_dev_status(df->dev.parent, &stat); 25 struct devfreq_dev_status *stat;
26 unsigned long long a, b; 26 unsigned long long a, b;
27 unsigned int dfso_upthreshold = DFSO_UPTHRESHOLD; 27 unsigned int dfso_upthreshold = DFSO_UPTHRESHOLD;
28 unsigned int dfso_downdifferential = DFSO_DOWNDIFFERENCTIAL; 28 unsigned int dfso_downdifferential = DFSO_DOWNDIFFERENCTIAL;
29 struct devfreq_simple_ondemand_data *data = df->data; 29 struct devfreq_simple_ondemand_data *data = df->data;
30 unsigned long max = (df->max_freq) ? df->max_freq : UINT_MAX; 30 unsigned long max = (df->max_freq) ? df->max_freq : UINT_MAX;
31 31
32 err = devfreq_update_stats(df);
32 if (err) 33 if (err)
33 return err; 34 return err;
34 35
36 stat = &df->last_status;
37
35 if (data) { 38 if (data) {
36 if (data->upthreshold) 39 if (data->upthreshold)
37 dfso_upthreshold = data->upthreshold; 40 dfso_upthreshold = data->upthreshold;
@@ -43,41 +46,41 @@ static int devfreq_simple_ondemand_func(struct devfreq *df,
43 return -EINVAL; 46 return -EINVAL;
44 47
45 /* Assume MAX if it is going to be divided by zero */ 48 /* Assume MAX if it is going to be divided by zero */
46 if (stat.total_time == 0) { 49 if (stat->total_time == 0) {
47 *freq = max; 50 *freq = max;
48 return 0; 51 return 0;
49 } 52 }
50 53
51 /* Prevent overflow */ 54 /* Prevent overflow */
52 if (stat.busy_time >= (1 << 24) || stat.total_time >= (1 << 24)) { 55 if (stat->busy_time >= (1 << 24) || stat->total_time >= (1 << 24)) {
53 stat.busy_time >>= 7; 56 stat->busy_time >>= 7;
54 stat.total_time >>= 7; 57 stat->total_time >>= 7;
55 } 58 }
56 59
57 /* Set MAX if it's busy enough */ 60 /* Set MAX if it's busy enough */
58 if (stat.busy_time * 100 > 61 if (stat->busy_time * 100 >
59 stat.total_time * dfso_upthreshold) { 62 stat->total_time * dfso_upthreshold) {
60 *freq = max; 63 *freq = max;
61 return 0; 64 return 0;
62 } 65 }
63 66
64 /* Set MAX if we do not know the initial frequency */ 67 /* Set MAX if we do not know the initial frequency */
65 if (stat.current_frequency == 0) { 68 if (stat->current_frequency == 0) {
66 *freq = max; 69 *freq = max;
67 return 0; 70 return 0;
68 } 71 }
69 72
70 /* Keep the current frequency */ 73 /* Keep the current frequency */
71 if (stat.busy_time * 100 > 74 if (stat->busy_time * 100 >
72 stat.total_time * (dfso_upthreshold - dfso_downdifferential)) { 75 stat->total_time * (dfso_upthreshold - dfso_downdifferential)) {
73 *freq = stat.current_frequency; 76 *freq = stat->current_frequency;
74 return 0; 77 return 0;
75 } 78 }
76 79
77 /* Set the desired frequency based on the load */ 80 /* Set the desired frequency based on the load */
78 a = stat.busy_time; 81 a = stat->busy_time;
79 a *= stat.current_frequency; 82 a *= stat->current_frequency;
80 b = div_u64(a, stat.total_time); 83 b = div_u64(a, stat->total_time);
81 b *= 100; 84 b *= 100;
82 b = div_u64(b, (dfso_upthreshold - dfso_downdifferential / 2)); 85 b = div_u64(b, (dfso_upthreshold - dfso_downdifferential / 2));
83 *freq = (unsigned long) b; 86 *freq = (unsigned long) b;
diff --git a/drivers/devfreq/tegra-devfreq.c b/drivers/devfreq/tegra-devfreq.c
index 13a1a6e8108c..848b93ee930f 100644
--- a/drivers/devfreq/tegra-devfreq.c
+++ b/drivers/devfreq/tegra-devfreq.c
@@ -541,18 +541,20 @@ static struct devfreq_dev_profile tegra_devfreq_profile = {
541static int tegra_governor_get_target(struct devfreq *devfreq, 541static int tegra_governor_get_target(struct devfreq *devfreq,
542 unsigned long *freq) 542 unsigned long *freq)
543{ 543{
544 struct devfreq_dev_status stat; 544 struct devfreq_dev_status *stat;
545 struct tegra_devfreq *tegra; 545 struct tegra_devfreq *tegra;
546 struct tegra_devfreq_device *dev; 546 struct tegra_devfreq_device *dev;
547 unsigned long target_freq = 0; 547 unsigned long target_freq = 0;
548 unsigned int i; 548 unsigned int i;
549 int err; 549 int err;
550 550
551 err = devfreq->profile->get_dev_status(devfreq->dev.parent, &stat); 551 err = devfreq_update_stats(devfreq);
552 if (err) 552 if (err)
553 return err; 553 return err;
554 554
555 tegra = stat.private_data; 555 stat = &devfreq->last_status;
556
557 tegra = stat->private_data;
556 558
557 for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) { 559 for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) {
558 dev = &tegra->devices[i]; 560 dev = &tegra->devices[i];
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index a165b4bfd330..dd24375b76dd 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -455,6 +455,15 @@ static struct at_xdmac_desc *at_xdmac_alloc_desc(struct dma_chan *chan,
455 return desc; 455 return desc;
456} 456}
457 457
458void at_xdmac_init_used_desc(struct at_xdmac_desc *desc)
459{
460 memset(&desc->lld, 0, sizeof(desc->lld));
461 INIT_LIST_HEAD(&desc->descs_list);
462 desc->direction = DMA_TRANS_NONE;
463 desc->xfer_size = 0;
464 desc->active_xfer = false;
465}
466
458/* Call must be protected by lock. */ 467/* Call must be protected by lock. */
459static struct at_xdmac_desc *at_xdmac_get_desc(struct at_xdmac_chan *atchan) 468static struct at_xdmac_desc *at_xdmac_get_desc(struct at_xdmac_chan *atchan)
460{ 469{
@@ -466,7 +475,7 @@ static struct at_xdmac_desc *at_xdmac_get_desc(struct at_xdmac_chan *atchan)
466 desc = list_first_entry(&atchan->free_descs_list, 475 desc = list_first_entry(&atchan->free_descs_list,
467 struct at_xdmac_desc, desc_node); 476 struct at_xdmac_desc, desc_node);
468 list_del(&desc->desc_node); 477 list_del(&desc->desc_node);
469 desc->active_xfer = false; 478 at_xdmac_init_used_desc(desc);
470 } 479 }
471 480
472 return desc; 481 return desc;
@@ -875,14 +884,14 @@ at_xdmac_interleaved_queue_desc(struct dma_chan *chan,
875 884
876 if (xt->src_inc) { 885 if (xt->src_inc) {
877 if (xt->src_sgl) 886 if (xt->src_sgl)
878 chan_cc |= AT_XDMAC_CC_SAM_UBS_DS_AM; 887 chan_cc |= AT_XDMAC_CC_SAM_UBS_AM;
879 else 888 else
880 chan_cc |= AT_XDMAC_CC_SAM_INCREMENTED_AM; 889 chan_cc |= AT_XDMAC_CC_SAM_INCREMENTED_AM;
881 } 890 }
882 891
883 if (xt->dst_inc) { 892 if (xt->dst_inc) {
884 if (xt->dst_sgl) 893 if (xt->dst_sgl)
885 chan_cc |= AT_XDMAC_CC_DAM_UBS_DS_AM; 894 chan_cc |= AT_XDMAC_CC_DAM_UBS_AM;
886 else 895 else
887 chan_cc |= AT_XDMAC_CC_DAM_INCREMENTED_AM; 896 chan_cc |= AT_XDMAC_CC_DAM_INCREMENTED_AM;
888 } 897 }
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 3ff284c8e3d5..09479d4be4db 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -554,10 +554,18 @@ struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
554 mutex_lock(&dma_list_mutex); 554 mutex_lock(&dma_list_mutex);
555 555
556 if (chan->client_count == 0) { 556 if (chan->client_count == 0) {
557 struct dma_device *device = chan->device;
558
559 dma_cap_set(DMA_PRIVATE, device->cap_mask);
560 device->privatecnt++;
557 err = dma_chan_get(chan); 561 err = dma_chan_get(chan);
558 if (err) 562 if (err) {
559 pr_debug("%s: failed to get %s: (%d)\n", 563 pr_debug("%s: failed to get %s: (%d)\n",
560 __func__, dma_chan_name(chan), err); 564 __func__, dma_chan_name(chan), err);
565 chan = NULL;
566 if (--device->privatecnt == 0)
567 dma_cap_clear(DMA_PRIVATE, device->cap_mask);
568 }
561 } else 569 } else
562 chan = NULL; 570 chan = NULL;
563 571
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index cf1c87fa1edd..bedce038c6e2 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1591,7 +1591,6 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
1591 INIT_LIST_HEAD(&dw->dma.channels); 1591 INIT_LIST_HEAD(&dw->dma.channels);
1592 for (i = 0; i < nr_channels; i++) { 1592 for (i = 0; i < nr_channels; i++) {
1593 struct dw_dma_chan *dwc = &dw->chan[i]; 1593 struct dw_dma_chan *dwc = &dw->chan[i];
1594 int r = nr_channels - i - 1;
1595 1594
1596 dwc->chan.device = &dw->dma; 1595 dwc->chan.device = &dw->dma;
1597 dma_cookie_init(&dwc->chan); 1596 dma_cookie_init(&dwc->chan);
@@ -1603,7 +1602,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
1603 1602
1604 /* 7 is highest priority & 0 is lowest. */ 1603 /* 7 is highest priority & 0 is lowest. */
1605 if (pdata->chan_priority == CHAN_PRIORITY_ASCENDING) 1604 if (pdata->chan_priority == CHAN_PRIORITY_ASCENDING)
1606 dwc->priority = r; 1605 dwc->priority = nr_channels - i - 1;
1607 else 1606 else
1608 dwc->priority = i; 1607 dwc->priority = i;
1609 1608
@@ -1622,6 +1621,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
1622 /* Hardware configuration */ 1621 /* Hardware configuration */
1623 if (autocfg) { 1622 if (autocfg) {
1624 unsigned int dwc_params; 1623 unsigned int dwc_params;
1624 unsigned int r = DW_DMA_MAX_NR_CHANNELS - i - 1;
1625 void __iomem *addr = chip->regs + r * sizeof(u32); 1625 void __iomem *addr = chip->regs + r * sizeof(u32);
1626 1626
1627 dwc_params = dma_read_byaddr(addr, DWC_PARAMS); 1627 dwc_params = dma_read_byaddr(addr, DWC_PARAMS);
diff --git a/drivers/dma/idma64.c b/drivers/dma/idma64.c
index 18c14e1f1414..48d6d9e94f67 100644
--- a/drivers/dma/idma64.c
+++ b/drivers/dma/idma64.c
@@ -355,23 +355,23 @@ static size_t idma64_active_desc_size(struct idma64_chan *idma64c)
355 struct idma64_desc *desc = idma64c->desc; 355 struct idma64_desc *desc = idma64c->desc;
356 struct idma64_hw_desc *hw; 356 struct idma64_hw_desc *hw;
357 size_t bytes = desc->length; 357 size_t bytes = desc->length;
358 u64 llp; 358 u64 llp = channel_readq(idma64c, LLP);
359 u32 ctlhi; 359 u32 ctlhi = channel_readl(idma64c, CTL_HI);
360 unsigned int i = 0; 360 unsigned int i = 0;
361 361
362 llp = channel_readq(idma64c, LLP);
363 do { 362 do {
364 hw = &desc->hw[i]; 363 hw = &desc->hw[i];
365 } while ((hw->llp != llp) && (++i < desc->ndesc)); 364 if (hw->llp == llp)
365 break;
366 bytes -= hw->len;
367 } while (++i < desc->ndesc);
366 368
367 if (!i) 369 if (!i)
368 return bytes; 370 return bytes;
369 371
370 do { 372 /* The current chunk is not fully transfered yet */
371 bytes -= desc->hw[--i].len; 373 bytes += desc->hw[--i].len;
372 } while (i);
373 374
374 ctlhi = channel_readl(idma64c, CTL_HI);
375 return bytes - IDMA64C_CTLH_BLOCK_TS(ctlhi); 375 return bytes - IDMA64C_CTLH_BLOCK_TS(ctlhi);
376} 376}
377 377
diff --git a/drivers/dma/ipu/ipu_irq.c b/drivers/dma/ipu/ipu_irq.c
index 4768a829253a..2bf37e68ad0f 100644
--- a/drivers/dma/ipu/ipu_irq.c
+++ b/drivers/dma/ipu/ipu_irq.c
@@ -266,7 +266,7 @@ int ipu_irq_unmap(unsigned int source)
266} 266}
267 267
268/* Chained IRQ handler for IPU function and error interrupt */ 268/* Chained IRQ handler for IPU function and error interrupt */
269static void ipu_irq_handler(unsigned int __irq, struct irq_desc *desc) 269static void ipu_irq_handler(struct irq_desc *desc)
270{ 270{
271 struct ipu *ipu = irq_desc_get_handler_data(desc); 271 struct ipu *ipu = irq_desc_get_handler_data(desc);
272 u32 status; 272 u32 status;
diff --git a/drivers/dma/pxa_dma.c b/drivers/dma/pxa_dma.c
index 5cb61ce01036..fc4156afa070 100644
--- a/drivers/dma/pxa_dma.c
+++ b/drivers/dma/pxa_dma.c
@@ -473,8 +473,10 @@ static void pxad_free_phy(struct pxad_chan *chan)
473 return; 473 return;
474 474
475 /* clear the channel mapping in DRCMR */ 475 /* clear the channel mapping in DRCMR */
476 reg = pxad_drcmr(chan->drcmr); 476 if (chan->drcmr <= DRCMR_CHLNUM) {
477 writel_relaxed(0, chan->phy->base + reg); 477 reg = pxad_drcmr(chan->drcmr);
478 writel_relaxed(0, chan->phy->base + reg);
479 }
478 480
479 spin_lock_irqsave(&pdev->phy_lock, flags); 481 spin_lock_irqsave(&pdev->phy_lock, flags);
480 for (i = 0; i < 32; i++) 482 for (i = 0; i < 32; i++)
@@ -516,8 +518,10 @@ static void phy_enable(struct pxad_phy *phy, bool misaligned)
516 "%s(); phy=%p(%d) misaligned=%d\n", __func__, 518 "%s(); phy=%p(%d) misaligned=%d\n", __func__,
517 phy, phy->idx, misaligned); 519 phy, phy->idx, misaligned);
518 520
519 reg = pxad_drcmr(phy->vchan->drcmr); 521 if (phy->vchan->drcmr <= DRCMR_CHLNUM) {
520 writel_relaxed(DRCMR_MAPVLD | phy->idx, phy->base + reg); 522 reg = pxad_drcmr(phy->vchan->drcmr);
523 writel_relaxed(DRCMR_MAPVLD | phy->idx, phy->base + reg);
524 }
521 525
522 dalgn = phy_readl_relaxed(phy, DALGN); 526 dalgn = phy_readl_relaxed(phy, DALGN);
523 if (misaligned) 527 if (misaligned)
@@ -887,6 +891,7 @@ pxad_tx_prep(struct virt_dma_chan *vc, struct virt_dma_desc *vd,
887 struct dma_async_tx_descriptor *tx; 891 struct dma_async_tx_descriptor *tx;
888 struct pxad_chan *chan = container_of(vc, struct pxad_chan, vc); 892 struct pxad_chan *chan = container_of(vc, struct pxad_chan, vc);
889 893
894 INIT_LIST_HEAD(&vd->node);
890 tx = vchan_tx_prep(vc, vd, tx_flags); 895 tx = vchan_tx_prep(vc, vd, tx_flags);
891 tx->tx_submit = pxad_tx_submit; 896 tx->tx_submit = pxad_tx_submit;
892 dev_dbg(&chan->vc.chan.dev->device, 897 dev_dbg(&chan->vc.chan.dev->device,
@@ -910,14 +915,18 @@ static void pxad_get_config(struct pxad_chan *chan,
910 width = chan->cfg.src_addr_width; 915 width = chan->cfg.src_addr_width;
911 dev_addr = chan->cfg.src_addr; 916 dev_addr = chan->cfg.src_addr;
912 *dev_src = dev_addr; 917 *dev_src = dev_addr;
913 *dcmd |= PXA_DCMD_INCTRGADDR | PXA_DCMD_FLOWSRC; 918 *dcmd |= PXA_DCMD_INCTRGADDR;
919 if (chan->drcmr <= DRCMR_CHLNUM)
920 *dcmd |= PXA_DCMD_FLOWSRC;
914 } 921 }
915 if (dir == DMA_MEM_TO_DEV) { 922 if (dir == DMA_MEM_TO_DEV) {
916 maxburst = chan->cfg.dst_maxburst; 923 maxburst = chan->cfg.dst_maxburst;
917 width = chan->cfg.dst_addr_width; 924 width = chan->cfg.dst_addr_width;
918 dev_addr = chan->cfg.dst_addr; 925 dev_addr = chan->cfg.dst_addr;
919 *dev_dst = dev_addr; 926 *dev_dst = dev_addr;
920 *dcmd |= PXA_DCMD_INCSRCADDR | PXA_DCMD_FLOWTRG; 927 *dcmd |= PXA_DCMD_INCSRCADDR;
928 if (chan->drcmr <= DRCMR_CHLNUM)
929 *dcmd |= PXA_DCMD_FLOWTRG;
921 } 930 }
922 if (dir == DMA_MEM_TO_MEM) 931 if (dir == DMA_MEM_TO_MEM)
923 *dcmd |= PXA_DCMD_BURST32 | PXA_DCMD_INCTRGADDR | 932 *dcmd |= PXA_DCMD_BURST32 | PXA_DCMD_INCTRGADDR |
@@ -1177,6 +1186,16 @@ static unsigned int pxad_residue(struct pxad_chan *chan,
1177 else 1186 else
1178 curr = phy_readl_relaxed(chan->phy, DTADR); 1187 curr = phy_readl_relaxed(chan->phy, DTADR);
1179 1188
1189 /*
1190 * curr has to be actually read before checking descriptor
1191 * completion, so that a curr inside a status updater
1192 * descriptor implies the following test returns true, and
1193 * preventing reordering of curr load and the test.
1194 */
1195 rmb();
1196 if (is_desc_completed(vd))
1197 goto out;
1198
1180 for (i = 0; i < sw_desc->nb_desc - 1; i++) { 1199 for (i = 0; i < sw_desc->nb_desc - 1; i++) {
1181 hw_desc = sw_desc->hw_desc[i]; 1200 hw_desc = sw_desc->hw_desc[i];
1182 if (sw_desc->hw_desc[0]->dcmd & PXA_DCMD_INCSRCADDR) 1201 if (sw_desc->hw_desc[0]->dcmd & PXA_DCMD_INCSRCADDR)
diff --git a/drivers/dma/sun4i-dma.c b/drivers/dma/sun4i-dma.c
index a1a500d96ff2..1661d518224a 100644
--- a/drivers/dma/sun4i-dma.c
+++ b/drivers/dma/sun4i-dma.c
@@ -599,13 +599,13 @@ get_next_cyclic_promise(struct sun4i_dma_contract *contract)
599static void sun4i_dma_free_contract(struct virt_dma_desc *vd) 599static void sun4i_dma_free_contract(struct virt_dma_desc *vd)
600{ 600{
601 struct sun4i_dma_contract *contract = to_sun4i_dma_contract(vd); 601 struct sun4i_dma_contract *contract = to_sun4i_dma_contract(vd);
602 struct sun4i_dma_promise *promise; 602 struct sun4i_dma_promise *promise, *tmp;
603 603
604 /* Free all the demands and completed demands */ 604 /* Free all the demands and completed demands */
605 list_for_each_entry(promise, &contract->demands, list) 605 list_for_each_entry_safe(promise, tmp, &contract->demands, list)
606 kfree(promise); 606 kfree(promise);
607 607
608 list_for_each_entry(promise, &contract->completed_demands, list) 608 list_for_each_entry_safe(promise, tmp, &contract->completed_demands, list)
609 kfree(promise); 609 kfree(promise);
610 610
611 kfree(contract); 611 kfree(contract);
diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c
index b23e8d52d126..8d57b1b12e41 100644
--- a/drivers/dma/xgene-dma.c
+++ b/drivers/dma/xgene-dma.c
@@ -59,7 +59,6 @@
59#define XGENE_DMA_RING_MEM_RAM_SHUTDOWN 0xD070 59#define XGENE_DMA_RING_MEM_RAM_SHUTDOWN 0xD070
60#define XGENE_DMA_RING_BLK_MEM_RDY 0xD074 60#define XGENE_DMA_RING_BLK_MEM_RDY 0xD074
61#define XGENE_DMA_RING_BLK_MEM_RDY_VAL 0xFFFFFFFF 61#define XGENE_DMA_RING_BLK_MEM_RDY_VAL 0xFFFFFFFF
62#define XGENE_DMA_RING_DESC_CNT(v) (((v) & 0x0001FFFE) >> 1)
63#define XGENE_DMA_RING_ID_GET(owner, num) (((owner) << 6) | (num)) 62#define XGENE_DMA_RING_ID_GET(owner, num) (((owner) << 6) | (num))
64#define XGENE_DMA_RING_DST_ID(v) ((1 << 10) | (v)) 63#define XGENE_DMA_RING_DST_ID(v) ((1 << 10) | (v))
65#define XGENE_DMA_RING_CMD_OFFSET 0x2C 64#define XGENE_DMA_RING_CMD_OFFSET 0x2C
@@ -379,14 +378,6 @@ static u8 xgene_dma_encode_xor_flyby(u32 src_cnt)
379 return flyby_type[src_cnt]; 378 return flyby_type[src_cnt];
380} 379}
381 380
382static u32 xgene_dma_ring_desc_cnt(struct xgene_dma_ring *ring)
383{
384 u32 __iomem *cmd_base = ring->cmd_base;
385 u32 ring_state = ioread32(&cmd_base[1]);
386
387 return XGENE_DMA_RING_DESC_CNT(ring_state);
388}
389
390static void xgene_dma_set_src_buffer(__le64 *ext8, size_t *len, 381static void xgene_dma_set_src_buffer(__le64 *ext8, size_t *len,
391 dma_addr_t *paddr) 382 dma_addr_t *paddr)
392{ 383{
@@ -659,15 +650,12 @@ static void xgene_dma_clean_running_descriptor(struct xgene_dma_chan *chan,
659 dma_pool_free(chan->desc_pool, desc, desc->tx.phys); 650 dma_pool_free(chan->desc_pool, desc, desc->tx.phys);
660} 651}
661 652
662static int xgene_chan_xfer_request(struct xgene_dma_ring *ring, 653static void xgene_chan_xfer_request(struct xgene_dma_chan *chan,
663 struct xgene_dma_desc_sw *desc_sw) 654 struct xgene_dma_desc_sw *desc_sw)
664{ 655{
656 struct xgene_dma_ring *ring = &chan->tx_ring;
665 struct xgene_dma_desc_hw *desc_hw; 657 struct xgene_dma_desc_hw *desc_hw;
666 658
667 /* Check if can push more descriptor to hw for execution */
668 if (xgene_dma_ring_desc_cnt(ring) > (ring->slots - 2))
669 return -EBUSY;
670
671 /* Get hw descriptor from DMA tx ring */ 659 /* Get hw descriptor from DMA tx ring */
672 desc_hw = &ring->desc_hw[ring->head]; 660 desc_hw = &ring->desc_hw[ring->head];
673 661
@@ -694,11 +682,13 @@ static int xgene_chan_xfer_request(struct xgene_dma_ring *ring,
694 memcpy(desc_hw, &desc_sw->desc2, sizeof(*desc_hw)); 682 memcpy(desc_hw, &desc_sw->desc2, sizeof(*desc_hw));
695 } 683 }
696 684
685 /* Increment the pending transaction count */
686 chan->pending += ((desc_sw->flags &
687 XGENE_DMA_FLAG_64B_DESC) ? 2 : 1);
688
697 /* Notify the hw that we have descriptor ready for execution */ 689 /* Notify the hw that we have descriptor ready for execution */
698 iowrite32((desc_sw->flags & XGENE_DMA_FLAG_64B_DESC) ? 690 iowrite32((desc_sw->flags & XGENE_DMA_FLAG_64B_DESC) ?
699 2 : 1, ring->cmd); 691 2 : 1, ring->cmd);
700
701 return 0;
702} 692}
703 693
704/** 694/**
@@ -710,7 +700,6 @@ static int xgene_chan_xfer_request(struct xgene_dma_ring *ring,
710static void xgene_chan_xfer_ld_pending(struct xgene_dma_chan *chan) 700static void xgene_chan_xfer_ld_pending(struct xgene_dma_chan *chan)
711{ 701{
712 struct xgene_dma_desc_sw *desc_sw, *_desc_sw; 702 struct xgene_dma_desc_sw *desc_sw, *_desc_sw;
713 int ret;
714 703
715 /* 704 /*
716 * If the list of pending descriptors is empty, then we 705 * If the list of pending descriptors is empty, then we
@@ -735,18 +724,13 @@ static void xgene_chan_xfer_ld_pending(struct xgene_dma_chan *chan)
735 if (chan->pending >= chan->max_outstanding) 724 if (chan->pending >= chan->max_outstanding)
736 return; 725 return;
737 726
738 ret = xgene_chan_xfer_request(&chan->tx_ring, desc_sw); 727 xgene_chan_xfer_request(chan, desc_sw);
739 if (ret)
740 return;
741 728
742 /* 729 /*
743 * Delete this element from ld pending queue and append it to 730 * Delete this element from ld pending queue and append it to
744 * ld running queue 731 * ld running queue
745 */ 732 */
746 list_move_tail(&desc_sw->node, &chan->ld_running); 733 list_move_tail(&desc_sw->node, &chan->ld_running);
747
748 /* Increment the pending transaction count */
749 chan->pending++;
750 } 734 }
751} 735}
752 736
@@ -821,7 +805,8 @@ static void xgene_dma_cleanup_descriptors(struct xgene_dma_chan *chan)
821 * Decrement the pending transaction count 805 * Decrement the pending transaction count
822 * as we have processed one 806 * as we have processed one
823 */ 807 */
824 chan->pending--; 808 chan->pending -= ((desc_sw->flags &
809 XGENE_DMA_FLAG_64B_DESC) ? 2 : 1);
825 810
826 /* 811 /*
827 * Delete this node from ld running queue and append it to 812 * Delete this node from ld running queue and append it to
@@ -1421,15 +1406,18 @@ static int xgene_dma_create_ring_one(struct xgene_dma_chan *chan,
1421 struct xgene_dma_ring *ring, 1406 struct xgene_dma_ring *ring,
1422 enum xgene_dma_ring_cfgsize cfgsize) 1407 enum xgene_dma_ring_cfgsize cfgsize)
1423{ 1408{
1409 int ret;
1410
1424 /* Setup DMA ring descriptor variables */ 1411 /* Setup DMA ring descriptor variables */
1425 ring->pdma = chan->pdma; 1412 ring->pdma = chan->pdma;
1426 ring->cfgsize = cfgsize; 1413 ring->cfgsize = cfgsize;
1427 ring->num = chan->pdma->ring_num++; 1414 ring->num = chan->pdma->ring_num++;
1428 ring->id = XGENE_DMA_RING_ID_GET(ring->owner, ring->buf_num); 1415 ring->id = XGENE_DMA_RING_ID_GET(ring->owner, ring->buf_num);
1429 1416
1430 ring->size = xgene_dma_get_ring_size(chan, cfgsize); 1417 ret = xgene_dma_get_ring_size(chan, cfgsize);
1431 if (ring->size <= 0) 1418 if (ret <= 0)
1432 return ring->size; 1419 return ret;
1420 ring->size = ret;
1433 1421
1434 /* Allocate memory for DMA ring descriptor */ 1422 /* Allocate memory for DMA ring descriptor */
1435 ring->desc_vaddr = dma_zalloc_coherent(chan->dev, ring->size, 1423 ring->desc_vaddr = dma_zalloc_coherent(chan->dev, ring->size,
@@ -1482,7 +1470,7 @@ static int xgene_dma_create_chan_rings(struct xgene_dma_chan *chan)
1482 tx_ring->id, tx_ring->num, tx_ring->desc_vaddr); 1470 tx_ring->id, tx_ring->num, tx_ring->desc_vaddr);
1483 1471
1484 /* Set the max outstanding request possible to this channel */ 1472 /* Set the max outstanding request possible to this channel */
1485 chan->max_outstanding = rx_ring->slots; 1473 chan->max_outstanding = tx_ring->slots;
1486 1474
1487 return ret; 1475 return ret;
1488} 1476}
diff --git a/drivers/dma/zx296702_dma.c b/drivers/dma/zx296702_dma.c
index 39915a6b7986..c017fcd8e07c 100644
--- a/drivers/dma/zx296702_dma.c
+++ b/drivers/dma/zx296702_dma.c
@@ -739,7 +739,7 @@ static struct dma_chan *zx_of_dma_simple_xlate(struct of_phandle_args *dma_spec,
739 struct dma_chan *chan; 739 struct dma_chan *chan;
740 struct zx_dma_chan *c; 740 struct zx_dma_chan *c;
741 741
742 if (request > d->dma_requests) 742 if (request >= d->dma_requests)
743 return NULL; 743 return NULL;
744 744
745 chan = dma_get_any_slave_channel(&d->slave); 745 chan = dma_get_any_slave_channel(&d->slave);
diff --git a/drivers/extcon/extcon.c b/drivers/extcon/extcon.c
index a07addde297b..8dd0af1d50bc 100644
--- a/drivers/extcon/extcon.c
+++ b/drivers/extcon/extcon.c
@@ -159,7 +159,7 @@ static int find_cable_index_by_name(struct extcon_dev *edev, const char *name)
159static bool is_extcon_changed(u32 prev, u32 new, int idx, bool *attached) 159static bool is_extcon_changed(u32 prev, u32 new, int idx, bool *attached)
160{ 160{
161 if (((prev >> idx) & 0x1) != ((new >> idx) & 0x1)) { 161 if (((prev >> idx) & 0x1) != ((new >> idx) & 0x1)) {
162 *attached = new ? true : false; 162 *attached = ((new >> idx) & 0x1) ? true : false;
163 return true; 163 return true;
164 } 164 }
165 165
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
index d8de6a8dd4de..665efca59487 100644
--- a/drivers/firmware/Kconfig
+++ b/drivers/firmware/Kconfig
@@ -139,6 +139,14 @@ config QCOM_SCM
139 bool 139 bool
140 depends on ARM || ARM64 140 depends on ARM || ARM64
141 141
142config QCOM_SCM_32
143 def_bool y
144 depends on QCOM_SCM && ARM
145
146config QCOM_SCM_64
147 def_bool y
148 depends on QCOM_SCM && ARM64
149
142source "drivers/firmware/broadcom/Kconfig" 150source "drivers/firmware/broadcom/Kconfig"
143source "drivers/firmware/google/Kconfig" 151source "drivers/firmware/google/Kconfig"
144source "drivers/firmware/efi/Kconfig" 152source "drivers/firmware/efi/Kconfig"
diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
index 000830fc6707..2ee83474a3c1 100644
--- a/drivers/firmware/Makefile
+++ b/drivers/firmware/Makefile
@@ -13,7 +13,8 @@ obj-$(CONFIG_ISCSI_IBFT_FIND) += iscsi_ibft_find.o
13obj-$(CONFIG_ISCSI_IBFT) += iscsi_ibft.o 13obj-$(CONFIG_ISCSI_IBFT) += iscsi_ibft.o
14obj-$(CONFIG_FIRMWARE_MEMMAP) += memmap.o 14obj-$(CONFIG_FIRMWARE_MEMMAP) += memmap.o
15obj-$(CONFIG_QCOM_SCM) += qcom_scm.o 15obj-$(CONFIG_QCOM_SCM) += qcom_scm.o
16obj-$(CONFIG_QCOM_SCM) += qcom_scm-32.o 16obj-$(CONFIG_QCOM_SCM_64) += qcom_scm-64.o
17obj-$(CONFIG_QCOM_SCM_32) += qcom_scm-32.o
17CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) 18CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
18 19
19obj-y += broadcom/ 20obj-y += broadcom/
diff --git a/drivers/firmware/efi/libstub/arm-stub.c b/drivers/firmware/efi/libstub/arm-stub.c
index e29560e6b40b..950c87f5d279 100644
--- a/drivers/firmware/efi/libstub/arm-stub.c
+++ b/drivers/firmware/efi/libstub/arm-stub.c
@@ -13,6 +13,7 @@
13 */ 13 */
14 14
15#include <linux/efi.h> 15#include <linux/efi.h>
16#include <linux/sort.h>
16#include <asm/efi.h> 17#include <asm/efi.h>
17 18
18#include "efistub.h" 19#include "efistub.h"
@@ -305,6 +306,44 @@ fail:
305 */ 306 */
306#define EFI_RT_VIRTUAL_BASE 0x40000000 307#define EFI_RT_VIRTUAL_BASE 0x40000000
307 308
309static int cmp_mem_desc(const void *l, const void *r)
310{
311 const efi_memory_desc_t *left = l, *right = r;
312
313 return (left->phys_addr > right->phys_addr) ? 1 : -1;
314}
315
316/*
317 * Returns whether region @left ends exactly where region @right starts,
318 * or false if either argument is NULL.
319 */
320static bool regions_are_adjacent(efi_memory_desc_t *left,
321 efi_memory_desc_t *right)
322{
323 u64 left_end;
324
325 if (left == NULL || right == NULL)
326 return false;
327
328 left_end = left->phys_addr + left->num_pages * EFI_PAGE_SIZE;
329
330 return left_end == right->phys_addr;
331}
332
333/*
334 * Returns whether region @left and region @right have compatible memory type
335 * mapping attributes, and are both EFI_MEMORY_RUNTIME regions.
336 */
337static bool regions_have_compatible_memory_type_attrs(efi_memory_desc_t *left,
338 efi_memory_desc_t *right)
339{
340 static const u64 mem_type_mask = EFI_MEMORY_WB | EFI_MEMORY_WT |
341 EFI_MEMORY_WC | EFI_MEMORY_UC |
342 EFI_MEMORY_RUNTIME;
343
344 return ((left->attribute ^ right->attribute) & mem_type_mask) == 0;
345}
346
308/* 347/*
309 * efi_get_virtmap() - create a virtual mapping for the EFI memory map 348 * efi_get_virtmap() - create a virtual mapping for the EFI memory map
310 * 349 *
@@ -317,33 +356,52 @@ void efi_get_virtmap(efi_memory_desc_t *memory_map, unsigned long map_size,
317 int *count) 356 int *count)
318{ 357{
319 u64 efi_virt_base = EFI_RT_VIRTUAL_BASE; 358 u64 efi_virt_base = EFI_RT_VIRTUAL_BASE;
320 efi_memory_desc_t *out = runtime_map; 359 efi_memory_desc_t *in, *prev = NULL, *out = runtime_map;
321 int l; 360 int l;
322 361
323 for (l = 0; l < map_size; l += desc_size) { 362 /*
324 efi_memory_desc_t *in = (void *)memory_map + l; 363 * To work around potential issues with the Properties Table feature
364 * introduced in UEFI 2.5, which may split PE/COFF executable images
365 * in memory into several RuntimeServicesCode and RuntimeServicesData
366 * regions, we need to preserve the relative offsets between adjacent
367 * EFI_MEMORY_RUNTIME regions with the same memory type attributes.
368 * The easiest way to find adjacent regions is to sort the memory map
369 * before traversing it.
370 */
371 sort(memory_map, map_size / desc_size, desc_size, cmp_mem_desc, NULL);
372
373 for (l = 0; l < map_size; l += desc_size, prev = in) {
325 u64 paddr, size; 374 u64 paddr, size;
326 375
376 in = (void *)memory_map + l;
327 if (!(in->attribute & EFI_MEMORY_RUNTIME)) 377 if (!(in->attribute & EFI_MEMORY_RUNTIME))
328 continue; 378 continue;
329 379
380 paddr = in->phys_addr;
381 size = in->num_pages * EFI_PAGE_SIZE;
382
330 /* 383 /*
331 * Make the mapping compatible with 64k pages: this allows 384 * Make the mapping compatible with 64k pages: this allows
332 * a 4k page size kernel to kexec a 64k page size kernel and 385 * a 4k page size kernel to kexec a 64k page size kernel and
333 * vice versa. 386 * vice versa.
334 */ 387 */
335 paddr = round_down(in->phys_addr, SZ_64K); 388 if (!regions_are_adjacent(prev, in) ||
336 size = round_up(in->num_pages * EFI_PAGE_SIZE + 389 !regions_have_compatible_memory_type_attrs(prev, in)) {
337 in->phys_addr - paddr, SZ_64K); 390
338 391 paddr = round_down(in->phys_addr, SZ_64K);
339 /* 392 size += in->phys_addr - paddr;
340 * Avoid wasting memory on PTEs by choosing a virtual base that 393
341 * is compatible with section mappings if this region has the 394 /*
342 * appropriate size and physical alignment. (Sections are 2 MB 395 * Avoid wasting memory on PTEs by choosing a virtual
343 * on 4k granule kernels) 396 * base that is compatible with section mappings if this
344 */ 397 * region has the appropriate size and physical
345 if (IS_ALIGNED(in->phys_addr, SZ_2M) && size >= SZ_2M) 398 * alignment. (Sections are 2 MB on 4k granule kernels)
346 efi_virt_base = round_up(efi_virt_base, SZ_2M); 399 */
400 if (IS_ALIGNED(in->phys_addr, SZ_2M) && size >= SZ_2M)
401 efi_virt_base = round_up(efi_virt_base, SZ_2M);
402 else
403 efi_virt_base = round_up(efi_virt_base, SZ_64K);
404 }
347 405
348 in->virt_addr = efi_virt_base + in->phys_addr - paddr; 406 in->virt_addr = efi_virt_base + in->phys_addr - paddr;
349 efi_virt_base += size; 407 efi_virt_base += size;
diff --git a/drivers/firmware/efi/libstub/efistub.h b/drivers/firmware/efi/libstub/efistub.h
index e334a01cf92f..6b6548fda089 100644
--- a/drivers/firmware/efi/libstub/efistub.h
+++ b/drivers/firmware/efi/libstub/efistub.h
@@ -5,10 +5,6 @@
5/* error code which can't be mistaken for valid address */ 5/* error code which can't be mistaken for valid address */
6#define EFI_ERROR (~0UL) 6#define EFI_ERROR (~0UL)
7 7
8#undef memcpy
9#undef memset
10#undef memmove
11
12void efi_char16_printk(efi_system_table_t *, efi_char16_t *); 8void efi_char16_printk(efi_system_table_t *, efi_char16_t *);
13 9
14efi_status_t efi_open_volume(efi_system_table_t *sys_table_arg, void *__image, 10efi_status_t efi_open_volume(efi_system_table_t *sys_table_arg, void *__image,
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
new file mode 100644
index 000000000000..bb6555f6d63b
--- /dev/null
+++ b/drivers/firmware/qcom_scm-64.c
@@ -0,0 +1,63 @@
1/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/io.h>
14#include <linux/errno.h>
15#include <linux/qcom_scm.h>
16
17/**
18 * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
19 * @entry: Entry point function for the cpus
20 * @cpus: The cpumask of cpus that will use the entry point
21 *
22 * Set the cold boot address of the cpus. Any cpu outside the supported
23 * range would be removed from the cpu present mask.
24 */
25int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
26{
27 return -ENOTSUPP;
28}
29
30/**
31 * qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
32 * @entry: Entry point function for the cpus
33 * @cpus: The cpumask of cpus that will use the entry point
34 *
35 * Set the Linux entry point for the SCM to transfer control to when coming
36 * out of a power down. CPU power down may be executed on cpuidle or hotplug.
37 */
38int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
39{
40 return -ENOTSUPP;
41}
42
43/**
44 * qcom_scm_cpu_power_down() - Power down the cpu
45 * @flags - Flags to flush cache
46 *
47 * This is an end point to power down cpu. If there was a pending interrupt,
48 * the control would return from this function, otherwise, the cpu jumps to the
49 * warm boot entry point set for this cpu upon reset.
50 */
51void __qcom_scm_cpu_power_down(u32 flags)
52{
53}
54
55int __qcom_scm_is_call_available(u32 svc_id, u32 cmd_id)
56{
57 return -ENOTSUPP;
58}
59
60int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
61{
62 return -ENOTSUPP;
63}
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index b4fc9e4d24c6..8949b3f6f74d 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -356,7 +356,7 @@ config GPIO_PXA
356 356
357config GPIO_RCAR 357config GPIO_RCAR
358 tristate "Renesas R-Car GPIO" 358 tristate "Renesas R-Car GPIO"
359 depends on ARM && (ARCH_SHMOBILE || COMPILE_TEST) 359 depends on ARCH_SHMOBILE || COMPILE_TEST
360 select GPIOLIB_IRQCHIP 360 select GPIOLIB_IRQCHIP
361 help 361 help
362 Say yes here to support GPIO on Renesas R-Car SoCs. 362 Say yes here to support GPIO on Renesas R-Car SoCs.
diff --git a/drivers/gpio/gpio-altera.c b/drivers/gpio/gpio-altera.c
index 9b7e0b3db387..1b44941574fa 100644
--- a/drivers/gpio/gpio-altera.c
+++ b/drivers/gpio/gpio-altera.c
@@ -201,8 +201,7 @@ static int altera_gpio_direction_output(struct gpio_chip *gc,
201 return 0; 201 return 0;
202} 202}
203 203
204static void altera_gpio_irq_edge_handler(unsigned int irq, 204static void altera_gpio_irq_edge_handler(struct irq_desc *desc)
205 struct irq_desc *desc)
206{ 205{
207 struct altera_gpio_chip *altera_gc; 206 struct altera_gpio_chip *altera_gc;
208 struct irq_chip *chip; 207 struct irq_chip *chip;
@@ -231,8 +230,7 @@ static void altera_gpio_irq_edge_handler(unsigned int irq,
231} 230}
232 231
233 232
234static void altera_gpio_irq_leveL_high_handler(unsigned int irq, 233static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc)
235 struct irq_desc *desc)
236{ 234{
237 struct altera_gpio_chip *altera_gc; 235 struct altera_gpio_chip *altera_gc;
238 struct irq_chip *chip; 236 struct irq_chip *chip;
diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c
index 31b90ac15204..33a1f9779b86 100644
--- a/drivers/gpio/gpio-bcm-kona.c
+++ b/drivers/gpio/gpio-bcm-kona.c
@@ -433,7 +433,7 @@ static int bcm_kona_gpio_irq_set_type(struct irq_data *d, unsigned int type)
433 return 0; 433 return 0;
434} 434}
435 435
436static void bcm_kona_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 436static void bcm_kona_gpio_irq_handler(struct irq_desc *desc)
437{ 437{
438 void __iomem *reg_base; 438 void __iomem *reg_base;
439 int bit, bank_id; 439 int bit, bank_id;
diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c
index 9ea86d2ac054..4c64627c6bb5 100644
--- a/drivers/gpio/gpio-brcmstb.c
+++ b/drivers/gpio/gpio-brcmstb.c
@@ -236,7 +236,7 @@ static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank)
236} 236}
237 237
238/* Each UPG GIO block has one IRQ for all banks */ 238/* Each UPG GIO block has one IRQ for all banks */
239static void brcmstb_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 239static void brcmstb_gpio_irq_handler(struct irq_desc *desc)
240{ 240{
241 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 241 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
242 struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc); 242 struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc);
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index 94b0ab709721..5e715388803d 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -326,8 +326,7 @@ static struct irq_chip gpio_irqchip = {
326 .flags = IRQCHIP_SET_TYPE_MASKED, 326 .flags = IRQCHIP_SET_TYPE_MASKED,
327}; 327};
328 328
329static void 329static void gpio_irq_handler(struct irq_desc *desc)
330gpio_irq_handler(unsigned __irq, struct irq_desc *desc)
331{ 330{
332 unsigned int irq = irq_desc_get_irq(desc); 331 unsigned int irq = irq_desc_get_irq(desc);
333 struct davinci_gpio_regs __iomem *g; 332 struct davinci_gpio_regs __iomem *g;
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index c5be4b9b8baf..fcd5b0acfc72 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -147,7 +147,7 @@ static u32 dwapb_do_irq(struct dwapb_gpio *gpio)
147 return ret; 147 return ret;
148} 148}
149 149
150static void dwapb_irq_handler(u32 irq, struct irq_desc *desc) 150static void dwapb_irq_handler(struct irq_desc *desc)
151{ 151{
152 struct dwapb_gpio *gpio = irq_desc_get_handler_data(desc); 152 struct dwapb_gpio *gpio = irq_desc_get_handler_data(desc);
153 struct irq_chip *chip = irq_desc_get_chip(desc); 153 struct irq_chip *chip = irq_desc_get_chip(desc);
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c
index 9d90366ea259..3e3947b35c83 100644
--- a/drivers/gpio/gpio-ep93xx.c
+++ b/drivers/gpio/gpio-ep93xx.c
@@ -78,7 +78,7 @@ static void ep93xx_gpio_int_debounce(unsigned int irq, bool enable)
78 EP93XX_GPIO_REG(int_debounce_register_offset[port])); 78 EP93XX_GPIO_REG(int_debounce_register_offset[port]));
79} 79}
80 80
81static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) 81static void ep93xx_gpio_ab_irq_handler(struct irq_desc *desc)
82{ 82{
83 unsigned char status; 83 unsigned char status;
84 int i; 84 int i;
@@ -100,8 +100,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
100 } 100 }
101} 101}
102 102
103static void ep93xx_gpio_f_irq_handler(unsigned int __irq, 103static void ep93xx_gpio_f_irq_handler(struct irq_desc *desc)
104 struct irq_desc *desc)
105{ 104{
106 /* 105 /*
107 * map discontiguous hw irq range to continuous sw irq range: 106 * map discontiguous hw irq range to continuous sw irq range:
diff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c
index aa28c65eb6b4..70097472b02c 100644
--- a/drivers/gpio/gpio-intel-mid.c
+++ b/drivers/gpio/gpio-intel-mid.c
@@ -301,7 +301,7 @@ static const struct pci_device_id intel_gpio_ids[] = {
301}; 301};
302MODULE_DEVICE_TABLE(pci, intel_gpio_ids); 302MODULE_DEVICE_TABLE(pci, intel_gpio_ids);
303 303
304static void intel_mid_irq_handler(unsigned irq, struct irq_desc *desc) 304static void intel_mid_irq_handler(struct irq_desc *desc)
305{ 305{
306 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 306 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
307 struct intel_mid_gpio *priv = to_intel_gpio_priv(gc); 307 struct intel_mid_gpio *priv = to_intel_gpio_priv(gc);
diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c
index 153af464c7a7..127c37b380ae 100644
--- a/drivers/gpio/gpio-lynxpoint.c
+++ b/drivers/gpio/gpio-lynxpoint.c
@@ -234,7 +234,7 @@ static int lp_gpio_direction_output(struct gpio_chip *chip,
234 return 0; 234 return 0;
235} 235}
236 236
237static void lp_gpio_irq_handler(unsigned hwirq, struct irq_desc *desc) 237static void lp_gpio_irq_handler(struct irq_desc *desc)
238{ 238{
239 struct irq_data *data = irq_desc_get_irq_data(desc); 239 struct irq_data *data = irq_desc_get_irq_data(desc);
240 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 240 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 8ef7a12de983..48ef368347ab 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -194,7 +194,7 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
194 return -ENXIO; 194 return -ENXIO;
195} 195}
196 196
197static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc) 197static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
198{ 198{
199 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc); 199 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
200 struct irq_chip *chip = irq_desc_get_chip(desc); 200 struct irq_chip *chip = irq_desc_get_chip(desc);
diff --git a/drivers/gpio/gpio-msic.c b/drivers/gpio/gpio-msic.c
index 7bcfb87a5fa6..22523aae8abe 100644
--- a/drivers/gpio/gpio-msic.c
+++ b/drivers/gpio/gpio-msic.c
@@ -232,7 +232,7 @@ static struct irq_chip msic_irqchip = {
232 .irq_bus_sync_unlock = msic_bus_sync_unlock, 232 .irq_bus_sync_unlock = msic_bus_sync_unlock,
233}; 233};
234 234
235static void msic_gpio_irq_handler(unsigned irq, struct irq_desc *desc) 235static void msic_gpio_irq_handler(struct irq_desc *desc)
236{ 236{
237 struct irq_data *data = irq_desc_get_irq_data(desc); 237 struct irq_data *data = irq_desc_get_irq_data(desc);
238 struct msic_gpio *mg = irq_data_get_irq_handler_data(data); 238 struct msic_gpio *mg = irq_data_get_irq_handler_data(data);
diff --git a/drivers/gpio/gpio-msm-v2.c b/drivers/gpio/gpio-msm-v2.c
index d2012cfb5571..4b4222145f10 100644
--- a/drivers/gpio/gpio-msm-v2.c
+++ b/drivers/gpio/gpio-msm-v2.c
@@ -305,7 +305,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
305 * which have been set as summary IRQ lines and which are triggered, 305 * which have been set as summary IRQ lines and which are triggered,
306 * and to call their interrupt handlers. 306 * and to call their interrupt handlers.
307 */ 307 */
308static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) 308static void msm_summary_irq_handler(struct irq_desc *desc)
309{ 309{
310 unsigned long i; 310 unsigned long i;
311 struct irq_chip *chip = irq_desc_get_chip(desc); 311 struct irq_chip *chip = irq_desc_get_chip(desc);
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index b396bf3bf294..df418b81456d 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -458,7 +458,7 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type)
458 return 0; 458 return 0;
459} 459}
460 460
461static void mvebu_gpio_irq_handler(unsigned int __irq, struct irq_desc *desc) 461static void mvebu_gpio_irq_handler(struct irq_desc *desc)
462{ 462{
463 struct mvebu_gpio_chip *mvchip = irq_desc_get_handler_data(desc); 463 struct mvebu_gpio_chip *mvchip = irq_desc_get_handler_data(desc);
464 struct irq_chip *chip = irq_desc_get_chip(desc); 464 struct irq_chip *chip = irq_desc_get_chip(desc);
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index b752b560126e..b8dd847443c5 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -272,7 +272,7 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
272} 272}
273 273
274/* MX1 and MX3 has one interrupt *per* gpio port */ 274/* MX1 and MX3 has one interrupt *per* gpio port */
275static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) 275static void mx3_gpio_irq_handler(struct irq_desc *desc)
276{ 276{
277 u32 irq_stat; 277 u32 irq_stat;
278 struct mxc_gpio_port *port = irq_desc_get_handler_data(desc); 278 struct mxc_gpio_port *port = irq_desc_get_handler_data(desc);
@@ -288,7 +288,7 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
288} 288}
289 289
290/* MX2 has one interrupt *for all* gpio ports */ 290/* MX2 has one interrupt *for all* gpio ports */
291static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc) 291static void mx2_gpio_irq_handler(struct irq_desc *desc)
292{ 292{
293 u32 irq_msk, irq_stat; 293 u32 irq_msk, irq_stat;
294 struct mxc_gpio_port *port; 294 struct mxc_gpio_port *port;
@@ -339,13 +339,15 @@ static int gpio_set_wake_irq(struct irq_data *d, u32 enable)
339 return 0; 339 return 0;
340} 340}
341 341
342static void mxc_gpio_init_gc(struct mxc_gpio_port *port, int irq_base) 342static int mxc_gpio_init_gc(struct mxc_gpio_port *port, int irq_base)
343{ 343{
344 struct irq_chip_generic *gc; 344 struct irq_chip_generic *gc;
345 struct irq_chip_type *ct; 345 struct irq_chip_type *ct;
346 346
347 gc = irq_alloc_generic_chip("gpio-mxc", 1, irq_base, 347 gc = irq_alloc_generic_chip("gpio-mxc", 1, irq_base,
348 port->base, handle_level_irq); 348 port->base, handle_level_irq);
349 if (!gc)
350 return -ENOMEM;
349 gc->private = port; 351 gc->private = port;
350 352
351 ct = gc->chip_types; 353 ct = gc->chip_types;
@@ -360,6 +362,8 @@ static void mxc_gpio_init_gc(struct mxc_gpio_port *port, int irq_base)
360 362
361 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_NESTED_LOCK, 363 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_NESTED_LOCK,
362 IRQ_NOREQUEST, 0); 364 IRQ_NOREQUEST, 0);
365
366 return 0;
363} 367}
364 368
365static void mxc_gpio_get_hw(struct platform_device *pdev) 369static void mxc_gpio_get_hw(struct platform_device *pdev)
@@ -477,12 +481,16 @@ static int mxc_gpio_probe(struct platform_device *pdev)
477 } 481 }
478 482
479 /* gpio-mxc can be a generic irq chip */ 483 /* gpio-mxc can be a generic irq chip */
480 mxc_gpio_init_gc(port, irq_base); 484 err = mxc_gpio_init_gc(port, irq_base);
485 if (err < 0)
486 goto out_irqdomain_remove;
481 487
482 list_add_tail(&port->node, &mxc_gpio_ports); 488 list_add_tail(&port->node, &mxc_gpio_ports);
483 489
484 return 0; 490 return 0;
485 491
492out_irqdomain_remove:
493 irq_domain_remove(port->domain);
486out_irqdesc_free: 494out_irqdesc_free:
487 irq_free_descs(irq_base, 32); 495 irq_free_descs(irq_base, 32);
488out_gpiochip_remove: 496out_gpiochip_remove:
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index b7f383eb18d9..a4288f428819 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -154,7 +154,7 @@ static void mxs_flip_edge(struct mxs_gpio_port *port, u32 gpio)
154} 154}
155 155
156/* MXS has one interrupt *per* gpio port */ 156/* MXS has one interrupt *per* gpio port */
157static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) 157static void mxs_gpio_irq_handler(struct irq_desc *desc)
158{ 158{
159 u32 irq_stat; 159 u32 irq_stat;
160 struct mxs_gpio_port *port = irq_desc_get_handler_data(desc); 160 struct mxs_gpio_port *port = irq_desc_get_handler_data(desc);
@@ -196,13 +196,16 @@ static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable)
196 return 0; 196 return 0;
197} 197}
198 198
199static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port, int irq_base) 199static int __init mxs_gpio_init_gc(struct mxs_gpio_port *port, int irq_base)
200{ 200{
201 struct irq_chip_generic *gc; 201 struct irq_chip_generic *gc;
202 struct irq_chip_type *ct; 202 struct irq_chip_type *ct;
203 203
204 gc = irq_alloc_generic_chip("gpio-mxs", 1, irq_base, 204 gc = irq_alloc_generic_chip("gpio-mxs", 1, irq_base,
205 port->base, handle_level_irq); 205 port->base, handle_level_irq);
206 if (!gc)
207 return -ENOMEM;
208
206 gc->private = port; 209 gc->private = port;
207 210
208 ct = gc->chip_types; 211 ct = gc->chip_types;
@@ -216,6 +219,8 @@ static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port, int irq_base)
216 219
217 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_NESTED_LOCK, 220 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_NESTED_LOCK,
218 IRQ_NOREQUEST, 0); 221 IRQ_NOREQUEST, 0);
222
223 return 0;
219} 224}
220 225
221static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 226static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
@@ -317,7 +322,9 @@ static int mxs_gpio_probe(struct platform_device *pdev)
317 } 322 }
318 323
319 /* gpio-mxs can be a generic irq chip */ 324 /* gpio-mxs can be a generic irq chip */
320 mxs_gpio_init_gc(port, irq_base); 325 err = mxs_gpio_init_gc(port, irq_base);
326 if (err < 0)
327 goto out_irqdomain_remove;
321 328
322 /* setup one handler for each entry */ 329 /* setup one handler for each entry */
323 irq_set_chained_handler_and_data(port->irq, mxs_gpio_irq_handler, 330 irq_set_chained_handler_and_data(port->irq, mxs_gpio_irq_handler,
@@ -343,6 +350,8 @@ static int mxs_gpio_probe(struct platform_device *pdev)
343 350
344out_bgpio_remove: 351out_bgpio_remove:
345 bgpio_remove(&port->bgc); 352 bgpio_remove(&port->bgc);
353out_irqdomain_remove:
354 irq_domain_remove(port->domain);
346out_irqdesc_free: 355out_irqdesc_free:
347 irq_free_descs(irq_base, 32); 356 irq_free_descs(irq_base, 32);
348 return err; 357 return err;
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 2ae0d47e9554..5236db161e76 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -709,7 +709,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
709 * line's interrupt handler has been run, we may miss some nested 709 * line's interrupt handler has been run, we may miss some nested
710 * interrupts. 710 * interrupts.
711 */ 711 */
712static void omap_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 712static void omap_gpio_irq_handler(struct irq_desc *desc)
713{ 713{
714 void __iomem *isr_reg = NULL; 714 void __iomem *isr_reg = NULL;
715 u32 isr; 715 u32 isr;
@@ -1098,7 +1098,6 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc)
1098 } else { 1098 } else {
1099 bank->chip.label = "gpio"; 1099 bank->chip.label = "gpio";
1100 bank->chip.base = gpio; 1100 bank->chip.base = gpio;
1101 gpio += bank->width;
1102 } 1101 }
1103 bank->chip.ngpio = bank->width; 1102 bank->chip.ngpio = bank->width;
1104 1103
@@ -1108,6 +1107,9 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc)
1108 return ret; 1107 return ret;
1109 } 1108 }
1110 1109
1110 if (!bank->is_mpuio)
1111 gpio += bank->width;
1112
1111#ifdef CONFIG_ARCH_OMAP1 1113#ifdef CONFIG_ARCH_OMAP1
1112 /* 1114 /*
1113 * REVISIT: Once we have OMAP1 supporting SPARSE_IRQ, we can drop 1115 * REVISIT: Once we have OMAP1 supporting SPARSE_IRQ, we can drop
@@ -1253,8 +1255,11 @@ static int omap_gpio_probe(struct platform_device *pdev)
1253 omap_gpio_mod_init(bank); 1255 omap_gpio_mod_init(bank);
1254 1256
1255 ret = omap_gpio_chip_init(bank, irqc); 1257 ret = omap_gpio_chip_init(bank, irqc);
1256 if (ret) 1258 if (ret) {
1259 pm_runtime_put_sync(bank->dev);
1260 pm_runtime_disable(bank->dev);
1257 return ret; 1261 return ret;
1262 }
1258 1263
1259 omap_gpio_show_rev(bank); 1264 omap_gpio_show_rev(bank);
1260 1265
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index 04756130437f..229ef653e0f8 100644
--- a/drivers/gpio/gpio-pl061.c
+++ b/drivers/gpio/gpio-pl061.c
@@ -187,7 +187,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
187 return 0; 187 return 0;
188} 188}
189 189
190static void pl061_irq_handler(unsigned irq, struct irq_desc *desc) 190static void pl061_irq_handler(struct irq_desc *desc)
191{ 191{
192 unsigned long pending; 192 unsigned long pending;
193 int offset; 193 int offset;
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 55a11de3d5b7..df2ce550f309 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -401,7 +401,7 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
401 return 0; 401 return 0;
402} 402}
403 403
404static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc) 404static void pxa_gpio_demux_handler(struct irq_desc *desc)
405{ 405{
406 struct pxa_gpio_chip *c; 406 struct pxa_gpio_chip *c;
407 int loop, gpio, gpio_base, n; 407 int loop, gpio, gpio_base, n;
diff --git a/drivers/gpio/gpio-sa1100.c b/drivers/gpio/gpio-sa1100.c
index 67bd2f5d89e8..990fa9023e22 100644
--- a/drivers/gpio/gpio-sa1100.c
+++ b/drivers/gpio/gpio-sa1100.c
@@ -172,8 +172,7 @@ static struct irq_domain *sa1100_gpio_irqdomain;
172 * irq_controller_lock held, and IRQs disabled. Decode the IRQ 172 * irq_controller_lock held, and IRQs disabled. Decode the IRQ
173 * and call the handler. 173 * and call the handler.
174 */ 174 */
175static void 175static void sa1100_gpio_handler(struct irq_desc *desc)
176sa1100_gpio_handler(unsigned int __irq, struct irq_desc *desc)
177{ 176{
178 unsigned int irq, mask; 177 unsigned int irq, mask;
179 178
diff --git a/drivers/gpio/gpio-sx150x.c b/drivers/gpio/gpio-sx150x.c
index 458d9d7952b8..9c6b96707c9f 100644
--- a/drivers/gpio/gpio-sx150x.c
+++ b/drivers/gpio/gpio-sx150x.c
@@ -706,4 +706,3 @@ module_exit(sx150x_exit);
706MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>"); 706MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
707MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders"); 707MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
708MODULE_LICENSE("GPL v2"); 708MODULE_LICENSE("GPL v2");
709MODULE_ALIAS("i2c:sx150x");
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 9b14aafb576d..027e5f47dd28 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -266,7 +266,7 @@ static void tegra_gpio_irq_shutdown(struct irq_data *d)
266 gpiochip_unlock_as_irq(&tegra_gpio_chip, gpio); 266 gpiochip_unlock_as_irq(&tegra_gpio_chip, gpio);
267} 267}
268 268
269static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 269static void tegra_gpio_irq_handler(struct irq_desc *desc)
270{ 270{
271 int port; 271 int port;
272 int pin; 272 int pin;
diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c
index 5a492054589f..30653e6319e9 100644
--- a/drivers/gpio/gpio-timberdale.c
+++ b/drivers/gpio/gpio-timberdale.c
@@ -192,7 +192,7 @@ out:
192 return ret; 192 return ret;
193} 193}
194 194
195static void timbgpio_irq(unsigned int irq, struct irq_desc *desc) 195static void timbgpio_irq(struct irq_desc *desc)
196{ 196{
197 struct timbgpio *tgpio = irq_desc_get_handler_data(desc); 197 struct timbgpio *tgpio = irq_desc_get_handler_data(desc);
198 struct irq_data *data = irq_desc_get_irq_data(desc); 198 struct irq_data *data = irq_desc_get_irq_data(desc);
diff --git a/drivers/gpio/gpio-tz1090.c b/drivers/gpio/gpio-tz1090.c
index bbac92ae4c32..87bb1b1eee8d 100644
--- a/drivers/gpio/gpio-tz1090.c
+++ b/drivers/gpio/gpio-tz1090.c
@@ -375,7 +375,7 @@ static int gpio_set_irq_wake(struct irq_data *data, unsigned int on)
375#define gpio_set_irq_wake NULL 375#define gpio_set_irq_wake NULL
376#endif 376#endif
377 377
378static void tz1090_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 378static void tz1090_gpio_irq_handler(struct irq_desc *desc)
379{ 379{
380 irq_hw_number_t hw; 380 irq_hw_number_t hw;
381 unsigned int irq_stat, irq_no; 381 unsigned int irq_stat, irq_no;
@@ -400,7 +400,7 @@ static void tz1090_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
400 == IRQ_TYPE_EDGE_BOTH) 400 == IRQ_TYPE_EDGE_BOTH)
401 tz1090_gpio_irq_next_edge(bank, hw); 401 tz1090_gpio_irq_next_edge(bank, hw);
402 402
403 generic_handle_irq_desc(irq_no, child_desc); 403 generic_handle_irq_desc(child_desc);
404 } 404 }
405} 405}
406 406
diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
index 3d5714d4f405..069f9e4b7daa 100644
--- a/drivers/gpio/gpio-vf610.c
+++ b/drivers/gpio/gpio-vf610.c
@@ -120,7 +120,7 @@ static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
120 return pinctrl_gpio_direction_output(chip->base + gpio); 120 return pinctrl_gpio_direction_output(chip->base + gpio);
121} 121}
122 122
123static void vf610_gpio_irq_handler(u32 irq, struct irq_desc *desc) 123static void vf610_gpio_irq_handler(struct irq_desc *desc)
124{ 124{
125 struct vf610_gpio_port *port = irq_desc_get_handler_data(desc); 125 struct vf610_gpio_port *port = irq_desc_get_handler_data(desc);
126 struct irq_chip *chip = irq_desc_get_chip(desc); 126 struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -176,9 +176,9 @@ static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type)
176 port->irqc[d->hwirq] = irqc; 176 port->irqc[d->hwirq] = irqc;
177 177
178 if (type & IRQ_TYPE_LEVEL_MASK) 178 if (type & IRQ_TYPE_LEVEL_MASK)
179 __irq_set_handler_locked(d->irq, handle_level_irq); 179 irq_set_handler_locked(d, handle_level_irq);
180 else 180 else
181 __irq_set_handler_locked(d->irq, handle_edge_irq); 181 irq_set_handler_locked(d, handle_edge_irq);
182 182
183 return 0; 183 return 0;
184} 184}
diff --git a/drivers/gpio/gpio-zx.c b/drivers/gpio/gpio-zx.c
index 12ee1969298c..4b8a26910705 100644
--- a/drivers/gpio/gpio-zx.c
+++ b/drivers/gpio/gpio-zx.c
@@ -177,7 +177,7 @@ static int zx_irq_type(struct irq_data *d, unsigned trigger)
177 return 0; 177 return 0;
178} 178}
179 179
180static void zx_irq_handler(unsigned irq, struct irq_desc *desc) 180static void zx_irq_handler(struct irq_desc *desc)
181{ 181{
182 unsigned long pending; 182 unsigned long pending;
183 int offset; 183 int offset;
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
index 27348e7cb705..1d1a5865ede9 100644
--- a/drivers/gpio/gpio-zynq.c
+++ b/drivers/gpio/gpio-zynq.c
@@ -514,7 +514,7 @@ static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio,
514 * application for that pin. 514 * application for that pin.
515 * Note: A bug is reported if no handler is set for the gpio pin. 515 * Note: A bug is reported if no handler is set for the gpio pin.
516 */ 516 */
517static void zynq_gpio_irqhandler(unsigned int irq, struct irq_desc *desc) 517static void zynq_gpio_irqhandler(struct irq_desc *desc)
518{ 518{
519 u32 int_sts, int_enb; 519 u32 int_sts, int_enb;
520 unsigned int bank_num; 520 unsigned int bank_num;
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 980c1f87866a..5db3445552b1 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1174,15 +1174,16 @@ EXPORT_SYMBOL_GPL(gpiod_is_active_low);
1174 * that the GPIO was actually requested. 1174 * that the GPIO was actually requested.
1175 */ 1175 */
1176 1176
1177static bool _gpiod_get_raw_value(const struct gpio_desc *desc) 1177static int _gpiod_get_raw_value(const struct gpio_desc *desc)
1178{ 1178{
1179 struct gpio_chip *chip; 1179 struct gpio_chip *chip;
1180 bool value;
1181 int offset; 1180 int offset;
1181 int value;
1182 1182
1183 chip = desc->chip; 1183 chip = desc->chip;
1184 offset = gpio_chip_hwgpio(desc); 1184 offset = gpio_chip_hwgpio(desc);
1185 value = chip->get ? chip->get(chip, offset) : false; 1185 value = chip->get ? chip->get(chip, offset) : -EIO;
1186 value = value < 0 ? value : !!value;
1186 trace_gpio_value(desc_to_gpio(desc), 1, value); 1187 trace_gpio_value(desc_to_gpio(desc), 1, value);
1187 return value; 1188 return value;
1188} 1189}
@@ -1192,7 +1193,7 @@ static bool _gpiod_get_raw_value(const struct gpio_desc *desc)
1192 * @desc: gpio whose value will be returned 1193 * @desc: gpio whose value will be returned
1193 * 1194 *
1194 * Return the GPIO's raw value, i.e. the value of the physical line disregarding 1195 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
1195 * its ACTIVE_LOW status. 1196 * its ACTIVE_LOW status, or negative errno on failure.
1196 * 1197 *
1197 * This function should be called from contexts where we cannot sleep, and will 1198 * This function should be called from contexts where we cannot sleep, and will
1198 * complain if the GPIO chip functions potentially sleep. 1199 * complain if the GPIO chip functions potentially sleep.
@@ -1212,7 +1213,7 @@ EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
1212 * @desc: gpio whose value will be returned 1213 * @desc: gpio whose value will be returned
1213 * 1214 *
1214 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into 1215 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
1215 * account. 1216 * account, or negative errno on failure.
1216 * 1217 *
1217 * This function should be called from contexts where we cannot sleep, and will 1218 * This function should be called from contexts where we cannot sleep, and will
1218 * complain if the GPIO chip functions potentially sleep. 1219 * complain if the GPIO chip functions potentially sleep.
@@ -1226,6 +1227,9 @@ int gpiod_get_value(const struct gpio_desc *desc)
1226 WARN_ON(desc->chip->can_sleep); 1227 WARN_ON(desc->chip->can_sleep);
1227 1228
1228 value = _gpiod_get_raw_value(desc); 1229 value = _gpiod_get_raw_value(desc);
1230 if (value < 0)
1231 return value;
1232
1229 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) 1233 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
1230 value = !value; 1234 value = !value;
1231 1235
@@ -1548,7 +1552,7 @@ EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
1548 * @desc: gpio whose value will be returned 1552 * @desc: gpio whose value will be returned
1549 * 1553 *
1550 * Return the GPIO's raw value, i.e. the value of the physical line disregarding 1554 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
1551 * its ACTIVE_LOW status. 1555 * its ACTIVE_LOW status, or negative errno on failure.
1552 * 1556 *
1553 * This function is to be called from contexts that can sleep. 1557 * This function is to be called from contexts that can sleep.
1554 */ 1558 */
@@ -1566,7 +1570,7 @@ EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
1566 * @desc: gpio whose value will be returned 1570 * @desc: gpio whose value will be returned
1567 * 1571 *
1568 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into 1572 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
1569 * account. 1573 * account, or negative errno on failure.
1570 * 1574 *
1571 * This function is to be called from contexts that can sleep. 1575 * This function is to be called from contexts that can sleep.
1572 */ 1576 */
@@ -1579,6 +1583,9 @@ int gpiod_get_value_cansleep(const struct gpio_desc *desc)
1579 return 0; 1583 return 0;
1580 1584
1581 value = _gpiod_get_raw_value(desc); 1585 value = _gpiod_get_raw_value(desc);
1586 if (value < 0)
1587 return value;
1588
1582 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) 1589 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
1583 value = !value; 1590 value = !value;
1584 1591
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 668939a14206..6647fb26ef25 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -82,6 +82,7 @@ extern int amdgpu_vm_block_size;
82extern int amdgpu_enable_scheduler; 82extern int amdgpu_enable_scheduler;
83extern int amdgpu_sched_jobs; 83extern int amdgpu_sched_jobs;
84extern int amdgpu_sched_hw_submission; 84extern int amdgpu_sched_hw_submission;
85extern int amdgpu_enable_semaphores;
85 86
86#define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000 87#define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000
87#define AMDGPU_MAX_USEC_TIMEOUT 100000 /* 100 ms */ 88#define AMDGPU_MAX_USEC_TIMEOUT 100000 /* 100 ms */
@@ -432,7 +433,7 @@ int amdgpu_fence_driver_init(struct amdgpu_device *adev);
432void amdgpu_fence_driver_fini(struct amdgpu_device *adev); 433void amdgpu_fence_driver_fini(struct amdgpu_device *adev);
433void amdgpu_fence_driver_force_completion(struct amdgpu_device *adev); 434void amdgpu_fence_driver_force_completion(struct amdgpu_device *adev);
434 435
435void amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring); 436int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring);
436int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, 437int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
437 struct amdgpu_irq_src *irq_src, 438 struct amdgpu_irq_src *irq_src,
438 unsigned irq_type); 439 unsigned irq_type);
@@ -890,7 +891,7 @@ struct amdgpu_ring {
890 struct amdgpu_device *adev; 891 struct amdgpu_device *adev;
891 const struct amdgpu_ring_funcs *funcs; 892 const struct amdgpu_ring_funcs *funcs;
892 struct amdgpu_fence_driver fence_drv; 893 struct amdgpu_fence_driver fence_drv;
893 struct amd_gpu_scheduler *scheduler; 894 struct amd_gpu_scheduler sched;
894 895
895 spinlock_t fence_lock; 896 spinlock_t fence_lock;
896 struct mutex *ring_lock; 897 struct mutex *ring_lock;
@@ -1201,8 +1202,6 @@ struct amdgpu_gfx {
1201 struct amdgpu_irq_src priv_inst_irq; 1202 struct amdgpu_irq_src priv_inst_irq;
1202 /* gfx status */ 1203 /* gfx status */
1203 uint32_t gfx_current_status; 1204 uint32_t gfx_current_status;
1204 /* sync signal for const engine */
1205 unsigned ce_sync_offs;
1206 /* ce ram size*/ 1205 /* ce ram size*/
1207 unsigned ce_ram_size; 1206 unsigned ce_ram_size;
1208}; 1207};
@@ -1274,8 +1273,10 @@ struct amdgpu_job {
1274 uint32_t num_ibs; 1273 uint32_t num_ibs;
1275 struct mutex job_lock; 1274 struct mutex job_lock;
1276 struct amdgpu_user_fence uf; 1275 struct amdgpu_user_fence uf;
1277 int (*free_job)(struct amdgpu_job *sched_job); 1276 int (*free_job)(struct amdgpu_job *job);
1278}; 1277};
1278#define to_amdgpu_job(sched_job) \
1279 container_of((sched_job), struct amdgpu_job, base)
1279 1280
1280static inline u32 amdgpu_get_ib_value(struct amdgpu_cs_parser *p, uint32_t ib_idx, int idx) 1281static inline u32 amdgpu_get_ib_value(struct amdgpu_cs_parser *p, uint32_t ib_idx, int idx)
1281{ 1282{
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 496ed2192eba..84d68d658f8a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -183,7 +183,7 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
183 return -ENOMEM; 183 return -ENOMEM;
184 184
185 r = amdgpu_bo_create(rdev, size, PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_GTT, 185 r = amdgpu_bo_create(rdev, size, PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_GTT,
186 AMDGPU_GEM_CREATE_CPU_GTT_USWC, NULL, &(*mem)->bo); 186 AMDGPU_GEM_CREATE_CPU_GTT_USWC, NULL, NULL, &(*mem)->bo);
187 if (r) { 187 if (r) {
188 dev_err(rdev->dev, 188 dev_err(rdev->dev,
189 "failed to allocate BO for amdkfd (%d)\n", r); 189 "failed to allocate BO for amdkfd (%d)\n", r);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
index 98d59ee640ce..cd639c362df3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
@@ -79,7 +79,8 @@ static void amdgpu_benchmark_move(struct amdgpu_device *adev, unsigned size,
79 int time; 79 int time;
80 80
81 n = AMDGPU_BENCHMARK_ITERATIONS; 81 n = AMDGPU_BENCHMARK_ITERATIONS;
82 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, sdomain, 0, NULL, &sobj); 82 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, sdomain, 0, NULL,
83 NULL, &sobj);
83 if (r) { 84 if (r) {
84 goto out_cleanup; 85 goto out_cleanup;
85 } 86 }
@@ -91,7 +92,8 @@ static void amdgpu_benchmark_move(struct amdgpu_device *adev, unsigned size,
91 if (r) { 92 if (r) {
92 goto out_cleanup; 93 goto out_cleanup;
93 } 94 }
94 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, ddomain, 0, NULL, &dobj); 95 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, ddomain, 0, NULL,
96 NULL, &dobj);
95 if (r) { 97 if (r) {
96 goto out_cleanup; 98 goto out_cleanup;
97 } 99 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index 6b1243f9f86d..8e995148f56e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -86,7 +86,7 @@ static int amdgpu_cgs_gmap_kmem(void *cgs_device, void *kmem,
86 86
87 struct sg_table *sg = drm_prime_pages_to_sg(&kmem_page, npages); 87 struct sg_table *sg = drm_prime_pages_to_sg(&kmem_page, npages);
88 ret = amdgpu_bo_create(adev, size, PAGE_SIZE, false, 88 ret = amdgpu_bo_create(adev, size, PAGE_SIZE, false,
89 AMDGPU_GEM_DOMAIN_GTT, 0, sg, &bo); 89 AMDGPU_GEM_DOMAIN_GTT, 0, sg, NULL, &bo);
90 if (ret) 90 if (ret)
91 return ret; 91 return ret;
92 ret = amdgpu_bo_reserve(bo, false); 92 ret = amdgpu_bo_reserve(bo, false);
@@ -197,7 +197,8 @@ static int amdgpu_cgs_alloc_gpu_mem(void *cgs_device,
197 197
198 ret = amdgpu_bo_create_restricted(adev, size, PAGE_SIZE, 198 ret = amdgpu_bo_create_restricted(adev, size, PAGE_SIZE,
199 true, domain, flags, 199 true, domain, flags,
200 NULL, &placement, &obj); 200 NULL, &placement, NULL,
201 &obj);
201 if (ret) { 202 if (ret) {
202 DRM_ERROR("(%d) bo create failed\n", ret); 203 DRM_ERROR("(%d) bo create failed\n", ret);
203 return ret; 204 return ret;
@@ -207,44 +208,6 @@ static int amdgpu_cgs_alloc_gpu_mem(void *cgs_device,
207 return ret; 208 return ret;
208} 209}
209 210
210static int amdgpu_cgs_import_gpu_mem(void *cgs_device, int dmabuf_fd,
211 cgs_handle_t *handle)
212{
213 CGS_FUNC_ADEV;
214 int r;
215 uint32_t dma_handle;
216 struct drm_gem_object *obj;
217 struct amdgpu_bo *bo;
218 struct drm_device *dev = adev->ddev;
219 struct drm_file *file_priv = NULL, *priv;
220
221 mutex_lock(&dev->struct_mutex);
222 list_for_each_entry(priv, &dev->filelist, lhead) {
223 rcu_read_lock();
224 if (priv->pid == get_pid(task_pid(current)))
225 file_priv = priv;
226 rcu_read_unlock();
227 if (file_priv)
228 break;
229 }
230 mutex_unlock(&dev->struct_mutex);
231 r = dev->driver->prime_fd_to_handle(dev,
232 file_priv, dmabuf_fd,
233 &dma_handle);
234 spin_lock(&file_priv->table_lock);
235
236 /* Check if we currently have a reference on the object */
237 obj = idr_find(&file_priv->object_idr, dma_handle);
238 if (obj == NULL) {
239 spin_unlock(&file_priv->table_lock);
240 return -EINVAL;
241 }
242 spin_unlock(&file_priv->table_lock);
243 bo = gem_to_amdgpu_bo(obj);
244 *handle = (cgs_handle_t)bo;
245 return 0;
246}
247
248static int amdgpu_cgs_free_gpu_mem(void *cgs_device, cgs_handle_t handle) 211static int amdgpu_cgs_free_gpu_mem(void *cgs_device, cgs_handle_t handle)
249{ 212{
250 struct amdgpu_bo *obj = (struct amdgpu_bo *)handle; 213 struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
@@ -809,7 +772,6 @@ static const struct cgs_ops amdgpu_cgs_ops = {
809}; 772};
810 773
811static const struct cgs_os_ops amdgpu_cgs_os_ops = { 774static const struct cgs_os_ops amdgpu_cgs_os_ops = {
812 amdgpu_cgs_import_gpu_mem,
813 amdgpu_cgs_add_irq_source, 775 amdgpu_cgs_add_irq_source,
814 amdgpu_cgs_irq_get, 776 amdgpu_cgs_irq_get,
815 amdgpu_cgs_irq_put 777 amdgpu_cgs_irq_put
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 3b355aeb62fd..cb3c274edb0a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -154,42 +154,42 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
154{ 154{
155 union drm_amdgpu_cs *cs = data; 155 union drm_amdgpu_cs *cs = data;
156 uint64_t *chunk_array_user; 156 uint64_t *chunk_array_user;
157 uint64_t *chunk_array = NULL; 157 uint64_t *chunk_array;
158 struct amdgpu_fpriv *fpriv = p->filp->driver_priv; 158 struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
159 unsigned size, i; 159 unsigned size;
160 int r = 0; 160 int i;
161 int ret;
161 162
162 if (!cs->in.num_chunks) 163 if (cs->in.num_chunks == 0)
163 goto out; 164 return 0;
165
166 chunk_array = kmalloc_array(cs->in.num_chunks, sizeof(uint64_t), GFP_KERNEL);
167 if (!chunk_array)
168 return -ENOMEM;
164 169
165 p->ctx = amdgpu_ctx_get(fpriv, cs->in.ctx_id); 170 p->ctx = amdgpu_ctx_get(fpriv, cs->in.ctx_id);
166 if (!p->ctx) { 171 if (!p->ctx) {
167 r = -EINVAL; 172 ret = -EINVAL;
168 goto out; 173 goto free_chunk;
169 } 174 }
175
170 p->bo_list = amdgpu_bo_list_get(fpriv, cs->in.bo_list_handle); 176 p->bo_list = amdgpu_bo_list_get(fpriv, cs->in.bo_list_handle);
171 177
172 /* get chunks */ 178 /* get chunks */
173 INIT_LIST_HEAD(&p->validated); 179 INIT_LIST_HEAD(&p->validated);
174 chunk_array = kmalloc_array(cs->in.num_chunks, sizeof(uint64_t), GFP_KERNEL);
175 if (chunk_array == NULL) {
176 r = -ENOMEM;
177 goto out;
178 }
179
180 chunk_array_user = (uint64_t __user *)(cs->in.chunks); 180 chunk_array_user = (uint64_t __user *)(cs->in.chunks);
181 if (copy_from_user(chunk_array, chunk_array_user, 181 if (copy_from_user(chunk_array, chunk_array_user,
182 sizeof(uint64_t)*cs->in.num_chunks)) { 182 sizeof(uint64_t)*cs->in.num_chunks)) {
183 r = -EFAULT; 183 ret = -EFAULT;
184 goto out; 184 goto put_bo_list;
185 } 185 }
186 186
187 p->nchunks = cs->in.num_chunks; 187 p->nchunks = cs->in.num_chunks;
188 p->chunks = kmalloc_array(p->nchunks, sizeof(struct amdgpu_cs_chunk), 188 p->chunks = kmalloc_array(p->nchunks, sizeof(struct amdgpu_cs_chunk),
189 GFP_KERNEL); 189 GFP_KERNEL);
190 if (p->chunks == NULL) { 190 if (!p->chunks) {
191 r = -ENOMEM; 191 ret = -ENOMEM;
192 goto out; 192 goto put_bo_list;
193 } 193 }
194 194
195 for (i = 0; i < p->nchunks; i++) { 195 for (i = 0; i < p->nchunks; i++) {
@@ -200,8 +200,9 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
200 chunk_ptr = (void __user *)chunk_array[i]; 200 chunk_ptr = (void __user *)chunk_array[i];
201 if (copy_from_user(&user_chunk, chunk_ptr, 201 if (copy_from_user(&user_chunk, chunk_ptr,
202 sizeof(struct drm_amdgpu_cs_chunk))) { 202 sizeof(struct drm_amdgpu_cs_chunk))) {
203 r = -EFAULT; 203 ret = -EFAULT;
204 goto out; 204 i--;
205 goto free_partial_kdata;
205 } 206 }
206 p->chunks[i].chunk_id = user_chunk.chunk_id; 207 p->chunks[i].chunk_id = user_chunk.chunk_id;
207 p->chunks[i].length_dw = user_chunk.length_dw; 208 p->chunks[i].length_dw = user_chunk.length_dw;
@@ -212,13 +213,14 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
212 213
213 p->chunks[i].kdata = drm_malloc_ab(size, sizeof(uint32_t)); 214 p->chunks[i].kdata = drm_malloc_ab(size, sizeof(uint32_t));
214 if (p->chunks[i].kdata == NULL) { 215 if (p->chunks[i].kdata == NULL) {
215 r = -ENOMEM; 216 ret = -ENOMEM;
216 goto out; 217 i--;
218 goto free_partial_kdata;
217 } 219 }
218 size *= sizeof(uint32_t); 220 size *= sizeof(uint32_t);
219 if (copy_from_user(p->chunks[i].kdata, cdata, size)) { 221 if (copy_from_user(p->chunks[i].kdata, cdata, size)) {
220 r = -EFAULT; 222 ret = -EFAULT;
221 goto out; 223 goto free_partial_kdata;
222 } 224 }
223 225
224 switch (p->chunks[i].chunk_id) { 226 switch (p->chunks[i].chunk_id) {
@@ -238,15 +240,15 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
238 gobj = drm_gem_object_lookup(p->adev->ddev, 240 gobj = drm_gem_object_lookup(p->adev->ddev,
239 p->filp, handle); 241 p->filp, handle);
240 if (gobj == NULL) { 242 if (gobj == NULL) {
241 r = -EINVAL; 243 ret = -EINVAL;
242 goto out; 244 goto free_partial_kdata;
243 } 245 }
244 246
245 p->uf.bo = gem_to_amdgpu_bo(gobj); 247 p->uf.bo = gem_to_amdgpu_bo(gobj);
246 p->uf.offset = fence_data->offset; 248 p->uf.offset = fence_data->offset;
247 } else { 249 } else {
248 r = -EINVAL; 250 ret = -EINVAL;
249 goto out; 251 goto free_partial_kdata;
250 } 252 }
251 break; 253 break;
252 254
@@ -254,19 +256,35 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
254 break; 256 break;
255 257
256 default: 258 default:
257 r = -EINVAL; 259 ret = -EINVAL;
258 goto out; 260 goto free_partial_kdata;
259 } 261 }
260 } 262 }
261 263
262 264
263 p->ibs = kcalloc(p->num_ibs, sizeof(struct amdgpu_ib), GFP_KERNEL); 265 p->ibs = kcalloc(p->num_ibs, sizeof(struct amdgpu_ib), GFP_KERNEL);
264 if (!p->ibs) 266 if (!p->ibs) {
265 r = -ENOMEM; 267 ret = -ENOMEM;
268 goto free_all_kdata;
269 }
266 270
267out:
268 kfree(chunk_array); 271 kfree(chunk_array);
269 return r; 272 return 0;
273
274free_all_kdata:
275 i = p->nchunks - 1;
276free_partial_kdata:
277 for (; i >= 0; i--)
278 drm_free_large(p->chunks[i].kdata);
279 kfree(p->chunks);
280put_bo_list:
281 if (p->bo_list)
282 amdgpu_bo_list_put(p->bo_list);
283 amdgpu_ctx_put(p->ctx);
284free_chunk:
285 kfree(chunk_array);
286
287 return ret;
270} 288}
271 289
272/* Returns how many bytes TTM can move per IB. 290/* Returns how many bytes TTM can move per IB.
@@ -321,25 +339,17 @@ static u64 amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev)
321 return max(bytes_moved_threshold, 1024*1024ull); 339 return max(bytes_moved_threshold, 1024*1024ull);
322} 340}
323 341
324int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p) 342int amdgpu_cs_list_validate(struct amdgpu_device *adev,
343 struct amdgpu_vm *vm,
344 struct list_head *validated)
325{ 345{
326 struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
327 struct amdgpu_vm *vm = &fpriv->vm;
328 struct amdgpu_device *adev = p->adev;
329 struct amdgpu_bo_list_entry *lobj; 346 struct amdgpu_bo_list_entry *lobj;
330 struct list_head duplicates;
331 struct amdgpu_bo *bo; 347 struct amdgpu_bo *bo;
332 u64 bytes_moved = 0, initial_bytes_moved; 348 u64 bytes_moved = 0, initial_bytes_moved;
333 u64 bytes_moved_threshold = amdgpu_cs_get_threshold_for_moves(adev); 349 u64 bytes_moved_threshold = amdgpu_cs_get_threshold_for_moves(adev);
334 int r; 350 int r;
335 351
336 INIT_LIST_HEAD(&duplicates); 352 list_for_each_entry(lobj, validated, tv.head) {
337 r = ttm_eu_reserve_buffers(&p->ticket, &p->validated, true, &duplicates);
338 if (unlikely(r != 0)) {
339 return r;
340 }
341
342 list_for_each_entry(lobj, &p->validated, tv.head) {
343 bo = lobj->robj; 353 bo = lobj->robj;
344 if (!bo->pin_count) { 354 if (!bo->pin_count) {
345 u32 domain = lobj->prefered_domains; 355 u32 domain = lobj->prefered_domains;
@@ -373,7 +383,6 @@ int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p)
373 domain = lobj->allowed_domains; 383 domain = lobj->allowed_domains;
374 goto retry; 384 goto retry;
375 } 385 }
376 ttm_eu_backoff_reservation(&p->ticket, &p->validated);
377 return r; 386 return r;
378 } 387 }
379 } 388 }
@@ -386,6 +395,7 @@ static int amdgpu_cs_parser_relocs(struct amdgpu_cs_parser *p)
386{ 395{
387 struct amdgpu_fpriv *fpriv = p->filp->driver_priv; 396 struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
388 struct amdgpu_cs_buckets buckets; 397 struct amdgpu_cs_buckets buckets;
398 struct list_head duplicates;
389 bool need_mmap_lock = false; 399 bool need_mmap_lock = false;
390 int i, r; 400 int i, r;
391 401
@@ -405,8 +415,22 @@ static int amdgpu_cs_parser_relocs(struct amdgpu_cs_parser *p)
405 if (need_mmap_lock) 415 if (need_mmap_lock)
406 down_read(&current->mm->mmap_sem); 416 down_read(&current->mm->mmap_sem);
407 417
408 r = amdgpu_cs_list_validate(p); 418 INIT_LIST_HEAD(&duplicates);
419 r = ttm_eu_reserve_buffers(&p->ticket, &p->validated, true, &duplicates);
420 if (unlikely(r != 0))
421 goto error_reserve;
422
423 r = amdgpu_cs_list_validate(p->adev, &fpriv->vm, &p->validated);
424 if (r)
425 goto error_validate;
426
427 r = amdgpu_cs_list_validate(p->adev, &fpriv->vm, &duplicates);
428
429error_validate:
430 if (r)
431 ttm_eu_backoff_reservation(&p->ticket, &p->validated);
409 432
433error_reserve:
410 if (need_mmap_lock) 434 if (need_mmap_lock)
411 up_read(&current->mm->mmap_sem); 435 up_read(&current->mm->mmap_sem);
412 436
@@ -772,15 +796,15 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev,
772 return 0; 796 return 0;
773} 797}
774 798
775static int amdgpu_cs_free_job(struct amdgpu_job *sched_job) 799static int amdgpu_cs_free_job(struct amdgpu_job *job)
776{ 800{
777 int i; 801 int i;
778 if (sched_job->ibs) 802 if (job->ibs)
779 for (i = 0; i < sched_job->num_ibs; i++) 803 for (i = 0; i < job->num_ibs; i++)
780 amdgpu_ib_free(sched_job->adev, &sched_job->ibs[i]); 804 amdgpu_ib_free(job->adev, &job->ibs[i]);
781 kfree(sched_job->ibs); 805 kfree(job->ibs);
782 if (sched_job->uf.bo) 806 if (job->uf.bo)
783 drm_gem_object_unreference_unlocked(&sched_job->uf.bo->gem_base); 807 drm_gem_object_unreference_unlocked(&job->uf.bo->gem_base);
784 return 0; 808 return 0;
785} 809}
786 810
@@ -804,7 +828,7 @@ int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
804 r = amdgpu_cs_parser_init(parser, data); 828 r = amdgpu_cs_parser_init(parser, data);
805 if (r) { 829 if (r) {
806 DRM_ERROR("Failed to initialize parser !\n"); 830 DRM_ERROR("Failed to initialize parser !\n");
807 amdgpu_cs_parser_fini(parser, r, false); 831 kfree(parser);
808 up_read(&adev->exclusive_lock); 832 up_read(&adev->exclusive_lock);
809 r = amdgpu_cs_handle_lockup(adev, r); 833 r = amdgpu_cs_handle_lockup(adev, r);
810 return r; 834 return r;
@@ -842,7 +866,7 @@ int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
842 job = kzalloc(sizeof(struct amdgpu_job), GFP_KERNEL); 866 job = kzalloc(sizeof(struct amdgpu_job), GFP_KERNEL);
843 if (!job) 867 if (!job)
844 return -ENOMEM; 868 return -ENOMEM;
845 job->base.sched = ring->scheduler; 869 job->base.sched = &ring->sched;
846 job->base.s_entity = &parser->ctx->rings[ring->idx].entity; 870 job->base.s_entity = &parser->ctx->rings[ring->idx].entity;
847 job->adev = parser->adev; 871 job->adev = parser->adev;
848 job->ibs = parser->ibs; 872 job->ibs = parser->ibs;
@@ -857,7 +881,7 @@ int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
857 881
858 job->free_job = amdgpu_cs_free_job; 882 job->free_job = amdgpu_cs_free_job;
859 mutex_lock(&job->job_lock); 883 mutex_lock(&job->job_lock);
860 r = amd_sched_entity_push_job((struct amd_sched_job *)job); 884 r = amd_sched_entity_push_job(&job->base);
861 if (r) { 885 if (r) {
862 mutex_unlock(&job->job_lock); 886 mutex_unlock(&job->job_lock);
863 amdgpu_cs_free_job(job); 887 amdgpu_cs_free_job(job);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 20cbc4eb5a6f..e0b80ccdfe8a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -43,10 +43,10 @@ int amdgpu_ctx_init(struct amdgpu_device *adev, bool kernel,
43 for (i = 0; i < adev->num_rings; i++) { 43 for (i = 0; i < adev->num_rings; i++) {
44 struct amd_sched_rq *rq; 44 struct amd_sched_rq *rq;
45 if (kernel) 45 if (kernel)
46 rq = &adev->rings[i]->scheduler->kernel_rq; 46 rq = &adev->rings[i]->sched.kernel_rq;
47 else 47 else
48 rq = &adev->rings[i]->scheduler->sched_rq; 48 rq = &adev->rings[i]->sched.sched_rq;
49 r = amd_sched_entity_init(adev->rings[i]->scheduler, 49 r = amd_sched_entity_init(&adev->rings[i]->sched,
50 &ctx->rings[i].entity, 50 &ctx->rings[i].entity,
51 rq, amdgpu_sched_jobs); 51 rq, amdgpu_sched_jobs);
52 if (r) 52 if (r)
@@ -55,7 +55,7 @@ int amdgpu_ctx_init(struct amdgpu_device *adev, bool kernel,
55 55
56 if (i < adev->num_rings) { 56 if (i < adev->num_rings) {
57 for (j = 0; j < i; j++) 57 for (j = 0; j < i; j++)
58 amd_sched_entity_fini(adev->rings[j]->scheduler, 58 amd_sched_entity_fini(&adev->rings[j]->sched,
59 &ctx->rings[j].entity); 59 &ctx->rings[j].entity);
60 kfree(ctx); 60 kfree(ctx);
61 return r; 61 return r;
@@ -75,7 +75,7 @@ void amdgpu_ctx_fini(struct amdgpu_ctx *ctx)
75 75
76 if (amdgpu_enable_scheduler) { 76 if (amdgpu_enable_scheduler) {
77 for (i = 0; i < adev->num_rings; i++) 77 for (i = 0; i < adev->num_rings; i++)
78 amd_sched_entity_fini(adev->rings[i]->scheduler, 78 amd_sched_entity_fini(&adev->rings[i]->sched,
79 &ctx->rings[i].entity); 79 &ctx->rings[i].entity);
80 } 80 }
81} 81}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 6ff6ae945794..6068d8207d10 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -246,7 +246,7 @@ static int amdgpu_vram_scratch_init(struct amdgpu_device *adev)
246 r = amdgpu_bo_create(adev, AMDGPU_GPU_PAGE_SIZE, 246 r = amdgpu_bo_create(adev, AMDGPU_GPU_PAGE_SIZE,
247 PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM, 247 PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM,
248 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 248 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
249 NULL, &adev->vram_scratch.robj); 249 NULL, NULL, &adev->vram_scratch.robj);
250 if (r) { 250 if (r) {
251 return r; 251 return r;
252 } 252 }
@@ -449,7 +449,8 @@ static int amdgpu_wb_init(struct amdgpu_device *adev)
449 449
450 if (adev->wb.wb_obj == NULL) { 450 if (adev->wb.wb_obj == NULL) {
451 r = amdgpu_bo_create(adev, AMDGPU_MAX_WB * 4, PAGE_SIZE, true, 451 r = amdgpu_bo_create(adev, AMDGPU_MAX_WB * 4, PAGE_SIZE, true,
452 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, &adev->wb.wb_obj); 452 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
453 &adev->wb.wb_obj);
453 if (r) { 454 if (r) {
454 dev_warn(adev->dev, "(%d) create WB bo failed\n", r); 455 dev_warn(adev->dev, "(%d) create WB bo failed\n", r);
455 return r; 456 return r;
@@ -1650,9 +1651,11 @@ int amdgpu_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon)
1650 drm_kms_helper_poll_disable(dev); 1651 drm_kms_helper_poll_disable(dev);
1651 1652
1652 /* turn off display hw */ 1653 /* turn off display hw */
1654 drm_modeset_lock_all(dev);
1653 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 1655 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1654 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); 1656 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
1655 } 1657 }
1658 drm_modeset_unlock_all(dev);
1656 1659
1657 /* unpin the front buffers */ 1660 /* unpin the front buffers */
1658 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 1661 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
@@ -1747,9 +1750,11 @@ int amdgpu_resume_kms(struct drm_device *dev, bool resume, bool fbcon)
1747 if (fbcon) { 1750 if (fbcon) {
1748 drm_helper_resume_force_mode(dev); 1751 drm_helper_resume_force_mode(dev);
1749 /* turn on display hw */ 1752 /* turn on display hw */
1753 drm_modeset_lock_all(dev);
1750 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 1754 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1751 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); 1755 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
1752 } 1756 }
1757 drm_modeset_unlock_all(dev);
1753 } 1758 }
1754 1759
1755 drm_kms_helper_poll_enable(dev); 1760 drm_kms_helper_poll_enable(dev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0fcc0bd1622c..adb48353f2e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -79,6 +79,7 @@ int amdgpu_exp_hw_support = 0;
79int amdgpu_enable_scheduler = 0; 79int amdgpu_enable_scheduler = 0;
80int amdgpu_sched_jobs = 16; 80int amdgpu_sched_jobs = 16;
81int amdgpu_sched_hw_submission = 2; 81int amdgpu_sched_hw_submission = 2;
82int amdgpu_enable_semaphores = 1;
82 83
83MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); 84MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
84module_param_named(vramlimit, amdgpu_vram_limit, int, 0600); 85module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
@@ -152,6 +153,9 @@ module_param_named(sched_jobs, amdgpu_sched_jobs, int, 0444);
152MODULE_PARM_DESC(sched_hw_submission, "the max number of HW submissions (default 2)"); 153MODULE_PARM_DESC(sched_hw_submission, "the max number of HW submissions (default 2)");
153module_param_named(sched_hw_submission, amdgpu_sched_hw_submission, int, 0444); 154module_param_named(sched_hw_submission, amdgpu_sched_hw_submission, int, 0444);
154 155
156MODULE_PARM_DESC(enable_semaphores, "Enable semaphores (1 = enable (default), 0 = disable)");
157module_param_named(enable_semaphores, amdgpu_enable_semaphores, int, 0644);
158
155static struct pci_device_id pciidlist[] = { 159static struct pci_device_id pciidlist[] = {
156#ifdef CONFIG_DRM_AMDGPU_CIK 160#ifdef CONFIG_DRM_AMDGPU_CIK
157 /* Kaveri */ 161 /* Kaveri */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 1be2bd6d07ea..b3fc26c59787 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -609,9 +609,9 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
609 * Init the fence driver for the requested ring (all asics). 609 * Init the fence driver for the requested ring (all asics).
610 * Helper function for amdgpu_fence_driver_init(). 610 * Helper function for amdgpu_fence_driver_init().
611 */ 611 */
612void amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring) 612int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring)
613{ 613{
614 int i; 614 int i, r;
615 615
616 ring->fence_drv.cpu_addr = NULL; 616 ring->fence_drv.cpu_addr = NULL;
617 ring->fence_drv.gpu_addr = 0; 617 ring->fence_drv.gpu_addr = 0;
@@ -625,15 +625,19 @@ void amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring)
625 amdgpu_fence_check_lockup); 625 amdgpu_fence_check_lockup);
626 ring->fence_drv.ring = ring; 626 ring->fence_drv.ring = ring;
627 627
628 init_waitqueue_head(&ring->fence_drv.fence_queue);
629
628 if (amdgpu_enable_scheduler) { 630 if (amdgpu_enable_scheduler) {
629 ring->scheduler = amd_sched_create(&amdgpu_sched_ops, 631 r = amd_sched_init(&ring->sched, &amdgpu_sched_ops,
630 ring->idx, 632 amdgpu_sched_hw_submission, ring->name);
631 amdgpu_sched_hw_submission, 633 if (r) {
632 (void *)ring->adev); 634 DRM_ERROR("Failed to create scheduler on ring %s.\n",
633 if (!ring->scheduler) 635 ring->name);
634 DRM_ERROR("Failed to create scheduler on ring %d.\n", 636 return r;
635 ring->idx); 637 }
636 } 638 }
639
640 return 0;
637} 641}
638 642
639/** 643/**
@@ -681,8 +685,7 @@ void amdgpu_fence_driver_fini(struct amdgpu_device *adev)
681 wake_up_all(&ring->fence_drv.fence_queue); 685 wake_up_all(&ring->fence_drv.fence_queue);
682 amdgpu_irq_put(adev, ring->fence_drv.irq_src, 686 amdgpu_irq_put(adev, ring->fence_drv.irq_src,
683 ring->fence_drv.irq_type); 687 ring->fence_drv.irq_type);
684 if (ring->scheduler) 688 amd_sched_fini(&ring->sched);
685 amd_sched_destroy(ring->scheduler);
686 ring->fence_drv.initialized = false; 689 ring->fence_drv.initialized = false;
687 } 690 }
688 mutex_unlock(&adev->ring_lock); 691 mutex_unlock(&adev->ring_lock);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index cbd3a486c5c2..7312d729d300 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -127,7 +127,7 @@ int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev)
127 r = amdgpu_bo_create(adev, adev->gart.table_size, 127 r = amdgpu_bo_create(adev, adev->gart.table_size,
128 PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM, 128 PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM,
129 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 129 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
130 NULL, &adev->gart.robj); 130 NULL, NULL, &adev->gart.robj);
131 if (r) { 131 if (r) {
132 return r; 132 return r;
133 } 133 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 5839fab374bf..7297ca3a0ba7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -69,7 +69,8 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
69 } 69 }
70 } 70 }
71retry: 71retry:
72 r = amdgpu_bo_create(adev, size, alignment, kernel, initial_domain, flags, NULL, &robj); 72 r = amdgpu_bo_create(adev, size, alignment, kernel, initial_domain,
73 flags, NULL, NULL, &robj);
73 if (r) { 74 if (r) {
74 if (r != -ERESTARTSYS) { 75 if (r != -ERESTARTSYS) {
75 if (initial_domain == AMDGPU_GEM_DOMAIN_VRAM) { 76 if (initial_domain == AMDGPU_GEM_DOMAIN_VRAM) {
@@ -426,6 +427,10 @@ int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data,
426 &args->data.data_size_bytes, 427 &args->data.data_size_bytes,
427 &args->data.flags); 428 &args->data.flags);
428 } else if (args->op == AMDGPU_GEM_METADATA_OP_SET_METADATA) { 429 } else if (args->op == AMDGPU_GEM_METADATA_OP_SET_METADATA) {
430 if (args->data.data_size_bytes > sizeof(args->data.data)) {
431 r = -EINVAL;
432 goto unreserve;
433 }
429 r = amdgpu_bo_set_tiling_flags(robj, args->data.tiling_info); 434 r = amdgpu_bo_set_tiling_flags(robj, args->data.tiling_info);
430 if (!r) 435 if (!r)
431 r = amdgpu_bo_set_metadata(robj, args->data.data, 436 r = amdgpu_bo_set_metadata(robj, args->data.data,
@@ -433,6 +438,7 @@ int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data,
433 args->data.flags); 438 args->data.flags);
434 } 439 }
435 440
441unreserve:
436 amdgpu_bo_unreserve(robj); 442 amdgpu_bo_unreserve(robj);
437out: 443out:
438 drm_gem_object_unreference_unlocked(gobj); 444 drm_gem_object_unreference_unlocked(gobj);
@@ -454,11 +460,12 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
454 struct ttm_validate_buffer tv, *entry; 460 struct ttm_validate_buffer tv, *entry;
455 struct amdgpu_bo_list_entry *vm_bos; 461 struct amdgpu_bo_list_entry *vm_bos;
456 struct ww_acquire_ctx ticket; 462 struct ww_acquire_ctx ticket;
457 struct list_head list; 463 struct list_head list, duplicates;
458 unsigned domain; 464 unsigned domain;
459 int r; 465 int r;
460 466
461 INIT_LIST_HEAD(&list); 467 INIT_LIST_HEAD(&list);
468 INIT_LIST_HEAD(&duplicates);
462 469
463 tv.bo = &bo_va->bo->tbo; 470 tv.bo = &bo_va->bo->tbo;
464 tv.shared = true; 471 tv.shared = true;
@@ -468,7 +475,8 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
468 if (!vm_bos) 475 if (!vm_bos)
469 return; 476 return;
470 477
471 r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL); 478 /* Provide duplicates to avoid -EALREADY */
479 r = ttm_eu_reserve_buffers(&ticket, &list, true, &duplicates);
472 if (r) 480 if (r)
473 goto error_free; 481 goto error_free;
474 482
@@ -651,7 +659,7 @@ int amdgpu_mode_dumb_create(struct drm_file *file_priv,
651 int r; 659 int r;
652 660
653 args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8); 661 args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
654 args->size = args->pitch * args->height; 662 args->size = (u64)args->pitch * args->height;
655 args->size = ALIGN(args->size, PAGE_SIZE); 663 args->size = ALIGN(args->size, PAGE_SIZE);
656 664
657 r = amdgpu_gem_object_create(adev, args->size, 0, 665 r = amdgpu_gem_object_create(adev, args->size, 0,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
index 5c8a803acedc..534fc04e80fd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
@@ -43,7 +43,7 @@ static int amdgpu_ih_ring_alloc(struct amdgpu_device *adev)
43 r = amdgpu_bo_create(adev, adev->irq.ih.ring_size, 43 r = amdgpu_bo_create(adev, adev->irq.ih.ring_size,
44 PAGE_SIZE, true, 44 PAGE_SIZE, true,
45 AMDGPU_GEM_DOMAIN_GTT, 0, 45 AMDGPU_GEM_DOMAIN_GTT, 0,
46 NULL, &adev->irq.ih.ring_obj); 46 NULL, NULL, &adev->irq.ih.ring_obj);
47 if (r) { 47 if (r) {
48 DRM_ERROR("amdgpu: failed to create ih ring buffer (%d).\n", r); 48 DRM_ERROR("amdgpu: failed to create ih ring buffer (%d).\n", r);
49 return r; 49 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 0aba8e9bc8a0..7c42ff670080 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -140,7 +140,7 @@ void amdgpu_irq_preinstall(struct drm_device *dev)
140 */ 140 */
141int amdgpu_irq_postinstall(struct drm_device *dev) 141int amdgpu_irq_postinstall(struct drm_device *dev)
142{ 142{
143 dev->max_vblank_count = 0x001fffff; 143 dev->max_vblank_count = 0x00ffffff;
144 return 0; 144 return 0;
145} 145}
146 146
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 22367939ebf1..8c735f544b66 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -390,7 +390,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
390 min((size_t)size, sizeof(vram_gtt))) ? -EFAULT : 0; 390 min((size_t)size, sizeof(vram_gtt))) ? -EFAULT : 0;
391 } 391 }
392 case AMDGPU_INFO_READ_MMR_REG: { 392 case AMDGPU_INFO_READ_MMR_REG: {
393 unsigned n, alloc_size = info->read_mmr_reg.count * 4; 393 unsigned n, alloc_size;
394 uint32_t *regs; 394 uint32_t *regs;
395 unsigned se_num = (info->read_mmr_reg.instance >> 395 unsigned se_num = (info->read_mmr_reg.instance >>
396 AMDGPU_INFO_MMR_SE_INDEX_SHIFT) & 396 AMDGPU_INFO_MMR_SE_INDEX_SHIFT) &
@@ -406,9 +406,10 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
406 if (sh_num == AMDGPU_INFO_MMR_SH_INDEX_MASK) 406 if (sh_num == AMDGPU_INFO_MMR_SH_INDEX_MASK)
407 sh_num = 0xffffffff; 407 sh_num = 0xffffffff;
408 408
409 regs = kmalloc(alloc_size, GFP_KERNEL); 409 regs = kmalloc_array(info->read_mmr_reg.count, sizeof(*regs), GFP_KERNEL);
410 if (!regs) 410 if (!regs)
411 return -ENOMEM; 411 return -ENOMEM;
412 alloc_size = info->read_mmr_reg.count * sizeof(*regs);
412 413
413 for (i = 0; i < info->read_mmr_reg.count; i++) 414 for (i = 0; i < info->read_mmr_reg.count; i++)
414 if (amdgpu_asic_read_register(adev, se_num, sh_num, 415 if (amdgpu_asic_read_register(adev, se_num, sh_num,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 08b09d55b96f..1a7708f365f3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -215,6 +215,7 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
215 bool kernel, u32 domain, u64 flags, 215 bool kernel, u32 domain, u64 flags,
216 struct sg_table *sg, 216 struct sg_table *sg,
217 struct ttm_placement *placement, 217 struct ttm_placement *placement,
218 struct reservation_object *resv,
218 struct amdgpu_bo **bo_ptr) 219 struct amdgpu_bo **bo_ptr)
219{ 220{
220 struct amdgpu_bo *bo; 221 struct amdgpu_bo *bo;
@@ -261,7 +262,7 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
261 /* Kernel allocation are uninterruptible */ 262 /* Kernel allocation are uninterruptible */
262 r = ttm_bo_init(&adev->mman.bdev, &bo->tbo, size, type, 263 r = ttm_bo_init(&adev->mman.bdev, &bo->tbo, size, type,
263 &bo->placement, page_align, !kernel, NULL, 264 &bo->placement, page_align, !kernel, NULL,
264 acc_size, sg, NULL, &amdgpu_ttm_bo_destroy); 265 acc_size, sg, resv, &amdgpu_ttm_bo_destroy);
265 if (unlikely(r != 0)) { 266 if (unlikely(r != 0)) {
266 return r; 267 return r;
267 } 268 }
@@ -275,7 +276,9 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
275int amdgpu_bo_create(struct amdgpu_device *adev, 276int amdgpu_bo_create(struct amdgpu_device *adev,
276 unsigned long size, int byte_align, 277 unsigned long size, int byte_align,
277 bool kernel, u32 domain, u64 flags, 278 bool kernel, u32 domain, u64 flags,
278 struct sg_table *sg, struct amdgpu_bo **bo_ptr) 279 struct sg_table *sg,
280 struct reservation_object *resv,
281 struct amdgpu_bo **bo_ptr)
279{ 282{
280 struct ttm_placement placement = {0}; 283 struct ttm_placement placement = {0};
281 struct ttm_place placements[AMDGPU_GEM_DOMAIN_MAX + 1]; 284 struct ttm_place placements[AMDGPU_GEM_DOMAIN_MAX + 1];
@@ -286,11 +289,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
286 amdgpu_ttm_placement_init(adev, &placement, 289 amdgpu_ttm_placement_init(adev, &placement,
287 placements, domain, flags); 290 placements, domain, flags);
288 291
289 return amdgpu_bo_create_restricted(adev, size, byte_align, 292 return amdgpu_bo_create_restricted(adev, size, byte_align, kernel,
290 kernel, domain, flags, 293 domain, flags, sg, &placement,
291 sg, 294 resv, bo_ptr);
292 &placement,
293 bo_ptr);
294} 295}
295 296
296int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr) 297int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)
@@ -535,12 +536,10 @@ int amdgpu_bo_set_metadata (struct amdgpu_bo *bo, void *metadata,
535 if (metadata == NULL) 536 if (metadata == NULL)
536 return -EINVAL; 537 return -EINVAL;
537 538
538 buffer = kzalloc(metadata_size, GFP_KERNEL); 539 buffer = kmemdup(metadata, metadata_size, GFP_KERNEL);
539 if (buffer == NULL) 540 if (buffer == NULL)
540 return -ENOMEM; 541 return -ENOMEM;
541 542
542 memcpy(buffer, metadata, metadata_size);
543
544 kfree(bo->metadata); 543 kfree(bo->metadata);
545 bo->metadata_flags = flags; 544 bo->metadata_flags = flags;
546 bo->metadata = buffer; 545 bo->metadata = buffer;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 6ea18dcec561..3c2ff4567798 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -129,12 +129,14 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
129 unsigned long size, int byte_align, 129 unsigned long size, int byte_align,
130 bool kernel, u32 domain, u64 flags, 130 bool kernel, u32 domain, u64 flags,
131 struct sg_table *sg, 131 struct sg_table *sg,
132 struct reservation_object *resv,
132 struct amdgpu_bo **bo_ptr); 133 struct amdgpu_bo **bo_ptr);
133int amdgpu_bo_create_restricted(struct amdgpu_device *adev, 134int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
134 unsigned long size, int byte_align, 135 unsigned long size, int byte_align,
135 bool kernel, u32 domain, u64 flags, 136 bool kernel, u32 domain, u64 flags,
136 struct sg_table *sg, 137 struct sg_table *sg,
137 struct ttm_placement *placement, 138 struct ttm_placement *placement,
139 struct reservation_object *resv,
138 struct amdgpu_bo **bo_ptr); 140 struct amdgpu_bo **bo_ptr);
139int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr); 141int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr);
140void amdgpu_bo_kunmap(struct amdgpu_bo *bo); 142void amdgpu_bo_kunmap(struct amdgpu_bo *bo);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index d9652fe32d6a..59f735a933a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -61,12 +61,15 @@ struct drm_gem_object *amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
61 struct dma_buf_attachment *attach, 61 struct dma_buf_attachment *attach,
62 struct sg_table *sg) 62 struct sg_table *sg)
63{ 63{
64 struct reservation_object *resv = attach->dmabuf->resv;
64 struct amdgpu_device *adev = dev->dev_private; 65 struct amdgpu_device *adev = dev->dev_private;
65 struct amdgpu_bo *bo; 66 struct amdgpu_bo *bo;
66 int ret; 67 int ret;
67 68
69 ww_mutex_lock(&resv->lock, NULL);
68 ret = amdgpu_bo_create(adev, attach->dmabuf->size, PAGE_SIZE, false, 70 ret = amdgpu_bo_create(adev, attach->dmabuf->size, PAGE_SIZE, false,
69 AMDGPU_GEM_DOMAIN_GTT, 0, sg, &bo); 71 AMDGPU_GEM_DOMAIN_GTT, 0, sg, resv, &bo);
72 ww_mutex_unlock(&resv->lock);
70 if (ret) 73 if (ret)
71 return ERR_PTR(ret); 74 return ERR_PTR(ret);
72 75
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 9bec91484c24..30dce235ddeb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -357,11 +357,11 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
357 ring->adev = adev; 357 ring->adev = adev;
358 ring->idx = adev->num_rings++; 358 ring->idx = adev->num_rings++;
359 adev->rings[ring->idx] = ring; 359 adev->rings[ring->idx] = ring;
360 amdgpu_fence_driver_init_ring(ring); 360 r = amdgpu_fence_driver_init_ring(ring);
361 if (r)
362 return r;
361 } 363 }
362 364
363 init_waitqueue_head(&ring->fence_drv.fence_queue);
364
365 r = amdgpu_wb_get(adev, &ring->rptr_offs); 365 r = amdgpu_wb_get(adev, &ring->rptr_offs);
366 if (r) { 366 if (r) {
367 dev_err(adev->dev, "(%d) ring rptr_offs wb alloc failed\n", r); 367 dev_err(adev->dev, "(%d) ring rptr_offs wb alloc failed\n", r);
@@ -407,7 +407,7 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
407 if (ring->ring_obj == NULL) { 407 if (ring->ring_obj == NULL) {
408 r = amdgpu_bo_create(adev, ring->ring_size, PAGE_SIZE, true, 408 r = amdgpu_bo_create(adev, ring->ring_size, PAGE_SIZE, true,
409 AMDGPU_GEM_DOMAIN_GTT, 0, 409 AMDGPU_GEM_DOMAIN_GTT, 0,
410 NULL, &ring->ring_obj); 410 NULL, NULL, &ring->ring_obj);
411 if (r) { 411 if (r) {
412 dev_err(adev->dev, "(%d) ring create failed\n", r); 412 dev_err(adev->dev, "(%d) ring create failed\n", r);
413 return r; 413 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
index 74dad270362c..e90712443fe9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
@@ -64,8 +64,8 @@ int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
64 INIT_LIST_HEAD(&sa_manager->flist[i]); 64 INIT_LIST_HEAD(&sa_manager->flist[i]);
65 } 65 }
66 66
67 r = amdgpu_bo_create(adev, size, align, true, 67 r = amdgpu_bo_create(adev, size, align, true, domain,
68 domain, 0, NULL, &sa_manager->bo); 68 0, NULL, NULL, &sa_manager->bo);
69 if (r) { 69 if (r) {
70 dev_err(adev->dev, "(%d) failed to allocate bo for manager\n", r); 70 dev_err(adev->dev, "(%d) failed to allocate bo for manager\n", r);
71 return r; 71 return r;
@@ -145,8 +145,13 @@ static uint32_t amdgpu_sa_get_ring_from_fence(struct fence *f)
145 struct amd_sched_fence *s_fence; 145 struct amd_sched_fence *s_fence;
146 146
147 s_fence = to_amd_sched_fence(f); 147 s_fence = to_amd_sched_fence(f);
148 if (s_fence) 148 if (s_fence) {
149 return s_fence->scheduler->ring_id; 149 struct amdgpu_ring *ring;
150
151 ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
152 return ring->idx;
153 }
154
150 a_fence = to_amdgpu_fence(f); 155 a_fence = to_amdgpu_fence(f);
151 if (a_fence) 156 if (a_fence)
152 return a_fence->ring->idx; 157 return a_fence->ring->idx;
@@ -412,6 +417,26 @@ void amdgpu_sa_bo_free(struct amdgpu_device *adev, struct amdgpu_sa_bo **sa_bo,
412} 417}
413 418
414#if defined(CONFIG_DEBUG_FS) 419#if defined(CONFIG_DEBUG_FS)
420
421static void amdgpu_sa_bo_dump_fence(struct fence *fence, struct seq_file *m)
422{
423 struct amdgpu_fence *a_fence = to_amdgpu_fence(fence);
424 struct amd_sched_fence *s_fence = to_amd_sched_fence(fence);
425
426 if (a_fence)
427 seq_printf(m, " protected by 0x%016llx on ring %d",
428 a_fence->seq, a_fence->ring->idx);
429
430 if (s_fence) {
431 struct amdgpu_ring *ring;
432
433
434 ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
435 seq_printf(m, " protected by 0x%016x on ring %d",
436 s_fence->base.seqno, ring->idx);
437 }
438}
439
415void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager, 440void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
416 struct seq_file *m) 441 struct seq_file *m)
417{ 442{
@@ -428,18 +453,8 @@ void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
428 } 453 }
429 seq_printf(m, "[0x%010llx 0x%010llx] size %8lld", 454 seq_printf(m, "[0x%010llx 0x%010llx] size %8lld",
430 soffset, eoffset, eoffset - soffset); 455 soffset, eoffset, eoffset - soffset);
431 if (i->fence) { 456 if (i->fence)
432 struct amdgpu_fence *a_fence = to_amdgpu_fence(i->fence); 457 amdgpu_sa_bo_dump_fence(i->fence, m);
433 struct amd_sched_fence *s_fence = to_amd_sched_fence(i->fence);
434 if (a_fence)
435 seq_printf(m, " protected by 0x%016llx on ring %d",
436 a_fence->seq, a_fence->ring->idx);
437 if (s_fence)
438 seq_printf(m, " protected by 0x%016x on ring %d",
439 s_fence->base.seqno,
440 s_fence->scheduler->ring_id);
441
442 }
443 seq_printf(m, "\n"); 458 seq_printf(m, "\n");
444 } 459 }
445 spin_unlock(&sa_manager->wq.lock); 460 spin_unlock(&sa_manager->wq.lock);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
index de98fbd2971e..2e946b2cad88 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
@@ -27,63 +27,48 @@
27#include <drm/drmP.h> 27#include <drm/drmP.h>
28#include "amdgpu.h" 28#include "amdgpu.h"
29 29
30static struct fence *amdgpu_sched_dependency(struct amd_sched_job *job) 30static struct fence *amdgpu_sched_dependency(struct amd_sched_job *sched_job)
31{ 31{
32 struct amdgpu_job *sched_job = (struct amdgpu_job *)job; 32 struct amdgpu_job *job = to_amdgpu_job(sched_job);
33 return amdgpu_sync_get_fence(&sched_job->ibs->sync); 33 return amdgpu_sync_get_fence(&job->ibs->sync);
34} 34}
35 35
36static struct fence *amdgpu_sched_run_job(struct amd_sched_job *job) 36static struct fence *amdgpu_sched_run_job(struct amd_sched_job *sched_job)
37{ 37{
38 struct amdgpu_job *sched_job; 38 struct amdgpu_fence *fence = NULL;
39 struct amdgpu_fence *fence; 39 struct amdgpu_job *job;
40 int r; 40 int r;
41 41
42 if (!job) { 42 if (!sched_job) {
43 DRM_ERROR("job is null\n"); 43 DRM_ERROR("job is null\n");
44 return NULL; 44 return NULL;
45 } 45 }
46 sched_job = (struct amdgpu_job *)job; 46 job = to_amdgpu_job(sched_job);
47 mutex_lock(&sched_job->job_lock); 47 mutex_lock(&job->job_lock);
48 r = amdgpu_ib_schedule(sched_job->adev, 48 r = amdgpu_ib_schedule(job->adev,
49 sched_job->num_ibs, 49 job->num_ibs,
50 sched_job->ibs, 50 job->ibs,
51 sched_job->base.owner); 51 job->base.owner);
52 if (r) 52 if (r) {
53 DRM_ERROR("Error scheduling IBs (%d)\n", r);
53 goto err; 54 goto err;
54 fence = amdgpu_fence_ref(sched_job->ibs[sched_job->num_ibs - 1].fence); 55 }
55
56 if (sched_job->free_job)
57 sched_job->free_job(sched_job);
58 56
59 mutex_unlock(&sched_job->job_lock); 57 fence = amdgpu_fence_ref(job->ibs[job->num_ibs - 1].fence);
60 return &fence->base;
61 58
62err: 59err:
63 DRM_ERROR("Run job error\n"); 60 if (job->free_job)
64 mutex_unlock(&sched_job->job_lock); 61 job->free_job(job);
65 job->sched->ops->process_job(job);
66 return NULL;
67}
68 62
69static void amdgpu_sched_process_job(struct amd_sched_job *job) 63 mutex_unlock(&job->job_lock);
70{ 64 fence_put(&job->base.s_fence->base);
71 struct amdgpu_job *sched_job; 65 kfree(job);
72 66 return fence ? &fence->base : NULL;
73 if (!job) {
74 DRM_ERROR("job is null\n");
75 return;
76 }
77 sched_job = (struct amdgpu_job *)job;
78 /* after processing job, free memory */
79 fence_put(&sched_job->base.s_fence->base);
80 kfree(sched_job);
81} 67}
82 68
83struct amd_sched_backend_ops amdgpu_sched_ops = { 69struct amd_sched_backend_ops amdgpu_sched_ops = {
84 .dependency = amdgpu_sched_dependency, 70 .dependency = amdgpu_sched_dependency,
85 .run_job = amdgpu_sched_run_job, 71 .run_job = amdgpu_sched_run_job,
86 .process_job = amdgpu_sched_process_job
87}; 72};
88 73
89int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev, 74int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev,
@@ -100,7 +85,7 @@ int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev,
100 kzalloc(sizeof(struct amdgpu_job), GFP_KERNEL); 85 kzalloc(sizeof(struct amdgpu_job), GFP_KERNEL);
101 if (!job) 86 if (!job)
102 return -ENOMEM; 87 return -ENOMEM;
103 job->base.sched = ring->scheduler; 88 job->base.sched = &ring->sched;
104 job->base.s_entity = &adev->kernel_ctx.rings[ring->idx].entity; 89 job->base.s_entity = &adev->kernel_ctx.rings[ring->idx].entity;
105 job->adev = adev; 90 job->adev = adev;
106 job->ibs = ibs; 91 job->ibs = ibs;
@@ -109,7 +94,7 @@ int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev,
109 mutex_init(&job->job_lock); 94 mutex_init(&job->job_lock);
110 job->free_job = free_job; 95 job->free_job = free_job;
111 mutex_lock(&job->job_lock); 96 mutex_lock(&job->job_lock);
112 r = amd_sched_entity_push_job((struct amd_sched_job *)job); 97 r = amd_sched_entity_push_job(&job->base);
113 if (r) { 98 if (r) {
114 mutex_unlock(&job->job_lock); 99 mutex_unlock(&job->job_lock);
115 kfree(job); 100 kfree(job);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
index 068aeaff7183..4921de15b451 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
@@ -65,8 +65,14 @@ static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, struct fence *f)
65 65
66 if (a_fence) 66 if (a_fence)
67 return a_fence->ring->adev == adev; 67 return a_fence->ring->adev == adev;
68 if (s_fence) 68
69 return (struct amdgpu_device *)s_fence->scheduler->priv == adev; 69 if (s_fence) {
70 struct amdgpu_ring *ring;
71
72 ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
73 return ring->adev == adev;
74 }
75
70 return false; 76 return false;
71} 77}
72 78
@@ -251,6 +257,20 @@ int amdgpu_sync_wait(struct amdgpu_sync *sync)
251 fence_put(e->fence); 257 fence_put(e->fence);
252 kfree(e); 258 kfree(e);
253 } 259 }
260
261 if (amdgpu_enable_semaphores)
262 return 0;
263
264 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
265 struct amdgpu_fence *fence = sync->sync_to[i];
266 if (!fence)
267 continue;
268
269 r = fence_wait(&fence->base, false);
270 if (r)
271 return r;
272 }
273
254 return 0; 274 return 0;
255} 275}
256 276
@@ -285,7 +305,8 @@ int amdgpu_sync_rings(struct amdgpu_sync *sync,
285 return -EINVAL; 305 return -EINVAL;
286 } 306 }
287 307
288 if (amdgpu_enable_scheduler || (count >= AMDGPU_NUM_SYNCS)) { 308 if (amdgpu_enable_scheduler || !amdgpu_enable_semaphores ||
309 (count >= AMDGPU_NUM_SYNCS)) {
289 /* not enough room, wait manually */ 310 /* not enough room, wait manually */
290 r = fence_wait(&fence->base, false); 311 r = fence_wait(&fence->base, false);
291 if (r) 312 if (r)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
index f80b1a43be8a..4865615e9c06 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_test.c
@@ -59,8 +59,9 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
59 goto out_cleanup; 59 goto out_cleanup;
60 } 60 }
61 61
62 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM, 0, 62 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
63 NULL, &vram_obj); 63 AMDGPU_GEM_DOMAIN_VRAM, 0,
64 NULL, NULL, &vram_obj);
64 if (r) { 65 if (r) {
65 DRM_ERROR("Failed to create VRAM object\n"); 66 DRM_ERROR("Failed to create VRAM object\n");
66 goto out_cleanup; 67 goto out_cleanup;
@@ -80,7 +81,8 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
80 struct fence *fence = NULL; 81 struct fence *fence = NULL;
81 82
82 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, 83 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
83 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, gtt_obj + i); 84 AMDGPU_GEM_DOMAIN_GTT, 0, NULL,
85 NULL, gtt_obj + i);
84 if (r) { 86 if (r) {
85 DRM_ERROR("Failed to create GTT object %d\n", i); 87 DRM_ERROR("Failed to create GTT object %d\n", i);
86 goto out_lclean; 88 goto out_lclean;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index b5abd5cde413..364cbe975332 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -861,7 +861,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
861 r = amdgpu_bo_create(adev, 256 * 1024, PAGE_SIZE, true, 861 r = amdgpu_bo_create(adev, 256 * 1024, PAGE_SIZE, true,
862 AMDGPU_GEM_DOMAIN_VRAM, 862 AMDGPU_GEM_DOMAIN_VRAM,
863 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 863 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
864 NULL, &adev->stollen_vga_memory); 864 NULL, NULL, &adev->stollen_vga_memory);
865 if (r) { 865 if (r) {
866 return r; 866 return r;
867 } 867 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 482e66797ae6..5cc95f1a7dab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -247,7 +247,7 @@ int amdgpu_ucode_init_bo(struct amdgpu_device *adev)
247 const struct common_firmware_header *header = NULL; 247 const struct common_firmware_header *header = NULL;
248 248
249 err = amdgpu_bo_create(adev, adev->firmware.fw_size, PAGE_SIZE, true, 249 err = amdgpu_bo_create(adev, adev->firmware.fw_size, PAGE_SIZE, true,
250 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, bo); 250 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL, bo);
251 if (err) { 251 if (err) {
252 dev_err(adev->dev, "(%d) Firmware buffer allocate failed\n", err); 252 dev_err(adev->dev, "(%d) Firmware buffer allocate failed\n", err);
253 err = -ENOMEM; 253 err = -ENOMEM;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 2cf6c6b06e3b..d0312364d950 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -156,7 +156,7 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
156 r = amdgpu_bo_create(adev, bo_size, PAGE_SIZE, true, 156 r = amdgpu_bo_create(adev, bo_size, PAGE_SIZE, true,
157 AMDGPU_GEM_DOMAIN_VRAM, 157 AMDGPU_GEM_DOMAIN_VRAM,
158 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 158 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
159 NULL, &adev->uvd.vcpu_bo); 159 NULL, NULL, &adev->uvd.vcpu_bo);
160 if (r) { 160 if (r) {
161 dev_err(adev->dev, "(%d) failed to allocate UVD bo\n", r); 161 dev_err(adev->dev, "(%d) failed to allocate UVD bo\n", r);
162 return r; 162 return r;
@@ -543,46 +543,60 @@ static int amdgpu_uvd_cs_msg(struct amdgpu_uvd_cs_ctx *ctx,
543 return -EINVAL; 543 return -EINVAL;
544 } 544 }
545 545
546 if (msg_type == 1) { 546 switch (msg_type) {
547 case 0:
548 /* it's a create msg, calc image size (width * height) */
549 amdgpu_bo_kunmap(bo);
550
551 /* try to alloc a new handle */
552 for (i = 0; i < AMDGPU_MAX_UVD_HANDLES; ++i) {
553 if (atomic_read(&adev->uvd.handles[i]) == handle) {
554 DRM_ERROR("Handle 0x%x already in use!\n", handle);
555 return -EINVAL;
556 }
557
558 if (!atomic_cmpxchg(&adev->uvd.handles[i], 0, handle)) {
559 adev->uvd.filp[i] = ctx->parser->filp;
560 return 0;
561 }
562 }
563
564 DRM_ERROR("No more free UVD handles!\n");
565 return -EINVAL;
566
567 case 1:
547 /* it's a decode msg, calc buffer sizes */ 568 /* it's a decode msg, calc buffer sizes */
548 r = amdgpu_uvd_cs_msg_decode(msg, ctx->buf_sizes); 569 r = amdgpu_uvd_cs_msg_decode(msg, ctx->buf_sizes);
549 amdgpu_bo_kunmap(bo); 570 amdgpu_bo_kunmap(bo);
550 if (r) 571 if (r)
551 return r; 572 return r;
552 573
553 } else if (msg_type == 2) { 574 /* validate the handle */
575 for (i = 0; i < AMDGPU_MAX_UVD_HANDLES; ++i) {
576 if (atomic_read(&adev->uvd.handles[i]) == handle) {
577 if (adev->uvd.filp[i] != ctx->parser->filp) {
578 DRM_ERROR("UVD handle collision detected!\n");
579 return -EINVAL;
580 }
581 return 0;
582 }
583 }
584
585 DRM_ERROR("Invalid UVD handle 0x%x!\n", handle);
586 return -ENOENT;
587
588 case 2:
554 /* it's a destroy msg, free the handle */ 589 /* it's a destroy msg, free the handle */
555 for (i = 0; i < AMDGPU_MAX_UVD_HANDLES; ++i) 590 for (i = 0; i < AMDGPU_MAX_UVD_HANDLES; ++i)
556 atomic_cmpxchg(&adev->uvd.handles[i], handle, 0); 591 atomic_cmpxchg(&adev->uvd.handles[i], handle, 0);
557 amdgpu_bo_kunmap(bo); 592 amdgpu_bo_kunmap(bo);
558 return 0; 593 return 0;
559 } else {
560 /* it's a create msg */
561 amdgpu_bo_kunmap(bo);
562
563 if (msg_type != 0) {
564 DRM_ERROR("Illegal UVD message type (%d)!\n", msg_type);
565 return -EINVAL;
566 }
567
568 /* it's a create msg, no special handling needed */
569 }
570
571 /* create or decode, validate the handle */
572 for (i = 0; i < AMDGPU_MAX_UVD_HANDLES; ++i) {
573 if (atomic_read(&adev->uvd.handles[i]) == handle)
574 return 0;
575 }
576 594
577 /* handle not found try to alloc a new one */ 595 default:
578 for (i = 0; i < AMDGPU_MAX_UVD_HANDLES; ++i) { 596 DRM_ERROR("Illegal UVD message type (%d)!\n", msg_type);
579 if (!atomic_cmpxchg(&adev->uvd.handles[i], 0, handle)) { 597 return -EINVAL;
580 adev->uvd.filp[i] = ctx->parser->filp;
581 return 0;
582 }
583 } 598 }
584 599 BUG();
585 DRM_ERROR("No more free UVD handles!\n");
586 return -EINVAL; 600 return -EINVAL;
587} 601}
588 602
@@ -805,10 +819,10 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx)
805} 819}
806 820
807static int amdgpu_uvd_free_job( 821static int amdgpu_uvd_free_job(
808 struct amdgpu_job *sched_job) 822 struct amdgpu_job *job)
809{ 823{
810 amdgpu_ib_free(sched_job->adev, sched_job->ibs); 824 amdgpu_ib_free(job->adev, job->ibs);
811 kfree(sched_job->ibs); 825 kfree(job->ibs);
812 return 0; 826 return 0;
813} 827}
814 828
@@ -905,7 +919,7 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
905 r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true, 919 r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
906 AMDGPU_GEM_DOMAIN_VRAM, 920 AMDGPU_GEM_DOMAIN_VRAM,
907 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 921 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
908 NULL, &bo); 922 NULL, NULL, &bo);
909 if (r) 923 if (r)
910 return r; 924 return r;
911 925
@@ -954,7 +968,7 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
954 r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true, 968 r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
955 AMDGPU_GEM_DOMAIN_VRAM, 969 AMDGPU_GEM_DOMAIN_VRAM,
956 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 970 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
957 NULL, &bo); 971 NULL, NULL, &bo);
958 if (r) 972 if (r)
959 return r; 973 return r;
960 974
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 3cab96c42aa8..74f2038ac747 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -143,7 +143,7 @@ int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size)
143 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, 143 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
144 AMDGPU_GEM_DOMAIN_VRAM, 144 AMDGPU_GEM_DOMAIN_VRAM,
145 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 145 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
146 NULL, &adev->vce.vcpu_bo); 146 NULL, NULL, &adev->vce.vcpu_bo);
147 if (r) { 147 if (r) {
148 dev_err(adev->dev, "(%d) failed to allocate VCE bo\n", r); 148 dev_err(adev->dev, "(%d) failed to allocate VCE bo\n", r);
149 return r; 149 return r;
@@ -342,10 +342,10 @@ void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp)
342} 342}
343 343
344static int amdgpu_vce_free_job( 344static int amdgpu_vce_free_job(
345 struct amdgpu_job *sched_job) 345 struct amdgpu_job *job)
346{ 346{
347 amdgpu_ib_free(sched_job->adev, sched_job->ibs); 347 amdgpu_ib_free(job->adev, job->ibs);
348 kfree(sched_job->ibs); 348 kfree(job->ibs);
349 return 0; 349 return 0;
350} 350}
351 351
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index f68b7cdc370a..1e14531353e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -316,12 +316,12 @@ static void amdgpu_vm_update_pages(struct amdgpu_device *adev,
316 } 316 }
317} 317}
318 318
319int amdgpu_vm_free_job(struct amdgpu_job *sched_job) 319int amdgpu_vm_free_job(struct amdgpu_job *job)
320{ 320{
321 int i; 321 int i;
322 for (i = 0; i < sched_job->num_ibs; i++) 322 for (i = 0; i < job->num_ibs; i++)
323 amdgpu_ib_free(sched_job->adev, &sched_job->ibs[i]); 323 amdgpu_ib_free(job->adev, &job->ibs[i]);
324 kfree(sched_job->ibs); 324 kfree(job->ibs);
325 return 0; 325 return 0;
326} 326}
327 327
@@ -686,31 +686,6 @@ static int amdgpu_vm_update_ptes(struct amdgpu_device *adev,
686} 686}
687 687
688/** 688/**
689 * amdgpu_vm_fence_pts - fence page tables after an update
690 *
691 * @vm: requested vm
692 * @start: start of GPU address range
693 * @end: end of GPU address range
694 * @fence: fence to use
695 *
696 * Fence the page tables in the range @start - @end (cayman+).
697 *
698 * Global and local mutex must be locked!
699 */
700static void amdgpu_vm_fence_pts(struct amdgpu_vm *vm,
701 uint64_t start, uint64_t end,
702 struct fence *fence)
703{
704 unsigned i;
705
706 start >>= amdgpu_vm_block_size;
707 end >>= amdgpu_vm_block_size;
708
709 for (i = start; i <= end; ++i)
710 amdgpu_bo_fence(vm->page_tables[i].bo, fence, true);
711}
712
713/**
714 * amdgpu_vm_bo_update_mapping - update a mapping in the vm page table 689 * amdgpu_vm_bo_update_mapping - update a mapping in the vm page table
715 * 690 *
716 * @adev: amdgpu_device pointer 691 * @adev: amdgpu_device pointer
@@ -813,8 +788,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
813 if (r) 788 if (r)
814 goto error_free; 789 goto error_free;
815 790
816 amdgpu_vm_fence_pts(vm, mapping->it.start, 791 amdgpu_bo_fence(vm->page_directory, f, true);
817 mapping->it.last + 1, f);
818 if (fence) { 792 if (fence) {
819 fence_put(*fence); 793 fence_put(*fence);
820 *fence = fence_get(f); 794 *fence = fence_get(f);
@@ -855,7 +829,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
855 int r; 829 int r;
856 830
857 if (mem) { 831 if (mem) {
858 addr = mem->start << PAGE_SHIFT; 832 addr = (u64)mem->start << PAGE_SHIFT;
859 if (mem->mem_type != TTM_PL_TT) 833 if (mem->mem_type != TTM_PL_TT)
860 addr += adev->vm_manager.vram_base_offset; 834 addr += adev->vm_manager.vram_base_offset;
861 } else { 835 } else {
@@ -1089,6 +1063,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
1089 1063
1090 /* walk over the address space and allocate the page tables */ 1064 /* walk over the address space and allocate the page tables */
1091 for (pt_idx = saddr; pt_idx <= eaddr; ++pt_idx) { 1065 for (pt_idx = saddr; pt_idx <= eaddr; ++pt_idx) {
1066 struct reservation_object *resv = vm->page_directory->tbo.resv;
1092 struct amdgpu_bo *pt; 1067 struct amdgpu_bo *pt;
1093 1068
1094 if (vm->page_tables[pt_idx].bo) 1069 if (vm->page_tables[pt_idx].bo)
@@ -1097,11 +1072,13 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
1097 /* drop mutex to allocate and clear page table */ 1072 /* drop mutex to allocate and clear page table */
1098 mutex_unlock(&vm->mutex); 1073 mutex_unlock(&vm->mutex);
1099 1074
1075 ww_mutex_lock(&resv->lock, NULL);
1100 r = amdgpu_bo_create(adev, AMDGPU_VM_PTE_COUNT * 8, 1076 r = amdgpu_bo_create(adev, AMDGPU_VM_PTE_COUNT * 8,
1101 AMDGPU_GPU_PAGE_SIZE, true, 1077 AMDGPU_GPU_PAGE_SIZE, true,
1102 AMDGPU_GEM_DOMAIN_VRAM, 1078 AMDGPU_GEM_DOMAIN_VRAM,
1103 AMDGPU_GEM_CREATE_NO_CPU_ACCESS, 1079 AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
1104 NULL, &pt); 1080 NULL, resv, &pt);
1081 ww_mutex_unlock(&resv->lock);
1105 if (r) 1082 if (r)
1106 goto error_free; 1083 goto error_free;
1107 1084
@@ -1303,7 +1280,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
1303 r = amdgpu_bo_create(adev, pd_size, align, true, 1280 r = amdgpu_bo_create(adev, pd_size, align, true,
1304 AMDGPU_GEM_DOMAIN_VRAM, 1281 AMDGPU_GEM_DOMAIN_VRAM,
1305 AMDGPU_GEM_CREATE_NO_CPU_ACCESS, 1282 AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
1306 NULL, &vm->page_directory); 1283 NULL, NULL, &vm->page_directory);
1307 if (r) 1284 if (r)
1308 return r; 1285 return r;
1309 1286
diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c b/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
index cd6edc40c9cd..1e0bba29e167 100644
--- a/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
@@ -1279,8 +1279,7 @@ amdgpu_atombios_encoder_setup_dig(struct drm_encoder *encoder, int action)
1279 amdgpu_atombios_encoder_setup_dig_encoder(encoder, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0); 1279 amdgpu_atombios_encoder_setup_dig_encoder(encoder, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0);
1280 } 1280 }
1281 if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) 1281 if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
1282 amdgpu_atombios_encoder_setup_dig_transmitter(encoder, 1282 amdgpu_atombios_encoder_set_backlight_level(amdgpu_encoder, dig->backlight_level);
1283 ATOM_TRANSMITTER_ACTION_LCD_BLON, 0, 0);
1284 if (ext_encoder) 1283 if (ext_encoder)
1285 amdgpu_atombios_encoder_setup_external_encoder(encoder, ext_encoder, ATOM_ENABLE); 1284 amdgpu_atombios_encoder_setup_external_encoder(encoder, ext_encoder, ATOM_ENABLE);
1286 } else { 1285 } else {
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_smc.c b/drivers/gpu/drm/amd/amdgpu/cz_smc.c
index a72ffc7d6c26..e33180d3314a 100644
--- a/drivers/gpu/drm/amd/amdgpu/cz_smc.c
+++ b/drivers/gpu/drm/amd/amdgpu/cz_smc.c
@@ -814,7 +814,8 @@ int cz_smu_init(struct amdgpu_device *adev)
814 * 3. map kernel virtual address 814 * 3. map kernel virtual address
815 */ 815 */
816 ret = amdgpu_bo_create(adev, priv->toc_buffer.data_size, PAGE_SIZE, 816 ret = amdgpu_bo_create(adev, priv->toc_buffer.data_size, PAGE_SIZE,
817 true, AMDGPU_GEM_DOMAIN_GTT, 0, NULL, toc_buf); 817 true, AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
818 toc_buf);
818 819
819 if (ret) { 820 if (ret) {
820 dev_err(adev->dev, "(%d) SMC TOC buffer allocation failed\n", ret); 821 dev_err(adev->dev, "(%d) SMC TOC buffer allocation failed\n", ret);
@@ -822,7 +823,8 @@ int cz_smu_init(struct amdgpu_device *adev)
822 } 823 }
823 824
824 ret = amdgpu_bo_create(adev, priv->smu_buffer.data_size, PAGE_SIZE, 825 ret = amdgpu_bo_create(adev, priv->smu_buffer.data_size, PAGE_SIZE,
825 true, AMDGPU_GEM_DOMAIN_GTT, 0, NULL, smu_buf); 826 true, AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
827 smu_buf);
826 828
827 if (ret) { 829 if (ret) {
828 dev_err(adev->dev, "(%d) SMC Internal buffer allocation failed\n", ret); 830 dev_err(adev->dev, "(%d) SMC Internal buffer allocation failed\n", ret);
diff --git a/drivers/gpu/drm/amd/amdgpu/fiji_smc.c b/drivers/gpu/drm/amd/amdgpu/fiji_smc.c
index 322edea65857..bda1249eb871 100644
--- a/drivers/gpu/drm/amd/amdgpu/fiji_smc.c
+++ b/drivers/gpu/drm/amd/amdgpu/fiji_smc.c
@@ -764,7 +764,7 @@ int fiji_smu_init(struct amdgpu_device *adev)
764 ret = amdgpu_bo_create(adev, image_size, PAGE_SIZE, 764 ret = amdgpu_bo_create(adev, image_size, PAGE_SIZE,
765 true, AMDGPU_GEM_DOMAIN_VRAM, 765 true, AMDGPU_GEM_DOMAIN_VRAM,
766 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 766 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
767 NULL, toc_buf); 767 NULL, NULL, toc_buf);
768 if (ret) { 768 if (ret) {
769 DRM_ERROR("Failed to allocate memory for TOC buffer\n"); 769 DRM_ERROR("Failed to allocate memory for TOC buffer\n");
770 return -ENOMEM; 770 return -ENOMEM;
@@ -774,7 +774,7 @@ int fiji_smu_init(struct amdgpu_device *adev)
774 ret = amdgpu_bo_create(adev, smu_internal_buffer_size, PAGE_SIZE, 774 ret = amdgpu_bo_create(adev, smu_internal_buffer_size, PAGE_SIZE,
775 true, AMDGPU_GEM_DOMAIN_VRAM, 775 true, AMDGPU_GEM_DOMAIN_VRAM,
776 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 776 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
777 NULL, smu_buf); 777 NULL, NULL, smu_buf);
778 if (ret) { 778 if (ret) {
779 DRM_ERROR("Failed to allocate memory for SMU internal buffer\n"); 779 DRM_ERROR("Failed to allocate memory for SMU internal buffer\n");
780 return -ENOMEM; 780 return -ENOMEM;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 4bd1e5cf65ca..e992bf2ff66c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -3206,7 +3206,7 @@ static int gfx_v7_0_mec_init(struct amdgpu_device *adev)
3206 r = amdgpu_bo_create(adev, 3206 r = amdgpu_bo_create(adev,
3207 adev->gfx.mec.num_mec *adev->gfx.mec.num_pipe * MEC_HPD_SIZE * 2, 3207 adev->gfx.mec.num_mec *adev->gfx.mec.num_pipe * MEC_HPD_SIZE * 2,
3208 PAGE_SIZE, true, 3208 PAGE_SIZE, true,
3209 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, 3209 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
3210 &adev->gfx.mec.hpd_eop_obj); 3210 &adev->gfx.mec.hpd_eop_obj);
3211 if (r) { 3211 if (r) {
3212 dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r); 3212 dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
@@ -3373,7 +3373,7 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
3373 r = amdgpu_bo_create(adev, 3373 r = amdgpu_bo_create(adev,
3374 sizeof(struct bonaire_mqd), 3374 sizeof(struct bonaire_mqd),
3375 PAGE_SIZE, true, 3375 PAGE_SIZE, true,
3376 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, 3376 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
3377 &ring->mqd_obj); 3377 &ring->mqd_obj);
3378 if (r) { 3378 if (r) {
3379 dev_warn(adev->dev, "(%d) create MQD bo failed\n", r); 3379 dev_warn(adev->dev, "(%d) create MQD bo failed\n", r);
@@ -3610,41 +3610,6 @@ static int gfx_v7_0_cp_resume(struct amdgpu_device *adev)
3610 return 0; 3610 return 0;
3611} 3611}
3612 3612
3613static void gfx_v7_0_ce_sync_me(struct amdgpu_ring *ring)
3614{
3615 struct amdgpu_device *adev = ring->adev;
3616 u64 gpu_addr = adev->wb.gpu_addr + adev->gfx.ce_sync_offs * 4;
3617
3618 /* instruct DE to set a magic number */
3619 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
3620 amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |
3621 WRITE_DATA_DST_SEL(5)));
3622 amdgpu_ring_write(ring, gpu_addr & 0xfffffffc);
3623 amdgpu_ring_write(ring, upper_32_bits(gpu_addr) & 0xffffffff);
3624 amdgpu_ring_write(ring, 1);
3625
3626 /* let CE wait till condition satisfied */
3627 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));
3628 amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(0) | /* wait */
3629 WAIT_REG_MEM_MEM_SPACE(1) | /* memory */
3630 WAIT_REG_MEM_FUNCTION(3) | /* == */
3631 WAIT_REG_MEM_ENGINE(2))); /* ce */
3632 amdgpu_ring_write(ring, gpu_addr & 0xfffffffc);
3633 amdgpu_ring_write(ring, upper_32_bits(gpu_addr) & 0xffffffff);
3634 amdgpu_ring_write(ring, 1);
3635 amdgpu_ring_write(ring, 0xffffffff);
3636 amdgpu_ring_write(ring, 4); /* poll interval */
3637
3638 /* instruct CE to reset wb of ce_sync to zero */
3639 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
3640 amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |
3641 WRITE_DATA_DST_SEL(5) |
3642 WR_CONFIRM));
3643 amdgpu_ring_write(ring, gpu_addr & 0xfffffffc);
3644 amdgpu_ring_write(ring, upper_32_bits(gpu_addr) & 0xffffffff);
3645 amdgpu_ring_write(ring, 0);
3646}
3647
3648/* 3613/*
3649 * vm 3614 * vm
3650 * VMID 0 is the physical GPU addresses as used by the kernel. 3615 * VMID 0 is the physical GPU addresses as used by the kernel.
@@ -3663,6 +3628,13 @@ static void gfx_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
3663 unsigned vm_id, uint64_t pd_addr) 3628 unsigned vm_id, uint64_t pd_addr)
3664{ 3629{
3665 int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX); 3630 int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX);
3631 if (usepfp) {
3632 /* synce CE with ME to prevent CE fetch CEIB before context switch done */
3633 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
3634 amdgpu_ring_write(ring, 0);
3635 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
3636 amdgpu_ring_write(ring, 0);
3637 }
3666 3638
3667 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); 3639 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
3668 amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) | 3640 amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |
@@ -3703,7 +3675,10 @@ static void gfx_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
3703 amdgpu_ring_write(ring, 0x0); 3675 amdgpu_ring_write(ring, 0x0);
3704 3676
3705 /* synce CE with ME to prevent CE fetch CEIB before context switch done */ 3677 /* synce CE with ME to prevent CE fetch CEIB before context switch done */
3706 gfx_v7_0_ce_sync_me(ring); 3678 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
3679 amdgpu_ring_write(ring, 0);
3680 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
3681 amdgpu_ring_write(ring, 0);
3707 } 3682 }
3708} 3683}
3709 3684
@@ -3788,7 +3763,8 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
3788 r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true, 3763 r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
3789 AMDGPU_GEM_DOMAIN_VRAM, 3764 AMDGPU_GEM_DOMAIN_VRAM,
3790 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 3765 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
3791 NULL, &adev->gfx.rlc.save_restore_obj); 3766 NULL, NULL,
3767 &adev->gfx.rlc.save_restore_obj);
3792 if (r) { 3768 if (r) {
3793 dev_warn(adev->dev, "(%d) create RLC sr bo failed\n", r); 3769 dev_warn(adev->dev, "(%d) create RLC sr bo failed\n", r);
3794 return r; 3770 return r;
@@ -3831,7 +3807,8 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
3831 r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true, 3807 r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
3832 AMDGPU_GEM_DOMAIN_VRAM, 3808 AMDGPU_GEM_DOMAIN_VRAM,
3833 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 3809 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
3834 NULL, &adev->gfx.rlc.clear_state_obj); 3810 NULL, NULL,
3811 &adev->gfx.rlc.clear_state_obj);
3835 if (r) { 3812 if (r) {
3836 dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r); 3813 dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
3837 gfx_v7_0_rlc_fini(adev); 3814 gfx_v7_0_rlc_fini(adev);
@@ -3870,7 +3847,8 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
3870 r = amdgpu_bo_create(adev, adev->gfx.rlc.cp_table_size, PAGE_SIZE, true, 3847 r = amdgpu_bo_create(adev, adev->gfx.rlc.cp_table_size, PAGE_SIZE, true,
3871 AMDGPU_GEM_DOMAIN_VRAM, 3848 AMDGPU_GEM_DOMAIN_VRAM,
3872 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 3849 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
3873 NULL, &adev->gfx.rlc.cp_table_obj); 3850 NULL, NULL,
3851 &adev->gfx.rlc.cp_table_obj);
3874 if (r) { 3852 if (r) {
3875 dev_warn(adev->dev, "(%d) create RLC cp table bo failed\n", r); 3853 dev_warn(adev->dev, "(%d) create RLC cp table bo failed\n", r);
3876 gfx_v7_0_rlc_fini(adev); 3854 gfx_v7_0_rlc_fini(adev);
@@ -4802,12 +4780,6 @@ static int gfx_v7_0_sw_init(void *handle)
4802 return r; 4780 return r;
4803 } 4781 }
4804 4782
4805 r = amdgpu_wb_get(adev, &adev->gfx.ce_sync_offs);
4806 if (r) {
4807 DRM_ERROR("(%d) gfx.ce_sync_offs wb alloc failed\n", r);
4808 return r;
4809 }
4810
4811 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { 4783 for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
4812 ring = &adev->gfx.gfx_ring[i]; 4784 ring = &adev->gfx.gfx_ring[i];
4813 ring->ring_obj = NULL; 4785 ring->ring_obj = NULL;
@@ -4851,21 +4823,21 @@ static int gfx_v7_0_sw_init(void *handle)
4851 r = amdgpu_bo_create(adev, adev->gds.mem.gfx_partition_size, 4823 r = amdgpu_bo_create(adev, adev->gds.mem.gfx_partition_size,
4852 PAGE_SIZE, true, 4824 PAGE_SIZE, true,
4853 AMDGPU_GEM_DOMAIN_GDS, 0, 4825 AMDGPU_GEM_DOMAIN_GDS, 0,
4854 NULL, &adev->gds.gds_gfx_bo); 4826 NULL, NULL, &adev->gds.gds_gfx_bo);
4855 if (r) 4827 if (r)
4856 return r; 4828 return r;
4857 4829
4858 r = amdgpu_bo_create(adev, adev->gds.gws.gfx_partition_size, 4830 r = amdgpu_bo_create(adev, adev->gds.gws.gfx_partition_size,
4859 PAGE_SIZE, true, 4831 PAGE_SIZE, true,
4860 AMDGPU_GEM_DOMAIN_GWS, 0, 4832 AMDGPU_GEM_DOMAIN_GWS, 0,
4861 NULL, &adev->gds.gws_gfx_bo); 4833 NULL, NULL, &adev->gds.gws_gfx_bo);
4862 if (r) 4834 if (r)
4863 return r; 4835 return r;
4864 4836
4865 r = amdgpu_bo_create(adev, adev->gds.oa.gfx_partition_size, 4837 r = amdgpu_bo_create(adev, adev->gds.oa.gfx_partition_size,
4866 PAGE_SIZE, true, 4838 PAGE_SIZE, true,
4867 AMDGPU_GEM_DOMAIN_OA, 0, 4839 AMDGPU_GEM_DOMAIN_OA, 0,
4868 NULL, &adev->gds.oa_gfx_bo); 4840 NULL, NULL, &adev->gds.oa_gfx_bo);
4869 if (r) 4841 if (r)
4870 return r; 4842 return r;
4871 4843
@@ -4886,8 +4858,6 @@ static int gfx_v7_0_sw_fini(void *handle)
4886 for (i = 0; i < adev->gfx.num_compute_rings; i++) 4858 for (i = 0; i < adev->gfx.num_compute_rings; i++)
4887 amdgpu_ring_fini(&adev->gfx.compute_ring[i]); 4859 amdgpu_ring_fini(&adev->gfx.compute_ring[i]);
4888 4860
4889 amdgpu_wb_free(adev, adev->gfx.ce_sync_offs);
4890
4891 gfx_v7_0_cp_compute_fini(adev); 4861 gfx_v7_0_cp_compute_fini(adev);
4892 gfx_v7_0_rlc_fini(adev); 4862 gfx_v7_0_rlc_fini(adev);
4893 gfx_v7_0_mec_fini(adev); 4863 gfx_v7_0_mec_fini(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 53f07439a512..cb4f68f53f24 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -868,7 +868,7 @@ static int gfx_v8_0_mec_init(struct amdgpu_device *adev)
868 r = amdgpu_bo_create(adev, 868 r = amdgpu_bo_create(adev,
869 adev->gfx.mec.num_mec *adev->gfx.mec.num_pipe * MEC_HPD_SIZE * 2, 869 adev->gfx.mec.num_mec *adev->gfx.mec.num_pipe * MEC_HPD_SIZE * 2,
870 PAGE_SIZE, true, 870 PAGE_SIZE, true,
871 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, 871 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, NULL,
872 &adev->gfx.mec.hpd_eop_obj); 872 &adev->gfx.mec.hpd_eop_obj);
873 if (r) { 873 if (r) {
874 dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r); 874 dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r);
@@ -940,12 +940,6 @@ static int gfx_v8_0_sw_init(void *handle)
940 return r; 940 return r;
941 } 941 }
942 942
943 r = amdgpu_wb_get(adev, &adev->gfx.ce_sync_offs);
944 if (r) {
945 DRM_ERROR("(%d) gfx.ce_sync_offs wb alloc failed\n", r);
946 return r;
947 }
948
949 /* set up the gfx ring */ 943 /* set up the gfx ring */
950 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { 944 for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
951 ring = &adev->gfx.gfx_ring[i]; 945 ring = &adev->gfx.gfx_ring[i];
@@ -995,21 +989,21 @@ static int gfx_v8_0_sw_init(void *handle)
995 /* reserve GDS, GWS and OA resource for gfx */ 989 /* reserve GDS, GWS and OA resource for gfx */
996 r = amdgpu_bo_create(adev, adev->gds.mem.gfx_partition_size, 990 r = amdgpu_bo_create(adev, adev->gds.mem.gfx_partition_size,
997 PAGE_SIZE, true, 991 PAGE_SIZE, true,
998 AMDGPU_GEM_DOMAIN_GDS, 0, 992 AMDGPU_GEM_DOMAIN_GDS, 0, NULL,
999 NULL, &adev->gds.gds_gfx_bo); 993 NULL, &adev->gds.gds_gfx_bo);
1000 if (r) 994 if (r)
1001 return r; 995 return r;
1002 996
1003 r = amdgpu_bo_create(adev, adev->gds.gws.gfx_partition_size, 997 r = amdgpu_bo_create(adev, adev->gds.gws.gfx_partition_size,
1004 PAGE_SIZE, true, 998 PAGE_SIZE, true,
1005 AMDGPU_GEM_DOMAIN_GWS, 0, 999 AMDGPU_GEM_DOMAIN_GWS, 0, NULL,
1006 NULL, &adev->gds.gws_gfx_bo); 1000 NULL, &adev->gds.gws_gfx_bo);
1007 if (r) 1001 if (r)
1008 return r; 1002 return r;
1009 1003
1010 r = amdgpu_bo_create(adev, adev->gds.oa.gfx_partition_size, 1004 r = amdgpu_bo_create(adev, adev->gds.oa.gfx_partition_size,
1011 PAGE_SIZE, true, 1005 PAGE_SIZE, true,
1012 AMDGPU_GEM_DOMAIN_OA, 0, 1006 AMDGPU_GEM_DOMAIN_OA, 0, NULL,
1013 NULL, &adev->gds.oa_gfx_bo); 1007 NULL, &adev->gds.oa_gfx_bo);
1014 if (r) 1008 if (r)
1015 return r; 1009 return r;
@@ -1033,8 +1027,6 @@ static int gfx_v8_0_sw_fini(void *handle)
1033 for (i = 0; i < adev->gfx.num_compute_rings; i++) 1027 for (i = 0; i < adev->gfx.num_compute_rings; i++)
1034 amdgpu_ring_fini(&adev->gfx.compute_ring[i]); 1028 amdgpu_ring_fini(&adev->gfx.compute_ring[i]);
1035 1029
1036 amdgpu_wb_free(adev, adev->gfx.ce_sync_offs);
1037
1038 gfx_v8_0_mec_fini(adev); 1030 gfx_v8_0_mec_fini(adev);
1039 1031
1040 return 0; 1032 return 0;
@@ -3106,7 +3098,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
3106 sizeof(struct vi_mqd), 3098 sizeof(struct vi_mqd),
3107 PAGE_SIZE, true, 3099 PAGE_SIZE, true,
3108 AMDGPU_GEM_DOMAIN_GTT, 0, NULL, 3100 AMDGPU_GEM_DOMAIN_GTT, 0, NULL,
3109 &ring->mqd_obj); 3101 NULL, &ring->mqd_obj);
3110 if (r) { 3102 if (r) {
3111 dev_warn(adev->dev, "(%d) create MQD bo failed\n", r); 3103 dev_warn(adev->dev, "(%d) create MQD bo failed\n", r);
3112 return r; 3104 return r;
@@ -3965,6 +3957,7 @@ static void gfx_v8_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr,
3965 DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); 3957 DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));
3966 amdgpu_ring_write(ring, lower_32_bits(seq)); 3958 amdgpu_ring_write(ring, lower_32_bits(seq));
3967 amdgpu_ring_write(ring, upper_32_bits(seq)); 3959 amdgpu_ring_write(ring, upper_32_bits(seq));
3960
3968} 3961}
3969 3962
3970/** 3963/**
@@ -4005,49 +3998,34 @@ static bool gfx_v8_0_ring_emit_semaphore(struct amdgpu_ring *ring,
4005 return true; 3998 return true;
4006} 3999}
4007 4000
4008static void gfx_v8_0_ce_sync_me(struct amdgpu_ring *ring) 4001static void gfx_v8_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
4002 unsigned vm_id, uint64_t pd_addr)
4009{ 4003{
4010 struct amdgpu_device *adev = ring->adev; 4004 int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX);
4011 u64 gpu_addr = adev->wb.gpu_addr + adev->gfx.ce_sync_offs * 4; 4005 uint32_t seq = ring->fence_drv.sync_seq[ring->idx];
4012 4006 uint64_t addr = ring->fence_drv.gpu_addr;
4013 /* instruct DE to set a magic number */
4014 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
4015 amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |
4016 WRITE_DATA_DST_SEL(5)));
4017 amdgpu_ring_write(ring, gpu_addr & 0xfffffffc);
4018 amdgpu_ring_write(ring, upper_32_bits(gpu_addr) & 0xffffffff);
4019 amdgpu_ring_write(ring, 1);
4020 4007
4021 /* let CE wait till condition satisfied */
4022 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); 4008 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));
4023 amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(0) | /* wait */ 4009 amdgpu_ring_write(ring, (WAIT_REG_MEM_MEM_SPACE(1) | /* memory */
4024 WAIT_REG_MEM_MEM_SPACE(1) | /* memory */ 4010 WAIT_REG_MEM_FUNCTION(3))); /* equal */
4025 WAIT_REG_MEM_FUNCTION(3) | /* == */ 4011 amdgpu_ring_write(ring, addr & 0xfffffffc);
4026 WAIT_REG_MEM_ENGINE(2))); /* ce */ 4012 amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);
4027 amdgpu_ring_write(ring, gpu_addr & 0xfffffffc); 4013 amdgpu_ring_write(ring, seq);
4028 amdgpu_ring_write(ring, upper_32_bits(gpu_addr) & 0xffffffff);
4029 amdgpu_ring_write(ring, 1);
4030 amdgpu_ring_write(ring, 0xffffffff); 4014 amdgpu_ring_write(ring, 0xffffffff);
4031 amdgpu_ring_write(ring, 4); /* poll interval */ 4015 amdgpu_ring_write(ring, 4); /* poll interval */
4032 4016
4033 /* instruct CE to reset wb of ce_sync to zero */ 4017 if (usepfp) {
4034 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); 4018 /* synce CE with ME to prevent CE fetch CEIB before context switch done */
4035 amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) | 4019 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
4036 WRITE_DATA_DST_SEL(5) | 4020 amdgpu_ring_write(ring, 0);
4037 WR_CONFIRM)); 4021 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
4038 amdgpu_ring_write(ring, gpu_addr & 0xfffffffc); 4022 amdgpu_ring_write(ring, 0);
4039 amdgpu_ring_write(ring, upper_32_bits(gpu_addr) & 0xffffffff); 4023 }
4040 amdgpu_ring_write(ring, 0);
4041}
4042
4043static void gfx_v8_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
4044 unsigned vm_id, uint64_t pd_addr)
4045{
4046 int usepfp = (ring->type == AMDGPU_RING_TYPE_GFX);
4047 4024
4048 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); 4025 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
4049 amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) | 4026 amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |
4050 WRITE_DATA_DST_SEL(0))); 4027 WRITE_DATA_DST_SEL(0)) |
4028 WR_CONFIRM);
4051 if (vm_id < 8) { 4029 if (vm_id < 8) {
4052 amdgpu_ring_write(ring, 4030 amdgpu_ring_write(ring,
4053 (mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + vm_id)); 4031 (mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + vm_id));
@@ -4083,9 +4061,10 @@ static void gfx_v8_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
4083 /* sync PFP to ME, otherwise we might get invalid PFP reads */ 4061 /* sync PFP to ME, otherwise we might get invalid PFP reads */
4084 amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); 4062 amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
4085 amdgpu_ring_write(ring, 0x0); 4063 amdgpu_ring_write(ring, 0x0);
4086 4064 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
4087 /* synce CE with ME to prevent CE fetch CEIB before context switch done */ 4065 amdgpu_ring_write(ring, 0);
4088 gfx_v8_0_ce_sync_me(ring); 4066 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
4067 amdgpu_ring_write(ring, 0);
4089 } 4068 }
4090} 4069}
4091 4070
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 774528ab8704..fab5471d25d7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -1262,6 +1262,12 @@ static int gmc_v7_0_process_interrupt(struct amdgpu_device *adev,
1262 addr = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR); 1262 addr = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR);
1263 status = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS); 1263 status = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS);
1264 mc_client = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT); 1264 mc_client = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT);
1265 /* reset addr and status */
1266 WREG32_P(mmVM_CONTEXT1_CNTL2, 1, ~1);
1267
1268 if (!addr && !status)
1269 return 0;
1270
1265 dev_err(adev->dev, "GPU fault detected: %d 0x%08x\n", 1271 dev_err(adev->dev, "GPU fault detected: %d 0x%08x\n",
1266 entry->src_id, entry->src_data); 1272 entry->src_id, entry->src_data);
1267 dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", 1273 dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n",
@@ -1269,8 +1275,6 @@ static int gmc_v7_0_process_interrupt(struct amdgpu_device *adev,
1269 dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", 1275 dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
1270 status); 1276 status);
1271 gmc_v7_0_vm_decode_fault(adev, status, addr, mc_client); 1277 gmc_v7_0_vm_decode_fault(adev, status, addr, mc_client);
1272 /* reset addr and status */
1273 WREG32_P(mmVM_CONTEXT1_CNTL2, 1, ~1);
1274 1278
1275 return 0; 1279 return 0;
1276} 1280}
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 9a07742620d0..7bc9e9fcf3d2 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -1262,6 +1262,12 @@ static int gmc_v8_0_process_interrupt(struct amdgpu_device *adev,
1262 addr = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR); 1262 addr = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR);
1263 status = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS); 1263 status = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS);
1264 mc_client = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT); 1264 mc_client = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT);
1265 /* reset addr and status */
1266 WREG32_P(mmVM_CONTEXT1_CNTL2, 1, ~1);
1267
1268 if (!addr && !status)
1269 return 0;
1270
1265 dev_err(adev->dev, "GPU fault detected: %d 0x%08x\n", 1271 dev_err(adev->dev, "GPU fault detected: %d 0x%08x\n",
1266 entry->src_id, entry->src_data); 1272 entry->src_id, entry->src_data);
1267 dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", 1273 dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n",
@@ -1269,8 +1275,6 @@ static int gmc_v8_0_process_interrupt(struct amdgpu_device *adev,
1269 dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", 1275 dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
1270 status); 1276 status);
1271 gmc_v8_0_vm_decode_fault(adev, status, addr, mc_client); 1277 gmc_v8_0_vm_decode_fault(adev, status, addr, mc_client);
1272 /* reset addr and status */
1273 WREG32_P(mmVM_CONTEXT1_CNTL2, 1, ~1);
1274 1278
1275 return 0; 1279 return 0;
1276} 1280}
diff --git a/drivers/gpu/drm/amd/amdgpu/iceland_smc.c b/drivers/gpu/drm/amd/amdgpu/iceland_smc.c
index c900aa942ade..966d4b2ed9da 100644
--- a/drivers/gpu/drm/amd/amdgpu/iceland_smc.c
+++ b/drivers/gpu/drm/amd/amdgpu/iceland_smc.c
@@ -625,7 +625,7 @@ int iceland_smu_init(struct amdgpu_device *adev)
625 ret = amdgpu_bo_create(adev, image_size, PAGE_SIZE, 625 ret = amdgpu_bo_create(adev, image_size, PAGE_SIZE,
626 true, AMDGPU_GEM_DOMAIN_VRAM, 626 true, AMDGPU_GEM_DOMAIN_VRAM,
627 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 627 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
628 NULL, toc_buf); 628 NULL, NULL, toc_buf);
629 if (ret) { 629 if (ret) {
630 DRM_ERROR("Failed to allocate memory for TOC buffer\n"); 630 DRM_ERROR("Failed to allocate memory for TOC buffer\n");
631 return -ENOMEM; 631 return -ENOMEM;
diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_smc.c b/drivers/gpu/drm/amd/amdgpu/tonga_smc.c
index 1f5ac941a610..5421309c1862 100644
--- a/drivers/gpu/drm/amd/amdgpu/tonga_smc.c
+++ b/drivers/gpu/drm/amd/amdgpu/tonga_smc.c
@@ -763,7 +763,7 @@ int tonga_smu_init(struct amdgpu_device *adev)
763 ret = amdgpu_bo_create(adev, image_size, PAGE_SIZE, 763 ret = amdgpu_bo_create(adev, image_size, PAGE_SIZE,
764 true, AMDGPU_GEM_DOMAIN_VRAM, 764 true, AMDGPU_GEM_DOMAIN_VRAM,
765 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 765 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
766 NULL, toc_buf); 766 NULL, NULL, toc_buf);
767 if (ret) { 767 if (ret) {
768 DRM_ERROR("Failed to allocate memory for TOC buffer\n"); 768 DRM_ERROR("Failed to allocate memory for TOC buffer\n");
769 return -ENOMEM; 769 return -ENOMEM;
@@ -773,7 +773,7 @@ int tonga_smu_init(struct amdgpu_device *adev)
773 ret = amdgpu_bo_create(adev, smu_internal_buffer_size, PAGE_SIZE, 773 ret = amdgpu_bo_create(adev, smu_internal_buffer_size, PAGE_SIZE,
774 true, AMDGPU_GEM_DOMAIN_VRAM, 774 true, AMDGPU_GEM_DOMAIN_VRAM,
775 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, 775 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
776 NULL, smu_buf); 776 NULL, NULL, smu_buf);
777 if (ret) { 777 if (ret) {
778 DRM_ERROR("Failed to allocate memory for SMU internal buffer\n"); 778 DRM_ERROR("Failed to allocate memory for SMU internal buffer\n");
779 return -ENOMEM; 779 return -ENOMEM;
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index 5fac5da694f0..ed50dd725788 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
@@ -224,11 +224,11 @@ static int uvd_v4_2_suspend(void *handle)
224 int r; 224 int r;
225 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 225 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
226 226
227 r = uvd_v4_2_hw_fini(adev); 227 r = amdgpu_uvd_suspend(adev);
228 if (r) 228 if (r)
229 return r; 229 return r;
230 230
231 r = amdgpu_uvd_suspend(adev); 231 r = uvd_v4_2_hw_fini(adev);
232 if (r) 232 if (r)
233 return r; 233 return r;
234 234
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index 2d5c59c318af..9ad8b9906c0b 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -220,11 +220,11 @@ static int uvd_v5_0_suspend(void *handle)
220 int r; 220 int r;
221 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 221 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
222 222
223 r = uvd_v5_0_hw_fini(adev); 223 r = amdgpu_uvd_suspend(adev);
224 if (r) 224 if (r)
225 return r; 225 return r;
226 226
227 r = amdgpu_uvd_suspend(adev); 227 r = uvd_v5_0_hw_fini(adev);
228 if (r) 228 if (r)
229 return r; 229 return r;
230 230
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index d9f553fce531..7e9934fa4193 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -214,14 +214,16 @@ static int uvd_v6_0_suspend(void *handle)
214 int r; 214 int r;
215 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 215 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
216 216
217 /* Skip this for APU for now */
218 if (!(adev->flags & AMD_IS_APU)) {
219 r = amdgpu_uvd_suspend(adev);
220 if (r)
221 return r;
222 }
217 r = uvd_v6_0_hw_fini(adev); 223 r = uvd_v6_0_hw_fini(adev);
218 if (r) 224 if (r)
219 return r; 225 return r;
220 226
221 r = amdgpu_uvd_suspend(adev);
222 if (r)
223 return r;
224
225 return r; 227 return r;
226} 228}
227 229
@@ -230,10 +232,12 @@ static int uvd_v6_0_resume(void *handle)
230 int r; 232 int r;
231 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 233 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
232 234
233 r = amdgpu_uvd_resume(adev); 235 /* Skip this for APU for now */
234 if (r) 236 if (!(adev->flags & AMD_IS_APU)) {
235 return r; 237 r = amdgpu_uvd_resume(adev);
236 238 if (r)
239 return r;
240 }
237 r = uvd_v6_0_hw_init(adev); 241 r = uvd_v6_0_hw_init(adev);
238 if (r) 242 if (r)
239 return r; 243 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 552d9e75ad1b..b55ceb14fdcd 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1400,7 +1400,8 @@ static int vi_common_early_init(void *handle)
1400 case CHIP_CARRIZO: 1400 case CHIP_CARRIZO:
1401 adev->has_uvd = true; 1401 adev->has_uvd = true;
1402 adev->cg_flags = 0; 1402 adev->cg_flags = 0;
1403 adev->pg_flags = AMDGPU_PG_SUPPORT_UVD | AMDGPU_PG_SUPPORT_VCE; 1403 /* Disable UVD pg */
1404 adev->pg_flags = /* AMDGPU_PG_SUPPORT_UVD | */AMDGPU_PG_SUPPORT_VCE;
1404 adev->external_rev_id = adev->rev_id + 0x1; 1405 adev->external_rev_id = adev->rev_id + 0x1;
1405 if (amdgpu_smc_load_fw && smc_enabled) 1406 if (amdgpu_smc_load_fw && smc_enabled)
1406 adev->firmware.smu_load = true; 1407 adev->firmware.smu_load = true;
diff --git a/drivers/gpu/drm/amd/include/cgs_linux.h b/drivers/gpu/drm/amd/include/cgs_linux.h
index 488642f08267..3b47ae313e36 100644
--- a/drivers/gpu/drm/amd/include/cgs_linux.h
+++ b/drivers/gpu/drm/amd/include/cgs_linux.h
@@ -27,19 +27,6 @@
27#include "cgs_common.h" 27#include "cgs_common.h"
28 28
29/** 29/**
30 * cgs_import_gpu_mem() - Import dmabuf handle
31 * @cgs_device: opaque device handle
32 * @dmabuf_fd: DMABuf file descriptor
33 * @handle: memory handle (output)
34 *
35 * Must be called in the process context that dmabuf_fd belongs to.
36 *
37 * Return: 0 on success, -errno otherwise
38 */
39typedef int (*cgs_import_gpu_mem_t)(void *cgs_device, int dmabuf_fd,
40 cgs_handle_t *handle);
41
42/**
43 * cgs_irq_source_set_func() - Callback for enabling/disabling interrupt sources 30 * cgs_irq_source_set_func() - Callback for enabling/disabling interrupt sources
44 * @private_data: private data provided to cgs_add_irq_source 31 * @private_data: private data provided to cgs_add_irq_source
45 * @src_id: interrupt source ID 32 * @src_id: interrupt source ID
@@ -114,16 +101,12 @@ typedef int (*cgs_irq_get_t)(void *cgs_device, unsigned src_id, unsigned type);
114typedef int (*cgs_irq_put_t)(void *cgs_device, unsigned src_id, unsigned type); 101typedef int (*cgs_irq_put_t)(void *cgs_device, unsigned src_id, unsigned type);
115 102
116struct cgs_os_ops { 103struct cgs_os_ops {
117 cgs_import_gpu_mem_t import_gpu_mem;
118
119 /* IRQ handling */ 104 /* IRQ handling */
120 cgs_add_irq_source_t add_irq_source; 105 cgs_add_irq_source_t add_irq_source;
121 cgs_irq_get_t irq_get; 106 cgs_irq_get_t irq_get;
122 cgs_irq_put_t irq_put; 107 cgs_irq_put_t irq_put;
123}; 108};
124 109
125#define cgs_import_gpu_mem(dev,dmabuf_fd,handle) \
126 CGS_OS_CALL(import_gpu_mem,dev,dmabuf_fd,handle)
127#define cgs_add_irq_source(dev,src_id,num_types,set,handler,private_data) \ 110#define cgs_add_irq_source(dev,src_id,num_types,set,handler,private_data) \
128 CGS_OS_CALL(add_irq_source,dev,src_id,num_types,set,handler, \ 111 CGS_OS_CALL(add_irq_source,dev,src_id,num_types,set,handler, \
129 private_data) 112 private_data)
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_sched_trace.h b/drivers/gpu/drm/amd/scheduler/gpu_sched_trace.h
new file mode 100644
index 000000000000..144f50acc971
--- /dev/null
+++ b/drivers/gpu/drm/amd/scheduler/gpu_sched_trace.h
@@ -0,0 +1,41 @@
1#if !defined(_GPU_SCHED_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
2#define _GPU_SCHED_TRACE_H_
3
4#include <linux/stringify.h>
5#include <linux/types.h>
6#include <linux/tracepoint.h>
7
8#include <drm/drmP.h>
9
10#undef TRACE_SYSTEM
11#define TRACE_SYSTEM gpu_sched
12#define TRACE_INCLUDE_FILE gpu_sched_trace
13
14TRACE_EVENT(amd_sched_job,
15 TP_PROTO(struct amd_sched_job *sched_job),
16 TP_ARGS(sched_job),
17 TP_STRUCT__entry(
18 __field(struct amd_sched_entity *, entity)
19 __field(const char *, name)
20 __field(u32, job_count)
21 __field(int, hw_job_count)
22 ),
23
24 TP_fast_assign(
25 __entry->entity = sched_job->s_entity;
26 __entry->name = sched_job->sched->name;
27 __entry->job_count = kfifo_len(
28 &sched_job->s_entity->job_queue) / sizeof(sched_job);
29 __entry->hw_job_count = atomic_read(
30 &sched_job->sched->hw_rq_count);
31 ),
32 TP_printk("entity=%p, ring=%s, job count:%u, hw job count:%d",
33 __entry->entity, __entry->name, __entry->job_count,
34 __entry->hw_job_count)
35);
36#endif
37
38/* This part must be outside protection */
39#undef TRACE_INCLUDE_PATH
40#define TRACE_INCLUDE_PATH .
41#include <trace/define_trace.h>
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
index 9259f1b6664c..3697eeeecf82 100644
--- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
+++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
@@ -27,6 +27,9 @@
27#include <drm/drmP.h> 27#include <drm/drmP.h>
28#include "gpu_scheduler.h" 28#include "gpu_scheduler.h"
29 29
30#define CREATE_TRACE_POINTS
31#include "gpu_sched_trace.h"
32
30static struct amd_sched_job * 33static struct amd_sched_job *
31amd_sched_entity_pop_job(struct amd_sched_entity *entity); 34amd_sched_entity_pop_job(struct amd_sched_entity *entity);
32static void amd_sched_wakeup(struct amd_gpu_scheduler *sched); 35static void amd_sched_wakeup(struct amd_gpu_scheduler *sched);
@@ -65,29 +68,29 @@ static struct amd_sched_job *
65amd_sched_rq_select_job(struct amd_sched_rq *rq) 68amd_sched_rq_select_job(struct amd_sched_rq *rq)
66{ 69{
67 struct amd_sched_entity *entity; 70 struct amd_sched_entity *entity;
68 struct amd_sched_job *job; 71 struct amd_sched_job *sched_job;
69 72
70 spin_lock(&rq->lock); 73 spin_lock(&rq->lock);
71 74
72 entity = rq->current_entity; 75 entity = rq->current_entity;
73 if (entity) { 76 if (entity) {
74 list_for_each_entry_continue(entity, &rq->entities, list) { 77 list_for_each_entry_continue(entity, &rq->entities, list) {
75 job = amd_sched_entity_pop_job(entity); 78 sched_job = amd_sched_entity_pop_job(entity);
76 if (job) { 79 if (sched_job) {
77 rq->current_entity = entity; 80 rq->current_entity = entity;
78 spin_unlock(&rq->lock); 81 spin_unlock(&rq->lock);
79 return job; 82 return sched_job;
80 } 83 }
81 } 84 }
82 } 85 }
83 86
84 list_for_each_entry(entity, &rq->entities, list) { 87 list_for_each_entry(entity, &rq->entities, list) {
85 88
86 job = amd_sched_entity_pop_job(entity); 89 sched_job = amd_sched_entity_pop_job(entity);
87 if (job) { 90 if (sched_job) {
88 rq->current_entity = entity; 91 rq->current_entity = entity;
89 spin_unlock(&rq->lock); 92 spin_unlock(&rq->lock);
90 return job; 93 return sched_job;
91 } 94 }
92 95
93 if (entity == rq->current_entity) 96 if (entity == rq->current_entity)
@@ -115,23 +118,27 @@ int amd_sched_entity_init(struct amd_gpu_scheduler *sched,
115 struct amd_sched_rq *rq, 118 struct amd_sched_rq *rq,
116 uint32_t jobs) 119 uint32_t jobs)
117{ 120{
121 int r;
122
118 if (!(sched && entity && rq)) 123 if (!(sched && entity && rq))
119 return -EINVAL; 124 return -EINVAL;
120 125
121 memset(entity, 0, sizeof(struct amd_sched_entity)); 126 memset(entity, 0, sizeof(struct amd_sched_entity));
122 entity->belongto_rq = rq; 127 INIT_LIST_HEAD(&entity->list);
123 entity->scheduler = sched; 128 entity->rq = rq;
124 entity->fence_context = fence_context_alloc(1); 129 entity->sched = sched;
125 if(kfifo_alloc(&entity->job_queue,
126 jobs * sizeof(void *),
127 GFP_KERNEL))
128 return -EINVAL;
129 130
130 spin_lock_init(&entity->queue_lock); 131 spin_lock_init(&entity->queue_lock);
132 r = kfifo_alloc(&entity->job_queue, jobs * sizeof(void *), GFP_KERNEL);
133 if (r)
134 return r;
135
131 atomic_set(&entity->fence_seq, 0); 136 atomic_set(&entity->fence_seq, 0);
137 entity->fence_context = fence_context_alloc(1);
132 138
133 /* Add the entity to the run queue */ 139 /* Add the entity to the run queue */
134 amd_sched_rq_add_entity(rq, entity); 140 amd_sched_rq_add_entity(rq, entity);
141
135 return 0; 142 return 0;
136} 143}
137 144
@@ -146,8 +153,8 @@ int amd_sched_entity_init(struct amd_gpu_scheduler *sched,
146static bool amd_sched_entity_is_initialized(struct amd_gpu_scheduler *sched, 153static bool amd_sched_entity_is_initialized(struct amd_gpu_scheduler *sched,
147 struct amd_sched_entity *entity) 154 struct amd_sched_entity *entity)
148{ 155{
149 return entity->scheduler == sched && 156 return entity->sched == sched &&
150 entity->belongto_rq != NULL; 157 entity->rq != NULL;
151} 158}
152 159
153/** 160/**
@@ -177,7 +184,7 @@ static bool amd_sched_entity_is_idle(struct amd_sched_entity *entity)
177void amd_sched_entity_fini(struct amd_gpu_scheduler *sched, 184void amd_sched_entity_fini(struct amd_gpu_scheduler *sched,
178 struct amd_sched_entity *entity) 185 struct amd_sched_entity *entity)
179{ 186{
180 struct amd_sched_rq *rq = entity->belongto_rq; 187 struct amd_sched_rq *rq = entity->rq;
181 188
182 if (!amd_sched_entity_is_initialized(sched, entity)) 189 if (!amd_sched_entity_is_initialized(sched, entity))
183 return; 190 return;
@@ -198,22 +205,22 @@ static void amd_sched_entity_wakeup(struct fence *f, struct fence_cb *cb)
198 container_of(cb, struct amd_sched_entity, cb); 205 container_of(cb, struct amd_sched_entity, cb);
199 entity->dependency = NULL; 206 entity->dependency = NULL;
200 fence_put(f); 207 fence_put(f);
201 amd_sched_wakeup(entity->scheduler); 208 amd_sched_wakeup(entity->sched);
202} 209}
203 210
204static struct amd_sched_job * 211static struct amd_sched_job *
205amd_sched_entity_pop_job(struct amd_sched_entity *entity) 212amd_sched_entity_pop_job(struct amd_sched_entity *entity)
206{ 213{
207 struct amd_gpu_scheduler *sched = entity->scheduler; 214 struct amd_gpu_scheduler *sched = entity->sched;
208 struct amd_sched_job *job; 215 struct amd_sched_job *sched_job;
209 216
210 if (ACCESS_ONCE(entity->dependency)) 217 if (ACCESS_ONCE(entity->dependency))
211 return NULL; 218 return NULL;
212 219
213 if (!kfifo_out_peek(&entity->job_queue, &job, sizeof(job))) 220 if (!kfifo_out_peek(&entity->job_queue, &sched_job, sizeof(sched_job)))
214 return NULL; 221 return NULL;
215 222
216 while ((entity->dependency = sched->ops->dependency(job))) { 223 while ((entity->dependency = sched->ops->dependency(sched_job))) {
217 224
218 if (fence_add_callback(entity->dependency, &entity->cb, 225 if (fence_add_callback(entity->dependency, &entity->cb,
219 amd_sched_entity_wakeup)) 226 amd_sched_entity_wakeup))
@@ -222,32 +229,33 @@ amd_sched_entity_pop_job(struct amd_sched_entity *entity)
222 return NULL; 229 return NULL;
223 } 230 }
224 231
225 return job; 232 return sched_job;
226} 233}
227 234
228/** 235/**
229 * Helper to submit a job to the job queue 236 * Helper to submit a job to the job queue
230 * 237 *
231 * @job The pointer to job required to submit 238 * @sched_job The pointer to job required to submit
232 * 239 *
233 * Returns true if we could submit the job. 240 * Returns true if we could submit the job.
234 */ 241 */
235static bool amd_sched_entity_in(struct amd_sched_job *job) 242static bool amd_sched_entity_in(struct amd_sched_job *sched_job)
236{ 243{
237 struct amd_sched_entity *entity = job->s_entity; 244 struct amd_sched_entity *entity = sched_job->s_entity;
238 bool added, first = false; 245 bool added, first = false;
239 246
240 spin_lock(&entity->queue_lock); 247 spin_lock(&entity->queue_lock);
241 added = kfifo_in(&entity->job_queue, &job, sizeof(job)) == sizeof(job); 248 added = kfifo_in(&entity->job_queue, &sched_job,
249 sizeof(sched_job)) == sizeof(sched_job);
242 250
243 if (added && kfifo_len(&entity->job_queue) == sizeof(job)) 251 if (added && kfifo_len(&entity->job_queue) == sizeof(sched_job))
244 first = true; 252 first = true;
245 253
246 spin_unlock(&entity->queue_lock); 254 spin_unlock(&entity->queue_lock);
247 255
248 /* first job wakes up scheduler */ 256 /* first job wakes up scheduler */
249 if (first) 257 if (first)
250 amd_sched_wakeup(job->sched); 258 amd_sched_wakeup(sched_job->sched);
251 259
252 return added; 260 return added;
253} 261}
@@ -255,7 +263,7 @@ static bool amd_sched_entity_in(struct amd_sched_job *job)
255/** 263/**
256 * Submit a job to the job queue 264 * Submit a job to the job queue
257 * 265 *
258 * @job The pointer to job required to submit 266 * @sched_job The pointer to job required to submit
259 * 267 *
260 * Returns 0 for success, negative error code otherwise. 268 * Returns 0 for success, negative error code otherwise.
261 */ 269 */
@@ -271,9 +279,9 @@ int amd_sched_entity_push_job(struct amd_sched_job *sched_job)
271 fence_get(&fence->base); 279 fence_get(&fence->base);
272 sched_job->s_fence = fence; 280 sched_job->s_fence = fence;
273 281
274 wait_event(entity->scheduler->job_scheduled, 282 wait_event(entity->sched->job_scheduled,
275 amd_sched_entity_in(sched_job)); 283 amd_sched_entity_in(sched_job));
276 284 trace_amd_sched_job(sched_job);
277 return 0; 285 return 0;
278} 286}
279 287
@@ -301,30 +309,28 @@ static void amd_sched_wakeup(struct amd_gpu_scheduler *sched)
301static struct amd_sched_job * 309static struct amd_sched_job *
302amd_sched_select_job(struct amd_gpu_scheduler *sched) 310amd_sched_select_job(struct amd_gpu_scheduler *sched)
303{ 311{
304 struct amd_sched_job *job; 312 struct amd_sched_job *sched_job;
305 313
306 if (!amd_sched_ready(sched)) 314 if (!amd_sched_ready(sched))
307 return NULL; 315 return NULL;
308 316
309 /* Kernel run queue has higher priority than normal run queue*/ 317 /* Kernel run queue has higher priority than normal run queue*/
310 job = amd_sched_rq_select_job(&sched->kernel_rq); 318 sched_job = amd_sched_rq_select_job(&sched->kernel_rq);
311 if (job == NULL) 319 if (sched_job == NULL)
312 job = amd_sched_rq_select_job(&sched->sched_rq); 320 sched_job = amd_sched_rq_select_job(&sched->sched_rq);
313 321
314 return job; 322 return sched_job;
315} 323}
316 324
317static void amd_sched_process_job(struct fence *f, struct fence_cb *cb) 325static void amd_sched_process_job(struct fence *f, struct fence_cb *cb)
318{ 326{
319 struct amd_sched_job *sched_job = 327 struct amd_sched_fence *s_fence =
320 container_of(cb, struct amd_sched_job, cb); 328 container_of(cb, struct amd_sched_fence, cb);
321 struct amd_gpu_scheduler *sched; 329 struct amd_gpu_scheduler *sched = s_fence->sched;
322 330
323 sched = sched_job->sched;
324 amd_sched_fence_signal(sched_job->s_fence);
325 atomic_dec(&sched->hw_rq_count); 331 atomic_dec(&sched->hw_rq_count);
326 fence_put(&sched_job->s_fence->base); 332 amd_sched_fence_signal(s_fence);
327 sched->ops->process_job(sched_job); 333 fence_put(&s_fence->base);
328 wake_up_interruptible(&sched->wake_up_worker); 334 wake_up_interruptible(&sched->wake_up_worker);
329} 335}
330 336
@@ -338,87 +344,82 @@ static int amd_sched_main(void *param)
338 344
339 while (!kthread_should_stop()) { 345 while (!kthread_should_stop()) {
340 struct amd_sched_entity *entity; 346 struct amd_sched_entity *entity;
341 struct amd_sched_job *job; 347 struct amd_sched_fence *s_fence;
348 struct amd_sched_job *sched_job;
342 struct fence *fence; 349 struct fence *fence;
343 350
344 wait_event_interruptible(sched->wake_up_worker, 351 wait_event_interruptible(sched->wake_up_worker,
345 kthread_should_stop() || 352 kthread_should_stop() ||
346 (job = amd_sched_select_job(sched))); 353 (sched_job = amd_sched_select_job(sched)));
347 354
348 if (!job) 355 if (!sched_job)
349 continue; 356 continue;
350 357
351 entity = job->s_entity; 358 entity = sched_job->s_entity;
359 s_fence = sched_job->s_fence;
352 atomic_inc(&sched->hw_rq_count); 360 atomic_inc(&sched->hw_rq_count);
353 fence = sched->ops->run_job(job); 361 fence = sched->ops->run_job(sched_job);
354 if (fence) { 362 if (fence) {
355 r = fence_add_callback(fence, &job->cb, 363 r = fence_add_callback(fence, &s_fence->cb,
356 amd_sched_process_job); 364 amd_sched_process_job);
357 if (r == -ENOENT) 365 if (r == -ENOENT)
358 amd_sched_process_job(fence, &job->cb); 366 amd_sched_process_job(fence, &s_fence->cb);
359 else if (r) 367 else if (r)
360 DRM_ERROR("fence add callback failed (%d)\n", r); 368 DRM_ERROR("fence add callback failed (%d)\n", r);
361 fence_put(fence); 369 fence_put(fence);
370 } else {
371 DRM_ERROR("Failed to run job!\n");
372 amd_sched_process_job(NULL, &s_fence->cb);
362 } 373 }
363 374
364 count = kfifo_out(&entity->job_queue, &job, sizeof(job)); 375 count = kfifo_out(&entity->job_queue, &sched_job,
365 WARN_ON(count != sizeof(job)); 376 sizeof(sched_job));
377 WARN_ON(count != sizeof(sched_job));
366 wake_up(&sched->job_scheduled); 378 wake_up(&sched->job_scheduled);
367 } 379 }
368 return 0; 380 return 0;
369} 381}
370 382
371/** 383/**
372 * Create a gpu scheduler 384 * Init a gpu scheduler instance
373 * 385 *
386 * @sched The pointer to the scheduler
374 * @ops The backend operations for this scheduler. 387 * @ops The backend operations for this scheduler.
375 * @ring The the ring id for the scheduler.
376 * @hw_submissions Number of hw submissions to do. 388 * @hw_submissions Number of hw submissions to do.
389 * @name Name used for debugging
377 * 390 *
378 * Return the pointer to scheduler for success, otherwise return NULL 391 * Return 0 on success, otherwise error code.
379*/ 392*/
380struct amd_gpu_scheduler *amd_sched_create(struct amd_sched_backend_ops *ops, 393int amd_sched_init(struct amd_gpu_scheduler *sched,
381 unsigned ring, unsigned hw_submission, 394 struct amd_sched_backend_ops *ops,
382 void *priv) 395 unsigned hw_submission, const char *name)
383{ 396{
384 struct amd_gpu_scheduler *sched;
385
386 sched = kzalloc(sizeof(struct amd_gpu_scheduler), GFP_KERNEL);
387 if (!sched)
388 return NULL;
389
390 sched->ops = ops; 397 sched->ops = ops;
391 sched->ring_id = ring;
392 sched->hw_submission_limit = hw_submission; 398 sched->hw_submission_limit = hw_submission;
393 sched->priv = priv; 399 sched->name = name;
394 snprintf(sched->name, sizeof(sched->name), "amdgpu[%d]", ring);
395 amd_sched_rq_init(&sched->sched_rq); 400 amd_sched_rq_init(&sched->sched_rq);
396 amd_sched_rq_init(&sched->kernel_rq); 401 amd_sched_rq_init(&sched->kernel_rq);
397 402
398 init_waitqueue_head(&sched->wake_up_worker); 403 init_waitqueue_head(&sched->wake_up_worker);
399 init_waitqueue_head(&sched->job_scheduled); 404 init_waitqueue_head(&sched->job_scheduled);
400 atomic_set(&sched->hw_rq_count, 0); 405 atomic_set(&sched->hw_rq_count, 0);
406
401 /* Each scheduler will run on a seperate kernel thread */ 407 /* Each scheduler will run on a seperate kernel thread */
402 sched->thread = kthread_run(amd_sched_main, sched, sched->name); 408 sched->thread = kthread_run(amd_sched_main, sched, sched->name);
403 if (IS_ERR(sched->thread)) { 409 if (IS_ERR(sched->thread)) {
404 DRM_ERROR("Failed to create scheduler for id %d.\n", ring); 410 DRM_ERROR("Failed to create scheduler for %s.\n", name);
405 kfree(sched); 411 return PTR_ERR(sched->thread);
406 return NULL;
407 } 412 }
408 413
409 return sched; 414 return 0;
410} 415}
411 416
412/** 417/**
413 * Destroy a gpu scheduler 418 * Destroy a gpu scheduler
414 * 419 *
415 * @sched The pointer to the scheduler 420 * @sched The pointer to the scheduler
416 *
417 * return 0 if succeed. -1 if failed.
418 */ 421 */
419int amd_sched_destroy(struct amd_gpu_scheduler *sched) 422void amd_sched_fini(struct amd_gpu_scheduler *sched)
420{ 423{
421 kthread_stop(sched->thread); 424 kthread_stop(sched->thread);
422 kfree(sched);
423 return 0;
424} 425}
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h
index 2af0e4d4d817..80b64dc22214 100644
--- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h
+++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h
@@ -38,13 +38,15 @@ struct amd_sched_rq;
38*/ 38*/
39struct amd_sched_entity { 39struct amd_sched_entity {
40 struct list_head list; 40 struct list_head list;
41 struct amd_sched_rq *belongto_rq; 41 struct amd_sched_rq *rq;
42 atomic_t fence_seq; 42 struct amd_gpu_scheduler *sched;
43 /* the job_queue maintains the jobs submitted by clients */ 43
44 struct kfifo job_queue;
45 spinlock_t queue_lock; 44 spinlock_t queue_lock;
46 struct amd_gpu_scheduler *scheduler; 45 struct kfifo job_queue;
46
47 atomic_t fence_seq;
47 uint64_t fence_context; 48 uint64_t fence_context;
49
48 struct fence *dependency; 50 struct fence *dependency;
49 struct fence_cb cb; 51 struct fence_cb cb;
50}; 52};
@@ -62,13 +64,13 @@ struct amd_sched_rq {
62 64
63struct amd_sched_fence { 65struct amd_sched_fence {
64 struct fence base; 66 struct fence base;
65 struct amd_gpu_scheduler *scheduler; 67 struct fence_cb cb;
68 struct amd_gpu_scheduler *sched;
66 spinlock_t lock; 69 spinlock_t lock;
67 void *owner; 70 void *owner;
68}; 71};
69 72
70struct amd_sched_job { 73struct amd_sched_job {
71 struct fence_cb cb;
72 struct amd_gpu_scheduler *sched; 74 struct amd_gpu_scheduler *sched;
73 struct amd_sched_entity *s_entity; 75 struct amd_sched_entity *s_entity;
74 struct amd_sched_fence *s_fence; 76 struct amd_sched_fence *s_fence;
@@ -91,32 +93,29 @@ static inline struct amd_sched_fence *to_amd_sched_fence(struct fence *f)
91 * these functions should be implemented in driver side 93 * these functions should be implemented in driver side
92*/ 94*/
93struct amd_sched_backend_ops { 95struct amd_sched_backend_ops {
94 struct fence *(*dependency)(struct amd_sched_job *job); 96 struct fence *(*dependency)(struct amd_sched_job *sched_job);
95 struct fence *(*run_job)(struct amd_sched_job *job); 97 struct fence *(*run_job)(struct amd_sched_job *sched_job);
96 void (*process_job)(struct amd_sched_job *job);
97}; 98};
98 99
99/** 100/**
100 * One scheduler is implemented for each hardware ring 101 * One scheduler is implemented for each hardware ring
101*/ 102*/
102struct amd_gpu_scheduler { 103struct amd_gpu_scheduler {
103 struct task_struct *thread; 104 struct amd_sched_backend_ops *ops;
105 uint32_t hw_submission_limit;
106 const char *name;
104 struct amd_sched_rq sched_rq; 107 struct amd_sched_rq sched_rq;
105 struct amd_sched_rq kernel_rq; 108 struct amd_sched_rq kernel_rq;
106 atomic_t hw_rq_count;
107 struct amd_sched_backend_ops *ops;
108 uint32_t ring_id;
109 wait_queue_head_t wake_up_worker; 109 wait_queue_head_t wake_up_worker;
110 wait_queue_head_t job_scheduled; 110 wait_queue_head_t job_scheduled;
111 uint32_t hw_submission_limit; 111 atomic_t hw_rq_count;
112 char name[20]; 112 struct task_struct *thread;
113 void *priv;
114}; 113};
115 114
116struct amd_gpu_scheduler * 115int amd_sched_init(struct amd_gpu_scheduler *sched,
117amd_sched_create(struct amd_sched_backend_ops *ops, 116 struct amd_sched_backend_ops *ops,
118 uint32_t ring, uint32_t hw_submission, void *priv); 117 uint32_t hw_submission, const char *name);
119int amd_sched_destroy(struct amd_gpu_scheduler *sched); 118void amd_sched_fini(struct amd_gpu_scheduler *sched);
120 119
121int amd_sched_entity_init(struct amd_gpu_scheduler *sched, 120int amd_sched_entity_init(struct amd_gpu_scheduler *sched,
122 struct amd_sched_entity *entity, 121 struct amd_sched_entity *entity,
diff --git a/drivers/gpu/drm/amd/scheduler/sched_fence.c b/drivers/gpu/drm/amd/scheduler/sched_fence.c
index e62c37920e11..d802638094f4 100644
--- a/drivers/gpu/drm/amd/scheduler/sched_fence.c
+++ b/drivers/gpu/drm/amd/scheduler/sched_fence.c
@@ -36,7 +36,7 @@ struct amd_sched_fence *amd_sched_fence_create(struct amd_sched_entity *s_entity
36 if (fence == NULL) 36 if (fence == NULL)
37 return NULL; 37 return NULL;
38 fence->owner = owner; 38 fence->owner = owner;
39 fence->scheduler = s_entity->scheduler; 39 fence->sched = s_entity->sched;
40 spin_lock_init(&fence->lock); 40 spin_lock_init(&fence->lock);
41 41
42 seq = atomic_inc_return(&s_entity->fence_seq); 42 seq = atomic_inc_return(&s_entity->fence_seq);
@@ -63,7 +63,7 @@ static const char *amd_sched_fence_get_driver_name(struct fence *fence)
63static const char *amd_sched_fence_get_timeline_name(struct fence *f) 63static const char *amd_sched_fence_get_timeline_name(struct fence *f)
64{ 64{
65 struct amd_sched_fence *fence = to_amd_sched_fence(f); 65 struct amd_sched_fence *fence = to_amd_sched_fence(f);
66 return (const char *)fence->scheduler->name; 66 return (const char *)fence->sched->name;
67} 67}
68 68
69static bool amd_sched_fence_enable_signaling(struct fence *f) 69static bool amd_sched_fence_enable_signaling(struct fence *f)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
index e23df5fd3836..bf27a07dbce3 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -53,8 +53,8 @@ static int drm_dp_send_dpcd_write(struct drm_dp_mst_topology_mgr *mgr,
53 struct drm_dp_mst_port *port, 53 struct drm_dp_mst_port *port,
54 int offset, int size, u8 *bytes); 54 int offset, int size, u8 *bytes);
55 55
56static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr, 56static void drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr,
57 struct drm_dp_mst_branch *mstb); 57 struct drm_dp_mst_branch *mstb);
58static int drm_dp_send_enum_path_resources(struct drm_dp_mst_topology_mgr *mgr, 58static int drm_dp_send_enum_path_resources(struct drm_dp_mst_topology_mgr *mgr,
59 struct drm_dp_mst_branch *mstb, 59 struct drm_dp_mst_branch *mstb,
60 struct drm_dp_mst_port *port); 60 struct drm_dp_mst_port *port);
@@ -804,8 +804,6 @@ static void drm_dp_destroy_mst_branch_device(struct kref *kref)
804 struct drm_dp_mst_port *port, *tmp; 804 struct drm_dp_mst_port *port, *tmp;
805 bool wake_tx = false; 805 bool wake_tx = false;
806 806
807 cancel_work_sync(&mstb->mgr->work);
808
809 /* 807 /*
810 * destroy all ports - don't need lock 808 * destroy all ports - don't need lock
811 * as there are no more references to the mst branch 809 * as there are no more references to the mst branch
@@ -863,29 +861,33 @@ static void drm_dp_destroy_port(struct kref *kref)
863{ 861{
864 struct drm_dp_mst_port *port = container_of(kref, struct drm_dp_mst_port, kref); 862 struct drm_dp_mst_port *port = container_of(kref, struct drm_dp_mst_port, kref);
865 struct drm_dp_mst_topology_mgr *mgr = port->mgr; 863 struct drm_dp_mst_topology_mgr *mgr = port->mgr;
864
866 if (!port->input) { 865 if (!port->input) {
867 port->vcpi.num_slots = 0; 866 port->vcpi.num_slots = 0;
868 867
869 kfree(port->cached_edid); 868 kfree(port->cached_edid);
870 869
871 /* we can't destroy the connector here, as 870 /*
872 we might be holding the mode_config.mutex 871 * The only time we don't have a connector
873 from an EDID retrieval */ 872 * on an output port is if the connector init
873 * fails.
874 */
874 if (port->connector) { 875 if (port->connector) {
876 /* we can't destroy the connector here, as
877 * we might be holding the mode_config.mutex
878 * from an EDID retrieval */
879
875 mutex_lock(&mgr->destroy_connector_lock); 880 mutex_lock(&mgr->destroy_connector_lock);
876 list_add(&port->next, &mgr->destroy_connector_list); 881 list_add(&port->next, &mgr->destroy_connector_list);
877 mutex_unlock(&mgr->destroy_connector_lock); 882 mutex_unlock(&mgr->destroy_connector_lock);
878 schedule_work(&mgr->destroy_connector_work); 883 schedule_work(&mgr->destroy_connector_work);
879 return; 884 return;
880 } 885 }
886 /* no need to clean up vcpi
887 * as if we have no connector we never setup a vcpi */
881 drm_dp_port_teardown_pdt(port, port->pdt); 888 drm_dp_port_teardown_pdt(port, port->pdt);
882
883 if (!port->input && port->vcpi.vcpi > 0)
884 drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi);
885 } 889 }
886 kfree(port); 890 kfree(port);
887
888 (*mgr->cbs->hotplug)(mgr);
889} 891}
890 892
891static void drm_dp_put_port(struct drm_dp_mst_port *port) 893static void drm_dp_put_port(struct drm_dp_mst_port *port)
@@ -1027,8 +1029,8 @@ static void drm_dp_check_port_guid(struct drm_dp_mst_branch *mstb,
1027 } 1029 }
1028} 1030}
1029 1031
1030static void build_mst_prop_path(struct drm_dp_mst_port *port, 1032static void build_mst_prop_path(const struct drm_dp_mst_branch *mstb,
1031 struct drm_dp_mst_branch *mstb, 1033 int pnum,
1032 char *proppath, 1034 char *proppath,
1033 size_t proppath_size) 1035 size_t proppath_size)
1034{ 1036{
@@ -1041,7 +1043,7 @@ static void build_mst_prop_path(struct drm_dp_mst_port *port,
1041 snprintf(temp, sizeof(temp), "-%d", port_num); 1043 snprintf(temp, sizeof(temp), "-%d", port_num);
1042 strlcat(proppath, temp, proppath_size); 1044 strlcat(proppath, temp, proppath_size);
1043 } 1045 }
1044 snprintf(temp, sizeof(temp), "-%d", port->port_num); 1046 snprintf(temp, sizeof(temp), "-%d", pnum);
1045 strlcat(proppath, temp, proppath_size); 1047 strlcat(proppath, temp, proppath_size);
1046} 1048}
1047 1049
@@ -1105,22 +1107,32 @@ static void drm_dp_add_port(struct drm_dp_mst_branch *mstb,
1105 drm_dp_port_teardown_pdt(port, old_pdt); 1107 drm_dp_port_teardown_pdt(port, old_pdt);
1106 1108
1107 ret = drm_dp_port_setup_pdt(port); 1109 ret = drm_dp_port_setup_pdt(port);
1108 if (ret == true) { 1110 if (ret == true)
1109 drm_dp_send_link_address(mstb->mgr, port->mstb); 1111 drm_dp_send_link_address(mstb->mgr, port->mstb);
1110 port->mstb->link_address_sent = true;
1111 }
1112 } 1112 }
1113 1113
1114 if (created && !port->input) { 1114 if (created && !port->input) {
1115 char proppath[255]; 1115 char proppath[255];
1116 build_mst_prop_path(port, mstb, proppath, sizeof(proppath));
1117 port->connector = (*mstb->mgr->cbs->add_connector)(mstb->mgr, port, proppath);
1118 1116
1119 if (port->port_num >= 8) { 1117 build_mst_prop_path(mstb, port->port_num, proppath, sizeof(proppath));
1118 port->connector = (*mstb->mgr->cbs->add_connector)(mstb->mgr, port, proppath);
1119 if (!port->connector) {
1120 /* remove it from the port list */
1121 mutex_lock(&mstb->mgr->lock);
1122 list_del(&port->next);
1123 mutex_unlock(&mstb->mgr->lock);
1124 /* drop port list reference */
1125 drm_dp_put_port(port);
1126 goto out;
1127 }
1128 if (port->port_num >= DP_MST_LOGICAL_PORT_0) {
1120 port->cached_edid = drm_get_edid(port->connector, &port->aux.ddc); 1129 port->cached_edid = drm_get_edid(port->connector, &port->aux.ddc);
1130 drm_mode_connector_set_tile_property(port->connector);
1121 } 1131 }
1132 (*mstb->mgr->cbs->register_connector)(port->connector);
1122 } 1133 }
1123 1134
1135out:
1124 /* put reference to this port */ 1136 /* put reference to this port */
1125 drm_dp_put_port(port); 1137 drm_dp_put_port(port);
1126} 1138}
@@ -1202,10 +1214,9 @@ static void drm_dp_check_and_send_link_address(struct drm_dp_mst_topology_mgr *m
1202{ 1214{
1203 struct drm_dp_mst_port *port; 1215 struct drm_dp_mst_port *port;
1204 struct drm_dp_mst_branch *mstb_child; 1216 struct drm_dp_mst_branch *mstb_child;
1205 if (!mstb->link_address_sent) { 1217 if (!mstb->link_address_sent)
1206 drm_dp_send_link_address(mgr, mstb); 1218 drm_dp_send_link_address(mgr, mstb);
1207 mstb->link_address_sent = true; 1219
1208 }
1209 list_for_each_entry(port, &mstb->ports, next) { 1220 list_for_each_entry(port, &mstb->ports, next) {
1210 if (port->input) 1221 if (port->input)
1211 continue; 1222 continue;
@@ -1458,8 +1469,8 @@ static void drm_dp_queue_down_tx(struct drm_dp_mst_topology_mgr *mgr,
1458 mutex_unlock(&mgr->qlock); 1469 mutex_unlock(&mgr->qlock);
1459} 1470}
1460 1471
1461static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr, 1472static void drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr,
1462 struct drm_dp_mst_branch *mstb) 1473 struct drm_dp_mst_branch *mstb)
1463{ 1474{
1464 int len; 1475 int len;
1465 struct drm_dp_sideband_msg_tx *txmsg; 1476 struct drm_dp_sideband_msg_tx *txmsg;
@@ -1467,11 +1478,12 @@ static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr,
1467 1478
1468 txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL); 1479 txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
1469 if (!txmsg) 1480 if (!txmsg)
1470 return -ENOMEM; 1481 return;
1471 1482
1472 txmsg->dst = mstb; 1483 txmsg->dst = mstb;
1473 len = build_link_address(txmsg); 1484 len = build_link_address(txmsg);
1474 1485
1486 mstb->link_address_sent = true;
1475 drm_dp_queue_down_tx(mgr, txmsg); 1487 drm_dp_queue_down_tx(mgr, txmsg);
1476 1488
1477 ret = drm_dp_mst_wait_tx_reply(mstb, txmsg); 1489 ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
@@ -1499,11 +1511,12 @@ static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr,
1499 } 1511 }
1500 (*mgr->cbs->hotplug)(mgr); 1512 (*mgr->cbs->hotplug)(mgr);
1501 } 1513 }
1502 } else 1514 } else {
1515 mstb->link_address_sent = false;
1503 DRM_DEBUG_KMS("link address failed %d\n", ret); 1516 DRM_DEBUG_KMS("link address failed %d\n", ret);
1517 }
1504 1518
1505 kfree(txmsg); 1519 kfree(txmsg);
1506 return 0;
1507} 1520}
1508 1521
1509static int drm_dp_send_enum_path_resources(struct drm_dp_mst_topology_mgr *mgr, 1522static int drm_dp_send_enum_path_resources(struct drm_dp_mst_topology_mgr *mgr,
@@ -1978,6 +1991,8 @@ void drm_dp_mst_topology_mgr_suspend(struct drm_dp_mst_topology_mgr *mgr)
1978 drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, 1991 drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL,
1979 DP_MST_EN | DP_UPSTREAM_IS_SRC); 1992 DP_MST_EN | DP_UPSTREAM_IS_SRC);
1980 mutex_unlock(&mgr->lock); 1993 mutex_unlock(&mgr->lock);
1994 flush_work(&mgr->work);
1995 flush_work(&mgr->destroy_connector_work);
1981} 1996}
1982EXPORT_SYMBOL(drm_dp_mst_topology_mgr_suspend); 1997EXPORT_SYMBOL(drm_dp_mst_topology_mgr_suspend);
1983 1998
@@ -2263,10 +2278,10 @@ struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_
2263 2278
2264 if (port->cached_edid) 2279 if (port->cached_edid)
2265 edid = drm_edid_duplicate(port->cached_edid); 2280 edid = drm_edid_duplicate(port->cached_edid);
2266 else 2281 else {
2267 edid = drm_get_edid(connector, &port->aux.ddc); 2282 edid = drm_get_edid(connector, &port->aux.ddc);
2268 2283 drm_mode_connector_set_tile_property(connector);
2269 drm_mode_connector_set_tile_property(connector); 2284 }
2270 drm_dp_put_port(port); 2285 drm_dp_put_port(port);
2271 return edid; 2286 return edid;
2272} 2287}
@@ -2671,7 +2686,7 @@ static void drm_dp_destroy_connector_work(struct work_struct *work)
2671{ 2686{
2672 struct drm_dp_mst_topology_mgr *mgr = container_of(work, struct drm_dp_mst_topology_mgr, destroy_connector_work); 2687 struct drm_dp_mst_topology_mgr *mgr = container_of(work, struct drm_dp_mst_topology_mgr, destroy_connector_work);
2673 struct drm_dp_mst_port *port; 2688 struct drm_dp_mst_port *port;
2674 2689 bool send_hotplug = false;
2675 /* 2690 /*
2676 * Not a regular list traverse as we have to drop the destroy 2691 * Not a regular list traverse as we have to drop the destroy
2677 * connector lock before destroying the connector, to avoid AB->BA 2692 * connector lock before destroying the connector, to avoid AB->BA
@@ -2694,7 +2709,10 @@ static void drm_dp_destroy_connector_work(struct work_struct *work)
2694 if (!port->input && port->vcpi.vcpi > 0) 2709 if (!port->input && port->vcpi.vcpi > 0)
2695 drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi); 2710 drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi);
2696 kfree(port); 2711 kfree(port);
2712 send_hotplug = true;
2697 } 2713 }
2714 if (send_hotplug)
2715 (*mgr->cbs->hotplug)(mgr);
2698} 2716}
2699 2717
2700/** 2718/**
@@ -2747,6 +2765,7 @@ EXPORT_SYMBOL(drm_dp_mst_topology_mgr_init);
2747 */ 2765 */
2748void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr) 2766void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr)
2749{ 2767{
2768 flush_work(&mgr->work);
2750 flush_work(&mgr->destroy_connector_work); 2769 flush_work(&mgr->destroy_connector_work);
2751 mutex_lock(&mgr->payload_lock); 2770 mutex_lock(&mgr->payload_lock);
2752 kfree(mgr->payloads); 2771 kfree(mgr->payloads);
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 418d299f3b12..ca08c472311b 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -345,7 +345,11 @@ static bool restore_fbdev_mode(struct drm_fb_helper *fb_helper)
345 struct drm_crtc *crtc = mode_set->crtc; 345 struct drm_crtc *crtc = mode_set->crtc;
346 int ret; 346 int ret;
347 347
348 if (crtc->funcs->cursor_set) { 348 if (crtc->funcs->cursor_set2) {
349 ret = crtc->funcs->cursor_set2(crtc, NULL, 0, 0, 0, 0, 0);
350 if (ret)
351 error = true;
352 } else if (crtc->funcs->cursor_set) {
349 ret = crtc->funcs->cursor_set(crtc, NULL, 0, 0, 0); 353 ret = crtc->funcs->cursor_set(crtc, NULL, 0, 0, 0);
350 if (ret) 354 if (ret)
351 error = true; 355 error = true;
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index 9a860ca1e9d7..d93e7378c077 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -520,7 +520,8 @@ EXPORT_SYMBOL(drm_ioctl_permit);
520 520
521/** Ioctl table */ 521/** Ioctl table */
522static const struct drm_ioctl_desc drm_ioctls[] = { 522static const struct drm_ioctl_desc drm_ioctls[] = {
523 DRM_IOCTL_DEF(DRM_IOCTL_VERSION, drm_version, DRM_UNLOCKED|DRM_RENDER_ALLOW), 523 DRM_IOCTL_DEF(DRM_IOCTL_VERSION, drm_version,
524 DRM_UNLOCKED|DRM_RENDER_ALLOW|DRM_CONTROL_ALLOW),
524 DRM_IOCTL_DEF(DRM_IOCTL_GET_UNIQUE, drm_getunique, 0), 525 DRM_IOCTL_DEF(DRM_IOCTL_GET_UNIQUE, drm_getunique, 0),
525 DRM_IOCTL_DEF(DRM_IOCTL_GET_MAGIC, drm_getmagic, 0), 526 DRM_IOCTL_DEF(DRM_IOCTL_GET_MAGIC, drm_getmagic, 0),
526 DRM_IOCTL_DEF(DRM_IOCTL_IRQ_BUSID, drm_irq_by_busid, DRM_MASTER|DRM_ROOT_ONLY), 527 DRM_IOCTL_DEF(DRM_IOCTL_IRQ_BUSID, drm_irq_by_busid, DRM_MASTER|DRM_ROOT_ONLY),
diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c
index d734780b31c0..a18164f2f6d2 100644
--- a/drivers/gpu/drm/drm_probe_helper.c
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -94,7 +94,18 @@ static int drm_helper_probe_add_cmdline_mode(struct drm_connector *connector)
94} 94}
95 95
96#define DRM_OUTPUT_POLL_PERIOD (10*HZ) 96#define DRM_OUTPUT_POLL_PERIOD (10*HZ)
97static void __drm_kms_helper_poll_enable(struct drm_device *dev) 97/**
98 * drm_kms_helper_poll_enable_locked - re-enable output polling.
99 * @dev: drm_device
100 *
101 * This function re-enables the output polling work without
102 * locking the mode_config mutex.
103 *
104 * This is like drm_kms_helper_poll_enable() however it is to be
105 * called from a context where the mode_config mutex is locked
106 * already.
107 */
108void drm_kms_helper_poll_enable_locked(struct drm_device *dev)
98{ 109{
99 bool poll = false; 110 bool poll = false;
100 struct drm_connector *connector; 111 struct drm_connector *connector;
@@ -113,6 +124,8 @@ static void __drm_kms_helper_poll_enable(struct drm_device *dev)
113 if (poll) 124 if (poll)
114 schedule_delayed_work(&dev->mode_config.output_poll_work, DRM_OUTPUT_POLL_PERIOD); 125 schedule_delayed_work(&dev->mode_config.output_poll_work, DRM_OUTPUT_POLL_PERIOD);
115} 126}
127EXPORT_SYMBOL(drm_kms_helper_poll_enable_locked);
128
116 129
117static int drm_helper_probe_single_connector_modes_merge_bits(struct drm_connector *connector, 130static int drm_helper_probe_single_connector_modes_merge_bits(struct drm_connector *connector,
118 uint32_t maxX, uint32_t maxY, bool merge_type_bits) 131 uint32_t maxX, uint32_t maxY, bool merge_type_bits)
@@ -174,7 +187,7 @@ static int drm_helper_probe_single_connector_modes_merge_bits(struct drm_connect
174 187
175 /* Re-enable polling in case the global poll config changed. */ 188 /* Re-enable polling in case the global poll config changed. */
176 if (drm_kms_helper_poll != dev->mode_config.poll_running) 189 if (drm_kms_helper_poll != dev->mode_config.poll_running)
177 __drm_kms_helper_poll_enable(dev); 190 drm_kms_helper_poll_enable_locked(dev);
178 191
179 dev->mode_config.poll_running = drm_kms_helper_poll; 192 dev->mode_config.poll_running = drm_kms_helper_poll;
180 193
@@ -428,7 +441,7 @@ EXPORT_SYMBOL(drm_kms_helper_poll_disable);
428void drm_kms_helper_poll_enable(struct drm_device *dev) 441void drm_kms_helper_poll_enable(struct drm_device *dev)
429{ 442{
430 mutex_lock(&dev->mode_config.mutex); 443 mutex_lock(&dev->mode_config.mutex);
431 __drm_kms_helper_poll_enable(dev); 444 drm_kms_helper_poll_enable_locked(dev);
432 mutex_unlock(&dev->mode_config.mutex); 445 mutex_unlock(&dev->mode_config.mutex);
433} 446}
434EXPORT_SYMBOL(drm_kms_helper_poll_enable); 447EXPORT_SYMBOL(drm_kms_helper_poll_enable);
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index cbdb78ef3bac..e6cbaca821a4 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -37,7 +37,6 @@
37 * DECON stands for Display and Enhancement controller. 37 * DECON stands for Display and Enhancement controller.
38 */ 38 */
39 39
40#define DECON_DEFAULT_FRAMERATE 60
41#define MIN_FB_WIDTH_FOR_16WORD_BURST 128 40#define MIN_FB_WIDTH_FOR_16WORD_BURST 128
42 41
43#define WINDOWS_NR 2 42#define WINDOWS_NR 2
@@ -165,16 +164,6 @@ static u32 decon_calc_clkdiv(struct decon_context *ctx,
165 return (clkdiv < 0x100) ? clkdiv : 0xff; 164 return (clkdiv < 0x100) ? clkdiv : 0xff;
166} 165}
167 166
168static bool decon_mode_fixup(struct exynos_drm_crtc *crtc,
169 const struct drm_display_mode *mode,
170 struct drm_display_mode *adjusted_mode)
171{
172 if (adjusted_mode->vrefresh == 0)
173 adjusted_mode->vrefresh = DECON_DEFAULT_FRAMERATE;
174
175 return true;
176}
177
178static void decon_commit(struct exynos_drm_crtc *crtc) 167static void decon_commit(struct exynos_drm_crtc *crtc)
179{ 168{
180 struct decon_context *ctx = crtc->ctx; 169 struct decon_context *ctx = crtc->ctx;
@@ -637,7 +626,6 @@ static void decon_disable(struct exynos_drm_crtc *crtc)
637static const struct exynos_drm_crtc_ops decon_crtc_ops = { 626static const struct exynos_drm_crtc_ops decon_crtc_ops = {
638 .enable = decon_enable, 627 .enable = decon_enable,
639 .disable = decon_disable, 628 .disable = decon_disable,
640 .mode_fixup = decon_mode_fixup,
641 .commit = decon_commit, 629 .commit = decon_commit,
642 .enable_vblank = decon_enable_vblank, 630 .enable_vblank = decon_enable_vblank,
643 .disable_vblank = decon_disable_vblank, 631 .disable_vblank = decon_disable_vblank,
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
index d66ade0efac8..124fb9a56f02 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -1383,28 +1383,6 @@ static int exynos_dp_remove(struct platform_device *pdev)
1383 return 0; 1383 return 0;
1384} 1384}
1385 1385
1386#ifdef CONFIG_PM_SLEEP
1387static int exynos_dp_suspend(struct device *dev)
1388{
1389 struct exynos_dp_device *dp = dev_get_drvdata(dev);
1390
1391 exynos_dp_disable(&dp->encoder);
1392 return 0;
1393}
1394
1395static int exynos_dp_resume(struct device *dev)
1396{
1397 struct exynos_dp_device *dp = dev_get_drvdata(dev);
1398
1399 exynos_dp_enable(&dp->encoder);
1400 return 0;
1401}
1402#endif
1403
1404static const struct dev_pm_ops exynos_dp_pm_ops = {
1405 SET_SYSTEM_SLEEP_PM_OPS(exynos_dp_suspend, exynos_dp_resume)
1406};
1407
1408static const struct of_device_id exynos_dp_match[] = { 1386static const struct of_device_id exynos_dp_match[] = {
1409 { .compatible = "samsung,exynos5-dp" }, 1387 { .compatible = "samsung,exynos5-dp" },
1410 {}, 1388 {},
@@ -1417,7 +1395,6 @@ struct platform_driver dp_driver = {
1417 .driver = { 1395 .driver = {
1418 .name = "exynos-dp", 1396 .name = "exynos-dp",
1419 .owner = THIS_MODULE, 1397 .owner = THIS_MODULE,
1420 .pm = &exynos_dp_pm_ops,
1421 .of_match_table = exynos_dp_match, 1398 .of_match_table = exynos_dp_match,
1422 }, 1399 },
1423}; 1400};
diff --git a/drivers/gpu/drm/exynos/exynos_drm_core.c b/drivers/gpu/drm/exynos/exynos_drm_core.c
index c68a6a2a9b57..7f55ba6771c6 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_core.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_core.c
@@ -28,7 +28,6 @@ int exynos_drm_subdrv_register(struct exynos_drm_subdrv *subdrv)
28 28
29 return 0; 29 return 0;
30} 30}
31EXPORT_SYMBOL_GPL(exynos_drm_subdrv_register);
32 31
33int exynos_drm_subdrv_unregister(struct exynos_drm_subdrv *subdrv) 32int exynos_drm_subdrv_unregister(struct exynos_drm_subdrv *subdrv)
34{ 33{
@@ -39,7 +38,6 @@ int exynos_drm_subdrv_unregister(struct exynos_drm_subdrv *subdrv)
39 38
40 return 0; 39 return 0;
41} 40}
42EXPORT_SYMBOL_GPL(exynos_drm_subdrv_unregister);
43 41
44int exynos_drm_device_subdrv_probe(struct drm_device *dev) 42int exynos_drm_device_subdrv_probe(struct drm_device *dev)
45{ 43{
@@ -69,7 +67,6 @@ int exynos_drm_device_subdrv_probe(struct drm_device *dev)
69 67
70 return 0; 68 return 0;
71} 69}
72EXPORT_SYMBOL_GPL(exynos_drm_device_subdrv_probe);
73 70
74int exynos_drm_device_subdrv_remove(struct drm_device *dev) 71int exynos_drm_device_subdrv_remove(struct drm_device *dev)
75{ 72{
@@ -87,7 +84,6 @@ int exynos_drm_device_subdrv_remove(struct drm_device *dev)
87 84
88 return 0; 85 return 0;
89} 86}
90EXPORT_SYMBOL_GPL(exynos_drm_device_subdrv_remove);
91 87
92int exynos_drm_subdrv_open(struct drm_device *dev, struct drm_file *file) 88int exynos_drm_subdrv_open(struct drm_device *dev, struct drm_file *file)
93{ 89{
@@ -111,7 +107,6 @@ err:
111 } 107 }
112 return ret; 108 return ret;
113} 109}
114EXPORT_SYMBOL_GPL(exynos_drm_subdrv_open);
115 110
116void exynos_drm_subdrv_close(struct drm_device *dev, struct drm_file *file) 111void exynos_drm_subdrv_close(struct drm_device *dev, struct drm_file *file)
117{ 112{
@@ -122,4 +117,3 @@ void exynos_drm_subdrv_close(struct drm_device *dev, struct drm_file *file)
122 subdrv->close(dev, subdrv->dev, file); 117 subdrv->close(dev, subdrv->dev, file);
123 } 118 }
124} 119}
125EXPORT_SYMBOL_GPL(exynos_drm_subdrv_close);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 0872aa2f450f..ed28823d3b35 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -41,20 +41,6 @@ static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
41 exynos_crtc->ops->disable(exynos_crtc); 41 exynos_crtc->ops->disable(exynos_crtc);
42} 42}
43 43
44static bool
45exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
46 const struct drm_display_mode *mode,
47 struct drm_display_mode *adjusted_mode)
48{
49 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
50
51 if (exynos_crtc->ops->mode_fixup)
52 return exynos_crtc->ops->mode_fixup(exynos_crtc, mode,
53 adjusted_mode);
54
55 return true;
56}
57
58static void 44static void
59exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) 45exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
60{ 46{
@@ -99,7 +85,6 @@ static void exynos_crtc_atomic_flush(struct drm_crtc *crtc,
99static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = { 85static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
100 .enable = exynos_drm_crtc_enable, 86 .enable = exynos_drm_crtc_enable,
101 .disable = exynos_drm_crtc_disable, 87 .disable = exynos_drm_crtc_disable,
102 .mode_fixup = exynos_drm_crtc_mode_fixup,
103 .mode_set_nofb = exynos_drm_crtc_mode_set_nofb, 88 .mode_set_nofb = exynos_drm_crtc_mode_set_nofb,
104 .atomic_begin = exynos_crtc_atomic_begin, 89 .atomic_begin = exynos_crtc_atomic_begin,
105 .atomic_flush = exynos_crtc_atomic_flush, 90 .atomic_flush = exynos_crtc_atomic_flush,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 831d2e4cacf9..ae9e6b2d3758 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -304,6 +304,7 @@ int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
304 return 0; 304 return 0;
305} 305}
306 306
307#ifdef CONFIG_PM_SLEEP
307static int exynos_drm_suspend(struct drm_device *dev, pm_message_t state) 308static int exynos_drm_suspend(struct drm_device *dev, pm_message_t state)
308{ 309{
309 struct drm_connector *connector; 310 struct drm_connector *connector;
@@ -340,6 +341,7 @@ static int exynos_drm_resume(struct drm_device *dev)
340 341
341 return 0; 342 return 0;
342} 343}
344#endif
343 345
344static int exynos_drm_open(struct drm_device *dev, struct drm_file *file) 346static int exynos_drm_open(struct drm_device *dev, struct drm_file *file)
345{ 347{
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index b7ba21dfb696..6c717ba672db 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -82,7 +82,6 @@ struct exynos_drm_plane {
82 * 82 *
83 * @enable: enable the device 83 * @enable: enable the device
84 * @disable: disable the device 84 * @disable: disable the device
85 * @mode_fixup: fix mode data before applying it
86 * @commit: set current hw specific display mode to hw. 85 * @commit: set current hw specific display mode to hw.
87 * @enable_vblank: specific driver callback for enabling vblank interrupt. 86 * @enable_vblank: specific driver callback for enabling vblank interrupt.
88 * @disable_vblank: specific driver callback for disabling vblank interrupt. 87 * @disable_vblank: specific driver callback for disabling vblank interrupt.
@@ -103,9 +102,6 @@ struct exynos_drm_crtc;
103struct exynos_drm_crtc_ops { 102struct exynos_drm_crtc_ops {
104 void (*enable)(struct exynos_drm_crtc *crtc); 103 void (*enable)(struct exynos_drm_crtc *crtc);
105 void (*disable)(struct exynos_drm_crtc *crtc); 104 void (*disable)(struct exynos_drm_crtc *crtc);
106 bool (*mode_fixup)(struct exynos_drm_crtc *crtc,
107 const struct drm_display_mode *mode,
108 struct drm_display_mode *adjusted_mode);
109 void (*commit)(struct exynos_drm_crtc *crtc); 105 void (*commit)(struct exynos_drm_crtc *crtc);
110 int (*enable_vblank)(struct exynos_drm_crtc *crtc); 106 int (*enable_vblank)(struct exynos_drm_crtc *crtc);
111 void (*disable_vblank)(struct exynos_drm_crtc *crtc); 107 void (*disable_vblank)(struct exynos_drm_crtc *crtc);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index 2a652359af64..dd3a5e6d58c8 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -1206,23 +1206,6 @@ static struct exynos_drm_ipp_ops fimc_dst_ops = {
1206 .set_addr = fimc_dst_set_addr, 1206 .set_addr = fimc_dst_set_addr,
1207}; 1207};
1208 1208
1209static int fimc_clk_ctrl(struct fimc_context *ctx, bool enable)
1210{
1211 DRM_DEBUG_KMS("enable[%d]\n", enable);
1212
1213 if (enable) {
1214 clk_prepare_enable(ctx->clocks[FIMC_CLK_GATE]);
1215 clk_prepare_enable(ctx->clocks[FIMC_CLK_WB_A]);
1216 ctx->suspended = false;
1217 } else {
1218 clk_disable_unprepare(ctx->clocks[FIMC_CLK_GATE]);
1219 clk_disable_unprepare(ctx->clocks[FIMC_CLK_WB_A]);
1220 ctx->suspended = true;
1221 }
1222
1223 return 0;
1224}
1225
1226static irqreturn_t fimc_irq_handler(int irq, void *dev_id) 1209static irqreturn_t fimc_irq_handler(int irq, void *dev_id)
1227{ 1210{
1228 struct fimc_context *ctx = dev_id; 1211 struct fimc_context *ctx = dev_id;
@@ -1780,6 +1763,24 @@ static int fimc_remove(struct platform_device *pdev)
1780 return 0; 1763 return 0;
1781} 1764}
1782 1765
1766#ifdef CONFIG_PM
1767static int fimc_clk_ctrl(struct fimc_context *ctx, bool enable)
1768{
1769 DRM_DEBUG_KMS("enable[%d]\n", enable);
1770
1771 if (enable) {
1772 clk_prepare_enable(ctx->clocks[FIMC_CLK_GATE]);
1773 clk_prepare_enable(ctx->clocks[FIMC_CLK_WB_A]);
1774 ctx->suspended = false;
1775 } else {
1776 clk_disable_unprepare(ctx->clocks[FIMC_CLK_GATE]);
1777 clk_disable_unprepare(ctx->clocks[FIMC_CLK_WB_A]);
1778 ctx->suspended = true;
1779 }
1780
1781 return 0;
1782}
1783
1783#ifdef CONFIG_PM_SLEEP 1784#ifdef CONFIG_PM_SLEEP
1784static int fimc_suspend(struct device *dev) 1785static int fimc_suspend(struct device *dev)
1785{ 1786{
@@ -1806,7 +1807,6 @@ static int fimc_resume(struct device *dev)
1806} 1807}
1807#endif 1808#endif
1808 1809
1809#ifdef CONFIG_PM
1810static int fimc_runtime_suspend(struct device *dev) 1810static int fimc_runtime_suspend(struct device *dev)
1811{ 1811{
1812 struct fimc_context *ctx = get_fimc_context(dev); 1812 struct fimc_context *ctx = get_fimc_context(dev);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 750a9e6b9e8d..3d1aba67758b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -41,7 +41,6 @@
41 * CPU Interface. 41 * CPU Interface.
42 */ 42 */
43 43
44#define FIMD_DEFAULT_FRAMERATE 60
45#define MIN_FB_WIDTH_FOR_16WORD_BURST 128 44#define MIN_FB_WIDTH_FOR_16WORD_BURST 128
46 45
47/* position control register for hardware window 0, 2 ~ 4.*/ 46/* position control register for hardware window 0, 2 ~ 4.*/
@@ -377,16 +376,6 @@ static u32 fimd_calc_clkdiv(struct fimd_context *ctx,
377 return (clkdiv < 0x100) ? clkdiv : 0xff; 376 return (clkdiv < 0x100) ? clkdiv : 0xff;
378} 377}
379 378
380static bool fimd_mode_fixup(struct exynos_drm_crtc *crtc,
381 const struct drm_display_mode *mode,
382 struct drm_display_mode *adjusted_mode)
383{
384 if (adjusted_mode->vrefresh == 0)
385 adjusted_mode->vrefresh = FIMD_DEFAULT_FRAMERATE;
386
387 return true;
388}
389
390static void fimd_commit(struct exynos_drm_crtc *crtc) 379static void fimd_commit(struct exynos_drm_crtc *crtc)
391{ 380{
392 struct fimd_context *ctx = crtc->ctx; 381 struct fimd_context *ctx = crtc->ctx;
@@ -882,13 +871,12 @@ static void fimd_dp_clock_enable(struct exynos_drm_crtc *crtc, bool enable)
882 return; 871 return;
883 872
884 val = enable ? DP_MIE_CLK_DP_ENABLE : DP_MIE_CLK_DISABLE; 873 val = enable ? DP_MIE_CLK_DP_ENABLE : DP_MIE_CLK_DISABLE;
885 writel(DP_MIE_CLK_DP_ENABLE, ctx->regs + DP_MIE_CLKCON); 874 writel(val, ctx->regs + DP_MIE_CLKCON);
886} 875}
887 876
888static const struct exynos_drm_crtc_ops fimd_crtc_ops = { 877static const struct exynos_drm_crtc_ops fimd_crtc_ops = {
889 .enable = fimd_enable, 878 .enable = fimd_enable,
890 .disable = fimd_disable, 879 .disable = fimd_disable,
891 .mode_fixup = fimd_mode_fixup,
892 .commit = fimd_commit, 880 .commit = fimd_commit,
893 .enable_vblank = fimd_enable_vblank, 881 .enable_vblank = fimd_enable_vblank,
894 .disable_vblank = fimd_disable_vblank, 882 .disable_vblank = fimd_disable_vblank,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 3734c34aed16..c17efdb238a6 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -1059,7 +1059,6 @@ int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
1059 1059
1060 return 0; 1060 return 0;
1061} 1061}
1062EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl);
1063 1062
1064int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data, 1063int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
1065 struct drm_file *file) 1064 struct drm_file *file)
@@ -1230,7 +1229,6 @@ err:
1230 g2d_put_cmdlist(g2d, node); 1229 g2d_put_cmdlist(g2d, node);
1231 return ret; 1230 return ret;
1232} 1231}
1233EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl);
1234 1232
1235int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data, 1233int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1236 struct drm_file *file) 1234 struct drm_file *file)
@@ -1293,7 +1291,6 @@ int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1293out: 1291out:
1294 return 0; 1292 return 0;
1295} 1293}
1296EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl);
1297 1294
1298static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev) 1295static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
1299{ 1296{
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c b/drivers/gpu/drm/exynos/exynos_drm_gem.c
index f12fbc36b120..407afedb6003 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
@@ -56,39 +56,35 @@ static int exynos_drm_alloc_buf(struct exynos_drm_gem_obj *obj)
56 nr_pages = obj->size >> PAGE_SHIFT; 56 nr_pages = obj->size >> PAGE_SHIFT;
57 57
58 if (!is_drm_iommu_supported(dev)) { 58 if (!is_drm_iommu_supported(dev)) {
59 dma_addr_t start_addr;
60 unsigned int i = 0;
61
62 obj->pages = drm_calloc_large(nr_pages, sizeof(struct page *)); 59 obj->pages = drm_calloc_large(nr_pages, sizeof(struct page *));
63 if (!obj->pages) { 60 if (!obj->pages) {
64 DRM_ERROR("failed to allocate pages.\n"); 61 DRM_ERROR("failed to allocate pages.\n");
65 return -ENOMEM; 62 return -ENOMEM;
66 } 63 }
64 }
67 65
68 obj->cookie = dma_alloc_attrs(dev->dev, 66 obj->cookie = dma_alloc_attrs(dev->dev, obj->size, &obj->dma_addr,
69 obj->size, 67 GFP_KERNEL, &obj->dma_attrs);
70 &obj->dma_addr, GFP_KERNEL, 68 if (!obj->cookie) {
71 &obj->dma_attrs); 69 DRM_ERROR("failed to allocate buffer.\n");
72 if (!obj->cookie) { 70 if (obj->pages)
73 DRM_ERROR("failed to allocate buffer.\n");
74 drm_free_large(obj->pages); 71 drm_free_large(obj->pages);
75 return -ENOMEM; 72 return -ENOMEM;
76 } 73 }
74
75 if (obj->pages) {
76 dma_addr_t start_addr;
77 unsigned int i = 0;
77 78
78 start_addr = obj->dma_addr; 79 start_addr = obj->dma_addr;
79 while (i < nr_pages) { 80 while (i < nr_pages) {
80 obj->pages[i] = phys_to_page(start_addr); 81 obj->pages[i] = pfn_to_page(dma_to_pfn(dev->dev,
82 start_addr));
81 start_addr += PAGE_SIZE; 83 start_addr += PAGE_SIZE;
82 i++; 84 i++;
83 } 85 }
84 } else { 86 } else {
85 obj->pages = dma_alloc_attrs(dev->dev, obj->size, 87 obj->pages = obj->cookie;
86 &obj->dma_addr, GFP_KERNEL,
87 &obj->dma_attrs);
88 if (!obj->pages) {
89 DRM_ERROR("failed to allocate buffer.\n");
90 return -ENOMEM;
91 }
92 } 88 }
93 89
94 DRM_DEBUG_KMS("dma_addr(0x%lx), size(0x%lx)\n", 90 DRM_DEBUG_KMS("dma_addr(0x%lx), size(0x%lx)\n",
@@ -110,15 +106,11 @@ static void exynos_drm_free_buf(struct exynos_drm_gem_obj *obj)
110 DRM_DEBUG_KMS("dma_addr(0x%lx), size(0x%lx)\n", 106 DRM_DEBUG_KMS("dma_addr(0x%lx), size(0x%lx)\n",
111 (unsigned long)obj->dma_addr, obj->size); 107 (unsigned long)obj->dma_addr, obj->size);
112 108
113 if (!is_drm_iommu_supported(dev)) { 109 dma_free_attrs(dev->dev, obj->size, obj->cookie,
114 dma_free_attrs(dev->dev, obj->size, obj->cookie, 110 (dma_addr_t)obj->dma_addr, &obj->dma_attrs);
115 (dma_addr_t)obj->dma_addr, &obj->dma_attrs);
116 drm_free_large(obj->pages);
117 } else
118 dma_free_attrs(dev->dev, obj->size, obj->pages,
119 (dma_addr_t)obj->dma_addr, &obj->dma_attrs);
120 111
121 obj->dma_addr = (dma_addr_t)NULL; 112 if (!is_drm_iommu_supported(dev))
113 drm_free_large(obj->pages);
122} 114}
123 115
124static int exynos_drm_gem_handle_create(struct drm_gem_object *obj, 116static int exynos_drm_gem_handle_create(struct drm_gem_object *obj,
@@ -156,18 +148,14 @@ void exynos_drm_gem_destroy(struct exynos_drm_gem_obj *exynos_gem_obj)
156 * once dmabuf's refcount becomes 0. 148 * once dmabuf's refcount becomes 0.
157 */ 149 */
158 if (obj->import_attach) 150 if (obj->import_attach)
159 goto out; 151 drm_prime_gem_destroy(obj, exynos_gem_obj->sgt);
160 152 else
161 exynos_drm_free_buf(exynos_gem_obj); 153 exynos_drm_free_buf(exynos_gem_obj);
162
163out:
164 drm_gem_free_mmap_offset(obj);
165 154
166 /* release file pointer to gem object. */ 155 /* release file pointer to gem object. */
167 drm_gem_object_release(obj); 156 drm_gem_object_release(obj);
168 157
169 kfree(exynos_gem_obj); 158 kfree(exynos_gem_obj);
170 exynos_gem_obj = NULL;
171} 159}
172 160
173unsigned long exynos_drm_gem_get_size(struct drm_device *dev, 161unsigned long exynos_drm_gem_get_size(struct drm_device *dev,
@@ -190,8 +178,7 @@ unsigned long exynos_drm_gem_get_size(struct drm_device *dev,
190 return exynos_gem_obj->size; 178 return exynos_gem_obj->size;
191} 179}
192 180
193 181static struct exynos_drm_gem_obj *exynos_drm_gem_init(struct drm_device *dev,
194struct exynos_drm_gem_obj *exynos_drm_gem_init(struct drm_device *dev,
195 unsigned long size) 182 unsigned long size)
196{ 183{
197 struct exynos_drm_gem_obj *exynos_gem_obj; 184 struct exynos_drm_gem_obj *exynos_gem_obj;
@@ -212,6 +199,13 @@ struct exynos_drm_gem_obj *exynos_drm_gem_init(struct drm_device *dev,
212 return ERR_PTR(ret); 199 return ERR_PTR(ret);
213 } 200 }
214 201
202 ret = drm_gem_create_mmap_offset(obj);
203 if (ret < 0) {
204 drm_gem_object_release(obj);
205 kfree(exynos_gem_obj);
206 return ERR_PTR(ret);
207 }
208
215 DRM_DEBUG_KMS("created file object = 0x%x\n", (unsigned int)obj->filp); 209 DRM_DEBUG_KMS("created file object = 0x%x\n", (unsigned int)obj->filp);
216 210
217 return exynos_gem_obj; 211 return exynos_gem_obj;
@@ -313,7 +307,7 @@ void exynos_drm_gem_put_dma_addr(struct drm_device *dev,
313 drm_gem_object_unreference_unlocked(obj); 307 drm_gem_object_unreference_unlocked(obj);
314} 308}
315 309
316int exynos_drm_gem_mmap_buffer(struct exynos_drm_gem_obj *exynos_gem_obj, 310static int exynos_drm_gem_mmap_buffer(struct exynos_drm_gem_obj *exynos_gem_obj,
317 struct vm_area_struct *vma) 311 struct vm_area_struct *vma)
318{ 312{
319 struct drm_device *drm_dev = exynos_gem_obj->base.dev; 313 struct drm_device *drm_dev = exynos_gem_obj->base.dev;
@@ -342,7 +336,8 @@ int exynos_drm_gem_mmap_buffer(struct exynos_drm_gem_obj *exynos_gem_obj,
342 336
343int exynos_drm_gem_get_ioctl(struct drm_device *dev, void *data, 337int exynos_drm_gem_get_ioctl(struct drm_device *dev, void *data,
344 struct drm_file *file_priv) 338 struct drm_file *file_priv)
345{ struct exynos_drm_gem_obj *exynos_gem_obj; 339{
340 struct exynos_drm_gem_obj *exynos_gem_obj;
346 struct drm_exynos_gem_info *args = data; 341 struct drm_exynos_gem_info *args = data;
347 struct drm_gem_object *obj; 342 struct drm_gem_object *obj;
348 343
@@ -402,6 +397,7 @@ int exynos_drm_gem_dumb_create(struct drm_file *file_priv,
402 struct drm_mode_create_dumb *args) 397 struct drm_mode_create_dumb *args)
403{ 398{
404 struct exynos_drm_gem_obj *exynos_gem_obj; 399 struct exynos_drm_gem_obj *exynos_gem_obj;
400 unsigned int flags;
405 int ret; 401 int ret;
406 402
407 /* 403 /*
@@ -413,16 +409,12 @@ int exynos_drm_gem_dumb_create(struct drm_file *file_priv,
413 args->pitch = args->width * ((args->bpp + 7) / 8); 409 args->pitch = args->width * ((args->bpp + 7) / 8);
414 args->size = args->pitch * args->height; 410 args->size = args->pitch * args->height;
415 411
416 if (is_drm_iommu_supported(dev)) { 412 if (is_drm_iommu_supported(dev))
417 exynos_gem_obj = exynos_drm_gem_create(dev, 413 flags = EXYNOS_BO_NONCONTIG | EXYNOS_BO_WC;
418 EXYNOS_BO_NONCONTIG | EXYNOS_BO_WC, 414 else
419 args->size); 415 flags = EXYNOS_BO_CONTIG | EXYNOS_BO_WC;
420 } else {
421 exynos_gem_obj = exynos_drm_gem_create(dev,
422 EXYNOS_BO_CONTIG | EXYNOS_BO_WC,
423 args->size);
424 }
425 416
417 exynos_gem_obj = exynos_drm_gem_create(dev, flags, args->size);
426 if (IS_ERR(exynos_gem_obj)) { 418 if (IS_ERR(exynos_gem_obj)) {
427 dev_warn(dev->dev, "FB allocation failed.\n"); 419 dev_warn(dev->dev, "FB allocation failed.\n");
428 return PTR_ERR(exynos_gem_obj); 420 return PTR_ERR(exynos_gem_obj);
@@ -460,14 +452,9 @@ int exynos_drm_gem_dumb_map_offset(struct drm_file *file_priv,
460 goto unlock; 452 goto unlock;
461 } 453 }
462 454
463 ret = drm_gem_create_mmap_offset(obj);
464 if (ret)
465 goto out;
466
467 *offset = drm_vma_node_offset_addr(&obj->vma_node); 455 *offset = drm_vma_node_offset_addr(&obj->vma_node);
468 DRM_DEBUG_KMS("offset = 0x%lx\n", (unsigned long)*offset); 456 DRM_DEBUG_KMS("offset = 0x%lx\n", (unsigned long)*offset);
469 457
470out:
471 drm_gem_object_unreference(obj); 458 drm_gem_object_unreference(obj);
472unlock: 459unlock:
473 mutex_unlock(&dev->struct_mutex); 460 mutex_unlock(&dev->struct_mutex);
@@ -543,7 +530,6 @@ int exynos_drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
543 530
544err_close_vm: 531err_close_vm:
545 drm_gem_vm_close(vma); 532 drm_gem_vm_close(vma);
546 drm_gem_free_mmap_offset(obj);
547 533
548 return ret; 534 return ret;
549} 535}
@@ -588,6 +574,8 @@ exynos_drm_gem_prime_import_sg_table(struct drm_device *dev,
588 if (ret < 0) 574 if (ret < 0)
589 goto err_free_large; 575 goto err_free_large;
590 576
577 exynos_gem_obj->sgt = sgt;
578
591 if (sgt->nents == 1) { 579 if (sgt->nents == 1) {
592 /* always physically continuous memory if sgt->nents is 1. */ 580 /* always physically continuous memory if sgt->nents is 1. */
593 exynos_gem_obj->flags |= EXYNOS_BO_CONTIG; 581 exynos_gem_obj->flags |= EXYNOS_BO_CONTIG;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.h b/drivers/gpu/drm/exynos/exynos_drm_gem.h
index cd62f8410d1e..b62d1007c0e0 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.h
@@ -39,6 +39,7 @@
39 * - this address could be physical address without IOMMU and 39 * - this address could be physical address without IOMMU and
40 * device address with IOMMU. 40 * device address with IOMMU.
41 * @pages: Array of backing pages. 41 * @pages: Array of backing pages.
42 * @sgt: Imported sg_table.
42 * 43 *
43 * P.S. this object would be transferred to user as kms_bo.handle so 44 * P.S. this object would be transferred to user as kms_bo.handle so
44 * user can access the buffer through kms_bo.handle. 45 * user can access the buffer through kms_bo.handle.
@@ -52,6 +53,7 @@ struct exynos_drm_gem_obj {
52 dma_addr_t dma_addr; 53 dma_addr_t dma_addr;
53 struct dma_attrs dma_attrs; 54 struct dma_attrs dma_attrs;
54 struct page **pages; 55 struct page **pages;
56 struct sg_table *sgt;
55}; 57};
56 58
57struct page **exynos_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask); 59struct page **exynos_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);
@@ -59,10 +61,6 @@ struct page **exynos_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);
59/* destroy a buffer with gem object */ 61/* destroy a buffer with gem object */
60void exynos_drm_gem_destroy(struct exynos_drm_gem_obj *exynos_gem_obj); 62void exynos_drm_gem_destroy(struct exynos_drm_gem_obj *exynos_gem_obj);
61 63
62/* create a private gem object and initialize it. */
63struct exynos_drm_gem_obj *exynos_drm_gem_init(struct drm_device *dev,
64 unsigned long size);
65
66/* create a new buffer with gem object */ 64/* create a new buffer with gem object */
67struct exynos_drm_gem_obj *exynos_drm_gem_create(struct drm_device *dev, 65struct exynos_drm_gem_obj *exynos_drm_gem_create(struct drm_device *dev,
68 unsigned int flags, 66 unsigned int flags,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.c b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
index 425e70625388..2f5c118f4c8e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_rotator.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
@@ -786,6 +786,7 @@ static int rotator_remove(struct platform_device *pdev)
786 return 0; 786 return 0;
787} 787}
788 788
789#ifdef CONFIG_PM
789static int rotator_clk_crtl(struct rot_context *rot, bool enable) 790static int rotator_clk_crtl(struct rot_context *rot, bool enable)
790{ 791{
791 if (enable) { 792 if (enable) {
@@ -822,7 +823,6 @@ static int rotator_resume(struct device *dev)
822} 823}
823#endif 824#endif
824 825
825#ifdef CONFIG_PM
826static int rotator_runtime_suspend(struct device *dev) 826static int rotator_runtime_suspend(struct device *dev)
827{ 827{
828 struct rot_context *rot = dev_get_drvdata(dev); 828 struct rot_context *rot = dev_get_drvdata(dev);
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
index 82be6b86a168..d1e300dcd544 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
@@ -58,7 +58,8 @@ static void fsl_dcu_drm_plane_atomic_disable(struct drm_plane *plane,
58 struct drm_plane_state *old_state) 58 struct drm_plane_state *old_state)
59{ 59{
60 struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private; 60 struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;
61 unsigned int index, value, ret; 61 unsigned int value;
62 int index, ret;
62 63
63 index = fsl_dcu_drm_plane_index(plane); 64 index = fsl_dcu_drm_plane_index(plane);
64 if (index < 0) 65 if (index < 0)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 5a244ab9395b..39d73dbc1c47 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -640,6 +640,32 @@ static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
640 position = __raw_i915_read32(dev_priv, PIPEDSL(pipe)) & DSL_LINEMASK_GEN3; 640 position = __raw_i915_read32(dev_priv, PIPEDSL(pipe)) & DSL_LINEMASK_GEN3;
641 641
642 /* 642 /*
643 * On HSW, the DSL reg (0x70000) appears to return 0 if we
644 * read it just before the start of vblank. So try it again
645 * so we don't accidentally end up spanning a vblank frame
646 * increment, causing the pipe_update_end() code to squak at us.
647 *
648 * The nature of this problem means we can't simply check the ISR
649 * bit and return the vblank start value; nor can we use the scanline
650 * debug register in the transcoder as it appears to have the same
651 * problem. We may need to extend this to include other platforms,
652 * but so far testing only shows the problem on HSW.
653 */
654 if (IS_HASWELL(dev) && !position) {
655 int i, temp;
656
657 for (i = 0; i < 100; i++) {
658 udelay(1);
659 temp = __raw_i915_read32(dev_priv, PIPEDSL(pipe)) &
660 DSL_LINEMASK_GEN3;
661 if (temp != position) {
662 position = temp;
663 break;
664 }
665 }
666 }
667
668 /*
643 * See update_scanline_offset() for the details on the 669 * See update_scanline_offset() for the details on the
644 * scanline_offset adjustment. 670 * scanline_offset adjustment.
645 */ 671 */
diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
index 89c1a8ce1f98..2a5c76faf9f8 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -430,7 +430,7 @@ void intel_audio_codec_enable(struct intel_encoder *intel_encoder)
430 430
431/** 431/**
432 * intel_audio_codec_disable - Disable the audio codec for HD audio 432 * intel_audio_codec_disable - Disable the audio codec for HD audio
433 * @encoder: encoder on which to disable audio 433 * @intel_encoder: encoder on which to disable audio
434 * 434 *
435 * The disable sequences must be performed before disabling the transcoder or 435 * The disable sequences must be performed before disabling the transcoder or
436 * port. 436 * port.
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index b3e437b3bb54..c19e669ffe50 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -42,7 +42,7 @@ find_section(const void *_bdb, int section_id)
42 const struct bdb_header *bdb = _bdb; 42 const struct bdb_header *bdb = _bdb;
43 const u8 *base = _bdb; 43 const u8 *base = _bdb;
44 int index = 0; 44 int index = 0;
45 u16 total, current_size; 45 u32 total, current_size;
46 u8 current_id; 46 u8 current_id;
47 47
48 /* skip to first section */ 48 /* skip to first section */
@@ -57,6 +57,10 @@ find_section(const void *_bdb, int section_id)
57 current_size = *((const u16 *)(base + index)); 57 current_size = *((const u16 *)(base + index));
58 index += 2; 58 index += 2;
59 59
60 /* The MIPI Sequence Block v3+ has a separate size field. */
61 if (current_id == BDB_MIPI_SEQUENCE && *(base + index) >= 3)
62 current_size = *((const u32 *)(base + index + 1));
63
60 if (index + current_size > total) 64 if (index + current_size > total)
61 return NULL; 65 return NULL;
62 66
@@ -799,6 +803,12 @@ parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
799 return; 803 return;
800 } 804 }
801 805
806 /* Fail gracefully for forward incompatible sequence block. */
807 if (sequence->version >= 3) {
808 DRM_ERROR("Unable to parse MIPI Sequence Block v3+\n");
809 return;
810 }
811
802 DRM_DEBUG_DRIVER("Found MIPI sequence block\n"); 812 DRM_DEBUG_DRIVER("Found MIPI sequence block\n");
803 813
804 block_size = get_blocksize(sequence); 814 block_size = get_blocksize(sequence);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8cc9264f7809..cf418be7d30a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15087,9 +15087,12 @@ static void readout_plane_state(struct intel_crtc *crtc,
15087 15087
15088 plane_state = to_intel_plane_state(p->base.state); 15088 plane_state = to_intel_plane_state(p->base.state);
15089 15089
15090 if (p->base.type == DRM_PLANE_TYPE_PRIMARY) 15090 if (p->base.type == DRM_PLANE_TYPE_PRIMARY) {
15091 plane_state->visible = primary_get_hw_state(crtc); 15091 plane_state->visible = primary_get_hw_state(crtc);
15092 else { 15092 if (plane_state->visible)
15093 crtc->base.state->plane_mask |=
15094 1 << drm_plane_index(&p->base);
15095 } else {
15093 if (active) 15096 if (active)
15094 p->disable_plane(&p->base, &crtc->base); 15097 p->disable_plane(&p->base, &crtc->base);
15095 15098
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index 3e4be5a3becd..6ade06888432 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -462,11 +462,17 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
462 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); 462 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
463 463
464 drm_mode_connector_set_path_property(connector, pathprop); 464 drm_mode_connector_set_path_property(connector, pathprop);
465 return connector;
466}
467
468static void intel_dp_register_mst_connector(struct drm_connector *connector)
469{
470 struct intel_connector *intel_connector = to_intel_connector(connector);
471 struct drm_device *dev = connector->dev;
465 drm_modeset_lock_all(dev); 472 drm_modeset_lock_all(dev);
466 intel_connector_add_to_fbdev(intel_connector); 473 intel_connector_add_to_fbdev(intel_connector);
467 drm_modeset_unlock_all(dev); 474 drm_modeset_unlock_all(dev);
468 drm_connector_register(&intel_connector->base); 475 drm_connector_register(&intel_connector->base);
469 return connector;
470} 476}
471 477
472static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 478static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
@@ -512,6 +518,7 @@ static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
512 518
513static struct drm_dp_mst_topology_cbs mst_cbs = { 519static struct drm_dp_mst_topology_cbs mst_cbs = {
514 .add_connector = intel_dp_add_mst_connector, 520 .add_connector = intel_dp_add_mst_connector,
521 .register_connector = intel_dp_register_mst_connector,
515 .destroy_connector = intel_dp_destroy_mst_connector, 522 .destroy_connector = intel_dp_destroy_mst_connector,
516 .hotplug = intel_dp_mst_hotplug, 523 .hotplug = intel_dp_mst_hotplug,
517}; 524};
diff --git a/drivers/gpu/drm/i915/intel_hotplug.c b/drivers/gpu/drm/i915/intel_hotplug.c
index 53c0173a39fe..b17785719598 100644
--- a/drivers/gpu/drm/i915/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/intel_hotplug.c
@@ -180,7 +180,7 @@ static void intel_hpd_irq_storm_disable(struct drm_i915_private *dev_priv)
180 180
181 /* Enable polling and queue hotplug re-enabling. */ 181 /* Enable polling and queue hotplug re-enabling. */
182 if (hpd_disabled) { 182 if (hpd_disabled) {
183 drm_kms_helper_poll_enable(dev); 183 drm_kms_helper_poll_enable_locked(dev);
184 mod_delayed_work(system_wq, &dev_priv->hotplug.reenable_work, 184 mod_delayed_work(system_wq, &dev_priv->hotplug.reenable_work,
185 msecs_to_jiffies(HPD_STORM_REENABLE_DELAY)); 185 msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
186 } 186 }
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 72e0edd7bbde..7412caedcf7f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -484,18 +484,18 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
484 status_pointer = I915_READ(RING_CONTEXT_STATUS_PTR(ring)); 484 status_pointer = I915_READ(RING_CONTEXT_STATUS_PTR(ring));
485 485
486 read_pointer = ring->next_context_status_buffer; 486 read_pointer = ring->next_context_status_buffer;
487 write_pointer = status_pointer & 0x07; 487 write_pointer = status_pointer & GEN8_CSB_PTR_MASK;
488 if (read_pointer > write_pointer) 488 if (read_pointer > write_pointer)
489 write_pointer += 6; 489 write_pointer += GEN8_CSB_ENTRIES;
490 490
491 spin_lock(&ring->execlist_lock); 491 spin_lock(&ring->execlist_lock);
492 492
493 while (read_pointer < write_pointer) { 493 while (read_pointer < write_pointer) {
494 read_pointer++; 494 read_pointer++;
495 status = I915_READ(RING_CONTEXT_STATUS_BUF(ring) + 495 status = I915_READ(RING_CONTEXT_STATUS_BUF(ring) +
496 (read_pointer % 6) * 8); 496 (read_pointer % GEN8_CSB_ENTRIES) * 8);
497 status_id = I915_READ(RING_CONTEXT_STATUS_BUF(ring) + 497 status_id = I915_READ(RING_CONTEXT_STATUS_BUF(ring) +
498 (read_pointer % 6) * 8 + 4); 498 (read_pointer % GEN8_CSB_ENTRIES) * 8 + 4);
499 499
500 if (status & GEN8_CTX_STATUS_IDLE_ACTIVE) 500 if (status & GEN8_CTX_STATUS_IDLE_ACTIVE)
501 continue; 501 continue;
@@ -521,10 +521,12 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
521 spin_unlock(&ring->execlist_lock); 521 spin_unlock(&ring->execlist_lock);
522 522
523 WARN(submit_contexts > 2, "More than two context complete events?\n"); 523 WARN(submit_contexts > 2, "More than two context complete events?\n");
524 ring->next_context_status_buffer = write_pointer % 6; 524 ring->next_context_status_buffer = write_pointer % GEN8_CSB_ENTRIES;
525 525
526 I915_WRITE(RING_CONTEXT_STATUS_PTR(ring), 526 I915_WRITE(RING_CONTEXT_STATUS_PTR(ring),
527 _MASKED_FIELD(0x07 << 8, ((u32)ring->next_context_status_buffer & 0x07) << 8)); 527 _MASKED_FIELD(GEN8_CSB_PTR_MASK << 8,
528 ((u32)ring->next_context_status_buffer &
529 GEN8_CSB_PTR_MASK) << 8));
528} 530}
529 531
530static int execlists_context_queue(struct drm_i915_gem_request *request) 532static int execlists_context_queue(struct drm_i915_gem_request *request)
@@ -1422,6 +1424,7 @@ static int gen8_init_common_ring(struct intel_engine_cs *ring)
1422{ 1424{
1423 struct drm_device *dev = ring->dev; 1425 struct drm_device *dev = ring->dev;
1424 struct drm_i915_private *dev_priv = dev->dev_private; 1426 struct drm_i915_private *dev_priv = dev->dev_private;
1427 u8 next_context_status_buffer_hw;
1425 1428
1426 I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask)); 1429 I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
1427 I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff); 1430 I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff);
@@ -1436,7 +1439,29 @@ static int gen8_init_common_ring(struct intel_engine_cs *ring)
1436 _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) | 1439 _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |
1437 _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE)); 1440 _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
1438 POSTING_READ(RING_MODE_GEN7(ring)); 1441 POSTING_READ(RING_MODE_GEN7(ring));
1439 ring->next_context_status_buffer = 0; 1442
1443 /*
1444 * Instead of resetting the Context Status Buffer (CSB) read pointer to
1445 * zero, we need to read the write pointer from hardware and use its
1446 * value because "this register is power context save restored".
1447 * Effectively, these states have been observed:
1448 *
1449 * | Suspend-to-idle (freeze) | Suspend-to-RAM (mem) |
1450 * BDW | CSB regs not reset | CSB regs reset |
1451 * CHT | CSB regs not reset | CSB regs not reset |
1452 */
1453 next_context_status_buffer_hw = (I915_READ(RING_CONTEXT_STATUS_PTR(ring))
1454 & GEN8_CSB_PTR_MASK);
1455
1456 /*
1457 * When the CSB registers are reset (also after power-up / gpu reset),
1458 * CSB write pointer is set to all 1's, which is not valid, use '5' in
1459 * this special case, so the first element read is CSB[0].
1460 */
1461 if (next_context_status_buffer_hw == GEN8_CSB_PTR_MASK)
1462 next_context_status_buffer_hw = (GEN8_CSB_ENTRIES - 1);
1463
1464 ring->next_context_status_buffer = next_context_status_buffer_hw;
1440 DRM_DEBUG_DRIVER("Execlists enabled for %s\n", ring->name); 1465 DRM_DEBUG_DRIVER("Execlists enabled for %s\n", ring->name);
1441 1466
1442 memset(&ring->hangcheck, 0, sizeof(ring->hangcheck)); 1467 memset(&ring->hangcheck, 0, sizeof(ring->hangcheck));
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 64f89f9982a2..3c63bb32ad81 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -25,6 +25,8 @@
25#define _INTEL_LRC_H_ 25#define _INTEL_LRC_H_
26 26
27#define GEN8_LR_CONTEXT_ALIGN 4096 27#define GEN8_LR_CONTEXT_ALIGN 4096
28#define GEN8_CSB_ENTRIES 6
29#define GEN8_CSB_PTR_MASK 0x07
28 30
29/* Execlists regs */ 31/* Execlists regs */
30#define RING_ELSP(ring) ((ring)->mmio_base+0x230) 32#define RING_ELSP(ring) ((ring)->mmio_base+0x230)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index af7fdb3bd663..7401cf90b0db 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -246,7 +246,8 @@ static void skl_power_well_post_enable(struct drm_i915_private *dev_priv,
246 } 246 }
247 247
248 if (power_well->data == SKL_DISP_PW_1) { 248 if (power_well->data == SKL_DISP_PW_1) {
249 intel_prepare_ddi(dev); 249 if (!dev_priv->power_domains.initializing)
250 intel_prepare_ddi(dev);
250 gen8_irq_power_well_post_enable(dev_priv, 1 << PIPE_A); 251 gen8_irq_power_well_post_enable(dev_priv, 1 << PIPE_A);
251 } 252 }
252} 253}
diff --git a/drivers/gpu/drm/mgag200/mgag200_fb.c b/drivers/gpu/drm/mgag200/mgag200_fb.c
index 87de15ea1f93..b35b5b2db4ec 100644
--- a/drivers/gpu/drm/mgag200/mgag200_fb.c
+++ b/drivers/gpu/drm/mgag200/mgag200_fb.c
@@ -186,17 +186,19 @@ static int mgag200fb_create(struct drm_fb_helper *helper,
186 186
187 sysram = vmalloc(size); 187 sysram = vmalloc(size);
188 if (!sysram) 188 if (!sysram)
189 return -ENOMEM; 189 goto err_sysram;
190 190
191 info = drm_fb_helper_alloc_fbi(helper); 191 info = drm_fb_helper_alloc_fbi(helper);
192 if (IS_ERR(info)) 192 if (IS_ERR(info)) {
193 return PTR_ERR(info); 193 ret = PTR_ERR(info);
194 goto err_alloc_fbi;
195 }
194 196
195 info->par = mfbdev; 197 info->par = mfbdev;
196 198
197 ret = mgag200_framebuffer_init(dev, &mfbdev->mfb, &mode_cmd, gobj); 199 ret = mgag200_framebuffer_init(dev, &mfbdev->mfb, &mode_cmd, gobj);
198 if (ret) 200 if (ret)
199 return ret; 201 goto err_framebuffer_init;
200 202
201 mfbdev->sysram = sysram; 203 mfbdev->sysram = sysram;
202 mfbdev->size = size; 204 mfbdev->size = size;
@@ -225,7 +227,17 @@ static int mgag200fb_create(struct drm_fb_helper *helper,
225 227
226 DRM_DEBUG_KMS("allocated %dx%d\n", 228 DRM_DEBUG_KMS("allocated %dx%d\n",
227 fb->width, fb->height); 229 fb->width, fb->height);
230
228 return 0; 231 return 0;
232
233err_framebuffer_init:
234 drm_fb_helper_release_fbi(helper);
235err_alloc_fbi:
236 vfree(sysram);
237err_sysram:
238 drm_gem_object_unreference_unlocked(gobj);
239
240 return ret;
229} 241}
230 242
231static int mga_fbdev_destroy(struct drm_device *dev, 243static int mga_fbdev_destroy(struct drm_device *dev,
@@ -276,23 +288,26 @@ int mgag200_fbdev_init(struct mga_device *mdev)
276 ret = drm_fb_helper_init(mdev->dev, &mfbdev->helper, 288 ret = drm_fb_helper_init(mdev->dev, &mfbdev->helper,
277 mdev->num_crtc, MGAG200FB_CONN_LIMIT); 289 mdev->num_crtc, MGAG200FB_CONN_LIMIT);
278 if (ret) 290 if (ret)
279 return ret; 291 goto err_fb_helper;
280 292
281 ret = drm_fb_helper_single_add_all_connectors(&mfbdev->helper); 293 ret = drm_fb_helper_single_add_all_connectors(&mfbdev->helper);
282 if (ret) 294 if (ret)
283 goto fini; 295 goto err_fb_setup;
284 296
285 /* disable all the possible outputs/crtcs before entering KMS mode */ 297 /* disable all the possible outputs/crtcs before entering KMS mode */
286 drm_helper_disable_unused_functions(mdev->dev); 298 drm_helper_disable_unused_functions(mdev->dev);
287 299
288 ret = drm_fb_helper_initial_config(&mfbdev->helper, bpp_sel); 300 ret = drm_fb_helper_initial_config(&mfbdev->helper, bpp_sel);
289 if (ret) 301 if (ret)
290 goto fini; 302 goto err_fb_setup;
291 303
292 return 0; 304 return 0;
293 305
294fini: 306err_fb_setup:
295 drm_fb_helper_fini(&mfbdev->helper); 307 drm_fb_helper_fini(&mfbdev->helper);
308err_fb_helper:
309 mdev->mfbdev = NULL;
310
296 return ret; 311 return ret;
297} 312}
298 313
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c b/drivers/gpu/drm/mgag200/mgag200_main.c
index de06388069e7..b1a0f5656175 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -220,7 +220,7 @@ int mgag200_driver_load(struct drm_device *dev, unsigned long flags)
220 } 220 }
221 r = mgag200_mm_init(mdev); 221 r = mgag200_mm_init(mdev);
222 if (r) 222 if (r)
223 goto out; 223 goto err_mm;
224 224
225 drm_mode_config_init(dev); 225 drm_mode_config_init(dev);
226 dev->mode_config.funcs = (void *)&mga_mode_funcs; 226 dev->mode_config.funcs = (void *)&mga_mode_funcs;
@@ -233,7 +233,7 @@ int mgag200_driver_load(struct drm_device *dev, unsigned long flags)
233 r = mgag200_modeset_init(mdev); 233 r = mgag200_modeset_init(mdev);
234 if (r) { 234 if (r) {
235 dev_err(&dev->pdev->dev, "Fatal error during modeset init: %d\n", r); 235 dev_err(&dev->pdev->dev, "Fatal error during modeset init: %d\n", r);
236 goto out; 236 goto err_modeset;
237 } 237 }
238 238
239 /* Make small buffers to store a hardware cursor (double buffered icon updates) */ 239 /* Make small buffers to store a hardware cursor (double buffered icon updates) */
@@ -241,20 +241,24 @@ int mgag200_driver_load(struct drm_device *dev, unsigned long flags)
241 &mdev->cursor.pixels_1); 241 &mdev->cursor.pixels_1);
242 mgag200_bo_create(dev, roundup(48*64, PAGE_SIZE), 0, 0, 242 mgag200_bo_create(dev, roundup(48*64, PAGE_SIZE), 0, 0,
243 &mdev->cursor.pixels_2); 243 &mdev->cursor.pixels_2);
244 if (!mdev->cursor.pixels_2 || !mdev->cursor.pixels_1) 244 if (!mdev->cursor.pixels_2 || !mdev->cursor.pixels_1) {
245 goto cursor_nospace; 245 mdev->cursor.pixels_1 = NULL;
246 mdev->cursor.pixels_current = mdev->cursor.pixels_1; 246 mdev->cursor.pixels_2 = NULL;
247 mdev->cursor.pixels_prev = mdev->cursor.pixels_2; 247 dev_warn(&dev->pdev->dev,
248 goto cursor_done; 248 "Could not allocate space for cursors. Not doing hardware cursors.\n");
249 cursor_nospace: 249 } else {
250 mdev->cursor.pixels_1 = NULL; 250 mdev->cursor.pixels_current = mdev->cursor.pixels_1;
251 mdev->cursor.pixels_2 = NULL; 251 mdev->cursor.pixels_prev = mdev->cursor.pixels_2;
252 dev_warn(&dev->pdev->dev, "Could not allocate space for cursors. Not doing hardware cursors.\n"); 252 }
253 cursor_done: 253
254 254 return 0;
255out: 255
256 if (r) 256err_modeset:
257 mgag200_driver_unload(dev); 257 drm_mode_config_cleanup(dev);
258 mgag200_mm_fini(mdev);
259err_mm:
260 dev->dev_private = NULL;
261
258 return r; 262 return r;
259} 263}
260 264
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
index b1f73bee1368..b0d4b53b97f4 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
@@ -178,7 +178,6 @@ static int mdp5_hw_irqdomain_map(struct irq_domain *d,
178 178
179 irq_set_chip_and_handler(irq, &mdp5_hw_irq_chip, handle_level_irq); 179 irq_set_chip_and_handler(irq, &mdp5_hw_irq_chip, handle_level_irq);
180 irq_set_chip_data(irq, mdp5_kms); 180 irq_set_chip_data(irq, mdp5_kms);
181 set_irq_flags(irq, IRQF_VALID);
182 181
183 return 0; 182 return 0;
184} 183}
diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c
index 7c6225c84ba6..4649bd2ed340 100644
--- a/drivers/gpu/drm/qxl/qxl_display.c
+++ b/drivers/gpu/drm/qxl/qxl_display.c
@@ -618,7 +618,7 @@ static int qxl_crtc_mode_set(struct drm_crtc *crtc,
618 adjusted_mode->hdisplay, 618 adjusted_mode->hdisplay,
619 adjusted_mode->vdisplay); 619 adjusted_mode->vdisplay);
620 620
621 if (qcrtc->index == 0) 621 if (bo->is_primary == false)
622 recreate_primary = true; 622 recreate_primary = true;
623 623
624 if (bo->surf.stride * bo->surf.height > qdev->vram_size) { 624 if (bo->surf.stride * bo->surf.height > qdev->vram_size) {
@@ -886,13 +886,15 @@ static enum drm_connector_status qxl_conn_detect(
886 drm_connector_to_qxl_output(connector); 886 drm_connector_to_qxl_output(connector);
887 struct drm_device *ddev = connector->dev; 887 struct drm_device *ddev = connector->dev;
888 struct qxl_device *qdev = ddev->dev_private; 888 struct qxl_device *qdev = ddev->dev_private;
889 int connected; 889 bool connected = false;
890 890
891 /* The first monitor is always connected */ 891 /* The first monitor is always connected */
892 connected = (output->index == 0) || 892 if (!qdev->client_monitors_config) {
893 (qdev->client_monitors_config && 893 if (output->index == 0)
894 qdev->client_monitors_config->count > output->index && 894 connected = true;
895 qxl_head_enabled(&qdev->client_monitors_config->heads[output->index])); 895 } else
896 connected = qdev->client_monitors_config->count > output->index &&
897 qxl_head_enabled(&qdev->client_monitors_config->heads[output->index]);
896 898
897 DRM_DEBUG("#%d connected: %d\n", output->index, connected); 899 DRM_DEBUG("#%d connected: %d\n", output->index, connected);
898 if (!connected) 900 if (!connected)
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index c3872598b85a..65adb9c72377 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -1624,8 +1624,9 @@ radeon_atom_encoder_dpms_avivo(struct drm_encoder *encoder, int mode)
1624 } else 1624 } else
1625 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 1625 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
1626 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 1626 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
1627 args.ucAction = ATOM_LCD_BLON; 1627 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
1628 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 1628
1629 atombios_set_backlight_level(radeon_encoder, dig->backlight_level);
1629 } 1630 }
1630 break; 1631 break;
1631 case DRM_MODE_DPMS_STANDBY: 1632 case DRM_MODE_DPMS_STANDBY:
@@ -1706,8 +1707,7 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
1706 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0); 1707 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0);
1707 } 1708 }
1708 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) 1709 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
1709 atombios_dig_transmitter_setup(encoder, 1710 atombios_set_backlight_level(radeon_encoder, dig->backlight_level);
1710 ATOM_TRANSMITTER_ACTION_LCD_BLON, 0, 0);
1711 if (ext_encoder) 1711 if (ext_encoder)
1712 atombios_external_encoder_setup(encoder, ext_encoder, ATOM_ENABLE); 1712 atombios_external_encoder_setup(encoder, ext_encoder, ATOM_ENABLE);
1713 break; 1713 break;
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index d8319dae8358..f3f562f6d848 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1573,10 +1573,12 @@ int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon)
1573 1573
1574 drm_kms_helper_poll_disable(dev); 1574 drm_kms_helper_poll_disable(dev);
1575 1575
1576 drm_modeset_lock_all(dev);
1576 /* turn off display hw */ 1577 /* turn off display hw */
1577 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 1578 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1578 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); 1579 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
1579 } 1580 }
1581 drm_modeset_unlock_all(dev);
1580 1582
1581 /* unpin the front buffers and cursors */ 1583 /* unpin the front buffers and cursors */
1582 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 1584 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
@@ -1734,9 +1736,11 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon)
1734 if (fbcon) { 1736 if (fbcon) {
1735 drm_helper_resume_force_mode(dev); 1737 drm_helper_resume_force_mode(dev);
1736 /* turn on display hw */ 1738 /* turn on display hw */
1739 drm_modeset_lock_all(dev);
1737 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 1740 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1738 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); 1741 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
1739 } 1742 }
1743 drm_modeset_unlock_all(dev);
1740 } 1744 }
1741 1745
1742 drm_kms_helper_poll_enable(dev); 1746 drm_kms_helper_poll_enable(dev);
diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c
index 5e09c061847f..6cddae44fa6e 100644
--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c
+++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c
@@ -265,7 +265,6 @@ static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topol
265{ 265{
266 struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr); 266 struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
267 struct drm_device *dev = master->base.dev; 267 struct drm_device *dev = master->base.dev;
268 struct radeon_device *rdev = dev->dev_private;
269 struct radeon_connector *radeon_connector; 268 struct radeon_connector *radeon_connector;
270 struct drm_connector *connector; 269 struct drm_connector *connector;
271 270
@@ -286,12 +285,19 @@ static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topol
286 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); 285 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
287 drm_mode_connector_set_path_property(connector, pathprop); 286 drm_mode_connector_set_path_property(connector, pathprop);
288 287
288 return connector;
289}
290
291static void radeon_dp_register_mst_connector(struct drm_connector *connector)
292{
293 struct drm_device *dev = connector->dev;
294 struct radeon_device *rdev = dev->dev_private;
295
289 drm_modeset_lock_all(dev); 296 drm_modeset_lock_all(dev);
290 radeon_fb_add_connector(rdev, connector); 297 radeon_fb_add_connector(rdev, connector);
291 drm_modeset_unlock_all(dev); 298 drm_modeset_unlock_all(dev);
292 299
293 drm_connector_register(connector); 300 drm_connector_register(connector);
294 return connector;
295} 301}
296 302
297static void radeon_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 303static void radeon_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
@@ -324,6 +330,7 @@ static void radeon_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
324 330
325struct drm_dp_mst_topology_cbs mst_cbs = { 331struct drm_dp_mst_topology_cbs mst_cbs = {
326 .add_connector = radeon_dp_add_mst_connector, 332 .add_connector = radeon_dp_add_mst_connector,
333 .register_connector = radeon_dp_register_mst_connector,
327 .destroy_connector = radeon_dp_destroy_mst_connector, 334 .destroy_connector = radeon_dp_destroy_mst_connector,
328 .hotplug = radeon_dp_mst_hotplug, 335 .hotplug = radeon_dp_mst_hotplug,
329}; 336};
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index 7214858ffcea..1aa657fe31cb 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -48,40 +48,10 @@ struct radeon_fbdev {
48 struct radeon_device *rdev; 48 struct radeon_device *rdev;
49}; 49};
50 50
51/**
52 * radeon_fb_helper_set_par - Hide cursor on CRTCs used by fbdev.
53 *
54 * @info: fbdev info
55 *
56 * This function hides the cursor on all CRTCs used by fbdev.
57 */
58static int radeon_fb_helper_set_par(struct fb_info *info)
59{
60 int ret;
61
62 ret = drm_fb_helper_set_par(info);
63
64 /* XXX: with universal plane support fbdev will automatically disable
65 * all non-primary planes (including the cursor)
66 */
67 if (ret == 0) {
68 struct drm_fb_helper *fb_helper = info->par;
69 int i;
70
71 for (i = 0; i < fb_helper->crtc_count; i++) {
72 struct drm_crtc *crtc = fb_helper->crtc_info[i].mode_set.crtc;
73
74 radeon_crtc_cursor_set2(crtc, NULL, 0, 0, 0, 0, 0);
75 }
76 }
77
78 return ret;
79}
80
81static struct fb_ops radeonfb_ops = { 51static struct fb_ops radeonfb_ops = {
82 .owner = THIS_MODULE, 52 .owner = THIS_MODULE,
83 .fb_check_var = drm_fb_helper_check_var, 53 .fb_check_var = drm_fb_helper_check_var,
84 .fb_set_par = radeon_fb_helper_set_par, 54 .fb_set_par = drm_fb_helper_set_par,
85 .fb_fillrect = drm_fb_helper_cfb_fillrect, 55 .fb_fillrect = drm_fb_helper_cfb_fillrect,
86 .fb_copyarea = drm_fb_helper_cfb_copyarea, 56 .fb_copyarea = drm_fb_helper_cfb_copyarea,
87 .fb_imageblit = drm_fb_helper_cfb_imageblit, 57 .fb_imageblit = drm_fb_helper_cfb_imageblit,
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index 787cd8fd897f..e9115d3f67b0 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -2927,6 +2927,7 @@ static struct si_dpm_quirk si_dpm_quirk_list[] = {
2927 { PCI_VENDOR_ID_ATI, 0x6810, 0x1462, 0x3036, 0, 120000 }, 2927 { PCI_VENDOR_ID_ATI, 0x6810, 0x1462, 0x3036, 0, 120000 },
2928 { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0xe271, 0, 120000 }, 2928 { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0xe271, 0, 120000 },
2929 { PCI_VENDOR_ID_ATI, 0x6810, 0x174b, 0xe271, 85000, 90000 }, 2929 { PCI_VENDOR_ID_ATI, 0x6810, 0x174b, 0xe271, 85000, 90000 },
2930 { PCI_VENDOR_ID_ATI, 0x6811, 0x1762, 0x2015, 0, 120000 },
2930 { 0, 0, 0, 0 }, 2931 { 0, 0, 0, 0 },
2931}; 2932};
2932 2933
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 8d9b7de25613..745e996d2dbc 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -882,6 +882,8 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
882 if (ret) 882 if (ret)
883 return ret; 883 return ret;
884 man = &bdev->man[mem_type]; 884 man = &bdev->man[mem_type];
885 if (!man->has_type || !man->use_type)
886 continue;
885 887
886 type_ok = ttm_bo_mt_compatible(man, mem_type, place, 888 type_ok = ttm_bo_mt_compatible(man, mem_type, place,
887 &cur_flags); 889 &cur_flags);
@@ -889,6 +891,7 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
889 if (!type_ok) 891 if (!type_ok)
890 continue; 892 continue;
891 893
894 type_found = true;
892 cur_flags = ttm_bo_select_caching(man, bo->mem.placement, 895 cur_flags = ttm_bo_select_caching(man, bo->mem.placement,
893 cur_flags); 896 cur_flags);
894 /* 897 /*
@@ -901,12 +904,10 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
901 if (mem_type == TTM_PL_SYSTEM) 904 if (mem_type == TTM_PL_SYSTEM)
902 break; 905 break;
903 906
904 if (man->has_type && man->use_type) { 907 ret = (*man->func->get_node)(man, bo, place, mem);
905 type_found = true; 908 if (unlikely(ret))
906 ret = (*man->func->get_node)(man, bo, place, mem); 909 return ret;
907 if (unlikely(ret)) 910
908 return ret;
909 }
910 if (mem->mm_node) 911 if (mem->mm_node)
911 break; 912 break;
912 } 913 }
@@ -917,9 +918,6 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
917 return 0; 918 return 0;
918 } 919 }
919 920
920 if (!type_found)
921 return -EINVAL;
922
923 for (i = 0; i < placement->num_busy_placement; ++i) { 921 for (i = 0; i < placement->num_busy_placement; ++i) {
924 const struct ttm_place *place = &placement->busy_placement[i]; 922 const struct ttm_place *place = &placement->busy_placement[i];
925 923
@@ -927,11 +925,12 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
927 if (ret) 925 if (ret)
928 return ret; 926 return ret;
929 man = &bdev->man[mem_type]; 927 man = &bdev->man[mem_type];
930 if (!man->has_type) 928 if (!man->has_type || !man->use_type)
931 continue; 929 continue;
932 if (!ttm_bo_mt_compatible(man, mem_type, place, &cur_flags)) 930 if (!ttm_bo_mt_compatible(man, mem_type, place, &cur_flags))
933 continue; 931 continue;
934 932
933 type_found = true;
935 cur_flags = ttm_bo_select_caching(man, bo->mem.placement, 934 cur_flags = ttm_bo_select_caching(man, bo->mem.placement,
936 cur_flags); 935 cur_flags);
937 /* 936 /*
@@ -957,8 +956,13 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
957 if (ret == -ERESTARTSYS) 956 if (ret == -ERESTARTSYS)
958 has_erestartsys = true; 957 has_erestartsys = true;
959 } 958 }
960 ret = (has_erestartsys) ? -ERESTARTSYS : -ENOMEM; 959
961 return ret; 960 if (!type_found) {
961 printk(KERN_ERR TTM_PFX "No compatible memory type found.\n");
962 return -EINVAL;
963 }
964
965 return (has_erestartsys) ? -ERESTARTSYS : -ENOMEM;
962} 966}
963EXPORT_SYMBOL(ttm_bo_mem_space); 967EXPORT_SYMBOL(ttm_bo_mem_space);
964 968
diff --git a/drivers/gpu/drm/vmwgfx/Kconfig b/drivers/gpu/drm/vmwgfx/Kconfig
index 67720f70fe29..b49445df8a7e 100644
--- a/drivers/gpu/drm/vmwgfx/Kconfig
+++ b/drivers/gpu/drm/vmwgfx/Kconfig
@@ -1,6 +1,6 @@
1config DRM_VMWGFX 1config DRM_VMWGFX
2 tristate "DRM driver for VMware Virtual GPU" 2 tristate "DRM driver for VMware Virtual GPU"
3 depends on DRM && PCI 3 depends on DRM && PCI && X86
4 select FB_DEFERRED_IO 4 select FB_DEFERRED_IO
5 select FB_CFB_FILLRECT 5 select FB_CFB_FILLRECT
6 select FB_CFB_COPYAREA 6 select FB_CFB_COPYAREA
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c
index 5ae8f921da2a..8a76821177a6 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c
@@ -681,6 +681,14 @@ static bool vmw_cmdbuf_try_alloc(struct vmw_cmdbuf_man *man,
681 0, 0, 681 0, 0,
682 DRM_MM_SEARCH_DEFAULT, 682 DRM_MM_SEARCH_DEFAULT,
683 DRM_MM_CREATE_DEFAULT); 683 DRM_MM_CREATE_DEFAULT);
684 if (ret) {
685 (void) vmw_cmdbuf_man_process(man);
686 ret = drm_mm_insert_node_generic(&man->mm, info->node,
687 info->page_size, 0, 0,
688 DRM_MM_SEARCH_DEFAULT,
689 DRM_MM_CREATE_DEFAULT);
690 }
691
684 spin_unlock_bh(&man->lock); 692 spin_unlock_bh(&man->lock);
685 info->done = !ret; 693 info->done = !ret;
686 694
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c
index ce659a125f2b..092ea81eeff7 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c
@@ -311,7 +311,6 @@ static int vmw_cotable_unbind(struct vmw_resource *res,
311 struct vmw_private *dev_priv = res->dev_priv; 311 struct vmw_private *dev_priv = res->dev_priv;
312 struct ttm_buffer_object *bo = val_buf->bo; 312 struct ttm_buffer_object *bo = val_buf->bo;
313 struct vmw_fence_obj *fence; 313 struct vmw_fence_obj *fence;
314 int ret;
315 314
316 if (list_empty(&res->mob_head)) 315 if (list_empty(&res->mob_head))
317 return 0; 316 return 0;
@@ -328,7 +327,7 @@ static int vmw_cotable_unbind(struct vmw_resource *res,
328 if (likely(fence != NULL)) 327 if (likely(fence != NULL))
329 vmw_fence_obj_unreference(&fence); 328 vmw_fence_obj_unreference(&fence);
330 329
331 return ret; 330 return 0;
332} 331}
333 332
334/** 333/**
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index e13b20bd9908..2c7a25c71af2 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -752,12 +752,8 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
752 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM); 752 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
753 dev_priv->active_master = &dev_priv->fbdev_master; 753 dev_priv->active_master = &dev_priv->fbdev_master;
754 754
755 755 dev_priv->mmio_virt = ioremap_cache(dev_priv->mmio_start,
756 dev_priv->mmio_mtrr = arch_phys_wc_add(dev_priv->mmio_start, 756 dev_priv->mmio_size);
757 dev_priv->mmio_size);
758
759 dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
760 dev_priv->mmio_size);
761 757
762 if (unlikely(dev_priv->mmio_virt == NULL)) { 758 if (unlikely(dev_priv->mmio_virt == NULL)) {
763 ret = -ENOMEM; 759 ret = -ENOMEM;
@@ -913,7 +909,6 @@ out_no_device:
913out_err4: 909out_err4:
914 iounmap(dev_priv->mmio_virt); 910 iounmap(dev_priv->mmio_virt);
915out_err3: 911out_err3:
916 arch_phys_wc_del(dev_priv->mmio_mtrr);
917 vmw_ttm_global_release(dev_priv); 912 vmw_ttm_global_release(dev_priv);
918out_err0: 913out_err0:
919 for (i = vmw_res_context; i < vmw_res_max; ++i) 914 for (i = vmw_res_context; i < vmw_res_max; ++i)
@@ -964,7 +959,6 @@ static int vmw_driver_unload(struct drm_device *dev)
964 959
965 ttm_object_device_release(&dev_priv->tdev); 960 ttm_object_device_release(&dev_priv->tdev);
966 iounmap(dev_priv->mmio_virt); 961 iounmap(dev_priv->mmio_virt);
967 arch_phys_wc_del(dev_priv->mmio_mtrr);
968 if (dev_priv->ctx.staged_bindings) 962 if (dev_priv->ctx.staged_bindings)
969 vmw_binding_state_free(dev_priv->ctx.staged_bindings); 963 vmw_binding_state_free(dev_priv->ctx.staged_bindings);
970 vmw_ttm_global_release(dev_priv); 964 vmw_ttm_global_release(dev_priv);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index 6d02de6dc36c..f19fd39b43e1 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -376,7 +376,6 @@ struct vmw_private {
376 uint32_t initial_width; 376 uint32_t initial_width;
377 uint32_t initial_height; 377 uint32_t initial_height;
378 u32 __iomem *mmio_virt; 378 u32 __iomem *mmio_virt;
379 int mmio_mtrr;
380 uint32_t capabilities; 379 uint32_t capabilities;
381 uint32_t max_gmr_ids; 380 uint32_t max_gmr_ids;
382 uint32_t max_gmr_pages; 381 uint32_t max_gmr_pages;
@@ -631,7 +630,8 @@ extern int vmw_user_dmabuf_alloc(struct vmw_private *dev_priv,
631 uint32_t size, 630 uint32_t size,
632 bool shareable, 631 bool shareable,
633 uint32_t *handle, 632 uint32_t *handle,
634 struct vmw_dma_buffer **p_dma_buf); 633 struct vmw_dma_buffer **p_dma_buf,
634 struct ttm_base_object **p_base);
635extern int vmw_user_dmabuf_reference(struct ttm_object_file *tfile, 635extern int vmw_user_dmabuf_reference(struct ttm_object_file *tfile,
636 struct vmw_dma_buffer *dma_buf, 636 struct vmw_dma_buffer *dma_buf,
637 uint32_t *handle); 637 uint32_t *handle);
@@ -645,7 +645,8 @@ extern uint32_t vmw_dmabuf_validate_node(struct ttm_buffer_object *bo,
645 uint32_t cur_validate_node); 645 uint32_t cur_validate_node);
646extern void vmw_dmabuf_validate_clear(struct ttm_buffer_object *bo); 646extern void vmw_dmabuf_validate_clear(struct ttm_buffer_object *bo);
647extern int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile, 647extern int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile,
648 uint32_t id, struct vmw_dma_buffer **out); 648 uint32_t id, struct vmw_dma_buffer **out,
649 struct ttm_base_object **base);
649extern int vmw_stream_claim_ioctl(struct drm_device *dev, void *data, 650extern int vmw_stream_claim_ioctl(struct drm_device *dev, void *data,
650 struct drm_file *file_priv); 651 struct drm_file *file_priv);
651extern int vmw_stream_unref_ioctl(struct drm_device *dev, void *data, 652extern int vmw_stream_unref_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index b56565457c96..5da5de0cb522 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -1236,7 +1236,8 @@ static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
1236 struct vmw_relocation *reloc; 1236 struct vmw_relocation *reloc;
1237 int ret; 1237 int ret;
1238 1238
1239 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo); 1239 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo,
1240 NULL);
1240 if (unlikely(ret != 0)) { 1241 if (unlikely(ret != 0)) {
1241 DRM_ERROR("Could not find or use MOB buffer.\n"); 1242 DRM_ERROR("Could not find or use MOB buffer.\n");
1242 ret = -EINVAL; 1243 ret = -EINVAL;
@@ -1296,7 +1297,8 @@ static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
1296 struct vmw_relocation *reloc; 1297 struct vmw_relocation *reloc;
1297 int ret; 1298 int ret;
1298 1299
1299 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo); 1300 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo,
1301 NULL);
1300 if (unlikely(ret != 0)) { 1302 if (unlikely(ret != 0)) {
1301 DRM_ERROR("Could not find or use GMR region.\n"); 1303 DRM_ERROR("Could not find or use GMR region.\n");
1302 ret = -EINVAL; 1304 ret = -EINVAL;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 61fb7f3de311..15a6c01cd016 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -1685,7 +1685,6 @@ int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
1685 struct drm_crtc *crtc; 1685 struct drm_crtc *crtc;
1686 u32 num_units = 0; 1686 u32 num_units = 0;
1687 u32 i, k; 1687 u32 i, k;
1688 int ret;
1689 1688
1690 dirty->dev_priv = dev_priv; 1689 dirty->dev_priv = dev_priv;
1691 1690
@@ -1711,7 +1710,7 @@ int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
1711 if (!dirty->cmd) { 1710 if (!dirty->cmd) {
1712 DRM_ERROR("Couldn't reserve fifo space " 1711 DRM_ERROR("Couldn't reserve fifo space "
1713 "for dirty blits.\n"); 1712 "for dirty blits.\n");
1714 return ret; 1713 return -ENOMEM;
1715 } 1714 }
1716 memset(dirty->cmd, 0, dirty->fifo_reserve_size); 1715 memset(dirty->cmd, 0, dirty->fifo_reserve_size);
1717 } 1716 }
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c b/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
index 76069f093ccf..222c9c2123a1 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
@@ -484,7 +484,7 @@ int vmw_overlay_ioctl(struct drm_device *dev, void *data,
484 goto out_unlock; 484 goto out_unlock;
485 } 485 }
486 486
487 ret = vmw_user_dmabuf_lookup(tfile, arg->handle, &buf); 487 ret = vmw_user_dmabuf_lookup(tfile, arg->handle, &buf, NULL);
488 if (ret) 488 if (ret)
489 goto out_unlock; 489 goto out_unlock;
490 490
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
index c1912f852b42..e57667ca7557 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -354,7 +354,7 @@ int vmw_user_lookup_handle(struct vmw_private *dev_priv,
354 } 354 }
355 355
356 *out_surf = NULL; 356 *out_surf = NULL;
357 ret = vmw_user_dmabuf_lookup(tfile, handle, out_buf); 357 ret = vmw_user_dmabuf_lookup(tfile, handle, out_buf, NULL);
358 return ret; 358 return ret;
359} 359}
360 360
@@ -481,7 +481,8 @@ int vmw_user_dmabuf_alloc(struct vmw_private *dev_priv,
481 uint32_t size, 481 uint32_t size,
482 bool shareable, 482 bool shareable,
483 uint32_t *handle, 483 uint32_t *handle,
484 struct vmw_dma_buffer **p_dma_buf) 484 struct vmw_dma_buffer **p_dma_buf,
485 struct ttm_base_object **p_base)
485{ 486{
486 struct vmw_user_dma_buffer *user_bo; 487 struct vmw_user_dma_buffer *user_bo;
487 struct ttm_buffer_object *tmp; 488 struct ttm_buffer_object *tmp;
@@ -515,6 +516,10 @@ int vmw_user_dmabuf_alloc(struct vmw_private *dev_priv,
515 } 516 }
516 517
517 *p_dma_buf = &user_bo->dma; 518 *p_dma_buf = &user_bo->dma;
519 if (p_base) {
520 *p_base = &user_bo->prime.base;
521 kref_get(&(*p_base)->refcount);
522 }
518 *handle = user_bo->prime.base.hash.key; 523 *handle = user_bo->prime.base.hash.key;
519 524
520out_no_base_object: 525out_no_base_object:
@@ -631,6 +636,7 @@ int vmw_user_dmabuf_synccpu_ioctl(struct drm_device *dev, void *data,
631 struct vmw_dma_buffer *dma_buf; 636 struct vmw_dma_buffer *dma_buf;
632 struct vmw_user_dma_buffer *user_bo; 637 struct vmw_user_dma_buffer *user_bo;
633 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; 638 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
639 struct ttm_base_object *buffer_base;
634 int ret; 640 int ret;
635 641
636 if ((arg->flags & (drm_vmw_synccpu_read | drm_vmw_synccpu_write)) == 0 642 if ((arg->flags & (drm_vmw_synccpu_read | drm_vmw_synccpu_write)) == 0
@@ -643,7 +649,8 @@ int vmw_user_dmabuf_synccpu_ioctl(struct drm_device *dev, void *data,
643 649
644 switch (arg->op) { 650 switch (arg->op) {
645 case drm_vmw_synccpu_grab: 651 case drm_vmw_synccpu_grab:
646 ret = vmw_user_dmabuf_lookup(tfile, arg->handle, &dma_buf); 652 ret = vmw_user_dmabuf_lookup(tfile, arg->handle, &dma_buf,
653 &buffer_base);
647 if (unlikely(ret != 0)) 654 if (unlikely(ret != 0))
648 return ret; 655 return ret;
649 656
@@ -651,6 +658,7 @@ int vmw_user_dmabuf_synccpu_ioctl(struct drm_device *dev, void *data,
651 dma); 658 dma);
652 ret = vmw_user_dmabuf_synccpu_grab(user_bo, tfile, arg->flags); 659 ret = vmw_user_dmabuf_synccpu_grab(user_bo, tfile, arg->flags);
653 vmw_dmabuf_unreference(&dma_buf); 660 vmw_dmabuf_unreference(&dma_buf);
661 ttm_base_object_unref(&buffer_base);
654 if (unlikely(ret != 0 && ret != -ERESTARTSYS && 662 if (unlikely(ret != 0 && ret != -ERESTARTSYS &&
655 ret != -EBUSY)) { 663 ret != -EBUSY)) {
656 DRM_ERROR("Failed synccpu grab on handle 0x%08x.\n", 664 DRM_ERROR("Failed synccpu grab on handle 0x%08x.\n",
@@ -692,7 +700,8 @@ int vmw_dmabuf_alloc_ioctl(struct drm_device *dev, void *data,
692 return ret; 700 return ret;
693 701
694 ret = vmw_user_dmabuf_alloc(dev_priv, vmw_fpriv(file_priv)->tfile, 702 ret = vmw_user_dmabuf_alloc(dev_priv, vmw_fpriv(file_priv)->tfile,
695 req->size, false, &handle, &dma_buf); 703 req->size, false, &handle, &dma_buf,
704 NULL);
696 if (unlikely(ret != 0)) 705 if (unlikely(ret != 0))
697 goto out_no_dmabuf; 706 goto out_no_dmabuf;
698 707
@@ -721,7 +730,8 @@ int vmw_dmabuf_unref_ioctl(struct drm_device *dev, void *data,
721} 730}
722 731
723int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile, 732int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile,
724 uint32_t handle, struct vmw_dma_buffer **out) 733 uint32_t handle, struct vmw_dma_buffer **out,
734 struct ttm_base_object **p_base)
725{ 735{
726 struct vmw_user_dma_buffer *vmw_user_bo; 736 struct vmw_user_dma_buffer *vmw_user_bo;
727 struct ttm_base_object *base; 737 struct ttm_base_object *base;
@@ -743,7 +753,10 @@ int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile,
743 vmw_user_bo = container_of(base, struct vmw_user_dma_buffer, 753 vmw_user_bo = container_of(base, struct vmw_user_dma_buffer,
744 prime.base); 754 prime.base);
745 (void)ttm_bo_reference(&vmw_user_bo->dma.base); 755 (void)ttm_bo_reference(&vmw_user_bo->dma.base);
746 ttm_base_object_unref(&base); 756 if (p_base)
757 *p_base = base;
758 else
759 ttm_base_object_unref(&base);
747 *out = &vmw_user_bo->dma; 760 *out = &vmw_user_bo->dma;
748 761
749 return 0; 762 return 0;
@@ -1004,7 +1017,7 @@ int vmw_dumb_create(struct drm_file *file_priv,
1004 1017
1005 ret = vmw_user_dmabuf_alloc(dev_priv, vmw_fpriv(file_priv)->tfile, 1018 ret = vmw_user_dmabuf_alloc(dev_priv, vmw_fpriv(file_priv)->tfile,
1006 args->size, false, &args->handle, 1019 args->size, false, &args->handle,
1007 &dma_buf); 1020 &dma_buf, NULL);
1008 if (unlikely(ret != 0)) 1021 if (unlikely(ret != 0))
1009 goto out_no_dmabuf; 1022 goto out_no_dmabuf;
1010 1023
@@ -1032,7 +1045,7 @@ int vmw_dumb_map_offset(struct drm_file *file_priv,
1032 struct vmw_dma_buffer *out_buf; 1045 struct vmw_dma_buffer *out_buf;
1033 int ret; 1046 int ret;
1034 1047
1035 ret = vmw_user_dmabuf_lookup(tfile, handle, &out_buf); 1048 ret = vmw_user_dmabuf_lookup(tfile, handle, &out_buf, NULL);
1036 if (ret != 0) 1049 if (ret != 0)
1037 return -EINVAL; 1050 return -EINVAL;
1038 1051
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c b/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c
index bba1ee395478..fd47547b0234 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c
@@ -855,7 +855,7 @@ static int vmw_shader_define(struct drm_device *dev, struct drm_file *file_priv,
855 855
856 if (buffer_handle != SVGA3D_INVALID_ID) { 856 if (buffer_handle != SVGA3D_INVALID_ID) {
857 ret = vmw_user_dmabuf_lookup(tfile, buffer_handle, 857 ret = vmw_user_dmabuf_lookup(tfile, buffer_handle,
858 &buffer); 858 &buffer, NULL);
859 if (unlikely(ret != 0)) { 859 if (unlikely(ret != 0)) {
860 DRM_ERROR("Could not find buffer for shader " 860 DRM_ERROR("Could not find buffer for shader "
861 "creation.\n"); 861 "creation.\n");
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
index 3361769842f4..64b50409fa07 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
@@ -46,6 +46,7 @@ struct vmw_user_surface {
46 struct vmw_surface srf; 46 struct vmw_surface srf;
47 uint32_t size; 47 uint32_t size;
48 struct drm_master *master; 48 struct drm_master *master;
49 struct ttm_base_object *backup_base;
49}; 50};
50 51
51/** 52/**
@@ -656,6 +657,7 @@ static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
656 struct vmw_resource *res = &user_srf->srf.res; 657 struct vmw_resource *res = &user_srf->srf.res;
657 658
658 *p_base = NULL; 659 *p_base = NULL;
660 ttm_base_object_unref(&user_srf->backup_base);
659 vmw_resource_unreference(&res); 661 vmw_resource_unreference(&res);
660} 662}
661 663
@@ -851,7 +853,8 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
851 res->backup_size, 853 res->backup_size,
852 true, 854 true,
853 &backup_handle, 855 &backup_handle,
854 &res->backup); 856 &res->backup,
857 &user_srf->backup_base);
855 if (unlikely(ret != 0)) { 858 if (unlikely(ret != 0)) {
856 vmw_resource_unreference(&res); 859 vmw_resource_unreference(&res);
857 goto out_unlock; 860 goto out_unlock;
@@ -1321,7 +1324,8 @@ int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
1321 1324
1322 if (req->buffer_handle != SVGA3D_INVALID_ID) { 1325 if (req->buffer_handle != SVGA3D_INVALID_ID) {
1323 ret = vmw_user_dmabuf_lookup(tfile, req->buffer_handle, 1326 ret = vmw_user_dmabuf_lookup(tfile, req->buffer_handle,
1324 &res->backup); 1327 &res->backup,
1328 &user_srf->backup_base);
1325 if (ret == 0 && res->backup->base.num_pages * PAGE_SIZE < 1329 if (ret == 0 && res->backup->base.num_pages * PAGE_SIZE <
1326 res->backup_size) { 1330 res->backup_size) {
1327 DRM_ERROR("Surface backup buffer is too small.\n"); 1331 DRM_ERROR("Surface backup buffer is too small.\n");
@@ -1335,7 +1339,8 @@ int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
1335 req->drm_surface_flags & 1339 req->drm_surface_flags &
1336 drm_vmw_surface_flag_shareable, 1340 drm_vmw_surface_flag_shareable,
1337 &backup_handle, 1341 &backup_handle,
1338 &res->backup); 1342 &res->backup,
1343 &user_srf->backup_base);
1339 1344
1340 if (unlikely(ret != 0)) { 1345 if (unlikely(ret != 0)) {
1341 vmw_resource_unreference(&res); 1346 vmw_resource_unreference(&res);
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 243f99a80253..e5a38d202a21 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -912,7 +912,7 @@ static void ipu_irq_handle(struct ipu_soc *ipu, const int *regs, int num_regs)
912 } 912 }
913} 913}
914 914
915static void ipu_irq_handler(unsigned int irq, struct irq_desc *desc) 915static void ipu_irq_handler(struct irq_desc *desc)
916{ 916{
917 struct ipu_soc *ipu = irq_desc_get_handler_data(desc); 917 struct ipu_soc *ipu = irq_desc_get_handler_data(desc);
918 struct irq_chip *chip = irq_desc_get_chip(desc); 918 struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -925,7 +925,7 @@ static void ipu_irq_handler(unsigned int irq, struct irq_desc *desc)
925 chained_irq_exit(chip, desc); 925 chained_irq_exit(chip, desc);
926} 926}
927 927
928static void ipu_err_irq_handler(unsigned int irq, struct irq_desc *desc) 928static void ipu_err_irq_handler(struct irq_desc *desc)
929{ 929{
930 struct ipu_soc *ipu = irq_desc_get_handler_data(desc); 930 struct ipu_soc *ipu = irq_desc_get_handler_data(desc);
931 struct irq_chip *chip = irq_desc_get_chip(desc); 931 struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -1099,8 +1099,7 @@ static int ipu_irq_init(struct ipu_soc *ipu)
1099 } 1099 }
1100 1100
1101 ret = irq_alloc_domain_generic_chips(ipu->domain, 32, 1, "IPU", 1101 ret = irq_alloc_domain_generic_chips(ipu->domain, 32, 1, "IPU",
1102 handle_level_irq, 0, 1102 handle_level_irq, 0, 0, 0);
1103 IRQF_VALID, 0);
1104 if (ret < 0) { 1103 if (ret < 0) {
1105 dev_err(ipu->dev, "failed to alloc generic irq chips\n"); 1104 dev_err(ipu->dev, "failed to alloc generic irq chips\n");
1106 irq_domain_remove(ipu->domain); 1105 irq_domain_remove(ipu->domain);
diff --git a/drivers/hv/channel_mgmt.c b/drivers/hv/channel_mgmt.c
index 2f9aead4ecfc..652afd11a9ef 100644
--- a/drivers/hv/channel_mgmt.c
+++ b/drivers/hv/channel_mgmt.c
@@ -204,6 +204,8 @@ void hv_process_channel_removal(struct vmbus_channel *channel, u32 relid)
204 spin_lock_irqsave(&vmbus_connection.channel_lock, flags); 204 spin_lock_irqsave(&vmbus_connection.channel_lock, flags);
205 list_del(&channel->listentry); 205 list_del(&channel->listentry);
206 spin_unlock_irqrestore(&vmbus_connection.channel_lock, flags); 206 spin_unlock_irqrestore(&vmbus_connection.channel_lock, flags);
207
208 primary_channel = channel;
207 } else { 209 } else {
208 primary_channel = channel->primary_channel; 210 primary_channel = channel->primary_channel;
209 spin_lock_irqsave(&primary_channel->lock, flags); 211 spin_lock_irqsave(&primary_channel->lock, flags);
@@ -211,6 +213,14 @@ void hv_process_channel_removal(struct vmbus_channel *channel, u32 relid)
211 primary_channel->num_sc--; 213 primary_channel->num_sc--;
212 spin_unlock_irqrestore(&primary_channel->lock, flags); 214 spin_unlock_irqrestore(&primary_channel->lock, flags);
213 } 215 }
216
217 /*
218 * We need to free the bit for init_vp_index() to work in the case
219 * of sub-channel, when we reload drivers like hv_netvsc.
220 */
221 cpumask_clear_cpu(channel->target_cpu,
222 &primary_channel->alloced_cpus_in_node);
223
214 free_channel(channel); 224 free_channel(channel);
215} 225}
216 226
@@ -458,6 +468,13 @@ static void init_vp_index(struct vmbus_channel *channel, const uuid_le *type_gui
458 continue; 468 continue;
459 } 469 }
460 470
471 /*
472 * NOTE: in the case of sub-channel, we clear the sub-channel
473 * related bit(s) in primary->alloced_cpus_in_node in
474 * hv_process_channel_removal(), so when we reload drivers
475 * like hv_netvsc in SMP guest, here we're able to re-allocate
476 * bit from primary->alloced_cpus_in_node.
477 */
461 if (!cpumask_test_cpu(cur_cpu, 478 if (!cpumask_test_cpu(cur_cpu,
462 &primary->alloced_cpus_in_node)) { 479 &primary->alloced_cpus_in_node)) {
463 cpumask_set_cpu(cur_cpu, 480 cpumask_set_cpu(cur_cpu,
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 500b262b89bb..e13c902e8966 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1140,8 +1140,8 @@ config SENSORS_NCT6775
1140 help 1140 help
1141 If you say yes here you get support for the hardware monitoring 1141 If you say yes here you get support for the hardware monitoring
1142 functionality of the Nuvoton NCT6106D, NCT6775F, NCT6776F, NCT6779D, 1142 functionality of the Nuvoton NCT6106D, NCT6775F, NCT6776F, NCT6779D,
1143 NCT6791D, NCT6792D and compatible Super-I/O chips. This driver 1143 NCT6791D, NCT6792D, NCT6793D, and compatible Super-I/O chips. This
1144 replaces the w83627ehf driver for NCT6775F and NCT6776F. 1144 driver replaces the w83627ehf driver for NCT6775F and NCT6776F.
1145 1145
1146 This driver can also be built as a module. If so, the module 1146 This driver can also be built as a module. If so, the module
1147 will be called nct6775. 1147 will be called nct6775.
diff --git a/drivers/hwmon/abx500.c b/drivers/hwmon/abx500.c
index 6cb89c0ebab6..1fd46859ed29 100644
--- a/drivers/hwmon/abx500.c
+++ b/drivers/hwmon/abx500.c
@@ -470,6 +470,7 @@ static const struct of_device_id abx500_temp_match[] = {
470 { .compatible = "stericsson,abx500-temp" }, 470 { .compatible = "stericsson,abx500-temp" },
471 {}, 471 {},
472}; 472};
473MODULE_DEVICE_TABLE(of, abx500_temp_match);
473#endif 474#endif
474 475
475static struct platform_driver abx500_temp_driver = { 476static struct platform_driver abx500_temp_driver = {
diff --git a/drivers/hwmon/gpio-fan.c b/drivers/hwmon/gpio-fan.c
index a3dae6d0082a..82de3deeb18a 100644
--- a/drivers/hwmon/gpio-fan.c
+++ b/drivers/hwmon/gpio-fan.c
@@ -539,6 +539,7 @@ static const struct of_device_id of_gpio_fan_match[] = {
539 { .compatible = "gpio-fan", }, 539 { .compatible = "gpio-fan", },
540 {}, 540 {},
541}; 541};
542MODULE_DEVICE_TABLE(of, of_gpio_fan_match);
542#endif /* CONFIG_OF_GPIO */ 543#endif /* CONFIG_OF_GPIO */
543 544
544static int gpio_fan_probe(struct platform_device *pdev) 545static int gpio_fan_probe(struct platform_device *pdev)
diff --git a/drivers/hwmon/nct6775.c b/drivers/hwmon/nct6775.c
index bd1c99deac71..8b4fa55e46c6 100644
--- a/drivers/hwmon/nct6775.c
+++ b/drivers/hwmon/nct6775.c
@@ -39,6 +39,7 @@
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3 39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3 40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3 41 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
42 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
42 * 43 *
43 * #temp lists the number of monitored temperature sources (first value) plus 44 * #temp lists the number of monitored temperature sources (first value) plus
44 * the number of directly connectable temperature sensors (second value). 45 * the number of directly connectable temperature sensors (second value).
@@ -63,7 +64,7 @@
63 64
64#define USE_ALTERNATE 65#define USE_ALTERNATE
65 66
66enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792 }; 67enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793 };
67 68
68/* used to set data->name = nct6775_device_names[data->sio_kind] */ 69/* used to set data->name = nct6775_device_names[data->sio_kind] */
69static const char * const nct6775_device_names[] = { 70static const char * const nct6775_device_names[] = {
@@ -73,6 +74,17 @@ static const char * const nct6775_device_names[] = {
73 "nct6779", 74 "nct6779",
74 "nct6791", 75 "nct6791",
75 "nct6792", 76 "nct6792",
77 "nct6793",
78};
79
80static const char * const nct6775_sio_names[] __initconst = {
81 "NCT6106D",
82 "NCT6775F",
83 "NCT6776D/F",
84 "NCT6779D",
85 "NCT6791D",
86 "NCT6792D",
87 "NCT6793D",
76}; 88};
77 89
78static unsigned short force_id; 90static unsigned short force_id;
@@ -104,6 +116,7 @@ MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
104#define SIO_NCT6779_ID 0xc560 116#define SIO_NCT6779_ID 0xc560
105#define SIO_NCT6791_ID 0xc800 117#define SIO_NCT6791_ID 0xc800
106#define SIO_NCT6792_ID 0xc910 118#define SIO_NCT6792_ID 0xc910
119#define SIO_NCT6793_ID 0xd120
107#define SIO_ID_MASK 0xFFF0 120#define SIO_ID_MASK 0xFFF0
108 121
109enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 }; 122enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
@@ -354,6 +367,10 @@ static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
354 367
355/* NCT6776 specific data */ 368/* NCT6776 specific data */
356 369
370/* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
371#define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
372#define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
373
357static const s8 NCT6776_ALARM_BITS[] = { 374static const s8 NCT6776_ALARM_BITS[] = {
358 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 375 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
359 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 376 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
@@ -533,7 +550,7 @@ static const s8 NCT6791_ALARM_BITS[] = {
533 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 550 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
534 12, 9 }; /* intrusion0, intrusion1 */ 551 12, 9 }; /* intrusion0, intrusion1 */
535 552
536/* NCT6792 specific data */ 553/* NCT6792/NCT6793 specific data */
537 554
538static const u16 NCT6792_REG_TEMP_MON[] = { 555static const u16 NCT6792_REG_TEMP_MON[] = {
539 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d }; 556 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
@@ -1056,6 +1073,7 @@ static bool is_word_sized(struct nct6775_data *data, u16 reg)
1056 case nct6779: 1073 case nct6779:
1057 case nct6791: 1074 case nct6791:
1058 case nct6792: 1075 case nct6792:
1076 case nct6793:
1059 return reg == 0x150 || reg == 0x153 || reg == 0x155 || 1077 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1060 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) || 1078 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1061 reg == 0x402 || 1079 reg == 0x402 ||
@@ -1407,6 +1425,7 @@ static void nct6775_update_pwm_limits(struct device *dev)
1407 case nct6779: 1425 case nct6779:
1408 case nct6791: 1426 case nct6791:
1409 case nct6792: 1427 case nct6792:
1428 case nct6793:
1410 reg = nct6775_read_value(data, 1429 reg = nct6775_read_value(data,
1411 data->REG_CRITICAL_PWM_ENABLE[i]); 1430 data->REG_CRITICAL_PWM_ENABLE[i]);
1412 if (reg & data->CRITICAL_PWM_ENABLE_MASK) 1431 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
@@ -2822,6 +2841,7 @@ store_auto_pwm(struct device *dev, struct device_attribute *attr,
2822 case nct6779: 2841 case nct6779:
2823 case nct6791: 2842 case nct6791:
2824 case nct6792: 2843 case nct6792:
2844 case nct6793:
2825 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], 2845 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2826 val); 2846 val);
2827 reg = nct6775_read_value(data, 2847 reg = nct6775_read_value(data,
@@ -3256,7 +3276,7 @@ nct6775_check_fan_inputs(struct nct6775_data *data)
3256 pwm4pin = false; 3276 pwm4pin = false;
3257 pwm5pin = false; 3277 pwm5pin = false;
3258 pwm6pin = false; 3278 pwm6pin = false;
3259 } else { /* NCT6779D, NCT6791D, or NCT6792D */ 3279 } else { /* NCT6779D, NCT6791D, NCT6792D, or NCT6793D */
3260 regval = superio_inb(sioreg, 0x1c); 3280 regval = superio_inb(sioreg, 0x1c);
3261 3281
3262 fan3pin = !(regval & (1 << 5)); 3282 fan3pin = !(regval & (1 << 5));
@@ -3269,7 +3289,8 @@ nct6775_check_fan_inputs(struct nct6775_data *data)
3269 3289
3270 fan4min = fan4pin; 3290 fan4min = fan4pin;
3271 3291
3272 if (data->kind == nct6791 || data->kind == nct6792) { 3292 if (data->kind == nct6791 || data->kind == nct6792 ||
3293 data->kind == nct6793) {
3273 regval = superio_inb(sioreg, 0x2d); 3294 regval = superio_inb(sioreg, 0x2d);
3274 fan6pin = (regval & (1 << 1)); 3295 fan6pin = (regval & (1 << 1));
3275 pwm6pin = (regval & (1 << 0)); 3296 pwm6pin = (regval & (1 << 0));
@@ -3528,8 +3549,8 @@ static int nct6775_probe(struct platform_device *pdev)
3528 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES; 3549 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3529 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3550 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3530 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3551 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3531 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; 3552 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3532 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; 3553 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3533 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3554 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3534 data->REG_PWM[0] = NCT6775_REG_PWM; 3555 data->REG_PWM[0] = NCT6775_REG_PWM;
3535 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3556 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
@@ -3600,8 +3621,8 @@ static int nct6775_probe(struct platform_device *pdev)
3600 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3621 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3601 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3622 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3602 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3623 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3603 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; 3624 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3604 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; 3625 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3605 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3626 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3606 data->REG_PWM[0] = NCT6775_REG_PWM; 3627 data->REG_PWM[0] = NCT6775_REG_PWM;
3607 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3628 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
@@ -3643,6 +3664,7 @@ static int nct6775_probe(struct platform_device *pdev)
3643 break; 3664 break;
3644 case nct6791: 3665 case nct6791:
3645 case nct6792: 3666 case nct6792:
3667 case nct6793:
3646 data->in_num = 15; 3668 data->in_num = 15;
3647 data->pwm_num = 6; 3669 data->pwm_num = 6;
3648 data->auto_pwm_num = 4; 3670 data->auto_pwm_num = 4;
@@ -3677,8 +3699,8 @@ static int nct6775_probe(struct platform_device *pdev)
3677 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3699 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3678 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3700 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3679 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3701 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3680 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; 3702 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3681 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; 3703 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3682 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3704 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3683 data->REG_PWM[0] = NCT6775_REG_PWM; 3705 data->REG_PWM[0] = NCT6775_REG_PWM;
3684 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3706 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
@@ -3918,6 +3940,7 @@ static int nct6775_probe(struct platform_device *pdev)
3918 case nct6779: 3940 case nct6779:
3919 case nct6791: 3941 case nct6791:
3920 case nct6792: 3942 case nct6792:
3943 case nct6793:
3921 break; 3944 break;
3922 } 3945 }
3923 3946
@@ -3950,6 +3973,7 @@ static int nct6775_probe(struct platform_device *pdev)
3950 break; 3973 break;
3951 case nct6791: 3974 case nct6791:
3952 case nct6792: 3975 case nct6792:
3976 case nct6793:
3953 tmp |= 0x7e; 3977 tmp |= 0x7e;
3954 break; 3978 break;
3955 } 3979 }
@@ -4047,7 +4071,8 @@ static int __maybe_unused nct6775_resume(struct device *dev)
4047 if (reg != data->sio_reg_enable) 4071 if (reg != data->sio_reg_enable)
4048 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable); 4072 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4049 4073
4050 if (data->kind == nct6791 || data->kind == nct6792) 4074 if (data->kind == nct6791 || data->kind == nct6792 ||
4075 data->kind == nct6793)
4051 nct6791_enable_io_mapping(sioreg); 4076 nct6791_enable_io_mapping(sioreg);
4052 4077
4053 superio_exit(sioreg); 4078 superio_exit(sioreg);
@@ -4106,15 +4131,6 @@ static struct platform_driver nct6775_driver = {
4106 .probe = nct6775_probe, 4131 .probe = nct6775_probe,
4107}; 4132};
4108 4133
4109static const char * const nct6775_sio_names[] __initconst = {
4110 "NCT6106D",
4111 "NCT6775F",
4112 "NCT6776D/F",
4113 "NCT6779D",
4114 "NCT6791D",
4115 "NCT6792D",
4116};
4117
4118/* nct6775_find() looks for a '627 in the Super-I/O config space */ 4134/* nct6775_find() looks for a '627 in the Super-I/O config space */
4119static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data) 4135static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4120{ 4136{
@@ -4150,6 +4166,9 @@ static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4150 case SIO_NCT6792_ID: 4166 case SIO_NCT6792_ID:
4151 sio_data->kind = nct6792; 4167 sio_data->kind = nct6792;
4152 break; 4168 break;
4169 case SIO_NCT6793_ID:
4170 sio_data->kind = nct6793;
4171 break;
4153 default: 4172 default:
4154 if (val != 0xffff) 4173 if (val != 0xffff)
4155 pr_debug("unsupported chip ID: 0x%04x\n", val); 4174 pr_debug("unsupported chip ID: 0x%04x\n", val);
@@ -4175,7 +4194,8 @@ static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4175 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01); 4194 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4176 } 4195 }
4177 4196
4178 if (sio_data->kind == nct6791 || sio_data->kind == nct6792) 4197 if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4198 sio_data->kind == nct6793)
4179 nct6791_enable_io_mapping(sioaddr); 4199 nct6791_enable_io_mapping(sioaddr);
4180 4200
4181 superio_exit(sioaddr); 4201 superio_exit(sioaddr);
@@ -4285,7 +4305,7 @@ static void __exit sensors_nct6775_exit(void)
4285} 4305}
4286 4306
4287MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); 4307MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4288MODULE_DESCRIPTION("NCT6106D/NCT6775F/NCT6776F/NCT6779D/NCT6791D/NCT6792D driver"); 4308MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4289MODULE_LICENSE("GPL"); 4309MODULE_LICENSE("GPL");
4290 4310
4291module_init(sensors_nct6775_init); 4311module_init(sensors_nct6775_init);
diff --git a/drivers/hwmon/pwm-fan.c b/drivers/hwmon/pwm-fan.c
index 2d9a712699ff..3e23003f78b0 100644
--- a/drivers/hwmon/pwm-fan.c
+++ b/drivers/hwmon/pwm-fan.c
@@ -323,6 +323,7 @@ static const struct of_device_id of_pwm_fan_match[] = {
323 { .compatible = "pwm-fan", }, 323 { .compatible = "pwm-fan", },
324 {}, 324 {},
325}; 325};
326MODULE_DEVICE_TABLE(of, of_pwm_fan_match);
326 327
327static struct platform_driver pwm_fan_driver = { 328static struct platform_driver pwm_fan_driver = {
328 .probe = pwm_fan_probe, 329 .probe = pwm_fan_probe,
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 3a3738fe016b..cd4510a63375 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -620,7 +620,7 @@ static struct cpuidle_state skl_cstates[] = {
620 .name = "C6-SKL", 620 .name = "C6-SKL",
621 .desc = "MWAIT 0x20", 621 .desc = "MWAIT 0x20",
622 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, 622 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
623 .exit_latency = 75, 623 .exit_latency = 85,
624 .target_residency = 200, 624 .target_residency = 200,
625 .enter = &intel_idle, 625 .enter = &intel_idle,
626 .enter_freeze = intel_idle_freeze, }, 626 .enter_freeze = intel_idle_freeze, },
@@ -636,11 +636,19 @@ static struct cpuidle_state skl_cstates[] = {
636 .name = "C8-SKL", 636 .name = "C8-SKL",
637 .desc = "MWAIT 0x40", 637 .desc = "MWAIT 0x40",
638 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED, 638 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
639 .exit_latency = 174, 639 .exit_latency = 200,
640 .target_residency = 800, 640 .target_residency = 800,
641 .enter = &intel_idle, 641 .enter = &intel_idle,
642 .enter_freeze = intel_idle_freeze, }, 642 .enter_freeze = intel_idle_freeze, },
643 { 643 {
644 .name = "C9-SKL",
645 .desc = "MWAIT 0x50",
646 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
647 .exit_latency = 480,
648 .target_residency = 5000,
649 .enter = &intel_idle,
650 .enter_freeze = intel_idle_freeze, },
651 {
644 .name = "C10-SKL", 652 .name = "C10-SKL",
645 .desc = "MWAIT 0x60", 653 .desc = "MWAIT 0x60",
646 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, 654 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
diff --git a/drivers/infiniband/Kconfig b/drivers/infiniband/Kconfig
index da4c6979fbb8..aa26f3c3416b 100644
--- a/drivers/infiniband/Kconfig
+++ b/drivers/infiniband/Kconfig
@@ -56,7 +56,6 @@ config INFINIBAND_ADDR_TRANS
56 56
57source "drivers/infiniband/hw/mthca/Kconfig" 57source "drivers/infiniband/hw/mthca/Kconfig"
58source "drivers/infiniband/hw/qib/Kconfig" 58source "drivers/infiniband/hw/qib/Kconfig"
59source "drivers/infiniband/hw/ehca/Kconfig"
60source "drivers/infiniband/hw/cxgb3/Kconfig" 59source "drivers/infiniband/hw/cxgb3/Kconfig"
61source "drivers/infiniband/hw/cxgb4/Kconfig" 60source "drivers/infiniband/hw/cxgb4/Kconfig"
62source "drivers/infiniband/hw/mlx4/Kconfig" 61source "drivers/infiniband/hw/mlx4/Kconfig"
diff --git a/drivers/infiniband/hw/Makefile b/drivers/infiniband/hw/Makefile
index 1bdb9996d371..aded2a5cc2d5 100644
--- a/drivers/infiniband/hw/Makefile
+++ b/drivers/infiniband/hw/Makefile
@@ -1,6 +1,5 @@
1obj-$(CONFIG_INFINIBAND_MTHCA) += mthca/ 1obj-$(CONFIG_INFINIBAND_MTHCA) += mthca/
2obj-$(CONFIG_INFINIBAND_QIB) += qib/ 2obj-$(CONFIG_INFINIBAND_QIB) += qib/
3obj-$(CONFIG_INFINIBAND_EHCA) += ehca/
4obj-$(CONFIG_INFINIBAND_CXGB3) += cxgb3/ 3obj-$(CONFIG_INFINIBAND_CXGB3) += cxgb3/
5obj-$(CONFIG_INFINIBAND_CXGB4) += cxgb4/ 4obj-$(CONFIG_INFINIBAND_CXGB4) += cxgb4/
6obj-$(CONFIG_MLX4_INFINIBAND) += mlx4/ 5obj-$(CONFIG_MLX4_INFINIBAND) += mlx4/
diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c
index 41d6911e244e..f1ccd40beae9 100644
--- a/drivers/infiniband/hw/mlx5/main.c
+++ b/drivers/infiniband/hw/mlx5/main.c
@@ -245,7 +245,6 @@ static int mlx5_ib_query_device(struct ib_device *ibdev,
245 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 245 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
246 if (MLX5_CAP_GEN(mdev, apm)) 246 if (MLX5_CAP_GEN(mdev, apm))
247 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 247 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
248 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
249 if (MLX5_CAP_GEN(mdev, xrc)) 248 if (MLX5_CAP_GEN(mdev, xrc))
250 props->device_cap_flags |= IB_DEVICE_XRC; 249 props->device_cap_flags |= IB_DEVICE_XRC;
251 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 250 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
@@ -795,53 +794,6 @@ static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vm
795 return 0; 794 return 0;
796} 795}
797 796
798static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn)
799{
800 struct mlx5_create_mkey_mbox_in *in;
801 struct mlx5_mkey_seg *seg;
802 struct mlx5_core_mr mr;
803 int err;
804
805 in = kzalloc(sizeof(*in), GFP_KERNEL);
806 if (!in)
807 return -ENOMEM;
808
809 seg = &in->seg;
810 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA;
811 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64);
812 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
813 seg->start_addr = 0;
814
815 err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in),
816 NULL, NULL, NULL);
817 if (err) {
818 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err);
819 goto err_in;
820 }
821
822 kfree(in);
823 *key = mr.key;
824
825 return 0;
826
827err_in:
828 kfree(in);
829
830 return err;
831}
832
833static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key)
834{
835 struct mlx5_core_mr mr;
836 int err;
837
838 memset(&mr, 0, sizeof(mr));
839 mr.key = key;
840 err = mlx5_core_destroy_mkey(dev->mdev, &mr);
841 if (err)
842 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key);
843}
844
845static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, 797static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev,
846 struct ib_ucontext *context, 798 struct ib_ucontext *context,
847 struct ib_udata *udata) 799 struct ib_udata *udata)
@@ -867,13 +819,6 @@ static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev,
867 kfree(pd); 819 kfree(pd);
868 return ERR_PTR(-EFAULT); 820 return ERR_PTR(-EFAULT);
869 } 821 }
870 } else {
871 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn);
872 if (err) {
873 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
874 kfree(pd);
875 return ERR_PTR(err);
876 }
877 } 822 }
878 823
879 return &pd->ibpd; 824 return &pd->ibpd;
@@ -884,9 +829,6 @@ static int mlx5_ib_dealloc_pd(struct ib_pd *pd)
884 struct mlx5_ib_dev *mdev = to_mdev(pd->device); 829 struct mlx5_ib_dev *mdev = to_mdev(pd->device);
885 struct mlx5_ib_pd *mpd = to_mpd(pd); 830 struct mlx5_ib_pd *mpd = to_mpd(pd);
886 831
887 if (!pd->uobject)
888 free_pa_mkey(mdev, mpd->pa_lkey);
889
890 mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn); 832 mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn);
891 kfree(mpd); 833 kfree(mpd);
892 834
@@ -1245,18 +1187,10 @@ static int create_dev_resources(struct mlx5_ib_resources *devr)
1245 struct ib_srq_init_attr attr; 1187 struct ib_srq_init_attr attr;
1246 struct mlx5_ib_dev *dev; 1188 struct mlx5_ib_dev *dev;
1247 struct ib_cq_init_attr cq_attr = {.cqe = 1}; 1189 struct ib_cq_init_attr cq_attr = {.cqe = 1};
1248 u32 rsvd_lkey;
1249 int ret = 0; 1190 int ret = 0;
1250 1191
1251 dev = container_of(devr, struct mlx5_ib_dev, devr); 1192 dev = container_of(devr, struct mlx5_ib_dev, devr);
1252 1193
1253 ret = mlx5_core_query_special_context(dev->mdev, &rsvd_lkey);
1254 if (ret) {
1255 pr_err("Failed to query special context %d\n", ret);
1256 return ret;
1257 }
1258 dev->ib_dev.local_dma_lkey = rsvd_lkey;
1259
1260 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); 1194 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL);
1261 if (IS_ERR(devr->p0)) { 1195 if (IS_ERR(devr->p0)) {
1262 ret = PTR_ERR(devr->p0); 1196 ret = PTR_ERR(devr->p0);
@@ -1418,6 +1352,7 @@ static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
1418 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX); 1352 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX);
1419 dev->ib_dev.owner = THIS_MODULE; 1353 dev->ib_dev.owner = THIS_MODULE;
1420 dev->ib_dev.node_type = RDMA_NODE_IB_CA; 1354 dev->ib_dev.node_type = RDMA_NODE_IB_CA;
1355 dev->ib_dev.local_dma_lkey = 0 /* not supported for now */;
1421 dev->num_ports = MLX5_CAP_GEN(mdev, num_ports); 1356 dev->num_ports = MLX5_CAP_GEN(mdev, num_ports);
1422 dev->ib_dev.phys_port_cnt = dev->num_ports; 1357 dev->ib_dev.phys_port_cnt = dev->num_ports;
1423 dev->ib_dev.num_comp_vectors = 1358 dev->ib_dev.num_comp_vectors =
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index bb8cda79e881..22123b79d550 100644
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -103,7 +103,6 @@ static inline struct mlx5_ib_ucontext *to_mucontext(struct ib_ucontext *ibuconte
103struct mlx5_ib_pd { 103struct mlx5_ib_pd {
104 struct ib_pd ibpd; 104 struct ib_pd ibpd;
105 u32 pdn; 105 u32 pdn;
106 u32 pa_lkey;
107}; 106};
108 107
109/* Use macros here so that don't have to duplicate 108/* Use macros here so that don't have to duplicate
@@ -213,7 +212,6 @@ struct mlx5_ib_qp {
213 int uuarn; 212 int uuarn;
214 213
215 int create_type; 214 int create_type;
216 u32 pa_lkey;
217 215
218 /* Store signature errors */ 216 /* Store signature errors */
219 bool signature_en; 217 bool signature_en;
diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c
index c745c6c5e10d..6f521a3418e8 100644
--- a/drivers/infiniband/hw/mlx5/qp.c
+++ b/drivers/infiniband/hw/mlx5/qp.c
@@ -925,8 +925,6 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
925 err = create_kernel_qp(dev, init_attr, qp, &in, &inlen); 925 err = create_kernel_qp(dev, init_attr, qp, &in, &inlen);
926 if (err) 926 if (err)
927 mlx5_ib_dbg(dev, "err %d\n", err); 927 mlx5_ib_dbg(dev, "err %d\n", err);
928 else
929 qp->pa_lkey = to_mpd(pd)->pa_lkey;
930 } 928 }
931 929
932 if (err) 930 if (err)
@@ -2045,7 +2043,7 @@ static void set_frwr_pages(struct mlx5_wqe_data_seg *dseg,
2045 mfrpl->mapped_page_list[i] = cpu_to_be64(page_list[i] | perm); 2043 mfrpl->mapped_page_list[i] = cpu_to_be64(page_list[i] | perm);
2046 dseg->addr = cpu_to_be64(mfrpl->map); 2044 dseg->addr = cpu_to_be64(mfrpl->map);
2047 dseg->byte_count = cpu_to_be32(ALIGN(sizeof(u64) * wr->wr.fast_reg.page_list_len, 64)); 2045 dseg->byte_count = cpu_to_be32(ALIGN(sizeof(u64) * wr->wr.fast_reg.page_list_len, 64));
2048 dseg->lkey = cpu_to_be32(pd->pa_lkey); 2046 dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey);
2049} 2047}
2050 2048
2051static __be32 send_ieth(struct ib_send_wr *wr) 2049static __be32 send_ieth(struct ib_send_wr *wr)
diff --git a/drivers/infiniband/ulp/ipoib/ipoib.h b/drivers/infiniband/ulp/ipoib/ipoib.h
index ca2873698d75..4cd5428a2399 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib.h
+++ b/drivers/infiniband/ulp/ipoib/ipoib.h
@@ -80,7 +80,7 @@ enum {
80 IPOIB_NUM_WC = 4, 80 IPOIB_NUM_WC = 4,
81 81
82 IPOIB_MAX_PATH_REC_QUEUE = 3, 82 IPOIB_MAX_PATH_REC_QUEUE = 3,
83 IPOIB_MAX_MCAST_QUEUE = 3, 83 IPOIB_MAX_MCAST_QUEUE = 64,
84 84
85 IPOIB_FLAG_OPER_UP = 0, 85 IPOIB_FLAG_OPER_UP = 0,
86 IPOIB_FLAG_INITIALIZED = 1, 86 IPOIB_FLAG_INITIALIZED = 1,
@@ -548,6 +548,8 @@ void ipoib_path_iter_read(struct ipoib_path_iter *iter,
548 548
549int ipoib_mcast_attach(struct net_device *dev, u16 mlid, 549int ipoib_mcast_attach(struct net_device *dev, u16 mlid,
550 union ib_gid *mgid, int set_qkey); 550 union ib_gid *mgid, int set_qkey);
551int ipoib_mcast_leave(struct net_device *dev, struct ipoib_mcast *mcast);
552struct ipoib_mcast *__ipoib_mcast_find(struct net_device *dev, void *mgid);
551 553
552int ipoib_init_qp(struct net_device *dev); 554int ipoib_init_qp(struct net_device *dev);
553int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca); 555int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca);
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index 36536ce5a3e2..f74316e679d2 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -1149,6 +1149,9 @@ static void __ipoib_reap_neigh(struct ipoib_dev_priv *priv)
1149 unsigned long dt; 1149 unsigned long dt;
1150 unsigned long flags; 1150 unsigned long flags;
1151 int i; 1151 int i;
1152 LIST_HEAD(remove_list);
1153 struct ipoib_mcast *mcast, *tmcast;
1154 struct net_device *dev = priv->dev;
1152 1155
1153 if (test_bit(IPOIB_STOP_NEIGH_GC, &priv->flags)) 1156 if (test_bit(IPOIB_STOP_NEIGH_GC, &priv->flags))
1154 return; 1157 return;
@@ -1176,6 +1179,19 @@ static void __ipoib_reap_neigh(struct ipoib_dev_priv *priv)
1176 lockdep_is_held(&priv->lock))) != NULL) { 1179 lockdep_is_held(&priv->lock))) != NULL) {
1177 /* was the neigh idle for two GC periods */ 1180 /* was the neigh idle for two GC periods */
1178 if (time_after(neigh_obsolete, neigh->alive)) { 1181 if (time_after(neigh_obsolete, neigh->alive)) {
1182 u8 *mgid = neigh->daddr + 4;
1183
1184 /* Is this multicast ? */
1185 if (*mgid == 0xff) {
1186 mcast = __ipoib_mcast_find(dev, mgid);
1187
1188 if (mcast && test_bit(IPOIB_MCAST_FLAG_SENDONLY, &mcast->flags)) {
1189 list_del(&mcast->list);
1190 rb_erase(&mcast->rb_node, &priv->multicast_tree);
1191 list_add_tail(&mcast->list, &remove_list);
1192 }
1193 }
1194
1179 rcu_assign_pointer(*np, 1195 rcu_assign_pointer(*np,
1180 rcu_dereference_protected(neigh->hnext, 1196 rcu_dereference_protected(neigh->hnext,
1181 lockdep_is_held(&priv->lock))); 1197 lockdep_is_held(&priv->lock)));
@@ -1191,6 +1207,8 @@ static void __ipoib_reap_neigh(struct ipoib_dev_priv *priv)
1191 1207
1192out_unlock: 1208out_unlock:
1193 spin_unlock_irqrestore(&priv->lock, flags); 1209 spin_unlock_irqrestore(&priv->lock, flags);
1210 list_for_each_entry_safe(mcast, tmcast, &remove_list, list)
1211 ipoib_mcast_leave(dev, mcast);
1194} 1212}
1195 1213
1196static void ipoib_reap_neigh(struct work_struct *work) 1214static void ipoib_reap_neigh(struct work_struct *work)
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_multicast.c b/drivers/infiniband/ulp/ipoib/ipoib_multicast.c
index 09a1748f9d13..136cbefe00f8 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_multicast.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_multicast.c
@@ -153,7 +153,7 @@ static struct ipoib_mcast *ipoib_mcast_alloc(struct net_device *dev,
153 return mcast; 153 return mcast;
154} 154}
155 155
156static struct ipoib_mcast *__ipoib_mcast_find(struct net_device *dev, void *mgid) 156struct ipoib_mcast *__ipoib_mcast_find(struct net_device *dev, void *mgid)
157{ 157{
158 struct ipoib_dev_priv *priv = netdev_priv(dev); 158 struct ipoib_dev_priv *priv = netdev_priv(dev);
159 struct rb_node *n = priv->multicast_tree.rb_node; 159 struct rb_node *n = priv->multicast_tree.rb_node;
@@ -508,17 +508,19 @@ static void ipoib_mcast_join(struct net_device *dev, struct ipoib_mcast *mcast)
508 rec.hop_limit = priv->broadcast->mcmember.hop_limit; 508 rec.hop_limit = priv->broadcast->mcmember.hop_limit;
509 509
510 /* 510 /*
511 * Historically Linux IPoIB has never properly supported SEND 511 * Send-only IB Multicast joins do not work at the core
512 * ONLY join. It emulated it by not providing all the required 512 * IB layer yet, so we can't use them here. However,
513 * attributes, which is enough to prevent group creation and 513 * we are emulating an Ethernet multicast send, which
514 * detect if there are full members or not. A major problem 514 * does not require a multicast subscription and will
515 * with supporting SEND ONLY is detecting when the group is 515 * still send properly. The most appropriate thing to
516 * auto-destroyed as IPoIB will cache the MLID.. 516 * do is to create the group if it doesn't exist as that
517 * most closely emulates the behavior, from a user space
518 * application perspecitive, of Ethernet multicast
519 * operation. For now, we do a full join, maybe later
520 * when the core IB layers support send only joins we
521 * will use them.
517 */ 522 */
518#if 1 523#if 0
519 if (test_bit(IPOIB_MCAST_FLAG_SENDONLY, &mcast->flags))
520 comp_mask &= ~IB_SA_MCMEMBER_REC_TRAFFIC_CLASS;
521#else
522 if (test_bit(IPOIB_MCAST_FLAG_SENDONLY, &mcast->flags)) 524 if (test_bit(IPOIB_MCAST_FLAG_SENDONLY, &mcast->flags))
523 rec.join_state = 4; 525 rec.join_state = 4;
524#endif 526#endif
@@ -675,7 +677,7 @@ int ipoib_mcast_stop_thread(struct net_device *dev)
675 return 0; 677 return 0;
676} 678}
677 679
678static int ipoib_mcast_leave(struct net_device *dev, struct ipoib_mcast *mcast) 680int ipoib_mcast_leave(struct net_device *dev, struct ipoib_mcast *mcast)
679{ 681{
680 struct ipoib_dev_priv *priv = netdev_priv(dev); 682 struct ipoib_dev_priv *priv = netdev_priv(dev);
681 int ret = 0; 683 int ret = 0;
diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.c b/drivers/infiniband/ulp/iser/iscsi_iser.c
index 1ace5d83a4d7..f58ff96b6cbb 100644
--- a/drivers/infiniband/ulp/iser/iscsi_iser.c
+++ b/drivers/infiniband/ulp/iser/iscsi_iser.c
@@ -97,6 +97,11 @@ unsigned int iser_max_sectors = ISER_DEF_MAX_SECTORS;
97module_param_named(max_sectors, iser_max_sectors, uint, S_IRUGO | S_IWUSR); 97module_param_named(max_sectors, iser_max_sectors, uint, S_IRUGO | S_IWUSR);
98MODULE_PARM_DESC(max_sectors, "Max number of sectors in a single scsi command (default:1024"); 98MODULE_PARM_DESC(max_sectors, "Max number of sectors in a single scsi command (default:1024");
99 99
100bool iser_always_reg = true;
101module_param_named(always_register, iser_always_reg, bool, S_IRUGO);
102MODULE_PARM_DESC(always_register,
103 "Always register memory, even for continuous memory regions (default:true)");
104
100bool iser_pi_enable = false; 105bool iser_pi_enable = false;
101module_param_named(pi_enable, iser_pi_enable, bool, S_IRUGO); 106module_param_named(pi_enable, iser_pi_enable, bool, S_IRUGO);
102MODULE_PARM_DESC(pi_enable, "Enable T10-PI offload support (default:disabled)"); 107MODULE_PARM_DESC(pi_enable, "Enable T10-PI offload support (default:disabled)");
diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.h b/drivers/infiniband/ulp/iser/iscsi_iser.h
index 86f6583485ef..a5edd6ede692 100644
--- a/drivers/infiniband/ulp/iser/iscsi_iser.h
+++ b/drivers/infiniband/ulp/iser/iscsi_iser.h
@@ -611,6 +611,7 @@ extern int iser_debug_level;
611extern bool iser_pi_enable; 611extern bool iser_pi_enable;
612extern int iser_pi_guard; 612extern int iser_pi_guard;
613extern unsigned int iser_max_sectors; 613extern unsigned int iser_max_sectors;
614extern bool iser_always_reg;
614 615
615int iser_assign_reg_ops(struct iser_device *device); 616int iser_assign_reg_ops(struct iser_device *device);
616 617
diff --git a/drivers/infiniband/ulp/iser/iser_memory.c b/drivers/infiniband/ulp/iser/iser_memory.c
index 2493cc748db8..4c46d67d37a1 100644
--- a/drivers/infiniband/ulp/iser/iser_memory.c
+++ b/drivers/infiniband/ulp/iser/iser_memory.c
@@ -803,11 +803,12 @@ static int
803iser_reg_prot_sg(struct iscsi_iser_task *task, 803iser_reg_prot_sg(struct iscsi_iser_task *task,
804 struct iser_data_buf *mem, 804 struct iser_data_buf *mem,
805 struct iser_fr_desc *desc, 805 struct iser_fr_desc *desc,
806 bool use_dma_key,
806 struct iser_mem_reg *reg) 807 struct iser_mem_reg *reg)
807{ 808{
808 struct iser_device *device = task->iser_conn->ib_conn.device; 809 struct iser_device *device = task->iser_conn->ib_conn.device;
809 810
810 if (mem->dma_nents == 1) 811 if (use_dma_key)
811 return iser_reg_dma(device, mem, reg); 812 return iser_reg_dma(device, mem, reg);
812 813
813 return device->reg_ops->reg_mem(task, mem, &desc->pi_ctx->rsc, reg); 814 return device->reg_ops->reg_mem(task, mem, &desc->pi_ctx->rsc, reg);
@@ -817,11 +818,12 @@ static int
817iser_reg_data_sg(struct iscsi_iser_task *task, 818iser_reg_data_sg(struct iscsi_iser_task *task,
818 struct iser_data_buf *mem, 819 struct iser_data_buf *mem,
819 struct iser_fr_desc *desc, 820 struct iser_fr_desc *desc,
821 bool use_dma_key,
820 struct iser_mem_reg *reg) 822 struct iser_mem_reg *reg)
821{ 823{
822 struct iser_device *device = task->iser_conn->ib_conn.device; 824 struct iser_device *device = task->iser_conn->ib_conn.device;
823 825
824 if (mem->dma_nents == 1) 826 if (use_dma_key)
825 return iser_reg_dma(device, mem, reg); 827 return iser_reg_dma(device, mem, reg);
826 828
827 return device->reg_ops->reg_mem(task, mem, &desc->rsc, reg); 829 return device->reg_ops->reg_mem(task, mem, &desc->rsc, reg);
@@ -836,14 +838,17 @@ int iser_reg_rdma_mem(struct iscsi_iser_task *task,
836 struct iser_mem_reg *reg = &task->rdma_reg[dir]; 838 struct iser_mem_reg *reg = &task->rdma_reg[dir];
837 struct iser_mem_reg *data_reg; 839 struct iser_mem_reg *data_reg;
838 struct iser_fr_desc *desc = NULL; 840 struct iser_fr_desc *desc = NULL;
841 bool use_dma_key;
839 int err; 842 int err;
840 843
841 err = iser_handle_unaligned_buf(task, mem, dir); 844 err = iser_handle_unaligned_buf(task, mem, dir);
842 if (unlikely(err)) 845 if (unlikely(err))
843 return err; 846 return err;
844 847
845 if (mem->dma_nents != 1 || 848 use_dma_key = (mem->dma_nents == 1 && !iser_always_reg &&
846 scsi_get_prot_op(task->sc) != SCSI_PROT_NORMAL) { 849 scsi_get_prot_op(task->sc) == SCSI_PROT_NORMAL);
850
851 if (!use_dma_key) {
847 desc = device->reg_ops->reg_desc_get(ib_conn); 852 desc = device->reg_ops->reg_desc_get(ib_conn);
848 reg->mem_h = desc; 853 reg->mem_h = desc;
849 } 854 }
@@ -853,7 +858,7 @@ int iser_reg_rdma_mem(struct iscsi_iser_task *task,
853 else 858 else
854 data_reg = &task->desc.data_reg; 859 data_reg = &task->desc.data_reg;
855 860
856 err = iser_reg_data_sg(task, mem, desc, data_reg); 861 err = iser_reg_data_sg(task, mem, desc, use_dma_key, data_reg);
857 if (unlikely(err)) 862 if (unlikely(err))
858 goto err_reg; 863 goto err_reg;
859 864
@@ -866,7 +871,8 @@ int iser_reg_rdma_mem(struct iscsi_iser_task *task,
866 if (unlikely(err)) 871 if (unlikely(err))
867 goto err_reg; 872 goto err_reg;
868 873
869 err = iser_reg_prot_sg(task, mem, desc, prot_reg); 874 err = iser_reg_prot_sg(task, mem, desc,
875 use_dma_key, prot_reg);
870 if (unlikely(err)) 876 if (unlikely(err))
871 goto err_reg; 877 goto err_reg;
872 } 878 }
diff --git a/drivers/infiniband/ulp/iser/iser_verbs.c b/drivers/infiniband/ulp/iser/iser_verbs.c
index ae70cc1463ac..85132d867bc8 100644
--- a/drivers/infiniband/ulp/iser/iser_verbs.c
+++ b/drivers/infiniband/ulp/iser/iser_verbs.c
@@ -133,11 +133,15 @@ static int iser_create_device_ib_res(struct iser_device *device)
133 (unsigned long)comp); 133 (unsigned long)comp);
134 } 134 }
135 135
136 device->mr = ib_get_dma_mr(device->pd, IB_ACCESS_LOCAL_WRITE | 136 if (!iser_always_reg) {
137 IB_ACCESS_REMOTE_WRITE | 137 int access = IB_ACCESS_LOCAL_WRITE |
138 IB_ACCESS_REMOTE_READ); 138 IB_ACCESS_REMOTE_WRITE |
139 if (IS_ERR(device->mr)) 139 IB_ACCESS_REMOTE_READ;
140 goto dma_mr_err; 140
141 device->mr = ib_get_dma_mr(device->pd, access);
142 if (IS_ERR(device->mr))
143 goto dma_mr_err;
144 }
141 145
142 INIT_IB_EVENT_HANDLER(&device->event_handler, device->ib_device, 146 INIT_IB_EVENT_HANDLER(&device->event_handler, device->ib_device,
143 iser_event_handler); 147 iser_event_handler);
@@ -147,7 +151,8 @@ static int iser_create_device_ib_res(struct iser_device *device)
147 return 0; 151 return 0;
148 152
149handler_err: 153handler_err:
150 ib_dereg_mr(device->mr); 154 if (device->mr)
155 ib_dereg_mr(device->mr);
151dma_mr_err: 156dma_mr_err:
152 for (i = 0; i < device->comps_used; i++) 157 for (i = 0; i < device->comps_used; i++)
153 tasklet_kill(&device->comps[i].tasklet); 158 tasklet_kill(&device->comps[i].tasklet);
@@ -173,7 +178,6 @@ comps_err:
173static void iser_free_device_ib_res(struct iser_device *device) 178static void iser_free_device_ib_res(struct iser_device *device)
174{ 179{
175 int i; 180 int i;
176 BUG_ON(device->mr == NULL);
177 181
178 for (i = 0; i < device->comps_used; i++) { 182 for (i = 0; i < device->comps_used; i++) {
179 struct iser_comp *comp = &device->comps[i]; 183 struct iser_comp *comp = &device->comps[i];
@@ -184,7 +188,8 @@ static void iser_free_device_ib_res(struct iser_device *device)
184 } 188 }
185 189
186 (void)ib_unregister_event_handler(&device->event_handler); 190 (void)ib_unregister_event_handler(&device->event_handler);
187 (void)ib_dereg_mr(device->mr); 191 if (device->mr)
192 (void)ib_dereg_mr(device->mr);
188 ib_dealloc_pd(device->pd); 193 ib_dealloc_pd(device->pd);
189 194
190 kfree(device->comps); 195 kfree(device->comps);
diff --git a/drivers/infiniband/ulp/isert/ib_isert.c b/drivers/infiniband/ulp/isert/ib_isert.c
index 403bd29443b8..aa59037d7504 100644
--- a/drivers/infiniband/ulp/isert/ib_isert.c
+++ b/drivers/infiniband/ulp/isert/ib_isert.c
@@ -238,8 +238,6 @@ isert_alloc_rx_descriptors(struct isert_conn *isert_conn)
238 rx_sg->lkey = device->pd->local_dma_lkey; 238 rx_sg->lkey = device->pd->local_dma_lkey;
239 } 239 }
240 240
241 isert_conn->rx_desc_head = 0;
242
243 return 0; 241 return 0;
244 242
245dma_map_fail: 243dma_map_fail:
@@ -634,7 +632,7 @@ static void
634isert_init_conn(struct isert_conn *isert_conn) 632isert_init_conn(struct isert_conn *isert_conn)
635{ 633{
636 isert_conn->state = ISER_CONN_INIT; 634 isert_conn->state = ISER_CONN_INIT;
637 INIT_LIST_HEAD(&isert_conn->accept_node); 635 INIT_LIST_HEAD(&isert_conn->node);
638 init_completion(&isert_conn->login_comp); 636 init_completion(&isert_conn->login_comp);
639 init_completion(&isert_conn->login_req_comp); 637 init_completion(&isert_conn->login_req_comp);
640 init_completion(&isert_conn->wait); 638 init_completion(&isert_conn->wait);
@@ -762,28 +760,15 @@ isert_connect_request(struct rdma_cm_id *cma_id, struct rdma_cm_event *event)
762 ret = isert_rdma_post_recvl(isert_conn); 760 ret = isert_rdma_post_recvl(isert_conn);
763 if (ret) 761 if (ret)
764 goto out_conn_dev; 762 goto out_conn_dev;
765 /*
766 * Obtain the second reference now before isert_rdma_accept() to
767 * ensure that any initiator generated REJECT CM event that occurs
768 * asynchronously won't drop the last reference until the error path
769 * in iscsi_target_login_sess_out() does it's ->iscsit_free_conn() ->
770 * isert_free_conn() -> isert_put_conn() -> kref_put().
771 */
772 if (!kref_get_unless_zero(&isert_conn->kref)) {
773 isert_warn("conn %p connect_release is running\n", isert_conn);
774 goto out_conn_dev;
775 }
776 763
777 ret = isert_rdma_accept(isert_conn); 764 ret = isert_rdma_accept(isert_conn);
778 if (ret) 765 if (ret)
779 goto out_conn_dev; 766 goto out_conn_dev;
780 767
781 mutex_lock(&isert_np->np_accept_mutex); 768 mutex_lock(&isert_np->mutex);
782 list_add_tail(&isert_conn->accept_node, &isert_np->np_accept_list); 769 list_add_tail(&isert_conn->node, &isert_np->accepted);
783 mutex_unlock(&isert_np->np_accept_mutex); 770 mutex_unlock(&isert_np->mutex);
784 771
785 isert_info("np %p: Allow accept_np to continue\n", np);
786 up(&isert_np->np_sem);
787 return 0; 772 return 0;
788 773
789out_conn_dev: 774out_conn_dev:
@@ -831,13 +816,21 @@ static void
831isert_connected_handler(struct rdma_cm_id *cma_id) 816isert_connected_handler(struct rdma_cm_id *cma_id)
832{ 817{
833 struct isert_conn *isert_conn = cma_id->qp->qp_context; 818 struct isert_conn *isert_conn = cma_id->qp->qp_context;
819 struct isert_np *isert_np = cma_id->context;
834 820
835 isert_info("conn %p\n", isert_conn); 821 isert_info("conn %p\n", isert_conn);
836 822
837 mutex_lock(&isert_conn->mutex); 823 mutex_lock(&isert_conn->mutex);
838 if (isert_conn->state != ISER_CONN_FULL_FEATURE) 824 isert_conn->state = ISER_CONN_UP;
839 isert_conn->state = ISER_CONN_UP; 825 kref_get(&isert_conn->kref);
840 mutex_unlock(&isert_conn->mutex); 826 mutex_unlock(&isert_conn->mutex);
827
828 mutex_lock(&isert_np->mutex);
829 list_move_tail(&isert_conn->node, &isert_np->pending);
830 mutex_unlock(&isert_np->mutex);
831
832 isert_info("np %p: Allow accept_np to continue\n", isert_np);
833 up(&isert_np->sem);
841} 834}
842 835
843static void 836static void
@@ -903,14 +896,14 @@ isert_np_cma_handler(struct isert_np *isert_np,
903 896
904 switch (event) { 897 switch (event) {
905 case RDMA_CM_EVENT_DEVICE_REMOVAL: 898 case RDMA_CM_EVENT_DEVICE_REMOVAL:
906 isert_np->np_cm_id = NULL; 899 isert_np->cm_id = NULL;
907 break; 900 break;
908 case RDMA_CM_EVENT_ADDR_CHANGE: 901 case RDMA_CM_EVENT_ADDR_CHANGE:
909 isert_np->np_cm_id = isert_setup_id(isert_np); 902 isert_np->cm_id = isert_setup_id(isert_np);
910 if (IS_ERR(isert_np->np_cm_id)) { 903 if (IS_ERR(isert_np->cm_id)) {
911 isert_err("isert np %p setup id failed: %ld\n", 904 isert_err("isert np %p setup id failed: %ld\n",
912 isert_np, PTR_ERR(isert_np->np_cm_id)); 905 isert_np, PTR_ERR(isert_np->cm_id));
913 isert_np->np_cm_id = NULL; 906 isert_np->cm_id = NULL;
914 } 907 }
915 break; 908 break;
916 default: 909 default:
@@ -929,7 +922,7 @@ isert_disconnected_handler(struct rdma_cm_id *cma_id,
929 struct isert_conn *isert_conn; 922 struct isert_conn *isert_conn;
930 bool terminating = false; 923 bool terminating = false;
931 924
932 if (isert_np->np_cm_id == cma_id) 925 if (isert_np->cm_id == cma_id)
933 return isert_np_cma_handler(cma_id->context, event); 926 return isert_np_cma_handler(cma_id->context, event);
934 927
935 isert_conn = cma_id->qp->qp_context; 928 isert_conn = cma_id->qp->qp_context;
@@ -945,13 +938,13 @@ isert_disconnected_handler(struct rdma_cm_id *cma_id,
945 if (terminating) 938 if (terminating)
946 goto out; 939 goto out;
947 940
948 mutex_lock(&isert_np->np_accept_mutex); 941 mutex_lock(&isert_np->mutex);
949 if (!list_empty(&isert_conn->accept_node)) { 942 if (!list_empty(&isert_conn->node)) {
950 list_del_init(&isert_conn->accept_node); 943 list_del_init(&isert_conn->node);
951 isert_put_conn(isert_conn); 944 isert_put_conn(isert_conn);
952 queue_work(isert_release_wq, &isert_conn->release_work); 945 queue_work(isert_release_wq, &isert_conn->release_work);
953 } 946 }
954 mutex_unlock(&isert_np->np_accept_mutex); 947 mutex_unlock(&isert_np->mutex);
955 948
956out: 949out:
957 return 0; 950 return 0;
@@ -962,6 +955,7 @@ isert_connect_error(struct rdma_cm_id *cma_id)
962{ 955{
963 struct isert_conn *isert_conn = cma_id->qp->qp_context; 956 struct isert_conn *isert_conn = cma_id->qp->qp_context;
964 957
958 list_del_init(&isert_conn->node);
965 isert_conn->cm_id = NULL; 959 isert_conn->cm_id = NULL;
966 isert_put_conn(isert_conn); 960 isert_put_conn(isert_conn);
967 961
@@ -1006,35 +1000,51 @@ isert_cma_handler(struct rdma_cm_id *cma_id, struct rdma_cm_event *event)
1006} 1000}
1007 1001
1008static int 1002static int
1009isert_post_recv(struct isert_conn *isert_conn, u32 count) 1003isert_post_recvm(struct isert_conn *isert_conn, u32 count)
1010{ 1004{
1011 struct ib_recv_wr *rx_wr, *rx_wr_failed; 1005 struct ib_recv_wr *rx_wr, *rx_wr_failed;
1012 int i, ret; 1006 int i, ret;
1013 unsigned int rx_head = isert_conn->rx_desc_head;
1014 struct iser_rx_desc *rx_desc; 1007 struct iser_rx_desc *rx_desc;
1015 1008
1016 for (rx_wr = isert_conn->rx_wr, i = 0; i < count; i++, rx_wr++) { 1009 for (rx_wr = isert_conn->rx_wr, i = 0; i < count; i++, rx_wr++) {
1017 rx_desc = &isert_conn->rx_descs[rx_head]; 1010 rx_desc = &isert_conn->rx_descs[i];
1018 rx_wr->wr_id = (uintptr_t)rx_desc; 1011 rx_wr->wr_id = (uintptr_t)rx_desc;
1019 rx_wr->sg_list = &rx_desc->rx_sg; 1012 rx_wr->sg_list = &rx_desc->rx_sg;
1020 rx_wr->num_sge = 1; 1013 rx_wr->num_sge = 1;
1021 rx_wr->next = rx_wr + 1; 1014 rx_wr->next = rx_wr + 1;
1022 rx_head = (rx_head + 1) & (ISERT_QP_MAX_RECV_DTOS - 1);
1023 } 1015 }
1024
1025 rx_wr--; 1016 rx_wr--;
1026 rx_wr->next = NULL; /* mark end of work requests list */ 1017 rx_wr->next = NULL; /* mark end of work requests list */
1027 1018
1028 isert_conn->post_recv_buf_count += count; 1019 isert_conn->post_recv_buf_count += count;
1029 ret = ib_post_recv(isert_conn->qp, isert_conn->rx_wr, 1020 ret = ib_post_recv(isert_conn->qp, isert_conn->rx_wr,
1030 &rx_wr_failed); 1021 &rx_wr_failed);
1031 if (ret) { 1022 if (ret) {
1032 isert_err("ib_post_recv() failed with ret: %d\n", ret); 1023 isert_err("ib_post_recv() failed with ret: %d\n", ret);
1033 isert_conn->post_recv_buf_count -= count; 1024 isert_conn->post_recv_buf_count -= count;
1034 } else {
1035 isert_dbg("Posted %d RX buffers\n", count);
1036 isert_conn->rx_desc_head = rx_head;
1037 } 1025 }
1026
1027 return ret;
1028}
1029
1030static int
1031isert_post_recv(struct isert_conn *isert_conn, struct iser_rx_desc *rx_desc)
1032{
1033 struct ib_recv_wr *rx_wr_failed, rx_wr;
1034 int ret;
1035
1036 rx_wr.wr_id = (uintptr_t)rx_desc;
1037 rx_wr.sg_list = &rx_desc->rx_sg;
1038 rx_wr.num_sge = 1;
1039 rx_wr.next = NULL;
1040
1041 isert_conn->post_recv_buf_count++;
1042 ret = ib_post_recv(isert_conn->qp, &rx_wr, &rx_wr_failed);
1043 if (ret) {
1044 isert_err("ib_post_recv() failed with ret: %d\n", ret);
1045 isert_conn->post_recv_buf_count--;
1046 }
1047
1038 return ret; 1048 return ret;
1039} 1049}
1040 1050
@@ -1205,7 +1215,8 @@ isert_put_login_tx(struct iscsi_conn *conn, struct iscsi_login *login,
1205 if (ret) 1215 if (ret)
1206 return ret; 1216 return ret;
1207 1217
1208 ret = isert_post_recv(isert_conn, ISERT_MIN_POSTED_RX); 1218 ret = isert_post_recvm(isert_conn,
1219 ISERT_QP_MAX_RECV_DTOS);
1209 if (ret) 1220 if (ret)
1210 return ret; 1221 return ret;
1211 1222
@@ -1278,7 +1289,7 @@ isert_rx_login_req(struct isert_conn *isert_conn)
1278} 1289}
1279 1290
1280static struct iscsi_cmd 1291static struct iscsi_cmd
1281*isert_allocate_cmd(struct iscsi_conn *conn) 1292*isert_allocate_cmd(struct iscsi_conn *conn, struct iser_rx_desc *rx_desc)
1282{ 1293{
1283 struct isert_conn *isert_conn = conn->context; 1294 struct isert_conn *isert_conn = conn->context;
1284 struct isert_cmd *isert_cmd; 1295 struct isert_cmd *isert_cmd;
@@ -1292,6 +1303,7 @@ static struct iscsi_cmd
1292 isert_cmd = iscsit_priv_cmd(cmd); 1303 isert_cmd = iscsit_priv_cmd(cmd);
1293 isert_cmd->conn = isert_conn; 1304 isert_cmd->conn = isert_conn;
1294 isert_cmd->iscsi_cmd = cmd; 1305 isert_cmd->iscsi_cmd = cmd;
1306 isert_cmd->rx_desc = rx_desc;
1295 1307
1296 return cmd; 1308 return cmd;
1297} 1309}
@@ -1303,9 +1315,9 @@ isert_handle_scsi_cmd(struct isert_conn *isert_conn,
1303{ 1315{
1304 struct iscsi_conn *conn = isert_conn->conn; 1316 struct iscsi_conn *conn = isert_conn->conn;
1305 struct iscsi_scsi_req *hdr = (struct iscsi_scsi_req *)buf; 1317 struct iscsi_scsi_req *hdr = (struct iscsi_scsi_req *)buf;
1306 struct scatterlist *sg;
1307 int imm_data, imm_data_len, unsol_data, sg_nents, rc; 1318 int imm_data, imm_data_len, unsol_data, sg_nents, rc;
1308 bool dump_payload = false; 1319 bool dump_payload = false;
1320 unsigned int data_len;
1309 1321
1310 rc = iscsit_setup_scsi_cmd(conn, cmd, buf); 1322 rc = iscsit_setup_scsi_cmd(conn, cmd, buf);
1311 if (rc < 0) 1323 if (rc < 0)
@@ -1314,7 +1326,10 @@ isert_handle_scsi_cmd(struct isert_conn *isert_conn,
1314 imm_data = cmd->immediate_data; 1326 imm_data = cmd->immediate_data;
1315 imm_data_len = cmd->first_burst_len; 1327 imm_data_len = cmd->first_burst_len;
1316 unsol_data = cmd->unsolicited_data; 1328 unsol_data = cmd->unsolicited_data;
1329 data_len = cmd->se_cmd.data_length;
1317 1330
1331 if (imm_data && imm_data_len == data_len)
1332 cmd->se_cmd.se_cmd_flags |= SCF_PASSTHROUGH_SG_TO_MEM_NOALLOC;
1318 rc = iscsit_process_scsi_cmd(conn, cmd, hdr); 1333 rc = iscsit_process_scsi_cmd(conn, cmd, hdr);
1319 if (rc < 0) { 1334 if (rc < 0) {
1320 return 0; 1335 return 0;
@@ -1326,13 +1341,20 @@ isert_handle_scsi_cmd(struct isert_conn *isert_conn,
1326 if (!imm_data) 1341 if (!imm_data)
1327 return 0; 1342 return 0;
1328 1343
1329 sg = &cmd->se_cmd.t_data_sg[0]; 1344 if (imm_data_len != data_len) {
1330 sg_nents = max(1UL, DIV_ROUND_UP(imm_data_len, PAGE_SIZE)); 1345 sg_nents = max(1UL, DIV_ROUND_UP(imm_data_len, PAGE_SIZE));
1331 1346 sg_copy_from_buffer(cmd->se_cmd.t_data_sg, sg_nents,
1332 isert_dbg("Copying Immediate SG: %p sg_nents: %u from %p imm_data_len: %d\n", 1347 &rx_desc->data[0], imm_data_len);
1333 sg, sg_nents, &rx_desc->data[0], imm_data_len); 1348 isert_dbg("Copy Immediate sg_nents: %u imm_data_len: %d\n",
1334 1349 sg_nents, imm_data_len);
1335 sg_copy_from_buffer(sg, sg_nents, &rx_desc->data[0], imm_data_len); 1350 } else {
1351 sg_init_table(&isert_cmd->sg, 1);
1352 cmd->se_cmd.t_data_sg = &isert_cmd->sg;
1353 cmd->se_cmd.t_data_nents = 1;
1354 sg_set_buf(&isert_cmd->sg, &rx_desc->data[0], imm_data_len);
1355 isert_dbg("Transfer Immediate imm_data_len: %d\n",
1356 imm_data_len);
1357 }
1336 1358
1337 cmd->write_data_done += imm_data_len; 1359 cmd->write_data_done += imm_data_len;
1338 1360
@@ -1407,6 +1429,15 @@ isert_handle_iscsi_dataout(struct isert_conn *isert_conn,
1407 if (rc < 0) 1429 if (rc < 0)
1408 return rc; 1430 return rc;
1409 1431
1432 /*
1433 * multiple data-outs on the same command can arrive -
1434 * so post the buffer before hand
1435 */
1436 rc = isert_post_recv(isert_conn, rx_desc);
1437 if (rc) {
1438 isert_err("ib_post_recv failed with %d\n", rc);
1439 return rc;
1440 }
1410 return 0; 1441 return 0;
1411} 1442}
1412 1443
@@ -1479,7 +1510,7 @@ isert_rx_opcode(struct isert_conn *isert_conn, struct iser_rx_desc *rx_desc,
1479 1510
1480 switch (opcode) { 1511 switch (opcode) {
1481 case ISCSI_OP_SCSI_CMD: 1512 case ISCSI_OP_SCSI_CMD:
1482 cmd = isert_allocate_cmd(conn); 1513 cmd = isert_allocate_cmd(conn, rx_desc);
1483 if (!cmd) 1514 if (!cmd)
1484 break; 1515 break;
1485 1516
@@ -1493,7 +1524,7 @@ isert_rx_opcode(struct isert_conn *isert_conn, struct iser_rx_desc *rx_desc,
1493 rx_desc, (unsigned char *)hdr); 1524 rx_desc, (unsigned char *)hdr);
1494 break; 1525 break;
1495 case ISCSI_OP_NOOP_OUT: 1526 case ISCSI_OP_NOOP_OUT:
1496 cmd = isert_allocate_cmd(conn); 1527 cmd = isert_allocate_cmd(conn, rx_desc);
1497 if (!cmd) 1528 if (!cmd)
1498 break; 1529 break;
1499 1530
@@ -1506,7 +1537,7 @@ isert_rx_opcode(struct isert_conn *isert_conn, struct iser_rx_desc *rx_desc,
1506 (unsigned char *)hdr); 1537 (unsigned char *)hdr);
1507 break; 1538 break;
1508 case ISCSI_OP_SCSI_TMFUNC: 1539 case ISCSI_OP_SCSI_TMFUNC:
1509 cmd = isert_allocate_cmd(conn); 1540 cmd = isert_allocate_cmd(conn, rx_desc);
1510 if (!cmd) 1541 if (!cmd)
1511 break; 1542 break;
1512 1543
@@ -1514,22 +1545,20 @@ isert_rx_opcode(struct isert_conn *isert_conn, struct iser_rx_desc *rx_desc,
1514 (unsigned char *)hdr); 1545 (unsigned char *)hdr);
1515 break; 1546 break;
1516 case ISCSI_OP_LOGOUT: 1547 case ISCSI_OP_LOGOUT:
1517 cmd = isert_allocate_cmd(conn); 1548 cmd = isert_allocate_cmd(conn, rx_desc);
1518 if (!cmd) 1549 if (!cmd)
1519 break; 1550 break;
1520 1551
1521 ret = iscsit_handle_logout_cmd(conn, cmd, (unsigned char *)hdr); 1552 ret = iscsit_handle_logout_cmd(conn, cmd, (unsigned char *)hdr);
1522 break; 1553 break;
1523 case ISCSI_OP_TEXT: 1554 case ISCSI_OP_TEXT:
1524 if (be32_to_cpu(hdr->ttt) != 0xFFFFFFFF) { 1555 if (be32_to_cpu(hdr->ttt) != 0xFFFFFFFF)
1525 cmd = iscsit_find_cmd_from_itt(conn, hdr->itt); 1556 cmd = iscsit_find_cmd_from_itt(conn, hdr->itt);
1526 if (!cmd) 1557 else
1527 break; 1558 cmd = isert_allocate_cmd(conn, rx_desc);
1528 } else { 1559
1529 cmd = isert_allocate_cmd(conn); 1560 if (!cmd)
1530 if (!cmd) 1561 break;
1531 break;
1532 }
1533 1562
1534 isert_cmd = iscsit_priv_cmd(cmd); 1563 isert_cmd = iscsit_priv_cmd(cmd);
1535 ret = isert_handle_text_cmd(isert_conn, isert_cmd, cmd, 1564 ret = isert_handle_text_cmd(isert_conn, isert_cmd, cmd,
@@ -1589,7 +1618,7 @@ isert_rcv_completion(struct iser_rx_desc *desc,
1589 struct ib_device *ib_dev = isert_conn->cm_id->device; 1618 struct ib_device *ib_dev = isert_conn->cm_id->device;
1590 struct iscsi_hdr *hdr; 1619 struct iscsi_hdr *hdr;
1591 u64 rx_dma; 1620 u64 rx_dma;
1592 int rx_buflen, outstanding; 1621 int rx_buflen;
1593 1622
1594 if ((char *)desc == isert_conn->login_req_buf) { 1623 if ((char *)desc == isert_conn->login_req_buf) {
1595 rx_dma = isert_conn->login_req_dma; 1624 rx_dma = isert_conn->login_req_dma;
@@ -1629,22 +1658,6 @@ isert_rcv_completion(struct iser_rx_desc *desc,
1629 DMA_FROM_DEVICE); 1658 DMA_FROM_DEVICE);
1630 1659
1631 isert_conn->post_recv_buf_count--; 1660 isert_conn->post_recv_buf_count--;
1632 isert_dbg("Decremented post_recv_buf_count: %d\n",
1633 isert_conn->post_recv_buf_count);
1634
1635 if ((char *)desc == isert_conn->login_req_buf)
1636 return;
1637
1638 outstanding = isert_conn->post_recv_buf_count;
1639 if (outstanding + ISERT_MIN_POSTED_RX <= ISERT_QP_MAX_RECV_DTOS) {
1640 int err, count = min(ISERT_QP_MAX_RECV_DTOS - outstanding,
1641 ISERT_MIN_POSTED_RX);
1642 err = isert_post_recv(isert_conn, count);
1643 if (err) {
1644 isert_err("isert_post_recv() count: %d failed, %d\n",
1645 count, err);
1646 }
1647 }
1648} 1661}
1649 1662
1650static int 1663static int
@@ -2156,6 +2169,12 @@ isert_post_response(struct isert_conn *isert_conn, struct isert_cmd *isert_cmd)
2156 struct ib_send_wr *wr_failed; 2169 struct ib_send_wr *wr_failed;
2157 int ret; 2170 int ret;
2158 2171
2172 ret = isert_post_recv(isert_conn, isert_cmd->rx_desc);
2173 if (ret) {
2174 isert_err("ib_post_recv failed with %d\n", ret);
2175 return ret;
2176 }
2177
2159 ret = ib_post_send(isert_conn->qp, &isert_cmd->tx_desc.send_wr, 2178 ret = ib_post_send(isert_conn->qp, &isert_cmd->tx_desc.send_wr,
2160 &wr_failed); 2179 &wr_failed);
2161 if (ret) { 2180 if (ret) {
@@ -2950,6 +2969,12 @@ isert_put_datain(struct iscsi_conn *conn, struct iscsi_cmd *cmd)
2950 &isert_cmd->tx_desc.send_wr); 2969 &isert_cmd->tx_desc.send_wr);
2951 isert_cmd->rdma_wr.s_send_wr.next = &isert_cmd->tx_desc.send_wr; 2970 isert_cmd->rdma_wr.s_send_wr.next = &isert_cmd->tx_desc.send_wr;
2952 wr->send_wr_num += 1; 2971 wr->send_wr_num += 1;
2972
2973 rc = isert_post_recv(isert_conn, isert_cmd->rx_desc);
2974 if (rc) {
2975 isert_err("ib_post_recv failed with %d\n", rc);
2976 return rc;
2977 }
2953 } 2978 }
2954 2979
2955 rc = ib_post_send(isert_conn->qp, wr->send_wr, &wr_failed); 2980 rc = ib_post_send(isert_conn->qp, wr->send_wr, &wr_failed);
@@ -2999,9 +3024,16 @@ isert_get_dataout(struct iscsi_conn *conn, struct iscsi_cmd *cmd, bool recovery)
2999static int 3024static int
3000isert_immediate_queue(struct iscsi_conn *conn, struct iscsi_cmd *cmd, int state) 3025isert_immediate_queue(struct iscsi_conn *conn, struct iscsi_cmd *cmd, int state)
3001{ 3026{
3002 int ret; 3027 struct isert_cmd *isert_cmd = iscsit_priv_cmd(cmd);
3028 int ret = 0;
3003 3029
3004 switch (state) { 3030 switch (state) {
3031 case ISTATE_REMOVE:
3032 spin_lock_bh(&conn->cmd_lock);
3033 list_del_init(&cmd->i_conn_node);
3034 spin_unlock_bh(&conn->cmd_lock);
3035 isert_put_cmd(isert_cmd, true);
3036 break;
3005 case ISTATE_SEND_NOPIN_WANT_RESPONSE: 3037 case ISTATE_SEND_NOPIN_WANT_RESPONSE:
3006 ret = isert_put_nopin(cmd, conn, false); 3038 ret = isert_put_nopin(cmd, conn, false);
3007 break; 3039 break;
@@ -3106,10 +3138,10 @@ isert_setup_np(struct iscsi_np *np,
3106 isert_err("Unable to allocate struct isert_np\n"); 3138 isert_err("Unable to allocate struct isert_np\n");
3107 return -ENOMEM; 3139 return -ENOMEM;
3108 } 3140 }
3109 sema_init(&isert_np->np_sem, 0); 3141 sema_init(&isert_np->sem, 0);
3110 mutex_init(&isert_np->np_accept_mutex); 3142 mutex_init(&isert_np->mutex);
3111 INIT_LIST_HEAD(&isert_np->np_accept_list); 3143 INIT_LIST_HEAD(&isert_np->accepted);
3112 init_completion(&isert_np->np_login_comp); 3144 INIT_LIST_HEAD(&isert_np->pending);
3113 isert_np->np = np; 3145 isert_np->np = np;
3114 3146
3115 /* 3147 /*
@@ -3125,7 +3157,7 @@ isert_setup_np(struct iscsi_np *np,
3125 goto out; 3157 goto out;
3126 } 3158 }
3127 3159
3128 isert_np->np_cm_id = isert_lid; 3160 isert_np->cm_id = isert_lid;
3129 np->np_context = isert_np; 3161 np->np_context = isert_np;
3130 3162
3131 return 0; 3163 return 0;
@@ -3214,7 +3246,7 @@ isert_accept_np(struct iscsi_np *np, struct iscsi_conn *conn)
3214 int ret; 3246 int ret;
3215 3247
3216accept_wait: 3248accept_wait:
3217 ret = down_interruptible(&isert_np->np_sem); 3249 ret = down_interruptible(&isert_np->sem);
3218 if (ret) 3250 if (ret)
3219 return -ENODEV; 3251 return -ENODEV;
3220 3252
@@ -3231,15 +3263,15 @@ accept_wait:
3231 } 3263 }
3232 spin_unlock_bh(&np->np_thread_lock); 3264 spin_unlock_bh(&np->np_thread_lock);
3233 3265
3234 mutex_lock(&isert_np->np_accept_mutex); 3266 mutex_lock(&isert_np->mutex);
3235 if (list_empty(&isert_np->np_accept_list)) { 3267 if (list_empty(&isert_np->pending)) {
3236 mutex_unlock(&isert_np->np_accept_mutex); 3268 mutex_unlock(&isert_np->mutex);
3237 goto accept_wait; 3269 goto accept_wait;
3238 } 3270 }
3239 isert_conn = list_first_entry(&isert_np->np_accept_list, 3271 isert_conn = list_first_entry(&isert_np->pending,
3240 struct isert_conn, accept_node); 3272 struct isert_conn, node);
3241 list_del_init(&isert_conn->accept_node); 3273 list_del_init(&isert_conn->node);
3242 mutex_unlock(&isert_np->np_accept_mutex); 3274 mutex_unlock(&isert_np->mutex);
3243 3275
3244 conn->context = isert_conn; 3276 conn->context = isert_conn;
3245 isert_conn->conn = conn; 3277 isert_conn->conn = conn;
@@ -3257,28 +3289,39 @@ isert_free_np(struct iscsi_np *np)
3257 struct isert_np *isert_np = np->np_context; 3289 struct isert_np *isert_np = np->np_context;
3258 struct isert_conn *isert_conn, *n; 3290 struct isert_conn *isert_conn, *n;
3259 3291
3260 if (isert_np->np_cm_id) 3292 if (isert_np->cm_id)
3261 rdma_destroy_id(isert_np->np_cm_id); 3293 rdma_destroy_id(isert_np->cm_id);
3262 3294
3263 /* 3295 /*
3264 * FIXME: At this point we don't have a good way to insure 3296 * FIXME: At this point we don't have a good way to insure
3265 * that at this point we don't have hanging connections that 3297 * that at this point we don't have hanging connections that
3266 * completed RDMA establishment but didn't start iscsi login 3298 * completed RDMA establishment but didn't start iscsi login
3267 * process. So work-around this by cleaning up what ever piled 3299 * process. So work-around this by cleaning up what ever piled
3268 * up in np_accept_list. 3300 * up in accepted and pending lists.
3269 */ 3301 */
3270 mutex_lock(&isert_np->np_accept_mutex); 3302 mutex_lock(&isert_np->mutex);
3271 if (!list_empty(&isert_np->np_accept_list)) { 3303 if (!list_empty(&isert_np->pending)) {
3272 isert_info("Still have isert connections, cleaning up...\n"); 3304 isert_info("Still have isert pending connections\n");
3305 list_for_each_entry_safe(isert_conn, n,
3306 &isert_np->pending,
3307 node) {
3308 isert_info("cleaning isert_conn %p state (%d)\n",
3309 isert_conn, isert_conn->state);
3310 isert_connect_release(isert_conn);
3311 }
3312 }
3313
3314 if (!list_empty(&isert_np->accepted)) {
3315 isert_info("Still have isert accepted connections\n");
3273 list_for_each_entry_safe(isert_conn, n, 3316 list_for_each_entry_safe(isert_conn, n,
3274 &isert_np->np_accept_list, 3317 &isert_np->accepted,
3275 accept_node) { 3318 node) {
3276 isert_info("cleaning isert_conn %p state (%d)\n", 3319 isert_info("cleaning isert_conn %p state (%d)\n",
3277 isert_conn, isert_conn->state); 3320 isert_conn, isert_conn->state);
3278 isert_connect_release(isert_conn); 3321 isert_connect_release(isert_conn);
3279 } 3322 }
3280 } 3323 }
3281 mutex_unlock(&isert_np->np_accept_mutex); 3324 mutex_unlock(&isert_np->mutex);
3282 3325
3283 np->np_context = NULL; 3326 np->np_context = NULL;
3284 kfree(isert_np); 3327 kfree(isert_np);
@@ -3345,6 +3388,41 @@ isert_wait4flush(struct isert_conn *isert_conn)
3345 wait_for_completion(&isert_conn->wait_comp_err); 3388 wait_for_completion(&isert_conn->wait_comp_err);
3346} 3389}
3347 3390
3391/**
3392 * isert_put_unsol_pending_cmds() - Drop commands waiting for
3393 * unsolicitate dataout
3394 * @conn: iscsi connection
3395 *
3396 * We might still have commands that are waiting for unsolicited
3397 * dataouts messages. We must put the extra reference on those
3398 * before blocking on the target_wait_for_session_cmds
3399 */
3400static void
3401isert_put_unsol_pending_cmds(struct iscsi_conn *conn)
3402{
3403 struct iscsi_cmd *cmd, *tmp;
3404 static LIST_HEAD(drop_cmd_list);
3405
3406 spin_lock_bh(&conn->cmd_lock);
3407 list_for_each_entry_safe(cmd, tmp, &conn->conn_cmd_list, i_conn_node) {
3408 if ((cmd->cmd_flags & ICF_NON_IMMEDIATE_UNSOLICITED_DATA) &&
3409 (cmd->write_data_done < conn->sess->sess_ops->FirstBurstLength) &&
3410 (cmd->write_data_done < cmd->se_cmd.data_length))
3411 list_move_tail(&cmd->i_conn_node, &drop_cmd_list);
3412 }
3413 spin_unlock_bh(&conn->cmd_lock);
3414
3415 list_for_each_entry_safe(cmd, tmp, &drop_cmd_list, i_conn_node) {
3416 list_del_init(&cmd->i_conn_node);
3417 if (cmd->i_state != ISTATE_REMOVE) {
3418 struct isert_cmd *isert_cmd = iscsit_priv_cmd(cmd);
3419
3420 isert_info("conn %p dropping cmd %p\n", conn, cmd);
3421 isert_put_cmd(isert_cmd, true);
3422 }
3423 }
3424}
3425
3348static void isert_wait_conn(struct iscsi_conn *conn) 3426static void isert_wait_conn(struct iscsi_conn *conn)
3349{ 3427{
3350 struct isert_conn *isert_conn = conn->context; 3428 struct isert_conn *isert_conn = conn->context;
@@ -3363,8 +3441,9 @@ static void isert_wait_conn(struct iscsi_conn *conn)
3363 isert_conn_terminate(isert_conn); 3441 isert_conn_terminate(isert_conn);
3364 mutex_unlock(&isert_conn->mutex); 3442 mutex_unlock(&isert_conn->mutex);
3365 3443
3366 isert_wait4cmds(conn);
3367 isert_wait4flush(isert_conn); 3444 isert_wait4flush(isert_conn);
3445 isert_put_unsol_pending_cmds(conn);
3446 isert_wait4cmds(conn);
3368 isert_wait4logout(isert_conn); 3447 isert_wait4logout(isert_conn);
3369 3448
3370 queue_work(isert_release_wq, &isert_conn->release_work); 3449 queue_work(isert_release_wq, &isert_conn->release_work);
diff --git a/drivers/infiniband/ulp/isert/ib_isert.h b/drivers/infiniband/ulp/isert/ib_isert.h
index 6a04ba3c0f72..c5b99bcecbcf 100644
--- a/drivers/infiniband/ulp/isert/ib_isert.h
+++ b/drivers/infiniband/ulp/isert/ib_isert.h
@@ -113,7 +113,6 @@ enum {
113}; 113};
114 114
115struct isert_rdma_wr { 115struct isert_rdma_wr {
116 struct list_head wr_list;
117 struct isert_cmd *isert_cmd; 116 struct isert_cmd *isert_cmd;
118 enum iser_ib_op_code iser_ib_op; 117 enum iser_ib_op_code iser_ib_op;
119 struct ib_sge *ib_sge; 118 struct ib_sge *ib_sge;
@@ -134,14 +133,13 @@ struct isert_cmd {
134 uint64_t write_va; 133 uint64_t write_va;
135 u64 pdu_buf_dma; 134 u64 pdu_buf_dma;
136 u32 pdu_buf_len; 135 u32 pdu_buf_len;
137 u32 read_va_off;
138 u32 write_va_off;
139 u32 rdma_wr_num;
140 struct isert_conn *conn; 136 struct isert_conn *conn;
141 struct iscsi_cmd *iscsi_cmd; 137 struct iscsi_cmd *iscsi_cmd;
142 struct iser_tx_desc tx_desc; 138 struct iser_tx_desc tx_desc;
139 struct iser_rx_desc *rx_desc;
143 struct isert_rdma_wr rdma_wr; 140 struct isert_rdma_wr rdma_wr;
144 struct work_struct comp_work; 141 struct work_struct comp_work;
142 struct scatterlist sg;
145}; 143};
146 144
147struct isert_device; 145struct isert_device;
@@ -159,11 +157,10 @@ struct isert_conn {
159 u64 login_req_dma; 157 u64 login_req_dma;
160 int login_req_len; 158 int login_req_len;
161 u64 login_rsp_dma; 159 u64 login_rsp_dma;
162 unsigned int rx_desc_head;
163 struct iser_rx_desc *rx_descs; 160 struct iser_rx_desc *rx_descs;
164 struct ib_recv_wr rx_wr[ISERT_MIN_POSTED_RX]; 161 struct ib_recv_wr rx_wr[ISERT_QP_MAX_RECV_DTOS];
165 struct iscsi_conn *conn; 162 struct iscsi_conn *conn;
166 struct list_head accept_node; 163 struct list_head node;
167 struct completion login_comp; 164 struct completion login_comp;
168 struct completion login_req_comp; 165 struct completion login_req_comp;
169 struct iser_tx_desc login_tx_desc; 166 struct iser_tx_desc login_tx_desc;
@@ -222,9 +219,9 @@ struct isert_device {
222 219
223struct isert_np { 220struct isert_np {
224 struct iscsi_np *np; 221 struct iscsi_np *np;
225 struct semaphore np_sem; 222 struct semaphore sem;
226 struct rdma_cm_id *np_cm_id; 223 struct rdma_cm_id *cm_id;
227 struct mutex np_accept_mutex; 224 struct mutex mutex;
228 struct list_head np_accept_list; 225 struct list_head accepted;
229 struct completion np_login_comp; 226 struct list_head pending;
230}; 227};
diff --git a/drivers/input/joystick/Kconfig b/drivers/input/joystick/Kconfig
index 56eb471b5576..4215b5382092 100644
--- a/drivers/input/joystick/Kconfig
+++ b/drivers/input/joystick/Kconfig
@@ -196,6 +196,7 @@ config JOYSTICK_TWIDJOY
196config JOYSTICK_ZHENHUA 196config JOYSTICK_ZHENHUA
197 tristate "5-byte Zhenhua RC transmitter" 197 tristate "5-byte Zhenhua RC transmitter"
198 select SERIO 198 select SERIO
199 select BITREVERSE
199 help 200 help
200 Say Y here if you have a Zhen Hua PPM-4CH transmitter which is 201 Say Y here if you have a Zhen Hua PPM-4CH transmitter which is
201 supplied with a ready to fly micro electric indoor helicopters 202 supplied with a ready to fly micro electric indoor helicopters
diff --git a/drivers/input/joystick/walkera0701.c b/drivers/input/joystick/walkera0701.c
index b76ac580703c..a8bc2fe170dd 100644
--- a/drivers/input/joystick/walkera0701.c
+++ b/drivers/input/joystick/walkera0701.c
@@ -150,7 +150,7 @@ static void walkera0701_irq_handler(void *handler_data)
150 if (w->counter == 24) { /* full frame */ 150 if (w->counter == 24) { /* full frame */
151 walkera0701_parse_frame(w); 151 walkera0701_parse_frame(w);
152 w->counter = NO_SYNC; 152 w->counter = NO_SYNC;
153 if (abs(pulse_time - SYNC_PULSE) < RESERVE) /* new frame sync */ 153 if (abs64(pulse_time - SYNC_PULSE) < RESERVE) /* new frame sync */
154 w->counter = 0; 154 w->counter = 0;
155 } else { 155 } else {
156 if ((pulse_time > (ANALOG_MIN_PULSE - RESERVE) 156 if ((pulse_time > (ANALOG_MIN_PULSE - RESERVE)
@@ -161,7 +161,7 @@ static void walkera0701_irq_handler(void *handler_data)
161 } else 161 } else
162 w->counter = NO_SYNC; 162 w->counter = NO_SYNC;
163 } 163 }
164 } else if (abs(pulse_time - SYNC_PULSE - BIN0_PULSE) < 164 } else if (abs64(pulse_time - SYNC_PULSE - BIN0_PULSE) <
165 RESERVE + BIN1_PULSE - BIN0_PULSE) /* frame sync .. */ 165 RESERVE + BIN1_PULSE - BIN0_PULSE) /* frame sync .. */
166 w->counter = 0; 166 w->counter = 0;
167 167
diff --git a/drivers/input/keyboard/omap4-keypad.c b/drivers/input/keyboard/omap4-keypad.c
index b052afec9a11..6639b2b8528a 100644
--- a/drivers/input/keyboard/omap4-keypad.c
+++ b/drivers/input/keyboard/omap4-keypad.c
@@ -266,7 +266,7 @@ static int omap4_keypad_probe(struct platform_device *pdev)
266 266
267 error = omap4_keypad_parse_dt(&pdev->dev, keypad_data); 267 error = omap4_keypad_parse_dt(&pdev->dev, keypad_data);
268 if (error) 268 if (error)
269 return error; 269 goto err_free_keypad;
270 270
271 res = request_mem_region(res->start, resource_size(res), pdev->name); 271 res = request_mem_region(res->start, resource_size(res), pdev->name);
272 if (!res) { 272 if (!res) {
diff --git a/drivers/input/misc/pm8941-pwrkey.c b/drivers/input/misc/pm8941-pwrkey.c
index 867db8a91372..e317b75357a0 100644
--- a/drivers/input/misc/pm8941-pwrkey.c
+++ b/drivers/input/misc/pm8941-pwrkey.c
@@ -93,7 +93,7 @@ static int pm8941_reboot_notify(struct notifier_block *nb,
93 default: 93 default:
94 reset_type = PON_PS_HOLD_TYPE_HARD_RESET; 94 reset_type = PON_PS_HOLD_TYPE_HARD_RESET;
95 break; 95 break;
96 }; 96 }
97 97
98 error = regmap_update_bits(pwrkey->regmap, 98 error = regmap_update_bits(pwrkey->regmap,
99 pwrkey->baseaddr + PON_PS_HOLD_RST_CTL, 99 pwrkey->baseaddr + PON_PS_HOLD_RST_CTL,
diff --git a/drivers/input/misc/uinput.c b/drivers/input/misc/uinput.c
index 345df9b03aed..5adbcedcb81c 100644
--- a/drivers/input/misc/uinput.c
+++ b/drivers/input/misc/uinput.c
@@ -414,7 +414,7 @@ static int uinput_setup_device(struct uinput_device *udev,
414 dev->id.product = user_dev->id.product; 414 dev->id.product = user_dev->id.product;
415 dev->id.version = user_dev->id.version; 415 dev->id.version = user_dev->id.version;
416 416
417 for_each_set_bit(i, dev->absbit, ABS_CNT) { 417 for (i = 0; i < ABS_CNT; i++) {
418 input_abs_set_max(dev, i, user_dev->absmax[i]); 418 input_abs_set_max(dev, i, user_dev->absmax[i]);
419 input_abs_set_min(dev, i, user_dev->absmin[i]); 419 input_abs_set_min(dev, i, user_dev->absmin[i]);
420 input_abs_set_fuzz(dev, i, user_dev->absfuzz[i]); 420 input_abs_set_fuzz(dev, i, user_dev->absfuzz[i]);
diff --git a/drivers/input/mouse/elan_i2c.h b/drivers/input/mouse/elan_i2c.h
index 73670f2aebfd..c0ec26118732 100644
--- a/drivers/input/mouse/elan_i2c.h
+++ b/drivers/input/mouse/elan_i2c.h
@@ -60,7 +60,7 @@ struct elan_transport_ops {
60 int (*get_sm_version)(struct i2c_client *client, 60 int (*get_sm_version)(struct i2c_client *client,
61 u8* ic_type, u8 *version); 61 u8* ic_type, u8 *version);
62 int (*get_checksum)(struct i2c_client *client, bool iap, u16 *csum); 62 int (*get_checksum)(struct i2c_client *client, bool iap, u16 *csum);
63 int (*get_product_id)(struct i2c_client *client, u8 *id); 63 int (*get_product_id)(struct i2c_client *client, u16 *id);
64 64
65 int (*get_max)(struct i2c_client *client, 65 int (*get_max)(struct i2c_client *client,
66 unsigned int *max_x, unsigned int *max_y); 66 unsigned int *max_x, unsigned int *max_y);
diff --git a/drivers/input/mouse/elan_i2c_core.c b/drivers/input/mouse/elan_i2c_core.c
index fa945304b9a5..5e1665bbaa0b 100644
--- a/drivers/input/mouse/elan_i2c_core.c
+++ b/drivers/input/mouse/elan_i2c_core.c
@@ -40,7 +40,7 @@
40#include "elan_i2c.h" 40#include "elan_i2c.h"
41 41
42#define DRIVER_NAME "elan_i2c" 42#define DRIVER_NAME "elan_i2c"
43#define ELAN_DRIVER_VERSION "1.6.0" 43#define ELAN_DRIVER_VERSION "1.6.1"
44#define ETP_MAX_PRESSURE 255 44#define ETP_MAX_PRESSURE 255
45#define ETP_FWIDTH_REDUCE 90 45#define ETP_FWIDTH_REDUCE 90
46#define ETP_FINGER_WIDTH 15 46#define ETP_FINGER_WIDTH 15
@@ -76,7 +76,7 @@ struct elan_tp_data {
76 unsigned int x_res; 76 unsigned int x_res;
77 unsigned int y_res; 77 unsigned int y_res;
78 78
79 u8 product_id; 79 u16 product_id;
80 u8 fw_version; 80 u8 fw_version;
81 u8 sm_version; 81 u8 sm_version;
82 u8 iap_version; 82 u8 iap_version;
@@ -98,15 +98,25 @@ static int elan_get_fwinfo(u8 iap_version, u16 *validpage_count,
98 u16 *signature_address) 98 u16 *signature_address)
99{ 99{
100 switch (iap_version) { 100 switch (iap_version) {
101 case 0x00:
102 case 0x06:
101 case 0x08: 103 case 0x08:
102 *validpage_count = 512; 104 *validpage_count = 512;
103 break; 105 break;
106 case 0x03:
107 case 0x07:
104 case 0x09: 108 case 0x09:
109 case 0x0A:
110 case 0x0B:
111 case 0x0C:
105 *validpage_count = 768; 112 *validpage_count = 768;
106 break; 113 break;
107 case 0x0D: 114 case 0x0D:
108 *validpage_count = 896; 115 *validpage_count = 896;
109 break; 116 break;
117 case 0x0E:
118 *validpage_count = 640;
119 break;
110 default: 120 default:
111 /* unknown ic type clear value */ 121 /* unknown ic type clear value */
112 *validpage_count = 0; 122 *validpage_count = 0;
@@ -266,11 +276,10 @@ static int elan_query_device_info(struct elan_tp_data *data)
266 276
267 error = elan_get_fwinfo(data->iap_version, &data->fw_validpage_count, 277 error = elan_get_fwinfo(data->iap_version, &data->fw_validpage_count,
268 &data->fw_signature_address); 278 &data->fw_signature_address);
269 if (error) { 279 if (error)
270 dev_err(&data->client->dev, 280 dev_warn(&data->client->dev,
271 "unknown iap version %d\n", data->iap_version); 281 "unexpected iap version %#04x (ic type: %#04x), firmware update will not work\n",
272 return error; 282 data->iap_version, data->ic_type);
273 }
274 283
275 return 0; 284 return 0;
276} 285}
@@ -486,6 +495,9 @@ static ssize_t elan_sysfs_update_fw(struct device *dev,
486 const u8 *fw_signature; 495 const u8 *fw_signature;
487 static const u8 signature[] = {0xAA, 0x55, 0xCC, 0x33, 0xFF, 0xFF}; 496 static const u8 signature[] = {0xAA, 0x55, 0xCC, 0x33, 0xFF, 0xFF};
488 497
498 if (data->fw_validpage_count == 0)
499 return -EINVAL;
500
489 /* Look for a firmware with the product id appended. */ 501 /* Look for a firmware with the product id appended. */
490 fw_name = kasprintf(GFP_KERNEL, ETP_FW_NAME, data->product_id); 502 fw_name = kasprintf(GFP_KERNEL, ETP_FW_NAME, data->product_id);
491 if (!fw_name) { 503 if (!fw_name) {
diff --git a/drivers/input/mouse/elan_i2c_i2c.c b/drivers/input/mouse/elan_i2c_i2c.c
index 683c840c9dd7..a679e56c44cd 100644
--- a/drivers/input/mouse/elan_i2c_i2c.c
+++ b/drivers/input/mouse/elan_i2c_i2c.c
@@ -276,7 +276,7 @@ static int elan_i2c_get_sm_version(struct i2c_client *client,
276 return 0; 276 return 0;
277} 277}
278 278
279static int elan_i2c_get_product_id(struct i2c_client *client, u8 *id) 279static int elan_i2c_get_product_id(struct i2c_client *client, u16 *id)
280{ 280{
281 int error; 281 int error;
282 u8 val[3]; 282 u8 val[3];
@@ -287,7 +287,7 @@ static int elan_i2c_get_product_id(struct i2c_client *client, u8 *id)
287 return error; 287 return error;
288 } 288 }
289 289
290 *id = val[0]; 290 *id = le16_to_cpup((__le16 *)val);
291 return 0; 291 return 0;
292} 292}
293 293
diff --git a/drivers/input/mouse/elan_i2c_smbus.c b/drivers/input/mouse/elan_i2c_smbus.c
index ff36a366b2aa..cb6aecbc1dc2 100644
--- a/drivers/input/mouse/elan_i2c_smbus.c
+++ b/drivers/input/mouse/elan_i2c_smbus.c
@@ -183,7 +183,7 @@ static int elan_smbus_get_sm_version(struct i2c_client *client,
183 return 0; 183 return 0;
184} 184}
185 185
186static int elan_smbus_get_product_id(struct i2c_client *client, u8 *id) 186static int elan_smbus_get_product_id(struct i2c_client *client, u16 *id)
187{ 187{
188 int error; 188 int error;
189 u8 val[3]; 189 u8 val[3];
@@ -195,7 +195,7 @@ static int elan_smbus_get_product_id(struct i2c_client *client, u8 *id)
195 return error; 195 return error;
196 } 196 }
197 197
198 *id = val[1]; 198 *id = be16_to_cpup((__be16 *)val);
199 return 0; 199 return 0;
200} 200}
201 201
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index 994ae7886156..6025eb430c0a 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -519,18 +519,14 @@ static int synaptics_set_mode(struct psmouse *psmouse)
519 struct synaptics_data *priv = psmouse->private; 519 struct synaptics_data *priv = psmouse->private;
520 520
521 priv->mode = 0; 521 priv->mode = 0;
522 522 if (priv->absolute_mode)
523 if (priv->absolute_mode) {
524 priv->mode |= SYN_BIT_ABSOLUTE_MODE; 523 priv->mode |= SYN_BIT_ABSOLUTE_MODE;
525 if (SYN_CAP_EXTENDED(priv->capabilities)) 524 if (priv->disable_gesture)
526 priv->mode |= SYN_BIT_W_MODE;
527 }
528
529 if (!SYN_MODE_WMODE(priv->mode) && priv->disable_gesture)
530 priv->mode |= SYN_BIT_DISABLE_GESTURE; 525 priv->mode |= SYN_BIT_DISABLE_GESTURE;
531
532 if (psmouse->rate >= 80) 526 if (psmouse->rate >= 80)
533 priv->mode |= SYN_BIT_HIGH_RATE; 527 priv->mode |= SYN_BIT_HIGH_RATE;
528 if (SYN_CAP_EXTENDED(priv->capabilities))
529 priv->mode |= SYN_BIT_W_MODE;
534 530
535 if (synaptics_mode_cmd(psmouse, priv->mode)) 531 if (synaptics_mode_cmd(psmouse, priv->mode))
536 return -1; 532 return -1;
diff --git a/drivers/input/serio/libps2.c b/drivers/input/serio/libps2.c
index 75516996db20..316f2c897101 100644
--- a/drivers/input/serio/libps2.c
+++ b/drivers/input/serio/libps2.c
@@ -212,12 +212,17 @@ int __ps2_command(struct ps2dev *ps2dev, unsigned char *param, int command)
212 * time before the ACK arrives. 212 * time before the ACK arrives.
213 */ 213 */
214 if (ps2_sendbyte(ps2dev, command & 0xff, 214 if (ps2_sendbyte(ps2dev, command & 0xff,
215 command == PS2_CMD_RESET_BAT ? 1000 : 200)) 215 command == PS2_CMD_RESET_BAT ? 1000 : 200)) {
216 goto out; 216 serio_pause_rx(ps2dev->serio);
217 goto out_reset_flags;
218 }
217 219
218 for (i = 0; i < send; i++) 220 for (i = 0; i < send; i++) {
219 if (ps2_sendbyte(ps2dev, param[i], 200)) 221 if (ps2_sendbyte(ps2dev, param[i], 200)) {
220 goto out; 222 serio_pause_rx(ps2dev->serio);
223 goto out_reset_flags;
224 }
225 }
221 226
222 /* 227 /*
223 * The reset command takes a long time to execute. 228 * The reset command takes a long time to execute.
@@ -234,17 +239,18 @@ int __ps2_command(struct ps2dev *ps2dev, unsigned char *param, int command)
234 !(ps2dev->flags & PS2_FLAG_CMD), timeout); 239 !(ps2dev->flags & PS2_FLAG_CMD), timeout);
235 } 240 }
236 241
242 serio_pause_rx(ps2dev->serio);
243
237 if (param) 244 if (param)
238 for (i = 0; i < receive; i++) 245 for (i = 0; i < receive; i++)
239 param[i] = ps2dev->cmdbuf[(receive - 1) - i]; 246 param[i] = ps2dev->cmdbuf[(receive - 1) - i];
240 247
241 if (ps2dev->cmdcnt && (command != PS2_CMD_RESET_BAT || ps2dev->cmdcnt != 1)) 248 if (ps2dev->cmdcnt && (command != PS2_CMD_RESET_BAT || ps2dev->cmdcnt != 1))
242 goto out; 249 goto out_reset_flags;
243 250
244 rc = 0; 251 rc = 0;
245 252
246 out: 253 out_reset_flags:
247 serio_pause_rx(ps2dev->serio);
248 ps2dev->flags = 0; 254 ps2dev->flags = 0;
249 serio_continue_rx(ps2dev->serio); 255 serio_continue_rx(ps2dev->serio);
250 256
diff --git a/drivers/input/serio/parkbd.c b/drivers/input/serio/parkbd.c
index 26b45936f9fd..1e8cd6f1fe9e 100644
--- a/drivers/input/serio/parkbd.c
+++ b/drivers/input/serio/parkbd.c
@@ -194,6 +194,7 @@ static int __init parkbd_init(void)
194 parkbd_port = parkbd_allocate_serio(); 194 parkbd_port = parkbd_allocate_serio();
195 if (!parkbd_port) { 195 if (!parkbd_port) {
196 parport_release(parkbd_dev); 196 parport_release(parkbd_dev);
197 parport_unregister_device(parkbd_dev);
197 return -ENOMEM; 198 return -ENOMEM;
198 } 199 }
199 200
diff --git a/drivers/input/touchscreen/imx6ul_tsc.c b/drivers/input/touchscreen/imx6ul_tsc.c
index ff0b75813daa..8275267eac25 100644
--- a/drivers/input/touchscreen/imx6ul_tsc.c
+++ b/drivers/input/touchscreen/imx6ul_tsc.c
@@ -94,7 +94,7 @@ struct imx6ul_tsc {
94 * TSC module need ADC to get the measure value. So 94 * TSC module need ADC to get the measure value. So
95 * before config TSC, we should initialize ADC module. 95 * before config TSC, we should initialize ADC module.
96 */ 96 */
97static void imx6ul_adc_init(struct imx6ul_tsc *tsc) 97static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
98{ 98{
99 int adc_hc = 0; 99 int adc_hc = 0;
100 int adc_gc; 100 int adc_gc;
@@ -122,17 +122,23 @@ static void imx6ul_adc_init(struct imx6ul_tsc *tsc)
122 122
123 timeout = wait_for_completion_timeout 123 timeout = wait_for_completion_timeout
124 (&tsc->completion, ADC_TIMEOUT); 124 (&tsc->completion, ADC_TIMEOUT);
125 if (timeout == 0) 125 if (timeout == 0) {
126 dev_err(tsc->dev, "Timeout for adc calibration\n"); 126 dev_err(tsc->dev, "Timeout for adc calibration\n");
127 return -ETIMEDOUT;
128 }
127 129
128 adc_gs = readl(tsc->adc_regs + REG_ADC_GS); 130 adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
129 if (adc_gs & ADC_CALF) 131 if (adc_gs & ADC_CALF) {
130 dev_err(tsc->dev, "ADC calibration failed\n"); 132 dev_err(tsc->dev, "ADC calibration failed\n");
133 return -EINVAL;
134 }
131 135
132 /* TSC need the ADC work in hardware trigger */ 136 /* TSC need the ADC work in hardware trigger */
133 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); 137 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
134 adc_cfg |= ADC_HARDWARE_TRIGGER; 138 adc_cfg |= ADC_HARDWARE_TRIGGER;
135 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); 139 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
140
141 return 0;
136} 142}
137 143
138/* 144/*
@@ -188,11 +194,17 @@ static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
188 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 194 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
189} 195}
190 196
191static void imx6ul_tsc_init(struct imx6ul_tsc *tsc) 197static int imx6ul_tsc_init(struct imx6ul_tsc *tsc)
192{ 198{
193 imx6ul_adc_init(tsc); 199 int err;
200
201 err = imx6ul_adc_init(tsc);
202 if (err)
203 return err;
194 imx6ul_tsc_channel_config(tsc); 204 imx6ul_tsc_channel_config(tsc);
195 imx6ul_tsc_set(tsc); 205 imx6ul_tsc_set(tsc);
206
207 return 0;
196} 208}
197 209
198static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc) 210static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc)
@@ -311,9 +323,7 @@ static int imx6ul_tsc_open(struct input_dev *input_dev)
311 return err; 323 return err;
312 } 324 }
313 325
314 imx6ul_tsc_init(tsc); 326 return imx6ul_tsc_init(tsc);
315
316 return 0;
317} 327}
318 328
319static void imx6ul_tsc_close(struct input_dev *input_dev) 329static void imx6ul_tsc_close(struct input_dev *input_dev)
@@ -337,7 +347,7 @@ static int imx6ul_tsc_probe(struct platform_device *pdev)
337 int tsc_irq; 347 int tsc_irq;
338 int adc_irq; 348 int adc_irq;
339 349
340 tsc = devm_kzalloc(&pdev->dev, sizeof(struct imx6ul_tsc), GFP_KERNEL); 350 tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL);
341 if (!tsc) 351 if (!tsc)
342 return -ENOMEM; 352 return -ENOMEM;
343 353
@@ -345,7 +355,7 @@ static int imx6ul_tsc_probe(struct platform_device *pdev)
345 if (!input_dev) 355 if (!input_dev)
346 return -ENOMEM; 356 return -ENOMEM;
347 357
348 input_dev->name = "iMX6UL TouchScreen Controller"; 358 input_dev->name = "iMX6UL Touchscreen Controller";
349 input_dev->id.bustype = BUS_HOST; 359 input_dev->id.bustype = BUS_HOST;
350 360
351 input_dev->open = imx6ul_tsc_open; 361 input_dev->open = imx6ul_tsc_open;
@@ -406,7 +416,7 @@ static int imx6ul_tsc_probe(struct platform_device *pdev)
406 } 416 }
407 417
408 adc_irq = platform_get_irq(pdev, 1); 418 adc_irq = platform_get_irq(pdev, 1);
409 if (adc_irq <= 0) { 419 if (adc_irq < 0) {
410 dev_err(&pdev->dev, "no adc irq resource?\n"); 420 dev_err(&pdev->dev, "no adc irq resource?\n");
411 return adc_irq; 421 return adc_irq;
412 } 422 }
@@ -491,7 +501,7 @@ static int __maybe_unused imx6ul_tsc_resume(struct device *dev)
491 goto out; 501 goto out;
492 } 502 }
493 503
494 imx6ul_tsc_init(tsc); 504 retval = imx6ul_tsc_init(tsc);
495 } 505 }
496 506
497out: 507out:
diff --git a/drivers/input/touchscreen/mms114.c b/drivers/input/touchscreen/mms114.c
index 7cce87650fc8..1fafc9f57af6 100644
--- a/drivers/input/touchscreen/mms114.c
+++ b/drivers/input/touchscreen/mms114.c
@@ -394,12 +394,12 @@ static struct mms114_platform_data *mms114_parse_dt(struct device *dev)
394 if (of_property_read_u32(np, "x-size", &pdata->x_size)) { 394 if (of_property_read_u32(np, "x-size", &pdata->x_size)) {
395 dev_err(dev, "failed to get x-size property\n"); 395 dev_err(dev, "failed to get x-size property\n");
396 return NULL; 396 return NULL;
397 }; 397 }
398 398
399 if (of_property_read_u32(np, "y-size", &pdata->y_size)) { 399 if (of_property_read_u32(np, "y-size", &pdata->y_size)) {
400 dev_err(dev, "failed to get y-size property\n"); 400 dev_err(dev, "failed to get y-size property\n");
401 return NULL; 401 return NULL;
402 }; 402 }
403 403
404 of_property_read_u32(np, "contact-threshold", 404 of_property_read_u32(np, "contact-threshold",
405 &pdata->contact_threshold); 405 &pdata->contact_threshold);
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index 4664c2a96c67..d9da766719c8 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -43,7 +43,7 @@ config IOMMU_IO_PGTABLE_LPAE_SELFTEST
43endmenu 43endmenu
44 44
45config IOMMU_IOVA 45config IOMMU_IOVA
46 bool 46 tristate
47 47
48config OF_IOMMU 48config OF_IOMMU
49 def_bool y 49 def_bool y
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 2d7349a3ee14..041bc1810a86 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -3215,6 +3215,8 @@ static struct iova *intel_alloc_iova(struct device *dev,
3215 3215
3216 /* Restrict dma_mask to the width that the iommu can handle */ 3216 /* Restrict dma_mask to the width that the iommu can handle */
3217 dma_mask = min_t(uint64_t, DOMAIN_MAX_ADDR(domain->gaw), dma_mask); 3217 dma_mask = min_t(uint64_t, DOMAIN_MAX_ADDR(domain->gaw), dma_mask);
3218 /* Ensure we reserve the whole size-aligned region */
3219 nrpages = __roundup_pow_of_two(nrpages);
3218 3220
3219 if (!dmar_forcedac && dma_mask > DMA_BIT_MASK(32)) { 3221 if (!dmar_forcedac && dma_mask > DMA_BIT_MASK(32)) {
3220 /* 3222 /*
@@ -3711,7 +3713,7 @@ static inline int iommu_devinfo_cache_init(void)
3711static int __init iommu_init_mempool(void) 3713static int __init iommu_init_mempool(void)
3712{ 3714{
3713 int ret; 3715 int ret;
3714 ret = iommu_iova_cache_init(); 3716 ret = iova_cache_get();
3715 if (ret) 3717 if (ret)
3716 return ret; 3718 return ret;
3717 3719
@@ -3725,7 +3727,7 @@ static int __init iommu_init_mempool(void)
3725 3727
3726 kmem_cache_destroy(iommu_domain_cache); 3728 kmem_cache_destroy(iommu_domain_cache);
3727domain_error: 3729domain_error:
3728 iommu_iova_cache_destroy(); 3730 iova_cache_put();
3729 3731
3730 return -ENOMEM; 3732 return -ENOMEM;
3731} 3733}
@@ -3734,7 +3736,7 @@ static void __init iommu_exit_mempool(void)
3734{ 3736{
3735 kmem_cache_destroy(iommu_devinfo_cache); 3737 kmem_cache_destroy(iommu_devinfo_cache);
3736 kmem_cache_destroy(iommu_domain_cache); 3738 kmem_cache_destroy(iommu_domain_cache);
3737 iommu_iova_cache_destroy(); 3739 iova_cache_put();
3738} 3740}
3739 3741
3740static void quirk_ioat_snb_local_iommu(struct pci_dev *pdev) 3742static void quirk_ioat_snb_local_iommu(struct pci_dev *pdev)
diff --git a/drivers/iommu/iova.c b/drivers/iommu/iova.c
index b7c3d923f3e1..fa0adef32bd6 100644
--- a/drivers/iommu/iova.c
+++ b/drivers/iommu/iova.c
@@ -18,42 +18,9 @@
18 */ 18 */
19 19
20#include <linux/iova.h> 20#include <linux/iova.h>
21#include <linux/module.h>
21#include <linux/slab.h> 22#include <linux/slab.h>
22 23
23static struct kmem_cache *iommu_iova_cache;
24
25int iommu_iova_cache_init(void)
26{
27 int ret = 0;
28
29 iommu_iova_cache = kmem_cache_create("iommu_iova",
30 sizeof(struct iova),
31 0,
32 SLAB_HWCACHE_ALIGN,
33 NULL);
34 if (!iommu_iova_cache) {
35 pr_err("Couldn't create iova cache\n");
36 ret = -ENOMEM;
37 }
38
39 return ret;
40}
41
42void iommu_iova_cache_destroy(void)
43{
44 kmem_cache_destroy(iommu_iova_cache);
45}
46
47struct iova *alloc_iova_mem(void)
48{
49 return kmem_cache_alloc(iommu_iova_cache, GFP_ATOMIC);
50}
51
52void free_iova_mem(struct iova *iova)
53{
54 kmem_cache_free(iommu_iova_cache, iova);
55}
56
57void 24void
58init_iova_domain(struct iova_domain *iovad, unsigned long granule, 25init_iova_domain(struct iova_domain *iovad, unsigned long granule,
59 unsigned long start_pfn, unsigned long pfn_32bit) 26 unsigned long start_pfn, unsigned long pfn_32bit)
@@ -72,6 +39,7 @@ init_iova_domain(struct iova_domain *iovad, unsigned long granule,
72 iovad->start_pfn = start_pfn; 39 iovad->start_pfn = start_pfn;
73 iovad->dma_32bit_pfn = pfn_32bit; 40 iovad->dma_32bit_pfn = pfn_32bit;
74} 41}
42EXPORT_SYMBOL_GPL(init_iova_domain);
75 43
76static struct rb_node * 44static struct rb_node *
77__get_cached_rbnode(struct iova_domain *iovad, unsigned long *limit_pfn) 45__get_cached_rbnode(struct iova_domain *iovad, unsigned long *limit_pfn)
@@ -120,19 +88,14 @@ __cached_rbnode_delete_update(struct iova_domain *iovad, struct iova *free)
120 } 88 }
121} 89}
122 90
123/* Computes the padding size required, to make the 91/*
124 * the start address naturally aligned on its size 92 * Computes the padding size required, to make the start address
93 * naturally aligned on the power-of-two order of its size
125 */ 94 */
126static int 95static unsigned int
127iova_get_pad_size(int size, unsigned int limit_pfn) 96iova_get_pad_size(unsigned int size, unsigned int limit_pfn)
128{ 97{
129 unsigned int pad_size = 0; 98 return (limit_pfn + 1 - size) & (__roundup_pow_of_two(size) - 1);
130 unsigned int order = ilog2(size);
131
132 if (order)
133 pad_size = (limit_pfn + 1) % (1 << order);
134
135 return pad_size;
136} 99}
137 100
138static int __alloc_and_insert_iova_range(struct iova_domain *iovad, 101static int __alloc_and_insert_iova_range(struct iova_domain *iovad,
@@ -242,6 +205,57 @@ iova_insert_rbtree(struct rb_root *root, struct iova *iova)
242 rb_insert_color(&iova->node, root); 205 rb_insert_color(&iova->node, root);
243} 206}
244 207
208static struct kmem_cache *iova_cache;
209static unsigned int iova_cache_users;
210static DEFINE_MUTEX(iova_cache_mutex);
211
212struct iova *alloc_iova_mem(void)
213{
214 return kmem_cache_alloc(iova_cache, GFP_ATOMIC);
215}
216EXPORT_SYMBOL(alloc_iova_mem);
217
218void free_iova_mem(struct iova *iova)
219{
220 kmem_cache_free(iova_cache, iova);
221}
222EXPORT_SYMBOL(free_iova_mem);
223
224int iova_cache_get(void)
225{
226 mutex_lock(&iova_cache_mutex);
227 if (!iova_cache_users) {
228 iova_cache = kmem_cache_create(
229 "iommu_iova", sizeof(struct iova), 0,
230 SLAB_HWCACHE_ALIGN, NULL);
231 if (!iova_cache) {
232 mutex_unlock(&iova_cache_mutex);
233 printk(KERN_ERR "Couldn't create iova cache\n");
234 return -ENOMEM;
235 }
236 }
237
238 iova_cache_users++;
239 mutex_unlock(&iova_cache_mutex);
240
241 return 0;
242}
243EXPORT_SYMBOL_GPL(iova_cache_get);
244
245void iova_cache_put(void)
246{
247 mutex_lock(&iova_cache_mutex);
248 if (WARN_ON(!iova_cache_users)) {
249 mutex_unlock(&iova_cache_mutex);
250 return;
251 }
252 iova_cache_users--;
253 if (!iova_cache_users)
254 kmem_cache_destroy(iova_cache);
255 mutex_unlock(&iova_cache_mutex);
256}
257EXPORT_SYMBOL_GPL(iova_cache_put);
258
245/** 259/**
246 * alloc_iova - allocates an iova 260 * alloc_iova - allocates an iova
247 * @iovad: - iova domain in question 261 * @iovad: - iova domain in question
@@ -265,12 +279,6 @@ alloc_iova(struct iova_domain *iovad, unsigned long size,
265 if (!new_iova) 279 if (!new_iova)
266 return NULL; 280 return NULL;
267 281
268 /* If size aligned is set then round the size to
269 * to next power of two.
270 */
271 if (size_aligned)
272 size = __roundup_pow_of_two(size);
273
274 ret = __alloc_and_insert_iova_range(iovad, size, limit_pfn, 282 ret = __alloc_and_insert_iova_range(iovad, size, limit_pfn,
275 new_iova, size_aligned); 283 new_iova, size_aligned);
276 284
@@ -281,6 +289,7 @@ alloc_iova(struct iova_domain *iovad, unsigned long size,
281 289
282 return new_iova; 290 return new_iova;
283} 291}
292EXPORT_SYMBOL_GPL(alloc_iova);
284 293
285/** 294/**
286 * find_iova - find's an iova for a given pfn 295 * find_iova - find's an iova for a given pfn
@@ -321,6 +330,7 @@ struct iova *find_iova(struct iova_domain *iovad, unsigned long pfn)
321 spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags); 330 spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags);
322 return NULL; 331 return NULL;
323} 332}
333EXPORT_SYMBOL_GPL(find_iova);
324 334
325/** 335/**
326 * __free_iova - frees the given iova 336 * __free_iova - frees the given iova
@@ -339,6 +349,7 @@ __free_iova(struct iova_domain *iovad, struct iova *iova)
339 spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags); 349 spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags);
340 free_iova_mem(iova); 350 free_iova_mem(iova);
341} 351}
352EXPORT_SYMBOL_GPL(__free_iova);
342 353
343/** 354/**
344 * free_iova - finds and frees the iova for a given pfn 355 * free_iova - finds and frees the iova for a given pfn
@@ -356,6 +367,7 @@ free_iova(struct iova_domain *iovad, unsigned long pfn)
356 __free_iova(iovad, iova); 367 __free_iova(iovad, iova);
357 368
358} 369}
370EXPORT_SYMBOL_GPL(free_iova);
359 371
360/** 372/**
361 * put_iova_domain - destroys the iova doamin 373 * put_iova_domain - destroys the iova doamin
@@ -378,6 +390,7 @@ void put_iova_domain(struct iova_domain *iovad)
378 } 390 }
379 spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags); 391 spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags);
380} 392}
393EXPORT_SYMBOL_GPL(put_iova_domain);
381 394
382static int 395static int
383__is_range_overlap(struct rb_node *node, 396__is_range_overlap(struct rb_node *node,
@@ -467,6 +480,7 @@ finish:
467 spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags); 480 spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags);
468 return iova; 481 return iova;
469} 482}
483EXPORT_SYMBOL_GPL(reserve_iova);
470 484
471/** 485/**
472 * copy_reserved_iova - copies the reserved between domains 486 * copy_reserved_iova - copies the reserved between domains
@@ -493,6 +507,7 @@ copy_reserved_iova(struct iova_domain *from, struct iova_domain *to)
493 } 507 }
494 spin_unlock_irqrestore(&from->iova_rbtree_lock, flags); 508 spin_unlock_irqrestore(&from->iova_rbtree_lock, flags);
495} 509}
510EXPORT_SYMBOL_GPL(copy_reserved_iova);
496 511
497struct iova * 512struct iova *
498split_and_remove_iova(struct iova_domain *iovad, struct iova *iova, 513split_and_remove_iova(struct iova_domain *iovad, struct iova *iova,
@@ -534,3 +549,6 @@ error:
534 free_iova_mem(prev); 549 free_iova_mem(prev);
535 return NULL; 550 return NULL;
536} 551}
552
553MODULE_AUTHOR("Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>");
554MODULE_LICENSE("GPL");
diff --git a/drivers/irqchip/exynos-combiner.c b/drivers/irqchip/exynos-combiner.c
index e9c6f2a5b52d..cd7d3bc78e34 100644
--- a/drivers/irqchip/exynos-combiner.c
+++ b/drivers/irqchip/exynos-combiner.c
@@ -65,12 +65,10 @@ static void combiner_unmask_irq(struct irq_data *data)
65 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET); 65 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
66} 66}
67 67
68static void combiner_handle_cascade_irq(unsigned int __irq, 68static void combiner_handle_cascade_irq(struct irq_desc *desc)
69 struct irq_desc *desc)
70{ 69{
71 struct combiner_chip_data *chip_data = irq_desc_get_handler_data(desc); 70 struct combiner_chip_data *chip_data = irq_desc_get_handler_data(desc);
72 struct irq_chip *chip = irq_desc_get_chip(desc); 71 struct irq_chip *chip = irq_desc_get_chip(desc);
73 unsigned int irq = irq_desc_get_irq(desc);
74 unsigned int cascade_irq, combiner_irq; 72 unsigned int cascade_irq, combiner_irq;
75 unsigned long status; 73 unsigned long status;
76 74
@@ -88,7 +86,7 @@ static void combiner_handle_cascade_irq(unsigned int __irq,
88 cascade_irq = irq_find_mapping(combiner_irq_domain, combiner_irq); 86 cascade_irq = irq_find_mapping(combiner_irq_domain, combiner_irq);
89 87
90 if (unlikely(!cascade_irq)) 88 if (unlikely(!cascade_irq))
91 handle_bad_irq(irq, desc); 89 handle_bad_irq(desc);
92 else 90 else
93 generic_handle_irq(cascade_irq); 91 generic_handle_irq(cascade_irq);
94 92
@@ -165,7 +163,7 @@ static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq,
165 163
166 irq_set_chip_and_handler(irq, &combiner_chip, handle_level_irq); 164 irq_set_chip_and_handler(irq, &combiner_chip, handle_level_irq);
167 irq_set_chip_data(irq, &combiner_data[hw >> 3]); 165 irq_set_chip_data(irq, &combiner_data[hw >> 3]);
168 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 166 irq_set_probe(irq);
169 167
170 return 0; 168 return 0;
171} 169}
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 39b72da0c143..655cb967a1f2 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -200,7 +200,6 @@ static int armada_370_xp_msi_map(struct irq_domain *domain, unsigned int virq,
200{ 200{
201 irq_set_chip_and_handler(virq, &armada_370_xp_msi_irq_chip, 201 irq_set_chip_and_handler(virq, &armada_370_xp_msi_irq_chip,
202 handle_simple_irq); 202 handle_simple_irq);
203 set_irq_flags(virq, IRQF_VALID);
204 203
205 return 0; 204 return 0;
206} 205}
@@ -317,7 +316,7 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,
317 irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip, 316 irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
318 handle_level_irq); 317 handle_level_irq);
319 } 318 }
320 set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); 319 irq_set_probe(virq);
321 320
322 return 0; 321 return 0;
323} 322}
@@ -447,8 +446,7 @@ static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained)
447static void armada_370_xp_handle_msi_irq(struct pt_regs *r, bool b) {} 446static void armada_370_xp_handle_msi_irq(struct pt_regs *r, bool b) {}
448#endif 447#endif
449 448
450static void armada_370_xp_mpic_handle_cascade_irq(unsigned int irq, 449static void armada_370_xp_mpic_handle_cascade_irq(struct irq_desc *desc)
451 struct irq_desc *desc)
452{ 450{
453 struct irq_chip *chip = irq_desc_get_chip(desc); 451 struct irq_chip *chip = irq_desc_get_chip(desc);
454 unsigned long irqmap, irqn, irqsrc, cpuid; 452 unsigned long irqmap, irqn, irqsrc, cpuid;
diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c
index 9da9942ac83c..f6d680485bee 100644
--- a/drivers/irqchip/irq-atmel-aic5.c
+++ b/drivers/irqchip/irq-atmel-aic5.c
@@ -88,28 +88,36 @@ static void aic5_mask(struct irq_data *d)
88{ 88{
89 struct irq_domain *domain = d->domain; 89 struct irq_domain *domain = d->domain;
90 struct irq_domain_chip_generic *dgc = domain->gc; 90 struct irq_domain_chip_generic *dgc = domain->gc;
91 struct irq_chip_generic *gc = dgc->gc[0]; 91 struct irq_chip_generic *bgc = dgc->gc[0];
92 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
92 93
93 /* Disable interrupt on AIC5 */ 94 /*
94 irq_gc_lock(gc); 95 * Disable interrupt on AIC5. We always take the lock of the
96 * first irq chip as all chips share the same registers.
97 */
98 irq_gc_lock(bgc);
95 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR); 99 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);
96 irq_reg_writel(gc, 1, AT91_AIC5_IDCR); 100 irq_reg_writel(gc, 1, AT91_AIC5_IDCR);
97 gc->mask_cache &= ~d->mask; 101 gc->mask_cache &= ~d->mask;
98 irq_gc_unlock(gc); 102 irq_gc_unlock(bgc);
99} 103}
100 104
101static void aic5_unmask(struct irq_data *d) 105static void aic5_unmask(struct irq_data *d)
102{ 106{
103 struct irq_domain *domain = d->domain; 107 struct irq_domain *domain = d->domain;
104 struct irq_domain_chip_generic *dgc = domain->gc; 108 struct irq_domain_chip_generic *dgc = domain->gc;
105 struct irq_chip_generic *gc = dgc->gc[0]; 109 struct irq_chip_generic *bgc = dgc->gc[0];
110 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
106 111
107 /* Enable interrupt on AIC5 */ 112 /*
108 irq_gc_lock(gc); 113 * Enable interrupt on AIC5. We always take the lock of the
114 * first irq chip as all chips share the same registers.
115 */
116 irq_gc_lock(bgc);
109 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR); 117 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);
110 irq_reg_writel(gc, 1, AT91_AIC5_IECR); 118 irq_reg_writel(gc, 1, AT91_AIC5_IECR);
111 gc->mask_cache |= d->mask; 119 gc->mask_cache |= d->mask;
112 irq_gc_unlock(gc); 120 irq_gc_unlock(bgc);
113} 121}
114 122
115static int aic5_retrigger(struct irq_data *d) 123static int aic5_retrigger(struct irq_data *d)
diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c
index ed4ca9deca70..bf9cc5f2e839 100644
--- a/drivers/irqchip/irq-bcm2835.c
+++ b/drivers/irqchip/irq-bcm2835.c
@@ -96,7 +96,7 @@ struct armctrl_ic {
96static struct armctrl_ic intc __read_mostly; 96static struct armctrl_ic intc __read_mostly;
97static void __exception_irq_entry bcm2835_handle_irq( 97static void __exception_irq_entry bcm2835_handle_irq(
98 struct pt_regs *regs); 98 struct pt_regs *regs);
99static void bcm2836_chained_handle_irq(unsigned int irq, struct irq_desc *desc); 99static void bcm2836_chained_handle_irq(struct irq_desc *desc);
100 100
101static void armctrl_mask_irq(struct irq_data *d) 101static void armctrl_mask_irq(struct irq_data *d)
102{ 102{
@@ -166,7 +166,7 @@ static int __init armctrl_of_init(struct device_node *node,
166 BUG_ON(irq <= 0); 166 BUG_ON(irq <= 0);
167 irq_set_chip_and_handler(irq, &armctrl_chip, 167 irq_set_chip_and_handler(irq, &armctrl_chip,
168 handle_level_irq); 168 handle_level_irq);
169 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 169 irq_set_probe(irq);
170 } 170 }
171 } 171 }
172 172
@@ -245,7 +245,7 @@ static void __exception_irq_entry bcm2835_handle_irq(
245 handle_IRQ(irq_linear_revmap(intc.domain, hwirq), regs); 245 handle_IRQ(irq_linear_revmap(intc.domain, hwirq), regs);
246} 246}
247 247
248static void bcm2836_chained_handle_irq(unsigned int irq, struct irq_desc *desc) 248static void bcm2836_chained_handle_irq(struct irq_desc *desc)
249{ 249{
250 u32 hwirq; 250 u32 hwirq;
251 251
diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c
index 409bdc6366c2..0fea985ef1dc 100644
--- a/drivers/irqchip/irq-bcm7038-l1.c
+++ b/drivers/irqchip/irq-bcm7038-l1.c
@@ -115,7 +115,7 @@ static inline void l1_writel(u32 val, void __iomem *reg)
115 writel(val, reg); 115 writel(val, reg);
116} 116}
117 117
118static void bcm7038_l1_irq_handle(unsigned int irq, struct irq_desc *desc) 118static void bcm7038_l1_irq_handle(struct irq_desc *desc)
119{ 119{
120 struct bcm7038_l1_chip *intc = irq_desc_get_handler_data(desc); 120 struct bcm7038_l1_chip *intc = irq_desc_get_handler_data(desc);
121 struct bcm7038_l1_cpu *cpu; 121 struct bcm7038_l1_cpu *cpu;
diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c
index d3f976913a6f..61b18ab33ad9 100644
--- a/drivers/irqchip/irq-bcm7120-l2.c
+++ b/drivers/irqchip/irq-bcm7120-l2.c
@@ -56,7 +56,7 @@ struct bcm7120_l2_intc_data {
56 const __be32 *map_mask_prop; 56 const __be32 *map_mask_prop;
57}; 57};
58 58
59static void bcm7120_l2_intc_irq_handle(unsigned int irq, struct irq_desc *desc) 59static void bcm7120_l2_intc_irq_handle(struct irq_desc *desc)
60{ 60{
61 struct bcm7120_l1_intc_data *data = irq_desc_get_handler_data(desc); 61 struct bcm7120_l1_intc_data *data = irq_desc_get_handler_data(desc);
62 struct bcm7120_l2_intc_data *b = data->b; 62 struct bcm7120_l2_intc_data *b = data->b;
diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c
index aedda06191eb..65cd341f331a 100644
--- a/drivers/irqchip/irq-brcmstb-l2.c
+++ b/drivers/irqchip/irq-brcmstb-l2.c
@@ -49,13 +49,12 @@ struct brcmstb_l2_intc_data {
49 u32 saved_mask; /* for suspend/resume */ 49 u32 saved_mask; /* for suspend/resume */
50}; 50};
51 51
52static void brcmstb_l2_intc_irq_handle(unsigned int __irq, 52static void brcmstb_l2_intc_irq_handle(struct irq_desc *desc)
53 struct irq_desc *desc)
54{ 53{
55 struct brcmstb_l2_intc_data *b = irq_desc_get_handler_data(desc); 54 struct brcmstb_l2_intc_data *b = irq_desc_get_handler_data(desc);
56 struct irq_chip_generic *gc = irq_get_domain_generic_chip(b->domain, 0); 55 struct irq_chip_generic *gc = irq_get_domain_generic_chip(b->domain, 0);
57 struct irq_chip *chip = irq_desc_get_chip(desc); 56 struct irq_chip *chip = irq_desc_get_chip(desc);
58 unsigned int irq = irq_desc_get_irq(desc); 57 unsigned int irq;
59 u32 status; 58 u32 status;
60 59
61 chained_irq_enter(chip, desc); 60 chained_irq_enter(chip, desc);
@@ -65,7 +64,7 @@ static void brcmstb_l2_intc_irq_handle(unsigned int __irq,
65 64
66 if (status == 0) { 65 if (status == 0) {
67 raw_spin_lock(&desc->lock); 66 raw_spin_lock(&desc->lock);
68 handle_bad_irq(irq, desc); 67 handle_bad_irq(desc);
69 raw_spin_unlock(&desc->lock); 68 raw_spin_unlock(&desc->lock);
70 goto out; 69 goto out;
71 } 70 }
diff --git a/drivers/irqchip/irq-clps711x.c b/drivers/irqchip/irq-clps711x.c
index 2dd929eed9e0..eb5eb0cd414d 100644
--- a/drivers/irqchip/irq-clps711x.c
+++ b/drivers/irqchip/irq-clps711x.c
@@ -132,14 +132,14 @@ static int __init clps711x_intc_irq_map(struct irq_domain *h, unsigned int virq,
132 irq_hw_number_t hw) 132 irq_hw_number_t hw)
133{ 133{
134 irq_flow_handler_t handler = handle_level_irq; 134 irq_flow_handler_t handler = handle_level_irq;
135 unsigned int flags = IRQF_VALID | IRQF_PROBE; 135 unsigned int flags = 0;
136 136
137 if (!clps711x_irqs[hw].flags) 137 if (!clps711x_irqs[hw].flags)
138 return 0; 138 return 0;
139 139
140 if (clps711x_irqs[hw].flags & CLPS711X_FLAG_FIQ) { 140 if (clps711x_irqs[hw].flags & CLPS711X_FLAG_FIQ) {
141 handler = handle_bad_irq; 141 handler = handle_bad_irq;
142 flags |= IRQF_NOAUTOEN; 142 flags |= IRQ_NOAUTOEN;
143 } else if (clps711x_irqs[hw].eoi) { 143 } else if (clps711x_irqs[hw].eoi) {
144 handler = handle_fasteoi_irq; 144 handler = handle_fasteoi_irq;
145 } 145 }
@@ -149,7 +149,7 @@ static int __init clps711x_intc_irq_map(struct irq_domain *h, unsigned int virq,
149 writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hw].eoi); 149 writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hw].eoi);
150 150
151 irq_set_chip_and_handler(virq, &clps711x_intc_chip, handler); 151 irq_set_chip_and_handler(virq, &clps711x_intc_chip, handler);
152 set_irq_flags(virq, flags); 152 irq_modify_status(virq, IRQ_NOPROBE, flags);
153 153
154 return 0; 154 return 0;
155} 155}
diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c
index efd95d9955e7..052f266364c0 100644
--- a/drivers/irqchip/irq-dw-apb-ictl.c
+++ b/drivers/irqchip/irq-dw-apb-ictl.c
@@ -26,7 +26,7 @@
26#define APB_INT_FINALSTATUS_H 0x34 26#define APB_INT_FINALSTATUS_H 0x34
27#define APB_INT_BASE_OFFSET 0x04 27#define APB_INT_BASE_OFFSET 0x04
28 28
29static void dw_apb_ictl_handler(unsigned int irq, struct irq_desc *desc) 29static void dw_apb_ictl_handler(struct irq_desc *desc)
30{ 30{
31 struct irq_domain *d = irq_desc_get_handler_data(desc); 31 struct irq_domain *d = irq_desc_get_handler_data(desc);
32 struct irq_chip *chip = irq_desc_get_chip(desc); 32 struct irq_chip *chip = irq_desc_get_chip(desc);
diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
index db04fc1f56b2..12985daa66ab 100644
--- a/drivers/irqchip/irq-gic-v2m.c
+++ b/drivers/irqchip/irq-gic-v2m.c
@@ -95,8 +95,8 @@ static void gicv2m_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
95 struct v2m_data *v2m = irq_data_get_irq_chip_data(data); 95 struct v2m_data *v2m = irq_data_get_irq_chip_data(data);
96 phys_addr_t addr = v2m->res.start + V2M_MSI_SETSPI_NS; 96 phys_addr_t addr = v2m->res.start + V2M_MSI_SETSPI_NS;
97 97
98 msg->address_hi = (u32) (addr >> 32); 98 msg->address_hi = upper_32_bits(addr);
99 msg->address_lo = (u32) (addr); 99 msg->address_lo = lower_32_bits(addr);
100 msg->data = data->hwirq; 100 msg->data = data->hwirq;
101} 101}
102 102
diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c b/drivers/irqchip/irq-gic-v3-its-pci-msi.c
index cf351c637464..a7c8c9ffbafd 100644
--- a/drivers/irqchip/irq-gic-v3-its-pci-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-pci-msi.c
@@ -62,7 +62,7 @@ static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data)
62 62
63 dev_alias->dev_id = alias; 63 dev_alias->dev_id = alias;
64 if (pdev != dev_alias->pdev) 64 if (pdev != dev_alias->pdev)
65 dev_alias->count += its_pci_msi_vec_count(dev_alias->pdev); 65 dev_alias->count += its_pci_msi_vec_count(pdev);
66 66
67 return 0; 67 return 0;
68} 68}
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 26b55c53755f..25ceae9f7348 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -719,6 +719,9 @@ static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids)
719out: 719out:
720 spin_unlock(&lpi_lock); 720 spin_unlock(&lpi_lock);
721 721
722 if (!bitmap)
723 *base = *nr_ids = 0;
724
722 return bitmap; 725 return bitmap;
723} 726}
724 727
@@ -898,8 +901,10 @@ retry_baser:
898 * non-cacheable as well. 901 * non-cacheable as well.
899 */ 902 */
900 shr = tmp & GITS_BASER_SHAREABILITY_MASK; 903 shr = tmp & GITS_BASER_SHAREABILITY_MASK;
901 if (!shr) 904 if (!shr) {
902 cache = GITS_BASER_nC; 905 cache = GITS_BASER_nC;
906 __flush_dcache_area(base, alloc_size);
907 }
903 goto retry_baser; 908 goto retry_baser;
904 } 909 }
905 910
@@ -1140,6 +1145,8 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
1140 return NULL; 1145 return NULL;
1141 } 1146 }
1142 1147
1148 __flush_dcache_area(itt, sz);
1149
1143 dev->its = its; 1150 dev->its = its;
1144 dev->itt = itt; 1151 dev->itt = itt;
1145 dev->nr_ites = nr_ites; 1152 dev->nr_ites = nr_ites;
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 7deed6ef54c2..36ecfc870e5a 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -70,11 +70,6 @@ static inline int gic_irq_in_rdist(struct irq_data *d)
70 return gic_irq(d) < 32; 70 return gic_irq(d) < 32;
71} 71}
72 72
73static inline bool forwarded_irq(struct irq_data *d)
74{
75 return d->handler_data != NULL;
76}
77
78static inline void __iomem *gic_dist_base(struct irq_data *d) 73static inline void __iomem *gic_dist_base(struct irq_data *d)
79{ 74{
80 if (gic_irq_in_rdist(d)) /* SGI+PPI -> SGI_base for this CPU */ 75 if (gic_irq_in_rdist(d)) /* SGI+PPI -> SGI_base for this CPU */
@@ -249,7 +244,7 @@ static void gic_eoimode1_mask_irq(struct irq_data *d)
249 * disabled/masked will not get "stuck", because there is 244 * disabled/masked will not get "stuck", because there is
250 * noone to deactivate it (guest is being terminated). 245 * noone to deactivate it (guest is being terminated).
251 */ 246 */
252 if (forwarded_irq(d)) 247 if (irqd_is_forwarded_to_vcpu(d))
253 gic_poke_irq(d, GICD_ICACTIVER); 248 gic_poke_irq(d, GICD_ICACTIVER);
254} 249}
255 250
@@ -324,7 +319,7 @@ static void gic_eoimode1_eoi_irq(struct irq_data *d)
324 * No need to deactivate an LPI, or an interrupt that 319 * No need to deactivate an LPI, or an interrupt that
325 * is is getting forwarded to a vcpu. 320 * is is getting forwarded to a vcpu.
326 */ 321 */
327 if (gic_irq(d) >= 8192 || forwarded_irq(d)) 322 if (gic_irq(d) >= 8192 || irqd_is_forwarded_to_vcpu(d))
328 return; 323 return;
329 gic_write_dir(gic_irq(d)); 324 gic_write_dir(gic_irq(d));
330} 325}
@@ -357,7 +352,10 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
357 352
358static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu) 353static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu)
359{ 354{
360 d->handler_data = vcpu; 355 if (vcpu)
356 irqd_set_forwarded_to_vcpu(d);
357 else
358 irqd_clr_forwarded_to_vcpu(d);
361 return 0; 359 return 0;
362} 360}
363 361
@@ -754,13 +752,13 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
754 irq_set_percpu_devid(irq); 752 irq_set_percpu_devid(irq);
755 irq_domain_set_info(d, irq, hw, chip, d->host_data, 753 irq_domain_set_info(d, irq, hw, chip, d->host_data,
756 handle_percpu_devid_irq, NULL, NULL); 754 handle_percpu_devid_irq, NULL, NULL);
757 set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN); 755 irq_set_status_flags(irq, IRQ_NOAUTOEN);
758 } 756 }
759 /* SPIs */ 757 /* SPIs */
760 if (hw >= 32 && hw < gic_data.irq_nr) { 758 if (hw >= 32 && hw < gic_data.irq_nr) {
761 irq_domain_set_info(d, irq, hw, chip, d->host_data, 759 irq_domain_set_info(d, irq, hw, chip, d->host_data,
762 handle_fasteoi_irq, NULL, NULL); 760 handle_fasteoi_irq, NULL, NULL);
763 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 761 irq_set_probe(irq);
764 } 762 }
765 /* LPIs */ 763 /* LPIs */
766 if (hw >= 8192 && hw < GIC_ID_NR) { 764 if (hw >= 8192 && hw < GIC_ID_NR) {
@@ -768,7 +766,6 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
768 return -EPERM; 766 return -EPERM;
769 irq_domain_set_info(d, irq, hw, chip, d->host_data, 767 irq_domain_set_info(d, irq, hw, chip, d->host_data,
770 handle_fasteoi_irq, NULL, NULL); 768 handle_fasteoi_irq, NULL, NULL);
771 set_irq_flags(irq, IRQF_VALID);
772 } 769 }
773 770
774 return 0; 771 return 0;
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index e6b7ed537952..982c09c2d791 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -145,29 +145,10 @@ static inline bool cascading_gic_irq(struct irq_data *d)
145 void *data = irq_data_get_irq_handler_data(d); 145 void *data = irq_data_get_irq_handler_data(d);
146 146
147 /* 147 /*
148 * If handler_data pointing to one of the secondary GICs, then 148 * If handler_data is set, this is a cascading interrupt, and
149 * this is a cascading interrupt, and it cannot possibly be 149 * it cannot possibly be forwarded.
150 * forwarded.
151 */ 150 */
152 if (data >= (void *)(gic_data + 1) && 151 return data != NULL;
153 data < (void *)(gic_data + MAX_GIC_NR))
154 return true;
155
156 return false;
157}
158
159static inline bool forwarded_irq(struct irq_data *d)
160{
161 /*
162 * A forwarded interrupt:
163 * - is on the primary GIC
164 * - has its handler_data set to a value
165 * - that isn't a secondary GIC
166 */
167 if (d->handler_data && !cascading_gic_irq(d))
168 return true;
169
170 return false;
171} 152}
172 153
173/* 154/*
@@ -201,7 +182,7 @@ static void gic_eoimode1_mask_irq(struct irq_data *d)
201 * disabled/masked will not get "stuck", because there is 182 * disabled/masked will not get "stuck", because there is
202 * noone to deactivate it (guest is being terminated). 183 * noone to deactivate it (guest is being terminated).
203 */ 184 */
204 if (forwarded_irq(d)) 185 if (irqd_is_forwarded_to_vcpu(d))
205 gic_poke_irq(d, GIC_DIST_ACTIVE_CLEAR); 186 gic_poke_irq(d, GIC_DIST_ACTIVE_CLEAR);
206} 187}
207 188
@@ -218,7 +199,7 @@ static void gic_eoi_irq(struct irq_data *d)
218static void gic_eoimode1_eoi_irq(struct irq_data *d) 199static void gic_eoimode1_eoi_irq(struct irq_data *d)
219{ 200{
220 /* Do not deactivate an IRQ forwarded to a vcpu. */ 201 /* Do not deactivate an IRQ forwarded to a vcpu. */
221 if (forwarded_irq(d)) 202 if (irqd_is_forwarded_to_vcpu(d))
222 return; 203 return;
223 204
224 writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_DEACTIVATE); 205 writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_DEACTIVATE);
@@ -296,7 +277,10 @@ static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu)
296 if (cascading_gic_irq(d)) 277 if (cascading_gic_irq(d))
297 return -EINVAL; 278 return -EINVAL;
298 279
299 d->handler_data = vcpu; 280 if (vcpu)
281 irqd_set_forwarded_to_vcpu(d);
282 else
283 irqd_clr_forwarded_to_vcpu(d);
300 return 0; 284 return 0;
301} 285}
302 286
@@ -357,7 +341,7 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
357 } while (1); 341 } while (1);
358} 342}
359 343
360static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 344static void gic_handle_cascade_irq(struct irq_desc *desc)
361{ 345{
362 struct gic_chip_data *chip_data = irq_desc_get_handler_data(desc); 346 struct gic_chip_data *chip_data = irq_desc_get_handler_data(desc);
363 struct irq_chip *chip = irq_desc_get_chip(desc); 347 struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -376,7 +360,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
376 360
377 cascade_irq = irq_find_mapping(chip_data->domain, gic_irq); 361 cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);
378 if (unlikely(gic_irq < 32 || gic_irq > 1020)) 362 if (unlikely(gic_irq < 32 || gic_irq > 1020))
379 handle_bad_irq(cascade_irq, desc); 363 handle_bad_irq(desc);
380 else 364 else
381 generic_handle_irq(cascade_irq); 365 generic_handle_irq(cascade_irq);
382 366
@@ -906,11 +890,11 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
906 irq_set_percpu_devid(irq); 890 irq_set_percpu_devid(irq);
907 irq_domain_set_info(d, irq, hw, chip, d->host_data, 891 irq_domain_set_info(d, irq, hw, chip, d->host_data,
908 handle_percpu_devid_irq, NULL, NULL); 892 handle_percpu_devid_irq, NULL, NULL);
909 set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN); 893 irq_set_status_flags(irq, IRQ_NOAUTOEN);
910 } else { 894 } else {
911 irq_domain_set_info(d, irq, hw, chip, d->host_data, 895 irq_domain_set_info(d, irq, hw, chip, d->host_data,
912 handle_fasteoi_irq, NULL, NULL); 896 handle_fasteoi_irq, NULL, NULL);
913 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 897 irq_set_probe(irq);
914 } 898 }
915 return 0; 899 return 0;
916} 900}
@@ -1119,12 +1103,49 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
1119#ifdef CONFIG_OF 1103#ifdef CONFIG_OF
1120static int gic_cnt __initdata; 1104static int gic_cnt __initdata;
1121 1105
1106static bool gic_check_eoimode(struct device_node *node, void __iomem **base)
1107{
1108 struct resource cpuif_res;
1109
1110 of_address_to_resource(node, 1, &cpuif_res);
1111
1112 if (!is_hyp_mode_available())
1113 return false;
1114 if (resource_size(&cpuif_res) < SZ_8K)
1115 return false;
1116 if (resource_size(&cpuif_res) == SZ_128K) {
1117 u32 val_low, val_high;
1118
1119 /*
1120 * Verify that we have the first 4kB of a GIC400
1121 * aliased over the first 64kB by checking the
1122 * GICC_IIDR register on both ends.
1123 */
1124 val_low = readl_relaxed(*base + GIC_CPU_IDENT);
1125 val_high = readl_relaxed(*base + GIC_CPU_IDENT + 0xf000);
1126 if ((val_low & 0xffff0fff) != 0x0202043B ||
1127 val_low != val_high)
1128 return false;
1129
1130 /*
1131 * Move the base up by 60kB, so that we have a 8kB
1132 * contiguous region, which allows us to use GICC_DIR
1133 * at its normal offset. Please pass me that bucket.
1134 */
1135 *base += 0xf000;
1136 cpuif_res.start += 0xf000;
1137 pr_warn("GIC: Adjusting CPU interface base to %pa",
1138 &cpuif_res.start);
1139 }
1140
1141 return true;
1142}
1143
1122static int __init 1144static int __init
1123gic_of_init(struct device_node *node, struct device_node *parent) 1145gic_of_init(struct device_node *node, struct device_node *parent)
1124{ 1146{
1125 void __iomem *cpu_base; 1147 void __iomem *cpu_base;
1126 void __iomem *dist_base; 1148 void __iomem *dist_base;
1127 struct resource cpu_res;
1128 u32 percpu_offset; 1149 u32 percpu_offset;
1129 int irq; 1150 int irq;
1130 1151
@@ -1137,14 +1158,11 @@ gic_of_init(struct device_node *node, struct device_node *parent)
1137 cpu_base = of_iomap(node, 1); 1158 cpu_base = of_iomap(node, 1);
1138 WARN(!cpu_base, "unable to map gic cpu registers\n"); 1159 WARN(!cpu_base, "unable to map gic cpu registers\n");
1139 1160
1140 of_address_to_resource(node, 1, &cpu_res);
1141
1142 /* 1161 /*
1143 * Disable split EOI/Deactivate if either HYP is not available 1162 * Disable split EOI/Deactivate if either HYP is not available
1144 * or the CPU interface is too small. 1163 * or the CPU interface is too small.
1145 */ 1164 */
1146 if (gic_cnt == 0 && (!is_hyp_mode_available() || 1165 if (gic_cnt == 0 && !gic_check_eoimode(node, &cpu_base))
1147 resource_size(&cpu_res) < SZ_8K))
1148 static_key_slow_dec(&supports_deactivate); 1166 static_key_slow_dec(&supports_deactivate);
1149 1167
1150 if (of_property_read_u32(node, "cpu-offset", &percpu_offset)) 1168 if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
diff --git a/drivers/irqchip/irq-hip04.c b/drivers/irqchip/irq-hip04.c
index a0128c7c98dd..8f3ca8f3a62b 100644
--- a/drivers/irqchip/irq-hip04.c
+++ b/drivers/irqchip/irq-hip04.c
@@ -307,11 +307,11 @@ static int hip04_irq_domain_map(struct irq_domain *d, unsigned int irq,
307 irq_set_percpu_devid(irq); 307 irq_set_percpu_devid(irq);
308 irq_set_chip_and_handler(irq, &hip04_irq_chip, 308 irq_set_chip_and_handler(irq, &hip04_irq_chip,
309 handle_percpu_devid_irq); 309 handle_percpu_devid_irq);
310 set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN); 310 irq_set_status_flags(irq, IRQ_NOAUTOEN);
311 } else { 311 } else {
312 irq_set_chip_and_handler(irq, &hip04_irq_chip, 312 irq_set_chip_and_handler(irq, &hip04_irq_chip,
313 handle_fasteoi_irq); 313 handle_fasteoi_irq);
314 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 314 irq_set_probe(irq);
315 } 315 }
316 irq_set_chip_data(irq, d->host_data); 316 irq_set_chip_data(irq, d->host_data);
317 return 0; 317 return 0;
diff --git a/drivers/irqchip/irq-i8259.c b/drivers/irqchip/irq-i8259.c
index 4836102ba312..e484fd255321 100644
--- a/drivers/irqchip/irq-i8259.c
+++ b/drivers/irqchip/irq-i8259.c
@@ -352,7 +352,7 @@ void __init init_i8259_irqs(void)
352 __init_i8259_irqs(NULL); 352 __init_i8259_irqs(NULL);
353} 353}
354 354
355static void i8259_irq_dispatch(unsigned int __irq, struct irq_desc *desc) 355static void i8259_irq_dispatch(struct irq_desc *desc)
356{ 356{
357 struct irq_domain *domain = irq_desc_get_handler_data(desc); 357 struct irq_domain *domain = irq_desc_get_handler_data(desc);
358 int hwirq = i8259_irq(); 358 int hwirq = i8259_irq();
diff --git a/drivers/irqchip/irq-imgpdc.c b/drivers/irqchip/irq-imgpdc.c
index 841604b81004..c02d29c9dc05 100644
--- a/drivers/irqchip/irq-imgpdc.c
+++ b/drivers/irqchip/irq-imgpdc.c
@@ -218,7 +218,7 @@ static int pdc_irq_set_wake(struct irq_data *data, unsigned int on)
218 return 0; 218 return 0;
219} 219}
220 220
221static void pdc_intc_perip_isr(unsigned int __irq, struct irq_desc *desc) 221static void pdc_intc_perip_isr(struct irq_desc *desc)
222{ 222{
223 unsigned int irq = irq_desc_get_irq(desc); 223 unsigned int irq = irq_desc_get_irq(desc);
224 struct pdc_intc_priv *priv; 224 struct pdc_intc_priv *priv;
@@ -240,7 +240,7 @@ found:
240 generic_handle_irq(irq_no); 240 generic_handle_irq(irq_no);
241} 241}
242 242
243static void pdc_intc_syswake_isr(unsigned int irq, struct irq_desc *desc) 243static void pdc_intc_syswake_isr(struct irq_desc *desc)
244{ 244{
245 struct pdc_intc_priv *priv; 245 struct pdc_intc_priv *priv;
246 unsigned int syswake, irq_no; 246 unsigned int syswake, irq_no;
diff --git a/drivers/irqchip/irq-keystone.c b/drivers/irqchip/irq-keystone.c
index c1517267b5db..deb89d63a728 100644
--- a/drivers/irqchip/irq-keystone.c
+++ b/drivers/irqchip/irq-keystone.c
@@ -83,7 +83,7 @@ static void keystone_irq_ack(struct irq_data *d)
83 /* nothing to do here */ 83 /* nothing to do here */
84} 84}
85 85
86static void keystone_irq_handler(unsigned __irq, struct irq_desc *desc) 86static void keystone_irq_handler(struct irq_desc *desc)
87{ 87{
88 unsigned int irq = irq_desc_get_irq(desc); 88 unsigned int irq = irq_desc_get_irq(desc);
89 struct keystone_irq_device *kirq = irq_desc_get_handler_data(desc); 89 struct keystone_irq_device *kirq = irq_desc_get_handler_data(desc);
@@ -127,7 +127,7 @@ static int keystone_irq_map(struct irq_domain *h, unsigned int virq,
127 127
128 irq_set_chip_data(virq, kirq); 128 irq_set_chip_data(virq, kirq);
129 irq_set_chip_and_handler(virq, &kirq->chip, handle_level_irq); 129 irq_set_chip_and_handler(virq, &kirq->chip, handle_level_irq);
130 set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); 130 irq_set_probe(virq);
131 return 0; 131 return 0;
132} 132}
133 133
diff --git a/drivers/irqchip/irq-metag-ext.c b/drivers/irqchip/irq-metag-ext.c
index 5f4c52928d16..8c38b3d92e1c 100644
--- a/drivers/irqchip/irq-metag-ext.c
+++ b/drivers/irqchip/irq-metag-ext.c
@@ -446,7 +446,7 @@ static int meta_intc_irq_set_type(struct irq_data *data, unsigned int flow_type)
446 * Whilst using TR2 to detect external interrupts is a software convention it is 446 * Whilst using TR2 to detect external interrupts is a software convention it is
447 * (hopefully) unlikely to change. 447 * (hopefully) unlikely to change.
448 */ 448 */
449static void meta_intc_irq_demux(unsigned int irq, struct irq_desc *desc) 449static void meta_intc_irq_demux(struct irq_desc *desc)
450{ 450{
451 struct meta_intc_priv *priv = &meta_intc_priv; 451 struct meta_intc_priv *priv = &meta_intc_priv;
452 irq_hw_number_t hw; 452 irq_hw_number_t hw;
diff --git a/drivers/irqchip/irq-metag.c b/drivers/irqchip/irq-metag.c
index 3d23ce3edb5c..a5f053bd2f44 100644
--- a/drivers/irqchip/irq-metag.c
+++ b/drivers/irqchip/irq-metag.c
@@ -220,7 +220,7 @@ static int metag_internal_irq_set_affinity(struct irq_data *data,
220 * occurred. It is this function's job to demux this irq and 220 * occurred. It is this function's job to demux this irq and
221 * figure out exactly which trigger needs servicing. 221 * figure out exactly which trigger needs servicing.
222 */ 222 */
223static void metag_internal_irq_demux(unsigned int irq, struct irq_desc *desc) 223static void metag_internal_irq_demux(struct irq_desc *desc)
224{ 224{
225 struct metag_internal_irq_priv *priv = irq_desc_get_handler_data(desc); 225 struct metag_internal_irq_priv *priv = irq_desc_get_handler_data(desc);
226 irq_hw_number_t hw; 226 irq_hw_number_t hw;
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 1764bcf8ee6b..aeaa061f0dbf 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -320,6 +320,14 @@ static void gic_handle_shared_int(bool chained)
320 intrmask[i] = gic_read(intrmask_reg); 320 intrmask[i] = gic_read(intrmask_reg);
321 pending_reg += gic_reg_step; 321 pending_reg += gic_reg_step;
322 intrmask_reg += gic_reg_step; 322 intrmask_reg += gic_reg_step;
323
324 if (!config_enabled(CONFIG_64BIT) || mips_cm_is64)
325 continue;
326
327 pending[i] |= (u64)gic_read(pending_reg) << 32;
328 intrmask[i] |= (u64)gic_read(intrmask_reg) << 32;
329 pending_reg += gic_reg_step;
330 intrmask_reg += gic_reg_step;
323 } 331 }
324 332
325 bitmap_and(pending, pending, intrmask, gic_shared_intrs); 333 bitmap_and(pending, pending, intrmask, gic_shared_intrs);
@@ -426,7 +434,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
426 spin_lock_irqsave(&gic_lock, flags); 434 spin_lock_irqsave(&gic_lock, flags);
427 435
428 /* Re-route this IRQ */ 436 /* Re-route this IRQ */
429 gic_map_to_vpe(irq, cpumask_first(&tmp)); 437 gic_map_to_vpe(irq, mips_cm_vp_id(cpumask_first(&tmp)));
430 438
431 /* Update the pcpu_masks */ 439 /* Update the pcpu_masks */
432 for (i = 0; i < NR_CPUS; i++) 440 for (i = 0; i < NR_CPUS; i++)
@@ -546,7 +554,7 @@ static void __gic_irq_dispatch(void)
546 gic_handle_shared_int(false); 554 gic_handle_shared_int(false);
547} 555}
548 556
549static void gic_irq_dispatch(unsigned int irq, struct irq_desc *desc) 557static void gic_irq_dispatch(struct irq_desc *desc)
550{ 558{
551 gic_handle_local_int(true); 559 gic_handle_local_int(true);
552 gic_handle_shared_int(true); 560 gic_handle_shared_int(true);
@@ -599,7 +607,7 @@ static __init void gic_ipi_init_one(unsigned int intr, int cpu,
599 GIC_SHARED_TO_HWIRQ(intr)); 607 GIC_SHARED_TO_HWIRQ(intr));
600 int i; 608 int i;
601 609
602 gic_map_to_vpe(intr, cpu); 610 gic_map_to_vpe(intr, mips_cm_vp_id(cpu));
603 for (i = 0; i < NR_CPUS; i++) 611 for (i = 0; i < NR_CPUS; i++)
604 clear_bit(intr, pcpu_masks[i].pcpu_mask); 612 clear_bit(intr, pcpu_masks[i].pcpu_mask);
605 set_bit(intr, pcpu_masks[cpu].pcpu_mask); 613 set_bit(intr, pcpu_masks[cpu].pcpu_mask);
diff --git a/drivers/irqchip/irq-mmp.c b/drivers/irqchip/irq-mmp.c
index 781ed6e71dbb..013fc9659a84 100644
--- a/drivers/irqchip/irq-mmp.c
+++ b/drivers/irqchip/irq-mmp.c
@@ -129,7 +129,7 @@ struct irq_chip icu_irq_chip = {
129 .irq_unmask = icu_unmask_irq, 129 .irq_unmask = icu_unmask_irq,
130}; 130};
131 131
132static void icu_mux_irq_demux(unsigned int __irq, struct irq_desc *desc) 132static void icu_mux_irq_demux(struct irq_desc *desc)
133{ 133{
134 unsigned int irq = irq_desc_get_irq(desc); 134 unsigned int irq = irq_desc_get_irq(desc);
135 struct irq_domain *domain; 135 struct irq_domain *domain;
@@ -164,7 +164,6 @@ static int mmp_irq_domain_map(struct irq_domain *d, unsigned int irq,
164 irq_hw_number_t hw) 164 irq_hw_number_t hw)
165{ 165{
166 irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq); 166 irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq);
167 set_irq_flags(irq, IRQF_VALID);
168 return 0; 167 return 0;
169} 168}
170 169
@@ -234,7 +233,6 @@ void __init icu_init_irq(void)
234 for (irq = 0; irq < 64; irq++) { 233 for (irq = 0; irq < 64; irq++) {
235 icu_mask_irq(irq_get_irq_data(irq)); 234 icu_mask_irq(irq_get_irq_data(irq));
236 irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq); 235 irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq);
237 set_irq_flags(irq, IRQF_VALID);
238 } 236 }
239 irq_set_default_host(icu_data[0].domain); 237 irq_set_default_host(icu_data[0].domain);
240 set_handle_irq(mmp_handle_irq); 238 set_handle_irq(mmp_handle_irq);
@@ -337,7 +335,6 @@ void __init mmp2_init_icu(void)
337 irq_set_chip_and_handler(irq, &icu_irq_chip, 335 irq_set_chip_and_handler(irq, &icu_irq_chip,
338 handle_level_irq); 336 handle_level_irq);
339 } 337 }
340 set_irq_flags(irq, IRQF_VALID);
341 } 338 }
342 irq_set_default_host(icu_data[0].domain); 339 irq_set_default_host(icu_data[0].domain);
343 set_handle_irq(mmp2_handle_irq); 340 set_handle_irq(mmp2_handle_irq);
diff --git a/drivers/irqchip/irq-mxs.c b/drivers/irqchip/irq-mxs.c
index 1faf812f3dc8..604df63e2edf 100644
--- a/drivers/irqchip/irq-mxs.c
+++ b/drivers/irqchip/irq-mxs.c
@@ -84,7 +84,6 @@ static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq,
84 irq_hw_number_t hw) 84 irq_hw_number_t hw)
85{ 85{
86 irq_set_chip_and_handler(virq, &mxs_icoll_chip, handle_level_irq); 86 irq_set_chip_and_handler(virq, &mxs_icoll_chip, handle_level_irq);
87 set_irq_flags(virq, IRQF_VALID);
88 87
89 return 0; 88 return 0;
90} 89}
diff --git a/drivers/irqchip/irq-orion.c b/drivers/irqchip/irq-orion.c
index 5ea999a724b5..be4c5a8c9659 100644
--- a/drivers/irqchip/irq-orion.c
+++ b/drivers/irqchip/irq-orion.c
@@ -106,7 +106,7 @@ IRQCHIP_DECLARE(orion_intc, "marvell,orion-intc", orion_irq_init);
106#define ORION_BRIDGE_IRQ_CAUSE 0x00 106#define ORION_BRIDGE_IRQ_CAUSE 0x00
107#define ORION_BRIDGE_IRQ_MASK 0x04 107#define ORION_BRIDGE_IRQ_MASK 0x04
108 108
109static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc) 109static void orion_bridge_irq_handler(struct irq_desc *desc)
110{ 110{
111 struct irq_domain *d = irq_desc_get_handler_data(desc); 111 struct irq_domain *d = irq_desc_get_handler_data(desc);
112 112
diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
index 0670ab4e3897..9525335723f6 100644
--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
@@ -283,6 +283,9 @@ static int intc_irqpin_irq_set_type(struct irq_data *d, unsigned int type)
283static int intc_irqpin_irq_set_wake(struct irq_data *d, unsigned int on) 283static int intc_irqpin_irq_set_wake(struct irq_data *d, unsigned int on)
284{ 284{
285 struct intc_irqpin_priv *p = irq_data_get_irq_chip_data(d); 285 struct intc_irqpin_priv *p = irq_data_get_irq_chip_data(d);
286 int hw_irq = irqd_to_hwirq(d);
287
288 irq_set_irq_wake(p->irq[hw_irq].requested_irq, on);
286 289
287 if (!p->clk) 290 if (!p->clk)
288 return 0; 291 return 0;
@@ -332,6 +335,12 @@ static irqreturn_t intc_irqpin_shared_irq_handler(int irq, void *dev_id)
332 return status; 335 return status;
333} 336}
334 337
338/*
339 * This lock class tells lockdep that INTC External IRQ Pin irqs are in a
340 * different category than their parents, so it won't report false recursion.
341 */
342static struct lock_class_key intc_irqpin_irq_lock_class;
343
335static int intc_irqpin_irq_domain_map(struct irq_domain *h, unsigned int virq, 344static int intc_irqpin_irq_domain_map(struct irq_domain *h, unsigned int virq,
336 irq_hw_number_t hw) 345 irq_hw_number_t hw)
337{ 346{
@@ -342,8 +351,8 @@ static int intc_irqpin_irq_domain_map(struct irq_domain *h, unsigned int virq,
342 351
343 intc_irqpin_dbg(&p->irq[hw], "map"); 352 intc_irqpin_dbg(&p->irq[hw], "map");
344 irq_set_chip_data(virq, h->host_data); 353 irq_set_chip_data(virq, h->host_data);
354 irq_set_lockdep_class(virq, &intc_irqpin_irq_lock_class);
345 irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq); 355 irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq);
346 set_irq_flags(virq, IRQF_VALID); /* kill me now */
347 return 0; 356 return 0;
348} 357}
349 358
diff --git a/drivers/irqchip/irq-renesas-irqc.c b/drivers/irqchip/irq-renesas-irqc.c
index 2aa3add711a6..35bf97ba4a3d 100644
--- a/drivers/irqchip/irq-renesas-irqc.c
+++ b/drivers/irqchip/irq-renesas-irqc.c
@@ -121,6 +121,9 @@ static int irqc_irq_set_type(struct irq_data *d, unsigned int type)
121static int irqc_irq_set_wake(struct irq_data *d, unsigned int on) 121static int irqc_irq_set_wake(struct irq_data *d, unsigned int on)
122{ 122{
123 struct irqc_priv *p = irq_data_get_irq_chip_data(d); 123 struct irqc_priv *p = irq_data_get_irq_chip_data(d);
124 int hw_irq = irqd_to_hwirq(d);
125
126 irq_set_irq_wake(p->irq[hw_irq].requested_irq, on);
124 127
125 if (!p->clk) 128 if (!p->clk)
126 return 0; 129 return 0;
@@ -150,6 +153,12 @@ static irqreturn_t irqc_irq_handler(int irq, void *dev_id)
150 return IRQ_NONE; 153 return IRQ_NONE;
151} 154}
152 155
156/*
157 * This lock class tells lockdep that IRQC irqs are in a different
158 * category than their parents, so it won't report false recursion.
159 */
160static struct lock_class_key irqc_irq_lock_class;
161
153static int irqc_irq_domain_map(struct irq_domain *h, unsigned int virq, 162static int irqc_irq_domain_map(struct irq_domain *h, unsigned int virq,
154 irq_hw_number_t hw) 163 irq_hw_number_t hw)
155{ 164{
@@ -157,6 +166,7 @@ static int irqc_irq_domain_map(struct irq_domain *h, unsigned int virq,
157 166
158 irqc_dbg(&p->irq[hw], "map"); 167 irqc_dbg(&p->irq[hw], "map");
159 irq_set_chip_data(virq, h->host_data); 168 irq_set_chip_data(virq, h->host_data);
169 irq_set_lockdep_class(virq, &irqc_irq_lock_class);
160 irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq); 170 irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq);
161 return 0; 171 return 0;
162} 172}
diff --git a/drivers/irqchip/irq-s3c24xx.c b/drivers/irqchip/irq-s3c24xx.c
index 506d9f20ca51..7154b011ddd2 100644
--- a/drivers/irqchip/irq-s3c24xx.c
+++ b/drivers/irqchip/irq-s3c24xx.c
@@ -298,7 +298,7 @@ static struct irq_chip s3c_irq_eint0t4 = {
298 .irq_set_type = s3c_irqext0_type, 298 .irq_set_type = s3c_irqext0_type,
299}; 299};
300 300
301static void s3c_irq_demux(unsigned int __irq, struct irq_desc *desc) 301static void s3c_irq_demux(struct irq_desc *desc)
302{ 302{
303 struct irq_chip *chip = irq_desc_get_chip(desc); 303 struct irq_chip *chip = irq_desc_get_chip(desc);
304 struct s3c_irq_data *irq_data = irq_desc_get_chip_data(desc); 304 struct s3c_irq_data *irq_data = irq_desc_get_chip_data(desc);
@@ -466,13 +466,11 @@ static int s3c24xx_irq_map(struct irq_domain *h, unsigned int virq,
466 466
467 irq_set_chip_data(virq, irq_data); 467 irq_set_chip_data(virq, irq_data);
468 468
469 set_irq_flags(virq, IRQF_VALID);
470
471 if (parent_intc && irq_data->type != S3C_IRQTYPE_NONE) { 469 if (parent_intc && irq_data->type != S3C_IRQTYPE_NONE) {
472 if (irq_data->parent_irq > 31) { 470 if (irq_data->parent_irq > 31) {
473 pr_err("irq-s3c24xx: parent irq %lu is out of range\n", 471 pr_err("irq-s3c24xx: parent irq %lu is out of range\n",
474 irq_data->parent_irq); 472 irq_data->parent_irq);
475 goto err; 473 return -EINVAL;
476 } 474 }
477 475
478 parent_irq_data = &parent_intc->irqs[irq_data->parent_irq]; 476 parent_irq_data = &parent_intc->irqs[irq_data->parent_irq];
@@ -485,18 +483,12 @@ static int s3c24xx_irq_map(struct irq_domain *h, unsigned int virq,
485 if (!irqno) { 483 if (!irqno) {
486 pr_err("irq-s3c24xx: could not find mapping for parent irq %lu\n", 484 pr_err("irq-s3c24xx: could not find mapping for parent irq %lu\n",
487 irq_data->parent_irq); 485 irq_data->parent_irq);
488 goto err; 486 return -EINVAL;
489 } 487 }
490 irq_set_chained_handler(irqno, s3c_irq_demux); 488 irq_set_chained_handler(irqno, s3c_irq_demux);
491 } 489 }
492 490
493 return 0; 491 return 0;
494
495err:
496 set_irq_flags(virq, 0);
497
498 /* the only error can result from bad mapping data*/
499 return -EINVAL;
500} 492}
501 493
502static const struct irq_domain_ops s3c24xx_irq_ops = { 494static const struct irq_domain_ops s3c24xx_irq_ops = {
@@ -1174,8 +1166,6 @@ static int s3c24xx_irq_map_of(struct irq_domain *h, unsigned int virq,
1174 1166
1175 irq_set_chip_data(virq, irq_data); 1167 irq_set_chip_data(virq, irq_data);
1176 1168
1177 set_irq_flags(virq, IRQF_VALID);
1178
1179 return 0; 1169 return 0;
1180} 1170}
1181 1171
diff --git a/drivers/irqchip/irq-sun4i.c b/drivers/irqchip/irq-sun4i.c
index 4ad3e7c69aa7..0704362f4c82 100644
--- a/drivers/irqchip/irq-sun4i.c
+++ b/drivers/irqchip/irq-sun4i.c
@@ -83,7 +83,7 @@ static int sun4i_irq_map(struct irq_domain *d, unsigned int virq,
83 irq_hw_number_t hw) 83 irq_hw_number_t hw)
84{ 84{
85 irq_set_chip_and_handler(virq, &sun4i_irq_chip, handle_fasteoi_irq); 85 irq_set_chip_and_handler(virq, &sun4i_irq_chip, handle_fasteoi_irq);
86 set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); 86 irq_set_probe(virq);
87 87
88 return 0; 88 return 0;
89} 89}
diff --git a/drivers/irqchip/irq-sunxi-nmi.c b/drivers/irqchip/irq-sunxi-nmi.c
index 772a82cacbf7..c143dd58410c 100644
--- a/drivers/irqchip/irq-sunxi-nmi.c
+++ b/drivers/irqchip/irq-sunxi-nmi.c
@@ -58,7 +58,7 @@ static inline u32 sunxi_sc_nmi_read(struct irq_chip_generic *gc, u32 off)
58 return irq_reg_readl(gc, off); 58 return irq_reg_readl(gc, off);
59} 59}
60 60
61static void sunxi_sc_nmi_handle_irq(unsigned int irq, struct irq_desc *desc) 61static void sunxi_sc_nmi_handle_irq(struct irq_desc *desc)
62{ 62{
63 struct irq_domain *domain = irq_desc_get_handler_data(desc); 63 struct irq_domain *domain = irq_desc_get_handler_data(desc);
64 struct irq_chip *chip = irq_desc_get_chip(desc); 64 struct irq_chip *chip = irq_desc_get_chip(desc);
diff --git a/drivers/irqchip/irq-tb10x.c b/drivers/irqchip/irq-tb10x.c
index 331829661366..848d782a2a3b 100644
--- a/drivers/irqchip/irq-tb10x.c
+++ b/drivers/irqchip/irq-tb10x.c
@@ -97,7 +97,7 @@ static int tb10x_irq_set_type(struct irq_data *data, unsigned int flow_type)
97 return IRQ_SET_MASK_OK; 97 return IRQ_SET_MASK_OK;
98} 98}
99 99
100static void tb10x_irq_cascade(unsigned int __irq, struct irq_desc *desc) 100static void tb10x_irq_cascade(struct irq_desc *desc)
101{ 101{
102 struct irq_domain *domain = irq_desc_get_handler_data(desc); 102 struct irq_domain *domain = irq_desc_get_handler_data(desc);
103 unsigned int irq = irq_desc_get_irq(desc); 103 unsigned int irq = irq_desc_get_irq(desc);
diff --git a/drivers/irqchip/irq-versatile-fpga.c b/drivers/irqchip/irq-versatile-fpga.c
index 16123f688768..598ab3f0e0ac 100644
--- a/drivers/irqchip/irq-versatile-fpga.c
+++ b/drivers/irqchip/irq-versatile-fpga.c
@@ -65,19 +65,19 @@ static void fpga_irq_unmask(struct irq_data *d)
65 writel(mask, f->base + IRQ_ENABLE_SET); 65 writel(mask, f->base + IRQ_ENABLE_SET);
66} 66}
67 67
68static void fpga_irq_handle(unsigned int __irq, struct irq_desc *desc) 68static void fpga_irq_handle(struct irq_desc *desc)
69{ 69{
70 struct fpga_irq_data *f = irq_desc_get_handler_data(desc); 70 struct fpga_irq_data *f = irq_desc_get_handler_data(desc);
71 unsigned int irq = irq_desc_get_irq(desc);
72 u32 status = readl(f->base + IRQ_STATUS); 71 u32 status = readl(f->base + IRQ_STATUS);
73 72
74 if (status == 0) { 73 if (status == 0) {
75 do_bad_IRQ(irq, desc); 74 do_bad_IRQ(desc);
76 return; 75 return;
77 } 76 }
78 77
79 do { 78 do {
80 irq = ffs(status) - 1; 79 unsigned int irq = ffs(status) - 1;
80
81 status &= ~(1 << irq); 81 status &= ~(1 << irq);
82 generic_handle_irq(irq_find_mapping(f->domain, irq)); 82 generic_handle_irq(irq_find_mapping(f->domain, irq));
83 } while (status); 83 } while (status);
@@ -128,7 +128,7 @@ static int fpga_irqdomain_map(struct irq_domain *d, unsigned int irq,
128 irq_set_chip_data(irq, f); 128 irq_set_chip_data(irq, f);
129 irq_set_chip_and_handler(irq, &f->chip, 129 irq_set_chip_and_handler(irq, &f->chip,
130 handle_level_irq); 130 handle_level_irq);
131 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 131 irq_set_probe(irq);
132 return 0; 132 return 0;
133} 133}
134 134
diff --git a/drivers/irqchip/irq-vic.c b/drivers/irqchip/irq-vic.c
index 03846dff4212..b956dfffe78c 100644
--- a/drivers/irqchip/irq-vic.c
+++ b/drivers/irqchip/irq-vic.c
@@ -201,7 +201,7 @@ static int vic_irqdomain_map(struct irq_domain *d, unsigned int irq,
201 return -EPERM; 201 return -EPERM;
202 irq_set_chip_and_handler(irq, &vic_chip, handle_level_irq); 202 irq_set_chip_and_handler(irq, &vic_chip, handle_level_irq);
203 irq_set_chip_data(irq, v->base); 203 irq_set_chip_data(irq, v->base);
204 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 204 irq_set_probe(irq);
205 return 0; 205 return 0;
206} 206}
207 207
@@ -225,7 +225,7 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
225 return handled; 225 return handled;
226} 226}
227 227
228static void vic_handle_irq_cascaded(unsigned int irq, struct irq_desc *desc) 228static void vic_handle_irq_cascaded(struct irq_desc *desc)
229{ 229{
230 u32 stat, hwirq; 230 u32 stat, hwirq;
231 struct irq_chip *host_chip = irq_desc_get_chip(desc); 231 struct irq_chip *host_chip = irq_desc_get_chip(desc);
diff --git a/drivers/irqchip/irq-vt8500.c b/drivers/irqchip/irq-vt8500.c
index 8371d9978d31..f9af0af21751 100644
--- a/drivers/irqchip/irq-vt8500.c
+++ b/drivers/irqchip/irq-vt8500.c
@@ -167,7 +167,6 @@ static int vt8500_irq_map(struct irq_domain *h, unsigned int virq,
167 irq_hw_number_t hw) 167 irq_hw_number_t hw)
168{ 168{
169 irq_set_chip_and_handler(virq, &vt8500_irq_chip, handle_level_irq); 169 irq_set_chip_and_handler(virq, &vt8500_irq_chip, handle_level_irq);
170 set_irq_flags(virq, IRQF_VALID);
171 170
172 return 0; 171 return 0;
173} 172}
diff --git a/drivers/irqchip/spear-shirq.c b/drivers/irqchip/spear-shirq.c
index 4cbd9c5dc1e6..1ccd2abed65f 100644
--- a/drivers/irqchip/spear-shirq.c
+++ b/drivers/irqchip/spear-shirq.c
@@ -182,7 +182,7 @@ static struct spear_shirq *spear320_shirq_blocks[] = {
182 &spear320_shirq_intrcomm_ras, 182 &spear320_shirq_intrcomm_ras,
183}; 183};
184 184
185static void shirq_handler(unsigned __irq, struct irq_desc *desc) 185static void shirq_handler(struct irq_desc *desc)
186{ 186{
187 struct spear_shirq *shirq = irq_desc_get_handler_data(desc); 187 struct spear_shirq *shirq = irq_desc_get_handler_data(desc);
188 u32 pend; 188 u32 pend;
@@ -211,7 +211,6 @@ static void __init spear_shirq_register(struct spear_shirq *shirq,
211 for (i = 0; i < shirq->nr_irqs; i++) { 211 for (i = 0; i < shirq->nr_irqs; i++) {
212 irq_set_chip_and_handler(shirq->virq_base + i, 212 irq_set_chip_and_handler(shirq->virq_base + i,
213 shirq->irq_chip, handle_simple_irq); 213 shirq->irq_chip, handle_simple_irq);
214 set_irq_flags(shirq->virq_base + i, IRQF_VALID);
215 irq_set_chip_data(shirq->virq_base + i, shirq); 214 irq_set_chip_data(shirq->virq_base + i, shirq);
216 } 215 }
217} 216}
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 70f4255ff291..42990f2d0317 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -170,6 +170,7 @@ config LEDS_SUNFIRE
170 170
171config LEDS_IPAQ_MICRO 171config LEDS_IPAQ_MICRO
172 tristate "LED Support for the Compaq iPAQ h3xxx" 172 tristate "LED Support for the Compaq iPAQ h3xxx"
173 depends on LEDS_CLASS
173 depends on MFD_IPAQ_MICRO 174 depends on MFD_IPAQ_MICRO
174 help 175 help
175 Choose this option if you want to use the notification LED on 176 Choose this option if you want to use the notification LED on
@@ -229,7 +230,7 @@ config LEDS_LP55XX_COMMON
229 tristate "Common Driver for TI/National LP5521/5523/55231/5562/8501" 230 tristate "Common Driver for TI/National LP5521/5523/55231/5562/8501"
230 depends on LEDS_LP5521 || LEDS_LP5523 || LEDS_LP5562 || LEDS_LP8501 231 depends on LEDS_LP5521 || LEDS_LP5523 || LEDS_LP5562 || LEDS_LP8501
231 select FW_LOADER 232 select FW_LOADER
232 select FW_LOADER_USER_HELPER_FALLBACK 233 select FW_LOADER_USER_HELPER
233 help 234 help
234 This option supports common operations for LP5521/5523/55231/5562/8501 235 This option supports common operations for LP5521/5523/55231/5562/8501
235 devices. 236 devices.
diff --git a/drivers/leds/leds-aat1290.c b/drivers/leds/leds-aat1290.c
index fd7c25fd29c1..ac77d36b630c 100644
--- a/drivers/leds/leds-aat1290.c
+++ b/drivers/leds/leds-aat1290.c
@@ -331,7 +331,7 @@ static void aat1290_led_validate_mm_current(struct aat1290_led *led,
331 cfg->max_brightness = b + 1; 331 cfg->max_brightness = b + 1;
332} 332}
333 333
334int init_mm_current_scale(struct aat1290_led *led, 334static int init_mm_current_scale(struct aat1290_led *led,
335 struct aat1290_led_config_data *cfg) 335 struct aat1290_led_config_data *cfg)
336{ 336{
337 int max_mm_current_percent[] = { 20, 22, 25, 28, 32, 36, 40, 45, 50, 56, 337 int max_mm_current_percent[] = { 20, 22, 25, 28, 32, 36, 40, 45, 50, 56,
@@ -559,6 +559,7 @@ static const struct of_device_id aat1290_led_dt_match[] = {
559 { .compatible = "skyworks,aat1290" }, 559 { .compatible = "skyworks,aat1290" },
560 {}, 560 {},
561}; 561};
562MODULE_DEVICE_TABLE(of, aat1290_led_dt_match);
562 563
563static struct platform_driver aat1290_led_driver = { 564static struct platform_driver aat1290_led_driver = {
564 .probe = aat1290_led_probe, 565 .probe = aat1290_led_probe,
diff --git a/drivers/leds/leds-bcm6328.c b/drivers/leds/leds-bcm6328.c
index 986fe1e28f84..1793727bc9ae 100644
--- a/drivers/leds/leds-bcm6328.c
+++ b/drivers/leds/leds-bcm6328.c
@@ -395,6 +395,7 @@ static const struct of_device_id bcm6328_leds_of_match[] = {
395 { .compatible = "brcm,bcm6328-leds", }, 395 { .compatible = "brcm,bcm6328-leds", },
396 { }, 396 { },
397}; 397};
398MODULE_DEVICE_TABLE(of, bcm6328_leds_of_match);
398 399
399static struct platform_driver bcm6328_leds_driver = { 400static struct platform_driver bcm6328_leds_driver = {
400 .probe = bcm6328_leds_probe, 401 .probe = bcm6328_leds_probe,
diff --git a/drivers/leds/leds-bcm6358.c b/drivers/leds/leds-bcm6358.c
index 21f96930b3be..7ea3526702e0 100644
--- a/drivers/leds/leds-bcm6358.c
+++ b/drivers/leds/leds-bcm6358.c
@@ -226,6 +226,7 @@ static const struct of_device_id bcm6358_leds_of_match[] = {
226 { .compatible = "brcm,bcm6358-leds", }, 226 { .compatible = "brcm,bcm6358-leds", },
227 { }, 227 { },
228}; 228};
229MODULE_DEVICE_TABLE(of, bcm6358_leds_of_match);
229 230
230static struct platform_driver bcm6358_leds_driver = { 231static struct platform_driver bcm6358_leds_driver = {
231 .probe = bcm6358_leds_probe, 232 .probe = bcm6358_leds_probe,
diff --git a/drivers/leds/leds-ktd2692.c b/drivers/leds/leds-ktd2692.c
index 2ae8c4d17ff8..feca07be85f5 100644
--- a/drivers/leds/leds-ktd2692.c
+++ b/drivers/leds/leds-ktd2692.c
@@ -426,6 +426,7 @@ static const struct of_device_id ktd2692_match[] = {
426 { .compatible = "kinetic,ktd2692", }, 426 { .compatible = "kinetic,ktd2692", },
427 { /* sentinel */ }, 427 { /* sentinel */ },
428}; 428};
429MODULE_DEVICE_TABLE(of, ktd2692_match);
429 430
430static struct platform_driver ktd2692_driver = { 431static struct platform_driver ktd2692_driver = {
431 .driver = { 432 .driver = {
diff --git a/drivers/leds/leds-max77693.c b/drivers/leds/leds-max77693.c
index df348a06d8c7..afbb1409b2e2 100644
--- a/drivers/leds/leds-max77693.c
+++ b/drivers/leds/leds-max77693.c
@@ -1080,6 +1080,7 @@ static const struct of_device_id max77693_led_dt_match[] = {
1080 { .compatible = "maxim,max77693-led" }, 1080 { .compatible = "maxim,max77693-led" },
1081 {}, 1081 {},
1082}; 1082};
1083MODULE_DEVICE_TABLE(of, max77693_led_dt_match);
1083 1084
1084static struct platform_driver max77693_led_driver = { 1085static struct platform_driver max77693_led_driver = {
1085 .probe = max77693_led_probe, 1086 .probe = max77693_led_probe,
diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c
index b33514d9f427..a95a61220169 100644
--- a/drivers/leds/leds-ns2.c
+++ b/drivers/leds/leds-ns2.c
@@ -337,6 +337,7 @@ static const struct of_device_id of_ns2_leds_match[] = {
337 { .compatible = "lacie,ns2-leds", }, 337 { .compatible = "lacie,ns2-leds", },
338 {}, 338 {},
339}; 339};
340MODULE_DEVICE_TABLE(of, of_ns2_leds_match);
340#endif /* CONFIG_OF_GPIO */ 341#endif /* CONFIG_OF_GPIO */
341 342
342struct ns2_led_priv { 343struct ns2_led_priv {
diff --git a/drivers/md/bitmap.c b/drivers/md/bitmap.c
index e51de52eeb94..48b5890c28e3 100644
--- a/drivers/md/bitmap.c
+++ b/drivers/md/bitmap.c
@@ -1997,7 +1997,8 @@ int bitmap_resize(struct bitmap *bitmap, sector_t blocks,
1997 if (bitmap->mddev->bitmap_info.offset || bitmap->mddev->bitmap_info.file) 1997 if (bitmap->mddev->bitmap_info.offset || bitmap->mddev->bitmap_info.file)
1998 ret = bitmap_storage_alloc(&store, chunks, 1998 ret = bitmap_storage_alloc(&store, chunks,
1999 !bitmap->mddev->bitmap_info.external, 1999 !bitmap->mddev->bitmap_info.external,
2000 bitmap->cluster_slot); 2000 mddev_is_clustered(bitmap->mddev)
2001 ? bitmap->cluster_slot : 0);
2001 if (ret) 2002 if (ret)
2002 goto err; 2003 goto err;
2003 2004
diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
index d60c88df5234..4b3b6f8aff0c 100644
--- a/drivers/md/dm-crypt.c
+++ b/drivers/md/dm-crypt.c
@@ -968,7 +968,8 @@ static void crypt_free_buffer_pages(struct crypt_config *cc, struct bio *clone);
968 968
969/* 969/*
970 * Generate a new unfragmented bio with the given size 970 * Generate a new unfragmented bio with the given size
971 * This should never violate the device limitations 971 * This should never violate the device limitations (but only because
972 * max_segment_size is being constrained to PAGE_SIZE).
972 * 973 *
973 * This function may be called concurrently. If we allocate from the mempool 974 * This function may be called concurrently. If we allocate from the mempool
974 * concurrently, there is a possibility of deadlock. For example, if we have 975 * concurrently, there is a possibility of deadlock. For example, if we have
@@ -2045,9 +2046,20 @@ static int crypt_iterate_devices(struct dm_target *ti,
2045 return fn(ti, cc->dev, cc->start, ti->len, data); 2046 return fn(ti, cc->dev, cc->start, ti->len, data);
2046} 2047}
2047 2048
2049static void crypt_io_hints(struct dm_target *ti, struct queue_limits *limits)
2050{
2051 /*
2052 * Unfortunate constraint that is required to avoid the potential
2053 * for exceeding underlying device's max_segments limits -- due to
2054 * crypt_alloc_buffer() possibly allocating pages for the encryption
2055 * bio that are not as physically contiguous as the original bio.
2056 */
2057 limits->max_segment_size = PAGE_SIZE;
2058}
2059
2048static struct target_type crypt_target = { 2060static struct target_type crypt_target = {
2049 .name = "crypt", 2061 .name = "crypt",
2050 .version = {1, 14, 0}, 2062 .version = {1, 14, 1},
2051 .module = THIS_MODULE, 2063 .module = THIS_MODULE,
2052 .ctr = crypt_ctr, 2064 .ctr = crypt_ctr,
2053 .dtr = crypt_dtr, 2065 .dtr = crypt_dtr,
@@ -2058,6 +2070,7 @@ static struct target_type crypt_target = {
2058 .resume = crypt_resume, 2070 .resume = crypt_resume,
2059 .message = crypt_message, 2071 .message = crypt_message,
2060 .iterate_devices = crypt_iterate_devices, 2072 .iterate_devices = crypt_iterate_devices,
2073 .io_hints = crypt_io_hints,
2061}; 2074};
2062 2075
2063static int __init dm_crypt_init(void) 2076static int __init dm_crypt_init(void)
diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c
index 6578b7bc1fbb..6fcbfb063366 100644
--- a/drivers/md/dm-thin.c
+++ b/drivers/md/dm-thin.c
@@ -4249,6 +4249,10 @@ static void thin_io_hints(struct dm_target *ti, struct queue_limits *limits)
4249{ 4249{
4250 struct thin_c *tc = ti->private; 4250 struct thin_c *tc = ti->private;
4251 struct pool *pool = tc->pool; 4251 struct pool *pool = tc->pool;
4252 struct queue_limits *pool_limits = dm_get_queue_limits(pool->pool_md);
4253
4254 if (!pool_limits->discard_granularity)
4255 return; /* pool's discard support is disabled */
4252 4256
4253 limits->discard_granularity = pool->sectors_per_block << SECTOR_SHIFT; 4257 limits->discard_granularity = pool->sectors_per_block << SECTOR_SHIFT;
4254 limits->max_discard_sectors = 2048 * 1024 * 16; /* 16G */ 4258 limits->max_discard_sectors = 2048 * 1024 * 16; /* 16G */
diff --git a/drivers/md/md.c b/drivers/md/md.c
index 4f5ecbe94ccb..c702de18207a 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -5409,9 +5409,13 @@ static int md_set_readonly(struct mddev *mddev, struct block_device *bdev)
5409 * which will now never happen */ 5409 * which will now never happen */
5410 wake_up_process(mddev->sync_thread->tsk); 5410 wake_up_process(mddev->sync_thread->tsk);
5411 5411
5412 if (mddev->external && test_bit(MD_CHANGE_PENDING, &mddev->flags))
5413 return -EBUSY;
5412 mddev_unlock(mddev); 5414 mddev_unlock(mddev);
5413 wait_event(resync_wait, !test_bit(MD_RECOVERY_RUNNING, 5415 wait_event(resync_wait, !test_bit(MD_RECOVERY_RUNNING,
5414 &mddev->recovery)); 5416 &mddev->recovery));
5417 wait_event(mddev->sb_wait,
5418 !test_bit(MD_CHANGE_PENDING, &mddev->flags));
5415 mddev_lock_nointr(mddev); 5419 mddev_lock_nointr(mddev);
5416 5420
5417 mutex_lock(&mddev->open_mutex); 5421 mutex_lock(&mddev->open_mutex);
@@ -8160,6 +8164,7 @@ void md_check_recovery(struct mddev *mddev)
8160 md_reap_sync_thread(mddev); 8164 md_reap_sync_thread(mddev);
8161 clear_bit(MD_RECOVERY_RECOVER, &mddev->recovery); 8165 clear_bit(MD_RECOVERY_RECOVER, &mddev->recovery);
8162 clear_bit(MD_RECOVERY_NEEDED, &mddev->recovery); 8166 clear_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
8167 clear_bit(MD_CHANGE_PENDING, &mddev->flags);
8163 goto unlock; 8168 goto unlock;
8164 } 8169 }
8165 8170
diff --git a/drivers/md/multipath.c b/drivers/md/multipath.c
index d222522c52e0..d132f06afdd1 100644
--- a/drivers/md/multipath.c
+++ b/drivers/md/multipath.c
@@ -470,8 +470,7 @@ static int multipath_run (struct mddev *mddev)
470 return 0; 470 return 0;
471 471
472out_free_conf: 472out_free_conf:
473 if (conf->pool) 473 mempool_destroy(conf->pool);
474 mempool_destroy(conf->pool);
475 kfree(conf->multipaths); 474 kfree(conf->multipaths);
476 kfree(conf); 475 kfree(conf);
477 mddev->private = NULL; 476 mddev->private = NULL;
diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c
index 63e619b2f44e..f8e5db0cb5aa 100644
--- a/drivers/md/raid0.c
+++ b/drivers/md/raid0.c
@@ -376,12 +376,6 @@ static int raid0_run(struct mddev *mddev)
376 struct md_rdev *rdev; 376 struct md_rdev *rdev;
377 bool discard_supported = false; 377 bool discard_supported = false;
378 378
379 rdev_for_each(rdev, mddev) {
380 disk_stack_limits(mddev->gendisk, rdev->bdev,
381 rdev->data_offset << 9);
382 if (blk_queue_discard(bdev_get_queue(rdev->bdev)))
383 discard_supported = true;
384 }
385 blk_queue_max_hw_sectors(mddev->queue, mddev->chunk_sectors); 379 blk_queue_max_hw_sectors(mddev->queue, mddev->chunk_sectors);
386 blk_queue_max_write_same_sectors(mddev->queue, mddev->chunk_sectors); 380 blk_queue_max_write_same_sectors(mddev->queue, mddev->chunk_sectors);
387 blk_queue_max_discard_sectors(mddev->queue, mddev->chunk_sectors); 381 blk_queue_max_discard_sectors(mddev->queue, mddev->chunk_sectors);
@@ -390,6 +384,12 @@ static int raid0_run(struct mddev *mddev)
390 blk_queue_io_opt(mddev->queue, 384 blk_queue_io_opt(mddev->queue,
391 (mddev->chunk_sectors << 9) * mddev->raid_disks); 385 (mddev->chunk_sectors << 9) * mddev->raid_disks);
392 386
387 rdev_for_each(rdev, mddev) {
388 disk_stack_limits(mddev->gendisk, rdev->bdev,
389 rdev->data_offset << 9);
390 if (blk_queue_discard(bdev_get_queue(rdev->bdev)))
391 discard_supported = true;
392 }
393 if (!discard_supported) 393 if (!discard_supported)
394 queue_flag_clear_unlocked(QUEUE_FLAG_DISCARD, mddev->queue); 394 queue_flag_clear_unlocked(QUEUE_FLAG_DISCARD, mddev->queue);
395 else 395 else
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index 4517f06c41ba..049df6c4a8cc 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -881,8 +881,7 @@ static sector_t wait_barrier(struct r1conf *conf, struct bio *bio)
881 } 881 }
882 882
883 if (bio && bio_data_dir(bio) == WRITE) { 883 if (bio && bio_data_dir(bio) == WRITE) {
884 if (bio->bi_iter.bi_sector >= 884 if (bio->bi_iter.bi_sector >= conf->next_resync) {
885 conf->mddev->curr_resync_completed) {
886 if (conf->start_next_window == MaxSector) 885 if (conf->start_next_window == MaxSector)
887 conf->start_next_window = 886 conf->start_next_window =
888 conf->next_resync + 887 conf->next_resync +
@@ -1516,7 +1515,7 @@ static void close_sync(struct r1conf *conf)
1516 conf->r1buf_pool = NULL; 1515 conf->r1buf_pool = NULL;
1517 1516
1518 spin_lock_irq(&conf->resync_lock); 1517 spin_lock_irq(&conf->resync_lock);
1519 conf->next_resync = 0; 1518 conf->next_resync = MaxSector - 2 * NEXT_NORMALIO_DISTANCE;
1520 conf->start_next_window = MaxSector; 1519 conf->start_next_window = MaxSector;
1521 conf->current_window_requests += 1520 conf->current_window_requests +=
1522 conf->next_window_requests; 1521 conf->next_window_requests;
@@ -2843,8 +2842,7 @@ static struct r1conf *setup_conf(struct mddev *mddev)
2843 2842
2844 abort: 2843 abort:
2845 if (conf) { 2844 if (conf) {
2846 if (conf->r1bio_pool) 2845 mempool_destroy(conf->r1bio_pool);
2847 mempool_destroy(conf->r1bio_pool);
2848 kfree(conf->mirrors); 2846 kfree(conf->mirrors);
2849 safe_put_page(conf->tmppage); 2847 safe_put_page(conf->tmppage);
2850 kfree(conf->poolinfo); 2848 kfree(conf->poolinfo);
@@ -2946,8 +2944,7 @@ static void raid1_free(struct mddev *mddev, void *priv)
2946{ 2944{
2947 struct r1conf *conf = priv; 2945 struct r1conf *conf = priv;
2948 2946
2949 if (conf->r1bio_pool) 2947 mempool_destroy(conf->r1bio_pool);
2950 mempool_destroy(conf->r1bio_pool);
2951 kfree(conf->mirrors); 2948 kfree(conf->mirrors);
2952 safe_put_page(conf->tmppage); 2949 safe_put_page(conf->tmppage);
2953 kfree(conf->poolinfo); 2950 kfree(conf->poolinfo);
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index 0fc33eb88855..7c99a4037715 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -3486,8 +3486,7 @@ static struct r10conf *setup_conf(struct mddev *mddev)
3486 printk(KERN_ERR "md/raid10:%s: couldn't allocate memory.\n", 3486 printk(KERN_ERR "md/raid10:%s: couldn't allocate memory.\n",
3487 mdname(mddev)); 3487 mdname(mddev));
3488 if (conf) { 3488 if (conf) {
3489 if (conf->r10bio_pool) 3489 mempool_destroy(conf->r10bio_pool);
3490 mempool_destroy(conf->r10bio_pool);
3491 kfree(conf->mirrors); 3490 kfree(conf->mirrors);
3492 safe_put_page(conf->tmppage); 3491 safe_put_page(conf->tmppage);
3493 kfree(conf); 3492 kfree(conf);
@@ -3682,8 +3681,7 @@ static int run(struct mddev *mddev)
3682 3681
3683out_free_conf: 3682out_free_conf:
3684 md_unregister_thread(&mddev->thread); 3683 md_unregister_thread(&mddev->thread);
3685 if (conf->r10bio_pool) 3684 mempool_destroy(conf->r10bio_pool);
3686 mempool_destroy(conf->r10bio_pool);
3687 safe_put_page(conf->tmppage); 3685 safe_put_page(conf->tmppage);
3688 kfree(conf->mirrors); 3686 kfree(conf->mirrors);
3689 kfree(conf); 3687 kfree(conf);
@@ -3696,8 +3694,7 @@ static void raid10_free(struct mddev *mddev, void *priv)
3696{ 3694{
3697 struct r10conf *conf = priv; 3695 struct r10conf *conf = priv;
3698 3696
3699 if (conf->r10bio_pool) 3697 mempool_destroy(conf->r10bio_pool);
3700 mempool_destroy(conf->r10bio_pool);
3701 safe_put_page(conf->tmppage); 3698 safe_put_page(conf->tmppage);
3702 kfree(conf->mirrors); 3699 kfree(conf->mirrors);
3703 kfree(conf->mirrors_old); 3700 kfree(conf->mirrors_old);
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index 15ef2c641b2b..49bb8d3ff9be 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -2271,8 +2271,7 @@ static void shrink_stripes(struct r5conf *conf)
2271 drop_one_stripe(conf)) 2271 drop_one_stripe(conf))
2272 ; 2272 ;
2273 2273
2274 if (conf->slab_cache) 2274 kmem_cache_destroy(conf->slab_cache);
2275 kmem_cache_destroy(conf->slab_cache);
2276 conf->slab_cache = NULL; 2275 conf->slab_cache = NULL;
2277} 2276}
2278 2277
@@ -3150,6 +3149,8 @@ handle_failed_stripe(struct r5conf *conf, struct stripe_head *sh,
3150 spin_unlock_irq(&sh->stripe_lock); 3149 spin_unlock_irq(&sh->stripe_lock);
3151 if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags)) 3150 if (test_and_clear_bit(R5_Overlap, &sh->dev[i].flags))
3152 wake_up(&conf->wait_for_overlap); 3151 wake_up(&conf->wait_for_overlap);
3152 if (bi)
3153 s->to_read--;
3153 while (bi && bi->bi_iter.bi_sector < 3154 while (bi && bi->bi_iter.bi_sector <
3154 sh->dev[i].sector + STRIPE_SECTORS) { 3155 sh->dev[i].sector + STRIPE_SECTORS) {
3155 struct bio *nextbi = 3156 struct bio *nextbi =
@@ -3169,6 +3170,8 @@ handle_failed_stripe(struct r5conf *conf, struct stripe_head *sh,
3169 */ 3170 */
3170 clear_bit(R5_LOCKED, &sh->dev[i].flags); 3171 clear_bit(R5_LOCKED, &sh->dev[i].flags);
3171 } 3172 }
3173 s->to_write = 0;
3174 s->written = 0;
3172 3175
3173 if (test_and_clear_bit(STRIPE_FULL_WRITE, &sh->state)) 3176 if (test_and_clear_bit(STRIPE_FULL_WRITE, &sh->state))
3174 if (atomic_dec_and_test(&conf->pending_full_writes)) 3177 if (atomic_dec_and_test(&conf->pending_full_writes))
@@ -3300,7 +3303,7 @@ static int need_this_block(struct stripe_head *sh, struct stripe_head_state *s,
3300 */ 3303 */
3301 return 0; 3304 return 0;
3302 3305
3303 for (i = 0; i < s->failed; i++) { 3306 for (i = 0; i < s->failed && i < 2; i++) {
3304 if (fdev[i]->towrite && 3307 if (fdev[i]->towrite &&
3305 !test_bit(R5_UPTODATE, &fdev[i]->flags) && 3308 !test_bit(R5_UPTODATE, &fdev[i]->flags) &&
3306 !test_bit(R5_OVERWRITE, &fdev[i]->flags)) 3309 !test_bit(R5_OVERWRITE, &fdev[i]->flags))
@@ -3324,7 +3327,7 @@ static int need_this_block(struct stripe_head *sh, struct stripe_head_state *s,
3324 sh->sector < sh->raid_conf->mddev->recovery_cp) 3327 sh->sector < sh->raid_conf->mddev->recovery_cp)
3325 /* reconstruct-write isn't being forced */ 3328 /* reconstruct-write isn't being forced */
3326 return 0; 3329 return 0;
3327 for (i = 0; i < s->failed; i++) { 3330 for (i = 0; i < s->failed && i < 2; i++) {
3328 if (s->failed_num[i] != sh->pd_idx && 3331 if (s->failed_num[i] != sh->pd_idx &&
3329 s->failed_num[i] != sh->qd_idx && 3332 s->failed_num[i] != sh->qd_idx &&
3330 !test_bit(R5_UPTODATE, &fdev[i]->flags) && 3333 !test_bit(R5_UPTODATE, &fdev[i]->flags) &&
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index 4b54128bc78e..a726f01e3b02 100644
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -138,7 +138,7 @@ static void asic3_irq_flip_edge(struct asic3 *asic,
138 spin_unlock_irqrestore(&asic->lock, flags); 138 spin_unlock_irqrestore(&asic->lock, flags);
139} 139}
140 140
141static void asic3_irq_demux(unsigned int irq, struct irq_desc *desc) 141static void asic3_irq_demux(struct irq_desc *desc)
142{ 142{
143 struct asic3 *asic = irq_desc_get_handler_data(desc); 143 struct asic3 *asic = irq_desc_get_handler_data(desc);
144 struct irq_data *data = irq_desc_get_irq_data(desc); 144 struct irq_data *data = irq_desc_get_irq_data(desc);
diff --git a/drivers/mfd/ezx-pcap.c b/drivers/mfd/ezx-pcap.c
index a76eb6ef47a0..b279205659a4 100644
--- a/drivers/mfd/ezx-pcap.c
+++ b/drivers/mfd/ezx-pcap.c
@@ -205,7 +205,7 @@ static void pcap_isr_work(struct work_struct *work)
205 } while (gpio_get_value(pdata->gpio)); 205 } while (gpio_get_value(pdata->gpio));
206} 206}
207 207
208static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc) 208static void pcap_irq_handler(struct irq_desc *desc)
209{ 209{
210 struct pcap_chip *pcap = irq_desc_get_handler_data(desc); 210 struct pcap_chip *pcap = irq_desc_get_handler_data(desc);
211 211
diff --git a/drivers/mfd/htc-egpio.c b/drivers/mfd/htc-egpio.c
index 9131cdcdc64a..6ccaf90d98fd 100644
--- a/drivers/mfd/htc-egpio.c
+++ b/drivers/mfd/htc-egpio.c
@@ -98,7 +98,7 @@ static struct irq_chip egpio_muxed_chip = {
98 .irq_unmask = egpio_unmask, 98 .irq_unmask = egpio_unmask,
99}; 99};
100 100
101static void egpio_handler(unsigned int irq, struct irq_desc *desc) 101static void egpio_handler(struct irq_desc *desc)
102{ 102{
103 struct egpio_info *ei = irq_desc_get_handler_data(desc); 103 struct egpio_info *ei = irq_desc_get_handler_data(desc);
104 int irqpin; 104 int irqpin;
diff --git a/drivers/mfd/jz4740-adc.c b/drivers/mfd/jz4740-adc.c
index 5bb49f08955d..798e44306382 100644
--- a/drivers/mfd/jz4740-adc.c
+++ b/drivers/mfd/jz4740-adc.c
@@ -65,7 +65,7 @@ struct jz4740_adc {
65 spinlock_t lock; 65 spinlock_t lock;
66}; 66};
67 67
68static void jz4740_adc_irq_demux(unsigned int irq, struct irq_desc *desc) 68static void jz4740_adc_irq_demux(struct irq_desc *desc)
69{ 69{
70 struct irq_chip_generic *gc = irq_desc_get_handler_data(desc); 70 struct irq_chip_generic *gc = irq_desc_get_handler_data(desc);
71 uint8_t status; 71 uint8_t status;
diff --git a/drivers/mfd/pm8921-core.c b/drivers/mfd/pm8921-core.c
index 59502d02cd15..1b7ec0870c2a 100644
--- a/drivers/mfd/pm8921-core.c
+++ b/drivers/mfd/pm8921-core.c
@@ -156,7 +156,7 @@ static int pm8xxx_irq_master_handler(struct pm_irq_chip *chip, int master)
156 return ret; 156 return ret;
157} 157}
158 158
159static void pm8xxx_irq_handler(unsigned int irq, struct irq_desc *desc) 159static void pm8xxx_irq_handler(struct irq_desc *desc)
160{ 160{
161 struct pm_irq_chip *chip = irq_desc_get_handler_data(desc); 161 struct pm_irq_chip *chip = irq_desc_get_handler_data(desc);
162 struct irq_chip *irq_chip = irq_desc_get_chip(desc); 162 struct irq_chip *irq_chip = irq_desc_get_chip(desc);
diff --git a/drivers/mfd/t7l66xb.c b/drivers/mfd/t7l66xb.c
index 16fc1adc4fa3..94bd89cb1f06 100644
--- a/drivers/mfd/t7l66xb.c
+++ b/drivers/mfd/t7l66xb.c
@@ -185,7 +185,7 @@ static struct mfd_cell t7l66xb_cells[] = {
185/*--------------------------------------------------------------------------*/ 185/*--------------------------------------------------------------------------*/
186 186
187/* Handle the T7L66XB interrupt mux */ 187/* Handle the T7L66XB interrupt mux */
188static void t7l66xb_irq(unsigned int irq, struct irq_desc *desc) 188static void t7l66xb_irq(struct irq_desc *desc)
189{ 189{
190 struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc); 190 struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc);
191 unsigned int isr; 191 unsigned int isr;
diff --git a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c
index 775b9aca871a..8c84a513016b 100644
--- a/drivers/mfd/tc6393xb.c
+++ b/drivers/mfd/tc6393xb.c
@@ -522,8 +522,7 @@ static int tc6393xb_register_gpio(struct tc6393xb *tc6393xb, int gpio_base)
522 522
523/*--------------------------------------------------------------------------*/ 523/*--------------------------------------------------------------------------*/
524 524
525static void 525static void tc6393xb_irq(struct irq_desc *desc)
526tc6393xb_irq(unsigned int irq, struct irq_desc *desc)
527{ 526{
528 struct tc6393xb *tc6393xb = irq_desc_get_handler_data(desc); 527 struct tc6393xb *tc6393xb = irq_desc_get_handler_data(desc);
529 unsigned int isr; 528 unsigned int isr;
diff --git a/drivers/mfd/ucb1x00-core.c b/drivers/mfd/ucb1x00-core.c
index 9a2302129711..f691d7ecad52 100644
--- a/drivers/mfd/ucb1x00-core.c
+++ b/drivers/mfd/ucb1x00-core.c
@@ -282,7 +282,7 @@ void ucb1x00_adc_disable(struct ucb1x00 *ucb)
282 * SIBCLK to talk to the chip. We leave the clock running until 282 * SIBCLK to talk to the chip. We leave the clock running until
283 * we have finished processing all interrupts from the chip. 283 * we have finished processing all interrupts from the chip.
284 */ 284 */
285static void ucb1x00_irq(unsigned int __irq, struct irq_desc *desc) 285static void ucb1x00_irq(struct irq_desc *desc)
286{ 286{
287 struct ucb1x00 *ucb = irq_desc_get_handler_data(desc); 287 struct ucb1x00 *ucb = irq_desc_get_handler_data(desc);
288 unsigned int isr, i; 288 unsigned int isr, i;
diff --git a/drivers/misc/cxl/Makefile b/drivers/misc/cxl/Makefile
index 6f484dfe78f9..6982f603fadc 100644
--- a/drivers/misc/cxl/Makefile
+++ b/drivers/misc/cxl/Makefile
@@ -1,4 +1,4 @@
1ccflags-y := -Werror 1ccflags-y := -Werror -Wno-unused-const-variable
2 2
3cxl-y += main.o file.o irq.o fault.o native.o 3cxl-y += main.o file.o irq.o fault.o native.o
4cxl-y += context.o sysfs.o debugfs.o pci.o trace.o 4cxl-y += context.o sysfs.o debugfs.o pci.o trace.o
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 02c85160bfe9..a5e977192b61 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1249,8 +1249,6 @@ static int cxl_probe(struct pci_dev *dev, const struct pci_device_id *id)
1249 int slice; 1249 int slice;
1250 int rc; 1250 int rc;
1251 1251
1252 pci_dev_get(dev);
1253
1254 if (cxl_verbose) 1252 if (cxl_verbose)
1255 dump_cxl_config_space(dev); 1253 dump_cxl_config_space(dev);
1256 1254
diff --git a/drivers/misc/cxl/sysfs.c b/drivers/misc/cxl/sysfs.c
index 25868c2ec03e..02006f7109a8 100644
--- a/drivers/misc/cxl/sysfs.c
+++ b/drivers/misc/cxl/sysfs.c
@@ -592,6 +592,8 @@ int cxl_sysfs_afu_add(struct cxl_afu *afu)
592 592
593 /* conditionally create the add the binary file for error info buffer */ 593 /* conditionally create the add the binary file for error info buffer */
594 if (afu->eb_len) { 594 if (afu->eb_len) {
595 sysfs_attr_init(&afu->attr_eb.attr);
596
595 afu->attr_eb.attr.name = "afu_err_buff"; 597 afu->attr_eb.attr.name = "afu_err_buff";
596 afu->attr_eb.attr.mode = S_IRUGO; 598 afu->attr_eb.attr.mode = S_IRUGO;
597 afu->attr_eb.size = afu->eb_len; 599 afu->attr_eb.size = afu->eb_len;
diff --git a/drivers/misc/cxl/vphb.c b/drivers/misc/cxl/vphb.c
index 6dd16a6d153f..94b520896b18 100644
--- a/drivers/misc/cxl/vphb.c
+++ b/drivers/misc/cxl/vphb.c
@@ -48,6 +48,12 @@ static bool cxl_pci_enable_device_hook(struct pci_dev *dev)
48 48
49 phb = pci_bus_to_host(dev->bus); 49 phb = pci_bus_to_host(dev->bus);
50 afu = (struct cxl_afu *)phb->private_data; 50 afu = (struct cxl_afu *)phb->private_data;
51
52 if (!cxl_adapter_link_ok(afu->adapter)) {
53 dev_warn(&dev->dev, "%s: Device link is down, refusing to enable AFU\n", __func__);
54 return false;
55 }
56
51 set_dma_ops(&dev->dev, &dma_direct_ops); 57 set_dma_ops(&dev->dev, &dma_direct_ops);
52 set_dma_offset(&dev->dev, PAGE_OFFSET); 58 set_dma_offset(&dev->dev, PAGE_OFFSET);
53 59
diff --git a/drivers/misc/mei/debugfs.c b/drivers/misc/mei/debugfs.c
index 4b469cf9e60f..8504dbeacd3b 100644
--- a/drivers/misc/mei/debugfs.c
+++ b/drivers/misc/mei/debugfs.c
@@ -204,6 +204,8 @@ int mei_dbgfs_register(struct mei_device *dev, const char *name)
204 if (!dir) 204 if (!dir)
205 return -ENOMEM; 205 return -ENOMEM;
206 206
207 dev->dbgfs_dir = dir;
208
207 f = debugfs_create_file("meclients", S_IRUSR, dir, 209 f = debugfs_create_file("meclients", S_IRUSR, dir,
208 dev, &mei_dbgfs_fops_meclients); 210 dev, &mei_dbgfs_fops_meclients);
209 if (!f) { 211 if (!f) {
@@ -228,7 +230,6 @@ int mei_dbgfs_register(struct mei_device *dev, const char *name)
228 dev_err(dev->dev, "allow_fixed_address: registration failed\n"); 230 dev_err(dev->dev, "allow_fixed_address: registration failed\n");
229 goto err; 231 goto err;
230 } 232 }
231 dev->dbgfs_dir = dir;
232 return 0; 233 return 0;
233err: 234err:
234 mei_dbgfs_deregister(dev); 235 mei_dbgfs_deregister(dev);
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 0520064dc33b..a3eb20bdcd97 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -134,9 +134,11 @@ void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq)
134 int err = cmd->error; 134 int err = cmd->error;
135 135
136 /* Flag re-tuning needed on CRC errors */ 136 /* Flag re-tuning needed on CRC errors */
137 if (err == -EILSEQ || (mrq->sbc && mrq->sbc->error == -EILSEQ) || 137 if ((cmd->opcode != MMC_SEND_TUNING_BLOCK &&
138 cmd->opcode != MMC_SEND_TUNING_BLOCK_HS200) &&
139 (err == -EILSEQ || (mrq->sbc && mrq->sbc->error == -EILSEQ) ||
138 (mrq->data && mrq->data->error == -EILSEQ) || 140 (mrq->data && mrq->data->error == -EILSEQ) ||
139 (mrq->stop && mrq->stop->error == -EILSEQ)) 141 (mrq->stop && mrq->stop->error == -EILSEQ)))
140 mmc_retune_needed(host); 142 mmc_retune_needed(host);
141 143
142 if (err && cmd->retries && mmc_host_is_spi(host)) { 144 if (err && cmd->retries && mmc_host_is_spi(host)) {
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index abd933b7029b..5466f25f0281 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -457,7 +457,7 @@ int mmc_of_parse(struct mmc_host *host)
457 0, &cd_gpio_invert); 457 0, &cd_gpio_invert);
458 if (!ret) 458 if (!ret)
459 dev_info(host->parent, "Got CD GPIO\n"); 459 dev_info(host->parent, "Got CD GPIO\n");
460 else if (ret != -ENOENT) 460 else if (ret != -ENOENT && ret != -ENOSYS)
461 return ret; 461 return ret;
462 462
463 /* 463 /*
@@ -481,7 +481,7 @@ int mmc_of_parse(struct mmc_host *host)
481 ret = mmc_gpiod_request_ro(host, "wp", 0, false, 0, &ro_gpio_invert); 481 ret = mmc_gpiod_request_ro(host, "wp", 0, false, 0, &ro_gpio_invert);
482 if (!ret) 482 if (!ret)
483 dev_info(host->parent, "Got WP GPIO\n"); 483 dev_info(host->parent, "Got WP GPIO\n");
484 else if (ret != -ENOENT) 484 else if (ret != -ENOENT && ret != -ENOSYS)
485 return ret; 485 return ret;
486 486
487 if (of_property_read_bool(np, "disable-wp")) 487 if (of_property_read_bool(np, "disable-wp"))
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index 1420f29628c7..8cadd74e8407 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -28,6 +28,7 @@
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/err.h> 29#include <linux/err.h>
30#include <linux/mmc/host.h> 30#include <linux/mmc/host.h>
31#include <linux/mmc/slot-gpio.h>
31#include <linux/io.h> 32#include <linux/io.h>
32#include <linux/regulator/consumer.h> 33#include <linux/regulator/consumer.h>
33#include <linux/gpio.h> 34#include <linux/gpio.h>
@@ -454,12 +455,8 @@ static int pxamci_get_ro(struct mmc_host *mmc)
454{ 455{
455 struct pxamci_host *host = mmc_priv(mmc); 456 struct pxamci_host *host = mmc_priv(mmc);
456 457
457 if (host->pdata && gpio_is_valid(host->pdata->gpio_card_ro)) { 458 if (host->pdata && gpio_is_valid(host->pdata->gpio_card_ro))
458 if (host->pdata->gpio_card_ro_invert) 459 return mmc_gpio_get_ro(mmc);
459 return !gpio_get_value(host->pdata->gpio_card_ro);
460 else
461 return gpio_get_value(host->pdata->gpio_card_ro);
462 }
463 if (host->pdata && host->pdata->get_ro) 460 if (host->pdata && host->pdata->get_ro)
464 return !!host->pdata->get_ro(mmc_dev(mmc)); 461 return !!host->pdata->get_ro(mmc_dev(mmc));
465 /* 462 /*
@@ -551,6 +548,7 @@ static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
551 548
552static const struct mmc_host_ops pxamci_ops = { 549static const struct mmc_host_ops pxamci_ops = {
553 .request = pxamci_request, 550 .request = pxamci_request,
551 .get_cd = mmc_gpio_get_cd,
554 .get_ro = pxamci_get_ro, 552 .get_ro = pxamci_get_ro,
555 .set_ios = pxamci_set_ios, 553 .set_ios = pxamci_set_ios,
556 .enable_sdio_irq = pxamci_enable_sdio_irq, 554 .enable_sdio_irq = pxamci_enable_sdio_irq,
@@ -790,37 +788,31 @@ static int pxamci_probe(struct platform_device *pdev)
790 gpio_power = host->pdata->gpio_power; 788 gpio_power = host->pdata->gpio_power;
791 } 789 }
792 if (gpio_is_valid(gpio_power)) { 790 if (gpio_is_valid(gpio_power)) {
793 ret = gpio_request(gpio_power, "mmc card power"); 791 ret = devm_gpio_request(&pdev->dev, gpio_power,
792 "mmc card power");
794 if (ret) { 793 if (ret) {
795 dev_err(&pdev->dev, "Failed requesting gpio_power %d\n", gpio_power); 794 dev_err(&pdev->dev, "Failed requesting gpio_power %d\n",
795 gpio_power);
796 goto out; 796 goto out;
797 } 797 }
798 gpio_direction_output(gpio_power, 798 gpio_direction_output(gpio_power,
799 host->pdata->gpio_power_invert); 799 host->pdata->gpio_power_invert);
800 } 800 }
801 if (gpio_is_valid(gpio_ro)) { 801 if (gpio_is_valid(gpio_ro))
802 ret = gpio_request(gpio_ro, "mmc card read only"); 802 ret = mmc_gpio_request_ro(mmc, gpio_ro);
803 if (ret) { 803 if (ret) {
804 dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_ro); 804 dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_ro);
805 goto err_gpio_ro; 805 goto out;
806 } 806 } else {
807 gpio_direction_input(gpio_ro); 807 mmc->caps |= host->pdata->gpio_card_ro_invert ?
808 MMC_CAP2_RO_ACTIVE_HIGH : 0;
808 } 809 }
809 if (gpio_is_valid(gpio_cd)) {
810 ret = gpio_request(gpio_cd, "mmc card detect");
811 if (ret) {
812 dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n", gpio_cd);
813 goto err_gpio_cd;
814 }
815 gpio_direction_input(gpio_cd);
816 810
817 ret = request_irq(gpio_to_irq(gpio_cd), pxamci_detect_irq, 811 if (gpio_is_valid(gpio_cd))
818 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 812 ret = mmc_gpio_request_cd(mmc, gpio_cd, 0);
819 "mmc card detect", mmc); 813 if (ret) {
820 if (ret) { 814 dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n", gpio_cd);
821 dev_err(&pdev->dev, "failed to request card detect IRQ\n"); 815 goto out;
822 goto err_request_irq;
823 }
824 } 816 }
825 817
826 if (host->pdata && host->pdata->init) 818 if (host->pdata && host->pdata->init)
@@ -835,13 +827,7 @@ static int pxamci_probe(struct platform_device *pdev)
835 827
836 return 0; 828 return 0;
837 829
838err_request_irq: 830out:
839 gpio_free(gpio_cd);
840err_gpio_cd:
841 gpio_free(gpio_ro);
842err_gpio_ro:
843 gpio_free(gpio_power);
844 out:
845 if (host) { 831 if (host) {
846 if (host->dma_chan_rx) 832 if (host->dma_chan_rx)
847 dma_release_channel(host->dma_chan_rx); 833 dma_release_channel(host->dma_chan_rx);
@@ -873,14 +859,6 @@ static int pxamci_remove(struct platform_device *pdev)
873 gpio_ro = host->pdata->gpio_card_ro; 859 gpio_ro = host->pdata->gpio_card_ro;
874 gpio_power = host->pdata->gpio_power; 860 gpio_power = host->pdata->gpio_power;
875 } 861 }
876 if (gpio_is_valid(gpio_cd)) {
877 free_irq(gpio_to_irq(gpio_cd), mmc);
878 gpio_free(gpio_cd);
879 }
880 if (gpio_is_valid(gpio_ro))
881 gpio_free(gpio_ro);
882 if (gpio_is_valid(gpio_power))
883 gpio_free(gpio_power);
884 if (host->vcc) 862 if (host->vcc)
885 regulator_put(host->vcc); 863 regulator_put(host->vcc);
886 864
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index a7b7a6771598..b981b8552e43 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -210,6 +210,16 @@
210#define SDXC_IDMAC_DES0_CES BIT(30) /* card error summary */ 210#define SDXC_IDMAC_DES0_CES BIT(30) /* card error summary */
211#define SDXC_IDMAC_DES0_OWN BIT(31) /* 1-idma owns it, 0-host owns it */ 211#define SDXC_IDMAC_DES0_OWN BIT(31) /* 1-idma owns it, 0-host owns it */
212 212
213#define SDXC_CLK_400K 0
214#define SDXC_CLK_25M 1
215#define SDXC_CLK_50M 2
216#define SDXC_CLK_50M_DDR 3
217
218struct sunxi_mmc_clk_delay {
219 u32 output;
220 u32 sample;
221};
222
213struct sunxi_idma_des { 223struct sunxi_idma_des {
214 u32 config; 224 u32 config;
215 u32 buf_size; 225 u32 buf_size;
@@ -229,6 +239,7 @@ struct sunxi_mmc_host {
229 struct clk *clk_mmc; 239 struct clk *clk_mmc;
230 struct clk *clk_sample; 240 struct clk *clk_sample;
231 struct clk *clk_output; 241 struct clk *clk_output;
242 const struct sunxi_mmc_clk_delay *clk_delays;
232 243
233 /* irq */ 244 /* irq */
234 spinlock_t lock; 245 spinlock_t lock;
@@ -654,25 +665,19 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
654 665
655 /* determine delays */ 666 /* determine delays */
656 if (rate <= 400000) { 667 if (rate <= 400000) {
657 oclk_dly = 180; 668 oclk_dly = host->clk_delays[SDXC_CLK_400K].output;
658 sclk_dly = 42; 669 sclk_dly = host->clk_delays[SDXC_CLK_400K].sample;
659 } else if (rate <= 25000000) { 670 } else if (rate <= 25000000) {
660 oclk_dly = 180; 671 oclk_dly = host->clk_delays[SDXC_CLK_25M].output;
661 sclk_dly = 75; 672 sclk_dly = host->clk_delays[SDXC_CLK_25M].sample;
662 } else if (rate <= 50000000) { 673 } else if (rate <= 50000000) {
663 if (ios->timing == MMC_TIMING_UHS_DDR50) { 674 if (ios->timing == MMC_TIMING_UHS_DDR50) {
664 oclk_dly = 60; 675 oclk_dly = host->clk_delays[SDXC_CLK_50M_DDR].output;
665 sclk_dly = 120; 676 sclk_dly = host->clk_delays[SDXC_CLK_50M_DDR].sample;
666 } else { 677 } else {
667 oclk_dly = 90; 678 oclk_dly = host->clk_delays[SDXC_CLK_50M].output;
668 sclk_dly = 150; 679 sclk_dly = host->clk_delays[SDXC_CLK_50M].sample;
669 } 680 }
670 } else if (rate <= 100000000) {
671 oclk_dly = 6;
672 sclk_dly = 24;
673 } else if (rate <= 200000000) {
674 oclk_dly = 3;
675 sclk_dly = 12;
676 } else { 681 } else {
677 return -EINVAL; 682 return -EINVAL;
678 } 683 }
@@ -871,6 +876,7 @@ static void sunxi_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
871static const struct of_device_id sunxi_mmc_of_match[] = { 876static const struct of_device_id sunxi_mmc_of_match[] = {
872 { .compatible = "allwinner,sun4i-a10-mmc", }, 877 { .compatible = "allwinner,sun4i-a10-mmc", },
873 { .compatible = "allwinner,sun5i-a13-mmc", }, 878 { .compatible = "allwinner,sun5i-a13-mmc", },
879 { .compatible = "allwinner,sun9i-a80-mmc", },
874 { /* sentinel */ } 880 { /* sentinel */ }
875}; 881};
876MODULE_DEVICE_TABLE(of, sunxi_mmc_of_match); 882MODULE_DEVICE_TABLE(of, sunxi_mmc_of_match);
@@ -884,6 +890,20 @@ static struct mmc_host_ops sunxi_mmc_ops = {
884 .hw_reset = sunxi_mmc_hw_reset, 890 .hw_reset = sunxi_mmc_hw_reset,
885}; 891};
886 892
893static const struct sunxi_mmc_clk_delay sunxi_mmc_clk_delays[] = {
894 [SDXC_CLK_400K] = { .output = 180, .sample = 180 },
895 [SDXC_CLK_25M] = { .output = 180, .sample = 75 },
896 [SDXC_CLK_50M] = { .output = 90, .sample = 120 },
897 [SDXC_CLK_50M_DDR] = { .output = 60, .sample = 120 },
898};
899
900static const struct sunxi_mmc_clk_delay sun9i_mmc_clk_delays[] = {
901 [SDXC_CLK_400K] = { .output = 180, .sample = 180 },
902 [SDXC_CLK_25M] = { .output = 180, .sample = 75 },
903 [SDXC_CLK_50M] = { .output = 150, .sample = 120 },
904 [SDXC_CLK_50M_DDR] = { .output = 90, .sample = 120 },
905};
906
887static int sunxi_mmc_resource_request(struct sunxi_mmc_host *host, 907static int sunxi_mmc_resource_request(struct sunxi_mmc_host *host,
888 struct platform_device *pdev) 908 struct platform_device *pdev)
889{ 909{
@@ -895,6 +915,11 @@ static int sunxi_mmc_resource_request(struct sunxi_mmc_host *host,
895 else 915 else
896 host->idma_des_size_bits = 16; 916 host->idma_des_size_bits = 16;
897 917
918 if (of_device_is_compatible(np, "allwinner,sun9i-a80-mmc"))
919 host->clk_delays = sun9i_mmc_clk_delays;
920 else
921 host->clk_delays = sunxi_mmc_clk_delays;
922
898 ret = mmc_regulator_get_supply(host->mmc); 923 ret = mmc_regulator_get_supply(host->mmc);
899 if (ret) { 924 if (ret) {
900 if (ret != -EPROBE_DEFER) 925 if (ret != -EPROBE_DEFER)
diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c
index 5bbd1f094f4e..1fc23e48fe8e 100644
--- a/drivers/mtd/ubi/io.c
+++ b/drivers/mtd/ubi/io.c
@@ -926,6 +926,11 @@ static int validate_vid_hdr(const struct ubi_device *ubi,
926 goto bad; 926 goto bad;
927 } 927 }
928 928
929 if (data_size > ubi->leb_size) {
930 ubi_err(ubi, "bad data_size");
931 goto bad;
932 }
933
929 if (vol_type == UBI_VID_STATIC) { 934 if (vol_type == UBI_VID_STATIC) {
930 /* 935 /*
931 * Although from high-level point of view static volumes may 936 * Although from high-level point of view static volumes may
diff --git a/drivers/mtd/ubi/vtbl.c b/drivers/mtd/ubi/vtbl.c
index 80bdd5b88bac..d85c19762160 100644
--- a/drivers/mtd/ubi/vtbl.c
+++ b/drivers/mtd/ubi/vtbl.c
@@ -649,6 +649,7 @@ static int init_volumes(struct ubi_device *ubi,
649 if (ubi->corr_peb_count) 649 if (ubi->corr_peb_count)
650 ubi_err(ubi, "%d PEBs are corrupted and not used", 650 ubi_err(ubi, "%d PEBs are corrupted and not used",
651 ubi->corr_peb_count); 651 ubi->corr_peb_count);
652 return -ENOSPC;
652 } 653 }
653 ubi->rsvd_pebs += reserved_pebs; 654 ubi->rsvd_pebs += reserved_pebs;
654 ubi->avail_pebs -= reserved_pebs; 655 ubi->avail_pebs -= reserved_pebs;
diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c
index 275d9fb6fe5c..eb4489f9082f 100644
--- a/drivers/mtd/ubi/wl.c
+++ b/drivers/mtd/ubi/wl.c
@@ -1601,6 +1601,7 @@ int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai)
1601 if (ubi->corr_peb_count) 1601 if (ubi->corr_peb_count)
1602 ubi_err(ubi, "%d PEBs are corrupted and not used", 1602 ubi_err(ubi, "%d PEBs are corrupted and not used",
1603 ubi->corr_peb_count); 1603 ubi->corr_peb_count);
1604 err = -ENOSPC;
1604 goto out_free; 1605 goto out_free;
1605 } 1606 }
1606 ubi->avail_pebs -= reserved_pebs; 1607 ubi->avail_pebs -= reserved_pebs;
diff --git a/drivers/net/arcnet/arcnet.c b/drivers/net/arcnet/arcnet.c
index 10f71c732b59..816d0e94961c 100644
--- a/drivers/net/arcnet/arcnet.c
+++ b/drivers/net/arcnet/arcnet.c
@@ -326,7 +326,7 @@ static void arcdev_setup(struct net_device *dev)
326 dev->type = ARPHRD_ARCNET; 326 dev->type = ARPHRD_ARCNET;
327 dev->netdev_ops = &arcnet_netdev_ops; 327 dev->netdev_ops = &arcnet_netdev_ops;
328 dev->header_ops = &arcnet_header_ops; 328 dev->header_ops = &arcnet_header_ops;
329 dev->hard_header_len = sizeof(struct archdr); 329 dev->hard_header_len = sizeof(struct arc_hardware);
330 dev->mtu = choose_mtu(); 330 dev->mtu = choose_mtu();
331 331
332 dev->addr_len = ARCNET_ALEN; 332 dev->addr_len = ARCNET_ALEN;
diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c
index 6f13f7206762..1f7dd927cc5e 100644
--- a/drivers/net/dsa/mv88e6xxx.c
+++ b/drivers/net/dsa/mv88e6xxx.c
@@ -2000,6 +2000,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
2000 */ 2000 */
2001 reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL); 2001 reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL);
2002 if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) { 2002 if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) {
2003 reg &= ~PORT_PCS_CTRL_UNFORCED;
2003 reg |= PORT_PCS_CTRL_FORCE_LINK | 2004 reg |= PORT_PCS_CTRL_FORCE_LINK |
2004 PORT_PCS_CTRL_LINK_UP | 2005 PORT_PCS_CTRL_LINK_UP |
2005 PORT_PCS_CTRL_DUPLEX_FULL | 2006 PORT_PCS_CTRL_DUPLEX_FULL |
@@ -2050,6 +2051,8 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
2050 reg |= PORT_CONTROL_FRAME_ETHER_TYPE_DSA; 2051 reg |= PORT_CONTROL_FRAME_ETHER_TYPE_DSA;
2051 else 2052 else
2052 reg |= PORT_CONTROL_FRAME_MODE_DSA; 2053 reg |= PORT_CONTROL_FRAME_MODE_DSA;
2054 reg |= PORT_CONTROL_FORWARD_UNKNOWN |
2055 PORT_CONTROL_FORWARD_UNKNOWN_MC;
2053 } 2056 }
2054 2057
2055 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || 2058 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
index cfa37041ab71..c4bb8027b3fb 100644
--- a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
+++ b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
@@ -689,16 +689,24 @@ static int xgene_enet_phy_connect(struct net_device *ndev)
689 netdev_dbg(ndev, "No phy-handle found in DT\n"); 689 netdev_dbg(ndev, "No phy-handle found in DT\n");
690 return -ENODEV; 690 return -ENODEV;
691 } 691 }
692 pdata->phy_dev = of_phy_find_device(phy_np);
693 }
694 692
695 phy_dev = pdata->phy_dev; 693 phy_dev = of_phy_connect(ndev, phy_np, &xgene_enet_adjust_link,
694 0, pdata->phy_mode);
695 if (!phy_dev) {
696 netdev_err(ndev, "Could not connect to PHY\n");
697 return -ENODEV;
698 }
699
700 pdata->phy_dev = phy_dev;
701 } else {
702 phy_dev = pdata->phy_dev;
696 703
697 if (!phy_dev || 704 if (!phy_dev ||
698 phy_connect_direct(ndev, phy_dev, &xgene_enet_adjust_link, 705 phy_connect_direct(ndev, phy_dev, &xgene_enet_adjust_link,
699 pdata->phy_mode)) { 706 pdata->phy_mode)) {
700 netdev_err(ndev, "Could not connect to PHY\n"); 707 netdev_err(ndev, "Could not connect to PHY\n");
701 return -ENODEV; 708 return -ENODEV;
709 }
702 } 710 }
703 711
704 pdata->phy_speed = SPEED_UNKNOWN; 712 pdata->phy_speed = SPEED_UNKNOWN;
diff --git a/drivers/net/ethernet/arc/emac_arc.c b/drivers/net/ethernet/arc/emac_arc.c
index f9cb99bfb511..ffd180570920 100644
--- a/drivers/net/ethernet/arc/emac_arc.c
+++ b/drivers/net/ethernet/arc/emac_arc.c
@@ -78,6 +78,7 @@ static const struct of_device_id emac_arc_dt_ids[] = {
78 { .compatible = "snps,arc-emac" }, 78 { .compatible = "snps,arc-emac" },
79 { /* Sentinel */ } 79 { /* Sentinel */ }
80}; 80};
81MODULE_DEVICE_TABLE(of, emac_arc_dt_ids);
81 82
82static struct platform_driver emac_arc_driver = { 83static struct platform_driver emac_arc_driver = {
83 .probe = emac_arc_probe, 84 .probe = emac_arc_probe,
diff --git a/drivers/net/ethernet/broadcom/bcmsysport.c b/drivers/net/ethernet/broadcom/bcmsysport.c
index b9a5a97ed4dd..f1b5364f3521 100644
--- a/drivers/net/ethernet/broadcom/bcmsysport.c
+++ b/drivers/net/ethernet/broadcom/bcmsysport.c
@@ -2079,6 +2079,7 @@ static const struct of_device_id bcm_sysport_of_match[] = {
2079 { .compatible = "brcm,systemport" }, 2079 { .compatible = "brcm,systemport" },
2080 { /* sentinel */ } 2080 { /* sentinel */ }
2081}; 2081};
2082MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2082 2083
2083static struct platform_driver bcm_sysport_driver = { 2084static struct platform_driver bcm_sysport_driver = {
2084 .probe = bcm_sysport_probe, 2085 .probe = bcm_sysport_probe,
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index ba936635322a..b5e64b02200c 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -1946,6 +1946,7 @@ struct bnx2x {
1946 u16 vlan_cnt; 1946 u16 vlan_cnt;
1947 u16 vlan_credit; 1947 u16 vlan_credit;
1948 u16 vxlan_dst_port; 1948 u16 vxlan_dst_port;
1949 u8 vxlan_dst_port_count;
1949 bool accept_any_vlan; 1950 bool accept_any_vlan;
1950}; 1951};
1951 1952
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index e3da2bddf143..f1d62d5dbaff 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -3705,16 +3705,14 @@ out:
3705 3705
3706void bnx2x_update_mfw_dump(struct bnx2x *bp) 3706void bnx2x_update_mfw_dump(struct bnx2x *bp)
3707{ 3707{
3708 struct timeval epoc;
3709 u32 drv_ver; 3708 u32 drv_ver;
3710 u32 valid_dump; 3709 u32 valid_dump;
3711 3710
3712 if (!SHMEM2_HAS(bp, drv_info)) 3711 if (!SHMEM2_HAS(bp, drv_info))
3713 return; 3712 return;
3714 3713
3715 /* Update Driver load time */ 3714 /* Update Driver load time, possibly broken in y2038 */
3716 do_gettimeofday(&epoc); 3715 SHMEM2_WR(bp, drv_info.epoc, (u32)ktime_get_real_seconds());
3717 SHMEM2_WR(bp, drv_info.epoc, epoc.tv_sec);
3718 3716
3719 drv_ver = bnx2x_update_mng_version_utility(DRV_MODULE_VERSION, true); 3717 drv_ver = bnx2x_update_mng_version_utility(DRV_MODULE_VERSION, true);
3720 SHMEM2_WR(bp, drv_info.drv_ver, drv_ver); 3718 SHMEM2_WR(bp, drv_info.drv_ver, drv_ver);
@@ -10110,12 +10108,18 @@ static void __bnx2x_add_vxlan_port(struct bnx2x *bp, u16 port)
10110 if (!netif_running(bp->dev)) 10108 if (!netif_running(bp->dev))
10111 return; 10109 return;
10112 10110
10113 if (bp->vxlan_dst_port || !IS_PF(bp)) { 10111 if (bp->vxlan_dst_port_count && bp->vxlan_dst_port == port) {
10112 bp->vxlan_dst_port_count++;
10113 return;
10114 }
10115
10116 if (bp->vxlan_dst_port_count || !IS_PF(bp)) {
10114 DP(BNX2X_MSG_SP, "Vxlan destination port limit reached\n"); 10117 DP(BNX2X_MSG_SP, "Vxlan destination port limit reached\n");
10115 return; 10118 return;
10116 } 10119 }
10117 10120
10118 bp->vxlan_dst_port = port; 10121 bp->vxlan_dst_port = port;
10122 bp->vxlan_dst_port_count = 1;
10119 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_ADD_VXLAN_PORT, 0); 10123 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_ADD_VXLAN_PORT, 0);
10120} 10124}
10121 10125
@@ -10130,10 +10134,14 @@ static void bnx2x_add_vxlan_port(struct net_device *netdev,
10130 10134
10131static void __bnx2x_del_vxlan_port(struct bnx2x *bp, u16 port) 10135static void __bnx2x_del_vxlan_port(struct bnx2x *bp, u16 port)
10132{ 10136{
10133 if (!bp->vxlan_dst_port || bp->vxlan_dst_port != port || !IS_PF(bp)) { 10137 if (!bp->vxlan_dst_port_count || bp->vxlan_dst_port != port ||
10138 !IS_PF(bp)) {
10134 DP(BNX2X_MSG_SP, "Invalid vxlan port\n"); 10139 DP(BNX2X_MSG_SP, "Invalid vxlan port\n");
10135 return; 10140 return;
10136 } 10141 }
10142 bp->vxlan_dst_port--;
10143 if (bp->vxlan_dst_port)
10144 return;
10137 10145
10138 if (netif_running(bp->dev)) { 10146 if (netif_running(bp->dev)) {
10139 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_DEL_VXLAN_PORT, 0); 10147 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_DEL_VXLAN_PORT, 0);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
index c9bd7f16018e..ff702a707a91 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
@@ -4319,8 +4319,16 @@ static int bnx2x_setup_rss(struct bnx2x *bp,
4319 4319
4320 /* RSS keys */ 4320 /* RSS keys */
4321 if (test_bit(BNX2X_RSS_SET_SRCH, &p->rss_flags)) { 4321 if (test_bit(BNX2X_RSS_SET_SRCH, &p->rss_flags)) {
4322 memcpy(&data->rss_key[0], &p->rss_key[0], 4322 u8 *dst = (u8 *)(data->rss_key) + sizeof(data->rss_key);
4323 sizeof(data->rss_key)); 4323 const u8 *src = (const u8 *)p->rss_key;
4324 int i;
4325
4326 /* Apparently, bnx2x reads this array in reverse order
4327 * We need to byte swap rss_key to comply with Toeplitz specs.
4328 */
4329 for (i = 0; i < sizeof(data->rss_key); i++)
4330 *--dst = *src++;
4331
4324 caps |= ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY; 4332 caps |= ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY;
4325 } 4333 }
4326 4334
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
index fadbd0088d3e..3bc701e4c59e 100644
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
@@ -3155,6 +3155,7 @@ static const struct of_device_id bcmgenet_match[] = {
3155 { .compatible = "brcm,genet-v4", .data = (void *)GENET_V4 }, 3155 { .compatible = "brcm,genet-v4", .data = (void *)GENET_V4 },
3156 { }, 3156 { },
3157}; 3157};
3158MODULE_DEVICE_TABLE(of, bcmgenet_match);
3158 3159
3159static int bcmgenet_probe(struct platform_device *pdev) 3160static int bcmgenet_probe(struct platform_device *pdev)
3160{ 3161{
diff --git a/drivers/net/ethernet/brocade/bna/bfa_ioc.c b/drivers/net/ethernet/brocade/bna/bfa_ioc.c
index b7a0f7879de2..9e59663a6ead 100644
--- a/drivers/net/ethernet/brocade/bna/bfa_ioc.c
+++ b/drivers/net/ethernet/brocade/bna/bfa_ioc.c
@@ -1543,7 +1543,7 @@ bfa_flash_cmd_act_check(void __iomem *pci_bar)
1543} 1543}
1544 1544
1545/* Flush FLI data fifo. */ 1545/* Flush FLI data fifo. */
1546static u32 1546static int
1547bfa_flash_fifo_flush(void __iomem *pci_bar) 1547bfa_flash_fifo_flush(void __iomem *pci_bar)
1548{ 1548{
1549 u32 i; 1549 u32 i;
@@ -1573,11 +1573,11 @@ bfa_flash_fifo_flush(void __iomem *pci_bar)
1573} 1573}
1574 1574
1575/* Read flash status. */ 1575/* Read flash status. */
1576static u32 1576static int
1577bfa_flash_status_read(void __iomem *pci_bar) 1577bfa_flash_status_read(void __iomem *pci_bar)
1578{ 1578{
1579 union bfa_flash_dev_status_reg dev_status; 1579 union bfa_flash_dev_status_reg dev_status;
1580 u32 status; 1580 int status;
1581 u32 ret_status; 1581 u32 ret_status;
1582 int i; 1582 int i;
1583 1583
@@ -1611,11 +1611,11 @@ bfa_flash_status_read(void __iomem *pci_bar)
1611} 1611}
1612 1612
1613/* Start flash read operation. */ 1613/* Start flash read operation. */
1614static u32 1614static int
1615bfa_flash_read_start(void __iomem *pci_bar, u32 offset, u32 len, 1615bfa_flash_read_start(void __iomem *pci_bar, u32 offset, u32 len,
1616 char *buf) 1616 char *buf)
1617{ 1617{
1618 u32 status; 1618 int status;
1619 1619
1620 /* len must be mutiple of 4 and not exceeding fifo size */ 1620 /* len must be mutiple of 4 and not exceeding fifo size */
1621 if (len == 0 || len > BFA_FLASH_FIFO_SIZE || (len & 0x03) != 0) 1621 if (len == 0 || len > BFA_FLASH_FIFO_SIZE || (len & 0x03) != 0)
@@ -1703,7 +1703,8 @@ static enum bfa_status
1703bfa_flash_raw_read(void __iomem *pci_bar, u32 offset, char *buf, 1703bfa_flash_raw_read(void __iomem *pci_bar, u32 offset, char *buf,
1704 u32 len) 1704 u32 len)
1705{ 1705{
1706 u32 n, status; 1706 u32 n;
1707 int status;
1707 u32 off, l, s, residue, fifo_sz; 1708 u32 off, l, s, residue, fifo_sz;
1708 1709
1709 residue = len; 1710 residue = len;
diff --git a/drivers/net/ethernet/brocade/bna/bna_tx_rx.c b/drivers/net/ethernet/brocade/bna/bna_tx_rx.c
index 5d0753cc7e73..04b0d16b210e 100644
--- a/drivers/net/ethernet/brocade/bna/bna_tx_rx.c
+++ b/drivers/net/ethernet/brocade/bna/bna_tx_rx.c
@@ -2400,6 +2400,7 @@ bna_rx_create(struct bna *bna, struct bnad *bnad,
2400 q0->rcb->id = 0; 2400 q0->rcb->id = 0;
2401 q0->rx_packets = q0->rx_bytes = 0; 2401 q0->rx_packets = q0->rx_bytes = 0;
2402 q0->rx_packets_with_error = q0->rxbuf_alloc_failed = 0; 2402 q0->rx_packets_with_error = q0->rxbuf_alloc_failed = 0;
2403 q0->rxbuf_map_failed = 0;
2403 2404
2404 bna_rxq_qpt_setup(q0, rxp, dpage_count, PAGE_SIZE, 2405 bna_rxq_qpt_setup(q0, rxp, dpage_count, PAGE_SIZE,
2405 &dqpt_mem[i], &dsqpt_mem[i], &dpage_mem[i]); 2406 &dqpt_mem[i], &dsqpt_mem[i], &dpage_mem[i]);
@@ -2428,6 +2429,7 @@ bna_rx_create(struct bna *bna, struct bnad *bnad,
2428 : rx_cfg->q1_buf_size; 2429 : rx_cfg->q1_buf_size;
2429 q1->rx_packets = q1->rx_bytes = 0; 2430 q1->rx_packets = q1->rx_bytes = 0;
2430 q1->rx_packets_with_error = q1->rxbuf_alloc_failed = 0; 2431 q1->rx_packets_with_error = q1->rxbuf_alloc_failed = 0;
2432 q1->rxbuf_map_failed = 0;
2431 2433
2432 bna_rxq_qpt_setup(q1, rxp, hpage_count, PAGE_SIZE, 2434 bna_rxq_qpt_setup(q1, rxp, hpage_count, PAGE_SIZE,
2433 &hqpt_mem[i], &hsqpt_mem[i], 2435 &hqpt_mem[i], &hsqpt_mem[i],
diff --git a/drivers/net/ethernet/brocade/bna/bna_types.h b/drivers/net/ethernet/brocade/bna/bna_types.h
index e0e797f2ea14..c438d032e8bf 100644
--- a/drivers/net/ethernet/brocade/bna/bna_types.h
+++ b/drivers/net/ethernet/brocade/bna/bna_types.h
@@ -587,6 +587,7 @@ struct bna_rxq {
587 u64 rx_bytes; 587 u64 rx_bytes;
588 u64 rx_packets_with_error; 588 u64 rx_packets_with_error;
589 u64 rxbuf_alloc_failed; 589 u64 rxbuf_alloc_failed;
590 u64 rxbuf_map_failed;
590}; 591};
591 592
592/* RxQ pair */ 593/* RxQ pair */
diff --git a/drivers/net/ethernet/brocade/bna/bnad.c b/drivers/net/ethernet/brocade/bna/bnad.c
index 506047c38607..21a0cfc3e7ec 100644
--- a/drivers/net/ethernet/brocade/bna/bnad.c
+++ b/drivers/net/ethernet/brocade/bna/bnad.c
@@ -399,7 +399,13 @@ bnad_rxq_refill_page(struct bnad *bnad, struct bna_rcb *rcb, u32 nalloc)
399 } 399 }
400 400
401 dma_addr = dma_map_page(&bnad->pcidev->dev, page, page_offset, 401 dma_addr = dma_map_page(&bnad->pcidev->dev, page, page_offset,
402 unmap_q->map_size, DMA_FROM_DEVICE); 402 unmap_q->map_size, DMA_FROM_DEVICE);
403 if (dma_mapping_error(&bnad->pcidev->dev, dma_addr)) {
404 put_page(page);
405 BNAD_UPDATE_CTR(bnad, rxbuf_map_failed);
406 rcb->rxq->rxbuf_map_failed++;
407 goto finishing;
408 }
403 409
404 unmap->page = page; 410 unmap->page = page;
405 unmap->page_offset = page_offset; 411 unmap->page_offset = page_offset;
@@ -454,8 +460,15 @@ bnad_rxq_refill_skb(struct bnad *bnad, struct bna_rcb *rcb, u32 nalloc)
454 rcb->rxq->rxbuf_alloc_failed++; 460 rcb->rxq->rxbuf_alloc_failed++;
455 goto finishing; 461 goto finishing;
456 } 462 }
463
457 dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data, 464 dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data,
458 buff_sz, DMA_FROM_DEVICE); 465 buff_sz, DMA_FROM_DEVICE);
466 if (dma_mapping_error(&bnad->pcidev->dev, dma_addr)) {
467 dev_kfree_skb_any(skb);
468 BNAD_UPDATE_CTR(bnad, rxbuf_map_failed);
469 rcb->rxq->rxbuf_map_failed++;
470 goto finishing;
471 }
459 472
460 unmap->skb = skb; 473 unmap->skb = skb;
461 dma_unmap_addr_set(&unmap->vector, dma_addr, dma_addr); 474 dma_unmap_addr_set(&unmap->vector, dma_addr, dma_addr);
@@ -3025,6 +3038,11 @@ bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)
3025 unmap = head_unmap; 3038 unmap = head_unmap;
3026 dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data, 3039 dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data,
3027 len, DMA_TO_DEVICE); 3040 len, DMA_TO_DEVICE);
3041 if (dma_mapping_error(&bnad->pcidev->dev, dma_addr)) {
3042 dev_kfree_skb_any(skb);
3043 BNAD_UPDATE_CTR(bnad, tx_skb_map_failed);
3044 return NETDEV_TX_OK;
3045 }
3028 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[0].host_addr); 3046 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[0].host_addr);
3029 txqent->vector[0].length = htons(len); 3047 txqent->vector[0].length = htons(len);
3030 dma_unmap_addr_set(&unmap->vectors[0], dma_addr, dma_addr); 3048 dma_unmap_addr_set(&unmap->vectors[0], dma_addr, dma_addr);
@@ -3056,6 +3074,15 @@ bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)
3056 3074
3057 dma_addr = skb_frag_dma_map(&bnad->pcidev->dev, frag, 3075 dma_addr = skb_frag_dma_map(&bnad->pcidev->dev, frag,
3058 0, size, DMA_TO_DEVICE); 3076 0, size, DMA_TO_DEVICE);
3077 if (dma_mapping_error(&bnad->pcidev->dev, dma_addr)) {
3078 /* Undo the changes starting at tcb->producer_index */
3079 bnad_tx_buff_unmap(bnad, unmap_q, q_depth,
3080 tcb->producer_index);
3081 dev_kfree_skb_any(skb);
3082 BNAD_UPDATE_CTR(bnad, tx_skb_map_failed);
3083 return NETDEV_TX_OK;
3084 }
3085
3059 dma_unmap_len_set(&unmap->vectors[vect_id], dma_len, size); 3086 dma_unmap_len_set(&unmap->vectors[vect_id], dma_len, size);
3060 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr); 3087 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr);
3061 txqent->vector[vect_id].length = htons(size); 3088 txqent->vector[vect_id].length = htons(size);
diff --git a/drivers/net/ethernet/brocade/bna/bnad.h b/drivers/net/ethernet/brocade/bna/bnad.h
index faedbf24777e..f4ed816b93ee 100644
--- a/drivers/net/ethernet/brocade/bna/bnad.h
+++ b/drivers/net/ethernet/brocade/bna/bnad.h
@@ -175,6 +175,7 @@ struct bnad_drv_stats {
175 u64 tx_skb_headlen_zero; 175 u64 tx_skb_headlen_zero;
176 u64 tx_skb_frag_zero; 176 u64 tx_skb_frag_zero;
177 u64 tx_skb_len_mismatch; 177 u64 tx_skb_len_mismatch;
178 u64 tx_skb_map_failed;
178 179
179 u64 hw_stats_updates; 180 u64 hw_stats_updates;
180 u64 netif_rx_dropped; 181 u64 netif_rx_dropped;
@@ -189,6 +190,7 @@ struct bnad_drv_stats {
189 u64 rx_unmap_q_alloc_failed; 190 u64 rx_unmap_q_alloc_failed;
190 191
191 u64 rxbuf_alloc_failed; 192 u64 rxbuf_alloc_failed;
193 u64 rxbuf_map_failed;
192}; 194};
193 195
194/* Complete driver stats */ 196/* Complete driver stats */
diff --git a/drivers/net/ethernet/brocade/bna/bnad_ethtool.c b/drivers/net/ethernet/brocade/bna/bnad_ethtool.c
index 2bdfc5dff4b1..0e4fdc3dd729 100644
--- a/drivers/net/ethernet/brocade/bna/bnad_ethtool.c
+++ b/drivers/net/ethernet/brocade/bna/bnad_ethtool.c
@@ -90,6 +90,7 @@ static const char *bnad_net_stats_strings[BNAD_ETHTOOL_STATS_NUM] = {
90 "tx_skb_headlen_zero", 90 "tx_skb_headlen_zero",
91 "tx_skb_frag_zero", 91 "tx_skb_frag_zero",
92 "tx_skb_len_mismatch", 92 "tx_skb_len_mismatch",
93 "tx_skb_map_failed",
93 "hw_stats_updates", 94 "hw_stats_updates",
94 "netif_rx_dropped", 95 "netif_rx_dropped",
95 96
@@ -102,6 +103,7 @@ static const char *bnad_net_stats_strings[BNAD_ETHTOOL_STATS_NUM] = {
102 "tx_unmap_q_alloc_failed", 103 "tx_unmap_q_alloc_failed",
103 "rx_unmap_q_alloc_failed", 104 "rx_unmap_q_alloc_failed",
104 "rxbuf_alloc_failed", 105 "rxbuf_alloc_failed",
106 "rxbuf_map_failed",
105 107
106 "mac_stats_clr_cnt", 108 "mac_stats_clr_cnt",
107 "mac_frame_64", 109 "mac_frame_64",
@@ -807,6 +809,7 @@ bnad_per_q_stats_fill(struct bnad *bnad, u64 *buf, int bi)
807 rx_packets_with_error; 809 rx_packets_with_error;
808 buf[bi++] = rcb->rxq-> 810 buf[bi++] = rcb->rxq->
809 rxbuf_alloc_failed; 811 rxbuf_alloc_failed;
812 buf[bi++] = rcb->rxq->rxbuf_map_failed;
810 buf[bi++] = rcb->producer_index; 813 buf[bi++] = rcb->producer_index;
811 buf[bi++] = rcb->consumer_index; 814 buf[bi++] = rcb->consumer_index;
812 } 815 }
@@ -821,6 +824,7 @@ bnad_per_q_stats_fill(struct bnad *bnad, u64 *buf, int bi)
821 rx_packets_with_error; 824 rx_packets_with_error;
822 buf[bi++] = rcb->rxq-> 825 buf[bi++] = rcb->rxq->
823 rxbuf_alloc_failed; 826 rxbuf_alloc_failed;
827 buf[bi++] = rcb->rxq->rxbuf_map_failed;
824 buf[bi++] = rcb->producer_index; 828 buf[bi++] = rcb->producer_index;
825 buf[bi++] = rcb->consumer_index; 829 buf[bi++] = rcb->consumer_index;
826 } 830 }
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h b/drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h
index 8353a6cbfcc2..03ed00c49823 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h
@@ -157,6 +157,11 @@ CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
157 CH_PCI_ID_TABLE_FENTRY(0x5090), /* Custom T540-CR */ 157 CH_PCI_ID_TABLE_FENTRY(0x5090), /* Custom T540-CR */
158 CH_PCI_ID_TABLE_FENTRY(0x5091), /* Custom T522-CR */ 158 CH_PCI_ID_TABLE_FENTRY(0x5091), /* Custom T522-CR */
159 CH_PCI_ID_TABLE_FENTRY(0x5092), /* Custom T520-CR */ 159 CH_PCI_ID_TABLE_FENTRY(0x5092), /* Custom T520-CR */
160 CH_PCI_ID_TABLE_FENTRY(0x5093), /* Custom T580-LP-CR */
161 CH_PCI_ID_TABLE_FENTRY(0x5094), /* Custom T540-CR */
162 CH_PCI_ID_TABLE_FENTRY(0x5095), /* Custom T540-CR-SO */
163 CH_PCI_ID_TABLE_FENTRY(0x5096), /* Custom T580-CR */
164 CH_PCI_ID_TABLE_FENTRY(0x5097), /* Custom T520-KR */
160 165
161 /* T6 adapters: 166 /* T6 adapters:
162 */ 167 */
diff --git a/drivers/net/ethernet/emulex/benet/be.h b/drivers/net/ethernet/emulex/benet/be.h
index 0a27805cbbbd..821540913343 100644
--- a/drivers/net/ethernet/emulex/benet/be.h
+++ b/drivers/net/ethernet/emulex/benet/be.h
@@ -582,6 +582,7 @@ struct be_adapter {
582 u16 pvid; 582 u16 pvid;
583 __be16 vxlan_port; 583 __be16 vxlan_port;
584 int vxlan_port_count; 584 int vxlan_port_count;
585 int vxlan_port_aliases;
585 struct phy_info phy; 586 struct phy_info phy;
586 u8 wol_cap; 587 u8 wol_cap;
587 bool wol_en; 588 bool wol_en;
diff --git a/drivers/net/ethernet/emulex/benet/be_main.c b/drivers/net/ethernet/emulex/benet/be_main.c
index 12687bf52b95..7bf51a1a0a77 100644
--- a/drivers/net/ethernet/emulex/benet/be_main.c
+++ b/drivers/net/ethernet/emulex/benet/be_main.c
@@ -5176,6 +5176,11 @@ static void be_add_vxlan_port(struct net_device *netdev, sa_family_t sa_family,
5176 if (lancer_chip(adapter) || BEx_chip(adapter) || be_is_mc(adapter)) 5176 if (lancer_chip(adapter) || BEx_chip(adapter) || be_is_mc(adapter))
5177 return; 5177 return;
5178 5178
5179 if (adapter->vxlan_port == port && adapter->vxlan_port_count) {
5180 adapter->vxlan_port_aliases++;
5181 return;
5182 }
5183
5179 if (adapter->flags & BE_FLAGS_VXLAN_OFFLOADS) { 5184 if (adapter->flags & BE_FLAGS_VXLAN_OFFLOADS) {
5180 dev_info(dev, 5185 dev_info(dev,
5181 "Only one UDP port supported for VxLAN offloads\n"); 5186 "Only one UDP port supported for VxLAN offloads\n");
@@ -5226,6 +5231,11 @@ static void be_del_vxlan_port(struct net_device *netdev, sa_family_t sa_family,
5226 if (adapter->vxlan_port != port) 5231 if (adapter->vxlan_port != port)
5227 goto done; 5232 goto done;
5228 5233
5234 if (adapter->vxlan_port_aliases) {
5235 adapter->vxlan_port_aliases--;
5236 return;
5237 }
5238
5229 be_disable_vxlan_offloads(adapter); 5239 be_disable_vxlan_offloads(adapter);
5230 5240
5231 dev_info(&adapter->pdev->dev, 5241 dev_info(&adapter->pdev->dev,
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
index 4b69d061d90f..710715fcb23d 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -1710,8 +1710,10 @@ static void gfar_configure_serdes(struct net_device *dev)
1710 * everything for us? Resetting it takes the link down and requires 1710 * everything for us? Resetting it takes the link down and requires
1711 * several seconds for it to come back. 1711 * several seconds for it to come back.
1712 */ 1712 */
1713 if (phy_read(tbiphy, MII_BMSR) & BMSR_LSTATUS) 1713 if (phy_read(tbiphy, MII_BMSR) & BMSR_LSTATUS) {
1714 put_device(&tbiphy->dev);
1714 return; 1715 return;
1716 }
1715 1717
1716 /* Single clk mode, mii mode off(for serdes communication) */ 1718 /* Single clk mode, mii mode off(for serdes communication) */
1717 phy_write(tbiphy, MII_TBICON, TBICON_CLK_SELECT); 1719 phy_write(tbiphy, MII_TBICON, TBICON_CLK_SELECT);
@@ -1723,6 +1725,8 @@ static void gfar_configure_serdes(struct net_device *dev)
1723 phy_write(tbiphy, MII_BMCR, 1725 phy_write(tbiphy, MII_BMCR,
1724 BMCR_ANENABLE | BMCR_ANRESTART | BMCR_FULLDPLX | 1726 BMCR_ANENABLE | BMCR_ANRESTART | BMCR_FULLDPLX |
1725 BMCR_SPEED1000); 1727 BMCR_SPEED1000);
1728
1729 put_device(&tbiphy->dev);
1726} 1730}
1727 1731
1728static int __gfar_is_rx_idle(struct gfar_private *priv) 1732static int __gfar_is_rx_idle(struct gfar_private *priv)
@@ -1970,8 +1974,7 @@ static int register_grp_irqs(struct gfar_priv_grp *grp)
1970 /* Install our interrupt handlers for Error, 1974 /* Install our interrupt handlers for Error,
1971 * Transmit, and Receive 1975 * Transmit, and Receive
1972 */ 1976 */
1973 err = request_irq(gfar_irq(grp, ER)->irq, gfar_error, 1977 err = request_irq(gfar_irq(grp, ER)->irq, gfar_error, 0,
1974 IRQF_NO_SUSPEND,
1975 gfar_irq(grp, ER)->name, grp); 1978 gfar_irq(grp, ER)->name, grp);
1976 if (err < 0) { 1979 if (err < 0) {
1977 netif_err(priv, intr, dev, "Can't get IRQ %d\n", 1980 netif_err(priv, intr, dev, "Can't get IRQ %d\n",
@@ -1979,6 +1982,8 @@ static int register_grp_irqs(struct gfar_priv_grp *grp)
1979 1982
1980 goto err_irq_fail; 1983 goto err_irq_fail;
1981 } 1984 }
1985 enable_irq_wake(gfar_irq(grp, ER)->irq);
1986
1982 err = request_irq(gfar_irq(grp, TX)->irq, gfar_transmit, 0, 1987 err = request_irq(gfar_irq(grp, TX)->irq, gfar_transmit, 0,
1983 gfar_irq(grp, TX)->name, grp); 1988 gfar_irq(grp, TX)->name, grp);
1984 if (err < 0) { 1989 if (err < 0) {
@@ -1994,14 +1999,14 @@ static int register_grp_irqs(struct gfar_priv_grp *grp)
1994 goto rx_irq_fail; 1999 goto rx_irq_fail;
1995 } 2000 }
1996 } else { 2001 } else {
1997 err = request_irq(gfar_irq(grp, TX)->irq, gfar_interrupt, 2002 err = request_irq(gfar_irq(grp, TX)->irq, gfar_interrupt, 0,
1998 IRQF_NO_SUSPEND,
1999 gfar_irq(grp, TX)->name, grp); 2003 gfar_irq(grp, TX)->name, grp);
2000 if (err < 0) { 2004 if (err < 0) {
2001 netif_err(priv, intr, dev, "Can't get IRQ %d\n", 2005 netif_err(priv, intr, dev, "Can't get IRQ %d\n",
2002 gfar_irq(grp, TX)->irq); 2006 gfar_irq(grp, TX)->irq);
2003 goto err_irq_fail; 2007 goto err_irq_fail;
2004 } 2008 }
2009 enable_irq_wake(gfar_irq(grp, TX)->irq);
2005 } 2010 }
2006 2011
2007 return 0; 2012 return 0;
diff --git a/drivers/net/ethernet/freescale/gianfar_ptp.c b/drivers/net/ethernet/freescale/gianfar_ptp.c
index 8e3cd77aa347..664d0c261269 100644
--- a/drivers/net/ethernet/freescale/gianfar_ptp.c
+++ b/drivers/net/ethernet/freescale/gianfar_ptp.c
@@ -557,6 +557,7 @@ static const struct of_device_id match_table[] = {
557 { .compatible = "fsl,etsec-ptp" }, 557 { .compatible = "fsl,etsec-ptp" },
558 {}, 558 {},
559}; 559};
560MODULE_DEVICE_TABLE(of, match_table);
560 561
561static struct platform_driver gianfar_ptp_driver = { 562static struct platform_driver gianfar_ptp_driver = {
562 .driver = { 563 .driver = {
diff --git a/drivers/net/ethernet/freescale/ucc_geth.c b/drivers/net/ethernet/freescale/ucc_geth.c
index 4dd40e057f40..650f7888e32b 100644
--- a/drivers/net/ethernet/freescale/ucc_geth.c
+++ b/drivers/net/ethernet/freescale/ucc_geth.c
@@ -1384,6 +1384,8 @@ static int adjust_enet_interface(struct ucc_geth_private *ugeth)
1384 value = phy_read(tbiphy, ENET_TBI_MII_CR); 1384 value = phy_read(tbiphy, ENET_TBI_MII_CR);
1385 value &= ~0x1000; /* Turn off autonegotiation */ 1385 value &= ~0x1000; /* Turn off autonegotiation */
1386 phy_write(tbiphy, ENET_TBI_MII_CR, value); 1386 phy_write(tbiphy, ENET_TBI_MII_CR, value);
1387
1388 put_device(&tbiphy->dev);
1387 } 1389 }
1388 1390
1389 init_check_frame_length_mode(ug_info->lengthCheckRx, &ug_regs->maccfg2); 1391 init_check_frame_length_mode(ug_info->lengthCheckRx, &ug_regs->maccfg2);
@@ -1702,8 +1704,10 @@ static void uec_configure_serdes(struct net_device *dev)
1702 * everything for us? Resetting it takes the link down and requires 1704 * everything for us? Resetting it takes the link down and requires
1703 * several seconds for it to come back. 1705 * several seconds for it to come back.
1704 */ 1706 */
1705 if (phy_read(tbiphy, ENET_TBI_MII_SR) & TBISR_LSTATUS) 1707 if (phy_read(tbiphy, ENET_TBI_MII_SR) & TBISR_LSTATUS) {
1708 put_device(&tbiphy->dev);
1706 return; 1709 return;
1710 }
1707 1711
1708 /* Single clk mode, mii mode off(for serdes communication) */ 1712 /* Single clk mode, mii mode off(for serdes communication) */
1709 phy_write(tbiphy, ENET_TBI_MII_ANA, TBIANA_SETTINGS); 1713 phy_write(tbiphy, ENET_TBI_MII_ANA, TBIANA_SETTINGS);
@@ -1711,6 +1715,8 @@ static void uec_configure_serdes(struct net_device *dev)
1711 phy_write(tbiphy, ENET_TBI_MII_TBICON, TBICON_CLK_SELECT); 1715 phy_write(tbiphy, ENET_TBI_MII_TBICON, TBICON_CLK_SELECT);
1712 1716
1713 phy_write(tbiphy, ENET_TBI_MII_CR, TBICR_SETTINGS); 1717 phy_write(tbiphy, ENET_TBI_MII_CR, TBICR_SETTINGS);
1718
1719 put_device(&tbiphy->dev);
1714} 1720}
1715 1721
1716/* Configure the PHY for dev. 1722/* Configure the PHY for dev.
diff --git a/drivers/net/ethernet/hisilicon/hip04_eth.c b/drivers/net/ethernet/hisilicon/hip04_eth.c
index cc2d8b4b18e3..253f8ed0537a 100644
--- a/drivers/net/ethernet/hisilicon/hip04_eth.c
+++ b/drivers/net/ethernet/hisilicon/hip04_eth.c
@@ -816,7 +816,7 @@ static int hip04_mac_probe(struct platform_device *pdev)
816 struct net_device *ndev; 816 struct net_device *ndev;
817 struct hip04_priv *priv; 817 struct hip04_priv *priv;
818 struct resource *res; 818 struct resource *res;
819 unsigned int irq; 819 int irq;
820 int ret; 820 int ret;
821 821
822 ndev = alloc_etherdev(sizeof(struct hip04_priv)); 822 ndev = alloc_etherdev(sizeof(struct hip04_priv));
diff --git a/drivers/net/ethernet/ibm/emac/core.h b/drivers/net/ethernet/ibm/emac/core.h
index 28df37420da9..ac02c675c59c 100644
--- a/drivers/net/ethernet/ibm/emac/core.h
+++ b/drivers/net/ethernet/ibm/emac/core.h
@@ -460,8 +460,8 @@ struct emac_ethtool_regs_subhdr {
460 u32 index; 460 u32 index;
461}; 461};
462 462
463#define EMAC_ETHTOOL_REGS_VER 0 463#define EMAC_ETHTOOL_REGS_VER 3
464#define EMAC4_ETHTOOL_REGS_VER 1 464#define EMAC4_ETHTOOL_REGS_VER 4
465#define EMAC4SYNC_ETHTOOL_REGS_VER 2 465#define EMAC4SYNC_ETHTOOL_REGS_VER 5
466 466
467#endif /* __IBM_NEWEMAC_CORE_H */ 467#endif /* __IBM_NEWEMAC_CORE_H */
diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.c b/drivers/net/ethernet/intel/i40e/i40e_adminq.c
index 3e0d20037675..62488a67149d 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_adminq.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.c
@@ -946,6 +946,13 @@ i40e_status i40e_clean_arq_element(struct i40e_hw *hw,
946 /* take the lock before we start messing with the ring */ 946 /* take the lock before we start messing with the ring */
947 mutex_lock(&hw->aq.arq_mutex); 947 mutex_lock(&hw->aq.arq_mutex);
948 948
949 if (hw->aq.arq.count == 0) {
950 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
951 "AQRX: Admin queue not initialized.\n");
952 ret_code = I40E_ERR_QUEUE_EMPTY;
953 goto clean_arq_element_err;
954 }
955
949 /* set next_to_use to head */ 956 /* set next_to_use to head */
950 ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK); 957 ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK);
951 if (ntu == ntc) { 958 if (ntu == ntc) {
@@ -1007,6 +1014,8 @@ clean_arq_element_out:
1007 /* Set pending if needed, unlock and return */ 1014 /* Set pending if needed, unlock and return */
1008 if (pending != NULL) 1015 if (pending != NULL)
1009 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc); 1016 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc);
1017
1018clean_arq_element_err:
1010 mutex_unlock(&hw->aq.arq_mutex); 1019 mutex_unlock(&hw->aq.arq_mutex);
1011 1020
1012 if (i40e_is_nvm_update_op(&e->desc)) { 1021 if (i40e_is_nvm_update_op(&e->desc)) {
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index 851c1a159be8..2fdf978ae6a5 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -2672,7 +2672,8 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
2672 rx_ctx.lrxqthresh = 2; 2672 rx_ctx.lrxqthresh = 2;
2673 rx_ctx.crcstrip = 1; 2673 rx_ctx.crcstrip = 1;
2674 rx_ctx.l2tsel = 1; 2674 rx_ctx.l2tsel = 1;
2675 rx_ctx.showiv = 1; 2675 /* this controls whether VLAN is stripped from inner headers */
2676 rx_ctx.showiv = 0;
2676#ifdef I40E_FCOE 2677#ifdef I40E_FCOE
2677 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE); 2678 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2678#endif 2679#endif
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq.c b/drivers/net/ethernet/intel/i40evf/i40e_adminq.c
index f08450b90774..929d47152bf2 100644
--- a/drivers/net/ethernet/intel/i40evf/i40e_adminq.c
+++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq.c
@@ -887,6 +887,13 @@ i40e_status i40evf_clean_arq_element(struct i40e_hw *hw,
887 /* take the lock before we start messing with the ring */ 887 /* take the lock before we start messing with the ring */
888 mutex_lock(&hw->aq.arq_mutex); 888 mutex_lock(&hw->aq.arq_mutex);
889 889
890 if (hw->aq.arq.count == 0) {
891 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
892 "AQRX: Admin queue not initialized.\n");
893 ret_code = I40E_ERR_QUEUE_EMPTY;
894 goto clean_arq_element_err;
895 }
896
890 /* set next_to_use to head */ 897 /* set next_to_use to head */
891 ntu = (rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK); 898 ntu = (rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK);
892 if (ntu == ntc) { 899 if (ntu == ntc) {
@@ -948,6 +955,8 @@ clean_arq_element_out:
948 /* Set pending if needed, unlock and return */ 955 /* Set pending if needed, unlock and return */
949 if (pending != NULL) 956 if (pending != NULL)
950 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc); 957 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc);
958
959clean_arq_element_err:
951 mutex_unlock(&hw->aq.arq_mutex); 960 mutex_unlock(&hw->aq.arq_mutex);
952 961
953 return ret_code; 962 return ret_code;
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index fe2299ac4f5c..514df76fc70f 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -1479,6 +1479,7 @@ static int mvneta_rx(struct mvneta_port *pp, int rx_todo,
1479 struct mvneta_rx_desc *rx_desc = mvneta_rxq_next_desc_get(rxq); 1479 struct mvneta_rx_desc *rx_desc = mvneta_rxq_next_desc_get(rxq);
1480 struct sk_buff *skb; 1480 struct sk_buff *skb;
1481 unsigned char *data; 1481 unsigned char *data;
1482 dma_addr_t phys_addr;
1482 u32 rx_status; 1483 u32 rx_status;
1483 int rx_bytes, err; 1484 int rx_bytes, err;
1484 1485
@@ -1486,6 +1487,7 @@ static int mvneta_rx(struct mvneta_port *pp, int rx_todo,
1486 rx_status = rx_desc->status; 1487 rx_status = rx_desc->status;
1487 rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE); 1488 rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE);
1488 data = (unsigned char *)rx_desc->buf_cookie; 1489 data = (unsigned char *)rx_desc->buf_cookie;
1490 phys_addr = rx_desc->buf_phys_addr;
1489 1491
1490 if (!mvneta_rxq_desc_is_first_last(rx_status) || 1492 if (!mvneta_rxq_desc_is_first_last(rx_status) ||
1491 (rx_status & MVNETA_RXD_ERR_SUMMARY)) { 1493 (rx_status & MVNETA_RXD_ERR_SUMMARY)) {
@@ -1534,7 +1536,7 @@ static int mvneta_rx(struct mvneta_port *pp, int rx_todo,
1534 if (!skb) 1536 if (!skb)
1535 goto err_drop_frame; 1537 goto err_drop_frame;
1536 1538
1537 dma_unmap_single(dev->dev.parent, rx_desc->buf_phys_addr, 1539 dma_unmap_single(dev->dev.parent, phys_addr,
1538 MVNETA_RX_BUF_SIZE(pp->pkt_size), DMA_FROM_DEVICE); 1540 MVNETA_RX_BUF_SIZE(pp->pkt_size), DMA_FROM_DEVICE);
1539 1541
1540 rcvd_pkts++; 1542 rcvd_pkts++;
@@ -3173,6 +3175,8 @@ static int mvneta_probe(struct platform_device *pdev)
3173 struct phy_device *phy = of_phy_find_device(dn); 3175 struct phy_device *phy = of_phy_find_device(dn);
3174 3176
3175 mvneta_fixed_link_update(pp, phy); 3177 mvneta_fixed_link_update(pp, phy);
3178
3179 put_device(&phy->dev);
3176 } 3180 }
3177 3181
3178 return 0; 3182 return 0;
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_rx.c b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
index 4402a1e48c9b..e7a5000aa12c 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
@@ -1047,13 +1047,15 @@ int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget)
1047 1047
1048 /* If we used up all the quota - we're probably not done yet... */ 1048 /* If we used up all the quota - we're probably not done yet... */
1049 if (done == budget) { 1049 if (done == budget) {
1050 int cpu_curr;
1051 const struct cpumask *aff; 1050 const struct cpumask *aff;
1051 struct irq_data *idata;
1052 int cpu_curr;
1052 1053
1053 INC_PERF_COUNTER(priv->pstats.napi_quota); 1054 INC_PERF_COUNTER(priv->pstats.napi_quota);
1054 1055
1055 cpu_curr = smp_processor_id(); 1056 cpu_curr = smp_processor_id();
1056 aff = irq_desc_get_irq_data(cq->irq_desc)->affinity; 1057 idata = irq_desc_get_irq_data(cq->irq_desc);
1058 aff = irq_data_get_affinity_mask(idata);
1057 1059
1058 if (likely(cpumask_test_cpu(cpu_curr, aff))) 1060 if (likely(cpumask_test_cpu(cpu_curr, aff)))
1059 return budget; 1061 return budget;
@@ -1268,8 +1270,6 @@ int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
1268 rss_context->hash_fn = MLX4_RSS_HASH_TOP; 1270 rss_context->hash_fn = MLX4_RSS_HASH_TOP;
1269 memcpy(rss_context->rss_key, priv->rss_key, 1271 memcpy(rss_context->rss_key, priv->rss_key,
1270 MLX4_EN_RSS_KEY_SIZE); 1272 MLX4_EN_RSS_KEY_SIZE);
1271 netdev_rss_key_fill(rss_context->rss_key,
1272 MLX4_EN_RSS_KEY_SIZE);
1273 } else { 1273 } else {
1274 en_err(priv, "Unknown RSS hash function requested\n"); 1274 en_err(priv, "Unknown RSS hash function requested\n");
1275 err = -EINVAL; 1275 err = -EINVAL;
diff --git a/drivers/net/ethernet/mellanox/mlx4/mcg.c b/drivers/net/ethernet/mellanox/mlx4/mcg.c
index bd9ea0d01aae..1d4e2e054647 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mcg.c
+++ b/drivers/net/ethernet/mellanox/mlx4/mcg.c
@@ -1184,10 +1184,11 @@ out:
1184 if (prot == MLX4_PROT_ETH) { 1184 if (prot == MLX4_PROT_ETH) {
1185 /* manage the steering entry for promisc mode */ 1185 /* manage the steering entry for promisc mode */
1186 if (new_entry) 1186 if (new_entry)
1187 new_steering_entry(dev, port, steer, index, qp->qpn); 1187 err = new_steering_entry(dev, port, steer,
1188 index, qp->qpn);
1188 else 1189 else
1189 existing_steering_entry(dev, port, steer, 1190 err = existing_steering_entry(dev, port, steer,
1190 index, qp->qpn); 1191 index, qp->qpn);
1191 } 1192 }
1192 if (err && link && index != -1) { 1193 if (err && link && index != -1) {
1193 if (index < dev->caps.num_mgms) 1194 if (index < dev->caps.num_mgms)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw.c b/drivers/net/ethernet/mellanox/mlx5/core/fw.c
index aa0d5ffe92d8..9335e5ae18cc 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fw.c
@@ -200,25 +200,3 @@ int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev)
200 200
201 return err; 201 return err;
202} 202}
203
204int mlx5_core_query_special_context(struct mlx5_core_dev *dev, u32 *rsvd_lkey)
205{
206 struct mlx5_cmd_query_special_contexts_mbox_in in;
207 struct mlx5_cmd_query_special_contexts_mbox_out out;
208 int err;
209
210 memset(&in, 0, sizeof(in));
211 memset(&out, 0, sizeof(out));
212 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS);
213 err = mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out));
214 if (err)
215 return err;
216
217 if (out.hdr.status)
218 err = mlx5_cmd_status_to_err(&out.hdr);
219
220 *rsvd_lkey = be32_to_cpu(out.resd_lkey);
221
222 return err;
223}
224EXPORT_SYMBOL(mlx5_core_query_special_context);
diff --git a/drivers/net/ethernet/micrel/ks8851.c b/drivers/net/ethernet/micrel/ks8851.c
index 66d4ab703f45..60f43ec22175 100644
--- a/drivers/net/ethernet/micrel/ks8851.c
+++ b/drivers/net/ethernet/micrel/ks8851.c
@@ -1601,6 +1601,7 @@ static const struct of_device_id ks8851_match_table[] = {
1601 { .compatible = "micrel,ks8851" }, 1601 { .compatible = "micrel,ks8851" },
1602 { } 1602 { }
1603}; 1603};
1604MODULE_DEVICE_TABLE(of, ks8851_match_table);
1604 1605
1605static struct spi_driver ks8851_driver = { 1606static struct spi_driver ks8851_driver = {
1606 .driver = { 1607 .driver = {
diff --git a/drivers/net/ethernet/moxa/moxart_ether.c b/drivers/net/ethernet/moxa/moxart_ether.c
index becbb5f1f5a7..a10c928bbd6b 100644
--- a/drivers/net/ethernet/moxa/moxart_ether.c
+++ b/drivers/net/ethernet/moxa/moxart_ether.c
@@ -552,6 +552,7 @@ static const struct of_device_id moxart_mac_match[] = {
552 { .compatible = "moxa,moxart-mac" }, 552 { .compatible = "moxa,moxart-mac" },
553 { } 553 { }
554}; 554};
555MODULE_DEVICE_TABLE(of, moxart_mac_match);
555 556
556static struct platform_driver moxart_mac_driver = { 557static struct platform_driver moxart_mac_driver = {
557 .probe = moxart_mac_probe, 558 .probe = moxart_mac_probe,
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
index 06bcc734fe8d..d6696cfa11d2 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
@@ -536,6 +536,7 @@ struct qlcnic_hardware_context {
536 u8 extend_lb_time; 536 u8 extend_lb_time;
537 u8 phys_port_id[ETH_ALEN]; 537 u8 phys_port_id[ETH_ALEN];
538 u8 lb_mode; 538 u8 lb_mode;
539 u8 vxlan_port_count;
539 u16 vxlan_port; 540 u16 vxlan_port;
540 struct device *hwmon_dev; 541 struct device *hwmon_dev;
541 u32 post_mode; 542 u32 post_mode;
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
index 8b08b20e8b30..d4481454b5f8 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
@@ -483,11 +483,17 @@ static void qlcnic_add_vxlan_port(struct net_device *netdev,
483 /* Adapter supports only one VXLAN port. Use very first port 483 /* Adapter supports only one VXLAN port. Use very first port
484 * for enabling offload 484 * for enabling offload
485 */ 485 */
486 if (!qlcnic_encap_rx_offload(adapter) || ahw->vxlan_port) 486 if (!qlcnic_encap_rx_offload(adapter))
487 return; 487 return;
488 if (!ahw->vxlan_port_count) {
489 ahw->vxlan_port_count = 1;
490 ahw->vxlan_port = ntohs(port);
491 adapter->flags |= QLCNIC_ADD_VXLAN_PORT;
492 return;
493 }
494 if (ahw->vxlan_port == ntohs(port))
495 ahw->vxlan_port_count++;
488 496
489 ahw->vxlan_port = ntohs(port);
490 adapter->flags |= QLCNIC_ADD_VXLAN_PORT;
491} 497}
492 498
493static void qlcnic_del_vxlan_port(struct net_device *netdev, 499static void qlcnic_del_vxlan_port(struct net_device *netdev,
@@ -496,11 +502,13 @@ static void qlcnic_del_vxlan_port(struct net_device *netdev,
496 struct qlcnic_adapter *adapter = netdev_priv(netdev); 502 struct qlcnic_adapter *adapter = netdev_priv(netdev);
497 struct qlcnic_hardware_context *ahw = adapter->ahw; 503 struct qlcnic_hardware_context *ahw = adapter->ahw;
498 504
499 if (!qlcnic_encap_rx_offload(adapter) || !ahw->vxlan_port || 505 if (!qlcnic_encap_rx_offload(adapter) || !ahw->vxlan_port_count ||
500 (ahw->vxlan_port != ntohs(port))) 506 (ahw->vxlan_port != ntohs(port)))
501 return; 507 return;
502 508
503 adapter->flags |= QLCNIC_DEL_VXLAN_PORT; 509 ahw->vxlan_port_count--;
510 if (!ahw->vxlan_port_count)
511 adapter->flags |= QLCNIC_DEL_VXLAN_PORT;
504} 512}
505 513
506static netdev_features_t qlcnic_features_check(struct sk_buff *skb, 514static netdev_features_t qlcnic_features_check(struct sk_buff *skb,
diff --git a/drivers/net/ethernet/realtek/8139cp.c b/drivers/net/ethernet/realtek/8139cp.c
index d79e33b3c191..686334f4588d 100644
--- a/drivers/net/ethernet/realtek/8139cp.c
+++ b/drivers/net/ethernet/realtek/8139cp.c
@@ -157,6 +157,7 @@ enum {
157 NWayAdvert = 0x66, /* MII ADVERTISE */ 157 NWayAdvert = 0x66, /* MII ADVERTISE */
158 NWayLPAR = 0x68, /* MII LPA */ 158 NWayLPAR = 0x68, /* MII LPA */
159 NWayExpansion = 0x6A, /* MII Expansion */ 159 NWayExpansion = 0x6A, /* MII Expansion */
160 TxDmaOkLowDesc = 0x82, /* Low 16 bit address of a Tx descriptor. */
160 Config5 = 0xD8, /* Config5 */ 161 Config5 = 0xD8, /* Config5 */
161 TxPoll = 0xD9, /* Tell chip to check Tx descriptors for work */ 162 TxPoll = 0xD9, /* Tell chip to check Tx descriptors for work */
162 RxMaxSize = 0xDA, /* Max size of an Rx packet (8169 only) */ 163 RxMaxSize = 0xDA, /* Max size of an Rx packet (8169 only) */
@@ -341,6 +342,7 @@ struct cp_private {
341 unsigned tx_tail; 342 unsigned tx_tail;
342 struct cp_desc *tx_ring; 343 struct cp_desc *tx_ring;
343 struct sk_buff *tx_skb[CP_TX_RING_SIZE]; 344 struct sk_buff *tx_skb[CP_TX_RING_SIZE];
345 u32 tx_opts[CP_TX_RING_SIZE];
344 346
345 unsigned rx_buf_sz; 347 unsigned rx_buf_sz;
346 unsigned wol_enabled : 1; /* Is Wake-on-LAN enabled? */ 348 unsigned wol_enabled : 1; /* Is Wake-on-LAN enabled? */
@@ -665,7 +667,7 @@ static void cp_tx (struct cp_private *cp)
665 BUG_ON(!skb); 667 BUG_ON(!skb);
666 668
667 dma_unmap_single(&cp->pdev->dev, le64_to_cpu(txd->addr), 669 dma_unmap_single(&cp->pdev->dev, le64_to_cpu(txd->addr),
668 le32_to_cpu(txd->opts1) & 0xffff, 670 cp->tx_opts[tx_tail] & 0xffff,
669 PCI_DMA_TODEVICE); 671 PCI_DMA_TODEVICE);
670 672
671 if (status & LastFrag) { 673 if (status & LastFrag) {
@@ -733,7 +735,7 @@ static netdev_tx_t cp_start_xmit (struct sk_buff *skb,
733{ 735{
734 struct cp_private *cp = netdev_priv(dev); 736 struct cp_private *cp = netdev_priv(dev);
735 unsigned entry; 737 unsigned entry;
736 u32 eor, flags; 738 u32 eor, opts1;
737 unsigned long intr_flags; 739 unsigned long intr_flags;
738 __le32 opts2; 740 __le32 opts2;
739 int mss = 0; 741 int mss = 0;
@@ -753,6 +755,21 @@ static netdev_tx_t cp_start_xmit (struct sk_buff *skb,
753 mss = skb_shinfo(skb)->gso_size; 755 mss = skb_shinfo(skb)->gso_size;
754 756
755 opts2 = cpu_to_le32(cp_tx_vlan_tag(skb)); 757 opts2 = cpu_to_le32(cp_tx_vlan_tag(skb));
758 opts1 = DescOwn;
759 if (mss)
760 opts1 |= LargeSend | ((mss & MSSMask) << MSSShift);
761 else if (skb->ip_summed == CHECKSUM_PARTIAL) {
762 const struct iphdr *ip = ip_hdr(skb);
763 if (ip->protocol == IPPROTO_TCP)
764 opts1 |= IPCS | TCPCS;
765 else if (ip->protocol == IPPROTO_UDP)
766 opts1 |= IPCS | UDPCS;
767 else {
768 WARN_ONCE(1,
769 "Net bug: asked to checksum invalid Legacy IP packet\n");
770 goto out_dma_error;
771 }
772 }
756 773
757 if (skb_shinfo(skb)->nr_frags == 0) { 774 if (skb_shinfo(skb)->nr_frags == 0) {
758 struct cp_desc *txd = &cp->tx_ring[entry]; 775 struct cp_desc *txd = &cp->tx_ring[entry];
@@ -768,31 +785,20 @@ static netdev_tx_t cp_start_xmit (struct sk_buff *skb,
768 txd->addr = cpu_to_le64(mapping); 785 txd->addr = cpu_to_le64(mapping);
769 wmb(); 786 wmb();
770 787
771 flags = eor | len | DescOwn | FirstFrag | LastFrag; 788 opts1 |= eor | len | FirstFrag | LastFrag;
772
773 if (mss)
774 flags |= LargeSend | ((mss & MSSMask) << MSSShift);
775 else if (skb->ip_summed == CHECKSUM_PARTIAL) {
776 const struct iphdr *ip = ip_hdr(skb);
777 if (ip->protocol == IPPROTO_TCP)
778 flags |= IPCS | TCPCS;
779 else if (ip->protocol == IPPROTO_UDP)
780 flags |= IPCS | UDPCS;
781 else
782 WARN_ON(1); /* we need a WARN() */
783 }
784 789
785 txd->opts1 = cpu_to_le32(flags); 790 txd->opts1 = cpu_to_le32(opts1);
786 wmb(); 791 wmb();
787 792
788 cp->tx_skb[entry] = skb; 793 cp->tx_skb[entry] = skb;
789 entry = NEXT_TX(entry); 794 cp->tx_opts[entry] = opts1;
795 netif_dbg(cp, tx_queued, cp->dev, "tx queued, slot %d, skblen %d\n",
796 entry, skb->len);
790 } else { 797 } else {
791 struct cp_desc *txd; 798 struct cp_desc *txd;
792 u32 first_len, first_eor; 799 u32 first_len, first_eor, ctrl;
793 dma_addr_t first_mapping; 800 dma_addr_t first_mapping;
794 int frag, first_entry = entry; 801 int frag, first_entry = entry;
795 const struct iphdr *ip = ip_hdr(skb);
796 802
797 /* We must give this initial chunk to the device last. 803 /* We must give this initial chunk to the device last.
798 * Otherwise we could race with the device. 804 * Otherwise we could race with the device.
@@ -805,14 +811,14 @@ static netdev_tx_t cp_start_xmit (struct sk_buff *skb,
805 goto out_dma_error; 811 goto out_dma_error;
806 812
807 cp->tx_skb[entry] = skb; 813 cp->tx_skb[entry] = skb;
808 entry = NEXT_TX(entry);
809 814
810 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) { 815 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
811 const skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag]; 816 const skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
812 u32 len; 817 u32 len;
813 u32 ctrl;
814 dma_addr_t mapping; 818 dma_addr_t mapping;
815 819
820 entry = NEXT_TX(entry);
821
816 len = skb_frag_size(this_frag); 822 len = skb_frag_size(this_frag);
817 mapping = dma_map_single(&cp->pdev->dev, 823 mapping = dma_map_single(&cp->pdev->dev,
818 skb_frag_address(this_frag), 824 skb_frag_address(this_frag),
@@ -824,19 +830,7 @@ static netdev_tx_t cp_start_xmit (struct sk_buff *skb,
824 830
825 eor = (entry == (CP_TX_RING_SIZE - 1)) ? RingEnd : 0; 831 eor = (entry == (CP_TX_RING_SIZE - 1)) ? RingEnd : 0;
826 832
827 ctrl = eor | len | DescOwn; 833 ctrl = opts1 | eor | len;
828
829 if (mss)
830 ctrl |= LargeSend |
831 ((mss & MSSMask) << MSSShift);
832 else if (skb->ip_summed == CHECKSUM_PARTIAL) {
833 if (ip->protocol == IPPROTO_TCP)
834 ctrl |= IPCS | TCPCS;
835 else if (ip->protocol == IPPROTO_UDP)
836 ctrl |= IPCS | UDPCS;
837 else
838 BUG();
839 }
840 834
841 if (frag == skb_shinfo(skb)->nr_frags - 1) 835 if (frag == skb_shinfo(skb)->nr_frags - 1)
842 ctrl |= LastFrag; 836 ctrl |= LastFrag;
@@ -849,8 +843,8 @@ static netdev_tx_t cp_start_xmit (struct sk_buff *skb,
849 txd->opts1 = cpu_to_le32(ctrl); 843 txd->opts1 = cpu_to_le32(ctrl);
850 wmb(); 844 wmb();
851 845
846 cp->tx_opts[entry] = ctrl;
852 cp->tx_skb[entry] = skb; 847 cp->tx_skb[entry] = skb;
853 entry = NEXT_TX(entry);
854 } 848 }
855 849
856 txd = &cp->tx_ring[first_entry]; 850 txd = &cp->tx_ring[first_entry];
@@ -858,27 +852,17 @@ static netdev_tx_t cp_start_xmit (struct sk_buff *skb,
858 txd->addr = cpu_to_le64(first_mapping); 852 txd->addr = cpu_to_le64(first_mapping);
859 wmb(); 853 wmb();
860 854
861 if (skb->ip_summed == CHECKSUM_PARTIAL) { 855 ctrl = opts1 | first_eor | first_len | FirstFrag;
862 if (ip->protocol == IPPROTO_TCP) 856 txd->opts1 = cpu_to_le32(ctrl);
863 txd->opts1 = cpu_to_le32(first_eor | first_len |
864 FirstFrag | DescOwn |
865 IPCS | TCPCS);
866 else if (ip->protocol == IPPROTO_UDP)
867 txd->opts1 = cpu_to_le32(first_eor | first_len |
868 FirstFrag | DescOwn |
869 IPCS | UDPCS);
870 else
871 BUG();
872 } else
873 txd->opts1 = cpu_to_le32(first_eor | first_len |
874 FirstFrag | DescOwn);
875 wmb(); 857 wmb();
858
859 cp->tx_opts[first_entry] = ctrl;
860 netif_dbg(cp, tx_queued, cp->dev, "tx queued, slots %d-%d, skblen %d\n",
861 first_entry, entry, skb->len);
876 } 862 }
877 cp->tx_head = entry; 863 cp->tx_head = NEXT_TX(entry);
878 864
879 netdev_sent_queue(dev, skb->len); 865 netdev_sent_queue(dev, skb->len);
880 netif_dbg(cp, tx_queued, cp->dev, "tx queued, slot %d, skblen %d\n",
881 entry, skb->len);
882 if (TX_BUFFS_AVAIL(cp) <= (MAX_SKB_FRAGS + 1)) 866 if (TX_BUFFS_AVAIL(cp) <= (MAX_SKB_FRAGS + 1))
883 netif_stop_queue(dev); 867 netif_stop_queue(dev);
884 868
@@ -1115,6 +1099,7 @@ static int cp_init_rings (struct cp_private *cp)
1115{ 1099{
1116 memset(cp->tx_ring, 0, sizeof(struct cp_desc) * CP_TX_RING_SIZE); 1100 memset(cp->tx_ring, 0, sizeof(struct cp_desc) * CP_TX_RING_SIZE);
1117 cp->tx_ring[CP_TX_RING_SIZE - 1].opts1 = cpu_to_le32(RingEnd); 1101 cp->tx_ring[CP_TX_RING_SIZE - 1].opts1 = cpu_to_le32(RingEnd);
1102 memset(cp->tx_opts, 0, sizeof(cp->tx_opts));
1118 1103
1119 cp_init_rings_index(cp); 1104 cp_init_rings_index(cp);
1120 1105
@@ -1151,7 +1136,7 @@ static void cp_clean_rings (struct cp_private *cp)
1151 desc = cp->rx_ring + i; 1136 desc = cp->rx_ring + i;
1152 dma_unmap_single(&cp->pdev->dev,le64_to_cpu(desc->addr), 1137 dma_unmap_single(&cp->pdev->dev,le64_to_cpu(desc->addr),
1153 cp->rx_buf_sz, PCI_DMA_FROMDEVICE); 1138 cp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1154 dev_kfree_skb(cp->rx_skb[i]); 1139 dev_kfree_skb_any(cp->rx_skb[i]);
1155 } 1140 }
1156 } 1141 }
1157 1142
@@ -1164,7 +1149,7 @@ static void cp_clean_rings (struct cp_private *cp)
1164 le32_to_cpu(desc->opts1) & 0xffff, 1149 le32_to_cpu(desc->opts1) & 0xffff,
1165 PCI_DMA_TODEVICE); 1150 PCI_DMA_TODEVICE);
1166 if (le32_to_cpu(desc->opts1) & LastFrag) 1151 if (le32_to_cpu(desc->opts1) & LastFrag)
1167 dev_kfree_skb(skb); 1152 dev_kfree_skb_any(skb);
1168 cp->dev->stats.tx_dropped++; 1153 cp->dev->stats.tx_dropped++;
1169 } 1154 }
1170 } 1155 }
@@ -1172,6 +1157,7 @@ static void cp_clean_rings (struct cp_private *cp)
1172 1157
1173 memset(cp->rx_ring, 0, sizeof(struct cp_desc) * CP_RX_RING_SIZE); 1158 memset(cp->rx_ring, 0, sizeof(struct cp_desc) * CP_RX_RING_SIZE);
1174 memset(cp->tx_ring, 0, sizeof(struct cp_desc) * CP_TX_RING_SIZE); 1159 memset(cp->tx_ring, 0, sizeof(struct cp_desc) * CP_TX_RING_SIZE);
1160 memset(cp->tx_opts, 0, sizeof(cp->tx_opts));
1175 1161
1176 memset(cp->rx_skb, 0, sizeof(struct sk_buff *) * CP_RX_RING_SIZE); 1162 memset(cp->rx_skb, 0, sizeof(struct sk_buff *) * CP_RX_RING_SIZE);
1177 memset(cp->tx_skb, 0, sizeof(struct sk_buff *) * CP_TX_RING_SIZE); 1163 memset(cp->tx_skb, 0, sizeof(struct sk_buff *) * CP_TX_RING_SIZE);
@@ -1249,7 +1235,7 @@ static void cp_tx_timeout(struct net_device *dev)
1249{ 1235{
1250 struct cp_private *cp = netdev_priv(dev); 1236 struct cp_private *cp = netdev_priv(dev);
1251 unsigned long flags; 1237 unsigned long flags;
1252 int rc; 1238 int rc, i;
1253 1239
1254 netdev_warn(dev, "Transmit timeout, status %2x %4x %4x %4x\n", 1240 netdev_warn(dev, "Transmit timeout, status %2x %4x %4x %4x\n",
1255 cpr8(Cmd), cpr16(CpCmd), 1241 cpr8(Cmd), cpr16(CpCmd),
@@ -1257,13 +1243,26 @@ static void cp_tx_timeout(struct net_device *dev)
1257 1243
1258 spin_lock_irqsave(&cp->lock, flags); 1244 spin_lock_irqsave(&cp->lock, flags);
1259 1245
1246 netif_dbg(cp, tx_err, cp->dev, "TX ring head %d tail %d desc %x\n",
1247 cp->tx_head, cp->tx_tail, cpr16(TxDmaOkLowDesc));
1248 for (i = 0; i < CP_TX_RING_SIZE; i++) {
1249 netif_dbg(cp, tx_err, cp->dev,
1250 "TX slot %d @%p: %08x (%08x) %08x %llx %p\n",
1251 i, &cp->tx_ring[i], le32_to_cpu(cp->tx_ring[i].opts1),
1252 cp->tx_opts[i], le32_to_cpu(cp->tx_ring[i].opts2),
1253 le64_to_cpu(cp->tx_ring[i].addr),
1254 cp->tx_skb[i]);
1255 }
1256
1260 cp_stop_hw(cp); 1257 cp_stop_hw(cp);
1261 cp_clean_rings(cp); 1258 cp_clean_rings(cp);
1262 rc = cp_init_rings(cp); 1259 rc = cp_init_rings(cp);
1263 cp_start_hw(cp); 1260 cp_start_hw(cp);
1264 cp_enable_irq(cp); 1261 __cp_set_rx_mode(dev);
1262 cpw16_f(IntrMask, cp_norx_intr_mask);
1265 1263
1266 netif_wake_queue(dev); 1264 netif_wake_queue(dev);
1265 napi_schedule_irqoff(&cp->napi);
1267 1266
1268 spin_unlock_irqrestore(&cp->lock, flags); 1267 spin_unlock_irqrestore(&cp->lock, flags);
1269} 1268}
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 2b32e0c5a0b4..b4f21232019a 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -6081,7 +6081,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
6081{ 6081{
6082 void __iomem *ioaddr = tp->mmio_addr; 6082 void __iomem *ioaddr = tp->mmio_addr;
6083 struct pci_dev *pdev = tp->pci_dev; 6083 struct pci_dev *pdev = tp->pci_dev;
6084 u16 rg_saw_cnt; 6084 int rg_saw_cnt;
6085 u32 data; 6085 u32 data;
6086 static const struct ephy_info e_info_8168h_1[] = { 6086 static const struct ephy_info e_info_8168h_1[] = {
6087 { 0x1e, 0x0800, 0x0001 }, 6087 { 0x1e, 0x0800, 0x0001 },
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
index b735fa22ac95..ebf6abc4853f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
@@ -161,11 +161,16 @@ int stmmac_mdio_reset(struct mii_bus *bus)
161 161
162 if (!gpio_request(reset_gpio, "mdio-reset")) { 162 if (!gpio_request(reset_gpio, "mdio-reset")) {
163 gpio_direction_output(reset_gpio, active_low ? 1 : 0); 163 gpio_direction_output(reset_gpio, active_low ? 1 : 0);
164 udelay(data->delays[0]); 164 if (data->delays[0])
165 msleep(DIV_ROUND_UP(data->delays[0], 1000));
166
165 gpio_set_value(reset_gpio, active_low ? 0 : 1); 167 gpio_set_value(reset_gpio, active_low ? 0 : 1);
166 udelay(data->delays[1]); 168 if (data->delays[1])
169 msleep(DIV_ROUND_UP(data->delays[1], 1000));
170
167 gpio_set_value(reset_gpio, active_low ? 1 : 0); 171 gpio_set_value(reset_gpio, active_low ? 1 : 0);
168 udelay(data->delays[2]); 172 if (data->delays[2])
173 msleep(DIV_ROUND_UP(data->delays[2], 1000));
169 } 174 }
170 } 175 }
171#endif 176#endif
diff --git a/drivers/net/ethernet/sun/sunvnet.c b/drivers/net/ethernet/sun/sunvnet.c
index 53fe200e0b79..cc106d892e29 100644
--- a/drivers/net/ethernet/sun/sunvnet.c
+++ b/drivers/net/ethernet/sun/sunvnet.c
@@ -1756,7 +1756,8 @@ static const struct net_device_ops vnet_ops = {
1756#endif 1756#endif
1757}; 1757};
1758 1758
1759static struct vnet *vnet_new(const u64 *local_mac) 1759static struct vnet *vnet_new(const u64 *local_mac,
1760 struct vio_dev *vdev)
1760{ 1761{
1761 struct net_device *dev; 1762 struct net_device *dev;
1762 struct vnet *vp; 1763 struct vnet *vp;
@@ -1790,6 +1791,8 @@ static struct vnet *vnet_new(const u64 *local_mac)
1790 NETIF_F_HW_CSUM | NETIF_F_SG; 1791 NETIF_F_HW_CSUM | NETIF_F_SG;
1791 dev->features = dev->hw_features; 1792 dev->features = dev->hw_features;
1792 1793
1794 SET_NETDEV_DEV(dev, &vdev->dev);
1795
1793 err = register_netdev(dev); 1796 err = register_netdev(dev);
1794 if (err) { 1797 if (err) {
1795 pr_err("Cannot register net device, aborting\n"); 1798 pr_err("Cannot register net device, aborting\n");
@@ -1808,7 +1811,8 @@ err_out_free_dev:
1808 return ERR_PTR(err); 1811 return ERR_PTR(err);
1809} 1812}
1810 1813
1811static struct vnet *vnet_find_or_create(const u64 *local_mac) 1814static struct vnet *vnet_find_or_create(const u64 *local_mac,
1815 struct vio_dev *vdev)
1812{ 1816{
1813 struct vnet *iter, *vp; 1817 struct vnet *iter, *vp;
1814 1818
@@ -1821,7 +1825,7 @@ static struct vnet *vnet_find_or_create(const u64 *local_mac)
1821 } 1825 }
1822 } 1826 }
1823 if (!vp) 1827 if (!vp)
1824 vp = vnet_new(local_mac); 1828 vp = vnet_new(local_mac, vdev);
1825 mutex_unlock(&vnet_list_mutex); 1829 mutex_unlock(&vnet_list_mutex);
1826 1830
1827 return vp; 1831 return vp;
@@ -1848,7 +1852,8 @@ static void vnet_cleanup(void)
1848static const char *local_mac_prop = "local-mac-address"; 1852static const char *local_mac_prop = "local-mac-address";
1849 1853
1850static struct vnet *vnet_find_parent(struct mdesc_handle *hp, 1854static struct vnet *vnet_find_parent(struct mdesc_handle *hp,
1851 u64 port_node) 1855 u64 port_node,
1856 struct vio_dev *vdev)
1852{ 1857{
1853 const u64 *local_mac = NULL; 1858 const u64 *local_mac = NULL;
1854 u64 a; 1859 u64 a;
@@ -1869,7 +1874,7 @@ static struct vnet *vnet_find_parent(struct mdesc_handle *hp,
1869 if (!local_mac) 1874 if (!local_mac)
1870 return ERR_PTR(-ENODEV); 1875 return ERR_PTR(-ENODEV);
1871 1876
1872 return vnet_find_or_create(local_mac); 1877 return vnet_find_or_create(local_mac, vdev);
1873} 1878}
1874 1879
1875static struct ldc_channel_config vnet_ldc_cfg = { 1880static struct ldc_channel_config vnet_ldc_cfg = {
@@ -1923,7 +1928,7 @@ static int vnet_port_probe(struct vio_dev *vdev, const struct vio_device_id *id)
1923 1928
1924 hp = mdesc_grab(); 1929 hp = mdesc_grab();
1925 1930
1926 vp = vnet_find_parent(hp, vdev->mp); 1931 vp = vnet_find_parent(hp, vdev->mp, vdev);
1927 if (IS_ERR(vp)) { 1932 if (IS_ERR(vp)) {
1928 pr_err("Cannot find port parent vnet\n"); 1933 pr_err("Cannot find port parent vnet\n");
1929 err = PTR_ERR(vp); 1934 err = PTR_ERR(vp);
diff --git a/drivers/net/ethernet/ti/netcp_core.c b/drivers/net/ethernet/ti/netcp_core.c
index 1a5aca55ea9f..9f9832f0dea9 100644
--- a/drivers/net/ethernet/ti/netcp_core.c
+++ b/drivers/net/ethernet/ti/netcp_core.c
@@ -291,13 +291,6 @@ static int netcp_module_probe(struct netcp_device *netcp_device,
291 interface_list) { 291 interface_list) {
292 struct netcp_intf_modpriv *intf_modpriv; 292 struct netcp_intf_modpriv *intf_modpriv;
293 293
294 /* If interface not registered then register now */
295 if (!netcp_intf->netdev_registered)
296 ret = netcp_register_interface(netcp_intf);
297
298 if (ret)
299 return -ENODEV;
300
301 intf_modpriv = devm_kzalloc(dev, sizeof(*intf_modpriv), 294 intf_modpriv = devm_kzalloc(dev, sizeof(*intf_modpriv),
302 GFP_KERNEL); 295 GFP_KERNEL);
303 if (!intf_modpriv) 296 if (!intf_modpriv)
@@ -306,6 +299,11 @@ static int netcp_module_probe(struct netcp_device *netcp_device,
306 interface = of_parse_phandle(netcp_intf->node_interface, 299 interface = of_parse_phandle(netcp_intf->node_interface,
307 module->name, 0); 300 module->name, 0);
308 301
302 if (!interface) {
303 devm_kfree(dev, intf_modpriv);
304 continue;
305 }
306
309 intf_modpriv->netcp_priv = netcp_intf; 307 intf_modpriv->netcp_priv = netcp_intf;
310 intf_modpriv->netcp_module = module; 308 intf_modpriv->netcp_module = module;
311 list_add_tail(&intf_modpriv->intf_list, 309 list_add_tail(&intf_modpriv->intf_list,
@@ -323,6 +321,18 @@ static int netcp_module_probe(struct netcp_device *netcp_device,
323 continue; 321 continue;
324 } 322 }
325 } 323 }
324
325 /* Now register the interface with netdev */
326 list_for_each_entry(netcp_intf,
327 &netcp_device->interface_head,
328 interface_list) {
329 /* If interface not registered then register now */
330 if (!netcp_intf->netdev_registered) {
331 ret = netcp_register_interface(netcp_intf);
332 if (ret)
333 return -ENODEV;
334 }
335 }
326 return 0; 336 return 0;
327} 337}
328 338
@@ -357,7 +367,6 @@ int netcp_register_module(struct netcp_module *module)
357 if (ret < 0) 367 if (ret < 0)
358 goto fail; 368 goto fail;
359 } 369 }
360
361 mutex_unlock(&netcp_modules_lock); 370 mutex_unlock(&netcp_modules_lock);
362 return 0; 371 return 0;
363 372
@@ -796,7 +805,7 @@ static void netcp_rxpool_free(struct netcp_intf *netcp)
796 netcp->rx_pool = NULL; 805 netcp->rx_pool = NULL;
797} 806}
798 807
799static void netcp_allocate_rx_buf(struct netcp_intf *netcp, int fdq) 808static int netcp_allocate_rx_buf(struct netcp_intf *netcp, int fdq)
800{ 809{
801 struct knav_dma_desc *hwdesc; 810 struct knav_dma_desc *hwdesc;
802 unsigned int buf_len, dma_sz; 811 unsigned int buf_len, dma_sz;
@@ -810,7 +819,7 @@ static void netcp_allocate_rx_buf(struct netcp_intf *netcp, int fdq)
810 hwdesc = knav_pool_desc_get(netcp->rx_pool); 819 hwdesc = knav_pool_desc_get(netcp->rx_pool);
811 if (IS_ERR_OR_NULL(hwdesc)) { 820 if (IS_ERR_OR_NULL(hwdesc)) {
812 dev_dbg(netcp->ndev_dev, "out of rx pool desc\n"); 821 dev_dbg(netcp->ndev_dev, "out of rx pool desc\n");
813 return; 822 return -ENOMEM;
814 } 823 }
815 824
816 if (likely(fdq == 0)) { 825 if (likely(fdq == 0)) {
@@ -862,25 +871,26 @@ static void netcp_allocate_rx_buf(struct netcp_intf *netcp, int fdq)
862 knav_pool_desc_map(netcp->rx_pool, hwdesc, sizeof(*hwdesc), &dma, 871 knav_pool_desc_map(netcp->rx_pool, hwdesc, sizeof(*hwdesc), &dma,
863 &dma_sz); 872 &dma_sz);
864 knav_queue_push(netcp->rx_fdq[fdq], dma, sizeof(*hwdesc), 0); 873 knav_queue_push(netcp->rx_fdq[fdq], dma, sizeof(*hwdesc), 0);
865 return; 874 return 0;
866 875
867fail: 876fail:
868 knav_pool_desc_put(netcp->rx_pool, hwdesc); 877 knav_pool_desc_put(netcp->rx_pool, hwdesc);
878 return -ENOMEM;
869} 879}
870 880
871/* Refill Rx FDQ with descriptors & attached buffers */ 881/* Refill Rx FDQ with descriptors & attached buffers */
872static void netcp_rxpool_refill(struct netcp_intf *netcp) 882static void netcp_rxpool_refill(struct netcp_intf *netcp)
873{ 883{
874 u32 fdq_deficit[KNAV_DMA_FDQ_PER_CHAN] = {0}; 884 u32 fdq_deficit[KNAV_DMA_FDQ_PER_CHAN] = {0};
875 int i; 885 int i, ret = 0;
876 886
877 /* Calculate the FDQ deficit and refill */ 887 /* Calculate the FDQ deficit and refill */
878 for (i = 0; i < KNAV_DMA_FDQ_PER_CHAN && netcp->rx_fdq[i]; i++) { 888 for (i = 0; i < KNAV_DMA_FDQ_PER_CHAN && netcp->rx_fdq[i]; i++) {
879 fdq_deficit[i] = netcp->rx_queue_depths[i] - 889 fdq_deficit[i] = netcp->rx_queue_depths[i] -
880 knav_queue_get_count(netcp->rx_fdq[i]); 890 knav_queue_get_count(netcp->rx_fdq[i]);
881 891
882 while (fdq_deficit[i]--) 892 while (fdq_deficit[i]-- && !ret)
883 netcp_allocate_rx_buf(netcp, i); 893 ret = netcp_allocate_rx_buf(netcp, i);
884 } /* end for fdqs */ 894 } /* end for fdqs */
885} 895}
886 896
@@ -893,12 +903,12 @@ static int netcp_rx_poll(struct napi_struct *napi, int budget)
893 903
894 packets = netcp_process_rx_packets(netcp, budget); 904 packets = netcp_process_rx_packets(netcp, budget);
895 905
906 netcp_rxpool_refill(netcp);
896 if (packets < budget) { 907 if (packets < budget) {
897 napi_complete(&netcp->rx_napi); 908 napi_complete(&netcp->rx_napi);
898 knav_queue_enable_notify(netcp->rx_queue); 909 knav_queue_enable_notify(netcp->rx_queue);
899 } 910 }
900 911
901 netcp_rxpool_refill(netcp);
902 return packets; 912 return packets;
903} 913}
904 914
@@ -1384,7 +1394,6 @@ static void netcp_addr_sweep_del(struct netcp_intf *netcp)
1384 continue; 1394 continue;
1385 dev_dbg(netcp->ndev_dev, "deleting address %pM, type %x\n", 1395 dev_dbg(netcp->ndev_dev, "deleting address %pM, type %x\n",
1386 naddr->addr, naddr->type); 1396 naddr->addr, naddr->type);
1387 mutex_lock(&netcp_modules_lock);
1388 for_each_module(netcp, priv) { 1397 for_each_module(netcp, priv) {
1389 module = priv->netcp_module; 1398 module = priv->netcp_module;
1390 if (!module->del_addr) 1399 if (!module->del_addr)
@@ -1393,7 +1402,6 @@ static void netcp_addr_sweep_del(struct netcp_intf *netcp)
1393 naddr); 1402 naddr);
1394 WARN_ON(error); 1403 WARN_ON(error);
1395 } 1404 }
1396 mutex_unlock(&netcp_modules_lock);
1397 netcp_addr_del(netcp, naddr); 1405 netcp_addr_del(netcp, naddr);
1398 } 1406 }
1399} 1407}
@@ -1410,7 +1418,7 @@ static void netcp_addr_sweep_add(struct netcp_intf *netcp)
1410 continue; 1418 continue;
1411 dev_dbg(netcp->ndev_dev, "adding address %pM, type %x\n", 1419 dev_dbg(netcp->ndev_dev, "adding address %pM, type %x\n",
1412 naddr->addr, naddr->type); 1420 naddr->addr, naddr->type);
1413 mutex_lock(&netcp_modules_lock); 1421
1414 for_each_module(netcp, priv) { 1422 for_each_module(netcp, priv) {
1415 module = priv->netcp_module; 1423 module = priv->netcp_module;
1416 if (!module->add_addr) 1424 if (!module->add_addr)
@@ -1418,7 +1426,6 @@ static void netcp_addr_sweep_add(struct netcp_intf *netcp)
1418 error = module->add_addr(priv->module_priv, naddr); 1426 error = module->add_addr(priv->module_priv, naddr);
1419 WARN_ON(error); 1427 WARN_ON(error);
1420 } 1428 }
1421 mutex_unlock(&netcp_modules_lock);
1422 } 1429 }
1423} 1430}
1424 1431
@@ -1432,6 +1439,7 @@ static void netcp_set_rx_mode(struct net_device *ndev)
1432 ndev->flags & IFF_ALLMULTI || 1439 ndev->flags & IFF_ALLMULTI ||
1433 netdev_mc_count(ndev) > NETCP_MAX_MCAST_ADDR); 1440 netdev_mc_count(ndev) > NETCP_MAX_MCAST_ADDR);
1434 1441
1442 spin_lock(&netcp->lock);
1435 /* first clear all marks */ 1443 /* first clear all marks */
1436 netcp_addr_clear_mark(netcp); 1444 netcp_addr_clear_mark(netcp);
1437 1445
@@ -1450,6 +1458,7 @@ static void netcp_set_rx_mode(struct net_device *ndev)
1450 /* finally sweep and callout into modules */ 1458 /* finally sweep and callout into modules */
1451 netcp_addr_sweep_del(netcp); 1459 netcp_addr_sweep_del(netcp);
1452 netcp_addr_sweep_add(netcp); 1460 netcp_addr_sweep_add(netcp);
1461 spin_unlock(&netcp->lock);
1453} 1462}
1454 1463
1455static void netcp_free_navigator_resources(struct netcp_intf *netcp) 1464static void netcp_free_navigator_resources(struct netcp_intf *netcp)
@@ -1614,7 +1623,6 @@ static int netcp_ndo_open(struct net_device *ndev)
1614 goto fail; 1623 goto fail;
1615 } 1624 }
1616 1625
1617 mutex_lock(&netcp_modules_lock);
1618 for_each_module(netcp, intf_modpriv) { 1626 for_each_module(netcp, intf_modpriv) {
1619 module = intf_modpriv->netcp_module; 1627 module = intf_modpriv->netcp_module;
1620 if (module->open) { 1628 if (module->open) {
@@ -1625,7 +1633,6 @@ static int netcp_ndo_open(struct net_device *ndev)
1625 } 1633 }
1626 } 1634 }
1627 } 1635 }
1628 mutex_unlock(&netcp_modules_lock);
1629 1636
1630 napi_enable(&netcp->rx_napi); 1637 napi_enable(&netcp->rx_napi);
1631 napi_enable(&netcp->tx_napi); 1638 napi_enable(&netcp->tx_napi);
@@ -1642,7 +1649,6 @@ fail_open:
1642 if (module->close) 1649 if (module->close)
1643 module->close(intf_modpriv->module_priv, ndev); 1650 module->close(intf_modpriv->module_priv, ndev);
1644 } 1651 }
1645 mutex_unlock(&netcp_modules_lock);
1646 1652
1647fail: 1653fail:
1648 netcp_free_navigator_resources(netcp); 1654 netcp_free_navigator_resources(netcp);
@@ -1666,7 +1672,6 @@ static int netcp_ndo_stop(struct net_device *ndev)
1666 napi_disable(&netcp->rx_napi); 1672 napi_disable(&netcp->rx_napi);
1667 napi_disable(&netcp->tx_napi); 1673 napi_disable(&netcp->tx_napi);
1668 1674
1669 mutex_lock(&netcp_modules_lock);
1670 for_each_module(netcp, intf_modpriv) { 1675 for_each_module(netcp, intf_modpriv) {
1671 module = intf_modpriv->netcp_module; 1676 module = intf_modpriv->netcp_module;
1672 if (module->close) { 1677 if (module->close) {
@@ -1675,7 +1680,6 @@ static int netcp_ndo_stop(struct net_device *ndev)
1675 dev_err(netcp->ndev_dev, "Close failed\n"); 1680 dev_err(netcp->ndev_dev, "Close failed\n");
1676 } 1681 }
1677 } 1682 }
1678 mutex_unlock(&netcp_modules_lock);
1679 1683
1680 /* Recycle Rx descriptors from completion queue */ 1684 /* Recycle Rx descriptors from completion queue */
1681 netcp_empty_rx_queue(netcp); 1685 netcp_empty_rx_queue(netcp);
@@ -1703,7 +1707,6 @@ static int netcp_ndo_ioctl(struct net_device *ndev,
1703 if (!netif_running(ndev)) 1707 if (!netif_running(ndev))
1704 return -EINVAL; 1708 return -EINVAL;
1705 1709
1706 mutex_lock(&netcp_modules_lock);
1707 for_each_module(netcp, intf_modpriv) { 1710 for_each_module(netcp, intf_modpriv) {
1708 module = intf_modpriv->netcp_module; 1711 module = intf_modpriv->netcp_module;
1709 if (!module->ioctl) 1712 if (!module->ioctl)
@@ -1719,7 +1722,6 @@ static int netcp_ndo_ioctl(struct net_device *ndev,
1719 } 1722 }
1720 1723
1721out: 1724out:
1722 mutex_unlock(&netcp_modules_lock);
1723 return (ret == 0) ? 0 : err; 1725 return (ret == 0) ? 0 : err;
1724} 1726}
1725 1727
@@ -1754,11 +1756,12 @@ static int netcp_rx_add_vid(struct net_device *ndev, __be16 proto, u16 vid)
1754 struct netcp_intf *netcp = netdev_priv(ndev); 1756 struct netcp_intf *netcp = netdev_priv(ndev);
1755 struct netcp_intf_modpriv *intf_modpriv; 1757 struct netcp_intf_modpriv *intf_modpriv;
1756 struct netcp_module *module; 1758 struct netcp_module *module;
1759 unsigned long flags;
1757 int err = 0; 1760 int err = 0;
1758 1761
1759 dev_dbg(netcp->ndev_dev, "adding rx vlan id: %d\n", vid); 1762 dev_dbg(netcp->ndev_dev, "adding rx vlan id: %d\n", vid);
1760 1763
1761 mutex_lock(&netcp_modules_lock); 1764 spin_lock_irqsave(&netcp->lock, flags);
1762 for_each_module(netcp, intf_modpriv) { 1765 for_each_module(netcp, intf_modpriv) {
1763 module = intf_modpriv->netcp_module; 1766 module = intf_modpriv->netcp_module;
1764 if ((module->add_vid) && (vid != 0)) { 1767 if ((module->add_vid) && (vid != 0)) {
@@ -1770,7 +1773,8 @@ static int netcp_rx_add_vid(struct net_device *ndev, __be16 proto, u16 vid)
1770 } 1773 }
1771 } 1774 }
1772 } 1775 }
1773 mutex_unlock(&netcp_modules_lock); 1776 spin_unlock_irqrestore(&netcp->lock, flags);
1777
1774 return err; 1778 return err;
1775} 1779}
1776 1780
@@ -1779,11 +1783,12 @@ static int netcp_rx_kill_vid(struct net_device *ndev, __be16 proto, u16 vid)
1779 struct netcp_intf *netcp = netdev_priv(ndev); 1783 struct netcp_intf *netcp = netdev_priv(ndev);
1780 struct netcp_intf_modpriv *intf_modpriv; 1784 struct netcp_intf_modpriv *intf_modpriv;
1781 struct netcp_module *module; 1785 struct netcp_module *module;
1786 unsigned long flags;
1782 int err = 0; 1787 int err = 0;
1783 1788
1784 dev_dbg(netcp->ndev_dev, "removing rx vlan id: %d\n", vid); 1789 dev_dbg(netcp->ndev_dev, "removing rx vlan id: %d\n", vid);
1785 1790
1786 mutex_lock(&netcp_modules_lock); 1791 spin_lock_irqsave(&netcp->lock, flags);
1787 for_each_module(netcp, intf_modpriv) { 1792 for_each_module(netcp, intf_modpriv) {
1788 module = intf_modpriv->netcp_module; 1793 module = intf_modpriv->netcp_module;
1789 if (module->del_vid) { 1794 if (module->del_vid) {
@@ -1795,7 +1800,7 @@ static int netcp_rx_kill_vid(struct net_device *ndev, __be16 proto, u16 vid)
1795 } 1800 }
1796 } 1801 }
1797 } 1802 }
1798 mutex_unlock(&netcp_modules_lock); 1803 spin_unlock_irqrestore(&netcp->lock, flags);
1799 return err; 1804 return err;
1800} 1805}
1801 1806
@@ -2040,7 +2045,6 @@ static int netcp_probe(struct platform_device *pdev)
2040 struct device_node *child, *interfaces; 2045 struct device_node *child, *interfaces;
2041 struct netcp_device *netcp_device; 2046 struct netcp_device *netcp_device;
2042 struct device *dev = &pdev->dev; 2047 struct device *dev = &pdev->dev;
2043 struct netcp_module *module;
2044 int ret; 2048 int ret;
2045 2049
2046 if (!node) { 2050 if (!node) {
@@ -2087,14 +2091,6 @@ static int netcp_probe(struct platform_device *pdev)
2087 /* Add the device instance to the list */ 2091 /* Add the device instance to the list */
2088 list_add_tail(&netcp_device->device_list, &netcp_devices); 2092 list_add_tail(&netcp_device->device_list, &netcp_devices);
2089 2093
2090 /* Probe & attach any modules already registered */
2091 mutex_lock(&netcp_modules_lock);
2092 for_each_netcp_module(module) {
2093 ret = netcp_module_probe(netcp_device, module);
2094 if (ret < 0)
2095 dev_err(dev, "module(%s) probe failed\n", module->name);
2096 }
2097 mutex_unlock(&netcp_modules_lock);
2098 return 0; 2094 return 0;
2099 2095
2100probe_quit_interface: 2096probe_quit_interface:
diff --git a/drivers/net/ethernet/ti/netcp_ethss.c b/drivers/net/ethernet/ti/netcp_ethss.c
index 6f16d6aaf7b7..6bff8d82ceab 100644
--- a/drivers/net/ethernet/ti/netcp_ethss.c
+++ b/drivers/net/ethernet/ti/netcp_ethss.c
@@ -77,6 +77,7 @@
77#define GBENU_ALE_OFFSET 0x1e000 77#define GBENU_ALE_OFFSET 0x1e000
78#define GBENU_HOST_PORT_NUM 0 78#define GBENU_HOST_PORT_NUM 0
79#define GBENU_NUM_ALE_ENTRIES 1024 79#define GBENU_NUM_ALE_ENTRIES 1024
80#define GBENU_SGMII_MODULE_SIZE 0x100
80 81
81/* 10G Ethernet SS defines */ 82/* 10G Ethernet SS defines */
82#define XGBE_MODULE_NAME "netcp-xgbe" 83#define XGBE_MODULE_NAME "netcp-xgbe"
@@ -149,8 +150,8 @@
149#define XGBE_STATS2_MODULE 2 150#define XGBE_STATS2_MODULE 2
150 151
151/* s: 0-based slave_port */ 152/* s: 0-based slave_port */
152#define SGMII_BASE(s) \ 153#define SGMII_BASE(d, s) \
153 (((s) < 2) ? gbe_dev->sgmii_port_regs : gbe_dev->sgmii_port34_regs) 154 (((s) < 2) ? (d)->sgmii_port_regs : (d)->sgmii_port34_regs)
154 155
155#define GBE_TX_QUEUE 648 156#define GBE_TX_QUEUE 648
156#define GBE_TXHOOK_ORDER 0 157#define GBE_TXHOOK_ORDER 0
@@ -1997,13 +1998,8 @@ static void netcp_ethss_update_link_state(struct gbe_priv *gbe_dev,
1997 return; 1998 return;
1998 1999
1999 if (!SLAVE_LINK_IS_XGMII(slave)) { 2000 if (!SLAVE_LINK_IS_XGMII(slave)) {
2000 if (gbe_dev->ss_version == GBE_SS_VERSION_14) 2001 sgmii_link_state =
2001 sgmii_link_state = 2002 netcp_sgmii_get_port_link(SGMII_BASE(gbe_dev, sp), sp);
2002 netcp_sgmii_get_port_link(SGMII_BASE(sp), sp);
2003 else
2004 sgmii_link_state =
2005 netcp_sgmii_get_port_link(
2006 gbe_dev->sgmii_port_regs, sp);
2007 } 2003 }
2008 2004
2009 phy_link_state = gbe_phy_link_status(slave); 2005 phy_link_state = gbe_phy_link_status(slave);
@@ -2100,17 +2096,11 @@ static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
2100static void gbe_sgmii_rtreset(struct gbe_priv *priv, 2096static void gbe_sgmii_rtreset(struct gbe_priv *priv,
2101 struct gbe_slave *slave, bool set) 2097 struct gbe_slave *slave, bool set)
2102{ 2098{
2103 void __iomem *sgmii_port_regs;
2104
2105 if (SLAVE_LINK_IS_XGMII(slave)) 2099 if (SLAVE_LINK_IS_XGMII(slave))
2106 return; 2100 return;
2107 2101
2108 if ((priv->ss_version == GBE_SS_VERSION_14) && (slave->slave_num >= 2)) 2102 netcp_sgmii_rtreset(SGMII_BASE(priv, slave->slave_num),
2109 sgmii_port_regs = priv->sgmii_port34_regs; 2103 slave->slave_num, set);
2110 else
2111 sgmii_port_regs = priv->sgmii_port_regs;
2112
2113 netcp_sgmii_rtreset(sgmii_port_regs, slave->slave_num, set);
2114} 2104}
2115 2105
2116static void gbe_slave_stop(struct gbe_intf *intf) 2106static void gbe_slave_stop(struct gbe_intf *intf)
@@ -2136,17 +2126,12 @@ static void gbe_slave_stop(struct gbe_intf *intf)
2136 2126
2137static void gbe_sgmii_config(struct gbe_priv *priv, struct gbe_slave *slave) 2127static void gbe_sgmii_config(struct gbe_priv *priv, struct gbe_slave *slave)
2138{ 2128{
2139 void __iomem *sgmii_port_regs; 2129 if (SLAVE_LINK_IS_XGMII(slave))
2140 2130 return;
2141 sgmii_port_regs = priv->sgmii_port_regs;
2142 if ((priv->ss_version == GBE_SS_VERSION_14) && (slave->slave_num >= 2))
2143 sgmii_port_regs = priv->sgmii_port34_regs;
2144 2131
2145 if (!SLAVE_LINK_IS_XGMII(slave)) { 2132 netcp_sgmii_reset(SGMII_BASE(priv, slave->slave_num), slave->slave_num);
2146 netcp_sgmii_reset(sgmii_port_regs, slave->slave_num); 2133 netcp_sgmii_config(SGMII_BASE(priv, slave->slave_num), slave->slave_num,
2147 netcp_sgmii_config(sgmii_port_regs, slave->slave_num, 2134 slave->link_interface);
2148 slave->link_interface);
2149 }
2150} 2135}
2151 2136
2152static int gbe_slave_open(struct gbe_intf *gbe_intf) 2137static int gbe_slave_open(struct gbe_intf *gbe_intf)
@@ -2997,6 +2982,14 @@ static int set_gbenu_ethss_priv(struct gbe_priv *gbe_dev,
2997 gbe_dev->switch_regs = regs; 2982 gbe_dev->switch_regs = regs;
2998 2983
2999 gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBENU_SGMII_MODULE_OFFSET; 2984 gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBENU_SGMII_MODULE_OFFSET;
2985
2986 /* Although sgmii modules are mem mapped to one contiguous
2987 * region on GBENU devices, setting sgmii_port34_regs allows
2988 * consistent code when accessing sgmii api
2989 */
2990 gbe_dev->sgmii_port34_regs = gbe_dev->sgmii_port_regs +
2991 (2 * GBENU_SGMII_MODULE_SIZE);
2992
3000 gbe_dev->host_port_regs = gbe_dev->switch_regs + GBENU_HOST_PORT_OFFSET; 2993 gbe_dev->host_port_regs = gbe_dev->switch_regs + GBENU_HOST_PORT_OFFSET;
3001 2994
3002 for (i = 0; i < (gbe_dev->max_num_ports); i++) 2995 for (i = 0; i < (gbe_dev->max_num_ports); i++)
diff --git a/drivers/net/ethernet/via/Kconfig b/drivers/net/ethernet/via/Kconfig
index 2f1264b882b9..d3d094742a7e 100644
--- a/drivers/net/ethernet/via/Kconfig
+++ b/drivers/net/ethernet/via/Kconfig
@@ -17,7 +17,7 @@ if NET_VENDOR_VIA
17 17
18config VIA_RHINE 18config VIA_RHINE
19 tristate "VIA Rhine support" 19 tristate "VIA Rhine support"
20 depends on (PCI || OF_IRQ) 20 depends on PCI || (OF_IRQ && GENERIC_PCI_IOMAP)
21 depends on HAS_DMA 21 depends on HAS_DMA
22 select CRC32 22 select CRC32
23 select MII 23 select MII
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index 6008eee01a33..cf468c87ce57 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -828,6 +828,8 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
828 if (!phydev) 828 if (!phydev)
829 dev_info(dev, 829 dev_info(dev,
830 "MDIO of the phy is not registered yet\n"); 830 "MDIO of the phy is not registered yet\n");
831 else
832 put_device(&phydev->dev);
831 return 0; 833 return 0;
832 } 834 }
833 835
diff --git a/drivers/net/fjes/fjes_hw.c b/drivers/net/fjes/fjes_hw.c
index b5f4a78da828..2d3848c9dc35 100644
--- a/drivers/net/fjes/fjes_hw.c
+++ b/drivers/net/fjes/fjes_hw.c
@@ -1011,11 +1011,11 @@ static void fjes_hw_update_zone_task(struct work_struct *work)
1011 set_bit(epidx, &irq_bit); 1011 set_bit(epidx, &irq_bit);
1012 break; 1012 break;
1013 } 1013 }
1014 }
1015
1016 hw->ep_shm_info[epidx].es_status = info[epidx].es_status;
1017 hw->ep_shm_info[epidx].zone = info[epidx].zone;
1018 1014
1015 hw->ep_shm_info[epidx].es_status =
1016 info[epidx].es_status;
1017 hw->ep_shm_info[epidx].zone = info[epidx].zone;
1018 }
1019 break; 1019 break;
1020 } 1020 }
1021 1021
diff --git a/drivers/net/geneve.c b/drivers/net/geneve.c
index da3259ce7c8d..8f5c02eed47d 100644
--- a/drivers/net/geneve.c
+++ b/drivers/net/geneve.c
@@ -126,6 +126,8 @@ static void geneve_rx(struct geneve_sock *gs, struct sk_buff *skb)
126 __be32 addr; 126 __be32 addr;
127 int err; 127 int err;
128 128
129 iph = ip_hdr(skb); /* outer IP header... */
130
129 if (gs->collect_md) { 131 if (gs->collect_md) {
130 static u8 zero_vni[3]; 132 static u8 zero_vni[3];
131 133
@@ -133,7 +135,6 @@ static void geneve_rx(struct geneve_sock *gs, struct sk_buff *skb)
133 addr = 0; 135 addr = 0;
134 } else { 136 } else {
135 vni = gnvh->vni; 137 vni = gnvh->vni;
136 iph = ip_hdr(skb); /* Still outer IP header... */
137 addr = iph->saddr; 138 addr = iph->saddr;
138 } 139 }
139 140
@@ -178,7 +179,6 @@ static void geneve_rx(struct geneve_sock *gs, struct sk_buff *skb)
178 179
179 skb_reset_network_header(skb); 180 skb_reset_network_header(skb);
180 181
181 iph = ip_hdr(skb); /* Now inner IP header... */
182 err = IP_ECN_decapsulate(iph, skb); 182 err = IP_ECN_decapsulate(iph, skb);
183 183
184 if (unlikely(err)) { 184 if (unlikely(err)) {
@@ -626,6 +626,7 @@ static netdev_tx_t geneve_xmit(struct sk_buff *skb, struct net_device *dev)
626 struct geneve_sock *gs = geneve->sock; 626 struct geneve_sock *gs = geneve->sock;
627 struct ip_tunnel_info *info = NULL; 627 struct ip_tunnel_info *info = NULL;
628 struct rtable *rt = NULL; 628 struct rtable *rt = NULL;
629 const struct iphdr *iip; /* interior IP header */
629 struct flowi4 fl4; 630 struct flowi4 fl4;
630 __u8 tos, ttl; 631 __u8 tos, ttl;
631 __be16 sport; 632 __be16 sport;
@@ -653,6 +654,8 @@ static netdev_tx_t geneve_xmit(struct sk_buff *skb, struct net_device *dev)
653 sport = udp_flow_src_port(geneve->net, skb, 1, USHRT_MAX, true); 654 sport = udp_flow_src_port(geneve->net, skb, 1, USHRT_MAX, true);
654 skb_reset_mac_header(skb); 655 skb_reset_mac_header(skb);
655 656
657 iip = ip_hdr(skb);
658
656 if (info) { 659 if (info) {
657 const struct ip_tunnel_key *key = &info->key; 660 const struct ip_tunnel_key *key = &info->key;
658 u8 *opts = NULL; 661 u8 *opts = NULL;
@@ -668,19 +671,16 @@ static netdev_tx_t geneve_xmit(struct sk_buff *skb, struct net_device *dev)
668 if (unlikely(err)) 671 if (unlikely(err))
669 goto err; 672 goto err;
670 673
671 tos = key->tos; 674 tos = ip_tunnel_ecn_encap(key->tos, iip, skb);
672 ttl = key->ttl; 675 ttl = key->ttl;
673 df = key->tun_flags & TUNNEL_DONT_FRAGMENT ? htons(IP_DF) : 0; 676 df = key->tun_flags & TUNNEL_DONT_FRAGMENT ? htons(IP_DF) : 0;
674 } else { 677 } else {
675 const struct iphdr *iip; /* interior IP header */
676
677 udp_csum = false; 678 udp_csum = false;
678 err = geneve_build_skb(rt, skb, 0, geneve->vni, 679 err = geneve_build_skb(rt, skb, 0, geneve->vni,
679 0, NULL, udp_csum); 680 0, NULL, udp_csum);
680 if (unlikely(err)) 681 if (unlikely(err))
681 goto err; 682 goto err;
682 683
683 iip = ip_hdr(skb);
684 tos = ip_tunnel_ecn_encap(fl4.flowi4_tos, iip, skb); 684 tos = ip_tunnel_ecn_encap(fl4.flowi4_tos, iip, skb);
685 ttl = geneve->ttl; 685 ttl = geneve->ttl;
686 if (!ttl && IN_MULTICAST(ntohl(fl4.daddr))) 686 if (!ttl && IN_MULTICAST(ntohl(fl4.daddr)))
@@ -748,12 +748,8 @@ static void geneve_setup(struct net_device *dev)
748 dev->features |= NETIF_F_RXCSUM; 748 dev->features |= NETIF_F_RXCSUM;
749 dev->features |= NETIF_F_GSO_SOFTWARE; 749 dev->features |= NETIF_F_GSO_SOFTWARE;
750 750
751 dev->vlan_features = dev->features;
752 dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_STAG_TX;
753
754 dev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 751 dev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
755 dev->hw_features |= NETIF_F_GSO_SOFTWARE; 752 dev->hw_features |= NETIF_F_GSO_SOFTWARE;
756 dev->hw_features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_STAG_TX;
757 753
758 netif_keep_dst(dev); 754 netif_keep_dst(dev);
759 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE | IFF_NO_QUEUE; 755 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE | IFF_NO_QUEUE;
@@ -819,7 +815,7 @@ static struct geneve_dev *geneve_find_dev(struct geneve_net *gn,
819 815
820static int geneve_configure(struct net *net, struct net_device *dev, 816static int geneve_configure(struct net *net, struct net_device *dev,
821 __be32 rem_addr, __u32 vni, __u8 ttl, __u8 tos, 817 __be32 rem_addr, __u32 vni, __u8 ttl, __u8 tos,
822 __u16 dst_port, bool metadata) 818 __be16 dst_port, bool metadata)
823{ 819{
824 struct geneve_net *gn = net_generic(net, geneve_net_id); 820 struct geneve_net *gn = net_generic(net, geneve_net_id);
825 struct geneve_dev *t, *geneve = netdev_priv(dev); 821 struct geneve_dev *t, *geneve = netdev_priv(dev);
@@ -844,10 +840,10 @@ static int geneve_configure(struct net *net, struct net_device *dev,
844 840
845 geneve->ttl = ttl; 841 geneve->ttl = ttl;
846 geneve->tos = tos; 842 geneve->tos = tos;
847 geneve->dst_port = htons(dst_port); 843 geneve->dst_port = dst_port;
848 geneve->collect_md = metadata; 844 geneve->collect_md = metadata;
849 845
850 t = geneve_find_dev(gn, htons(dst_port), rem_addr, geneve->vni, 846 t = geneve_find_dev(gn, dst_port, rem_addr, geneve->vni,
851 &tun_on_same_port, &tun_collect_md); 847 &tun_on_same_port, &tun_collect_md);
852 if (t) 848 if (t)
853 return -EBUSY; 849 return -EBUSY;
@@ -871,7 +867,7 @@ static int geneve_configure(struct net *net, struct net_device *dev,
871static int geneve_newlink(struct net *net, struct net_device *dev, 867static int geneve_newlink(struct net *net, struct net_device *dev,
872 struct nlattr *tb[], struct nlattr *data[]) 868 struct nlattr *tb[], struct nlattr *data[])
873{ 869{
874 __u16 dst_port = GENEVE_UDP_PORT; 870 __be16 dst_port = htons(GENEVE_UDP_PORT);
875 __u8 ttl = 0, tos = 0; 871 __u8 ttl = 0, tos = 0;
876 bool metadata = false; 872 bool metadata = false;
877 __be32 rem_addr; 873 __be32 rem_addr;
@@ -890,7 +886,7 @@ static int geneve_newlink(struct net *net, struct net_device *dev,
890 tos = nla_get_u8(data[IFLA_GENEVE_TOS]); 886 tos = nla_get_u8(data[IFLA_GENEVE_TOS]);
891 887
892 if (data[IFLA_GENEVE_PORT]) 888 if (data[IFLA_GENEVE_PORT])
893 dst_port = nla_get_u16(data[IFLA_GENEVE_PORT]); 889 dst_port = nla_get_be16(data[IFLA_GENEVE_PORT]);
894 890
895 if (data[IFLA_GENEVE_COLLECT_METADATA]) 891 if (data[IFLA_GENEVE_COLLECT_METADATA])
896 metadata = true; 892 metadata = true;
@@ -913,7 +909,7 @@ static size_t geneve_get_size(const struct net_device *dev)
913 nla_total_size(sizeof(struct in_addr)) + /* IFLA_GENEVE_REMOTE */ 909 nla_total_size(sizeof(struct in_addr)) + /* IFLA_GENEVE_REMOTE */
914 nla_total_size(sizeof(__u8)) + /* IFLA_GENEVE_TTL */ 910 nla_total_size(sizeof(__u8)) + /* IFLA_GENEVE_TTL */
915 nla_total_size(sizeof(__u8)) + /* IFLA_GENEVE_TOS */ 911 nla_total_size(sizeof(__u8)) + /* IFLA_GENEVE_TOS */
916 nla_total_size(sizeof(__u16)) + /* IFLA_GENEVE_PORT */ 912 nla_total_size(sizeof(__be16)) + /* IFLA_GENEVE_PORT */
917 nla_total_size(0) + /* IFLA_GENEVE_COLLECT_METADATA */ 913 nla_total_size(0) + /* IFLA_GENEVE_COLLECT_METADATA */
918 0; 914 0;
919} 915}
@@ -935,7 +931,7 @@ static int geneve_fill_info(struct sk_buff *skb, const struct net_device *dev)
935 nla_put_u8(skb, IFLA_GENEVE_TOS, geneve->tos)) 931 nla_put_u8(skb, IFLA_GENEVE_TOS, geneve->tos))
936 goto nla_put_failure; 932 goto nla_put_failure;
937 933
938 if (nla_put_u16(skb, IFLA_GENEVE_PORT, ntohs(geneve->dst_port))) 934 if (nla_put_be16(skb, IFLA_GENEVE_PORT, geneve->dst_port))
939 goto nla_put_failure; 935 goto nla_put_failure;
940 936
941 if (geneve->collect_md) { 937 if (geneve->collect_md) {
@@ -975,7 +971,7 @@ struct net_device *geneve_dev_create_fb(struct net *net, const char *name,
975 if (IS_ERR(dev)) 971 if (IS_ERR(dev))
976 return dev; 972 return dev;
977 973
978 err = geneve_configure(net, dev, 0, 0, 0, 0, dst_port, true); 974 err = geneve_configure(net, dev, 0, 0, 0, 0, htons(dst_port), true);
979 if (err) { 975 if (err) {
980 free_netdev(dev); 976 free_netdev(dev);
981 return ERR_PTR(err); 977 return ERR_PTR(err);
diff --git a/drivers/net/irda/ali-ircc.c b/drivers/net/irda/ali-ircc.c
index 58ae11a14bb6..64bb44d5d867 100644
--- a/drivers/net/irda/ali-ircc.c
+++ b/drivers/net/irda/ali-ircc.c
@@ -1031,7 +1031,6 @@ static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud)
1031static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed) 1031static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed)
1032{ 1032{
1033 struct ali_ircc_cb *self = priv; 1033 struct ali_ircc_cb *self = priv;
1034 unsigned long flags;
1035 int iobase; 1034 int iobase;
1036 int fcr; /* FIFO control reg */ 1035 int fcr; /* FIFO control reg */
1037 int lcr; /* Line control reg */ 1036 int lcr; /* Line control reg */
@@ -1061,8 +1060,6 @@ static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed)
1061 /* Update accounting for new speed */ 1060 /* Update accounting for new speed */
1062 self->io.speed = speed; 1061 self->io.speed = speed;
1063 1062
1064 spin_lock_irqsave(&self->lock, flags);
1065
1066 divisor = 115200/speed; 1063 divisor = 115200/speed;
1067 1064
1068 fcr = UART_FCR_ENABLE_FIFO; 1065 fcr = UART_FCR_ENABLE_FIFO;
@@ -1089,9 +1086,6 @@ static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed)
1089 /* without this, the connection will be broken after come back from FIR speed, 1086 /* without this, the connection will be broken after come back from FIR speed,
1090 but with this, the SIR connection is harder to established */ 1087 but with this, the SIR connection is harder to established */
1091 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR); 1088 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR);
1092
1093 spin_unlock_irqrestore(&self->lock, flags);
1094
1095} 1089}
1096 1090
1097static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed) 1091static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed)
diff --git a/drivers/net/macvtap.c b/drivers/net/macvtap.c
index edd77342773a..248478c6f6e4 100644
--- a/drivers/net/macvtap.c
+++ b/drivers/net/macvtap.c
@@ -1111,10 +1111,10 @@ static long macvtap_ioctl(struct file *file, unsigned int cmd,
1111 return 0; 1111 return 0;
1112 1112
1113 case TUNSETSNDBUF: 1113 case TUNSETSNDBUF:
1114 if (get_user(u, up)) 1114 if (get_user(s, sp))
1115 return -EFAULT; 1115 return -EFAULT;
1116 1116
1117 q->sk.sk_sndbuf = u; 1117 q->sk.sk_sndbuf = s;
1118 return 0; 1118 return 0;
1119 1119
1120 case TUNGETVNETHDRSZ: 1120 case TUNGETVNETHDRSZ:
diff --git a/drivers/net/phy/fixed_phy.c b/drivers/net/phy/fixed_phy.c
index fb1299c6326e..e23bf5b90e17 100644
--- a/drivers/net/phy/fixed_phy.c
+++ b/drivers/net/phy/fixed_phy.c
@@ -220,7 +220,7 @@ int fixed_phy_update_state(struct phy_device *phydev,
220 struct fixed_mdio_bus *fmb = &platform_fmb; 220 struct fixed_mdio_bus *fmb = &platform_fmb;
221 struct fixed_phy *fp; 221 struct fixed_phy *fp;
222 222
223 if (!phydev || !phydev->bus) 223 if (!phydev || phydev->bus != fmb->mii_bus)
224 return -EINVAL; 224 return -EINVAL;
225 225
226 list_for_each_entry(fp, &fmb->phys, node) { 226 list_for_each_entry(fp, &fmb->phys, node) {
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index e6897b6a8a53..5de8d5827536 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -785,6 +785,7 @@ static int marvell_read_status(struct phy_device *phydev)
785 int adv; 785 int adv;
786 int err; 786 int err;
787 int lpa; 787 int lpa;
788 int lpagb;
788 int status = 0; 789 int status = 0;
789 790
790 /* Update the link, but return if there 791 /* Update the link, but return if there
@@ -802,10 +803,17 @@ static int marvell_read_status(struct phy_device *phydev)
802 if (lpa < 0) 803 if (lpa < 0)
803 return lpa; 804 return lpa;
804 805
806 lpagb = phy_read(phydev, MII_STAT1000);
807 if (lpagb < 0)
808 return lpagb;
809
805 adv = phy_read(phydev, MII_ADVERTISE); 810 adv = phy_read(phydev, MII_ADVERTISE);
806 if (adv < 0) 811 if (adv < 0)
807 return adv; 812 return adv;
808 813
814 phydev->lp_advertising = mii_stat1000_to_ethtool_lpa_t(lpagb) |
815 mii_lpa_to_ethtool_lpa_t(lpa);
816
809 lpa &= adv; 817 lpa &= adv;
810 818
811 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 819 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
@@ -853,6 +861,7 @@ static int marvell_read_status(struct phy_device *phydev)
853 phydev->speed = SPEED_10; 861 phydev->speed = SPEED_10;
854 862
855 phydev->pause = phydev->asym_pause = 0; 863 phydev->pause = phydev->asym_pause = 0;
864 phydev->lp_advertising = 0;
856 } 865 }
857 866
858 return 0; 867 return 0;
diff --git a/drivers/net/phy/mdio-bcm-unimac.c b/drivers/net/phy/mdio-bcm-unimac.c
index 6a52a7f0fa0d..4bde5e728fe0 100644
--- a/drivers/net/phy/mdio-bcm-unimac.c
+++ b/drivers/net/phy/mdio-bcm-unimac.c
@@ -244,6 +244,7 @@ static const struct of_device_id unimac_mdio_ids[] = {
244 { .compatible = "brcm,unimac-mdio", }, 244 { .compatible = "brcm,unimac-mdio", },
245 { /* sentinel */ }, 245 { /* sentinel */ },
246}; 246};
247MODULE_DEVICE_TABLE(of, unimac_mdio_ids);
247 248
248static struct platform_driver unimac_mdio_driver = { 249static struct platform_driver unimac_mdio_driver = {
249 .driver = { 250 .driver = {
diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c
index 7dc21e56a7aa..3bc9f03349f3 100644
--- a/drivers/net/phy/mdio-gpio.c
+++ b/drivers/net/phy/mdio-gpio.c
@@ -261,6 +261,7 @@ static const struct of_device_id mdio_gpio_of_match[] = {
261 { .compatible = "virtual,mdio-gpio", }, 261 { .compatible = "virtual,mdio-gpio", },
262 { /* sentinel */ } 262 { /* sentinel */ }
263}; 263};
264MODULE_DEVICE_TABLE(of, mdio_gpio_of_match);
264 265
265static struct platform_driver mdio_gpio_driver = { 266static struct platform_driver mdio_gpio_driver = {
266 .probe = mdio_gpio_probe, 267 .probe = mdio_gpio_probe,
diff --git a/drivers/net/phy/mdio-mux.c b/drivers/net/phy/mdio-mux.c
index 4d4d25efc1e1..280c7c311f72 100644
--- a/drivers/net/phy/mdio-mux.c
+++ b/drivers/net/phy/mdio-mux.c
@@ -113,18 +113,18 @@ int mdio_mux_init(struct device *dev,
113 if (!parent_bus_node) 113 if (!parent_bus_node)
114 return -ENODEV; 114 return -ENODEV;
115 115
116 parent_bus = of_mdio_find_bus(parent_bus_node);
117 if (parent_bus == NULL) {
118 ret_val = -EPROBE_DEFER;
119 goto err_parent_bus;
120 }
121
122 pb = devm_kzalloc(dev, sizeof(*pb), GFP_KERNEL); 116 pb = devm_kzalloc(dev, sizeof(*pb), GFP_KERNEL);
123 if (pb == NULL) { 117 if (pb == NULL) {
124 ret_val = -ENOMEM; 118 ret_val = -ENOMEM;
125 goto err_parent_bus; 119 goto err_parent_bus;
126 } 120 }
127 121
122 parent_bus = of_mdio_find_bus(parent_bus_node);
123 if (parent_bus == NULL) {
124 ret_val = -EPROBE_DEFER;
125 goto err_parent_bus;
126 }
127
128 pb->switch_data = data; 128 pb->switch_data = data;
129 pb->switch_fn = switch_fn; 129 pb->switch_fn = switch_fn;
130 pb->current_child = -1; 130 pb->current_child = -1;
@@ -173,6 +173,10 @@ int mdio_mux_init(struct device *dev,
173 dev_info(dev, "Version " DRV_VERSION "\n"); 173 dev_info(dev, "Version " DRV_VERSION "\n");
174 return 0; 174 return 0;
175 } 175 }
176
177 /* balance the reference of_mdio_find_bus() took */
178 put_device(&pb->mii_bus->dev);
179
176err_parent_bus: 180err_parent_bus:
177 of_node_put(parent_bus_node); 181 of_node_put(parent_bus_node);
178 return ret_val; 182 return ret_val;
@@ -189,6 +193,9 @@ void mdio_mux_uninit(void *mux_handle)
189 mdiobus_free(cb->mii_bus); 193 mdiobus_free(cb->mii_bus);
190 cb = cb->next; 194 cb = cb->next;
191 } 195 }
196
197 /* balance the reference of_mdio_find_bus() in mdio_mux_init() took */
198 put_device(&pb->mii_bus->dev);
192} 199}
193EXPORT_SYMBOL_GPL(mdio_mux_uninit); 200EXPORT_SYMBOL_GPL(mdio_mux_uninit);
194 201
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
index 02a4615b65f8..12f44c53cc8e 100644
--- a/drivers/net/phy/mdio_bus.c
+++ b/drivers/net/phy/mdio_bus.c
@@ -167,7 +167,9 @@ static int of_mdio_bus_match(struct device *dev, const void *mdio_bus_np)
167 * of_mdio_find_bus - Given an mii_bus node, find the mii_bus. 167 * of_mdio_find_bus - Given an mii_bus node, find the mii_bus.
168 * @mdio_bus_np: Pointer to the mii_bus. 168 * @mdio_bus_np: Pointer to the mii_bus.
169 * 169 *
170 * Returns a pointer to the mii_bus, or NULL if none found. 170 * Returns a reference to the mii_bus, or NULL if none found. The
171 * embedded struct device will have its reference count incremented,
172 * and this must be put once the bus is finished with.
171 * 173 *
172 * Because the association of a device_node and mii_bus is made via 174 * Because the association of a device_node and mii_bus is made via
173 * of_mdiobus_register(), the mii_bus cannot be found before it is 175 * of_mdiobus_register(), the mii_bus cannot be found before it is
@@ -234,15 +236,18 @@ static inline void of_mdiobus_link_phydev(struct mii_bus *mdio,
234#endif 236#endif
235 237
236/** 238/**
237 * mdiobus_register - bring up all the PHYs on a given bus and attach them to bus 239 * __mdiobus_register - bring up all the PHYs on a given bus and attach them to bus
238 * @bus: target mii_bus 240 * @bus: target mii_bus
241 * @owner: module containing bus accessor functions
239 * 242 *
240 * Description: Called by a bus driver to bring up all the PHYs 243 * Description: Called by a bus driver to bring up all the PHYs
241 * on a given bus, and attach them to the bus. 244 * on a given bus, and attach them to the bus. Drivers should use
245 * mdiobus_register() rather than __mdiobus_register() unless they
246 * need to pass a specific owner module.
242 * 247 *
243 * Returns 0 on success or < 0 on error. 248 * Returns 0 on success or < 0 on error.
244 */ 249 */
245int mdiobus_register(struct mii_bus *bus) 250int __mdiobus_register(struct mii_bus *bus, struct module *owner)
246{ 251{
247 int i, err; 252 int i, err;
248 253
@@ -253,6 +258,7 @@ int mdiobus_register(struct mii_bus *bus)
253 BUG_ON(bus->state != MDIOBUS_ALLOCATED && 258 BUG_ON(bus->state != MDIOBUS_ALLOCATED &&
254 bus->state != MDIOBUS_UNREGISTERED); 259 bus->state != MDIOBUS_UNREGISTERED);
255 260
261 bus->owner = owner;
256 bus->dev.parent = bus->parent; 262 bus->dev.parent = bus->parent;
257 bus->dev.class = &mdio_bus_class; 263 bus->dev.class = &mdio_bus_class;
258 bus->dev.groups = NULL; 264 bus->dev.groups = NULL;
@@ -288,13 +294,16 @@ int mdiobus_register(struct mii_bus *bus)
288 294
289error: 295error:
290 while (--i >= 0) { 296 while (--i >= 0) {
291 if (bus->phy_map[i]) 297 struct phy_device *phydev = bus->phy_map[i];
292 device_unregister(&bus->phy_map[i]->dev); 298 if (phydev) {
299 phy_device_remove(phydev);
300 phy_device_free(phydev);
301 }
293 } 302 }
294 device_del(&bus->dev); 303 device_del(&bus->dev);
295 return err; 304 return err;
296} 305}
297EXPORT_SYMBOL(mdiobus_register); 306EXPORT_SYMBOL(__mdiobus_register);
298 307
299void mdiobus_unregister(struct mii_bus *bus) 308void mdiobus_unregister(struct mii_bus *bus)
300{ 309{
@@ -304,9 +313,11 @@ void mdiobus_unregister(struct mii_bus *bus)
304 bus->state = MDIOBUS_UNREGISTERED; 313 bus->state = MDIOBUS_UNREGISTERED;
305 314
306 for (i = 0; i < PHY_MAX_ADDR; i++) { 315 for (i = 0; i < PHY_MAX_ADDR; i++) {
307 if (bus->phy_map[i]) 316 struct phy_device *phydev = bus->phy_map[i];
308 device_unregister(&bus->phy_map[i]->dev); 317 if (phydev) {
309 bus->phy_map[i] = NULL; 318 phy_device_remove(phydev);
319 phy_device_free(phydev);
320 }
310 } 321 }
311 device_del(&bus->dev); 322 device_del(&bus->dev);
312} 323}
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index c0f211127274..f761288abe66 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -384,6 +384,24 @@ int phy_device_register(struct phy_device *phydev)
384EXPORT_SYMBOL(phy_device_register); 384EXPORT_SYMBOL(phy_device_register);
385 385
386/** 386/**
387 * phy_device_remove - Remove a previously registered phy device from the MDIO bus
388 * @phydev: phy_device structure to remove
389 *
390 * This doesn't free the phy_device itself, it merely reverses the effects
391 * of phy_device_register(). Use phy_device_free() to free the device
392 * after calling this function.
393 */
394void phy_device_remove(struct phy_device *phydev)
395{
396 struct mii_bus *bus = phydev->bus;
397 int addr = phydev->addr;
398
399 device_del(&phydev->dev);
400 bus->phy_map[addr] = NULL;
401}
402EXPORT_SYMBOL(phy_device_remove);
403
404/**
387 * phy_find_first - finds the first PHY device on the bus 405 * phy_find_first - finds the first PHY device on the bus
388 * @bus: the target MII bus 406 * @bus: the target MII bus
389 */ 407 */
@@ -578,14 +596,22 @@ EXPORT_SYMBOL(phy_init_hw);
578 * generic driver is used. The phy_device is given a ptr to 596 * generic driver is used. The phy_device is given a ptr to
579 * the attaching device, and given a callback for link status 597 * the attaching device, and given a callback for link status
580 * change. The phy_device is returned to the attaching driver. 598 * change. The phy_device is returned to the attaching driver.
599 * This function takes a reference on the phy device.
581 */ 600 */
582int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 601int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
583 u32 flags, phy_interface_t interface) 602 u32 flags, phy_interface_t interface)
584{ 603{
604 struct mii_bus *bus = phydev->bus;
585 struct device *d = &phydev->dev; 605 struct device *d = &phydev->dev;
586 struct module *bus_module;
587 int err; 606 int err;
588 607
608 if (!try_module_get(bus->owner)) {
609 dev_err(&dev->dev, "failed to get the bus module\n");
610 return -EIO;
611 }
612
613 get_device(d);
614
589 /* Assume that if there is no driver, that it doesn't 615 /* Assume that if there is no driver, that it doesn't
590 * exist, and we should use the genphy driver. 616 * exist, and we should use the genphy driver.
591 */ 617 */
@@ -600,20 +626,13 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
600 err = device_bind_driver(d); 626 err = device_bind_driver(d);
601 627
602 if (err) 628 if (err)
603 return err; 629 goto error;
604 } 630 }
605 631
606 if (phydev->attached_dev) { 632 if (phydev->attached_dev) {
607 dev_err(&dev->dev, "PHY already attached\n"); 633 dev_err(&dev->dev, "PHY already attached\n");
608 return -EBUSY; 634 err = -EBUSY;
609 } 635 goto error;
610
611 /* Increment the bus module reference count */
612 bus_module = phydev->bus->dev.driver ?
613 phydev->bus->dev.driver->owner : NULL;
614 if (!try_module_get(bus_module)) {
615 dev_err(&dev->dev, "failed to get the bus module\n");
616 return -EIO;
617 } 636 }
618 637
619 phydev->attached_dev = dev; 638 phydev->attached_dev = dev;
@@ -636,6 +655,11 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
636 phy_resume(phydev); 655 phy_resume(phydev);
637 656
638 return err; 657 return err;
658
659error:
660 put_device(d);
661 module_put(bus->owner);
662 return err;
639} 663}
640EXPORT_SYMBOL(phy_attach_direct); 664EXPORT_SYMBOL(phy_attach_direct);
641 665
@@ -677,14 +701,15 @@ EXPORT_SYMBOL(phy_attach);
677/** 701/**
678 * phy_detach - detach a PHY device from its network device 702 * phy_detach - detach a PHY device from its network device
679 * @phydev: target phy_device struct 703 * @phydev: target phy_device struct
704 *
705 * This detaches the phy device from its network device and the phy
706 * driver, and drops the reference count taken in phy_attach_direct().
680 */ 707 */
681void phy_detach(struct phy_device *phydev) 708void phy_detach(struct phy_device *phydev)
682{ 709{
710 struct mii_bus *bus;
683 int i; 711 int i;
684 712
685 if (phydev->bus->dev.driver)
686 module_put(phydev->bus->dev.driver->owner);
687
688 phydev->attached_dev->phydev = NULL; 713 phydev->attached_dev->phydev = NULL;
689 phydev->attached_dev = NULL; 714 phydev->attached_dev = NULL;
690 phy_suspend(phydev); 715 phy_suspend(phydev);
@@ -700,6 +725,15 @@ void phy_detach(struct phy_device *phydev)
700 break; 725 break;
701 } 726 }
702 } 727 }
728
729 /*
730 * The phydev might go away on the put_device() below, so avoid
731 * a use-after-free bug by reading the underlying bus first.
732 */
733 bus = phydev->bus;
734
735 put_device(&phydev->dev);
736 module_put(bus->owner);
703} 737}
704EXPORT_SYMBOL(phy_detach); 738EXPORT_SYMBOL(phy_detach);
705 739
diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c
index 17cad185169d..76cad712ddb2 100644
--- a/drivers/net/phy/vitesse.c
+++ b/drivers/net/phy/vitesse.c
@@ -66,7 +66,6 @@
66#define PHY_ID_VSC8244 0x000fc6c0 66#define PHY_ID_VSC8244 0x000fc6c0
67#define PHY_ID_VSC8514 0x00070670 67#define PHY_ID_VSC8514 0x00070670
68#define PHY_ID_VSC8574 0x000704a0 68#define PHY_ID_VSC8574 0x000704a0
69#define PHY_ID_VSC8641 0x00070431
70#define PHY_ID_VSC8662 0x00070660 69#define PHY_ID_VSC8662 0x00070660
71#define PHY_ID_VSC8221 0x000fc550 70#define PHY_ID_VSC8221 0x000fc550
72#define PHY_ID_VSC8211 0x000fc4b0 71#define PHY_ID_VSC8211 0x000fc4b0
@@ -273,18 +272,6 @@ static struct phy_driver vsc82xx_driver[] = {
273 .config_intr = &vsc82xx_config_intr, 272 .config_intr = &vsc82xx_config_intr,
274 .driver = { .owner = THIS_MODULE,}, 273 .driver = { .owner = THIS_MODULE,},
275}, { 274}, {
276 .phy_id = PHY_ID_VSC8641,
277 .name = "Vitesse VSC8641",
278 .phy_id_mask = 0x000ffff0,
279 .features = PHY_GBIT_FEATURES,
280 .flags = PHY_HAS_INTERRUPT,
281 .config_init = &vsc824x_config_init,
282 .config_aneg = &vsc82x4_config_aneg,
283 .read_status = &genphy_read_status,
284 .ack_interrupt = &vsc824x_ack_interrupt,
285 .config_intr = &vsc82xx_config_intr,
286 .driver = { .owner = THIS_MODULE,},
287}, {
288 .phy_id = PHY_ID_VSC8662, 275 .phy_id = PHY_ID_VSC8662,
289 .name = "Vitesse VSC8662", 276 .name = "Vitesse VSC8662",
290 .phy_id_mask = 0x000ffff0, 277 .phy_id_mask = 0x000ffff0,
@@ -331,7 +318,6 @@ static struct mdio_device_id __maybe_unused vitesse_tbl[] = {
331 { PHY_ID_VSC8244, 0x000fffc0 }, 318 { PHY_ID_VSC8244, 0x000fffc0 },
332 { PHY_ID_VSC8514, 0x000ffff0 }, 319 { PHY_ID_VSC8514, 0x000ffff0 },
333 { PHY_ID_VSC8574, 0x000ffff0 }, 320 { PHY_ID_VSC8574, 0x000ffff0 },
334 { PHY_ID_VSC8641, 0x000ffff0 },
335 { PHY_ID_VSC8662, 0x000ffff0 }, 321 { PHY_ID_VSC8662, 0x000ffff0 },
336 { PHY_ID_VSC8221, 0x000ffff0 }, 322 { PHY_ID_VSC8221, 0x000ffff0 },
337 { PHY_ID_VSC8211, 0x000ffff0 }, 323 { PHY_ID_VSC8211, 0x000ffff0 },
diff --git a/drivers/net/ppp/ppp_generic.c b/drivers/net/ppp/ppp_generic.c
index 0481daf9201a..ed00446759b2 100644
--- a/drivers/net/ppp/ppp_generic.c
+++ b/drivers/net/ppp/ppp_generic.c
@@ -2755,6 +2755,7 @@ static struct ppp *ppp_create_interface(struct net *net, int unit,
2755 */ 2755 */
2756 dev_net_set(dev, net); 2756 dev_net_set(dev, net);
2757 2757
2758 rtnl_lock();
2758 mutex_lock(&pn->all_ppp_mutex); 2759 mutex_lock(&pn->all_ppp_mutex);
2759 2760
2760 if (unit < 0) { 2761 if (unit < 0) {
@@ -2785,7 +2786,7 @@ static struct ppp *ppp_create_interface(struct net *net, int unit,
2785 ppp->file.index = unit; 2786 ppp->file.index = unit;
2786 sprintf(dev->name, "ppp%d", unit); 2787 sprintf(dev->name, "ppp%d", unit);
2787 2788
2788 ret = register_netdev(dev); 2789 ret = register_netdevice(dev);
2789 if (ret != 0) { 2790 if (ret != 0) {
2790 unit_put(&pn->units_idr, unit); 2791 unit_put(&pn->units_idr, unit);
2791 netdev_err(ppp->dev, "PPP: couldn't register device %s (%d)\n", 2792 netdev_err(ppp->dev, "PPP: couldn't register device %s (%d)\n",
@@ -2797,6 +2798,7 @@ static struct ppp *ppp_create_interface(struct net *net, int unit,
2797 2798
2798 atomic_inc(&ppp_unit_count); 2799 atomic_inc(&ppp_unit_count);
2799 mutex_unlock(&pn->all_ppp_mutex); 2800 mutex_unlock(&pn->all_ppp_mutex);
2801 rtnl_unlock();
2800 2802
2801 *retp = 0; 2803 *retp = 0;
2802 return ppp; 2804 return ppp;
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig
index 1610b79ae386..fbb9325d1f6e 100644
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -583,4 +583,15 @@ config USB_VL600
583 583
584 http://ubuntuforums.org/showpost.php?p=10589647&postcount=17 584 http://ubuntuforums.org/showpost.php?p=10589647&postcount=17
585 585
586config USB_NET_CH9200
587 tristate "QingHeng CH9200 USB ethernet support"
588 depends on USB_USBNET
589 select MII
590 help
591 Choose this option if you have a USB ethernet adapter with a QinHeng
592 CH9200 chipset.
593
594 To compile this driver as a module, choose M here: the
595 module will be called ch9200.
596
586endif # USB_NET_DRIVERS 597endif # USB_NET_DRIVERS
diff --git a/drivers/net/usb/Makefile b/drivers/net/usb/Makefile
index cf6a0e610a7f..b5f04068dbe4 100644
--- a/drivers/net/usb/Makefile
+++ b/drivers/net/usb/Makefile
@@ -38,4 +38,4 @@ obj-$(CONFIG_USB_NET_HUAWEI_CDC_NCM) += huawei_cdc_ncm.o
38obj-$(CONFIG_USB_VL600) += lg-vl600.o 38obj-$(CONFIG_USB_VL600) += lg-vl600.o
39obj-$(CONFIG_USB_NET_QMI_WWAN) += qmi_wwan.o 39obj-$(CONFIG_USB_NET_QMI_WWAN) += qmi_wwan.o
40obj-$(CONFIG_USB_NET_CDC_MBIM) += cdc_mbim.o 40obj-$(CONFIG_USB_NET_CDC_MBIM) += cdc_mbim.o
41 41obj-$(CONFIG_USB_NET_CH9200) += ch9200.o
diff --git a/drivers/net/usb/ch9200.c b/drivers/net/usb/ch9200.c
new file mode 100644
index 000000000000..5e151e6a3e09
--- /dev/null
+++ b/drivers/net/usb/ch9200.c
@@ -0,0 +1,432 @@
1/*
2 * USB 10M/100M ethernet adapter
3 *
4 * This file is licensed under the terms of the GNU General Public License
5 * version 2. This program is licensed "as is" without any warranty of any
6 * kind, whether express or implied
7 *
8 */
9
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/sched.h>
13#include <linux/stddef.h>
14#include <linux/init.h>
15#include <linux/netdevice.h>
16#include <linux/etherdevice.h>
17#include <linux/ethtool.h>
18#include <linux/mii.h>
19#include <linux/usb.h>
20#include <linux/crc32.h>
21#include <linux/usb/usbnet.h>
22#include <linux/slab.h>
23
24#define CH9200_VID 0x1A86
25#define CH9200_PID_E092 0xE092
26
27#define CTRL_TIMEOUT_MS 1000
28
29#define CONTROL_TIMEOUT_MS 1000
30
31#define REQUEST_READ 0x0E
32#define REQUEST_WRITE 0x0F
33
34/* Address space:
35 * 00-63 : MII
36 * 64-128: MAC
37 *
38 * Note: all accesses must be 16-bit
39 */
40
41#define MAC_REG_CTRL 64
42#define MAC_REG_STATUS 66
43#define MAC_REG_INTERRUPT_MASK 68
44#define MAC_REG_PHY_COMMAND 70
45#define MAC_REG_PHY_DATA 72
46#define MAC_REG_STATION_L 74
47#define MAC_REG_STATION_M 76
48#define MAC_REG_STATION_H 78
49#define MAC_REG_HASH_L 80
50#define MAC_REG_HASH_M1 82
51#define MAC_REG_HASH_M2 84
52#define MAC_REG_HASH_H 86
53#define MAC_REG_THRESHOLD 88
54#define MAC_REG_FIFO_DEPTH 90
55#define MAC_REG_PAUSE 92
56#define MAC_REG_FLOW_CONTROL 94
57
58/* Control register bits
59 *
60 * Note: bits 13 and 15 are reserved
61 */
62#define LOOPBACK (0x01 << 14)
63#define BASE100X (0x01 << 12)
64#define MBPS_10 (0x01 << 11)
65#define DUPLEX_MODE (0x01 << 10)
66#define PAUSE_FRAME (0x01 << 9)
67#define PROMISCUOUS (0x01 << 8)
68#define MULTICAST (0x01 << 7)
69#define BROADCAST (0x01 << 6)
70#define HASH (0x01 << 5)
71#define APPEND_PAD (0x01 << 4)
72#define APPEND_CRC (0x01 << 3)
73#define TRANSMITTER_ACTION (0x01 << 2)
74#define RECEIVER_ACTION (0x01 << 1)
75#define DMA_ACTION (0x01 << 0)
76
77/* Status register bits
78 *
79 * Note: bits 7-15 are reserved
80 */
81#define ALIGNMENT (0x01 << 6)
82#define FIFO_OVER_RUN (0x01 << 5)
83#define FIFO_UNDER_RUN (0x01 << 4)
84#define RX_ERROR (0x01 << 3)
85#define RX_COMPLETE (0x01 << 2)
86#define TX_ERROR (0x01 << 1)
87#define TX_COMPLETE (0x01 << 0)
88
89/* FIFO depth register bits
90 *
91 * Note: bits 6 and 14 are reserved
92 */
93
94#define ETH_TXBD (0x01 << 15)
95#define ETN_TX_FIFO_DEPTH (0x01 << 8)
96#define ETH_RXBD (0x01 << 7)
97#define ETH_RX_FIFO_DEPTH (0x01 << 0)
98
99static int control_read(struct usbnet *dev,
100 unsigned char request, unsigned short value,
101 unsigned short index, void *data, unsigned short size,
102 int timeout)
103{
104 unsigned char *buf = NULL;
105 unsigned char request_type;
106 int err = 0;
107
108 if (request == REQUEST_READ)
109 request_type = (USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_OTHER);
110 else
111 request_type = (USB_DIR_IN | USB_TYPE_VENDOR |
112 USB_RECIP_DEVICE);
113
114 netdev_dbg(dev->net, "Control_read() index=0x%02x size=%d\n",
115 index, size);
116
117 buf = kmalloc(size, GFP_KERNEL);
118 if (!buf) {
119 err = -ENOMEM;
120 goto err_out;
121 }
122
123 err = usb_control_msg(dev->udev,
124 usb_rcvctrlpipe(dev->udev, 0),
125 request, request_type, value, index, buf, size,
126 timeout);
127 if (err == size)
128 memcpy(data, buf, size);
129 else if (err >= 0)
130 err = -EINVAL;
131 kfree(buf);
132
133 return err;
134
135err_out:
136 return err;
137}
138
139static int control_write(struct usbnet *dev, unsigned char request,
140 unsigned short value, unsigned short index,
141 void *data, unsigned short size, int timeout)
142{
143 unsigned char *buf = NULL;
144 unsigned char request_type;
145 int err = 0;
146
147 if (request == REQUEST_WRITE)
148 request_type = (USB_DIR_OUT | USB_TYPE_VENDOR |
149 USB_RECIP_OTHER);
150 else
151 request_type = (USB_DIR_OUT | USB_TYPE_VENDOR |
152 USB_RECIP_DEVICE);
153
154 netdev_dbg(dev->net, "Control_write() index=0x%02x size=%d\n",
155 index, size);
156
157 if (data) {
158 buf = kmalloc(size, GFP_KERNEL);
159 if (!buf) {
160 err = -ENOMEM;
161 goto err_out;
162 }
163 memcpy(buf, data, size);
164 }
165
166 err = usb_control_msg(dev->udev,
167 usb_sndctrlpipe(dev->udev, 0),
168 request, request_type, value, index, buf, size,
169 timeout);
170 if (err >= 0 && err < size)
171 err = -EINVAL;
172 kfree(buf);
173
174 return 0;
175
176err_out:
177 return err;
178}
179
180static int ch9200_mdio_read(struct net_device *netdev, int phy_id, int loc)
181{
182 struct usbnet *dev = netdev_priv(netdev);
183 unsigned char buff[2];
184
185 netdev_dbg(netdev, "ch9200_mdio_read phy_id:%02x loc:%02x\n",
186 phy_id, loc);
187
188 if (phy_id != 0)
189 return -ENODEV;
190
191 control_read(dev, REQUEST_READ, 0, loc * 2, buff, 0x02,
192 CONTROL_TIMEOUT_MS);
193
194 return (buff[0] | buff[1] << 8);
195}
196
197static void ch9200_mdio_write(struct net_device *netdev,
198 int phy_id, int loc, int val)
199{
200 struct usbnet *dev = netdev_priv(netdev);
201 unsigned char buff[2];
202
203 netdev_dbg(netdev, "ch9200_mdio_write() phy_id=%02x loc:%02x\n",
204 phy_id, loc);
205
206 if (phy_id != 0)
207 return;
208
209 buff[0] = (unsigned char)val;
210 buff[1] = (unsigned char)(val >> 8);
211
212 control_write(dev, REQUEST_WRITE, 0, loc * 2, buff, 0x02,
213 CONTROL_TIMEOUT_MS);
214}
215
216static int ch9200_link_reset(struct usbnet *dev)
217{
218 struct ethtool_cmd ecmd;
219
220 mii_check_media(&dev->mii, 1, 1);
221 mii_ethtool_gset(&dev->mii, &ecmd);
222
223 netdev_dbg(dev->net, "link_reset() speed:%d duplex:%d\n",
224 ecmd.speed, ecmd.duplex);
225
226 return 0;
227}
228
229static void ch9200_status(struct usbnet *dev, struct urb *urb)
230{
231 int link;
232 unsigned char *buf;
233
234 if (urb->actual_length < 16)
235 return;
236
237 buf = urb->transfer_buffer;
238 link = !!(buf[0] & 0x01);
239
240 if (link) {
241 netif_carrier_on(dev->net);
242 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
243 } else {
244 netif_carrier_off(dev->net);
245 }
246}
247
248static struct sk_buff *ch9200_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
249 gfp_t flags)
250{
251 int i = 0;
252 int len = 0;
253 int tx_overhead = 0;
254
255 tx_overhead = 0x40;
256
257 len = skb->len;
258 if (skb_headroom(skb) < tx_overhead) {
259 struct sk_buff *skb2;
260
261 skb2 = skb_copy_expand(skb, tx_overhead, 0, flags);
262 dev_kfree_skb_any(skb);
263 skb = skb2;
264 if (!skb)
265 return NULL;
266 }
267
268 __skb_push(skb, tx_overhead);
269 /* usbnet adds padding if length is a multiple of packet size
270 * if so, adjust length value in header
271 */
272 if ((skb->len % dev->maxpacket) == 0)
273 len++;
274
275 skb->data[0] = len;
276 skb->data[1] = len >> 8;
277 skb->data[2] = 0x00;
278 skb->data[3] = 0x80;
279
280 for (i = 4; i < 48; i++)
281 skb->data[i] = 0x00;
282
283 skb->data[48] = len;
284 skb->data[49] = len >> 8;
285 skb->data[50] = 0x00;
286 skb->data[51] = 0x80;
287
288 for (i = 52; i < 64; i++)
289 skb->data[i] = 0x00;
290
291 return skb;
292}
293
294static int ch9200_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
295{
296 int len = 0;
297 int rx_overhead = 0;
298
299 rx_overhead = 64;
300
301 if (unlikely(skb->len < rx_overhead)) {
302 dev_err(&dev->udev->dev, "unexpected tiny rx frame\n");
303 return 0;
304 }
305
306 len = (skb->data[skb->len - 16] | skb->data[skb->len - 15] << 8);
307 skb_trim(skb, len);
308
309 return 1;
310}
311
312static int get_mac_address(struct usbnet *dev, unsigned char *data)
313{
314 int err = 0;
315 unsigned char mac_addr[0x06];
316 int rd_mac_len = 0;
317
318 netdev_dbg(dev->net, "get_mac_address:\n\tusbnet VID:%0x PID:%0x\n",
319 dev->udev->descriptor.idVendor,
320 dev->udev->descriptor.idProduct);
321
322 memset(mac_addr, 0, sizeof(mac_addr));
323 rd_mac_len = control_read(dev, REQUEST_READ, 0,
324 MAC_REG_STATION_L, mac_addr, 0x02,
325 CONTROL_TIMEOUT_MS);
326 rd_mac_len += control_read(dev, REQUEST_READ, 0, MAC_REG_STATION_M,
327 mac_addr + 2, 0x02, CONTROL_TIMEOUT_MS);
328 rd_mac_len += control_read(dev, REQUEST_READ, 0, MAC_REG_STATION_H,
329 mac_addr + 4, 0x02, CONTROL_TIMEOUT_MS);
330 if (rd_mac_len != ETH_ALEN)
331 err = -EINVAL;
332
333 data[0] = mac_addr[5];
334 data[1] = mac_addr[4];
335 data[2] = mac_addr[3];
336 data[3] = mac_addr[2];
337 data[4] = mac_addr[1];
338 data[5] = mac_addr[0];
339
340 return err;
341}
342
343static int ch9200_bind(struct usbnet *dev, struct usb_interface *intf)
344{
345 int retval = 0;
346 unsigned char data[2];
347
348 retval = usbnet_get_endpoints(dev, intf);
349 if (retval)
350 return retval;
351
352 dev->mii.dev = dev->net;
353 dev->mii.mdio_read = ch9200_mdio_read;
354 dev->mii.mdio_write = ch9200_mdio_write;
355 dev->mii.reg_num_mask = 0x1f;
356
357 dev->mii.phy_id_mask = 0x1f;
358
359 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
360 dev->rx_urb_size = 24 * 64 + 16;
361 mii_nway_restart(&dev->mii);
362
363 data[0] = 0x01;
364 data[1] = 0x0F;
365 retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_THRESHOLD, data,
366 0x02, CONTROL_TIMEOUT_MS);
367
368 data[0] = 0xA0;
369 data[1] = 0x90;
370 retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_FIFO_DEPTH, data,
371 0x02, CONTROL_TIMEOUT_MS);
372
373 data[0] = 0x30;
374 data[1] = 0x00;
375 retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_PAUSE, data,
376 0x02, CONTROL_TIMEOUT_MS);
377
378 data[0] = 0x17;
379 data[1] = 0xD8;
380 retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_FLOW_CONTROL,
381 data, 0x02, CONTROL_TIMEOUT_MS);
382
383 /* Undocumented register */
384 data[0] = 0x01;
385 data[1] = 0x00;
386 retval = control_write(dev, REQUEST_WRITE, 0, 254, data, 0x02,
387 CONTROL_TIMEOUT_MS);
388
389 data[0] = 0x5F;
390 data[1] = 0x0D;
391 retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_CTRL, data, 0x02,
392 CONTROL_TIMEOUT_MS);
393
394 retval = get_mac_address(dev, dev->net->dev_addr);
395
396 return retval;
397}
398
399static const struct driver_info ch9200_info = {
400 .description = "CH9200 USB to Network Adaptor",
401 .flags = FLAG_ETHER,
402 .bind = ch9200_bind,
403 .rx_fixup = ch9200_rx_fixup,
404 .tx_fixup = ch9200_tx_fixup,
405 .status = ch9200_status,
406 .link_reset = ch9200_link_reset,
407 .reset = ch9200_link_reset,
408};
409
410static const struct usb_device_id ch9200_products[] = {
411 {
412 USB_DEVICE(0x1A86, 0xE092),
413 .driver_info = (unsigned long)&ch9200_info,
414 },
415 {},
416};
417
418MODULE_DEVICE_TABLE(usb, ch9200_products);
419
420static struct usb_driver ch9200_driver = {
421 .name = "ch9200",
422 .id_table = ch9200_products,
423 .probe = usbnet_probe,
424 .disconnect = usbnet_disconnect,
425 .suspend = usbnet_suspend,
426 .resume = usbnet_resume,
427};
428
429module_usb_driver(ch9200_driver);
430
431MODULE_DESCRIPTION("QinHeng CH9200 USB Network device");
432MODULE_LICENSE("GPL");
diff --git a/drivers/net/vrf.c b/drivers/net/vrf.c
index e7094fbd7568..488c6f50df73 100644
--- a/drivers/net/vrf.c
+++ b/drivers/net/vrf.c
@@ -193,7 +193,8 @@ static netdev_tx_t vrf_process_v4_outbound(struct sk_buff *skb,
193 .flowi4_oif = vrf_dev->ifindex, 193 .flowi4_oif = vrf_dev->ifindex,
194 .flowi4_iif = LOOPBACK_IFINDEX, 194 .flowi4_iif = LOOPBACK_IFINDEX,
195 .flowi4_tos = RT_TOS(ip4h->tos), 195 .flowi4_tos = RT_TOS(ip4h->tos),
196 .flowi4_flags = FLOWI_FLAG_ANYSRC | FLOWI_FLAG_VRFSRC, 196 .flowi4_flags = FLOWI_FLAG_ANYSRC | FLOWI_FLAG_VRFSRC |
197 FLOWI_FLAG_SKIP_NH_OIF,
197 .daddr = ip4h->daddr, 198 .daddr = ip4h->daddr,
198 }; 199 };
199 200
diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c
index cf8b7f0473b3..bbac1d35ed4e 100644
--- a/drivers/net/vxlan.c
+++ b/drivers/net/vxlan.c
@@ -2392,10 +2392,6 @@ static void vxlan_setup(struct net_device *dev)
2392 2392
2393 eth_hw_addr_random(dev); 2393 eth_hw_addr_random(dev);
2394 ether_setup(dev); 2394 ether_setup(dev);
2395 if (vxlan->default_dst.remote_ip.sa.sa_family == AF_INET6)
2396 dev->needed_headroom = ETH_HLEN + VXLAN6_HEADROOM;
2397 else
2398 dev->needed_headroom = ETH_HLEN + VXLAN_HEADROOM;
2399 2395
2400 dev->netdev_ops = &vxlan_netdev_ops; 2396 dev->netdev_ops = &vxlan_netdev_ops;
2401 dev->destructor = free_netdev; 2397 dev->destructor = free_netdev;
@@ -2640,8 +2636,11 @@ static int vxlan_dev_configure(struct net *src_net, struct net_device *dev,
2640 dst->remote_ip.sa.sa_family = AF_INET; 2636 dst->remote_ip.sa.sa_family = AF_INET;
2641 2637
2642 if (dst->remote_ip.sa.sa_family == AF_INET6 || 2638 if (dst->remote_ip.sa.sa_family == AF_INET6 ||
2643 vxlan->cfg.saddr.sa.sa_family == AF_INET6) 2639 vxlan->cfg.saddr.sa.sa_family == AF_INET6) {
2640 if (!IS_ENABLED(CONFIG_IPV6))
2641 return -EPFNOSUPPORT;
2644 use_ipv6 = true; 2642 use_ipv6 = true;
2643 }
2645 2644
2646 if (conf->remote_ifindex) { 2645 if (conf->remote_ifindex) {
2647 struct net_device *lowerdev 2646 struct net_device *lowerdev
@@ -2670,8 +2669,12 @@ static int vxlan_dev_configure(struct net *src_net, struct net_device *dev,
2670 2669
2671 dev->needed_headroom = lowerdev->hard_header_len + 2670 dev->needed_headroom = lowerdev->hard_header_len +
2672 (use_ipv6 ? VXLAN6_HEADROOM : VXLAN_HEADROOM); 2671 (use_ipv6 ? VXLAN6_HEADROOM : VXLAN_HEADROOM);
2673 } else if (use_ipv6) 2672 } else if (use_ipv6) {
2674 vxlan->flags |= VXLAN_F_IPV6; 2673 vxlan->flags |= VXLAN_F_IPV6;
2674 dev->needed_headroom = ETH_HLEN + VXLAN6_HEADROOM;
2675 } else {
2676 dev->needed_headroom = ETH_HLEN + VXLAN_HEADROOM;
2677 }
2675 2678
2676 memcpy(&vxlan->cfg, conf, sizeof(*conf)); 2679 memcpy(&vxlan->cfg, conf, sizeof(*conf));
2677 if (!vxlan->cfg.dst_port) 2680 if (!vxlan->cfg.dst_port)
diff --git a/drivers/nvdimm/btt_devs.c b/drivers/nvdimm/btt_devs.c
index 59ad54a63d9f..cb477518dd0e 100644
--- a/drivers/nvdimm/btt_devs.c
+++ b/drivers/nvdimm/btt_devs.c
@@ -128,13 +128,13 @@ static ssize_t namespace_store(struct device *dev,
128 struct nd_btt *nd_btt = to_nd_btt(dev); 128 struct nd_btt *nd_btt = to_nd_btt(dev);
129 ssize_t rc; 129 ssize_t rc;
130 130
131 nvdimm_bus_lock(dev);
132 device_lock(dev); 131 device_lock(dev);
132 nvdimm_bus_lock(dev);
133 rc = nd_namespace_store(dev, &nd_btt->ndns, buf, len); 133 rc = nd_namespace_store(dev, &nd_btt->ndns, buf, len);
134 dev_dbg(dev, "%s: result: %zd wrote: %s%s", __func__, 134 dev_dbg(dev, "%s: result: %zd wrote: %s%s", __func__,
135 rc, buf, buf[len - 1] == '\n' ? "" : "\n"); 135 rc, buf, buf[len - 1] == '\n' ? "" : "\n");
136 device_unlock(dev);
137 nvdimm_bus_unlock(dev); 136 nvdimm_bus_unlock(dev);
137 device_unlock(dev);
138 138
139 return rc; 139 return rc;
140} 140}
diff --git a/drivers/nvdimm/pfn_devs.c b/drivers/nvdimm/pfn_devs.c
index 3fd7d0d81a47..71805a1aa0f3 100644
--- a/drivers/nvdimm/pfn_devs.c
+++ b/drivers/nvdimm/pfn_devs.c
@@ -148,13 +148,13 @@ static ssize_t namespace_store(struct device *dev,
148 struct nd_pfn *nd_pfn = to_nd_pfn(dev); 148 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
149 ssize_t rc; 149 ssize_t rc;
150 150
151 nvdimm_bus_lock(dev);
152 device_lock(dev); 151 device_lock(dev);
152 nvdimm_bus_lock(dev);
153 rc = nd_namespace_store(dev, &nd_pfn->ndns, buf, len); 153 rc = nd_namespace_store(dev, &nd_pfn->ndns, buf, len);
154 dev_dbg(dev, "%s: result: %zd wrote: %s%s", __func__, 154 dev_dbg(dev, "%s: result: %zd wrote: %s%s", __func__,
155 rc, buf, buf[len - 1] == '\n' ? "" : "\n"); 155 rc, buf, buf[len - 1] == '\n' ? "" : "\n");
156 device_unlock(dev);
157 nvdimm_bus_unlock(dev); 156 nvdimm_bus_unlock(dev);
157 device_unlock(dev);
158 158
159 return rc; 159 return rc;
160} 160}
diff --git a/drivers/nvdimm/pmem.c b/drivers/nvdimm/pmem.c
index b9525385c0dc..0ba6a978f227 100644
--- a/drivers/nvdimm/pmem.c
+++ b/drivers/nvdimm/pmem.c
@@ -92,6 +92,8 @@ static int pmem_rw_page(struct block_device *bdev, sector_t sector,
92 struct pmem_device *pmem = bdev->bd_disk->private_data; 92 struct pmem_device *pmem = bdev->bd_disk->private_data;
93 93
94 pmem_do_bvec(pmem, page, PAGE_CACHE_SIZE, 0, rw, sector); 94 pmem_do_bvec(pmem, page, PAGE_CACHE_SIZE, 0, rw, sector);
95 if (rw & WRITE)
96 wmb_pmem();
95 page_endio(page, rw & WRITE, 0); 97 page_endio(page, rw & WRITE, 0);
96 98
97 return 0; 99 return 0;
diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
index 1350fa25cdb0..a87a868fed64 100644
--- a/drivers/of/of_mdio.c
+++ b/drivers/of/of_mdio.c
@@ -197,7 +197,8 @@ static int of_phy_match(struct device *dev, void *phy_np)
197 * of_phy_find_device - Give a PHY node, find the phy_device 197 * of_phy_find_device - Give a PHY node, find the phy_device
198 * @phy_np: Pointer to the phy's device tree node 198 * @phy_np: Pointer to the phy's device tree node
199 * 199 *
200 * Returns a pointer to the phy_device. 200 * If successful, returns a pointer to the phy_device with the embedded
201 * struct device refcount incremented by one, or NULL on failure.
201 */ 202 */
202struct phy_device *of_phy_find_device(struct device_node *phy_np) 203struct phy_device *of_phy_find_device(struct device_node *phy_np)
203{ 204{
@@ -217,7 +218,9 @@ EXPORT_SYMBOL(of_phy_find_device);
217 * @hndlr: Link state callback for the network device 218 * @hndlr: Link state callback for the network device
218 * @iface: PHY data interface type 219 * @iface: PHY data interface type
219 * 220 *
220 * Returns a pointer to the phy_device if successful. NULL otherwise 221 * If successful, returns a pointer to the phy_device with the embedded
222 * struct device refcount incremented by one, or NULL on failure. The
223 * refcount must be dropped by calling phy_disconnect() or phy_detach().
221 */ 224 */
222struct phy_device *of_phy_connect(struct net_device *dev, 225struct phy_device *of_phy_connect(struct net_device *dev,
223 struct device_node *phy_np, 226 struct device_node *phy_np,
@@ -225,13 +228,19 @@ struct phy_device *of_phy_connect(struct net_device *dev,
225 phy_interface_t iface) 228 phy_interface_t iface)
226{ 229{
227 struct phy_device *phy = of_phy_find_device(phy_np); 230 struct phy_device *phy = of_phy_find_device(phy_np);
231 int ret;
228 232
229 if (!phy) 233 if (!phy)
230 return NULL; 234 return NULL;
231 235
232 phy->dev_flags = flags; 236 phy->dev_flags = flags;
233 237
234 return phy_connect_direct(dev, phy, hndlr, iface) ? NULL : phy; 238 ret = phy_connect_direct(dev, phy, hndlr, iface);
239
240 /* refcount is held by phy_connect_direct() on success */
241 put_device(&phy->dev);
242
243 return ret ? NULL : phy;
235} 244}
236EXPORT_SYMBOL(of_phy_connect); 245EXPORT_SYMBOL(of_phy_connect);
237 246
@@ -241,17 +250,27 @@ EXPORT_SYMBOL(of_phy_connect);
241 * @phy_np: Node pointer for the PHY 250 * @phy_np: Node pointer for the PHY
242 * @flags: flags to pass to the PHY 251 * @flags: flags to pass to the PHY
243 * @iface: PHY data interface type 252 * @iface: PHY data interface type
253 *
254 * If successful, returns a pointer to the phy_device with the embedded
255 * struct device refcount incremented by one, or NULL on failure. The
256 * refcount must be dropped by calling phy_disconnect() or phy_detach().
244 */ 257 */
245struct phy_device *of_phy_attach(struct net_device *dev, 258struct phy_device *of_phy_attach(struct net_device *dev,
246 struct device_node *phy_np, u32 flags, 259 struct device_node *phy_np, u32 flags,
247 phy_interface_t iface) 260 phy_interface_t iface)
248{ 261{
249 struct phy_device *phy = of_phy_find_device(phy_np); 262 struct phy_device *phy = of_phy_find_device(phy_np);
263 int ret;
250 264
251 if (!phy) 265 if (!phy)
252 return NULL; 266 return NULL;
253 267
254 return phy_attach_direct(dev, phy, flags, iface) ? NULL : phy; 268 ret = phy_attach_direct(dev, phy, flags, iface);
269
270 /* refcount is held by phy_attach_direct() on success */
271 put_device(&phy->dev);
272
273 return ret ? NULL : phy;
255} 274}
256EXPORT_SYMBOL(of_phy_attach); 275EXPORT_SYMBOL(of_phy_attach);
257 276
diff --git a/drivers/of/of_pci_irq.c b/drivers/of/of_pci_irq.c
index 1710d9dc7fc2..2306313c0029 100644
--- a/drivers/of/of_pci_irq.c
+++ b/drivers/of/of_pci_irq.c
@@ -38,8 +38,8 @@ int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq
38 */ 38 */
39 rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin); 39 rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
40 if (rc != 0) 40 if (rc != 0)
41 return rc; 41 goto err;
42 /* No pin, exit */ 42 /* No pin, exit with no error message. */
43 if (pin == 0) 43 if (pin == 0)
44 return -ENODEV; 44 return -ENODEV;
45 45
@@ -53,8 +53,10 @@ int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq
53 ppnode = pci_bus_to_OF_node(pdev->bus); 53 ppnode = pci_bus_to_OF_node(pdev->bus);
54 54
55 /* No node for host bridge ? give up */ 55 /* No node for host bridge ? give up */
56 if (ppnode == NULL) 56 if (ppnode == NULL) {
57 return -EINVAL; 57 rc = -EINVAL;
58 goto err;
59 }
58 } else { 60 } else {
59 /* We found a P2P bridge, check if it has a node */ 61 /* We found a P2P bridge, check if it has a node */
60 ppnode = pci_device_to_OF_node(ppdev); 62 ppnode = pci_device_to_OF_node(ppdev);
@@ -86,7 +88,13 @@ int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq
86 out_irq->args[0] = pin; 88 out_irq->args[0] = pin;
87 laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8)); 89 laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
88 laddr[1] = laddr[2] = cpu_to_be32(0); 90 laddr[1] = laddr[2] = cpu_to_be32(0);
89 return of_irq_parse_raw(laddr, out_irq); 91 rc = of_irq_parse_raw(laddr, out_irq);
92 if (rc)
93 goto err;
94 return 0;
95err:
96 dev_err(&pdev->dev, "of_irq_parse_pci() failed with rc=%d\n", rc);
97 return rc;
90} 98}
91EXPORT_SYMBOL_GPL(of_irq_parse_pci); 99EXPORT_SYMBOL_GPL(of_irq_parse_pci);
92 100
@@ -105,10 +113,8 @@ int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
105 int ret; 113 int ret;
106 114
107 ret = of_irq_parse_pci(dev, &oirq); 115 ret = of_irq_parse_pci(dev, &oirq);
108 if (ret) { 116 if (ret)
109 dev_err(&dev->dev, "of_irq_parse_pci() failed with rc=%d\n", ret);
110 return 0; /* Proper return code 0 == NO_IRQ */ 117 return 0; /* Proper return code 0 == NO_IRQ */
111 }
112 118
113 return irq_create_of_mapping(&oirq); 119 return irq_create_of_mapping(&oirq);
114} 120}
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index baec33c4e698..a0580afe1713 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -560,6 +560,9 @@ dino_fixup_bus(struct pci_bus *bus)
560 } else if (bus->parent) { 560 } else if (bus->parent) {
561 int i; 561 int i;
562 562
563 pci_read_bridge_bases(bus);
564
565
563 for(i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) { 566 for(i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
564 if((bus->self->resource[i].flags & 567 if((bus->self->resource[i].flags &
565 (IORESOURCE_IO | IORESOURCE_MEM)) == 0) 568 (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index 7b9e89ba0465..a32c1f6c252c 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -693,6 +693,7 @@ lba_fixup_bus(struct pci_bus *bus)
693 if (bus->parent) { 693 if (bus->parent) {
694 int i; 694 int i;
695 /* PCI-PCI Bridge */ 695 /* PCI-PCI Bridge */
696 pci_read_bridge_bases(bus);
696 for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) 697 for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++)
697 pci_claim_bridge_resource(bus->self, i); 698 pci_claim_bridge_resource(bus->self, i);
698 } else { 699 } else {
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 769f7e35f1a2..59ac36fe7c42 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -442,7 +442,8 @@ static const struct pci_vpd_ops pci_vpd_pci22_ops = {
442static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count, 442static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count,
443 void *arg) 443 void *arg)
444{ 444{
445 struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn)); 445 struct pci_dev *tdev = pci_get_slot(dev->bus,
446 PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
446 ssize_t ret; 447 ssize_t ret;
447 448
448 if (!tdev) 449 if (!tdev)
@@ -456,7 +457,8 @@ static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count,
456static ssize_t pci_vpd_f0_write(struct pci_dev *dev, loff_t pos, size_t count, 457static ssize_t pci_vpd_f0_write(struct pci_dev *dev, loff_t pos, size_t count,
457 const void *arg) 458 const void *arg)
458{ 459{
459 struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn)); 460 struct pci_dev *tdev = pci_get_slot(dev->bus,
461 PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
460 ssize_t ret; 462 ssize_t ret;
461 463
462 if (!tdev) 464 if (!tdev)
@@ -473,22 +475,6 @@ static const struct pci_vpd_ops pci_vpd_f0_ops = {
473 .release = pci_vpd_pci22_release, 475 .release = pci_vpd_pci22_release,
474}; 476};
475 477
476static int pci_vpd_f0_dev_check(struct pci_dev *dev)
477{
478 struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn));
479 int ret = 0;
480
481 if (!tdev)
482 return -ENODEV;
483 if (!tdev->vpd || !tdev->multifunction ||
484 dev->class != tdev->class || dev->vendor != tdev->vendor ||
485 dev->device != tdev->device)
486 ret = -ENODEV;
487
488 pci_dev_put(tdev);
489 return ret;
490}
491
492int pci_vpd_pci22_init(struct pci_dev *dev) 478int pci_vpd_pci22_init(struct pci_dev *dev)
493{ 479{
494 struct pci_vpd_pci22 *vpd; 480 struct pci_vpd_pci22 *vpd;
@@ -497,12 +483,7 @@ int pci_vpd_pci22_init(struct pci_dev *dev)
497 cap = pci_find_capability(dev, PCI_CAP_ID_VPD); 483 cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
498 if (!cap) 484 if (!cap)
499 return -ENODEV; 485 return -ENODEV;
500 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) {
501 int ret = pci_vpd_f0_dev_check(dev);
502 486
503 if (ret)
504 return ret;
505 }
506 vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC); 487 vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC);
507 if (!vpd) 488 if (!vpd)
508 return -ENOMEM; 489 return -ENOMEM;
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 6fbd3f2b5992..d3346d23963b 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -256,6 +256,8 @@ bool pci_bus_clip_resource(struct pci_dev *dev, int idx)
256 256
257 res->start = start; 257 res->start = start;
258 res->end = end; 258 res->end = end;
259 res->flags &= ~IORESOURCE_UNSET;
260 orig_res.flags &= ~IORESOURCE_UNSET;
259 dev_printk(KERN_DEBUG, &dev->dev, "%pR clipped to %pR\n", 261 dev_printk(KERN_DEBUG, &dev->dev, "%pR clipped to %pR\n",
260 &orig_res, res); 262 &orig_res, res);
261 263
diff --git a/drivers/pci/host/pci-keystone.c b/drivers/pci/host/pci-keystone.c
index 81253e70b1c5..0aa81bd3de12 100644
--- a/drivers/pci/host/pci-keystone.c
+++ b/drivers/pci/host/pci-keystone.c
@@ -110,7 +110,7 @@ static int ks_pcie_establish_link(struct keystone_pcie *ks_pcie)
110 return -EINVAL; 110 return -EINVAL;
111} 111}
112 112
113static void ks_pcie_msi_irq_handler(unsigned int __irq, struct irq_desc *desc) 113static void ks_pcie_msi_irq_handler(struct irq_desc *desc)
114{ 114{
115 unsigned int irq = irq_desc_get_irq(desc); 115 unsigned int irq = irq_desc_get_irq(desc);
116 struct keystone_pcie *ks_pcie = irq_desc_get_handler_data(desc); 116 struct keystone_pcie *ks_pcie = irq_desc_get_handler_data(desc);
@@ -138,8 +138,7 @@ static void ks_pcie_msi_irq_handler(unsigned int __irq, struct irq_desc *desc)
138 * Traverse through pending legacy interrupts and invoke handler for each. Also 138 * Traverse through pending legacy interrupts and invoke handler for each. Also
139 * takes care of interrupt controller level mask/ack operation. 139 * takes care of interrupt controller level mask/ack operation.
140 */ 140 */
141static void ks_pcie_legacy_irq_handler(unsigned int __irq, 141static void ks_pcie_legacy_irq_handler(struct irq_desc *desc)
142 struct irq_desc *desc)
143{ 142{
144 unsigned int irq = irq_desc_get_irq(desc); 143 unsigned int irq = irq_desc_get_irq(desc);
145 struct keystone_pcie *ks_pcie = irq_desc_get_handler_data(desc); 144 struct keystone_pcie *ks_pcie = irq_desc_get_handler_data(desc);
diff --git a/drivers/pci/host/pci-rcar-gen2.c b/drivers/pci/host/pci-rcar-gen2.c
index 367e28fa7564..c4f64bfee551 100644
--- a/drivers/pci/host/pci-rcar-gen2.c
+++ b/drivers/pci/host/pci-rcar-gen2.c
@@ -362,6 +362,7 @@ static int rcar_pci_probe(struct platform_device *pdev)
362static struct of_device_id rcar_pci_of_match[] = { 362static struct of_device_id rcar_pci_of_match[] = {
363 { .compatible = "renesas,pci-r8a7790", }, 363 { .compatible = "renesas,pci-r8a7790", },
364 { .compatible = "renesas,pci-r8a7791", }, 364 { .compatible = "renesas,pci-r8a7791", },
365 { .compatible = "renesas,pci-r8a7794", },
365 { }, 366 { },
366}; 367};
367 368
diff --git a/drivers/pci/host/pci-xgene-msi.c b/drivers/pci/host/pci-xgene-msi.c
index 996327cfa1e1..e491681daf22 100644
--- a/drivers/pci/host/pci-xgene-msi.c
+++ b/drivers/pci/host/pci-xgene-msi.c
@@ -295,7 +295,7 @@ static int xgene_msi_init_allocator(struct xgene_msi *xgene_msi)
295 return 0; 295 return 0;
296} 296}
297 297
298static void xgene_msi_isr(unsigned int irq, struct irq_desc *desc) 298static void xgene_msi_isr(struct irq_desc *desc)
299{ 299{
300 struct irq_chip *chip = irq_desc_get_chip(desc); 300 struct irq_chip *chip = irq_desc_get_chip(desc);
301 struct xgene_msi_group *msi_groups; 301 struct xgene_msi_group *msi_groups;
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index dd652f2ae03d..108a3118ace7 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -299,9 +299,10 @@ static long local_pci_probe(void *_ddi)
299 * Unbound PCI devices are always put in D0, regardless of 299 * Unbound PCI devices are always put in D0, regardless of
300 * runtime PM status. During probe, the device is set to 300 * runtime PM status. During probe, the device is set to
301 * active and the usage count is incremented. If the driver 301 * active and the usage count is incremented. If the driver
302 * supports runtime PM, it should call pm_runtime_put_noidle() 302 * supports runtime PM, it should call pm_runtime_put_noidle(),
303 * in its probe routine and pm_runtime_get_noresume() in its 303 * or any other runtime PM helper function decrementing the usage
304 * remove routine. 304 * count, in its probe routine and pm_runtime_get_noresume() in
305 * its remove routine.
305 */ 306 */
306 pm_runtime_get_sync(dev); 307 pm_runtime_get_sync(dev);
307 pci_dev->driver = pci_drv; 308 pci_dev->driver = pci_drv;
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 0b2be174d981..8361d27e5eca 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -676,15 +676,20 @@ static struct irq_domain *pci_host_bridge_msi_domain(struct pci_bus *bus)
676static void pci_set_bus_msi_domain(struct pci_bus *bus) 676static void pci_set_bus_msi_domain(struct pci_bus *bus)
677{ 677{
678 struct irq_domain *d; 678 struct irq_domain *d;
679 struct pci_bus *b;
679 680
680 /* 681 /*
681 * Either bus is the root, and we must obtain it from the 682 * The bus can be a root bus, a subordinate bus, or a virtual bus
682 * firmware, or we inherit it from the bridge device. 683 * created by an SR-IOV device. Walk up to the first bridge device
684 * found or derive the domain from the host bridge.
683 */ 685 */
684 if (pci_is_root_bus(bus)) 686 for (b = bus, d = NULL; !d && !pci_is_root_bus(b); b = b->parent) {
685 d = pci_host_bridge_msi_domain(bus); 687 if (b->self)
686 else 688 d = dev_get_msi_domain(&b->self->dev);
687 d = dev_get_msi_domain(&bus->self->dev); 689 }
690
691 if (!d)
692 d = pci_host_bridge_msi_domain(b);
688 693
689 dev_set_msi_domain(&bus->dev, d); 694 dev_set_msi_domain(&bus->dev, d);
690} 695}
@@ -855,9 +860,6 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
855 child->bridge_ctl = bctl; 860 child->bridge_ctl = bctl;
856 } 861 }
857 862
858 /* Read and initialize bridge resources */
859 pci_read_bridge_bases(child);
860
861 cmax = pci_scan_child_bus(child); 863 cmax = pci_scan_child_bus(child);
862 if (cmax > subordinate) 864 if (cmax > subordinate)
863 dev_warn(&dev->dev, "bridge has subordinate %02x but max busn %02x\n", 865 dev_warn(&dev->dev, "bridge has subordinate %02x but max busn %02x\n",
@@ -918,9 +920,6 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
918 920
919 if (!is_cardbus) { 921 if (!is_cardbus) {
920 child->bridge_ctl = bctl; 922 child->bridge_ctl = bctl;
921
922 /* Read and initialize bridge resources */
923 pci_read_bridge_bases(child);
924 max = pci_scan_child_bus(child); 923 max = pci_scan_child_bus(child);
925 } else { 924 } else {
926 /* 925 /*
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 6a30252cd79f..b03373fd05ca 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1907,11 +1907,27 @@ static void quirk_netmos(struct pci_dev *dev)
1907DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, 1907DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID,
1908 PCI_CLASS_COMMUNICATION_SERIAL, 8, quirk_netmos); 1908 PCI_CLASS_COMMUNICATION_SERIAL, 8, quirk_netmos);
1909 1909
1910/*
1911 * Quirk non-zero PCI functions to route VPD access through function 0 for
1912 * devices that share VPD resources between functions. The functions are
1913 * expected to be identical devices.
1914 */
1910static void quirk_f0_vpd_link(struct pci_dev *dev) 1915static void quirk_f0_vpd_link(struct pci_dev *dev)
1911{ 1916{
1912 if (!dev->multifunction || !PCI_FUNC(dev->devfn)) 1917 struct pci_dev *f0;
1918
1919 if (!PCI_FUNC(dev->devfn))
1913 return; 1920 return;
1914 dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0; 1921
1922 f0 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
1923 if (!f0)
1924 return;
1925
1926 if (f0->vpd && dev->class == f0->class &&
1927 dev->vendor == f0->vendor && dev->device == f0->device)
1928 dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0;
1929
1930 pci_dev_put(f0);
1915} 1931}
1916DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, 1932DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
1917 PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link); 1933 PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link);
diff --git a/drivers/pinctrl/bcm/pinctrl-cygnus-gpio.c b/drivers/pinctrl/bcm/pinctrl-cygnus-gpio.c
index 7d9482bf8252..1ca783098e47 100644
--- a/drivers/pinctrl/bcm/pinctrl-cygnus-gpio.c
+++ b/drivers/pinctrl/bcm/pinctrl-cygnus-gpio.c
@@ -143,7 +143,7 @@ static inline bool cygnus_get_bit(struct cygnus_gpio *chip, unsigned int reg,
143 return !!(readl(chip->base + offset) & BIT(shift)); 143 return !!(readl(chip->base + offset) & BIT(shift));
144} 144}
145 145
146static void cygnus_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 146static void cygnus_gpio_irq_handler(struct irq_desc *desc)
147{ 147{
148 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 148 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
149 struct cygnus_gpio *chip = to_cygnus_gpio(gc); 149 struct cygnus_gpio *chip = to_cygnus_gpio(gc);
diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
index 69723e07036b..9638a00c67c2 100644
--- a/drivers/pinctrl/core.c
+++ b/drivers/pinctrl/core.c
@@ -349,6 +349,9 @@ static bool pinctrl_ready_for_gpio_range(unsigned gpio)
349 struct pinctrl_gpio_range *range = NULL; 349 struct pinctrl_gpio_range *range = NULL;
350 struct gpio_chip *chip = gpio_to_chip(gpio); 350 struct gpio_chip *chip = gpio_to_chip(gpio);
351 351
352 if (WARN(!chip, "no gpio_chip for gpio%i?", gpio))
353 return false;
354
352 mutex_lock(&pinctrldev_list_mutex); 355 mutex_lock(&pinctrldev_list_mutex);
353 356
354 /* Loop over the pin controllers */ 357 /* Loop over the pin controllers */
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index dac4865f3203..f79ea430f651 100644
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -425,7 +425,7 @@ static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
425 } 425 }
426} 426}
427 427
428static void byt_gpio_irq_handler(unsigned irq, struct irq_desc *desc) 428static void byt_gpio_irq_handler(struct irq_desc *desc)
429{ 429{
430 struct irq_data *data = irq_desc_get_irq_data(desc); 430 struct irq_data *data = irq_desc_get_irq_data(desc);
431 struct byt_gpio *vg = to_byt_gpio(irq_desc_get_handler_data(desc)); 431 struct byt_gpio *vg = to_byt_gpio(irq_desc_get_handler_data(desc));
diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c
index 2d5d3ddc36e5..270c127e03ea 100644
--- a/drivers/pinctrl/intel/pinctrl-cherryview.c
+++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
@@ -1414,7 +1414,7 @@ static struct irq_chip chv_gpio_irqchip = {
1414 .flags = IRQCHIP_SKIP_SET_WAKE, 1414 .flags = IRQCHIP_SKIP_SET_WAKE,
1415}; 1415};
1416 1416
1417static void chv_gpio_irq_handler(unsigned irq, struct irq_desc *desc) 1417static void chv_gpio_irq_handler(struct irq_desc *desc)
1418{ 1418{
1419 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 1419 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
1420 struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(gc); 1420 struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(gc);
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index bb377c110541..54848b8decef 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -836,7 +836,7 @@ static void intel_gpio_community_irq_handler(struct gpio_chip *gc,
836 } 836 }
837} 837}
838 838
839static void intel_gpio_irq_handler(unsigned irq, struct irq_desc *desc) 839static void intel_gpio_irq_handler(struct irq_desc *desc)
840{ 840{
841 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 841 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
842 struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc); 842 struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
index 7726c6caaf83..1b22f96ba839 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -1190,7 +1190,7 @@ mtk_eint_debounce_process(struct mtk_pinctrl *pctl, int index)
1190 } 1190 }
1191} 1191}
1192 1192
1193static void mtk_eint_irq_handler(unsigned irq, struct irq_desc *desc) 1193static void mtk_eint_irq_handler(struct irq_desc *desc)
1194{ 1194{
1195 struct irq_chip *chip = irq_desc_get_chip(desc); 1195 struct irq_chip *chip = irq_desc_get_chip(desc);
1196 struct mtk_pinctrl *pctl = irq_desc_get_handler_data(desc); 1196 struct mtk_pinctrl *pctl = irq_desc_get_handler_data(desc);
diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c
index 352ede13a9e9..96cf03908e93 100644
--- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c
+++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c
@@ -860,7 +860,7 @@ static void __nmk_gpio_irq_handler(struct irq_desc *desc, u32 status)
860 chained_irq_exit(host_chip, desc); 860 chained_irq_exit(host_chip, desc);
861} 861}
862 862
863static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 863static void nmk_gpio_irq_handler(struct irq_desc *desc)
864{ 864{
865 struct gpio_chip *chip = irq_desc_get_handler_data(desc); 865 struct gpio_chip *chip = irq_desc_get_handler_data(desc);
866 struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip); 866 struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
@@ -873,7 +873,7 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
873 __nmk_gpio_irq_handler(desc, status); 873 __nmk_gpio_irq_handler(desc, status);
874} 874}
875 875
876static void nmk_gpio_latent_irq_handler(unsigned int irq, struct irq_desc *desc) 876static void nmk_gpio_latent_irq_handler(struct irq_desc *desc)
877{ 877{
878 struct gpio_chip *chip = irq_desc_get_handler_data(desc); 878 struct gpio_chip *chip = irq_desc_get_handler_data(desc);
879 struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip); 879 struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c
index a5976ebc4482..f6be68518c87 100644
--- a/drivers/pinctrl/pinctrl-adi2.c
+++ b/drivers/pinctrl/pinctrl-adi2.c
@@ -530,8 +530,7 @@ static inline void preflow_handler(struct irq_desc *desc)
530static inline void preflow_handler(struct irq_desc *desc) { } 530static inline void preflow_handler(struct irq_desc *desc) { }
531#endif 531#endif
532 532
533static void adi_gpio_handle_pint_irq(unsigned int inta_irq, 533static void adi_gpio_handle_pint_irq(struct irq_desc *desc)
534 struct irq_desc *desc)
535{ 534{
536 u32 request; 535 u32 request;
537 u32 level_mask, hwirq; 536 u32 level_mask, hwirq;
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index 5e86bb8ca80e..3318f1d6193c 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -492,15 +492,15 @@ static struct irq_chip amd_gpio_irqchip = {
492 .irq_set_type = amd_gpio_irq_set_type, 492 .irq_set_type = amd_gpio_irq_set_type,
493}; 493};
494 494
495static void amd_gpio_irq_handler(unsigned int __irq, struct irq_desc *desc) 495static void amd_gpio_irq_handler(struct irq_desc *desc)
496{ 496{
497 unsigned int irq = irq_desc_get_irq(desc);
498 u32 i; 497 u32 i;
499 u32 off; 498 u32 off;
500 u32 reg; 499 u32 reg;
501 u32 pin_reg; 500 u32 pin_reg;
502 u64 reg64; 501 u64 reg64;
503 int handled = 0; 502 int handled = 0;
503 unsigned int irq;
504 unsigned long flags; 504 unsigned long flags;
505 struct irq_chip *chip = irq_desc_get_chip(desc); 505 struct irq_chip *chip = irq_desc_get_chip(desc);
506 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 506 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
@@ -541,7 +541,7 @@ static void amd_gpio_irq_handler(unsigned int __irq, struct irq_desc *desc)
541 } 541 }
542 542
543 if (handled == 0) 543 if (handled == 0)
544 handle_bad_irq(irq, desc); 544 handle_bad_irq(desc);
545 545
546 spin_lock_irqsave(&gpio_dev->lock, flags); 546 spin_lock_irqsave(&gpio_dev->lock, flags);
547 reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG); 547 reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index bae0012ee356..b0fde0f385e6 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -1585,7 +1585,7 @@ static struct irq_chip gpio_irqchip = {
1585 .irq_set_wake = gpio_irq_set_wake, 1585 .irq_set_wake = gpio_irq_set_wake,
1586}; 1586};
1587 1587
1588static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) 1588static void gpio_irq_handler(struct irq_desc *desc)
1589{ 1589{
1590 struct irq_chip *chip = irq_desc_get_chip(desc); 1590 struct irq_chip *chip = irq_desc_get_chip(desc);
1591 struct gpio_chip *gpio_chip = irq_desc_get_handler_data(desc); 1591 struct gpio_chip *gpio_chip = irq_desc_get_handler_data(desc);
diff --git a/drivers/pinctrl/pinctrl-coh901.c b/drivers/pinctrl/pinctrl-coh901.c
index 3731cc67a88b..9c9b88934bcc 100644
--- a/drivers/pinctrl/pinctrl-coh901.c
+++ b/drivers/pinctrl/pinctrl-coh901.c
@@ -519,7 +519,7 @@ static struct irq_chip u300_gpio_irqchip = {
519 .irq_set_type = u300_gpio_irq_type, 519 .irq_set_type = u300_gpio_irq_type,
520}; 520};
521 521
522static void u300_gpio_irq_handler(unsigned __irq, struct irq_desc *desc) 522static void u300_gpio_irq_handler(struct irq_desc *desc)
523{ 523{
524 unsigned int irq = irq_desc_get_irq(desc); 524 unsigned int irq = irq_desc_get_irq(desc);
525 struct irq_chip *parent_chip = irq_desc_get_chip(desc); 525 struct irq_chip *parent_chip = irq_desc_get_chip(desc);
diff --git a/drivers/pinctrl/pinctrl-digicolor.c b/drivers/pinctrl/pinctrl-digicolor.c
index 461fffc4c62a..11f8b835d3b6 100644
--- a/drivers/pinctrl/pinctrl-digicolor.c
+++ b/drivers/pinctrl/pinctrl-digicolor.c
@@ -337,9 +337,9 @@ static int dc_pinctrl_probe(struct platform_device *pdev)
337 pmap->dev = &pdev->dev; 337 pmap->dev = &pdev->dev;
338 338
339 pmap->pctl = pinctrl_register(pctl_desc, &pdev->dev, pmap); 339 pmap->pctl = pinctrl_register(pctl_desc, &pdev->dev, pmap);
340 if (!pmap->pctl) { 340 if (IS_ERR(pmap->pctl)) {
341 dev_err(&pdev->dev, "pinctrl driver registration failed\n"); 341 dev_err(&pdev->dev, "pinctrl driver registration failed\n");
342 return -EINVAL; 342 return PTR_ERR(pmap->pctl);
343 } 343 }
344 344
345 ret = dc_gpiochip_add(pmap, pdev->dev.of_node); 345 ret = dc_gpiochip_add(pmap, pdev->dev.of_node);
diff --git a/drivers/pinctrl/pinctrl-pistachio.c b/drivers/pinctrl/pinctrl-pistachio.c
index 3dc2ae15f3a1..952b1c623887 100644
--- a/drivers/pinctrl/pinctrl-pistachio.c
+++ b/drivers/pinctrl/pinctrl-pistachio.c
@@ -1303,20 +1303,18 @@ static int pistachio_gpio_irq_set_type(struct irq_data *data, unsigned int type)
1303 } 1303 }
1304 1304
1305 if (type & IRQ_TYPE_LEVEL_MASK) 1305 if (type & IRQ_TYPE_LEVEL_MASK)
1306 __irq_set_handler_locked(data->irq, handle_level_irq); 1306 irq_set_handler_locked(data, handle_level_irq);
1307 else 1307 else
1308 __irq_set_handler_locked(data->irq, handle_edge_irq); 1308 irq_set_handler_locked(data, handle_edge_irq);
1309 1309
1310 return 0; 1310 return 0;
1311} 1311}
1312 1312
1313static void pistachio_gpio_irq_handler(unsigned int __irq, 1313static void pistachio_gpio_irq_handler(struct irq_desc *desc)
1314 struct irq_desc *desc)
1315{ 1314{
1316 unsigned int irq = irq_desc_get_irq(desc);
1317 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 1315 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
1318 struct pistachio_gpio_bank *bank = gc_to_bank(gc); 1316 struct pistachio_gpio_bank *bank = gc_to_bank(gc);
1319 struct irq_chip *chip = irq_get_chip(irq); 1317 struct irq_chip *chip = irq_desc_get_chip(desc);
1320 unsigned long pending; 1318 unsigned long pending;
1321 unsigned int pin; 1319 unsigned int pin;
1322 1320
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index c5246c05f70c..88bb707e107a 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -1475,7 +1475,7 @@ static const struct gpio_chip rockchip_gpiolib_chip = {
1475 * Interrupt handling 1475 * Interrupt handling
1476 */ 1476 */
1477 1477
1478static void rockchip_irq_demux(unsigned int __irq, struct irq_desc *desc) 1478static void rockchip_irq_demux(struct irq_desc *desc)
1479{ 1479{
1480 struct irq_chip *chip = irq_desc_get_chip(desc); 1480 struct irq_chip *chip = irq_desc_get_chip(desc);
1481 struct rockchip_pin_bank *bank = irq_desc_get_handler_data(desc); 1481 struct rockchip_pin_bank *bank = irq_desc_get_handler_data(desc);
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index bf548c2a7a9d..ef04b962c3d5 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -1679,7 +1679,7 @@ static irqreturn_t pcs_irq_handler(int irq, void *d)
1679 * Use this if you have a separate interrupt for each 1679 * Use this if you have a separate interrupt for each
1680 * pinctrl-single instance. 1680 * pinctrl-single instance.
1681 */ 1681 */
1682static void pcs_irq_chain_handler(unsigned int irq, struct irq_desc *desc) 1682static void pcs_irq_chain_handler(struct irq_desc *desc)
1683{ 1683{
1684 struct pcs_soc_data *pcs_soc = irq_desc_get_handler_data(desc); 1684 struct pcs_soc_data *pcs_soc = irq_desc_get_handler_data(desc);
1685 struct irq_chip *chip; 1685 struct irq_chip *chip;
diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c
index f8338d2e6b6b..389526e704fb 100644
--- a/drivers/pinctrl/pinctrl-st.c
+++ b/drivers/pinctrl/pinctrl-st.c
@@ -1460,7 +1460,7 @@ static void __gpio_irq_handler(struct st_gpio_bank *bank)
1460 } 1460 }
1461} 1461}
1462 1462
1463static void st_gpio_irq_handler(unsigned irq, struct irq_desc *desc) 1463static void st_gpio_irq_handler(struct irq_desc *desc)
1464{ 1464{
1465 /* interrupt dedicated per bank */ 1465 /* interrupt dedicated per bank */
1466 struct irq_chip *chip = irq_desc_get_chip(desc); 1466 struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -1472,7 +1472,7 @@ static void st_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
1472 chained_irq_exit(chip, desc); 1472 chained_irq_exit(chip, desc);
1473} 1473}
1474 1474
1475static void st_gpio_irqmux_handler(unsigned irq, struct irq_desc *desc) 1475static void st_gpio_irqmux_handler(struct irq_desc *desc)
1476{ 1476{
1477 struct irq_chip *chip = irq_desc_get_chip(desc); 1477 struct irq_chip *chip = irq_desc_get_chip(desc);
1478 struct st_pinctrl *info = irq_desc_get_handler_data(desc); 1478 struct st_pinctrl *info = irq_desc_get_handler_data(desc);
diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index 67e08cb315c4..29984b36926a 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -313,8 +313,7 @@ static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev,
313 313
314 /* See if this pctldev has this function */ 314 /* See if this pctldev has this function */
315 while (selector < nfuncs) { 315 while (selector < nfuncs) {
316 const char *fname = ops->get_function_name(pctldev, 316 const char *fname = ops->get_function_name(pctldev, selector);
317 selector);
318 317
319 if (!strcmp(function, fname)) 318 if (!strcmp(function, fname))
320 return selector; 319 return selector;
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 492cdd51dc5c..a0c7407c1cac 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -765,9 +765,8 @@ static struct irq_chip msm_gpio_irq_chip = {
765 .irq_set_wake = msm_gpio_irq_set_wake, 765 .irq_set_wake = msm_gpio_irq_set_wake,
766}; 766};
767 767
768static void msm_gpio_irq_handler(unsigned int __irq, struct irq_desc *desc) 768static void msm_gpio_irq_handler(struct irq_desc *desc)
769{ 769{
770 unsigned int irq = irq_desc_get_irq(desc);
771 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 770 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
772 const struct msm_pingroup *g; 771 const struct msm_pingroup *g;
773 struct msm_pinctrl *pctrl = to_msm_pinctrl(gc); 772 struct msm_pinctrl *pctrl = to_msm_pinctrl(gc);
@@ -795,7 +794,7 @@ static void msm_gpio_irq_handler(unsigned int __irq, struct irq_desc *desc)
795 794
796 /* No interrupts were flagged */ 795 /* No interrupts were flagged */
797 if (handled == 0) 796 if (handled == 0)
798 handle_bad_irq(irq, desc); 797 handle_bad_irq(desc);
799 798
800 chained_irq_exit(chip, desc); 799 chained_irq_exit(chip, desc);
801} 800}
diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
index c978b311031b..e1a3721bc8e5 100644
--- a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
+++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
@@ -723,9 +723,9 @@ static int pm8xxx_gpio_probe(struct platform_device *pdev)
723#endif 723#endif
724 724
725 pctrl->pctrl = pinctrl_register(&pctrl->desc, &pdev->dev, pctrl); 725 pctrl->pctrl = pinctrl_register(&pctrl->desc, &pdev->dev, pctrl);
726 if (!pctrl->pctrl) { 726 if (IS_ERR(pctrl->pctrl)) {
727 dev_err(&pdev->dev, "couldn't register pm8xxx gpio driver\n"); 727 dev_err(&pdev->dev, "couldn't register pm8xxx gpio driver\n");
728 return -ENODEV; 728 return PTR_ERR(pctrl->pctrl);
729 } 729 }
730 730
731 pctrl->chip = pm8xxx_gpio_template; 731 pctrl->chip = pm8xxx_gpio_template;
diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c
index 2d1b69f171be..6652b8d7f707 100644
--- a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c
+++ b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c
@@ -814,9 +814,9 @@ static int pm8xxx_mpp_probe(struct platform_device *pdev)
814#endif 814#endif
815 815
816 pctrl->pctrl = pinctrl_register(&pctrl->desc, &pdev->dev, pctrl); 816 pctrl->pctrl = pinctrl_register(&pctrl->desc, &pdev->dev, pctrl);
817 if (!pctrl->pctrl) { 817 if (IS_ERR(pctrl->pctrl)) {
818 dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n"); 818 dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n");
819 return -ENODEV; 819 return PTR_ERR(pctrl->pctrl);
820 } 820 }
821 821
822 pctrl->chip = pm8xxx_mpp_template; 822 pctrl->chip = pm8xxx_mpp_template;
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 5f45caaef46d..71ccf6a90b22 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -419,7 +419,7 @@ static const struct of_device_id exynos_wkup_irq_ids[] = {
419}; 419};
420 420
421/* interrupt handler for wakeup interrupts 0..15 */ 421/* interrupt handler for wakeup interrupts 0..15 */
422static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc) 422static void exynos_irq_eint0_15(struct irq_desc *desc)
423{ 423{
424 struct exynos_weint_data *eintd = irq_desc_get_handler_data(desc); 424 struct exynos_weint_data *eintd = irq_desc_get_handler_data(desc);
425 struct samsung_pin_bank *bank = eintd->bank; 425 struct samsung_pin_bank *bank = eintd->bank;
@@ -451,7 +451,7 @@ static inline void exynos_irq_demux_eint(unsigned long pend,
451} 451}
452 452
453/* interrupt handler for wakeup interrupt 16 */ 453/* interrupt handler for wakeup interrupt 16 */
454static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) 454static void exynos_irq_demux_eint16_31(struct irq_desc *desc)
455{ 455{
456 struct irq_chip *chip = irq_desc_get_chip(desc); 456 struct irq_chip *chip = irq_desc_get_chip(desc);
457 struct exynos_muxed_weint_data *eintd = irq_desc_get_handler_data(desc); 457 struct exynos_muxed_weint_data *eintd = irq_desc_get_handler_data(desc);
diff --git a/drivers/pinctrl/samsung/pinctrl-s3c24xx.c b/drivers/pinctrl/samsung/pinctrl-s3c24xx.c
index 019844d479bb..3d92f827da7a 100644
--- a/drivers/pinctrl/samsung/pinctrl-s3c24xx.c
+++ b/drivers/pinctrl/samsung/pinctrl-s3c24xx.c
@@ -240,7 +240,7 @@ static struct irq_chip s3c2410_eint0_3_chip = {
240 .irq_set_type = s3c24xx_eint_type, 240 .irq_set_type = s3c24xx_eint_type,
241}; 241};
242 242
243static void s3c2410_demux_eint0_3(unsigned int irq, struct irq_desc *desc) 243static void s3c2410_demux_eint0_3(struct irq_desc *desc)
244{ 244{
245 struct irq_data *data = irq_desc_get_irq_data(desc); 245 struct irq_data *data = irq_desc_get_irq_data(desc);
246 struct s3c24xx_eint_data *eint_data = irq_desc_get_handler_data(desc); 246 struct s3c24xx_eint_data *eint_data = irq_desc_get_handler_data(desc);
@@ -295,7 +295,7 @@ static struct irq_chip s3c2412_eint0_3_chip = {
295 .irq_set_type = s3c24xx_eint_type, 295 .irq_set_type = s3c24xx_eint_type,
296}; 296};
297 297
298static void s3c2412_demux_eint0_3(unsigned int irq, struct irq_desc *desc) 298static void s3c2412_demux_eint0_3(struct irq_desc *desc)
299{ 299{
300 struct s3c24xx_eint_data *eint_data = irq_desc_get_handler_data(desc); 300 struct s3c24xx_eint_data *eint_data = irq_desc_get_handler_data(desc);
301 struct irq_data *data = irq_desc_get_irq_data(desc); 301 struct irq_data *data = irq_desc_get_irq_data(desc);
@@ -361,7 +361,7 @@ static inline void s3c24xx_demux_eint(struct irq_desc *desc,
361 u32 offset, u32 range) 361 u32 offset, u32 range)
362{ 362{
363 struct s3c24xx_eint_data *data = irq_desc_get_handler_data(desc); 363 struct s3c24xx_eint_data *data = irq_desc_get_handler_data(desc);
364 struct irq_chip *chip = irq_desc_get_irq_chip(desc); 364 struct irq_chip *chip = irq_desc_get_chip(desc);
365 struct samsung_pinctrl_drv_data *d = data->drvdata; 365 struct samsung_pinctrl_drv_data *d = data->drvdata;
366 unsigned int pend, mask; 366 unsigned int pend, mask;
367 367
@@ -388,12 +388,12 @@ static inline void s3c24xx_demux_eint(struct irq_desc *desc,
388 chained_irq_exit(chip, desc); 388 chained_irq_exit(chip, desc);
389} 389}
390 390
391static void s3c24xx_demux_eint4_7(unsigned int irq, struct irq_desc *desc) 391static void s3c24xx_demux_eint4_7(struct irq_desc *desc)
392{ 392{
393 s3c24xx_demux_eint(desc, 0, 0xf0); 393 s3c24xx_demux_eint(desc, 0, 0xf0);
394} 394}
395 395
396static void s3c24xx_demux_eint8_23(unsigned int irq, struct irq_desc *desc) 396static void s3c24xx_demux_eint8_23(struct irq_desc *desc)
397{ 397{
398 s3c24xx_demux_eint(desc, 8, 0xffff00); 398 s3c24xx_demux_eint(desc, 8, 0xffff00);
399} 399}
diff --git a/drivers/pinctrl/samsung/pinctrl-s3c64xx.c b/drivers/pinctrl/samsung/pinctrl-s3c64xx.c
index f5ea40a69711..43407ab248f5 100644
--- a/drivers/pinctrl/samsung/pinctrl-s3c64xx.c
+++ b/drivers/pinctrl/samsung/pinctrl-s3c64xx.c
@@ -407,7 +407,7 @@ static const struct irq_domain_ops s3c64xx_gpio_irqd_ops = {
407 .xlate = irq_domain_xlate_twocell, 407 .xlate = irq_domain_xlate_twocell,
408}; 408};
409 409
410static void s3c64xx_eint_gpio_irq(unsigned int irq, struct irq_desc *desc) 410static void s3c64xx_eint_gpio_irq(struct irq_desc *desc)
411{ 411{
412 struct irq_chip *chip = irq_desc_get_chip(desc); 412 struct irq_chip *chip = irq_desc_get_chip(desc);
413 struct s3c64xx_eint_gpio_data *data = irq_desc_get_handler_data(desc); 413 struct s3c64xx_eint_gpio_data *data = irq_desc_get_handler_data(desc);
@@ -631,22 +631,22 @@ static inline void s3c64xx_irq_demux_eint(struct irq_desc *desc, u32 range)
631 chained_irq_exit(chip, desc); 631 chained_irq_exit(chip, desc);
632} 632}
633 633
634static void s3c64xx_demux_eint0_3(unsigned int irq, struct irq_desc *desc) 634static void s3c64xx_demux_eint0_3(struct irq_desc *desc)
635{ 635{
636 s3c64xx_irq_demux_eint(desc, 0xf); 636 s3c64xx_irq_demux_eint(desc, 0xf);
637} 637}
638 638
639static void s3c64xx_demux_eint4_11(unsigned int irq, struct irq_desc *desc) 639static void s3c64xx_demux_eint4_11(struct irq_desc *desc)
640{ 640{
641 s3c64xx_irq_demux_eint(desc, 0xff0); 641 s3c64xx_irq_demux_eint(desc, 0xff0);
642} 642}
643 643
644static void s3c64xx_demux_eint12_19(unsigned int irq, struct irq_desc *desc) 644static void s3c64xx_demux_eint12_19(struct irq_desc *desc)
645{ 645{
646 s3c64xx_irq_demux_eint(desc, 0xff000); 646 s3c64xx_irq_demux_eint(desc, 0xff000);
647} 647}
648 648
649static void s3c64xx_demux_eint20_27(unsigned int irq, struct irq_desc *desc) 649static void s3c64xx_demux_eint20_27(struct irq_desc *desc)
650{ 650{
651 s3c64xx_irq_demux_eint(desc, 0xff00000); 651 s3c64xx_irq_demux_eint(desc, 0xff00000);
652} 652}
diff --git a/drivers/pinctrl/sirf/pinctrl-atlas7.c b/drivers/pinctrl/sirf/pinctrl-atlas7.c
index 9df0c5f25824..0d24d9e4b70c 100644
--- a/drivers/pinctrl/sirf/pinctrl-atlas7.c
+++ b/drivers/pinctrl/sirf/pinctrl-atlas7.c
@@ -4489,7 +4489,7 @@ static struct irq_chip atlas7_gpio_irq_chip = {
4489 .irq_set_type = atlas7_gpio_irq_type, 4489 .irq_set_type = atlas7_gpio_irq_type,
4490}; 4490};
4491 4491
4492static void atlas7_gpio_handle_irq(unsigned int __irq, struct irq_desc *desc) 4492static void atlas7_gpio_handle_irq(struct irq_desc *desc)
4493{ 4493{
4494 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 4494 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
4495 struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(gc); 4495 struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(gc);
@@ -4512,7 +4512,7 @@ static void atlas7_gpio_handle_irq(unsigned int __irq, struct irq_desc *desc)
4512 if (!status) { 4512 if (!status) {
4513 pr_warn("%s: gpio [%s] status %#x no interrupt is flaged\n", 4513 pr_warn("%s: gpio [%s] status %#x no interrupt is flaged\n",
4514 __func__, gc->label, status); 4514 __func__, gc->label, status);
4515 handle_bad_irq(irq, desc); 4515 handle_bad_irq(desc);
4516 return; 4516 return;
4517 } 4517 }
4518 4518
diff --git a/drivers/pinctrl/sirf/pinctrl-sirf.c b/drivers/pinctrl/sirf/pinctrl-sirf.c
index f8bd9fb52033..2a8d69725de8 100644
--- a/drivers/pinctrl/sirf/pinctrl-sirf.c
+++ b/drivers/pinctrl/sirf/pinctrl-sirf.c
@@ -545,7 +545,7 @@ static struct irq_chip sirfsoc_irq_chip = {
545 .irq_set_type = sirfsoc_gpio_irq_type, 545 .irq_set_type = sirfsoc_gpio_irq_type,
546}; 546};
547 547
548static void sirfsoc_gpio_handle_irq(unsigned int __irq, struct irq_desc *desc) 548static void sirfsoc_gpio_handle_irq(struct irq_desc *desc)
549{ 549{
550 unsigned int irq = irq_desc_get_irq(desc); 550 unsigned int irq = irq_desc_get_irq(desc);
551 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 551 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
@@ -570,7 +570,7 @@ static void sirfsoc_gpio_handle_irq(unsigned int __irq, struct irq_desc *desc)
570 printk(KERN_WARNING 570 printk(KERN_WARNING
571 "%s: gpio id %d status %#x no interrupt is flagged\n", 571 "%s: gpio id %d status %#x no interrupt is flagged\n",
572 __func__, bank->id, status); 572 __func__, bank->id, status);
573 handle_bad_irq(irq, desc); 573 handle_bad_irq(desc);
574 return; 574 return;
575 } 575 }
576 576
diff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear/pinctrl-plgpio.c
index ae8f29fb5536..1f0af250dbb5 100644
--- a/drivers/pinctrl/spear/pinctrl-plgpio.c
+++ b/drivers/pinctrl/spear/pinctrl-plgpio.c
@@ -356,7 +356,7 @@ static struct irq_chip plgpio_irqchip = {
356 .irq_set_type = plgpio_irq_set_type, 356 .irq_set_type = plgpio_irq_set_type,
357}; 357};
358 358
359static void plgpio_irq_handler(unsigned irq, struct irq_desc *desc) 359static void plgpio_irq_handler(struct irq_desc *desc)
360{ 360{
361 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 361 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
362 struct plgpio *plgpio = container_of(gc, struct plgpio, chip); 362 struct plgpio *plgpio = container_of(gc, struct plgpio, chip);
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index fb4669c0ce0e..38e0c7bdd2ac 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -617,13 +617,11 @@ static int sunxi_pinctrl_irq_set_type(struct irq_data *d, unsigned int type)
617 spin_lock_irqsave(&pctl->lock, flags); 617 spin_lock_irqsave(&pctl->lock, flags);
618 618
619 if (type & IRQ_TYPE_LEVEL_MASK) 619 if (type & IRQ_TYPE_LEVEL_MASK)
620 __irq_set_chip_handler_name_locked(d->irq, 620 irq_set_chip_handler_name_locked(d, &sunxi_pinctrl_level_irq_chip,
621 &sunxi_pinctrl_level_irq_chip, 621 handle_fasteoi_irq, NULL);
622 handle_fasteoi_irq, NULL);
623 else 622 else
624 __irq_set_chip_handler_name_locked(d->irq, 623 irq_set_chip_handler_name_locked(d, &sunxi_pinctrl_edge_irq_chip,
625 &sunxi_pinctrl_edge_irq_chip, 624 handle_edge_irq, NULL);
626 handle_edge_irq, NULL);
627 625
628 regval = readl(pctl->membase + reg); 626 regval = readl(pctl->membase + reg);
629 regval &= ~(IRQ_CFG_IRQ_MASK << index); 627 regval &= ~(IRQ_CFG_IRQ_MASK << index);
@@ -742,7 +740,7 @@ static struct irq_domain_ops sunxi_pinctrl_irq_domain_ops = {
742 .xlate = sunxi_pinctrl_irq_of_xlate, 740 .xlate = sunxi_pinctrl_irq_of_xlate,
743}; 741};
744 742
745static void sunxi_pinctrl_irq_handler(unsigned __irq, struct irq_desc *desc) 743static void sunxi_pinctrl_irq_handler(struct irq_desc *desc)
746{ 744{
747 unsigned int irq = irq_desc_get_irq(desc); 745 unsigned int irq = irq_desc_get_irq(desc);
748 struct irq_chip *chip = irq_desc_get_chip(desc); 746 struct irq_chip *chip = irq_desc_get_chip(desc);
diff --git a/drivers/platform/x86/asus-nb-wmi.c b/drivers/platform/x86/asus-nb-wmi.c
index abdaed34c728..131fee2b093e 100644
--- a/drivers/platform/x86/asus-nb-wmi.c
+++ b/drivers/platform/x86/asus-nb-wmi.c
@@ -128,6 +128,24 @@ static const struct dmi_system_id asus_quirks[] = {
128 }, 128 },
129 { 129 {
130 .callback = dmi_matched, 130 .callback = dmi_matched,
131 .ident = "ASUSTeK COMPUTER INC. X456UA",
132 .matches = {
133 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
134 DMI_MATCH(DMI_PRODUCT_NAME, "X456UA"),
135 },
136 .driver_data = &quirk_asus_wapf4,
137 },
138 {
139 .callback = dmi_matched,
140 .ident = "ASUSTeK COMPUTER INC. X456UF",
141 .matches = {
142 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
143 DMI_MATCH(DMI_PRODUCT_NAME, "X456UF"),
144 },
145 .driver_data = &quirk_asus_wapf4,
146 },
147 {
148 .callback = dmi_matched,
131 .ident = "ASUSTeK COMPUTER INC. X501U", 149 .ident = "ASUSTeK COMPUTER INC. X501U",
132 .matches = { 150 .matches = {
133 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), 151 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c
index 06697315a088..fb4dd7b3ee71 100644
--- a/drivers/platform/x86/hp-wmi.c
+++ b/drivers/platform/x86/hp-wmi.c
@@ -54,8 +54,9 @@ MODULE_ALIAS("wmi:5FB7F034-2C63-45e9-BE91-3D44E2C707E4");
54#define HPWMI_HARDWARE_QUERY 0x4 54#define HPWMI_HARDWARE_QUERY 0x4
55#define HPWMI_WIRELESS_QUERY 0x5 55#define HPWMI_WIRELESS_QUERY 0x5
56#define HPWMI_BIOS_QUERY 0x9 56#define HPWMI_BIOS_QUERY 0x9
57#define HPWMI_FEATURE_QUERY 0xb
57#define HPWMI_HOTKEY_QUERY 0xc 58#define HPWMI_HOTKEY_QUERY 0xc
58#define HPWMI_FEATURE_QUERY 0xd 59#define HPWMI_FEATURE2_QUERY 0xd
59#define HPWMI_WIRELESS2_QUERY 0x1b 60#define HPWMI_WIRELESS2_QUERY 0x1b
60#define HPWMI_POSTCODEERROR_QUERY 0x2a 61#define HPWMI_POSTCODEERROR_QUERY 0x2a
61 62
@@ -295,25 +296,33 @@ static int hp_wmi_tablet_state(void)
295 return (state & 0x4) ? 1 : 0; 296 return (state & 0x4) ? 1 : 0;
296} 297}
297 298
298static int __init hp_wmi_bios_2009_later(void) 299static int __init hp_wmi_bios_2008_later(void)
299{ 300{
300 int state = 0; 301 int state = 0;
301 int ret = hp_wmi_perform_query(HPWMI_FEATURE_QUERY, 0, &state, 302 int ret = hp_wmi_perform_query(HPWMI_FEATURE_QUERY, 0, &state,
302 sizeof(state), sizeof(state)); 303 sizeof(state), sizeof(state));
303 if (ret) 304 if (!ret)
304 return ret; 305 return 1;
305 306
306 return (state & 0x10) ? 1 : 0; 307 return (ret == HPWMI_RET_UNKNOWN_CMDTYPE) ? 0 : -ENXIO;
307} 308}
308 309
309static int hp_wmi_enable_hotkeys(void) 310static int __init hp_wmi_bios_2009_later(void)
310{ 311{
311 int ret; 312 int state = 0;
312 int query = 0x6e; 313 int ret = hp_wmi_perform_query(HPWMI_FEATURE2_QUERY, 0, &state,
314 sizeof(state), sizeof(state));
315 if (!ret)
316 return 1;
313 317
314 ret = hp_wmi_perform_query(HPWMI_BIOS_QUERY, 1, &query, sizeof(query), 318 return (ret == HPWMI_RET_UNKNOWN_CMDTYPE) ? 0 : -ENXIO;
315 0); 319}
316 320
321static int __init hp_wmi_enable_hotkeys(void)
322{
323 int value = 0x6e;
324 int ret = hp_wmi_perform_query(HPWMI_BIOS_QUERY, 1, &value,
325 sizeof(value), 0);
317 if (ret) 326 if (ret)
318 return -EINVAL; 327 return -EINVAL;
319 return 0; 328 return 0;
@@ -663,7 +672,7 @@ static int __init hp_wmi_input_setup(void)
663 hp_wmi_tablet_state()); 672 hp_wmi_tablet_state());
664 input_sync(hp_wmi_input_dev); 673 input_sync(hp_wmi_input_dev);
665 674
666 if (hp_wmi_bios_2009_later() == 4) 675 if (!hp_wmi_bios_2009_later() && hp_wmi_bios_2008_later())
667 hp_wmi_enable_hotkeys(); 676 hp_wmi_enable_hotkeys();
668 677
669 status = wmi_install_notify_handler(HPWMI_EVENT_GUID, hp_wmi_notify, NULL); 678 status = wmi_install_notify_handler(HPWMI_EVENT_GUID, hp_wmi_notify, NULL);
diff --git a/drivers/platform/x86/toshiba_acpi.c b/drivers/platform/x86/toshiba_acpi.c
index 6740c513919c..f2372f400ddb 100644
--- a/drivers/platform/x86/toshiba_acpi.c
+++ b/drivers/platform/x86/toshiba_acpi.c
@@ -938,7 +938,7 @@ static int toshiba_usb_sleep_music_get(struct toshiba_acpi_dev *dev, u32 *state)
938 else if (result == TOS_NOT_SUPPORTED) 938 else if (result == TOS_NOT_SUPPORTED)
939 return -ENODEV; 939 return -ENODEV;
940 940
941 return result = TOS_SUCCESS ? 0 : -EIO; 941 return result == TOS_SUCCESS ? 0 : -EIO;
942} 942}
943 943
944static int toshiba_usb_sleep_music_set(struct toshiba_acpi_dev *dev, u32 state) 944static int toshiba_usb_sleep_music_set(struct toshiba_acpi_dev *dev, u32 state)
@@ -2398,11 +2398,9 @@ static int toshiba_acpi_setup_keyboard(struct toshiba_acpi_dev *dev)
2398 if (error) 2398 if (error)
2399 return error; 2399 return error;
2400 2400
2401 error = toshiba_hotkey_event_type_get(dev, &events_type); 2401 if (toshiba_hotkey_event_type_get(dev, &events_type))
2402 if (error) { 2402 pr_notice("Unable to query Hotkey Event Type\n");
2403 pr_err("Unable to query Hotkey Event Type\n"); 2403
2404 return error;
2405 }
2406 dev->hotkey_event_type = events_type; 2404 dev->hotkey_event_type = events_type;
2407 2405
2408 dev->hotkey_dev = input_allocate_device(); 2406 dev->hotkey_dev = input_allocate_device();
diff --git a/drivers/platform/x86/wmi.c b/drivers/platform/x86/wmi.c
index aac47573f9ed..eb391a281833 100644
--- a/drivers/platform/x86/wmi.c
+++ b/drivers/platform/x86/wmi.c
@@ -194,34 +194,6 @@ static bool wmi_parse_guid(const u8 *src, u8 *dest)
194 return true; 194 return true;
195} 195}
196 196
197/*
198 * Convert a raw GUID to the ACII string representation
199 */
200static int wmi_gtoa(const char *in, char *out)
201{
202 int i;
203
204 for (i = 3; i >= 0; i--)
205 out += sprintf(out, "%02X", in[i] & 0xFF);
206
207 out += sprintf(out, "-");
208 out += sprintf(out, "%02X", in[5] & 0xFF);
209 out += sprintf(out, "%02X", in[4] & 0xFF);
210 out += sprintf(out, "-");
211 out += sprintf(out, "%02X", in[7] & 0xFF);
212 out += sprintf(out, "%02X", in[6] & 0xFF);
213 out += sprintf(out, "-");
214 out += sprintf(out, "%02X", in[8] & 0xFF);
215 out += sprintf(out, "%02X", in[9] & 0xFF);
216 out += sprintf(out, "-");
217
218 for (i = 10; i <= 15; i++)
219 out += sprintf(out, "%02X", in[i] & 0xFF);
220
221 *out = '\0';
222 return 0;
223}
224
225static bool find_guid(const char *guid_string, struct wmi_block **out) 197static bool find_guid(const char *guid_string, struct wmi_block **out)
226{ 198{
227 char tmp[16], guid_input[16]; 199 char tmp[16], guid_input[16];
@@ -457,11 +429,7 @@ EXPORT_SYMBOL_GPL(wmi_set_block);
457 429
458static void wmi_dump_wdg(const struct guid_block *g) 430static void wmi_dump_wdg(const struct guid_block *g)
459{ 431{
460 char guid_string[37]; 432 pr_info("%pUL:\n", g->guid);
461
462 wmi_gtoa(g->guid, guid_string);
463
464 pr_info("%s:\n", guid_string);
465 pr_info("\tobject_id: %c%c\n", g->object_id[0], g->object_id[1]); 433 pr_info("\tobject_id: %c%c\n", g->object_id[0], g->object_id[1]);
466 pr_info("\tnotify_id: %02X\n", g->notify_id); 434 pr_info("\tnotify_id: %02X\n", g->notify_id);
467 pr_info("\treserved: %02X\n", g->reserved); 435 pr_info("\treserved: %02X\n", g->reserved);
@@ -661,7 +629,6 @@ EXPORT_SYMBOL_GPL(wmi_has_guid);
661static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 629static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
662 char *buf) 630 char *buf)
663{ 631{
664 char guid_string[37];
665 struct wmi_block *wblock; 632 struct wmi_block *wblock;
666 633
667 wblock = dev_get_drvdata(dev); 634 wblock = dev_get_drvdata(dev);
@@ -670,9 +637,7 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
670 return strlen(buf); 637 return strlen(buf);
671 } 638 }
672 639
673 wmi_gtoa(wblock->gblock.guid, guid_string); 640 return sprintf(buf, "wmi:%pUL\n", wblock->gblock.guid);
674
675 return sprintf(buf, "wmi:%s\n", guid_string);
676} 641}
677static DEVICE_ATTR_RO(modalias); 642static DEVICE_ATTR_RO(modalias);
678 643
@@ -695,7 +660,7 @@ static int wmi_dev_uevent(struct device *dev, struct kobj_uevent_env *env)
695 if (!wblock) 660 if (!wblock)
696 return -ENOMEM; 661 return -ENOMEM;
697 662
698 wmi_gtoa(wblock->gblock.guid, guid_string); 663 sprintf(guid_string, "%pUL", wblock->gblock.guid);
699 664
700 strcpy(&env->buf[env->buflen - 1], "wmi:"); 665 strcpy(&env->buf[env->buflen - 1], "wmi:");
701 memcpy(&env->buf[env->buflen - 1 + 4], guid_string, 36); 666 memcpy(&env->buf[env->buflen - 1 + 4], guid_string, 36);
@@ -721,12 +686,9 @@ static struct class wmi_class = {
721static int wmi_create_device(const struct guid_block *gblock, 686static int wmi_create_device(const struct guid_block *gblock,
722 struct wmi_block *wblock, acpi_handle handle) 687 struct wmi_block *wblock, acpi_handle handle)
723{ 688{
724 char guid_string[37];
725
726 wblock->dev.class = &wmi_class; 689 wblock->dev.class = &wmi_class;
727 690
728 wmi_gtoa(gblock->guid, guid_string); 691 dev_set_name(&wblock->dev, "%pUL", gblock->guid);
729 dev_set_name(&wblock->dev, "%s", guid_string);
730 692
731 dev_set_drvdata(&wblock->dev, wblock); 693 dev_set_drvdata(&wblock->dev, wblock);
732 694
@@ -877,7 +839,6 @@ static void acpi_wmi_notify(struct acpi_device *device, u32 event)
877 struct guid_block *block; 839 struct guid_block *block;
878 struct wmi_block *wblock; 840 struct wmi_block *wblock;
879 struct list_head *p; 841 struct list_head *p;
880 char guid_string[37];
881 842
882 list_for_each(p, &wmi_block_list) { 843 list_for_each(p, &wmi_block_list) {
883 wblock = list_entry(p, struct wmi_block, list); 844 wblock = list_entry(p, struct wmi_block, list);
@@ -888,8 +849,8 @@ static void acpi_wmi_notify(struct acpi_device *device, u32 event)
888 if (wblock->handler) 849 if (wblock->handler)
889 wblock->handler(event, wblock->handler_data); 850 wblock->handler(event, wblock->handler_data);
890 if (debug_event) { 851 if (debug_event) {
891 wmi_gtoa(wblock->gblock.guid, guid_string); 852 pr_info("DEBUG Event GUID: %pUL\n",
892 pr_info("DEBUG Event GUID: %s\n", guid_string); 853 wblock->gblock.guid);
893 } 854 }
894 855
895 acpi_bus_generate_netlink_event( 856 acpi_bus_generate_netlink_event(
diff --git a/drivers/power/twl4030_charger.c b/drivers/power/twl4030_charger.c
index f4f2c1f76c32..74f2d3ff1d7c 100644
--- a/drivers/power/twl4030_charger.c
+++ b/drivers/power/twl4030_charger.c
@@ -91,7 +91,7 @@
91#define TWL4030_MSTATEC_COMPLETE1 0x0b 91#define TWL4030_MSTATEC_COMPLETE1 0x0b
92#define TWL4030_MSTATEC_COMPLETE4 0x0e 92#define TWL4030_MSTATEC_COMPLETE4 0x0e
93 93
94#if IS_ENABLED(CONFIG_TWL4030_MADC) 94#if IS_REACHABLE(CONFIG_TWL4030_MADC)
95/* 95/*
96 * If AC (Accessory Charger) voltage exceeds 4.5V (MADC 11) 96 * If AC (Accessory Charger) voltage exceeds 4.5V (MADC 11)
97 * then AC is available. 97 * then AC is available.
@@ -1057,13 +1057,9 @@ static int twl4030_bci_probe(struct platform_device *pdev)
1057 1057
1058 phynode = of_find_compatible_node(bci->dev->of_node->parent, 1058 phynode = of_find_compatible_node(bci->dev->of_node->parent,
1059 NULL, "ti,twl4030-usb"); 1059 NULL, "ti,twl4030-usb");
1060 if (phynode) { 1060 if (phynode)
1061 bci->transceiver = devm_usb_get_phy_by_node( 1061 bci->transceiver = devm_usb_get_phy_by_node(
1062 bci->dev, phynode, &bci->usb_nb); 1062 bci->dev, phynode, &bci->usb_nb);
1063 if (IS_ERR(bci->transceiver) &&
1064 PTR_ERR(bci->transceiver) == -EPROBE_DEFER)
1065 return -EPROBE_DEFER;
1066 }
1067 } 1063 }
1068 1064
1069 /* Enable interrupts now. */ 1065 /* Enable interrupts now. */
diff --git a/drivers/regulator/anatop-regulator.c b/drivers/regulator/anatop-regulator.c
index 738adfa5332b..52ea605f8130 100644
--- a/drivers/regulator/anatop-regulator.c
+++ b/drivers/regulator/anatop-regulator.c
@@ -318,6 +318,7 @@ static const struct of_device_id of_anatop_regulator_match_tbl[] = {
318 { .compatible = "fsl,anatop-regulator", }, 318 { .compatible = "fsl,anatop-regulator", },
319 { /* end */ } 319 { /* end */ }
320}; 320};
321MODULE_DEVICE_TABLE(of, of_anatop_regulator_match_tbl);
321 322
322static struct platform_driver anatop_regulator_driver = { 323static struct platform_driver anatop_regulator_driver = {
323 .driver = { 324 .driver = {
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 7a85ac9e32c5..7849187d91ae 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -1394,15 +1394,15 @@ static int regulator_resolve_supply(struct regulator_dev *rdev)
1394 return 0; 1394 return 0;
1395 1395
1396 r = regulator_dev_lookup(dev, rdev->supply_name, &ret); 1396 r = regulator_dev_lookup(dev, rdev->supply_name, &ret);
1397 if (ret == -ENODEV) {
1398 /*
1399 * No supply was specified for this regulator and
1400 * there will never be one.
1401 */
1402 return 0;
1403 }
1404
1405 if (!r) { 1397 if (!r) {
1398 if (ret == -ENODEV) {
1399 /*
1400 * No supply was specified for this regulator and
1401 * there will never be one.
1402 */
1403 return 0;
1404 }
1405
1406 if (have_full_constraints()) { 1406 if (have_full_constraints()) {
1407 r = dummy_regulator_rdev; 1407 r = dummy_regulator_rdev;
1408 } else { 1408 } else {
@@ -1422,11 +1422,10 @@ static int regulator_resolve_supply(struct regulator_dev *rdev)
1422 return ret; 1422 return ret;
1423 1423
1424 /* Cascade always-on state to supply */ 1424 /* Cascade always-on state to supply */
1425 if (_regulator_is_enabled(rdev)) { 1425 if (_regulator_is_enabled(rdev) && rdev->supply) {
1426 ret = regulator_enable(rdev->supply); 1426 ret = regulator_enable(rdev->supply);
1427 if (ret < 0) { 1427 if (ret < 0) {
1428 if (rdev->supply) 1428 _regulator_put(rdev->supply);
1429 _regulator_put(rdev->supply);
1430 return ret; 1429 return ret;
1431 } 1430 }
1432 } 1431 }
diff --git a/drivers/regulator/gpio-regulator.c b/drivers/regulator/gpio-regulator.c
index 464018de7e97..7bba8b747f30 100644
--- a/drivers/regulator/gpio-regulator.c
+++ b/drivers/regulator/gpio-regulator.c
@@ -394,6 +394,7 @@ static const struct of_device_id regulator_gpio_of_match[] = {
394 { .compatible = "regulator-gpio", }, 394 { .compatible = "regulator-gpio", },
395 {}, 395 {},
396}; 396};
397MODULE_DEVICE_TABLE(of, regulator_gpio_of_match);
397#endif 398#endif
398 399
399static struct platform_driver gpio_regulator_driver = { 400static struct platform_driver gpio_regulator_driver = {
diff --git a/drivers/regulator/pbias-regulator.c b/drivers/regulator/pbias-regulator.c
index 4fa7bcaf454e..f9d74d63be7c 100644
--- a/drivers/regulator/pbias-regulator.c
+++ b/drivers/regulator/pbias-regulator.c
@@ -45,6 +45,10 @@ struct pbias_regulator_data {
45 int voltage; 45 int voltage;
46}; 46};
47 47
48struct pbias_of_data {
49 unsigned int offset;
50};
51
48static const unsigned int pbias_volt_table[] = { 52static const unsigned int pbias_volt_table[] = {
49 1800000, 53 1800000,
50 3000000 54 3000000
@@ -102,8 +106,35 @@ static struct of_regulator_match pbias_matches[] = {
102}; 106};
103#define PBIAS_NUM_REGS ARRAY_SIZE(pbias_matches) 107#define PBIAS_NUM_REGS ARRAY_SIZE(pbias_matches)
104 108
109/* Offset from SCM general area (and syscon) base */
110
111static const struct pbias_of_data pbias_of_data_omap2 = {
112 .offset = 0x230,
113};
114
115static const struct pbias_of_data pbias_of_data_omap3 = {
116 .offset = 0x2b0,
117};
118
119static const struct pbias_of_data pbias_of_data_omap4 = {
120 .offset = 0x60,
121};
122
123static const struct pbias_of_data pbias_of_data_omap5 = {
124 .offset = 0x60,
125};
126
127static const struct pbias_of_data pbias_of_data_dra7 = {
128 .offset = 0xe00,
129};
130
105static const struct of_device_id pbias_of_match[] = { 131static const struct of_device_id pbias_of_match[] = {
106 { .compatible = "ti,pbias-omap", }, 132 { .compatible = "ti,pbias-omap", },
133 { .compatible = "ti,pbias-omap2", .data = &pbias_of_data_omap2, },
134 { .compatible = "ti,pbias-omap3", .data = &pbias_of_data_omap3, },
135 { .compatible = "ti,pbias-omap4", .data = &pbias_of_data_omap4, },
136 { .compatible = "ti,pbias-omap5", .data = &pbias_of_data_omap5, },
137 { .compatible = "ti,pbias-dra7", .data = &pbias_of_data_dra7, },
107 {}, 138 {},
108}; 139};
109MODULE_DEVICE_TABLE(of, pbias_of_match); 140MODULE_DEVICE_TABLE(of, pbias_of_match);
@@ -118,6 +149,9 @@ static int pbias_regulator_probe(struct platform_device *pdev)
118 const struct pbias_reg_info *info; 149 const struct pbias_reg_info *info;
119 int ret = 0; 150 int ret = 0;
120 int count, idx, data_idx = 0; 151 int count, idx, data_idx = 0;
152 const struct of_device_id *match;
153 const struct pbias_of_data *data;
154 unsigned int offset;
121 155
122 count = of_regulator_match(&pdev->dev, np, pbias_matches, 156 count = of_regulator_match(&pdev->dev, np, pbias_matches,
123 PBIAS_NUM_REGS); 157 PBIAS_NUM_REGS);
@@ -133,6 +167,20 @@ static int pbias_regulator_probe(struct platform_device *pdev)
133 if (IS_ERR(syscon)) 167 if (IS_ERR(syscon))
134 return PTR_ERR(syscon); 168 return PTR_ERR(syscon);
135 169
170 match = of_match_device(of_match_ptr(pbias_of_match), &pdev->dev);
171 if (match && match->data) {
172 data = match->data;
173 offset = data->offset;
174 } else {
175 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
176 if (!res)
177 return -EINVAL;
178
179 offset = res->start;
180 dev_WARN(&pdev->dev,
181 "using legacy dt data for pbias offset\n");
182 }
183
136 cfg.regmap = syscon; 184 cfg.regmap = syscon;
137 cfg.dev = &pdev->dev; 185 cfg.dev = &pdev->dev;
138 186
@@ -145,10 +193,6 @@ static int pbias_regulator_probe(struct platform_device *pdev)
145 if (!info) 193 if (!info)
146 return -ENODEV; 194 return -ENODEV;
147 195
148 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
149 if (!res)
150 return -EINVAL;
151
152 drvdata[data_idx].syscon = syscon; 196 drvdata[data_idx].syscon = syscon;
153 drvdata[data_idx].info = info; 197 drvdata[data_idx].info = info;
154 drvdata[data_idx].desc.name = info->name; 198 drvdata[data_idx].desc.name = info->name;
@@ -158,9 +202,9 @@ static int pbias_regulator_probe(struct platform_device *pdev)
158 drvdata[data_idx].desc.volt_table = pbias_volt_table; 202 drvdata[data_idx].desc.volt_table = pbias_volt_table;
159 drvdata[data_idx].desc.n_voltages = 2; 203 drvdata[data_idx].desc.n_voltages = 2;
160 drvdata[data_idx].desc.enable_time = info->enable_time; 204 drvdata[data_idx].desc.enable_time = info->enable_time;
161 drvdata[data_idx].desc.vsel_reg = res->start; 205 drvdata[data_idx].desc.vsel_reg = offset;
162 drvdata[data_idx].desc.vsel_mask = info->vmode; 206 drvdata[data_idx].desc.vsel_mask = info->vmode;
163 drvdata[data_idx].desc.enable_reg = res->start; 207 drvdata[data_idx].desc.enable_reg = offset;
164 drvdata[data_idx].desc.enable_mask = info->enable_mask; 208 drvdata[data_idx].desc.enable_mask = info->enable_mask;
165 drvdata[data_idx].desc.enable_val = info->enable; 209 drvdata[data_idx].desc.enable_val = info->enable;
166 drvdata[data_idx].desc.disable_val = info->disable_val; 210 drvdata[data_idx].desc.disable_val = info->disable_val;
diff --git a/drivers/regulator/tps65218-regulator.c b/drivers/regulator/tps65218-regulator.c
index 7f97223f95c5..a02c1b961039 100644
--- a/drivers/regulator/tps65218-regulator.c
+++ b/drivers/regulator/tps65218-regulator.c
@@ -73,7 +73,7 @@ static const struct regulator_linear_range dcdc4_ranges[] = {
73}; 73};
74 74
75static struct tps_info tps65218_pmic_regs[] = { 75static struct tps_info tps65218_pmic_regs[] = {
76 TPS65218_INFO(DCDC1, "DCDC1", 850000, 167500), 76 TPS65218_INFO(DCDC1, "DCDC1", 850000, 1675000),
77 TPS65218_INFO(DCDC2, "DCDC2", 850000, 1675000), 77 TPS65218_INFO(DCDC2, "DCDC2", 850000, 1675000),
78 TPS65218_INFO(DCDC3, "DCDC3", 900000, 3400000), 78 TPS65218_INFO(DCDC3, "DCDC3", 900000, 3400000),
79 TPS65218_INFO(DCDC4, "DCDC4", 1175000, 3400000), 79 TPS65218_INFO(DCDC4, "DCDC4", 1175000, 3400000),
diff --git a/drivers/regulator/vexpress.c b/drivers/regulator/vexpress.c
index bed9d3ee4198..c810cbbd463f 100644
--- a/drivers/regulator/vexpress.c
+++ b/drivers/regulator/vexpress.c
@@ -103,6 +103,7 @@ static const struct of_device_id vexpress_regulator_of_match[] = {
103 { .compatible = "arm,vexpress-volt", }, 103 { .compatible = "arm,vexpress-volt", },
104 { } 104 { }
105}; 105};
106MODULE_DEVICE_TABLE(of, vexpress_regulator_of_match);
106 107
107static struct platform_driver vexpress_regulator_driver = { 108static struct platform_driver vexpress_regulator_driver = {
108 .probe = vexpress_regulator_probe, 109 .probe = vexpress_regulator_probe,
diff --git a/drivers/s390/virtio/virtio_ccw.c b/drivers/s390/virtio/virtio_ccw.c
index f8d8fdb26b72..e9fae30fafda 100644
--- a/drivers/s390/virtio/virtio_ccw.c
+++ b/drivers/s390/virtio/virtio_ccw.c
@@ -400,12 +400,16 @@ static bool virtio_ccw_kvm_notify(struct virtqueue *vq)
400static int virtio_ccw_read_vq_conf(struct virtio_ccw_device *vcdev, 400static int virtio_ccw_read_vq_conf(struct virtio_ccw_device *vcdev,
401 struct ccw1 *ccw, int index) 401 struct ccw1 *ccw, int index)
402{ 402{
403 int ret;
404
403 vcdev->config_block->index = index; 405 vcdev->config_block->index = index;
404 ccw->cmd_code = CCW_CMD_READ_VQ_CONF; 406 ccw->cmd_code = CCW_CMD_READ_VQ_CONF;
405 ccw->flags = 0; 407 ccw->flags = 0;
406 ccw->count = sizeof(struct vq_config_block); 408 ccw->count = sizeof(struct vq_config_block);
407 ccw->cda = (__u32)(unsigned long)(vcdev->config_block); 409 ccw->cda = (__u32)(unsigned long)(vcdev->config_block);
408 ccw_io_helper(vcdev, ccw, VIRTIO_CCW_DOING_READ_VQ_CONF); 410 ret = ccw_io_helper(vcdev, ccw, VIRTIO_CCW_DOING_READ_VQ_CONF);
411 if (ret)
412 return ret;
409 return vcdev->config_block->num; 413 return vcdev->config_block->num;
410} 414}
411 415
@@ -503,6 +507,10 @@ static struct virtqueue *virtio_ccw_setup_vq(struct virtio_device *vdev,
503 goto out_err; 507 goto out_err;
504 } 508 }
505 info->num = virtio_ccw_read_vq_conf(vcdev, ccw, i); 509 info->num = virtio_ccw_read_vq_conf(vcdev, ccw, i);
510 if (info->num < 0) {
511 err = info->num;
512 goto out_err;
513 }
506 size = PAGE_ALIGN(vring_size(info->num, KVM_VIRTIO_CCW_RING_ALIGN)); 514 size = PAGE_ALIGN(vring_size(info->num, KVM_VIRTIO_CCW_RING_ALIGN));
507 info->queue = alloc_pages_exact(size, GFP_KERNEL | __GFP_ZERO); 515 info->queue = alloc_pages_exact(size, GFP_KERNEL | __GFP_ZERO);
508 if (info->queue == NULL) { 516 if (info->queue == NULL) {
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index cbfc5990052b..126a48c6431e 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -1957,7 +1957,7 @@ static int scsi_mq_prep_fn(struct request *req)
1957static void scsi_mq_done(struct scsi_cmnd *cmd) 1957static void scsi_mq_done(struct scsi_cmnd *cmd)
1958{ 1958{
1959 trace_scsi_dispatch_cmd_done(cmd); 1959 trace_scsi_dispatch_cmd_done(cmd);
1960 blk_mq_complete_request(cmd->request); 1960 blk_mq_complete_request(cmd->request, cmd->request->errors);
1961} 1961}
1962 1962
1963static int scsi_queue_rq(struct blk_mq_hw_ctx *hctx, 1963static int scsi_queue_rq(struct blk_mq_hw_ctx *hctx,
diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
index 043419dcee92..8e72bcbd3d6d 100644
--- a/drivers/sh/intc/core.c
+++ b/drivers/sh/intc/core.c
@@ -65,7 +65,7 @@ void intc_set_prio_level(unsigned int irq, unsigned int level)
65 raw_spin_unlock_irqrestore(&intc_big_lock, flags); 65 raw_spin_unlock_irqrestore(&intc_big_lock, flags);
66} 66}
67 67
68static void intc_redirect_irq(unsigned int irq, struct irq_desc *desc) 68static void intc_redirect_irq(struct irq_desc *desc)
69{ 69{
70 generic_handle_irq((unsigned int)irq_desc_get_handler_data(desc)); 70 generic_handle_irq((unsigned int)irq_desc_get_handler_data(desc));
71} 71}
diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
index 7dff08e2a071..6ce7f0d26dcf 100644
--- a/drivers/sh/intc/internals.h
+++ b/drivers/sh/intc/internals.h
@@ -99,15 +99,7 @@ static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
99 */ 99 */
100static inline void activate_irq(int irq) 100static inline void activate_irq(int irq)
101{ 101{
102#ifdef CONFIG_ARM 102 irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
103 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
104 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
105 */
106 set_irq_flags(irq, IRQF_VALID);
107#else
108 /* same effect on other architectures */
109 irq_set_noprobe(irq);
110#endif
111} 103}
112 104
113static inline int intc_handle_int_cmp(const void *a, const void *b) 105static inline int intc_handle_int_cmp(const void *a, const void *b)
diff --git a/drivers/sh/intc/virq.c b/drivers/sh/intc/virq.c
index bafc51c6f0ba..e7899624aa0b 100644
--- a/drivers/sh/intc/virq.c
+++ b/drivers/sh/intc/virq.c
@@ -109,7 +109,7 @@ static int add_virq_to_pirq(unsigned int irq, unsigned int virq)
109 return 0; 109 return 0;
110} 110}
111 111
112static void intc_virq_handler(unsigned int __irq, struct irq_desc *desc) 112static void intc_virq_handler(struct irq_desc *desc)
113{ 113{
114 unsigned int irq = irq_desc_get_irq(desc); 114 unsigned int irq = irq_desc_get_irq(desc);
115 struct irq_data *data = irq_desc_get_irq_data(desc); 115 struct irq_data *data = irq_desc_get_irq_data(desc);
@@ -127,7 +127,7 @@ static void intc_virq_handler(unsigned int __irq, struct irq_desc *desc)
127 handle = (unsigned long)irq_desc_get_handler_data(vdesc); 127 handle = (unsigned long)irq_desc_get_handler_data(vdesc);
128 addr = INTC_REG(d, _INTC_ADDR_E(handle), 0); 128 addr = INTC_REG(d, _INTC_ADDR_E(handle), 0);
129 if (intc_reg_fns[_INTC_FN(handle)](addr, handle, 0)) 129 if (intc_reg_fns[_INTC_FN(handle)](addr, handle, 0))
130 generic_handle_irq_desc(entry->irq, vdesc); 130 generic_handle_irq_desc(vdesc);
131 } 131 }
132 } 132 }
133 133
diff --git a/drivers/sh/pm_runtime.c b/drivers/sh/pm_runtime.c
index d3d1891cda3c..25abd4eb7d10 100644
--- a/drivers/sh/pm_runtime.c
+++ b/drivers/sh/pm_runtime.c
@@ -35,20 +35,11 @@ static struct pm_clk_notifier_block platform_bus_notifier = {
35static int __init sh_pm_runtime_init(void) 35static int __init sh_pm_runtime_init(void)
36{ 36{
37 if (IS_ENABLED(CONFIG_ARCH_SHMOBILE_MULTI)) { 37 if (IS_ENABLED(CONFIG_ARCH_SHMOBILE_MULTI)) {
38 if (!of_machine_is_compatible("renesas,emev2") && 38 if (!of_find_compatible_node(NULL, NULL,
39 !of_machine_is_compatible("renesas,r7s72100") && 39 "renesas,cpg-mstp-clocks"))
40#ifndef CONFIG_PM_GENERIC_DOMAINS_OF 40 return 0;
41 !of_machine_is_compatible("renesas,r8a73a4") && 41 if (IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS_OF) &&
42 !of_machine_is_compatible("renesas,r8a7740") && 42 of_find_node_with_property(NULL, "#power-domain-cells"))
43 !of_machine_is_compatible("renesas,sh73a0") &&
44#endif
45 !of_machine_is_compatible("renesas,r8a7778") &&
46 !of_machine_is_compatible("renesas,r8a7779") &&
47 !of_machine_is_compatible("renesas,r8a7790") &&
48 !of_machine_is_compatible("renesas,r8a7791") &&
49 !of_machine_is_compatible("renesas,r8a7792") &&
50 !of_machine_is_compatible("renesas,r8a7793") &&
51 !of_machine_is_compatible("renesas,r8a7794"))
52 return 0; 43 return 0;
53 } 44 }
54 45
diff --git a/drivers/soc/dove/pmu.c b/drivers/soc/dove/pmu.c
index 6792aae9e2e5..052aecf29893 100644
--- a/drivers/soc/dove/pmu.c
+++ b/drivers/soc/dove/pmu.c
@@ -222,9 +222,9 @@ static void __pmu_domain_register(struct pmu_domain *domain,
222} 222}
223 223
224/* PMU IRQ controller */ 224/* PMU IRQ controller */
225static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc) 225static void pmu_irq_handler(struct irq_desc *desc)
226{ 226{
227 struct pmu_data *pmu = irq_get_handler_data(irq); 227 struct pmu_data *pmu = irq_desc_get_handler_data(desc);
228 struct irq_chip_generic *gc = pmu->irq_gc; 228 struct irq_chip_generic *gc = pmu->irq_gc;
229 struct irq_domain *domain = pmu->irq_domain; 229 struct irq_domain *domain = pmu->irq_domain;
230 void __iomem *base = gc->reg_base; 230 void __iomem *base = gc->reg_base;
@@ -232,7 +232,7 @@ static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
232 u32 done = ~0; 232 u32 done = ~0;
233 233
234 if (stat == 0) { 234 if (stat == 0) {
235 handle_bad_irq(irq, desc); 235 handle_bad_irq(desc);
236 return; 236 return;
237 } 237 }
238 238
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index bf9ed380bb1c..63318e2afba1 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -1720,6 +1720,7 @@ static int atmel_spi_runtime_resume(struct device *dev)
1720 return clk_prepare_enable(as->clk); 1720 return clk_prepare_enable(as->clk);
1721} 1721}
1722 1722
1723#ifdef CONFIG_PM_SLEEP
1723static int atmel_spi_suspend(struct device *dev) 1724static int atmel_spi_suspend(struct device *dev)
1724{ 1725{
1725 struct spi_master *master = dev_get_drvdata(dev); 1726 struct spi_master *master = dev_get_drvdata(dev);
@@ -1756,6 +1757,7 @@ static int atmel_spi_resume(struct device *dev)
1756 1757
1757 return ret; 1758 return ret;
1758} 1759}
1760#endif
1759 1761
1760static const struct dev_pm_ops atmel_spi_pm_ops = { 1762static const struct dev_pm_ops atmel_spi_pm_ops = {
1761 SET_SYSTEM_SLEEP_PM_OPS(atmel_spi_suspend, atmel_spi_resume) 1763 SET_SYSTEM_SLEEP_PM_OPS(atmel_spi_suspend, atmel_spi_resume)
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c
index e7874a6171ec..3e8eeb23d4e9 100644
--- a/drivers/spi/spi-bcm2835.c
+++ b/drivers/spi/spi-bcm2835.c
@@ -386,14 +386,14 @@ static bool bcm2835_spi_can_dma(struct spi_master *master,
386 /* otherwise we only allow transfers within the same page 386 /* otherwise we only allow transfers within the same page
387 * to avoid wasting time on dma_mapping when it is not practical 387 * to avoid wasting time on dma_mapping when it is not practical
388 */ 388 */
389 if (((size_t)tfr->tx_buf & PAGE_MASK) + tfr->len > PAGE_SIZE) { 389 if (((size_t)tfr->tx_buf & (PAGE_SIZE - 1)) + tfr->len > PAGE_SIZE) {
390 dev_warn_once(&spi->dev, 390 dev_warn_once(&spi->dev,
391 "Unaligned spi tx-transfer bridging page\n"); 391 "Unaligned spi tx-transfer bridging page\n");
392 return false; 392 return false;
393 } 393 }
394 if (((size_t)tfr->rx_buf & PAGE_MASK) + tfr->len > PAGE_SIZE) { 394 if (((size_t)tfr->rx_buf & (PAGE_SIZE - 1)) + tfr->len > PAGE_SIZE) {
395 dev_warn_once(&spi->dev, 395 dev_warn_once(&spi->dev,
396 "Unaligned spi tx-transfer bridging page\n"); 396 "Unaligned spi rx-transfer bridging page\n");
397 return false; 397 return false;
398 } 398 }
399 399
diff --git a/drivers/spi/spi-meson-spifc.c b/drivers/spi/spi-meson-spifc.c
index 5468fc70dbf8..2465259f6241 100644
--- a/drivers/spi/spi-meson-spifc.c
+++ b/drivers/spi/spi-meson-spifc.c
@@ -444,6 +444,7 @@ static const struct of_device_id meson_spifc_dt_match[] = {
444 { .compatible = "amlogic,meson6-spifc", }, 444 { .compatible = "amlogic,meson6-spifc", },
445 { }, 445 { },
446}; 446};
447MODULE_DEVICE_TABLE(of, meson_spifc_dt_match);
447 448
448static struct platform_driver meson_spifc_driver = { 449static struct platform_driver meson_spifc_driver = {
449 .probe = meson_spifc_probe, 450 .probe = meson_spifc_probe,
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 5f6315c47920..ecb6c58238c4 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -85,7 +85,7 @@ struct mtk_spi {
85 void __iomem *base; 85 void __iomem *base;
86 u32 state; 86 u32 state;
87 u32 pad_sel; 87 u32 pad_sel;
88 struct clk *spi_clk, *parent_clk; 88 struct clk *parent_clk, *sel_clk, *spi_clk;
89 struct spi_transfer *cur_transfer; 89 struct spi_transfer *cur_transfer;
90 u32 xfer_len; 90 u32 xfer_len;
91 struct scatterlist *tx_sgl, *rx_sgl; 91 struct scatterlist *tx_sgl, *rx_sgl;
@@ -173,22 +173,6 @@ static void mtk_spi_config(struct mtk_spi *mdata,
173 writel(mdata->pad_sel, mdata->base + SPI_PAD_SEL_REG); 173 writel(mdata->pad_sel, mdata->base + SPI_PAD_SEL_REG);
174} 174}
175 175
176static int mtk_spi_prepare_hardware(struct spi_master *master)
177{
178 struct spi_transfer *trans;
179 struct mtk_spi *mdata = spi_master_get_devdata(master);
180 struct spi_message *msg = master->cur_msg;
181
182 trans = list_first_entry(&msg->transfers, struct spi_transfer,
183 transfer_list);
184 if (!trans->cs_change) {
185 mdata->state = MTK_SPI_IDLE;
186 mtk_spi_reset(mdata);
187 }
188
189 return 0;
190}
191
192static int mtk_spi_prepare_message(struct spi_master *master, 176static int mtk_spi_prepare_message(struct spi_master *master,
193 struct spi_message *msg) 177 struct spi_message *msg)
194{ 178{
@@ -228,11 +212,15 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool enable)
228 struct mtk_spi *mdata = spi_master_get_devdata(spi->master); 212 struct mtk_spi *mdata = spi_master_get_devdata(spi->master);
229 213
230 reg_val = readl(mdata->base + SPI_CMD_REG); 214 reg_val = readl(mdata->base + SPI_CMD_REG);
231 if (!enable) 215 if (!enable) {
232 reg_val |= SPI_CMD_PAUSE_EN; 216 reg_val |= SPI_CMD_PAUSE_EN;
233 else 217 writel(reg_val, mdata->base + SPI_CMD_REG);
218 } else {
234 reg_val &= ~SPI_CMD_PAUSE_EN; 219 reg_val &= ~SPI_CMD_PAUSE_EN;
235 writel(reg_val, mdata->base + SPI_CMD_REG); 220 writel(reg_val, mdata->base + SPI_CMD_REG);
221 mdata->state = MTK_SPI_IDLE;
222 mtk_spi_reset(mdata);
223 }
236} 224}
237 225
238static void mtk_spi_prepare_transfer(struct spi_master *master, 226static void mtk_spi_prepare_transfer(struct spi_master *master,
@@ -509,7 +497,6 @@ static int mtk_spi_probe(struct platform_device *pdev)
509 master->mode_bits = SPI_CPOL | SPI_CPHA; 497 master->mode_bits = SPI_CPOL | SPI_CPHA;
510 498
511 master->set_cs = mtk_spi_set_cs; 499 master->set_cs = mtk_spi_set_cs;
512 master->prepare_transfer_hardware = mtk_spi_prepare_hardware;
513 master->prepare_message = mtk_spi_prepare_message; 500 master->prepare_message = mtk_spi_prepare_message;
514 master->transfer_one = mtk_spi_transfer_one; 501 master->transfer_one = mtk_spi_transfer_one;
515 master->can_dma = mtk_spi_can_dma; 502 master->can_dma = mtk_spi_can_dma;
@@ -576,13 +563,6 @@ static int mtk_spi_probe(struct platform_device *pdev)
576 goto err_put_master; 563 goto err_put_master;
577 } 564 }
578 565
579 mdata->spi_clk = devm_clk_get(&pdev->dev, "spi-clk");
580 if (IS_ERR(mdata->spi_clk)) {
581 ret = PTR_ERR(mdata->spi_clk);
582 dev_err(&pdev->dev, "failed to get spi-clk: %d\n", ret);
583 goto err_put_master;
584 }
585
586 mdata->parent_clk = devm_clk_get(&pdev->dev, "parent-clk"); 566 mdata->parent_clk = devm_clk_get(&pdev->dev, "parent-clk");
587 if (IS_ERR(mdata->parent_clk)) { 567 if (IS_ERR(mdata->parent_clk)) {
588 ret = PTR_ERR(mdata->parent_clk); 568 ret = PTR_ERR(mdata->parent_clk);
@@ -590,13 +570,27 @@ static int mtk_spi_probe(struct platform_device *pdev)
590 goto err_put_master; 570 goto err_put_master;
591 } 571 }
592 572
573 mdata->sel_clk = devm_clk_get(&pdev->dev, "sel-clk");
574 if (IS_ERR(mdata->sel_clk)) {
575 ret = PTR_ERR(mdata->sel_clk);
576 dev_err(&pdev->dev, "failed to get sel-clk: %d\n", ret);
577 goto err_put_master;
578 }
579
580 mdata->spi_clk = devm_clk_get(&pdev->dev, "spi-clk");
581 if (IS_ERR(mdata->spi_clk)) {
582 ret = PTR_ERR(mdata->spi_clk);
583 dev_err(&pdev->dev, "failed to get spi-clk: %d\n", ret);
584 goto err_put_master;
585 }
586
593 ret = clk_prepare_enable(mdata->spi_clk); 587 ret = clk_prepare_enable(mdata->spi_clk);
594 if (ret < 0) { 588 if (ret < 0) {
595 dev_err(&pdev->dev, "failed to enable spi_clk (%d)\n", ret); 589 dev_err(&pdev->dev, "failed to enable spi_clk (%d)\n", ret);
596 goto err_put_master; 590 goto err_put_master;
597 } 591 }
598 592
599 ret = clk_set_parent(mdata->spi_clk, mdata->parent_clk); 593 ret = clk_set_parent(mdata->sel_clk, mdata->parent_clk);
600 if (ret < 0) { 594 if (ret < 0) {
601 dev_err(&pdev->dev, "failed to clk_set_parent (%d)\n", ret); 595 dev_err(&pdev->dev, "failed to clk_set_parent (%d)\n", ret);
602 goto err_disable_clk; 596 goto err_disable_clk;
@@ -630,7 +624,6 @@ static int mtk_spi_remove(struct platform_device *pdev)
630 pm_runtime_disable(&pdev->dev); 624 pm_runtime_disable(&pdev->dev);
631 625
632 mtk_spi_reset(mdata); 626 mtk_spi_reset(mdata);
633 clk_disable_unprepare(mdata->spi_clk);
634 spi_master_put(master); 627 spi_master_put(master);
635 628
636 return 0; 629 return 0;
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index fdd791977041..a8ef38ebb9c9 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -654,6 +654,10 @@ static irqreturn_t ssp_int(int irq, void *dev_id)
654 if (!(sccr1_reg & SSCR1_TIE)) 654 if (!(sccr1_reg & SSCR1_TIE))
655 mask &= ~SSSR_TFS; 655 mask &= ~SSSR_TFS;
656 656
657 /* Ignore RX timeout interrupt if it is disabled */
658 if (!(sccr1_reg & SSCR1_TINTE))
659 mask &= ~SSSR_TINT;
660
657 if (!(status & mask)) 661 if (!(status & mask))
658 return IRQ_NONE; 662 return IRQ_NONE;
659 663
diff --git a/drivers/spi/spi-xtensa-xtfpga.c b/drivers/spi/spi-xtensa-xtfpga.c
index 2e32ea2f194f..be6155cba9de 100644
--- a/drivers/spi/spi-xtensa-xtfpga.c
+++ b/drivers/spi/spi-xtensa-xtfpga.c
@@ -34,13 +34,13 @@ struct xtfpga_spi {
34static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi, 34static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi,
35 unsigned addr, u32 val) 35 unsigned addr, u32 val)
36{ 36{
37 iowrite32(val, spi->regs + addr); 37 __raw_writel(val, spi->regs + addr);
38} 38}
39 39
40static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi, 40static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi,
41 unsigned addr) 41 unsigned addr)
42{ 42{
43 return ioread32(spi->regs + addr); 43 return __raw_readl(spi->regs + addr);
44} 44}
45 45
46static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi) 46static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 3abb3903f2ad..a5f53de813d3 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1610,8 +1610,7 @@ static struct class spi_master_class = {
1610 * 1610 *
1611 * The caller is responsible for assigning the bus number and initializing 1611 * The caller is responsible for assigning the bus number and initializing
1612 * the master's methods before calling spi_register_master(); and (after errors 1612 * the master's methods before calling spi_register_master(); and (after errors
1613 * adding the device) calling spi_master_put() and kfree() to prevent a memory 1613 * adding the device) calling spi_master_put() to prevent a memory leak.
1614 * leak.
1615 */ 1614 */
1616struct spi_master *spi_alloc_master(struct device *dev, unsigned size) 1615struct spi_master *spi_alloc_master(struct device *dev, unsigned size)
1617{ 1616{
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index fba92a526531..ef008e52f953 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -651,7 +651,8 @@ static int spidev_release(struct inode *inode, struct file *filp)
651 kfree(spidev->rx_buffer); 651 kfree(spidev->rx_buffer);
652 spidev->rx_buffer = NULL; 652 spidev->rx_buffer = NULL;
653 653
654 spidev->speed_hz = spidev->spi->max_speed_hz; 654 if (spidev->spi)
655 spidev->speed_hz = spidev->spi->max_speed_hz;
655 656
656 /* ... after we unbound from the underlying device? */ 657 /* ... after we unbound from the underlying device? */
657 spin_lock_irq(&spidev->spi_lock); 658 spin_lock_irq(&spidev->spi_lock);
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index bdfb3c84c3cb..4a3cf9ba152f 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -451,7 +451,7 @@ static void periph_interrupt(struct spmi_pmic_arb_dev *pa, u8 apid)
451 } 451 }
452} 452}
453 453
454static void pmic_arb_chained_irq(unsigned int irq, struct irq_desc *desc) 454static void pmic_arb_chained_irq(struct irq_desc *desc)
455{ 455{
456 struct spmi_pmic_arb_dev *pa = irq_desc_get_handler_data(desc); 456 struct spmi_pmic_arb_dev *pa = irq_desc_get_handler_data(desc);
457 struct irq_chip *chip = irq_desc_get_chip(desc); 457 struct irq_chip *chip = irq_desc_get_chip(desc);
diff --git a/drivers/staging/android/TODO b/drivers/staging/android/TODO
index 20288fc53946..8f3ac37bfe12 100644
--- a/drivers/staging/android/TODO
+++ b/drivers/staging/android/TODO
@@ -5,5 +5,25 @@ TODO:
5 - add proper arch dependencies as needed 5 - add proper arch dependencies as needed
6 - audit userspace interfaces to make sure they are sane 6 - audit userspace interfaces to make sure they are sane
7 7
8
9ion/
10 - Remove ION_IOC_SYNC: Flushing for devices should be purely a kernel internal
11 interface on top of dma-buf. flush_for_device needs to be added to dma-buf
12 first.
13 - Remove ION_IOC_CUSTOM: Atm used for cache flushing for cpu access in some
14 vendor trees. Should be replaced with an ioctl on the dma-buf to expose the
15 begin/end_cpu_access hooks to userspace.
16 - Clarify the tricks ion plays with explicitly managing coherency behind the
17 dma api's back (this is absolutely needed for high-perf gpu drivers): Add an
18 explicit coherency management mode to flush_for_device to be used by drivers
19 which want to manage caches themselves and which indicates whether cpu caches
20 need flushing.
21 - With those removed there's probably no use for ION_IOC_IMPORT anymore either
22 since ion would just be the central allocator for shared buffers.
23 - Add dt-binding to expose cma regions as ion heaps, with the rule that any
24 such cma regions must already be used by some device for dma. I.e. ion only
25 exposes existing cma regions and doesn't reserve unecessarily memory when
26 booting a system which doesn't use ion.
27
8Please send patches to Greg Kroah-Hartman <greg@kroah.com> and Cc: 28Please send patches to Greg Kroah-Hartman <greg@kroah.com> and Cc:
9Arve Hjønnevåg <arve@android.com> and Riley Andrews <riandrews@android.com> 29Arve Hjønnevåg <arve@android.com> and Riley Andrews <riandrews@android.com>
diff --git a/drivers/staging/android/ion/ion.c b/drivers/staging/android/ion/ion.c
index 217aa537c4eb..6e8d8392ca38 100644
--- a/drivers/staging/android/ion/ion.c
+++ b/drivers/staging/android/ion/ion.c
@@ -1179,13 +1179,13 @@ struct ion_handle *ion_import_dma_buf(struct ion_client *client, int fd)
1179 mutex_unlock(&client->lock); 1179 mutex_unlock(&client->lock);
1180 goto end; 1180 goto end;
1181 } 1181 }
1182 mutex_unlock(&client->lock);
1183 1182
1184 handle = ion_handle_create(client, buffer); 1183 handle = ion_handle_create(client, buffer);
1185 if (IS_ERR(handle)) 1184 if (IS_ERR(handle)) {
1185 mutex_unlock(&client->lock);
1186 goto end; 1186 goto end;
1187 }
1187 1188
1188 mutex_lock(&client->lock);
1189 ret = ion_handle_add(client, handle); 1189 ret = ion_handle_add(client, handle);
1190 mutex_unlock(&client->lock); 1190 mutex_unlock(&client->lock);
1191 if (ret) { 1191 if (ret) {
diff --git a/drivers/staging/fbtft/fb_uc1611.c b/drivers/staging/fbtft/fb_uc1611.c
index 32f3a9d921d6..5cafa50d1fac 100644
--- a/drivers/staging/fbtft/fb_uc1611.c
+++ b/drivers/staging/fbtft/fb_uc1611.c
@@ -76,7 +76,7 @@ static int init_display(struct fbtft_par *par)
76 76
77 /* Set CS active high */ 77 /* Set CS active high */
78 par->spi->mode |= SPI_CS_HIGH; 78 par->spi->mode |= SPI_CS_HIGH;
79 ret = par->spi->master->setup(par->spi); 79 ret = spi_setup(par->spi);
80 if (ret) { 80 if (ret) {
81 dev_err(par->info->device, "Could not set SPI_CS_HIGH\n"); 81 dev_err(par->info->device, "Could not set SPI_CS_HIGH\n");
82 return ret; 82 return ret;
diff --git a/drivers/staging/fbtft/fb_watterott.c b/drivers/staging/fbtft/fb_watterott.c
index 88fb2c0132d5..8eae6ef25846 100644
--- a/drivers/staging/fbtft/fb_watterott.c
+++ b/drivers/staging/fbtft/fb_watterott.c
@@ -169,7 +169,7 @@ static int init_display(struct fbtft_par *par)
169 /* enable SPI interface by having CS and MOSI low during reset */ 169 /* enable SPI interface by having CS and MOSI low during reset */
170 save_mode = par->spi->mode; 170 save_mode = par->spi->mode;
171 par->spi->mode |= SPI_CS_HIGH; 171 par->spi->mode |= SPI_CS_HIGH;
172 ret = par->spi->master->setup(par->spi); /* set CS inactive low */ 172 ret = spi_setup(par->spi); /* set CS inactive low */
173 if (ret) { 173 if (ret) {
174 dev_err(par->info->device, "Could not set SPI_CS_HIGH\n"); 174 dev_err(par->info->device, "Could not set SPI_CS_HIGH\n");
175 return ret; 175 return ret;
@@ -180,7 +180,7 @@ static int init_display(struct fbtft_par *par)
180 par->fbtftops.reset(par); 180 par->fbtftops.reset(par);
181 mdelay(1000); 181 mdelay(1000);
182 par->spi->mode = save_mode; 182 par->spi->mode = save_mode;
183 ret = par->spi->master->setup(par->spi); 183 ret = spi_setup(par->spi);
184 if (ret) { 184 if (ret) {
185 dev_err(par->info->device, "Could not restore SPI mode\n"); 185 dev_err(par->info->device, "Could not restore SPI mode\n");
186 return ret; 186 return ret;
diff --git a/drivers/staging/fbtft/fbtft-core.c b/drivers/staging/fbtft/fbtft-core.c
index 23392eb6799e..7f5fa3d1cab0 100644
--- a/drivers/staging/fbtft/fbtft-core.c
+++ b/drivers/staging/fbtft/fbtft-core.c
@@ -1436,15 +1436,11 @@ int fbtft_probe_common(struct fbtft_display *display,
1436 1436
1437 /* 9-bit SPI setup */ 1437 /* 9-bit SPI setup */
1438 if (par->spi && display->buswidth == 9) { 1438 if (par->spi && display->buswidth == 9) {
1439 par->spi->bits_per_word = 9; 1439 if (par->spi->master->bits_per_word_mask & SPI_BPW_MASK(9)) {
1440 ret = par->spi->master->setup(par->spi); 1440 par->spi->bits_per_word = 9;
1441 if (ret) { 1441 } else {
1442 dev_warn(&par->spi->dev, 1442 dev_warn(&par->spi->dev,
1443 "9-bit SPI not available, emulating using 8-bit.\n"); 1443 "9-bit SPI not available, emulating using 8-bit.\n");
1444 par->spi->bits_per_word = 8;
1445 ret = par->spi->master->setup(par->spi);
1446 if (ret)
1447 goto out_release;
1448 /* allocate buffer with room for dc bits */ 1444 /* allocate buffer with room for dc bits */
1449 par->extra = devm_kzalloc(par->info->device, 1445 par->extra = devm_kzalloc(par->info->device,
1450 par->txbuf.len + (par->txbuf.len / 8) + 8, 1446 par->txbuf.len + (par->txbuf.len / 8) + 8,
diff --git a/drivers/staging/fbtft/flexfb.c b/drivers/staging/fbtft/flexfb.c
index c763efc5de7d..3f380a0086c3 100644
--- a/drivers/staging/fbtft/flexfb.c
+++ b/drivers/staging/fbtft/flexfb.c
@@ -463,15 +463,12 @@ static int flexfb_probe_common(struct spi_device *sdev,
463 } 463 }
464 par->fbtftops.write_register = fbtft_write_reg8_bus9; 464 par->fbtftops.write_register = fbtft_write_reg8_bus9;
465 par->fbtftops.write_vmem = fbtft_write_vmem16_bus9; 465 par->fbtftops.write_vmem = fbtft_write_vmem16_bus9;
466 sdev->bits_per_word = 9; 466 if (par->spi->master->bits_per_word_mask
467 ret = sdev->master->setup(sdev); 467 & SPI_BPW_MASK(9)) {
468 if (ret) { 468 par->spi->bits_per_word = 9;
469 } else {
469 dev_warn(dev, 470 dev_warn(dev,
470 "9-bit SPI not available, emulating using 8-bit.\n"); 471 "9-bit SPI not available, emulating using 8-bit.\n");
471 sdev->bits_per_word = 8;
472 ret = sdev->master->setup(sdev);
473 if (ret)
474 goto out_release;
475 /* allocate buffer with room for dc bits */ 472 /* allocate buffer with room for dc bits */
476 par->extra = devm_kzalloc(par->info->device, 473 par->extra = devm_kzalloc(par->info->device,
477 par->txbuf.len + (par->txbuf.len / 8) + 8, 474 par->txbuf.len + (par->txbuf.len / 8) + 8,
diff --git a/drivers/staging/lustre/README.txt b/drivers/staging/lustre/README.txt
index cf0ca50ff83b..0676243eea9e 100644
--- a/drivers/staging/lustre/README.txt
+++ b/drivers/staging/lustre/README.txt
@@ -14,10 +14,8 @@ Unlike shared disk storage cluster filesystems (e.g. OCFS2, GFS, GPFS),
14Lustre has independent Metadata and Data servers that clients can access 14Lustre has independent Metadata and Data servers that clients can access
15in parallel to maximize performance. 15in parallel to maximize performance.
16 16
17In order to use Lustre client you will need to download lustre client 17In order to use Lustre client you will need to download the "lustre-client"
18tools from 18package that contains the userspace tools from http://lustre.org/download/
19https://downloads.hpdd.intel.com/public/lustre/latest-feature-release/
20the package name is lustre-client.
21 19
22You will need to install and configure your Lustre servers separately. 20You will need to install and configure your Lustre servers separately.
23 21
@@ -76,12 +74,10 @@ Mount Options
76 74
77More Information 75More Information
78================ 76================
79You can get more information at 77You can get more information at the Lustre website: http://wiki.lustre.org/
80OpenSFS website: http://lustre.opensfs.org/about/
81Intel HPDD wiki: https://wiki.hpdd.intel.com
82 78
83Out of tree Lustre client and server code is available at: 79Source for the userspace tools and out-of-tree client and server code
84http://git.whamcloud.com/fs/lustre-release.git 80is available at: http://git.hpdd.intel.com/fs/lustre-release.git
85 81
86Latest binary packages: 82Latest binary packages:
87http://lustre.opensfs.org/download-lustre/ 83http://lustre.org/download/
diff --git a/drivers/staging/most/Kconfig b/drivers/staging/most/Kconfig
index d50de03de7b9..0b9b9b539f70 100644
--- a/drivers/staging/most/Kconfig
+++ b/drivers/staging/most/Kconfig
@@ -1,5 +1,6 @@
1menuconfig MOST 1menuconfig MOST
2 tristate "MOST driver" 2 tristate "MOST driver"
3 depends on HAS_DMA
3 select MOSTCORE 4 select MOSTCORE
4 default n 5 default n
5 ---help--- 6 ---help---
diff --git a/drivers/staging/most/hdm-dim2/Kconfig b/drivers/staging/most/hdm-dim2/Kconfig
index 1d4ad1d67758..fc548769479b 100644
--- a/drivers/staging/most/hdm-dim2/Kconfig
+++ b/drivers/staging/most/hdm-dim2/Kconfig
@@ -5,6 +5,7 @@
5config HDM_DIM2 5config HDM_DIM2
6 tristate "DIM2 HDM" 6 tristate "DIM2 HDM"
7 depends on AIM_NETWORK 7 depends on AIM_NETWORK
8 depends on HAS_IOMEM
8 9
9 ---help--- 10 ---help---
10 Say Y here if you want to connect via MediaLB to network transceiver. 11 Say Y here if you want to connect via MediaLB to network transceiver.
diff --git a/drivers/staging/most/hdm-usb/Kconfig b/drivers/staging/most/hdm-usb/Kconfig
index a482c3fdf34b..ec1546312ee6 100644
--- a/drivers/staging/most/hdm-usb/Kconfig
+++ b/drivers/staging/most/hdm-usb/Kconfig
@@ -4,7 +4,7 @@
4 4
5config HDM_USB 5config HDM_USB
6 tristate "USB HDM" 6 tristate "USB HDM"
7 depends on USB 7 depends on USB && NET
8 select AIM_NETWORK 8 select AIM_NETWORK
9 ---help--- 9 ---help---
10 Say Y here if you want to connect via USB to network tranceiver. 10 Say Y here if you want to connect via USB to network tranceiver.
diff --git a/drivers/staging/most/mostcore/Kconfig b/drivers/staging/most/mostcore/Kconfig
index 38abf1b21b66..47172546d728 100644
--- a/drivers/staging/most/mostcore/Kconfig
+++ b/drivers/staging/most/mostcore/Kconfig
@@ -4,6 +4,7 @@
4 4
5config MOSTCORE 5config MOSTCORE
6 tristate "MOST Core" 6 tristate "MOST Core"
7 depends on HAS_DMA
7 8
8 ---help--- 9 ---help---
9 Say Y here if you want to enable MOST support. 10 Say Y here if you want to enable MOST support.
diff --git a/drivers/staging/rdma/Kconfig b/drivers/staging/rdma/Kconfig
index cf5fe9bb87a1..d7f62359d743 100644
--- a/drivers/staging/rdma/Kconfig
+++ b/drivers/staging/rdma/Kconfig
@@ -24,6 +24,8 @@ if STAGING_RDMA
24 24
25source "drivers/staging/rdma/amso1100/Kconfig" 25source "drivers/staging/rdma/amso1100/Kconfig"
26 26
27source "drivers/staging/rdma/ehca/Kconfig"
28
27source "drivers/staging/rdma/hfi1/Kconfig" 29source "drivers/staging/rdma/hfi1/Kconfig"
28 30
29source "drivers/staging/rdma/ipath/Kconfig" 31source "drivers/staging/rdma/ipath/Kconfig"
diff --git a/drivers/staging/rdma/Makefile b/drivers/staging/rdma/Makefile
index cbd915ac7f20..139d78ef2c24 100644
--- a/drivers/staging/rdma/Makefile
+++ b/drivers/staging/rdma/Makefile
@@ -1,4 +1,5 @@
1# Entries for RDMA_STAGING tree 1# Entries for RDMA_STAGING tree
2obj-$(CONFIG_INFINIBAND_AMSO1100) += amso1100/ 2obj-$(CONFIG_INFINIBAND_AMSO1100) += amso1100/
3obj-$(CONFIG_INFINIBAND_EHCA) += ehca/
3obj-$(CONFIG_INFINIBAND_HFI1) += hfi1/ 4obj-$(CONFIG_INFINIBAND_HFI1) += hfi1/
4obj-$(CONFIG_INFINIBAND_IPATH) += ipath/ 5obj-$(CONFIG_INFINIBAND_IPATH) += ipath/
diff --git a/drivers/infiniband/hw/ehca/Kconfig b/drivers/staging/rdma/ehca/Kconfig
index 59f807d8d58e..3fadd2ad6426 100644
--- a/drivers/infiniband/hw/ehca/Kconfig
+++ b/drivers/staging/rdma/ehca/Kconfig
@@ -2,7 +2,8 @@ config INFINIBAND_EHCA
2 tristate "eHCA support" 2 tristate "eHCA support"
3 depends on IBMEBUS 3 depends on IBMEBUS
4 ---help--- 4 ---help---
5 This driver supports the IBM pSeries eHCA InfiniBand adapter. 5 This driver supports the deprecated IBM pSeries eHCA InfiniBand
6 adapter.
6 7
7 To compile the driver as a module, choose M here. The module 8 To compile the driver as a module, choose M here. The module
8 will be called ib_ehca. 9 will be called ib_ehca.
diff --git a/drivers/infiniband/hw/ehca/Makefile b/drivers/staging/rdma/ehca/Makefile
index 74d284e46a40..74d284e46a40 100644
--- a/drivers/infiniband/hw/ehca/Makefile
+++ b/drivers/staging/rdma/ehca/Makefile
diff --git a/drivers/staging/rdma/ehca/TODO b/drivers/staging/rdma/ehca/TODO
new file mode 100644
index 000000000000..199a4a600142
--- /dev/null
+++ b/drivers/staging/rdma/ehca/TODO
@@ -0,0 +1,4 @@
19/2015
2
3The ehca driver has been deprecated and moved to drivers/staging/rdma.
4It will be removed in the 4.6 merge window.
diff --git a/drivers/infiniband/hw/ehca/ehca_av.c b/drivers/staging/rdma/ehca/ehca_av.c
index 465926319f3d..465926319f3d 100644
--- a/drivers/infiniband/hw/ehca/ehca_av.c
+++ b/drivers/staging/rdma/ehca/ehca_av.c
diff --git a/drivers/infiniband/hw/ehca/ehca_classes.h b/drivers/staging/rdma/ehca/ehca_classes.h
index bd45e0f3923f..bd45e0f3923f 100644
--- a/drivers/infiniband/hw/ehca/ehca_classes.h
+++ b/drivers/staging/rdma/ehca/ehca_classes.h
diff --git a/drivers/infiniband/hw/ehca/ehca_classes_pSeries.h b/drivers/staging/rdma/ehca/ehca_classes_pSeries.h
index 689c35786dd2..689c35786dd2 100644
--- a/drivers/infiniband/hw/ehca/ehca_classes_pSeries.h
+++ b/drivers/staging/rdma/ehca/ehca_classes_pSeries.h
diff --git a/drivers/infiniband/hw/ehca/ehca_cq.c b/drivers/staging/rdma/ehca/ehca_cq.c
index 9b68b175069b..9b68b175069b 100644
--- a/drivers/infiniband/hw/ehca/ehca_cq.c
+++ b/drivers/staging/rdma/ehca/ehca_cq.c
diff --git a/drivers/infiniband/hw/ehca/ehca_eq.c b/drivers/staging/rdma/ehca/ehca_eq.c
index 90da6747d395..90da6747d395 100644
--- a/drivers/infiniband/hw/ehca/ehca_eq.c
+++ b/drivers/staging/rdma/ehca/ehca_eq.c
diff --git a/drivers/infiniband/hw/ehca/ehca_hca.c b/drivers/staging/rdma/ehca/ehca_hca.c
index e8b1bb65797a..e8b1bb65797a 100644
--- a/drivers/infiniband/hw/ehca/ehca_hca.c
+++ b/drivers/staging/rdma/ehca/ehca_hca.c
diff --git a/drivers/infiniband/hw/ehca/ehca_irq.c b/drivers/staging/rdma/ehca/ehca_irq.c
index 8615d7cf7e01..8615d7cf7e01 100644
--- a/drivers/infiniband/hw/ehca/ehca_irq.c
+++ b/drivers/staging/rdma/ehca/ehca_irq.c
diff --git a/drivers/infiniband/hw/ehca/ehca_irq.h b/drivers/staging/rdma/ehca/ehca_irq.h
index 5370199f08c7..5370199f08c7 100644
--- a/drivers/infiniband/hw/ehca/ehca_irq.h
+++ b/drivers/staging/rdma/ehca/ehca_irq.h
diff --git a/drivers/infiniband/hw/ehca/ehca_iverbs.h b/drivers/staging/rdma/ehca/ehca_iverbs.h
index 80e6a3d5df3e..80e6a3d5df3e 100644
--- a/drivers/infiniband/hw/ehca/ehca_iverbs.h
+++ b/drivers/staging/rdma/ehca/ehca_iverbs.h
diff --git a/drivers/infiniband/hw/ehca/ehca_main.c b/drivers/staging/rdma/ehca/ehca_main.c
index 8246418cd4e0..8246418cd4e0 100644
--- a/drivers/infiniband/hw/ehca/ehca_main.c
+++ b/drivers/staging/rdma/ehca/ehca_main.c
diff --git a/drivers/infiniband/hw/ehca/ehca_mcast.c b/drivers/staging/rdma/ehca/ehca_mcast.c
index cec181532924..cec181532924 100644
--- a/drivers/infiniband/hw/ehca/ehca_mcast.c
+++ b/drivers/staging/rdma/ehca/ehca_mcast.c
diff --git a/drivers/infiniband/hw/ehca/ehca_mrmw.c b/drivers/staging/rdma/ehca/ehca_mrmw.c
index f914b30999f8..f914b30999f8 100644
--- a/drivers/infiniband/hw/ehca/ehca_mrmw.c
+++ b/drivers/staging/rdma/ehca/ehca_mrmw.c
diff --git a/drivers/infiniband/hw/ehca/ehca_mrmw.h b/drivers/staging/rdma/ehca/ehca_mrmw.h
index 50d8b51306dd..50d8b51306dd 100644
--- a/drivers/infiniband/hw/ehca/ehca_mrmw.h
+++ b/drivers/staging/rdma/ehca/ehca_mrmw.h
diff --git a/drivers/infiniband/hw/ehca/ehca_pd.c b/drivers/staging/rdma/ehca/ehca_pd.c
index 351577a6670a..351577a6670a 100644
--- a/drivers/infiniband/hw/ehca/ehca_pd.c
+++ b/drivers/staging/rdma/ehca/ehca_pd.c
diff --git a/drivers/infiniband/hw/ehca/ehca_qes.h b/drivers/staging/rdma/ehca/ehca_qes.h
index 90c4efa67586..90c4efa67586 100644
--- a/drivers/infiniband/hw/ehca/ehca_qes.h
+++ b/drivers/staging/rdma/ehca/ehca_qes.h
diff --git a/drivers/infiniband/hw/ehca/ehca_qp.c b/drivers/staging/rdma/ehca/ehca_qp.c
index 2e89356c46fa..2e89356c46fa 100644
--- a/drivers/infiniband/hw/ehca/ehca_qp.c
+++ b/drivers/staging/rdma/ehca/ehca_qp.c
diff --git a/drivers/infiniband/hw/ehca/ehca_reqs.c b/drivers/staging/rdma/ehca/ehca_reqs.c
index 47f94984353d..47f94984353d 100644
--- a/drivers/infiniband/hw/ehca/ehca_reqs.c
+++ b/drivers/staging/rdma/ehca/ehca_reqs.c
diff --git a/drivers/infiniband/hw/ehca/ehca_sqp.c b/drivers/staging/rdma/ehca/ehca_sqp.c
index 376b031c2c7f..376b031c2c7f 100644
--- a/drivers/infiniband/hw/ehca/ehca_sqp.c
+++ b/drivers/staging/rdma/ehca/ehca_sqp.c
diff --git a/drivers/infiniband/hw/ehca/ehca_tools.h b/drivers/staging/rdma/ehca/ehca_tools.h
index d280b12aae64..d280b12aae64 100644
--- a/drivers/infiniband/hw/ehca/ehca_tools.h
+++ b/drivers/staging/rdma/ehca/ehca_tools.h
diff --git a/drivers/infiniband/hw/ehca/ehca_uverbs.c b/drivers/staging/rdma/ehca/ehca_uverbs.c
index 1a1d5d99fcf9..1a1d5d99fcf9 100644
--- a/drivers/infiniband/hw/ehca/ehca_uverbs.c
+++ b/drivers/staging/rdma/ehca/ehca_uverbs.c
diff --git a/drivers/infiniband/hw/ehca/hcp_if.c b/drivers/staging/rdma/ehca/hcp_if.c
index 89517ffb4389..89517ffb4389 100644
--- a/drivers/infiniband/hw/ehca/hcp_if.c
+++ b/drivers/staging/rdma/ehca/hcp_if.c
diff --git a/drivers/infiniband/hw/ehca/hcp_if.h b/drivers/staging/rdma/ehca/hcp_if.h
index a46e514c367b..a46e514c367b 100644
--- a/drivers/infiniband/hw/ehca/hcp_if.h
+++ b/drivers/staging/rdma/ehca/hcp_if.h
diff --git a/drivers/infiniband/hw/ehca/hcp_phyp.c b/drivers/staging/rdma/ehca/hcp_phyp.c
index 077376ff3d28..077376ff3d28 100644
--- a/drivers/infiniband/hw/ehca/hcp_phyp.c
+++ b/drivers/staging/rdma/ehca/hcp_phyp.c
diff --git a/drivers/infiniband/hw/ehca/hcp_phyp.h b/drivers/staging/rdma/ehca/hcp_phyp.h
index d1b029910249..d1b029910249 100644
--- a/drivers/infiniband/hw/ehca/hcp_phyp.h
+++ b/drivers/staging/rdma/ehca/hcp_phyp.h
diff --git a/drivers/infiniband/hw/ehca/hipz_fns.h b/drivers/staging/rdma/ehca/hipz_fns.h
index 9dac93d02140..9dac93d02140 100644
--- a/drivers/infiniband/hw/ehca/hipz_fns.h
+++ b/drivers/staging/rdma/ehca/hipz_fns.h
diff --git a/drivers/infiniband/hw/ehca/hipz_fns_core.h b/drivers/staging/rdma/ehca/hipz_fns_core.h
index 868735fd3187..868735fd3187 100644
--- a/drivers/infiniband/hw/ehca/hipz_fns_core.h
+++ b/drivers/staging/rdma/ehca/hipz_fns_core.h
diff --git a/drivers/infiniband/hw/ehca/hipz_hw.h b/drivers/staging/rdma/ehca/hipz_hw.h
index bf996c7acc42..bf996c7acc42 100644
--- a/drivers/infiniband/hw/ehca/hipz_hw.h
+++ b/drivers/staging/rdma/ehca/hipz_hw.h
diff --git a/drivers/infiniband/hw/ehca/ipz_pt_fn.c b/drivers/staging/rdma/ehca/ipz_pt_fn.c
index 7ffc748cb973..7ffc748cb973 100644
--- a/drivers/infiniband/hw/ehca/ipz_pt_fn.c
+++ b/drivers/staging/rdma/ehca/ipz_pt_fn.c
diff --git a/drivers/infiniband/hw/ehca/ipz_pt_fn.h b/drivers/staging/rdma/ehca/ipz_pt_fn.h
index a801274ea337..a801274ea337 100644
--- a/drivers/infiniband/hw/ehca/ipz_pt_fn.h
+++ b/drivers/staging/rdma/ehca/ipz_pt_fn.h
diff --git a/drivers/staging/rdma/hfi1/chip.c b/drivers/staging/rdma/hfi1/chip.c
index 654eafef1d30..aa58e597df06 100644
--- a/drivers/staging/rdma/hfi1/chip.c
+++ b/drivers/staging/rdma/hfi1/chip.c
@@ -2710,7 +2710,7 @@ int acquire_lcb_access(struct hfi1_devdata *dd, int sleep_ok)
2710 if (sleep_ok) { 2710 if (sleep_ok) {
2711 mutex_lock(&ppd->hls_lock); 2711 mutex_lock(&ppd->hls_lock);
2712 } else { 2712 } else {
2713 while (mutex_trylock(&ppd->hls_lock) == EBUSY) 2713 while (!mutex_trylock(&ppd->hls_lock))
2714 udelay(1); 2714 udelay(1);
2715 } 2715 }
2716 2716
@@ -2758,7 +2758,7 @@ int release_lcb_access(struct hfi1_devdata *dd, int sleep_ok)
2758 if (sleep_ok) { 2758 if (sleep_ok) {
2759 mutex_lock(&dd->pport->hls_lock); 2759 mutex_lock(&dd->pport->hls_lock);
2760 } else { 2760 } else {
2761 while (mutex_trylock(&dd->pport->hls_lock) == EBUSY) 2761 while (!mutex_trylock(&dd->pport->hls_lock))
2762 udelay(1); 2762 udelay(1);
2763 } 2763 }
2764 2764
diff --git a/drivers/staging/rdma/hfi1/device.c b/drivers/staging/rdma/hfi1/device.c
index 07c87a87775f..bc26a5392712 100644
--- a/drivers/staging/rdma/hfi1/device.c
+++ b/drivers/staging/rdma/hfi1/device.c
@@ -57,11 +57,13 @@
57#include "device.h" 57#include "device.h"
58 58
59static struct class *class; 59static struct class *class;
60static struct class *user_class;
60static dev_t hfi1_dev; 61static dev_t hfi1_dev;
61 62
62int hfi1_cdev_init(int minor, const char *name, 63int hfi1_cdev_init(int minor, const char *name,
63 const struct file_operations *fops, 64 const struct file_operations *fops,
64 struct cdev *cdev, struct device **devp) 65 struct cdev *cdev, struct device **devp,
66 bool user_accessible)
65{ 67{
66 const dev_t dev = MKDEV(MAJOR(hfi1_dev), minor); 68 const dev_t dev = MKDEV(MAJOR(hfi1_dev), minor);
67 struct device *device = NULL; 69 struct device *device = NULL;
@@ -78,7 +80,11 @@ int hfi1_cdev_init(int minor, const char *name,
78 goto done; 80 goto done;
79 } 81 }
80 82
81 device = device_create(class, NULL, dev, NULL, "%s", name); 83 if (user_accessible)
84 device = device_create(user_class, NULL, dev, NULL, "%s", name);
85 else
86 device = device_create(class, NULL, dev, NULL, "%s", name);
87
82 if (!IS_ERR(device)) 88 if (!IS_ERR(device))
83 goto done; 89 goto done;
84 ret = PTR_ERR(device); 90 ret = PTR_ERR(device);
@@ -110,6 +116,26 @@ const char *class_name(void)
110 return hfi1_class_name; 116 return hfi1_class_name;
111} 117}
112 118
119static char *hfi1_devnode(struct device *dev, umode_t *mode)
120{
121 if (mode)
122 *mode = 0600;
123 return kasprintf(GFP_KERNEL, "%s", dev_name(dev));
124}
125
126static const char *hfi1_class_name_user = "hfi1_user";
127const char *class_name_user(void)
128{
129 return hfi1_class_name_user;
130}
131
132static char *hfi1_user_devnode(struct device *dev, umode_t *mode)
133{
134 if (mode)
135 *mode = 0666;
136 return kasprintf(GFP_KERNEL, "%s", dev_name(dev));
137}
138
113int __init dev_init(void) 139int __init dev_init(void)
114{ 140{
115 int ret; 141 int ret;
@@ -125,7 +151,22 @@ int __init dev_init(void)
125 ret = PTR_ERR(class); 151 ret = PTR_ERR(class);
126 pr_err("Could not create device class (err %d)\n", -ret); 152 pr_err("Could not create device class (err %d)\n", -ret);
127 unregister_chrdev_region(hfi1_dev, HFI1_NMINORS); 153 unregister_chrdev_region(hfi1_dev, HFI1_NMINORS);
154 goto done;
128 } 155 }
156 class->devnode = hfi1_devnode;
157
158 user_class = class_create(THIS_MODULE, class_name_user());
159 if (IS_ERR(user_class)) {
160 ret = PTR_ERR(user_class);
161 pr_err("Could not create device class for user accessible files (err %d)\n",
162 -ret);
163 class_destroy(class);
164 class = NULL;
165 user_class = NULL;
166 unregister_chrdev_region(hfi1_dev, HFI1_NMINORS);
167 goto done;
168 }
169 user_class->devnode = hfi1_user_devnode;
129 170
130done: 171done:
131 return ret; 172 return ret;
@@ -133,10 +174,11 @@ done:
133 174
134void dev_cleanup(void) 175void dev_cleanup(void)
135{ 176{
136 if (class) { 177 class_destroy(class);
137 class_destroy(class); 178 class = NULL;
138 class = NULL; 179
139 } 180 class_destroy(user_class);
181 user_class = NULL;
140 182
141 unregister_chrdev_region(hfi1_dev, HFI1_NMINORS); 183 unregister_chrdev_region(hfi1_dev, HFI1_NMINORS);
142} 184}
diff --git a/drivers/staging/rdma/hfi1/device.h b/drivers/staging/rdma/hfi1/device.h
index 98caecd3d807..2850ff739d81 100644
--- a/drivers/staging/rdma/hfi1/device.h
+++ b/drivers/staging/rdma/hfi1/device.h
@@ -52,7 +52,8 @@
52 52
53int hfi1_cdev_init(int minor, const char *name, 53int hfi1_cdev_init(int minor, const char *name,
54 const struct file_operations *fops, 54 const struct file_operations *fops,
55 struct cdev *cdev, struct device **devp); 55 struct cdev *cdev, struct device **devp,
56 bool user_accessible);
56void hfi1_cdev_cleanup(struct cdev *cdev, struct device **devp); 57void hfi1_cdev_cleanup(struct cdev *cdev, struct device **devp);
57const char *class_name(void); 58const char *class_name(void);
58int __init dev_init(void); 59int __init dev_init(void);
diff --git a/drivers/staging/rdma/hfi1/diag.c b/drivers/staging/rdma/hfi1/diag.c
index 6777d6b659cf..3e8d5ac4c626 100644
--- a/drivers/staging/rdma/hfi1/diag.c
+++ b/drivers/staging/rdma/hfi1/diag.c
@@ -292,7 +292,7 @@ int hfi1_diag_add(struct hfi1_devdata *dd)
292 if (atomic_inc_return(&diagpkt_count) == 1) { 292 if (atomic_inc_return(&diagpkt_count) == 1) {
293 ret = hfi1_cdev_init(HFI1_DIAGPKT_MINOR, name, 293 ret = hfi1_cdev_init(HFI1_DIAGPKT_MINOR, name,
294 &diagpkt_file_ops, &diagpkt_cdev, 294 &diagpkt_file_ops, &diagpkt_cdev,
295 &diagpkt_device); 295 &diagpkt_device, false);
296 } 296 }
297 297
298 return ret; 298 return ret;
@@ -592,7 +592,8 @@ static int hfi1_snoop_add(struct hfi1_devdata *dd, const char *name)
592 592
593 ret = hfi1_cdev_init(HFI1_SNOOP_CAPTURE_BASE + dd->unit, name, 593 ret = hfi1_cdev_init(HFI1_SNOOP_CAPTURE_BASE + dd->unit, name,
594 &snoop_file_ops, 594 &snoop_file_ops,
595 &dd->hfi1_snoop.cdev, &dd->hfi1_snoop.class_dev); 595 &dd->hfi1_snoop.cdev, &dd->hfi1_snoop.class_dev,
596 false);
596 597
597 if (ret) { 598 if (ret) {
598 dd_dev_err(dd, "Couldn't create %s device: %d", name, ret); 599 dd_dev_err(dd, "Couldn't create %s device: %d", name, ret);
@@ -1012,11 +1013,10 @@ static long hfi1_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
1012 case HFI1_SNOOP_IOCSETLINKSTATE_EXTRA: 1013 case HFI1_SNOOP_IOCSETLINKSTATE_EXTRA:
1013 memset(&link_info, 0, sizeof(link_info)); 1014 memset(&link_info, 0, sizeof(link_info));
1014 1015
1015 ret = copy_from_user(&link_info, 1016 if (copy_from_user(&link_info,
1016 (struct hfi1_link_info __user *)arg, 1017 (struct hfi1_link_info __user *)arg,
1017 sizeof(link_info)); 1018 sizeof(link_info)))
1018 if (ret) 1019 ret = -EFAULT;
1019 break;
1020 1020
1021 value = link_info.port_state; 1021 value = link_info.port_state;
1022 index = link_info.port_number; 1022 index = link_info.port_number;
@@ -1080,9 +1080,10 @@ static long hfi1_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
1080 case HFI1_SNOOP_IOCGETLINKSTATE_EXTRA: 1080 case HFI1_SNOOP_IOCGETLINKSTATE_EXTRA:
1081 if (cmd == HFI1_SNOOP_IOCGETLINKSTATE_EXTRA) { 1081 if (cmd == HFI1_SNOOP_IOCGETLINKSTATE_EXTRA) {
1082 memset(&link_info, 0, sizeof(link_info)); 1082 memset(&link_info, 0, sizeof(link_info));
1083 ret = copy_from_user(&link_info, 1083 if (copy_from_user(&link_info,
1084 (struct hfi1_link_info __user *)arg, 1084 (struct hfi1_link_info __user *)arg,
1085 sizeof(link_info)); 1085 sizeof(link_info)))
1086 ret = -EFAULT;
1086 index = link_info.port_number; 1087 index = link_info.port_number;
1087 } else { 1088 } else {
1088 ret = __get_user(index, (int __user *) arg); 1089 ret = __get_user(index, (int __user *) arg);
@@ -1114,9 +1115,10 @@ static long hfi1_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
1114 ppd->link_speed_active; 1115 ppd->link_speed_active;
1115 link_info.link_width_active = 1116 link_info.link_width_active =
1116 ppd->link_width_active; 1117 ppd->link_width_active;
1117 ret = copy_to_user( 1118 if (copy_to_user(
1118 (struct hfi1_link_info __user *)arg, 1119 (struct hfi1_link_info __user *)arg,
1119 &link_info, sizeof(link_info)); 1120 &link_info, sizeof(link_info)))
1121 ret = -EFAULT;
1120 } else { 1122 } else {
1121 ret = __put_user(value, (int __user *)arg); 1123 ret = __put_user(value, (int __user *)arg);
1122 } 1124 }
@@ -1142,10 +1144,9 @@ static long hfi1_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
1142 snoop_dbg("Setting filter"); 1144 snoop_dbg("Setting filter");
1143 /* just copy command structure */ 1145 /* just copy command structure */
1144 argp = (unsigned long *)arg; 1146 argp = (unsigned long *)arg;
1145 ret = copy_from_user(&filter_cmd, (void __user *)argp, 1147 if (copy_from_user(&filter_cmd, (void __user *)argp,
1146 sizeof(filter_cmd)); 1148 sizeof(filter_cmd))) {
1147 if (ret < 0) { 1149 ret = -EFAULT;
1148 pr_alert("Error copying filter command\n");
1149 break; 1150 break;
1150 } 1151 }
1151 if (filter_cmd.opcode >= HFI1_MAX_FILTERS) { 1152 if (filter_cmd.opcode >= HFI1_MAX_FILTERS) {
@@ -1167,12 +1168,11 @@ static long hfi1_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
1167 break; 1168 break;
1168 } 1169 }
1169 /* copy remaining data from userspace */ 1170 /* copy remaining data from userspace */
1170 ret = copy_from_user((u8 *)filter_value, 1171 if (copy_from_user((u8 *)filter_value,
1171 (void __user *)filter_cmd.value_ptr, 1172 (void __user *)filter_cmd.value_ptr,
1172 filter_cmd.length); 1173 filter_cmd.length)) {
1173 if (ret < 0) {
1174 kfree(filter_value); 1174 kfree(filter_value);
1175 pr_alert("Error copying filter data\n"); 1175 ret = -EFAULT;
1176 break; 1176 break;
1177 } 1177 }
1178 /* Drain packets first */ 1178 /* Drain packets first */
diff --git a/drivers/staging/rdma/hfi1/file_ops.c b/drivers/staging/rdma/hfi1/file_ops.c
index 469861750b76..72d38500d8ce 100644
--- a/drivers/staging/rdma/hfi1/file_ops.c
+++ b/drivers/staging/rdma/hfi1/file_ops.c
@@ -1181,6 +1181,7 @@ static int get_ctxt_info(struct file *fp, void __user *ubase, __u32 len)
1181 struct hfi1_filedata *fd = fp->private_data; 1181 struct hfi1_filedata *fd = fp->private_data;
1182 int ret = 0; 1182 int ret = 0;
1183 1183
1184 memset(&cinfo, 0, sizeof(cinfo));
1184 ret = hfi1_get_base_kinfo(uctxt, &cinfo); 1185 ret = hfi1_get_base_kinfo(uctxt, &cinfo);
1185 if (ret < 0) 1186 if (ret < 0)
1186 goto done; 1187 goto done;
@@ -2089,14 +2090,16 @@ static int user_add(struct hfi1_devdata *dd)
2089 2090
2090 if (atomic_inc_return(&user_count) == 1) { 2091 if (atomic_inc_return(&user_count) == 1) {
2091 ret = hfi1_cdev_init(0, class_name(), &hfi1_file_ops, 2092 ret = hfi1_cdev_init(0, class_name(), &hfi1_file_ops,
2092 &wildcard_cdev, &wildcard_device); 2093 &wildcard_cdev, &wildcard_device,
2094 true);
2093 if (ret) 2095 if (ret)
2094 goto done; 2096 goto done;
2095 } 2097 }
2096 2098
2097 snprintf(name, sizeof(name), "%s_%d", class_name(), dd->unit); 2099 snprintf(name, sizeof(name), "%s_%d", class_name(), dd->unit);
2098 ret = hfi1_cdev_init(dd->unit + 1, name, &hfi1_file_ops, 2100 ret = hfi1_cdev_init(dd->unit + 1, name, &hfi1_file_ops,
2099 &dd->user_cdev, &dd->user_device); 2101 &dd->user_cdev, &dd->user_device,
2102 true);
2100 if (ret) 2103 if (ret)
2101 goto done; 2104 goto done;
2102 2105
@@ -2104,7 +2107,8 @@ static int user_add(struct hfi1_devdata *dd)
2104 snprintf(name, sizeof(name), 2107 snprintf(name, sizeof(name),
2105 "%s_ui%d", class_name(), dd->unit); 2108 "%s_ui%d", class_name(), dd->unit);
2106 ret = hfi1_cdev_init(dd->unit + UI_OFFSET, name, &ui_file_ops, 2109 ret = hfi1_cdev_init(dd->unit + UI_OFFSET, name, &ui_file_ops,
2107 &dd->ui_cdev, &dd->ui_device); 2110 &dd->ui_cdev, &dd->ui_device,
2111 false);
2108 if (ret) 2112 if (ret)
2109 goto done; 2113 goto done;
2110 } 2114 }
diff --git a/drivers/staging/rdma/hfi1/mad.c b/drivers/staging/rdma/hfi1/mad.c
index 37269eb90c34..b2c1b72d38ce 100644
--- a/drivers/staging/rdma/hfi1/mad.c
+++ b/drivers/staging/rdma/hfi1/mad.c
@@ -1717,9 +1717,9 @@ static int __subn_get_opa_psi(struct opa_smp *smp, u32 am, u8 *data,
1717 psi->port_states.portphysstate_portstate = 1717 psi->port_states.portphysstate_portstate =
1718 (hfi1_ibphys_portstate(ppd) << 4) | (lstate & 0xf); 1718 (hfi1_ibphys_portstate(ppd) << 4) | (lstate & 0xf);
1719 psi->link_width_downgrade_tx_active = 1719 psi->link_width_downgrade_tx_active =
1720 ppd->link_width_downgrade_tx_active; 1720 cpu_to_be16(ppd->link_width_downgrade_tx_active);
1721 psi->link_width_downgrade_rx_active = 1721 psi->link_width_downgrade_rx_active =
1722 ppd->link_width_downgrade_rx_active; 1722 cpu_to_be16(ppd->link_width_downgrade_rx_active);
1723 if (resp_len) 1723 if (resp_len)
1724 *resp_len += sizeof(struct opa_port_state_info); 1724 *resp_len += sizeof(struct opa_port_state_info);
1725 1725
diff --git a/drivers/staging/rdma/hfi1/sdma.c b/drivers/staging/rdma/hfi1/sdma.c
index a8c903caecce..aecd1a74741c 100644
--- a/drivers/staging/rdma/hfi1/sdma.c
+++ b/drivers/staging/rdma/hfi1/sdma.c
@@ -737,7 +737,7 @@ u16 sdma_get_descq_cnt(void)
737 */ 737 */
738 if (!is_power_of_2(count)) 738 if (!is_power_of_2(count))
739 return SDMA_DESCQ_CNT; 739 return SDMA_DESCQ_CNT;
740 if (count < 64 && count > 32768) 740 if (count < 64 || count > 32768)
741 return SDMA_DESCQ_CNT; 741 return SDMA_DESCQ_CNT;
742 return count; 742 return count;
743} 743}
@@ -1848,7 +1848,7 @@ static void dump_sdma_state(struct sdma_engine *sde)
1848 dd_dev_err(sde->dd, 1848 dd_dev_err(sde->dd,
1849 "\taidx: %u amode: %u alen: %u\n", 1849 "\taidx: %u amode: %u alen: %u\n",
1850 (u8)((desc[1] & SDMA_DESC1_HEADER_INDEX_SMASK) 1850 (u8)((desc[1] & SDMA_DESC1_HEADER_INDEX_SMASK)
1851 >> SDMA_DESC1_HEADER_INDEX_MASK), 1851 >> SDMA_DESC1_HEADER_INDEX_SHIFT),
1852 (u8)((desc[1] & SDMA_DESC1_HEADER_MODE_SMASK) 1852 (u8)((desc[1] & SDMA_DESC1_HEADER_MODE_SMASK)
1853 >> SDMA_DESC1_HEADER_MODE_SHIFT), 1853 >> SDMA_DESC1_HEADER_MODE_SHIFT),
1854 (u8)((desc[1] & SDMA_DESC1_HEADER_DWS_SMASK) 1854 (u8)((desc[1] & SDMA_DESC1_HEADER_DWS_SMASK)
@@ -1926,7 +1926,7 @@ void sdma_seqfile_dump_sde(struct seq_file *s, struct sdma_engine *sde)
1926 if (desc[0] & SDMA_DESC0_FIRST_DESC_FLAG) 1926 if (desc[0] & SDMA_DESC0_FIRST_DESC_FLAG)
1927 seq_printf(s, "\t\tahgidx: %u ahgmode: %u\n", 1927 seq_printf(s, "\t\tahgidx: %u ahgmode: %u\n",
1928 (u8)((desc[1] & SDMA_DESC1_HEADER_INDEX_SMASK) 1928 (u8)((desc[1] & SDMA_DESC1_HEADER_INDEX_SMASK)
1929 >> SDMA_DESC1_HEADER_INDEX_MASK), 1929 >> SDMA_DESC1_HEADER_INDEX_SHIFT),
1930 (u8)((desc[1] & SDMA_DESC1_HEADER_MODE_SMASK) 1930 (u8)((desc[1] & SDMA_DESC1_HEADER_MODE_SMASK)
1931 >> SDMA_DESC1_HEADER_MODE_SHIFT)); 1931 >> SDMA_DESC1_HEADER_MODE_SHIFT));
1932 head = (head + 1) & sde->sdma_mask; 1932 head = (head + 1) & sde->sdma_mask;
diff --git a/drivers/staging/rdma/hfi1/sdma.h b/drivers/staging/rdma/hfi1/sdma.h
index 1e613fcd8f4c..496086903891 100644
--- a/drivers/staging/rdma/hfi1/sdma.h
+++ b/drivers/staging/rdma/hfi1/sdma.h
@@ -109,53 +109,53 @@
109/* 109/*
110 * Bits defined in the send DMA descriptor. 110 * Bits defined in the send DMA descriptor.
111 */ 111 */
112#define SDMA_DESC0_FIRST_DESC_FLAG (1ULL<<63) 112#define SDMA_DESC0_FIRST_DESC_FLAG (1ULL << 63)
113#define SDMA_DESC0_LAST_DESC_FLAG (1ULL<<62) 113#define SDMA_DESC0_LAST_DESC_FLAG (1ULL << 62)
114#define SDMA_DESC0_BYTE_COUNT_SHIFT 48 114#define SDMA_DESC0_BYTE_COUNT_SHIFT 48
115#define SDMA_DESC0_BYTE_COUNT_WIDTH 14 115#define SDMA_DESC0_BYTE_COUNT_WIDTH 14
116#define SDMA_DESC0_BYTE_COUNT_MASK \ 116#define SDMA_DESC0_BYTE_COUNT_MASK \
117 ((1ULL<<SDMA_DESC0_BYTE_COUNT_WIDTH)-1ULL) 117 ((1ULL << SDMA_DESC0_BYTE_COUNT_WIDTH) - 1)
118#define SDMA_DESC0_BYTE_COUNT_SMASK \ 118#define SDMA_DESC0_BYTE_COUNT_SMASK \
119 (SDMA_DESC0_BYTE_COUNT_MASK<<SDMA_DESC0_BYTE_COUNT_SHIFT) 119 (SDMA_DESC0_BYTE_COUNT_MASK << SDMA_DESC0_BYTE_COUNT_SHIFT)
120#define SDMA_DESC0_PHY_ADDR_SHIFT 0 120#define SDMA_DESC0_PHY_ADDR_SHIFT 0
121#define SDMA_DESC0_PHY_ADDR_WIDTH 48 121#define SDMA_DESC0_PHY_ADDR_WIDTH 48
122#define SDMA_DESC0_PHY_ADDR_MASK \ 122#define SDMA_DESC0_PHY_ADDR_MASK \
123 ((1ULL<<SDMA_DESC0_PHY_ADDR_WIDTH)-1ULL) 123 ((1ULL << SDMA_DESC0_PHY_ADDR_WIDTH) - 1)
124#define SDMA_DESC0_PHY_ADDR_SMASK \ 124#define SDMA_DESC0_PHY_ADDR_SMASK \
125 (SDMA_DESC0_PHY_ADDR_MASK<<SDMA_DESC0_PHY_ADDR_SHIFT) 125 (SDMA_DESC0_PHY_ADDR_MASK << SDMA_DESC0_PHY_ADDR_SHIFT)
126 126
127#define SDMA_DESC1_HEADER_UPDATE1_SHIFT 32 127#define SDMA_DESC1_HEADER_UPDATE1_SHIFT 32
128#define SDMA_DESC1_HEADER_UPDATE1_WIDTH 32 128#define SDMA_DESC1_HEADER_UPDATE1_WIDTH 32
129#define SDMA_DESC1_HEADER_UPDATE1_MASK \ 129#define SDMA_DESC1_HEADER_UPDATE1_MASK \
130 ((1ULL<<SDMA_DESC1_HEADER_UPDATE1_WIDTH)-1ULL) 130 ((1ULL << SDMA_DESC1_HEADER_UPDATE1_WIDTH) - 1)
131#define SDMA_DESC1_HEADER_UPDATE1_SMASK \ 131#define SDMA_DESC1_HEADER_UPDATE1_SMASK \
132 (SDMA_DESC1_HEADER_UPDATE1_MASK<<SDMA_DESC1_HEADER_UPDATE1_SHIFT) 132 (SDMA_DESC1_HEADER_UPDATE1_MASK << SDMA_DESC1_HEADER_UPDATE1_SHIFT)
133#define SDMA_DESC1_HEADER_MODE_SHIFT 13 133#define SDMA_DESC1_HEADER_MODE_SHIFT 13
134#define SDMA_DESC1_HEADER_MODE_WIDTH 3 134#define SDMA_DESC1_HEADER_MODE_WIDTH 3
135#define SDMA_DESC1_HEADER_MODE_MASK \ 135#define SDMA_DESC1_HEADER_MODE_MASK \
136 ((1ULL<<SDMA_DESC1_HEADER_MODE_WIDTH)-1ULL) 136 ((1ULL << SDMA_DESC1_HEADER_MODE_WIDTH) - 1)
137#define SDMA_DESC1_HEADER_MODE_SMASK \ 137#define SDMA_DESC1_HEADER_MODE_SMASK \
138 (SDMA_DESC1_HEADER_MODE_MASK<<SDMA_DESC1_HEADER_MODE_SHIFT) 138 (SDMA_DESC1_HEADER_MODE_MASK << SDMA_DESC1_HEADER_MODE_SHIFT)
139#define SDMA_DESC1_HEADER_INDEX_SHIFT 8 139#define SDMA_DESC1_HEADER_INDEX_SHIFT 8
140#define SDMA_DESC1_HEADER_INDEX_WIDTH 5 140#define SDMA_DESC1_HEADER_INDEX_WIDTH 5
141#define SDMA_DESC1_HEADER_INDEX_MASK \ 141#define SDMA_DESC1_HEADER_INDEX_MASK \
142 ((1ULL<<SDMA_DESC1_HEADER_INDEX_WIDTH)-1ULL) 142 ((1ULL << SDMA_DESC1_HEADER_INDEX_WIDTH) - 1)
143#define SDMA_DESC1_HEADER_INDEX_SMASK \ 143#define SDMA_DESC1_HEADER_INDEX_SMASK \
144 (SDMA_DESC1_HEADER_INDEX_MASK<<SDMA_DESC1_HEADER_INDEX_SHIFT) 144 (SDMA_DESC1_HEADER_INDEX_MASK << SDMA_DESC1_HEADER_INDEX_SHIFT)
145#define SDMA_DESC1_HEADER_DWS_SHIFT 4 145#define SDMA_DESC1_HEADER_DWS_SHIFT 4
146#define SDMA_DESC1_HEADER_DWS_WIDTH 4 146#define SDMA_DESC1_HEADER_DWS_WIDTH 4
147#define SDMA_DESC1_HEADER_DWS_MASK \ 147#define SDMA_DESC1_HEADER_DWS_MASK \
148 ((1ULL<<SDMA_DESC1_HEADER_DWS_WIDTH)-1ULL) 148 ((1ULL << SDMA_DESC1_HEADER_DWS_WIDTH) - 1)
149#define SDMA_DESC1_HEADER_DWS_SMASK \ 149#define SDMA_DESC1_HEADER_DWS_SMASK \
150 (SDMA_DESC1_HEADER_DWS_MASK<<SDMA_DESC1_HEADER_DWS_SHIFT) 150 (SDMA_DESC1_HEADER_DWS_MASK << SDMA_DESC1_HEADER_DWS_SHIFT)
151#define SDMA_DESC1_GENERATION_SHIFT 2 151#define SDMA_DESC1_GENERATION_SHIFT 2
152#define SDMA_DESC1_GENERATION_WIDTH 2 152#define SDMA_DESC1_GENERATION_WIDTH 2
153#define SDMA_DESC1_GENERATION_MASK \ 153#define SDMA_DESC1_GENERATION_MASK \
154 ((1ULL<<SDMA_DESC1_GENERATION_WIDTH)-1ULL) 154 ((1ULL << SDMA_DESC1_GENERATION_WIDTH) - 1)
155#define SDMA_DESC1_GENERATION_SMASK \ 155#define SDMA_DESC1_GENERATION_SMASK \
156 (SDMA_DESC1_GENERATION_MASK<<SDMA_DESC1_GENERATION_SHIFT) 156 (SDMA_DESC1_GENERATION_MASK << SDMA_DESC1_GENERATION_SHIFT)
157#define SDMA_DESC1_INT_REQ_FLAG (1ULL<<1) 157#define SDMA_DESC1_INT_REQ_FLAG (1ULL << 1)
158#define SDMA_DESC1_HEAD_TO_HOST_FLAG (1ULL<<0) 158#define SDMA_DESC1_HEAD_TO_HOST_FLAG (1ULL << 0)
159 159
160enum sdma_states { 160enum sdma_states {
161 sdma_state_s00_hw_down, 161 sdma_state_s00_hw_down,
diff --git a/drivers/staging/rdma/hfi1/verbs.c b/drivers/staging/rdma/hfi1/verbs.c
index 53ac21431542..41bb59eb001c 100644
--- a/drivers/staging/rdma/hfi1/verbs.c
+++ b/drivers/staging/rdma/hfi1/verbs.c
@@ -749,11 +749,13 @@ static inline struct verbs_txreq *get_txreq(struct hfi1_ibdev *dev,
749 struct verbs_txreq *tx; 749 struct verbs_txreq *tx;
750 750
751 tx = kmem_cache_alloc(dev->verbs_txreq_cache, GFP_ATOMIC); 751 tx = kmem_cache_alloc(dev->verbs_txreq_cache, GFP_ATOMIC);
752 if (!tx) 752 if (!tx) {
753 /* call slow path to get the lock */ 753 /* call slow path to get the lock */
754 tx = __get_txreq(dev, qp); 754 tx = __get_txreq(dev, qp);
755 if (tx) 755 if (IS_ERR(tx))
756 tx->qp = qp; 756 return tx;
757 }
758 tx->qp = qp;
757 return tx; 759 return tx;
758} 760}
759 761
diff --git a/drivers/staging/unisys/visorbus/Makefile b/drivers/staging/unisys/visorbus/Makefile
index fa27ee5f336c..fc790e7592fc 100644
--- a/drivers/staging/unisys/visorbus/Makefile
+++ b/drivers/staging/unisys/visorbus/Makefile
@@ -10,4 +10,3 @@ visorbus-y += visorchipset.o
10visorbus-y += periodic_work.o 10visorbus-y += periodic_work.o
11 11
12ccflags-y += -Idrivers/staging/unisys/include 12ccflags-y += -Idrivers/staging/unisys/include
13ccflags-y += -Idrivers/staging/unisys/visorutil
diff --git a/drivers/staging/unisys/visorbus/visorbus_main.c b/drivers/staging/unisys/visorbus/visorbus_main.c
index 2309f5f2b238..a272b48bab28 100644
--- a/drivers/staging/unisys/visorbus/visorbus_main.c
+++ b/drivers/staging/unisys/visorbus/visorbus_main.c
@@ -37,6 +37,8 @@ static int visorbus_debugref;
37#define POLLJIFFIES_TESTWORK 100 37#define POLLJIFFIES_TESTWORK 100
38#define POLLJIFFIES_NORMALCHANNEL 10 38#define POLLJIFFIES_NORMALCHANNEL 10
39 39
40static int busreg_rc = -ENODEV; /* stores the result from bus registration */
41
40static int visorbus_uevent(struct device *xdev, struct kobj_uevent_env *env); 42static int visorbus_uevent(struct device *xdev, struct kobj_uevent_env *env);
41static int visorbus_match(struct device *xdev, struct device_driver *xdrv); 43static int visorbus_match(struct device *xdev, struct device_driver *xdrv);
42static void fix_vbus_dev_info(struct visor_device *visordev); 44static void fix_vbus_dev_info(struct visor_device *visordev);
@@ -863,6 +865,9 @@ int visorbus_register_visor_driver(struct visor_driver *drv)
863{ 865{
864 int rc = 0; 866 int rc = 0;
865 867
868 if (busreg_rc < 0)
869 return -ENODEV; /*can't register on a nonexistent bus*/
870
866 drv->driver.name = drv->name; 871 drv->driver.name = drv->name;
867 drv->driver.bus = &visorbus_type; 872 drv->driver.bus = &visorbus_type;
868 drv->driver.probe = visordriver_probe_device; 873 drv->driver.probe = visordriver_probe_device;
@@ -885,6 +890,8 @@ int visorbus_register_visor_driver(struct visor_driver *drv)
885 if (rc < 0) 890 if (rc < 0)
886 return rc; 891 return rc;
887 rc = register_driver_attributes(drv); 892 rc = register_driver_attributes(drv);
893 if (rc < 0)
894 driver_unregister(&drv->driver);
888 return rc; 895 return rc;
889} 896}
890EXPORT_SYMBOL_GPL(visorbus_register_visor_driver); 897EXPORT_SYMBOL_GPL(visorbus_register_visor_driver);
@@ -1260,10 +1267,8 @@ remove_bus_instance(struct visor_device *dev)
1260static int 1267static int
1261create_bus_type(void) 1268create_bus_type(void)
1262{ 1269{
1263 int rc = 0; 1270 busreg_rc = bus_register(&visorbus_type);
1264 1271 return busreg_rc;
1265 rc = bus_register(&visorbus_type);
1266 return rc;
1267} 1272}
1268 1273
1269/** Remove the one-and-only one instance of the visor bus type (visorbus_type). 1274/** Remove the one-and-only one instance of the visor bus type (visorbus_type).
diff --git a/drivers/staging/unisys/visornic/visornic_main.c b/drivers/staging/unisys/visornic/visornic_main.c
index 8c9da7ea7845..9d3c1e282062 100644
--- a/drivers/staging/unisys/visornic/visornic_main.c
+++ b/drivers/staging/unisys/visornic/visornic_main.c
@@ -1189,16 +1189,16 @@ visornic_rx(struct uiscmdrsp *cmdrsp)
1189 spin_lock_irqsave(&devdata->priv_lock, flags); 1189 spin_lock_irqsave(&devdata->priv_lock, flags);
1190 atomic_dec(&devdata->num_rcvbuf_in_iovm); 1190 atomic_dec(&devdata->num_rcvbuf_in_iovm);
1191 1191
1192 /* update rcv stats - call it with priv_lock held */
1193 devdata->net_stats.rx_packets++;
1194 devdata->net_stats.rx_bytes = skb->len;
1195
1196 /* set length to how much was ACTUALLY received - 1192 /* set length to how much was ACTUALLY received -
1197 * NOTE: rcv_done_len includes actual length of data rcvd 1193 * NOTE: rcv_done_len includes actual length of data rcvd
1198 * including ethhdr 1194 * including ethhdr
1199 */ 1195 */
1200 skb->len = cmdrsp->net.rcv.rcv_done_len; 1196 skb->len = cmdrsp->net.rcv.rcv_done_len;
1201 1197
1198 /* update rcv stats - call it with priv_lock held */
1199 devdata->net_stats.rx_packets++;
1200 devdata->net_stats.rx_bytes += skb->len;
1201
1202 /* test enabled while holding lock */ 1202 /* test enabled while holding lock */
1203 if (!(devdata->enabled && devdata->enab_dis_acked)) { 1203 if (!(devdata->enabled && devdata->enab_dis_acked)) {
1204 /* don't process it unless we're in enable mode and until 1204 /* don't process it unless we're in enable mode and until
@@ -1924,13 +1924,16 @@ static int visornic_probe(struct visor_device *dev)
1924 "%s debugfs_create_dir %s failed\n", 1924 "%s debugfs_create_dir %s failed\n",
1925 __func__, netdev->name); 1925 __func__, netdev->name);
1926 err = -ENOMEM; 1926 err = -ENOMEM;
1927 goto cleanup_xmit_cmdrsp; 1927 goto cleanup_register_netdev;
1928 } 1928 }
1929 1929
1930 dev_info(&dev->device, "%s success netdev=%s\n", 1930 dev_info(&dev->device, "%s success netdev=%s\n",
1931 __func__, netdev->name); 1931 __func__, netdev->name);
1932 return 0; 1932 return 0;
1933 1933
1934cleanup_register_netdev:
1935 unregister_netdev(netdev);
1936
1934cleanup_napi_add: 1937cleanup_napi_add:
1935 del_timer_sync(&devdata->irq_poll_timer); 1938 del_timer_sync(&devdata->irq_poll_timer);
1936 netif_napi_del(&devdata->napi); 1939 netif_napi_del(&devdata->napi);
@@ -2128,8 +2131,9 @@ static int visornic_init(void)
2128 if (!dev_num_pool) 2131 if (!dev_num_pool)
2129 goto cleanup_workqueue; 2132 goto cleanup_workqueue;
2130 2133
2131 visorbus_register_visor_driver(&visornic_driver); 2134 err = visorbus_register_visor_driver(&visornic_driver);
2132 return 0; 2135 if (!err)
2136 return 0;
2133 2137
2134cleanup_workqueue: 2138cleanup_workqueue:
2135 if (visornic_timeout_reset_workqueue) { 2139 if (visornic_timeout_reset_workqueue) {
diff --git a/drivers/target/iscsi/iscsi_target_parameters.c b/drivers/target/iscsi/iscsi_target_parameters.c
index e8a52f7d6204..51d1734d5390 100644
--- a/drivers/target/iscsi/iscsi_target_parameters.c
+++ b/drivers/target/iscsi/iscsi_target_parameters.c
@@ -407,6 +407,7 @@ int iscsi_create_default_params(struct iscsi_param_list **param_list_ptr)
407 TYPERANGE_UTF8, USE_INITIAL_ONLY); 407 TYPERANGE_UTF8, USE_INITIAL_ONLY);
408 if (!param) 408 if (!param)
409 goto out; 409 goto out;
410
410 /* 411 /*
411 * Extra parameters for ISER from RFC-5046 412 * Extra parameters for ISER from RFC-5046
412 */ 413 */
@@ -496,9 +497,9 @@ int iscsi_set_keys_to_negotiate(
496 } else if (!strcmp(param->name, SESSIONTYPE)) { 497 } else if (!strcmp(param->name, SESSIONTYPE)) {
497 SET_PSTATE_NEGOTIATE(param); 498 SET_PSTATE_NEGOTIATE(param);
498 } else if (!strcmp(param->name, IFMARKER)) { 499 } else if (!strcmp(param->name, IFMARKER)) {
499 SET_PSTATE_NEGOTIATE(param); 500 SET_PSTATE_REJECT(param);
500 } else if (!strcmp(param->name, OFMARKER)) { 501 } else if (!strcmp(param->name, OFMARKER)) {
501 SET_PSTATE_NEGOTIATE(param); 502 SET_PSTATE_REJECT(param);
502 } else if (!strcmp(param->name, IFMARKINT)) { 503 } else if (!strcmp(param->name, IFMARKINT)) {
503 SET_PSTATE_REJECT(param); 504 SET_PSTATE_REJECT(param);
504 } else if (!strcmp(param->name, OFMARKINT)) { 505 } else if (!strcmp(param->name, OFMARKINT)) {
diff --git a/drivers/target/target_core_device.c b/drivers/target/target_core_device.c
index dcc424ac35d4..88ea4e4f124b 100644
--- a/drivers/target/target_core_device.c
+++ b/drivers/target/target_core_device.c
@@ -62,22 +62,13 @@ transport_lookup_cmd_lun(struct se_cmd *se_cmd, u64 unpacked_lun)
62 struct se_session *se_sess = se_cmd->se_sess; 62 struct se_session *se_sess = se_cmd->se_sess;
63 struct se_node_acl *nacl = se_sess->se_node_acl; 63 struct se_node_acl *nacl = se_sess->se_node_acl;
64 struct se_dev_entry *deve; 64 struct se_dev_entry *deve;
65 sense_reason_t ret = TCM_NO_SENSE;
65 66
66 rcu_read_lock(); 67 rcu_read_lock();
67 deve = target_nacl_find_deve(nacl, unpacked_lun); 68 deve = target_nacl_find_deve(nacl, unpacked_lun);
68 if (deve) { 69 if (deve) {
69 atomic_long_inc(&deve->total_cmds); 70 atomic_long_inc(&deve->total_cmds);
70 71
71 if ((se_cmd->data_direction == DMA_TO_DEVICE) &&
72 (deve->lun_flags & TRANSPORT_LUNFLAGS_READ_ONLY)) {
73 pr_err("TARGET_CORE[%s]: Detected WRITE_PROTECTED LUN"
74 " Access for 0x%08llx\n",
75 se_cmd->se_tfo->get_fabric_name(),
76 unpacked_lun);
77 rcu_read_unlock();
78 return TCM_WRITE_PROTECTED;
79 }
80
81 if (se_cmd->data_direction == DMA_TO_DEVICE) 72 if (se_cmd->data_direction == DMA_TO_DEVICE)
82 atomic_long_add(se_cmd->data_length, 73 atomic_long_add(se_cmd->data_length,
83 &deve->write_bytes); 74 &deve->write_bytes);
@@ -93,6 +84,17 @@ transport_lookup_cmd_lun(struct se_cmd *se_cmd, u64 unpacked_lun)
93 84
94 percpu_ref_get(&se_lun->lun_ref); 85 percpu_ref_get(&se_lun->lun_ref);
95 se_cmd->lun_ref_active = true; 86 se_cmd->lun_ref_active = true;
87
88 if ((se_cmd->data_direction == DMA_TO_DEVICE) &&
89 (deve->lun_flags & TRANSPORT_LUNFLAGS_READ_ONLY)) {
90 pr_err("TARGET_CORE[%s]: Detected WRITE_PROTECTED LUN"
91 " Access for 0x%08llx\n",
92 se_cmd->se_tfo->get_fabric_name(),
93 unpacked_lun);
94 rcu_read_unlock();
95 ret = TCM_WRITE_PROTECTED;
96 goto ref_dev;
97 }
96 } 98 }
97 rcu_read_unlock(); 99 rcu_read_unlock();
98 100
@@ -109,12 +111,6 @@ transport_lookup_cmd_lun(struct se_cmd *se_cmd, u64 unpacked_lun)
109 unpacked_lun); 111 unpacked_lun);
110 return TCM_NON_EXISTENT_LUN; 112 return TCM_NON_EXISTENT_LUN;
111 } 113 }
112 /*
113 * Force WRITE PROTECT for virtual LUN 0
114 */
115 if ((se_cmd->data_direction != DMA_FROM_DEVICE) &&
116 (se_cmd->data_direction != DMA_NONE))
117 return TCM_WRITE_PROTECTED;
118 114
119 se_lun = se_sess->se_tpg->tpg_virt_lun0; 115 se_lun = se_sess->se_tpg->tpg_virt_lun0;
120 se_cmd->se_lun = se_sess->se_tpg->tpg_virt_lun0; 116 se_cmd->se_lun = se_sess->se_tpg->tpg_virt_lun0;
@@ -123,6 +119,15 @@ transport_lookup_cmd_lun(struct se_cmd *se_cmd, u64 unpacked_lun)
123 119
124 percpu_ref_get(&se_lun->lun_ref); 120 percpu_ref_get(&se_lun->lun_ref);
125 se_cmd->lun_ref_active = true; 121 se_cmd->lun_ref_active = true;
122
123 /*
124 * Force WRITE PROTECT for virtual LUN 0
125 */
126 if ((se_cmd->data_direction != DMA_FROM_DEVICE) &&
127 (se_cmd->data_direction != DMA_NONE)) {
128 ret = TCM_WRITE_PROTECTED;
129 goto ref_dev;
130 }
126 } 131 }
127 /* 132 /*
128 * RCU reference protected by percpu se_lun->lun_ref taken above that 133 * RCU reference protected by percpu se_lun->lun_ref taken above that
@@ -130,6 +135,7 @@ transport_lookup_cmd_lun(struct se_cmd *se_cmd, u64 unpacked_lun)
130 * pointer can be kfree_rcu() by the final se_lun->lun_group put via 135 * pointer can be kfree_rcu() by the final se_lun->lun_group put via
131 * target_core_fabric_configfs.c:target_fabric_port_release 136 * target_core_fabric_configfs.c:target_fabric_port_release
132 */ 137 */
138ref_dev:
133 se_cmd->se_dev = rcu_dereference_raw(se_lun->lun_se_dev); 139 se_cmd->se_dev = rcu_dereference_raw(se_lun->lun_se_dev);
134 atomic_long_inc(&se_cmd->se_dev->num_cmds); 140 atomic_long_inc(&se_cmd->se_dev->num_cmds);
135 141
@@ -140,7 +146,7 @@ transport_lookup_cmd_lun(struct se_cmd *se_cmd, u64 unpacked_lun)
140 atomic_long_add(se_cmd->data_length, 146 atomic_long_add(se_cmd->data_length,
141 &se_cmd->se_dev->read_bytes); 147 &se_cmd->se_dev->read_bytes);
142 148
143 return 0; 149 return ret;
144} 150}
145EXPORT_SYMBOL(transport_lookup_cmd_lun); 151EXPORT_SYMBOL(transport_lookup_cmd_lun);
146 152
@@ -427,8 +433,6 @@ void core_disable_device_list_for_node(
427 433
428 hlist_del_rcu(&orig->link); 434 hlist_del_rcu(&orig->link);
429 clear_bit(DEF_PR_REG_ACTIVE, &orig->deve_flags); 435 clear_bit(DEF_PR_REG_ACTIVE, &orig->deve_flags);
430 rcu_assign_pointer(orig->se_lun, NULL);
431 rcu_assign_pointer(orig->se_lun_acl, NULL);
432 orig->lun_flags = 0; 436 orig->lun_flags = 0;
433 orig->creation_time = 0; 437 orig->creation_time = 0;
434 orig->attach_count--; 438 orig->attach_count--;
@@ -439,6 +443,9 @@ void core_disable_device_list_for_node(
439 kref_put(&orig->pr_kref, target_pr_kref_release); 443 kref_put(&orig->pr_kref, target_pr_kref_release);
440 wait_for_completion(&orig->pr_comp); 444 wait_for_completion(&orig->pr_comp);
441 445
446 rcu_assign_pointer(orig->se_lun, NULL);
447 rcu_assign_pointer(orig->se_lun_acl, NULL);
448
442 kfree_rcu(orig, rcu_head); 449 kfree_rcu(orig, rcu_head);
443 450
444 core_scsi3_free_pr_reg_from_nacl(dev, nacl); 451 core_scsi3_free_pr_reg_from_nacl(dev, nacl);
diff --git a/drivers/target/target_core_hba.c b/drivers/target/target_core_hba.c
index 9522960c7fdd..22390e0e046c 100644
--- a/drivers/target/target_core_hba.c
+++ b/drivers/target/target_core_hba.c
@@ -187,5 +187,5 @@ core_delete_hba(struct se_hba *hba)
187 187
188bool target_sense_desc_format(struct se_device *dev) 188bool target_sense_desc_format(struct se_device *dev)
189{ 189{
190 return dev->transport->get_blocks(dev) > U32_MAX; 190 return (dev) ? dev->transport->get_blocks(dev) > U32_MAX : false;
191} 191}
diff --git a/drivers/target/target_core_iblock.c b/drivers/target/target_core_iblock.c
index 5a9982f5d5d6..0f19e11acac2 100644
--- a/drivers/target/target_core_iblock.c
+++ b/drivers/target/target_core_iblock.c
@@ -105,6 +105,8 @@ static int iblock_configure_device(struct se_device *dev)
105 mode = FMODE_READ|FMODE_EXCL; 105 mode = FMODE_READ|FMODE_EXCL;
106 if (!ib_dev->ibd_readonly) 106 if (!ib_dev->ibd_readonly)
107 mode |= FMODE_WRITE; 107 mode |= FMODE_WRITE;
108 else
109 dev->dev_flags |= DF_READ_ONLY;
108 110
109 bd = blkdev_get_by_path(ib_dev->ibd_udev_path, mode, ib_dev); 111 bd = blkdev_get_by_path(ib_dev->ibd_udev_path, mode, ib_dev);
110 if (IS_ERR(bd)) { 112 if (IS_ERR(bd)) {
diff --git a/drivers/target/target_core_pr.c b/drivers/target/target_core_pr.c
index 5ab7100de17e..e7933115087a 100644
--- a/drivers/target/target_core_pr.c
+++ b/drivers/target/target_core_pr.c
@@ -618,7 +618,7 @@ static struct t10_pr_registration *__core_scsi3_do_alloc_registration(
618 struct se_device *dev, 618 struct se_device *dev,
619 struct se_node_acl *nacl, 619 struct se_node_acl *nacl,
620 struct se_lun *lun, 620 struct se_lun *lun,
621 struct se_dev_entry *deve, 621 struct se_dev_entry *dest_deve,
622 u64 mapped_lun, 622 u64 mapped_lun,
623 unsigned char *isid, 623 unsigned char *isid,
624 u64 sa_res_key, 624 u64 sa_res_key,
@@ -640,7 +640,29 @@ static struct t10_pr_registration *__core_scsi3_do_alloc_registration(
640 INIT_LIST_HEAD(&pr_reg->pr_reg_atp_mem_list); 640 INIT_LIST_HEAD(&pr_reg->pr_reg_atp_mem_list);
641 atomic_set(&pr_reg->pr_res_holders, 0); 641 atomic_set(&pr_reg->pr_res_holders, 0);
642 pr_reg->pr_reg_nacl = nacl; 642 pr_reg->pr_reg_nacl = nacl;
643 pr_reg->pr_reg_deve = deve; 643 /*
644 * For destination registrations for ALL_TG_PT=1 and SPEC_I_PT=1,
645 * the se_dev_entry->pr_ref will have been already obtained by
646 * core_get_se_deve_from_rtpi() or __core_scsi3_alloc_registration().
647 *
648 * Otherwise, locate se_dev_entry now and obtain a reference until
649 * registration completes in __core_scsi3_add_registration().
650 */
651 if (dest_deve) {
652 pr_reg->pr_reg_deve = dest_deve;
653 } else {
654 rcu_read_lock();
655 pr_reg->pr_reg_deve = target_nacl_find_deve(nacl, mapped_lun);
656 if (!pr_reg->pr_reg_deve) {
657 rcu_read_unlock();
658 pr_err("Unable to locate PR deve %s mapped_lun: %llu\n",
659 nacl->initiatorname, mapped_lun);
660 kmem_cache_free(t10_pr_reg_cache, pr_reg);
661 return NULL;
662 }
663 kref_get(&pr_reg->pr_reg_deve->pr_kref);
664 rcu_read_unlock();
665 }
644 pr_reg->pr_res_mapped_lun = mapped_lun; 666 pr_reg->pr_res_mapped_lun = mapped_lun;
645 pr_reg->pr_aptpl_target_lun = lun->unpacked_lun; 667 pr_reg->pr_aptpl_target_lun = lun->unpacked_lun;
646 pr_reg->tg_pt_sep_rtpi = lun->lun_rtpi; 668 pr_reg->tg_pt_sep_rtpi = lun->lun_rtpi;
@@ -936,17 +958,29 @@ static int __core_scsi3_check_aptpl_registration(
936 !(strcmp(pr_reg->pr_tport, t_port)) && 958 !(strcmp(pr_reg->pr_tport, t_port)) &&
937 (pr_reg->pr_reg_tpgt == tpgt) && 959 (pr_reg->pr_reg_tpgt == tpgt) &&
938 (pr_reg->pr_aptpl_target_lun == target_lun)) { 960 (pr_reg->pr_aptpl_target_lun == target_lun)) {
961 /*
962 * Obtain the ->pr_reg_deve pointer + reference, that
963 * is released by __core_scsi3_add_registration() below.
964 */
965 rcu_read_lock();
966 pr_reg->pr_reg_deve = target_nacl_find_deve(nacl, mapped_lun);
967 if (!pr_reg->pr_reg_deve) {
968 pr_err("Unable to locate PR APTPL %s mapped_lun:"
969 " %llu\n", nacl->initiatorname, mapped_lun);
970 rcu_read_unlock();
971 continue;
972 }
973 kref_get(&pr_reg->pr_reg_deve->pr_kref);
974 rcu_read_unlock();
939 975
940 pr_reg->pr_reg_nacl = nacl; 976 pr_reg->pr_reg_nacl = nacl;
941 pr_reg->tg_pt_sep_rtpi = lun->lun_rtpi; 977 pr_reg->tg_pt_sep_rtpi = lun->lun_rtpi;
942
943 list_del(&pr_reg->pr_reg_aptpl_list); 978 list_del(&pr_reg->pr_reg_aptpl_list);
944 spin_unlock(&pr_tmpl->aptpl_reg_lock); 979 spin_unlock(&pr_tmpl->aptpl_reg_lock);
945 /* 980 /*
946 * At this point all of the pointers in *pr_reg will 981 * At this point all of the pointers in *pr_reg will
947 * be setup, so go ahead and add the registration. 982 * be setup, so go ahead and add the registration.
948 */ 983 */
949
950 __core_scsi3_add_registration(dev, nacl, pr_reg, 0, 0); 984 __core_scsi3_add_registration(dev, nacl, pr_reg, 0, 0);
951 /* 985 /*
952 * If this registration is the reservation holder, 986 * If this registration is the reservation holder,
@@ -1044,18 +1078,11 @@ static void __core_scsi3_add_registration(
1044 1078
1045 __core_scsi3_dump_registration(tfo, dev, nacl, pr_reg, register_type); 1079 __core_scsi3_dump_registration(tfo, dev, nacl, pr_reg, register_type);
1046 spin_unlock(&pr_tmpl->registration_lock); 1080 spin_unlock(&pr_tmpl->registration_lock);
1047
1048 rcu_read_lock();
1049 deve = pr_reg->pr_reg_deve;
1050 if (deve)
1051 set_bit(DEF_PR_REG_ACTIVE, &deve->deve_flags);
1052 rcu_read_unlock();
1053
1054 /* 1081 /*
1055 * Skip extra processing for ALL_TG_PT=0 or REGISTER_AND_MOVE. 1082 * Skip extra processing for ALL_TG_PT=0 or REGISTER_AND_MOVE.
1056 */ 1083 */
1057 if (!pr_reg->pr_reg_all_tg_pt || register_move) 1084 if (!pr_reg->pr_reg_all_tg_pt || register_move)
1058 return; 1085 goto out;
1059 /* 1086 /*
1060 * Walk pr_reg->pr_reg_atp_list and add registrations for ALL_TG_PT=1 1087 * Walk pr_reg->pr_reg_atp_list and add registrations for ALL_TG_PT=1
1061 * allocated in __core_scsi3_alloc_registration() 1088 * allocated in __core_scsi3_alloc_registration()
@@ -1075,19 +1102,31 @@ static void __core_scsi3_add_registration(
1075 __core_scsi3_dump_registration(tfo, dev, nacl_tmp, pr_reg_tmp, 1102 __core_scsi3_dump_registration(tfo, dev, nacl_tmp, pr_reg_tmp,
1076 register_type); 1103 register_type);
1077 spin_unlock(&pr_tmpl->registration_lock); 1104 spin_unlock(&pr_tmpl->registration_lock);
1078 1105 /*
1106 * Drop configfs group dependency reference and deve->pr_kref
1107 * obtained from __core_scsi3_alloc_registration() code.
1108 */
1079 rcu_read_lock(); 1109 rcu_read_lock();
1080 deve = pr_reg_tmp->pr_reg_deve; 1110 deve = pr_reg_tmp->pr_reg_deve;
1081 if (deve) 1111 if (deve) {
1082 set_bit(DEF_PR_REG_ACTIVE, &deve->deve_flags); 1112 set_bit(DEF_PR_REG_ACTIVE, &deve->deve_flags);
1113 core_scsi3_lunacl_undepend_item(deve);
1114 pr_reg_tmp->pr_reg_deve = NULL;
1115 }
1083 rcu_read_unlock(); 1116 rcu_read_unlock();
1084
1085 /*
1086 * Drop configfs group dependency reference from
1087 * __core_scsi3_alloc_registration()
1088 */
1089 core_scsi3_lunacl_undepend_item(pr_reg_tmp->pr_reg_deve);
1090 } 1117 }
1118out:
1119 /*
1120 * Drop deve->pr_kref obtained in __core_scsi3_do_alloc_registration()
1121 */
1122 rcu_read_lock();
1123 deve = pr_reg->pr_reg_deve;
1124 if (deve) {
1125 set_bit(DEF_PR_REG_ACTIVE, &deve->deve_flags);
1126 kref_put(&deve->pr_kref, target_pr_kref_release);
1127 pr_reg->pr_reg_deve = NULL;
1128 }
1129 rcu_read_unlock();
1091} 1130}
1092 1131
1093static int core_scsi3_alloc_registration( 1132static int core_scsi3_alloc_registration(
@@ -1785,9 +1824,11 @@ core_scsi3_decode_spec_i_port(
1785 dest_node_acl->initiatorname, i_buf, (dest_se_deve) ? 1824 dest_node_acl->initiatorname, i_buf, (dest_se_deve) ?
1786 dest_se_deve->mapped_lun : 0); 1825 dest_se_deve->mapped_lun : 0);
1787 1826
1788 if (!dest_se_deve) 1827 if (!dest_se_deve) {
1828 kref_put(&local_pr_reg->pr_reg_deve->pr_kref,
1829 target_pr_kref_release);
1789 continue; 1830 continue;
1790 1831 }
1791 core_scsi3_lunacl_undepend_item(dest_se_deve); 1832 core_scsi3_lunacl_undepend_item(dest_se_deve);
1792 core_scsi3_nodeacl_undepend_item(dest_node_acl); 1833 core_scsi3_nodeacl_undepend_item(dest_node_acl);
1793 core_scsi3_tpg_undepend_item(dest_tpg); 1834 core_scsi3_tpg_undepend_item(dest_tpg);
@@ -1823,9 +1864,11 @@ out:
1823 1864
1824 kmem_cache_free(t10_pr_reg_cache, dest_pr_reg); 1865 kmem_cache_free(t10_pr_reg_cache, dest_pr_reg);
1825 1866
1826 if (!dest_se_deve) 1867 if (!dest_se_deve) {
1868 kref_put(&local_pr_reg->pr_reg_deve->pr_kref,
1869 target_pr_kref_release);
1827 continue; 1870 continue;
1828 1871 }
1829 core_scsi3_lunacl_undepend_item(dest_se_deve); 1872 core_scsi3_lunacl_undepend_item(dest_se_deve);
1830 core_scsi3_nodeacl_undepend_item(dest_node_acl); 1873 core_scsi3_nodeacl_undepend_item(dest_node_acl);
1831 core_scsi3_tpg_undepend_item(dest_tpg); 1874 core_scsi3_tpg_undepend_item(dest_tpg);
diff --git a/drivers/target/target_core_tpg.c b/drivers/target/target_core_tpg.c
index 2d0381dd105c..5fb9dd7f08bb 100644
--- a/drivers/target/target_core_tpg.c
+++ b/drivers/target/target_core_tpg.c
@@ -668,7 +668,10 @@ int core_tpg_add_lun(
668 list_add_tail(&lun->lun_dev_link, &dev->dev_sep_list); 668 list_add_tail(&lun->lun_dev_link, &dev->dev_sep_list);
669 spin_unlock(&dev->se_port_lock); 669 spin_unlock(&dev->se_port_lock);
670 670
671 lun->lun_access = lun_access; 671 if (dev->dev_flags & DF_READ_ONLY)
672 lun->lun_access = TRANSPORT_LUNFLAGS_READ_ONLY;
673 else
674 lun->lun_access = lun_access;
672 if (!(dev->se_hba->hba_flags & HBA_FLAGS_INTERNAL_USE)) 675 if (!(dev->se_hba->hba_flags & HBA_FLAGS_INTERNAL_USE))
673 hlist_add_head_rcu(&lun->link, &tpg->tpg_lun_hlist); 676 hlist_add_head_rcu(&lun->link, &tpg->tpg_lun_hlist);
674 mutex_unlock(&tpg->tpg_lun_mutex); 677 mutex_unlock(&tpg->tpg_lun_mutex);
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 039004400987..5aabc4bc0d75 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -163,7 +163,7 @@ config THERMAL_EMULATION
163 163
164config HISI_THERMAL 164config HISI_THERMAL
165 tristate "Hisilicon thermal driver" 165 tristate "Hisilicon thermal driver"
166 depends on ARCH_HISI && CPU_THERMAL && OF 166 depends on (ARCH_HISI && CPU_THERMAL && OF) || COMPILE_TEST
167 help 167 help
168 Enable this to plug hisilicon's thermal sensor driver into the Linux 168 Enable this to plug hisilicon's thermal sensor driver into the Linux
169 thermal framework. cpufreq is used as the cooling device to throttle 169 thermal framework. cpufreq is used as the cooling device to throttle
@@ -182,7 +182,7 @@ config IMX_THERMAL
182 182
183config SPEAR_THERMAL 183config SPEAR_THERMAL
184 bool "SPEAr thermal sensor driver" 184 bool "SPEAr thermal sensor driver"
185 depends on PLAT_SPEAR 185 depends on PLAT_SPEAR || COMPILE_TEST
186 depends on OF 186 depends on OF
187 help 187 help
188 Enable this to plug the SPEAr thermal sensor driver into the Linux 188 Enable this to plug the SPEAr thermal sensor driver into the Linux
@@ -190,7 +190,7 @@ config SPEAR_THERMAL
190 190
191config ROCKCHIP_THERMAL 191config ROCKCHIP_THERMAL
192 tristate "Rockchip thermal driver" 192 tristate "Rockchip thermal driver"
193 depends on ARCH_ROCKCHIP 193 depends on ARCH_ROCKCHIP || COMPILE_TEST
194 depends on RESET_CONTROLLER 194 depends on RESET_CONTROLLER
195 help 195 help
196 Rockchip thermal driver provides support for Temperature sensor 196 Rockchip thermal driver provides support for Temperature sensor
@@ -208,7 +208,7 @@ config RCAR_THERMAL
208 208
209config KIRKWOOD_THERMAL 209config KIRKWOOD_THERMAL
210 tristate "Temperature sensor on Marvell Kirkwood SoCs" 210 tristate "Temperature sensor on Marvell Kirkwood SoCs"
211 depends on MACH_KIRKWOOD 211 depends on MACH_KIRKWOOD || COMPILE_TEST
212 depends on OF 212 depends on OF
213 help 213 help
214 Support for the Kirkwood thermal sensor driver into the Linux thermal 214 Support for the Kirkwood thermal sensor driver into the Linux thermal
@@ -216,7 +216,7 @@ config KIRKWOOD_THERMAL
216 216
217config DOVE_THERMAL 217config DOVE_THERMAL
218 tristate "Temperature sensor on Marvell Dove SoCs" 218 tristate "Temperature sensor on Marvell Dove SoCs"
219 depends on ARCH_DOVE || MACH_DOVE 219 depends on ARCH_DOVE || MACH_DOVE || COMPILE_TEST
220 depends on OF 220 depends on OF
221 help 221 help
222 Support for the Dove thermal sensor driver in the Linux thermal 222 Support for the Dove thermal sensor driver in the Linux thermal
@@ -234,7 +234,7 @@ config DB8500_THERMAL
234 234
235config ARMADA_THERMAL 235config ARMADA_THERMAL
236 tristate "Armada 370/XP thermal management" 236 tristate "Armada 370/XP thermal management"
237 depends on ARCH_MVEBU 237 depends on ARCH_MVEBU || COMPILE_TEST
238 depends on OF 238 depends on OF
239 help 239 help
240 Enable this option if you want to have support for thermal management 240 Enable this option if you want to have support for thermal management
@@ -349,11 +349,12 @@ config INTEL_PCH_THERMAL
349 programmable trip points and other information. 349 programmable trip points and other information.
350 350
351menu "Texas Instruments thermal drivers" 351menu "Texas Instruments thermal drivers"
352depends on ARCH_HAS_BANDGAP || COMPILE_TEST
352source "drivers/thermal/ti-soc-thermal/Kconfig" 353source "drivers/thermal/ti-soc-thermal/Kconfig"
353endmenu 354endmenu
354 355
355menu "Samsung thermal drivers" 356menu "Samsung thermal drivers"
356depends on ARCH_EXYNOS 357depends on ARCH_EXYNOS || COMPILE_TEST
357source "drivers/thermal/samsung/Kconfig" 358source "drivers/thermal/samsung/Kconfig"
358endmenu 359endmenu
359 360
@@ -364,7 +365,7 @@ endmenu
364 365
365config QCOM_SPMI_TEMP_ALARM 366config QCOM_SPMI_TEMP_ALARM
366 tristate "Qualcomm SPMI PMIC Temperature Alarm" 367 tristate "Qualcomm SPMI PMIC Temperature Alarm"
367 depends on OF && SPMI && IIO 368 depends on OF && (SPMI || COMPILE_TEST) && IIO
368 select REGMAP_SPMI 369 select REGMAP_SPMI
369 help 370 help
370 This enables a thermal sysfs driver for Qualcomm plug-and-play (QPNP) 371 This enables a thermal sysfs driver for Qualcomm plug-and-play (QPNP)
diff --git a/drivers/thermal/cpu_cooling.c b/drivers/thermal/cpu_cooling.c
index 620dcd405ff6..42c6f71bdcc1 100644
--- a/drivers/thermal/cpu_cooling.c
+++ b/drivers/thermal/cpu_cooling.c
@@ -262,7 +262,9 @@ static int cpufreq_thermal_notifier(struct notifier_block *nb,
262 * efficiently. Power is stored in mW, frequency in KHz. The 262 * efficiently. Power is stored in mW, frequency in KHz. The
263 * resulting table is in ascending order. 263 * resulting table is in ascending order.
264 * 264 *
265 * Return: 0 on success, -E* on error. 265 * Return: 0 on success, -EINVAL if there are no OPPs for any CPUs,
266 * -ENOMEM if we run out of memory or -EAGAIN if an OPP was
267 * added/enabled while the function was executing.
266 */ 268 */
267static int build_dyn_power_table(struct cpufreq_cooling_device *cpufreq_device, 269static int build_dyn_power_table(struct cpufreq_cooling_device *cpufreq_device,
268 u32 capacitance) 270 u32 capacitance)
@@ -273,8 +275,6 @@ static int build_dyn_power_table(struct cpufreq_cooling_device *cpufreq_device,
273 int num_opps = 0, cpu, i, ret = 0; 275 int num_opps = 0, cpu, i, ret = 0;
274 unsigned long freq; 276 unsigned long freq;
275 277
276 rcu_read_lock();
277
278 for_each_cpu(cpu, &cpufreq_device->allowed_cpus) { 278 for_each_cpu(cpu, &cpufreq_device->allowed_cpus) {
279 dev = get_cpu_device(cpu); 279 dev = get_cpu_device(cpu);
280 if (!dev) { 280 if (!dev) {
@@ -284,24 +284,20 @@ static int build_dyn_power_table(struct cpufreq_cooling_device *cpufreq_device,
284 } 284 }
285 285
286 num_opps = dev_pm_opp_get_opp_count(dev); 286 num_opps = dev_pm_opp_get_opp_count(dev);
287 if (num_opps > 0) { 287 if (num_opps > 0)
288 break; 288 break;
289 } else if (num_opps < 0) { 289 else if (num_opps < 0)
290 ret = num_opps; 290 return num_opps;
291 goto unlock;
292 }
293 } 291 }
294 292
295 if (num_opps == 0) { 293 if (num_opps == 0)
296 ret = -EINVAL; 294 return -EINVAL;
297 goto unlock;
298 }
299 295
300 power_table = kcalloc(num_opps, sizeof(*power_table), GFP_KERNEL); 296 power_table = kcalloc(num_opps, sizeof(*power_table), GFP_KERNEL);
301 if (!power_table) { 297 if (!power_table)
302 ret = -ENOMEM; 298 return -ENOMEM;
303 goto unlock; 299
304 } 300 rcu_read_lock();
305 301
306 for (freq = 0, i = 0; 302 for (freq = 0, i = 0;
307 opp = dev_pm_opp_find_freq_ceil(dev, &freq), !IS_ERR(opp); 303 opp = dev_pm_opp_find_freq_ceil(dev, &freq), !IS_ERR(opp);
@@ -309,6 +305,12 @@ static int build_dyn_power_table(struct cpufreq_cooling_device *cpufreq_device,
309 u32 freq_mhz, voltage_mv; 305 u32 freq_mhz, voltage_mv;
310 u64 power; 306 u64 power;
311 307
308 if (i >= num_opps) {
309 rcu_read_unlock();
310 ret = -EAGAIN;
311 goto free_power_table;
312 }
313
312 freq_mhz = freq / 1000000; 314 freq_mhz = freq / 1000000;
313 voltage_mv = dev_pm_opp_get_voltage(opp) / 1000; 315 voltage_mv = dev_pm_opp_get_voltage(opp) / 1000;
314 316
@@ -326,17 +328,22 @@ static int build_dyn_power_table(struct cpufreq_cooling_device *cpufreq_device,
326 power_table[i].power = power; 328 power_table[i].power = power;
327 } 329 }
328 330
329 if (i == 0) { 331 rcu_read_unlock();
332
333 if (i != num_opps) {
330 ret = PTR_ERR(opp); 334 ret = PTR_ERR(opp);
331 goto unlock; 335 goto free_power_table;
332 } 336 }
333 337
334 cpufreq_device->cpu_dev = dev; 338 cpufreq_device->cpu_dev = dev;
335 cpufreq_device->dyn_power_table = power_table; 339 cpufreq_device->dyn_power_table = power_table;
336 cpufreq_device->dyn_power_table_entries = i; 340 cpufreq_device->dyn_power_table_entries = i;
337 341
338unlock: 342 return 0;
339 rcu_read_unlock(); 343
344free_power_table:
345 kfree(power_table);
346
340 return ret; 347 return ret;
341} 348}
342 349
@@ -847,7 +854,7 @@ __cpufreq_cooling_register(struct device_node *np,
847 ret = get_idr(&cpufreq_idr, &cpufreq_dev->id); 854 ret = get_idr(&cpufreq_idr, &cpufreq_dev->id);
848 if (ret) { 855 if (ret) {
849 cool_dev = ERR_PTR(ret); 856 cool_dev = ERR_PTR(ret);
850 goto free_table; 857 goto free_power_table;
851 } 858 }
852 859
853 snprintf(dev_name, sizeof(dev_name), "thermal-cpufreq-%d", 860 snprintf(dev_name, sizeof(dev_name), "thermal-cpufreq-%d",
@@ -889,6 +896,8 @@ __cpufreq_cooling_register(struct device_node *np,
889 896
890remove_idr: 897remove_idr:
891 release_idr(&cpufreq_idr, cpufreq_dev->id); 898 release_idr(&cpufreq_idr, cpufreq_dev->id);
899free_power_table:
900 kfree(cpufreq_dev->dyn_power_table);
892free_table: 901free_table:
893 kfree(cpufreq_dev->freq_table); 902 kfree(cpufreq_dev->freq_table);
894free_time_in_idle_timestamp: 903free_time_in_idle_timestamp:
@@ -1039,6 +1048,7 @@ void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev)
1039 1048
1040 thermal_cooling_device_unregister(cpufreq_dev->cool_dev); 1049 thermal_cooling_device_unregister(cpufreq_dev->cool_dev);
1041 release_idr(&cpufreq_idr, cpufreq_dev->id); 1050 release_idr(&cpufreq_idr, cpufreq_dev->id);
1051 kfree(cpufreq_dev->dyn_power_table);
1042 kfree(cpufreq_dev->time_in_idle_timestamp); 1052 kfree(cpufreq_dev->time_in_idle_timestamp);
1043 kfree(cpufreq_dev->time_in_idle); 1053 kfree(cpufreq_dev->time_in_idle);
1044 kfree(cpufreq_dev->freq_table); 1054 kfree(cpufreq_dev->freq_table);
diff --git a/drivers/thermal/db8500_cpufreq_cooling.c b/drivers/thermal/db8500_cpufreq_cooling.c
index 607b62c7e611..e58bd0b658b5 100644
--- a/drivers/thermal/db8500_cpufreq_cooling.c
+++ b/drivers/thermal/db8500_cpufreq_cooling.c
@@ -72,6 +72,7 @@ static const struct of_device_id db8500_cpufreq_cooling_match[] = {
72 { .compatible = "stericsson,db8500-cpufreq-cooling" }, 72 { .compatible = "stericsson,db8500-cpufreq-cooling" },
73 {}, 73 {},
74}; 74};
75MODULE_DEVICE_TABLE(of, db8500_cpufreq_cooling_match);
75#endif 76#endif
76 77
77static struct platform_driver db8500_cpufreq_cooling_driver = { 78static struct platform_driver db8500_cpufreq_cooling_driver = {
diff --git a/drivers/thermal/power_allocator.c b/drivers/thermal/power_allocator.c
index 9c8a7aad0252..e570ff084add 100644
--- a/drivers/thermal/power_allocator.c
+++ b/drivers/thermal/power_allocator.c
@@ -24,6 +24,8 @@
24 24
25#include "thermal_core.h" 25#include "thermal_core.h"
26 26
27#define INVALID_TRIP -1
28
27#define FRAC_BITS 10 29#define FRAC_BITS 10
28#define int_to_frac(x) ((x) << FRAC_BITS) 30#define int_to_frac(x) ((x) << FRAC_BITS)
29#define frac_to_int(x) ((x) >> FRAC_BITS) 31#define frac_to_int(x) ((x) >> FRAC_BITS)
@@ -56,16 +58,21 @@ static inline s64 div_frac(s64 x, s64 y)
56 58
57/** 59/**
58 * struct power_allocator_params - parameters for the power allocator governor 60 * struct power_allocator_params - parameters for the power allocator governor
61 * @allocated_tzp: whether we have allocated tzp for this thermal zone and
62 * it needs to be freed on unbind
59 * @err_integral: accumulated error in the PID controller. 63 * @err_integral: accumulated error in the PID controller.
60 * @prev_err: error in the previous iteration of the PID controller. 64 * @prev_err: error in the previous iteration of the PID controller.
61 * Used to calculate the derivative term. 65 * Used to calculate the derivative term.
62 * @trip_switch_on: first passive trip point of the thermal zone. The 66 * @trip_switch_on: first passive trip point of the thermal zone. The
63 * governor switches on when this trip point is crossed. 67 * governor switches on when this trip point is crossed.
68 * If the thermal zone only has one passive trip point,
69 * @trip_switch_on should be INVALID_TRIP.
64 * @trip_max_desired_temperature: last passive trip point of the thermal 70 * @trip_max_desired_temperature: last passive trip point of the thermal
65 * zone. The temperature we are 71 * zone. The temperature we are
66 * controlling for. 72 * controlling for.
67 */ 73 */
68struct power_allocator_params { 74struct power_allocator_params {
75 bool allocated_tzp;
69 s64 err_integral; 76 s64 err_integral;
70 s32 prev_err; 77 s32 prev_err;
71 int trip_switch_on; 78 int trip_switch_on;
@@ -73,6 +80,98 @@ struct power_allocator_params {
73}; 80};
74 81
75/** 82/**
83 * estimate_sustainable_power() - Estimate the sustainable power of a thermal zone
84 * @tz: thermal zone we are operating in
85 *
86 * For thermal zones that don't provide a sustainable_power in their
87 * thermal_zone_params, estimate one. Calculate it using the minimum
88 * power of all the cooling devices as that gives a valid value that
89 * can give some degree of functionality. For optimal performance of
90 * this governor, provide a sustainable_power in the thermal zone's
91 * thermal_zone_params.
92 */
93static u32 estimate_sustainable_power(struct thermal_zone_device *tz)
94{
95 u32 sustainable_power = 0;
96 struct thermal_instance *instance;
97 struct power_allocator_params *params = tz->governor_data;
98
99 list_for_each_entry(instance, &tz->thermal_instances, tz_node) {
100 struct thermal_cooling_device *cdev = instance->cdev;
101 u32 min_power;
102
103 if (instance->trip != params->trip_max_desired_temperature)
104 continue;
105
106 if (power_actor_get_min_power(cdev, tz, &min_power))
107 continue;
108
109 sustainable_power += min_power;
110 }
111
112 return sustainable_power;
113}
114
115/**
116 * estimate_pid_constants() - Estimate the constants for the PID controller
117 * @tz: thermal zone for which to estimate the constants
118 * @sustainable_power: sustainable power for the thermal zone
119 * @trip_switch_on: trip point number for the switch on temperature
120 * @control_temp: target temperature for the power allocator governor
121 * @force: whether to force the update of the constants
122 *
123 * This function is used to update the estimation of the PID
124 * controller constants in struct thermal_zone_parameters.
125 * Sustainable power is provided in case it was estimated. The
126 * estimated sustainable_power should not be stored in the
127 * thermal_zone_parameters so it has to be passed explicitly to this
128 * function.
129 *
130 * If @force is not set, the values in the thermal zone's parameters
131 * are preserved if they are not zero. If @force is set, the values
132 * in thermal zone's parameters are overwritten.
133 */
134static void estimate_pid_constants(struct thermal_zone_device *tz,
135 u32 sustainable_power, int trip_switch_on,
136 int control_temp, bool force)
137{
138 int ret;
139 int switch_on_temp;
140 u32 temperature_threshold;
141
142 ret = tz->ops->get_trip_temp(tz, trip_switch_on, &switch_on_temp);
143 if (ret)
144 switch_on_temp = 0;
145
146 temperature_threshold = control_temp - switch_on_temp;
147 /*
148 * estimate_pid_constants() tries to find appropriate default
149 * values for thermal zones that don't provide them. If a
150 * system integrator has configured a thermal zone with two
151 * passive trip points at the same temperature, that person
152 * hasn't put any effort to set up the thermal zone properly
153 * so just give up.
154 */
155 if (!temperature_threshold)
156 return;
157
158 if (!tz->tzp->k_po || force)
159 tz->tzp->k_po = int_to_frac(sustainable_power) /
160 temperature_threshold;
161
162 if (!tz->tzp->k_pu || force)
163 tz->tzp->k_pu = int_to_frac(2 * sustainable_power) /
164 temperature_threshold;
165
166 if (!tz->tzp->k_i || force)
167 tz->tzp->k_i = int_to_frac(10) / 1000;
168 /*
169 * The default for k_d and integral_cutoff is 0, so we can
170 * leave them as they are.
171 */
172}
173
174/**
76 * pid_controller() - PID controller 175 * pid_controller() - PID controller
77 * @tz: thermal zone we are operating in 176 * @tz: thermal zone we are operating in
78 * @current_temp: the current temperature in millicelsius 177 * @current_temp: the current temperature in millicelsius
@@ -98,10 +197,20 @@ static u32 pid_controller(struct thermal_zone_device *tz,
98{ 197{
99 s64 p, i, d, power_range; 198 s64 p, i, d, power_range;
100 s32 err, max_power_frac; 199 s32 err, max_power_frac;
200 u32 sustainable_power;
101 struct power_allocator_params *params = tz->governor_data; 201 struct power_allocator_params *params = tz->governor_data;
102 202
103 max_power_frac = int_to_frac(max_allocatable_power); 203 max_power_frac = int_to_frac(max_allocatable_power);
104 204
205 if (tz->tzp->sustainable_power) {
206 sustainable_power = tz->tzp->sustainable_power;
207 } else {
208 sustainable_power = estimate_sustainable_power(tz);
209 estimate_pid_constants(tz, sustainable_power,
210 params->trip_switch_on, control_temp,
211 true);
212 }
213
105 err = control_temp - current_temp; 214 err = control_temp - current_temp;
106 err = int_to_frac(err); 215 err = int_to_frac(err);
107 216
@@ -139,7 +248,7 @@ static u32 pid_controller(struct thermal_zone_device *tz,
139 power_range = p + i + d; 248 power_range = p + i + d;
140 249
141 /* feed-forward the known sustainable dissipatable power */ 250 /* feed-forward the known sustainable dissipatable power */
142 power_range = tz->tzp->sustainable_power + frac_to_int(power_range); 251 power_range = sustainable_power + frac_to_int(power_range);
143 252
144 power_range = clamp(power_range, (s64)0, (s64)max_allocatable_power); 253 power_range = clamp(power_range, (s64)0, (s64)max_allocatable_power);
145 254
@@ -247,6 +356,11 @@ static int allocate_power(struct thermal_zone_device *tz,
247 } 356 }
248 } 357 }
249 358
359 if (!num_actors) {
360 ret = -ENODEV;
361 goto unlock;
362 }
363
250 /* 364 /*
251 * We need to allocate five arrays of the same size: 365 * We need to allocate five arrays of the same size:
252 * req_power, max_power, granted_power, extra_actor_power and 366 * req_power, max_power, granted_power, extra_actor_power and
@@ -340,43 +454,66 @@ unlock:
340 return ret; 454 return ret;
341} 455}
342 456
343static int get_governor_trips(struct thermal_zone_device *tz, 457/**
344 struct power_allocator_params *params) 458 * get_governor_trips() - get the number of the two trip points that are key for this governor
459 * @tz: thermal zone to operate on
460 * @params: pointer to private data for this governor
461 *
462 * The power allocator governor works optimally with two trips points:
463 * a "switch on" trip point and a "maximum desired temperature". These
464 * are defined as the first and last passive trip points.
465 *
466 * If there is only one trip point, then that's considered to be the
467 * "maximum desired temperature" trip point and the governor is always
468 * on. If there are no passive or active trip points, then the
469 * governor won't do anything. In fact, its throttle function
470 * won't be called at all.
471 */
472static void get_governor_trips(struct thermal_zone_device *tz,
473 struct power_allocator_params *params)
345{ 474{
346 int i, ret, last_passive; 475 int i, last_active, last_passive;
347 bool found_first_passive; 476 bool found_first_passive;
348 477
349 found_first_passive = false; 478 found_first_passive = false;
350 last_passive = -1; 479 last_active = INVALID_TRIP;
351 ret = -EINVAL; 480 last_passive = INVALID_TRIP;
352 481
353 for (i = 0; i < tz->trips; i++) { 482 for (i = 0; i < tz->trips; i++) {
354 enum thermal_trip_type type; 483 enum thermal_trip_type type;
484 int ret;
355 485
356 ret = tz->ops->get_trip_type(tz, i, &type); 486 ret = tz->ops->get_trip_type(tz, i, &type);
357 if (ret) 487 if (ret) {
358 return ret; 488 dev_warn(&tz->device,
489 "Failed to get trip point %d type: %d\n", i,
490 ret);
491 continue;
492 }
359 493
360 if (!found_first_passive) { 494 if (type == THERMAL_TRIP_PASSIVE) {
361 if (type == THERMAL_TRIP_PASSIVE) { 495 if (!found_first_passive) {
362 params->trip_switch_on = i; 496 params->trip_switch_on = i;
363 found_first_passive = true; 497 found_first_passive = true;
498 } else {
499 last_passive = i;
364 } 500 }
365 } else if (type == THERMAL_TRIP_PASSIVE) { 501 } else if (type == THERMAL_TRIP_ACTIVE) {
366 last_passive = i; 502 last_active = i;
367 } else { 503 } else {
368 break; 504 break;
369 } 505 }
370 } 506 }
371 507
372 if (last_passive != -1) { 508 if (last_passive != INVALID_TRIP) {
373 params->trip_max_desired_temperature = last_passive; 509 params->trip_max_desired_temperature = last_passive;
374 ret = 0; 510 } else if (found_first_passive) {
511 params->trip_max_desired_temperature = params->trip_switch_on;
512 params->trip_switch_on = INVALID_TRIP;
375 } else { 513 } else {
376 ret = -EINVAL; 514 params->trip_switch_on = INVALID_TRIP;
515 params->trip_max_desired_temperature = last_active;
377 } 516 }
378
379 return ret;
380} 517}
381 518
382static void reset_pid_controller(struct power_allocator_params *params) 519static void reset_pid_controller(struct power_allocator_params *params)
@@ -405,60 +542,45 @@ static void allow_maximum_power(struct thermal_zone_device *tz)
405 * power_allocator_bind() - bind the power_allocator governor to a thermal zone 542 * power_allocator_bind() - bind the power_allocator governor to a thermal zone
406 * @tz: thermal zone to bind it to 543 * @tz: thermal zone to bind it to
407 * 544 *
408 * Check that the thermal zone is valid for this governor, that is, it 545 * Initialize the PID controller parameters and bind it to the thermal
409 * has two thermal trips. If so, initialize the PID controller 546 * zone.
410 * parameters and bind it to the thermal zone.
411 * 547 *
412 * Return: 0 on success, -EINVAL if the trips were invalid or -ENOMEM 548 * Return: 0 on success, or -ENOMEM if we ran out of memory.
413 * if we ran out of memory.
414 */ 549 */
415static int power_allocator_bind(struct thermal_zone_device *tz) 550static int power_allocator_bind(struct thermal_zone_device *tz)
416{ 551{
417 int ret; 552 int ret;
418 struct power_allocator_params *params; 553 struct power_allocator_params *params;
419 int switch_on_temp, control_temp; 554 int control_temp;
420 u32 temperature_threshold;
421
422 if (!tz->tzp || !tz->tzp->sustainable_power) {
423 dev_err(&tz->device,
424 "power_allocator: missing sustainable_power\n");
425 return -EINVAL;
426 }
427 555
428 params = kzalloc(sizeof(*params), GFP_KERNEL); 556 params = kzalloc(sizeof(*params), GFP_KERNEL);
429 if (!params) 557 if (!params)
430 return -ENOMEM; 558 return -ENOMEM;
431 559
432 ret = get_governor_trips(tz, params); 560 if (!tz->tzp) {
433 if (ret) { 561 tz->tzp = kzalloc(sizeof(*tz->tzp), GFP_KERNEL);
434 dev_err(&tz->device, 562 if (!tz->tzp) {
435 "thermal zone %s has wrong trip setup for power allocator\n", 563 ret = -ENOMEM;
436 tz->type); 564 goto free_params;
437 goto free; 565 }
438 }
439 566
440 ret = tz->ops->get_trip_temp(tz, params->trip_switch_on, 567 params->allocated_tzp = true;
441 &switch_on_temp); 568 }
442 if (ret)
443 goto free;
444 569
445 ret = tz->ops->get_trip_temp(tz, params->trip_max_desired_temperature, 570 if (!tz->tzp->sustainable_power)
446 &control_temp); 571 dev_warn(&tz->device, "power_allocator: sustainable_power will be estimated\n");
447 if (ret)
448 goto free;
449 572
450 temperature_threshold = control_temp - switch_on_temp; 573 get_governor_trips(tz, params);
451 574
452 tz->tzp->k_po = tz->tzp->k_po ?: 575 if (tz->trips > 0) {
453 int_to_frac(tz->tzp->sustainable_power) / temperature_threshold; 576 ret = tz->ops->get_trip_temp(tz,
454 tz->tzp->k_pu = tz->tzp->k_pu ?: 577 params->trip_max_desired_temperature,
455 int_to_frac(2 * tz->tzp->sustainable_power) / 578 &control_temp);
456 temperature_threshold; 579 if (!ret)
457 tz->tzp->k_i = tz->tzp->k_i ?: int_to_frac(10) / 1000; 580 estimate_pid_constants(tz, tz->tzp->sustainable_power,
458 /* 581 params->trip_switch_on,
459 * The default for k_d and integral_cutoff is 0, so we can 582 control_temp, false);
460 * leave them as they are. 583 }
461 */
462 584
463 reset_pid_controller(params); 585 reset_pid_controller(params);
464 586
@@ -466,14 +588,23 @@ static int power_allocator_bind(struct thermal_zone_device *tz)
466 588
467 return 0; 589 return 0;
468 590
469free: 591free_params:
470 kfree(params); 592 kfree(params);
593
471 return ret; 594 return ret;
472} 595}
473 596
474static void power_allocator_unbind(struct thermal_zone_device *tz) 597static void power_allocator_unbind(struct thermal_zone_device *tz)
475{ 598{
599 struct power_allocator_params *params = tz->governor_data;
600
476 dev_dbg(&tz->device, "Unbinding from thermal zone %d\n", tz->id); 601 dev_dbg(&tz->device, "Unbinding from thermal zone %d\n", tz->id);
602
603 if (params->allocated_tzp) {
604 kfree(tz->tzp);
605 tz->tzp = NULL;
606 }
607
477 kfree(tz->governor_data); 608 kfree(tz->governor_data);
478 tz->governor_data = NULL; 609 tz->governor_data = NULL;
479} 610}
@@ -499,13 +630,7 @@ static int power_allocator_throttle(struct thermal_zone_device *tz, int trip)
499 630
500 ret = tz->ops->get_trip_temp(tz, params->trip_switch_on, 631 ret = tz->ops->get_trip_temp(tz, params->trip_switch_on,
501 &switch_on_temp); 632 &switch_on_temp);
502 if (ret) { 633 if (!ret && (current_temp < switch_on_temp)) {
503 dev_warn(&tz->device,
504 "Failed to get switch on temperature: %d\n", ret);
505 return ret;
506 }
507
508 if (current_temp < switch_on_temp) {
509 tz->passive = 0; 634 tz->passive = 0;
510 reset_pid_controller(params); 635 reset_pid_controller(params);
511 allow_maximum_power(tz); 636 allow_maximum_power(tz);
diff --git a/drivers/thermal/thermal_core.c b/drivers/thermal/thermal_core.c
index 5e5fc7015c7f..d9e525cc9c1c 100644
--- a/drivers/thermal/thermal_core.c
+++ b/drivers/thermal/thermal_core.c
@@ -1013,6 +1013,34 @@ int power_actor_get_max_power(struct thermal_cooling_device *cdev,
1013} 1013}
1014 1014
1015/** 1015/**
1016 * power_actor_get_min_power() - get the mainimum power that a cdev can consume
1017 * @cdev: pointer to &thermal_cooling_device
1018 * @tz: a valid thermal zone device pointer
1019 * @min_power: pointer in which to store the minimum power
1020 *
1021 * Calculate the minimum power consumption in milliwatts that the
1022 * cooling device can currently consume and store it in @min_power.
1023 *
1024 * Return: 0 on success, -EINVAL if @cdev doesn't support the
1025 * power_actor API or -E* on other error.
1026 */
1027int power_actor_get_min_power(struct thermal_cooling_device *cdev,
1028 struct thermal_zone_device *tz, u32 *min_power)
1029{
1030 unsigned long max_state;
1031 int ret;
1032
1033 if (!cdev_is_power_actor(cdev))
1034 return -EINVAL;
1035
1036 ret = cdev->ops->get_max_state(cdev, &max_state);
1037 if (ret)
1038 return ret;
1039
1040 return cdev->ops->state2power(cdev, tz, max_state, min_power);
1041}
1042
1043/**
1016 * power_actor_set_power() - limit the maximum power that a cooling device can consume 1044 * power_actor_set_power() - limit the maximum power that a cooling device can consume
1017 * @cdev: pointer to &thermal_cooling_device 1045 * @cdev: pointer to &thermal_cooling_device
1018 * @instance: thermal instance to update 1046 * @instance: thermal instance to update
diff --git a/drivers/thermal/ti-soc-thermal/Kconfig b/drivers/thermal/ti-soc-thermal/Kconfig
index bd4c7beba679..cb6686ff09ae 100644
--- a/drivers/thermal/ti-soc-thermal/Kconfig
+++ b/drivers/thermal/ti-soc-thermal/Kconfig
@@ -1,7 +1,5 @@
1config TI_SOC_THERMAL 1config TI_SOC_THERMAL
2 tristate "Texas Instruments SoCs temperature sensor driver" 2 tristate "Texas Instruments SoCs temperature sensor driver"
3 depends on THERMAL
4 depends on ARCH_HAS_BANDGAP
5 help 3 help
6 If you say yes here you get support for the Texas Instruments 4 If you say yes here you get support for the Texas Instruments
7 OMAP4460+ on die bandgap temperature sensor support. The register 5 OMAP4460+ on die bandgap temperature sensor support. The register
@@ -24,7 +22,7 @@ config TI_THERMAL
24config OMAP4_THERMAL 22config OMAP4_THERMAL
25 bool "Texas Instruments OMAP4 thermal support" 23 bool "Texas Instruments OMAP4 thermal support"
26 depends on TI_SOC_THERMAL 24 depends on TI_SOC_THERMAL
27 depends on ARCH_OMAP4 25 depends on ARCH_OMAP4 || COMPILE_TEST
28 help 26 help
29 If you say yes here you get thermal support for the Texas Instruments 27 If you say yes here you get thermal support for the Texas Instruments
30 OMAP4 SoC family. The current chip supported are: 28 OMAP4 SoC family. The current chip supported are:
@@ -38,7 +36,7 @@ config OMAP4_THERMAL
38config OMAP5_THERMAL 36config OMAP5_THERMAL
39 bool "Texas Instruments OMAP5 thermal support" 37 bool "Texas Instruments OMAP5 thermal support"
40 depends on TI_SOC_THERMAL 38 depends on TI_SOC_THERMAL
41 depends on SOC_OMAP5 39 depends on SOC_OMAP5 || COMPILE_TEST
42 help 40 help
43 If you say yes here you get thermal support for the Texas Instruments 41 If you say yes here you get thermal support for the Texas Instruments
44 OMAP5 SoC family. The current chip supported are: 42 OMAP5 SoC family. The current chip supported are:
@@ -50,7 +48,7 @@ config OMAP5_THERMAL
50config DRA752_THERMAL 48config DRA752_THERMAL
51 bool "Texas Instruments DRA752 thermal support" 49 bool "Texas Instruments DRA752 thermal support"
52 depends on TI_SOC_THERMAL 50 depends on TI_SOC_THERMAL
53 depends on SOC_DRA7XX 51 depends on SOC_DRA7XX || COMPILE_TEST
54 help 52 help
55 If you say yes here you get thermal support for the Texas Instruments 53 If you say yes here you get thermal support for the Texas Instruments
56 DRA752 SoC family. The current chip supported are: 54 DRA752 SoC family. The current chip supported are:
diff --git a/drivers/thunderbolt/nhi.c b/drivers/thunderbolt/nhi.c
index c68fe1222c16..20a41f7de76f 100644
--- a/drivers/thunderbolt/nhi.c
+++ b/drivers/thunderbolt/nhi.c
@@ -643,7 +643,7 @@ static struct pci_device_id nhi_ids[] = {
643 { 643 {
644 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0, 644 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
645 .vendor = PCI_VENDOR_ID_INTEL, .device = 0x156c, 645 .vendor = PCI_VENDOR_ID_INTEL, .device = 0x156c,
646 .subvendor = 0x2222, .subdevice = 0x1111, 646 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
647 }, 647 },
648 { 0,} 648 { 0,}
649}; 649};
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index 54e6c8ddef5d..b1e0ba3e525b 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -2910,3 +2910,5 @@ int serial8250_console_setup(struct uart_port *port, char *options, bool probe)
2910} 2910}
2911 2911
2912#endif /* CONFIG_SERIAL_8250_CONSOLE */ 2912#endif /* CONFIG_SERIAL_8250_CONSOLE */
2913
2914MODULE_LICENSE("GPL");
diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
index 867e9f3f3859..dcc50c878159 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.c
+++ b/drivers/usb/chipidea/ci_hdrc_imx.c
@@ -61,7 +61,7 @@ static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
61 { .compatible = "fsl,imx27-usb", .data = &imx27_usb_data}, 61 { .compatible = "fsl,imx27-usb", .data = &imx27_usb_data},
62 { .compatible = "fsl,imx6q-usb", .data = &imx6q_usb_data}, 62 { .compatible = "fsl,imx6q-usb", .data = &imx6q_usb_data},
63 { .compatible = "fsl,imx6sl-usb", .data = &imx6sl_usb_data}, 63 { .compatible = "fsl,imx6sl-usb", .data = &imx6sl_usb_data},
64 { .compatible = "fsl,imx6sx-usb", .data = &imx6sl_usb_data}, 64 { .compatible = "fsl,imx6sx-usb", .data = &imx6sx_usb_data},
65 { /* sentinel */ } 65 { /* sentinel */ }
66}; 66};
67MODULE_DEVICE_TABLE(of, ci_hdrc_imx_dt_ids); 67MODULE_DEVICE_TABLE(of, ci_hdrc_imx_dt_ids);
diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
index 9eae1a16cef9..4456d2cf80ff 100644
--- a/drivers/usb/chipidea/ci_hdrc_usb2.c
+++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
@@ -12,6 +12,7 @@
12#include <linux/dma-mapping.h> 12#include <linux/dma-mapping.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/of.h> 14#include <linux/of.h>
15#include <linux/of_platform.h>
15#include <linux/phy/phy.h> 16#include <linux/phy/phy.h>
16#include <linux/platform_device.h> 17#include <linux/platform_device.h>
17#include <linux/usb/chipidea.h> 18#include <linux/usb/chipidea.h>
@@ -30,18 +31,36 @@ static const struct ci_hdrc_platform_data ci_default_pdata = {
30 .flags = CI_HDRC_DISABLE_STREAMING, 31 .flags = CI_HDRC_DISABLE_STREAMING,
31}; 32};
32 33
34static struct ci_hdrc_platform_data ci_zynq_pdata = {
35 .capoffset = DEF_CAPOFFSET,
36};
37
38static const struct of_device_id ci_hdrc_usb2_of_match[] = {
39 { .compatible = "chipidea,usb2"},
40 { .compatible = "xlnx,zynq-usb-2.20a", .data = &ci_zynq_pdata},
41 { }
42};
43MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
44
33static int ci_hdrc_usb2_probe(struct platform_device *pdev) 45static int ci_hdrc_usb2_probe(struct platform_device *pdev)
34{ 46{
35 struct device *dev = &pdev->dev; 47 struct device *dev = &pdev->dev;
36 struct ci_hdrc_usb2_priv *priv; 48 struct ci_hdrc_usb2_priv *priv;
37 struct ci_hdrc_platform_data *ci_pdata = dev_get_platdata(dev); 49 struct ci_hdrc_platform_data *ci_pdata = dev_get_platdata(dev);
38 int ret; 50 int ret;
51 const struct of_device_id *match;
39 52
40 if (!ci_pdata) { 53 if (!ci_pdata) {
41 ci_pdata = devm_kmalloc(dev, sizeof(*ci_pdata), GFP_KERNEL); 54 ci_pdata = devm_kmalloc(dev, sizeof(*ci_pdata), GFP_KERNEL);
42 *ci_pdata = ci_default_pdata; /* struct copy */ 55 *ci_pdata = ci_default_pdata; /* struct copy */
43 } 56 }
44 57
58 match = of_match_device(ci_hdrc_usb2_of_match, &pdev->dev);
59 if (match && match->data) {
60 /* struct copy */
61 *ci_pdata = *(struct ci_hdrc_platform_data *)match->data;
62 }
63
45 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 64 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
46 if (!priv) 65 if (!priv)
47 return -ENOMEM; 66 return -ENOMEM;
@@ -96,12 +115,6 @@ static int ci_hdrc_usb2_remove(struct platform_device *pdev)
96 return 0; 115 return 0;
97} 116}
98 117
99static const struct of_device_id ci_hdrc_usb2_of_match[] = {
100 { .compatible = "chipidea,usb2" },
101 { }
102};
103MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
104
105static struct platform_driver ci_hdrc_usb2_driver = { 118static struct platform_driver ci_hdrc_usb2_driver = {
106 .probe = ci_hdrc_usb2_probe, 119 .probe = ci_hdrc_usb2_probe,
107 .remove = ci_hdrc_usb2_remove, 120 .remove = ci_hdrc_usb2_remove,
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index a637da25dda0..8223fe73ea85 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -656,6 +656,44 @@ __acquires(hwep->lock)
656 return 0; 656 return 0;
657} 657}
658 658
659static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
660{
661 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
662 int direction, retval = 0;
663 unsigned long flags;
664
665 if (ep == NULL || hwep->ep.desc == NULL)
666 return -EINVAL;
667
668 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
669 return -EOPNOTSUPP;
670
671 spin_lock_irqsave(hwep->lock, flags);
672
673 if (value && hwep->dir == TX && check_transfer &&
674 !list_empty(&hwep->qh.queue) &&
675 !usb_endpoint_xfer_control(hwep->ep.desc)) {
676 spin_unlock_irqrestore(hwep->lock, flags);
677 return -EAGAIN;
678 }
679
680 direction = hwep->dir;
681 do {
682 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
683
684 if (!value)
685 hwep->wedge = 0;
686
687 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
688 hwep->dir = (hwep->dir == TX) ? RX : TX;
689
690 } while (hwep->dir != direction);
691
692 spin_unlock_irqrestore(hwep->lock, flags);
693 return retval;
694}
695
696
659/** 697/**
660 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts 698 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
661 * @gadget: gadget 699 * @gadget: gadget
@@ -1051,7 +1089,7 @@ __acquires(ci->lock)
1051 num += ci->hw_ep_max / 2; 1089 num += ci->hw_ep_max / 2;
1052 1090
1053 spin_unlock(&ci->lock); 1091 spin_unlock(&ci->lock);
1054 err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep); 1092 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1055 spin_lock(&ci->lock); 1093 spin_lock(&ci->lock);
1056 if (!err) 1094 if (!err)
1057 isr_setup_status_phase(ci); 1095 isr_setup_status_phase(ci);
@@ -1117,8 +1155,8 @@ delegate:
1117 1155
1118 if (err < 0) { 1156 if (err < 0) {
1119 spin_unlock(&ci->lock); 1157 spin_unlock(&ci->lock);
1120 if (usb_ep_set_halt(&hwep->ep)) 1158 if (_ep_set_halt(&hwep->ep, 1, false))
1121 dev_err(ci->dev, "error: ep_set_halt\n"); 1159 dev_err(ci->dev, "error: _ep_set_halt\n");
1122 spin_lock(&ci->lock); 1160 spin_lock(&ci->lock);
1123 } 1161 }
1124} 1162}
@@ -1149,9 +1187,9 @@ __acquires(ci->lock)
1149 err = isr_setup_status_phase(ci); 1187 err = isr_setup_status_phase(ci);
1150 if (err < 0) { 1188 if (err < 0) {
1151 spin_unlock(&ci->lock); 1189 spin_unlock(&ci->lock);
1152 if (usb_ep_set_halt(&hwep->ep)) 1190 if (_ep_set_halt(&hwep->ep, 1, false))
1153 dev_err(ci->dev, 1191 dev_err(ci->dev,
1154 "error: ep_set_halt\n"); 1192 "error: _ep_set_halt\n");
1155 spin_lock(&ci->lock); 1193 spin_lock(&ci->lock);
1156 } 1194 }
1157 } 1195 }
@@ -1397,41 +1435,7 @@ static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1397 */ 1435 */
1398static int ep_set_halt(struct usb_ep *ep, int value) 1436static int ep_set_halt(struct usb_ep *ep, int value)
1399{ 1437{
1400 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1438 return _ep_set_halt(ep, value, true);
1401 int direction, retval = 0;
1402 unsigned long flags;
1403
1404 if (ep == NULL || hwep->ep.desc == NULL)
1405 return -EINVAL;
1406
1407 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
1408 return -EOPNOTSUPP;
1409
1410 spin_lock_irqsave(hwep->lock, flags);
1411
1412#ifndef STALL_IN
1413 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
1414 if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
1415 !list_empty(&hwep->qh.queue)) {
1416 spin_unlock_irqrestore(hwep->lock, flags);
1417 return -EAGAIN;
1418 }
1419#endif
1420
1421 direction = hwep->dir;
1422 do {
1423 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
1424
1425 if (!value)
1426 hwep->wedge = 0;
1427
1428 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1429 hwep->dir = (hwep->dir == TX) ? RX : TX;
1430
1431 } while (hwep->dir != direction);
1432
1433 spin_unlock_irqrestore(hwep->lock, flags);
1434 return retval;
1435} 1439}
1436 1440
1437/** 1441/**
diff --git a/drivers/usb/core/config.c b/drivers/usb/core/config.c
index b2a540b43f97..b9ddf0c1ffe5 100644
--- a/drivers/usb/core/config.c
+++ b/drivers/usb/core/config.c
@@ -112,7 +112,7 @@ static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
112 cfgno, inum, asnum, ep->desc.bEndpointAddress); 112 cfgno, inum, asnum, ep->desc.bEndpointAddress);
113 ep->ss_ep_comp.bmAttributes = 16; 113 ep->ss_ep_comp.bmAttributes = 16;
114 } else if (usb_endpoint_xfer_isoc(&ep->desc) && 114 } else if (usb_endpoint_xfer_isoc(&ep->desc) &&
115 desc->bmAttributes > 2) { 115 USB_SS_MULT(desc->bmAttributes) > 3) {
116 dev_warn(ddev, "Isoc endpoint has Mult of %d in " 116 dev_warn(ddev, "Isoc endpoint has Mult of %d in "
117 "config %d interface %d altsetting %d ep %d: " 117 "config %d interface %d altsetting %d ep %d: "
118 "setting to 3\n", desc->bmAttributes + 1, 118 "setting to 3\n", desc->bmAttributes + 1,
@@ -121,7 +121,8 @@ static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
121 } 121 }
122 122
123 if (usb_endpoint_xfer_isoc(&ep->desc)) 123 if (usb_endpoint_xfer_isoc(&ep->desc))
124 max_tx = (desc->bMaxBurst + 1) * (desc->bmAttributes + 1) * 124 max_tx = (desc->bMaxBurst + 1) *
125 (USB_SS_MULT(desc->bmAttributes)) *
125 usb_endpoint_maxp(&ep->desc); 126 usb_endpoint_maxp(&ep->desc);
126 else if (usb_endpoint_xfer_int(&ep->desc)) 127 else if (usb_endpoint_xfer_int(&ep->desc))
127 max_tx = usb_endpoint_maxp(&ep->desc) * 128 max_tx = usb_endpoint_maxp(&ep->desc) *
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index a5a1b7c45743..22e9606d8e08 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -514,8 +514,6 @@ static int dwc3_omap_probe(struct platform_device *pdev)
514 goto err1; 514 goto err1;
515 } 515 }
516 516
517 dwc3_omap_enable_irqs(omap);
518
519 ret = dwc3_omap_extcon_register(omap); 517 ret = dwc3_omap_extcon_register(omap);
520 if (ret < 0) 518 if (ret < 0)
521 goto err2; 519 goto err2;
@@ -526,6 +524,8 @@ static int dwc3_omap_probe(struct platform_device *pdev)
526 goto err3; 524 goto err3;
527 } 525 }
528 526
527 dwc3_omap_enable_irqs(omap);
528
529 return 0; 529 return 0;
530 530
531err3: 531err3:
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 0c25704dcb6b..1e8bdf817811 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2665,8 +2665,6 @@ static irqreturn_t dwc3_interrupt(int irq, void *_dwc)
2665 int i; 2665 int i;
2666 irqreturn_t ret = IRQ_NONE; 2666 irqreturn_t ret = IRQ_NONE;
2667 2667
2668 spin_lock(&dwc->lock);
2669
2670 for (i = 0; i < dwc->num_event_buffers; i++) { 2668 for (i = 0; i < dwc->num_event_buffers; i++) {
2671 irqreturn_t status; 2669 irqreturn_t status;
2672 2670
@@ -2675,8 +2673,6 @@ static irqreturn_t dwc3_interrupt(int irq, void *_dwc)
2675 ret = status; 2673 ret = status;
2676 } 2674 }
2677 2675
2678 spin_unlock(&dwc->lock);
2679
2680 return ret; 2676 return ret;
2681} 2677}
2682 2678
diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c
index 978435a51038..6399c106a3a5 100644
--- a/drivers/usb/gadget/epautoconf.c
+++ b/drivers/usb/gadget/epautoconf.c
@@ -186,6 +186,7 @@ void usb_ep_autoconfig_reset (struct usb_gadget *gadget)
186 186
187 list_for_each_entry (ep, &gadget->ep_list, ep_list) { 187 list_for_each_entry (ep, &gadget->ep_list, ep_list) {
188 ep->claimed = false; 188 ep->claimed = false;
189 ep->driver_data = NULL;
189 } 190 }
190 gadget->in_epnum = 0; 191 gadget->in_epnum = 0;
191 gadget->out_epnum = 0; 192 gadget->out_epnum = 0;
diff --git a/drivers/usb/gadget/udc/amd5536udc.c b/drivers/usb/gadget/udc/amd5536udc.c
index fdacddb18c00..175ca93fe5e2 100644
--- a/drivers/usb/gadget/udc/amd5536udc.c
+++ b/drivers/usb/gadget/udc/amd5536udc.c
@@ -3138,8 +3138,8 @@ static void udc_pci_remove(struct pci_dev *pdev)
3138 writel(AMD_BIT(UDC_DEVCFG_SOFTRESET), &dev->regs->cfg); 3138 writel(AMD_BIT(UDC_DEVCFG_SOFTRESET), &dev->regs->cfg);
3139 if (dev->irq_registered) 3139 if (dev->irq_registered)
3140 free_irq(pdev->irq, dev); 3140 free_irq(pdev->irq, dev);
3141 if (dev->regs) 3141 if (dev->virt_addr)
3142 iounmap(dev->regs); 3142 iounmap(dev->virt_addr);
3143 if (dev->mem_region) 3143 if (dev->mem_region)
3144 release_mem_region(pci_resource_start(pdev, 0), 3144 release_mem_region(pci_resource_start(pdev, 0),
3145 pci_resource_len(pdev, 0)); 3145 pci_resource_len(pdev, 0));
@@ -3226,17 +3226,13 @@ static int udc_pci_probe(
3226 3226
3227 /* init */ 3227 /* init */
3228 dev = kzalloc(sizeof(struct udc), GFP_KERNEL); 3228 dev = kzalloc(sizeof(struct udc), GFP_KERNEL);
3229 if (!dev) { 3229 if (!dev)
3230 retval = -ENOMEM; 3230 return -ENOMEM;
3231 goto finished;
3232 }
3233 3231
3234 /* pci setup */ 3232 /* pci setup */
3235 if (pci_enable_device(pdev) < 0) { 3233 if (pci_enable_device(pdev) < 0) {
3236 kfree(dev);
3237 dev = NULL;
3238 retval = -ENODEV; 3234 retval = -ENODEV;
3239 goto finished; 3235 goto err_pcidev;
3240 } 3236 }
3241 dev->active = 1; 3237 dev->active = 1;
3242 3238
@@ -3246,28 +3242,22 @@ static int udc_pci_probe(
3246 3242
3247 if (!request_mem_region(resource, len, name)) { 3243 if (!request_mem_region(resource, len, name)) {
3248 dev_dbg(&pdev->dev, "pci device used already\n"); 3244 dev_dbg(&pdev->dev, "pci device used already\n");
3249 kfree(dev);
3250 dev = NULL;
3251 retval = -EBUSY; 3245 retval = -EBUSY;
3252 goto finished; 3246 goto err_memreg;
3253 } 3247 }
3254 dev->mem_region = 1; 3248 dev->mem_region = 1;
3255 3249
3256 dev->virt_addr = ioremap_nocache(resource, len); 3250 dev->virt_addr = ioremap_nocache(resource, len);
3257 if (dev->virt_addr == NULL) { 3251 if (dev->virt_addr == NULL) {
3258 dev_dbg(&pdev->dev, "start address cannot be mapped\n"); 3252 dev_dbg(&pdev->dev, "start address cannot be mapped\n");
3259 kfree(dev);
3260 dev = NULL;
3261 retval = -EFAULT; 3253 retval = -EFAULT;
3262 goto finished; 3254 goto err_ioremap;
3263 } 3255 }
3264 3256
3265 if (!pdev->irq) { 3257 if (!pdev->irq) {
3266 dev_err(&pdev->dev, "irq not set\n"); 3258 dev_err(&pdev->dev, "irq not set\n");
3267 kfree(dev);
3268 dev = NULL;
3269 retval = -ENODEV; 3259 retval = -ENODEV;
3270 goto finished; 3260 goto err_irq;
3271 } 3261 }
3272 3262
3273 spin_lock_init(&dev->lock); 3263 spin_lock_init(&dev->lock);
@@ -3283,10 +3273,8 @@ static int udc_pci_probe(
3283 3273
3284 if (request_irq(pdev->irq, udc_irq, IRQF_SHARED, name, dev) != 0) { 3274 if (request_irq(pdev->irq, udc_irq, IRQF_SHARED, name, dev) != 0) {
3285 dev_dbg(&pdev->dev, "request_irq(%d) fail\n", pdev->irq); 3275 dev_dbg(&pdev->dev, "request_irq(%d) fail\n", pdev->irq);
3286 kfree(dev);
3287 dev = NULL;
3288 retval = -EBUSY; 3276 retval = -EBUSY;
3289 goto finished; 3277 goto err_irq;
3290 } 3278 }
3291 dev->irq_registered = 1; 3279 dev->irq_registered = 1;
3292 3280
@@ -3314,8 +3302,17 @@ static int udc_pci_probe(
3314 return 0; 3302 return 0;
3315 3303
3316finished: 3304finished:
3317 if (dev) 3305 udc_pci_remove(pdev);
3318 udc_pci_remove(pdev); 3306 return retval;
3307
3308err_irq:
3309 iounmap(dev->virt_addr);
3310err_ioremap:
3311 release_mem_region(resource, len);
3312err_memreg:
3313 pci_disable_device(pdev);
3314err_pcidev:
3315 kfree(dev);
3319 return retval; 3316 return retval;
3320} 3317}
3321 3318
diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.c b/drivers/usb/gadget/udc/atmel_usba_udc.c
index 3dfada8d6061..f0f2b066ac08 100644
--- a/drivers/usb/gadget/udc/atmel_usba_udc.c
+++ b/drivers/usb/gadget/udc/atmel_usba_udc.c
@@ -2002,6 +2002,17 @@ static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2002 ep->udc = udc; 2002 ep->udc = udc;
2003 INIT_LIST_HEAD(&ep->queue); 2003 INIT_LIST_HEAD(&ep->queue);
2004 2004
2005 if (ep->index == 0) {
2006 ep->ep.caps.type_control = true;
2007 } else {
2008 ep->ep.caps.type_iso = ep->can_isoc;
2009 ep->ep.caps.type_bulk = true;
2010 ep->ep.caps.type_int = true;
2011 }
2012
2013 ep->ep.caps.dir_in = true;
2014 ep->ep.caps.dir_out = true;
2015
2005 if (i) 2016 if (i)
2006 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 2017 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2007 2018
diff --git a/drivers/usb/gadget/udc/bdc/bdc_core.c b/drivers/usb/gadget/udc/bdc/bdc_core.c
index 5c8f4effb62a..ccb9c213cc9f 100644
--- a/drivers/usb/gadget/udc/bdc/bdc_core.c
+++ b/drivers/usb/gadget/udc/bdc/bdc_core.c
@@ -324,8 +324,7 @@ static void bdc_mem_free(struct bdc *bdc)
324 bdc->scratchpad.buff, bdc->scratchpad.sp_dma); 324 bdc->scratchpad.buff, bdc->scratchpad.sp_dma);
325 325
326 /* Destroy the dma pools */ 326 /* Destroy the dma pools */
327 if (bdc->bd_table_pool) 327 dma_pool_destroy(bdc->bd_table_pool);
328 dma_pool_destroy(bdc->bd_table_pool);
329 328
330 /* Free the bdc_ep array */ 329 /* Free the bdc_ep array */
331 kfree(bdc->bdc_ep_array); 330 kfree(bdc->bdc_ep_array);
diff --git a/drivers/usb/gadget/udc/dummy_hcd.c b/drivers/usb/gadget/udc/dummy_hcd.c
index 1379ad40d864..27af0f008b57 100644
--- a/drivers/usb/gadget/udc/dummy_hcd.c
+++ b/drivers/usb/gadget/udc/dummy_hcd.c
@@ -1348,6 +1348,7 @@ static int transfer(struct dummy_hcd *dum_hcd, struct urb *urb,
1348{ 1348{
1349 struct dummy *dum = dum_hcd->dum; 1349 struct dummy *dum = dum_hcd->dum;
1350 struct dummy_request *req; 1350 struct dummy_request *req;
1351 int sent = 0;
1351 1352
1352top: 1353top:
1353 /* if there's no request queued, the device is NAKing; return */ 1354 /* if there's no request queued, the device is NAKing; return */
@@ -1385,12 +1386,15 @@ top:
1385 if (len == 0) 1386 if (len == 0)
1386 break; 1387 break;
1387 1388
1388 /* use an extra pass for the final short packet */ 1389 /* send multiple of maxpacket first, then remainder */
1389 if (len > ep->ep.maxpacket) { 1390 if (len >= ep->ep.maxpacket) {
1390 rescan = 1; 1391 is_short = 0;
1391 len -= (len % ep->ep.maxpacket); 1392 if (len % ep->ep.maxpacket)
1393 rescan = 1;
1394 len -= len % ep->ep.maxpacket;
1395 } else {
1396 is_short = 1;
1392 } 1397 }
1393 is_short = (len % ep->ep.maxpacket) != 0;
1394 1398
1395 len = dummy_perform_transfer(urb, req, len); 1399 len = dummy_perform_transfer(urb, req, len);
1396 1400
@@ -1399,6 +1403,7 @@ top:
1399 req->req.status = len; 1403 req->req.status = len;
1400 } else { 1404 } else {
1401 limit -= len; 1405 limit -= len;
1406 sent += len;
1402 urb->actual_length += len; 1407 urb->actual_length += len;
1403 req->req.actual += len; 1408 req->req.actual += len;
1404 } 1409 }
@@ -1421,7 +1426,7 @@ top:
1421 *status = -EOVERFLOW; 1426 *status = -EOVERFLOW;
1422 else 1427 else
1423 *status = 0; 1428 *status = 0;
1424 } else if (!to_host) { 1429 } else {
1425 *status = 0; 1430 *status = 0;
1426 if (host_len > dev_len) 1431 if (host_len > dev_len)
1427 req->req.status = -EOVERFLOW; 1432 req->req.status = -EOVERFLOW;
@@ -1429,15 +1434,24 @@ top:
1429 req->req.status = 0; 1434 req->req.status = 0;
1430 } 1435 }
1431 1436
1432 /* many requests terminate without a short packet */ 1437 /*
1438 * many requests terminate without a short packet.
1439 * send a zlp if demanded by flags.
1440 */
1433 } else { 1441 } else {
1434 if (req->req.length == req->req.actual 1442 if (req->req.length == req->req.actual) {
1435 && !req->req.zero) 1443 if (req->req.zero && to_host)
1436 req->req.status = 0; 1444 rescan = 1;
1437 if (urb->transfer_buffer_length == urb->actual_length 1445 else
1438 && !(urb->transfer_flags 1446 req->req.status = 0;
1439 & URB_ZERO_PACKET)) 1447 }
1440 *status = 0; 1448 if (urb->transfer_buffer_length == urb->actual_length) {
1449 if (urb->transfer_flags & URB_ZERO_PACKET &&
1450 !to_host)
1451 rescan = 1;
1452 else
1453 *status = 0;
1454 }
1441 } 1455 }
1442 1456
1443 /* device side completion --> continuable */ 1457 /* device side completion --> continuable */
@@ -1460,7 +1474,7 @@ top:
1460 if (rescan) 1474 if (rescan)
1461 goto top; 1475 goto top;
1462 } 1476 }
1463 return limit; 1477 return sent;
1464} 1478}
1465 1479
1466static int periodic_bytes(struct dummy *dum, struct dummy_ep *ep) 1480static int periodic_bytes(struct dummy *dum, struct dummy_ep *ep)
@@ -1890,7 +1904,7 @@ restart:
1890 default: 1904 default:
1891treat_control_like_bulk: 1905treat_control_like_bulk:
1892 ep->last_io = jiffies; 1906 ep->last_io = jiffies;
1893 total = transfer(dum_hcd, urb, ep, limit, &status); 1907 total -= transfer(dum_hcd, urb, ep, limit, &status);
1894 break; 1908 break;
1895 } 1909 }
1896 1910
diff --git a/drivers/usb/gadget/udc/gr_udc.c b/drivers/usb/gadget/udc/gr_udc.c
index 8aa2593c2c36..b9429bc42511 100644
--- a/drivers/usb/gadget/udc/gr_udc.c
+++ b/drivers/usb/gadget/udc/gr_udc.c
@@ -2117,8 +2117,7 @@ static int gr_remove(struct platform_device *pdev)
2117 return -EBUSY; 2117 return -EBUSY;
2118 2118
2119 gr_dfs_delete(dev); 2119 gr_dfs_delete(dev);
2120 if (dev->desc_pool) 2120 dma_pool_destroy(dev->desc_pool);
2121 dma_pool_destroy(dev->desc_pool);
2122 platform_set_drvdata(pdev, NULL); 2121 platform_set_drvdata(pdev, NULL);
2123 2122
2124 gr_free_request(&dev->epi[0].ep, &dev->ep0reqi->req); 2123 gr_free_request(&dev->epi[0].ep, &dev->ep0reqi->req);
diff --git a/drivers/usb/gadget/udc/mv_u3d_core.c b/drivers/usb/gadget/udc/mv_u3d_core.c
index 4c489692745e..dafe74eb9ade 100644
--- a/drivers/usb/gadget/udc/mv_u3d_core.c
+++ b/drivers/usb/gadget/udc/mv_u3d_core.c
@@ -1767,8 +1767,7 @@ static int mv_u3d_remove(struct platform_device *dev)
1767 usb_del_gadget_udc(&u3d->gadget); 1767 usb_del_gadget_udc(&u3d->gadget);
1768 1768
1769 /* free memory allocated in probe */ 1769 /* free memory allocated in probe */
1770 if (u3d->trb_pool) 1770 dma_pool_destroy(u3d->trb_pool);
1771 dma_pool_destroy(u3d->trb_pool);
1772 1771
1773 if (u3d->ep_context) 1772 if (u3d->ep_context)
1774 dma_free_coherent(&dev->dev, u3d->ep_context_size, 1773 dma_free_coherent(&dev->dev, u3d->ep_context_size,
diff --git a/drivers/usb/gadget/udc/mv_udc_core.c b/drivers/usb/gadget/udc/mv_udc_core.c
index 339af51df57d..81b6229c7805 100644
--- a/drivers/usb/gadget/udc/mv_udc_core.c
+++ b/drivers/usb/gadget/udc/mv_udc_core.c
@@ -2100,8 +2100,7 @@ static int mv_udc_remove(struct platform_device *pdev)
2100 } 2100 }
2101 2101
2102 /* free memory allocated in probe */ 2102 /* free memory allocated in probe */
2103 if (udc->dtd_pool) 2103 dma_pool_destroy(udc->dtd_pool);
2104 dma_pool_destroy(udc->dtd_pool);
2105 2104
2106 if (udc->ep_dqh) 2105 if (udc->ep_dqh)
2107 dma_free_coherent(&pdev->dev, udc->ep_dqh_size, 2106 dma_free_coherent(&pdev->dev, udc->ep_dqh_size,
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 9a8c936cd42c..41f841fa6c4d 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -1498,10 +1498,10 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1498 * use Event Data TRBs, and we don't chain in a link TRB on short 1498 * use Event Data TRBs, and we don't chain in a link TRB on short
1499 * transfers, we're basically dividing by 1. 1499 * transfers, we're basically dividing by 1.
1500 * 1500 *
1501 * xHCI 1.0 specification indicates that the Average TRB Length should 1501 * xHCI 1.0 and 1.1 specification indicates that the Average TRB Length
1502 * be set to 8 for control endpoints. 1502 * should be set to 8 for control endpoints.
1503 */ 1503 */
1504 if (usb_endpoint_xfer_control(&ep->desc) && xhci->hci_version == 0x100) 1504 if (usb_endpoint_xfer_control(&ep->desc) && xhci->hci_version >= 0x100)
1505 ep_ctx->tx_info |= cpu_to_le32(AVG_TRB_LENGTH_FOR_EP(8)); 1505 ep_ctx->tx_info |= cpu_to_le32(AVG_TRB_LENGTH_FOR_EP(8));
1506 else 1506 else
1507 ep_ctx->tx_info |= 1507 ep_ctx->tx_info |=
@@ -1792,8 +1792,7 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
1792 int size; 1792 int size;
1793 int i, j, num_ports; 1793 int i, j, num_ports;
1794 1794
1795 if (timer_pending(&xhci->cmd_timer)) 1795 del_timer_sync(&xhci->cmd_timer);
1796 del_timer_sync(&xhci->cmd_timer);
1797 1796
1798 /* Free the Event Ring Segment Table and the actual Event Ring */ 1797 /* Free the Event Ring Segment Table and the actual Event Ring */
1799 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries); 1798 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);
@@ -2321,6 +2320,10 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2321 2320
2322 INIT_LIST_HEAD(&xhci->cmd_list); 2321 INIT_LIST_HEAD(&xhci->cmd_list);
2323 2322
2323 /* init command timeout timer */
2324 setup_timer(&xhci->cmd_timer, xhci_handle_command_timeout,
2325 (unsigned long)xhci);
2326
2324 page_size = readl(&xhci->op_regs->page_size); 2327 page_size = readl(&xhci->op_regs->page_size);
2325 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 2328 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2326 "Supported page size register = 0x%x", page_size); 2329 "Supported page size register = 0x%x", page_size);
@@ -2505,10 +2508,6 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2505 "Wrote ERST address to ir_set 0."); 2508 "Wrote ERST address to ir_set 0.");
2506 xhci_print_ir_set(xhci, 0); 2509 xhci_print_ir_set(xhci, 0);
2507 2510
2508 /* init command timeout timer */
2509 setup_timer(&xhci->cmd_timer, xhci_handle_command_timeout,
2510 (unsigned long)xhci);
2511
2512 /* 2511 /*
2513 * XXX: Might need to set the Interrupter Moderation Register to 2512 * XXX: Might need to set the Interrupter Moderation Register to
2514 * something other than the default (~1ms minimum between interrupts). 2513 * something other than the default (~1ms minimum between interrupts).
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 5590eac2b22d..c79d33676672 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -180,51 +180,6 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
180 "QUIRK: Resetting on resume"); 180 "QUIRK: Resetting on resume");
181} 181}
182 182
183/*
184 * In some Intel xHCI controllers, in order to get D3 working,
185 * through a vendor specific SSIC CONFIG register at offset 0x883c,
186 * SSIC PORT need to be marked as "unused" before putting xHCI
187 * into D3. After D3 exit, the SSIC port need to be marked as "used".
188 * Without this change, xHCI might not enter D3 state.
189 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
190 * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
191 */
192static void xhci_pme_quirk(struct usb_hcd *hcd, bool suspend)
193{
194 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
195 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
196 u32 val;
197 void __iomem *reg;
198
199 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
200 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
201
202 reg = (void __iomem *) xhci->cap_regs + PORT2_SSIC_CONFIG_REG2;
203
204 /* Notify SSIC that SSIC profile programming is not done */
205 val = readl(reg) & ~PROG_DONE;
206 writel(val, reg);
207
208 /* Mark SSIC port as unused(suspend) or used(resume) */
209 val = readl(reg);
210 if (suspend)
211 val |= SSIC_PORT_UNUSED;
212 else
213 val &= ~SSIC_PORT_UNUSED;
214 writel(val, reg);
215
216 /* Notify SSIC that SSIC profile programming is done */
217 val = readl(reg) | PROG_DONE;
218 writel(val, reg);
219 readl(reg);
220 }
221
222 reg = (void __iomem *) xhci->cap_regs + 0x80a4;
223 val = readl(reg);
224 writel(val | BIT(28), reg);
225 readl(reg);
226}
227
228#ifdef CONFIG_ACPI 183#ifdef CONFIG_ACPI
229static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) 184static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev)
230{ 185{
@@ -345,6 +300,51 @@ static void xhci_pci_remove(struct pci_dev *dev)
345} 300}
346 301
347#ifdef CONFIG_PM 302#ifdef CONFIG_PM
303/*
304 * In some Intel xHCI controllers, in order to get D3 working,
305 * through a vendor specific SSIC CONFIG register at offset 0x883c,
306 * SSIC PORT need to be marked as "unused" before putting xHCI
307 * into D3. After D3 exit, the SSIC port need to be marked as "used".
308 * Without this change, xHCI might not enter D3 state.
309 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
310 * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
311 */
312static void xhci_pme_quirk(struct usb_hcd *hcd, bool suspend)
313{
314 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
315 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
316 u32 val;
317 void __iomem *reg;
318
319 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
320 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
321
322 reg = (void __iomem *) xhci->cap_regs + PORT2_SSIC_CONFIG_REG2;
323
324 /* Notify SSIC that SSIC profile programming is not done */
325 val = readl(reg) & ~PROG_DONE;
326 writel(val, reg);
327
328 /* Mark SSIC port as unused(suspend) or used(resume) */
329 val = readl(reg);
330 if (suspend)
331 val |= SSIC_PORT_UNUSED;
332 else
333 val &= ~SSIC_PORT_UNUSED;
334 writel(val, reg);
335
336 /* Notify SSIC that SSIC profile programming is done */
337 val = readl(reg) | PROG_DONE;
338 writel(val, reg);
339 readl(reg);
340 }
341
342 reg = (void __iomem *) xhci->cap_regs + 0x80a4;
343 val = readl(reg);
344 writel(val | BIT(28), reg);
345 readl(reg);
346}
347
348static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup) 348static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
349{ 349{
350 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 350 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index a47a1e897086..43291f93afeb 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -302,6 +302,15 @@ static int xhci_abort_cmd_ring(struct xhci_hcd *xhci)
302 ret = xhci_handshake(&xhci->op_regs->cmd_ring, 302 ret = xhci_handshake(&xhci->op_regs->cmd_ring,
303 CMD_RING_RUNNING, 0, 5 * 1000 * 1000); 303 CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
304 if (ret < 0) { 304 if (ret < 0) {
305 /* we are about to kill xhci, give it one more chance */
306 xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
307 &xhci->op_regs->cmd_ring);
308 udelay(1000);
309 ret = xhci_handshake(&xhci->op_regs->cmd_ring,
310 CMD_RING_RUNNING, 0, 3 * 1000 * 1000);
311 if (ret == 0)
312 return 0;
313
305 xhci_err(xhci, "Stopped the command ring failed, " 314 xhci_err(xhci, "Stopped the command ring failed, "
306 "maybe the host is dead\n"); 315 "maybe the host is dead\n");
307 xhci->xhc_state |= XHCI_STATE_DYING; 316 xhci->xhc_state |= XHCI_STATE_DYING;
@@ -3461,8 +3470,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3461 if (start_cycle == 0) 3470 if (start_cycle == 0)
3462 field |= 0x1; 3471 field |= 0x1;
3463 3472
3464 /* xHCI 1.0 6.4.1.2.1: Transfer Type field */ 3473 /* xHCI 1.0/1.1 6.4.1.2.1: Transfer Type field */
3465 if (xhci->hci_version == 0x100) { 3474 if (xhci->hci_version >= 0x100) {
3466 if (urb->transfer_buffer_length > 0) { 3475 if (urb->transfer_buffer_length > 0) {
3467 if (setup->bRequestType & USB_DIR_IN) 3476 if (setup->bRequestType & USB_DIR_IN)
3468 field |= TRB_TX_TYPE(TRB_DATA_IN); 3477 field |= TRB_TX_TYPE(TRB_DATA_IN);
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 6b0f4a47e402..9957bd96d4bc 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -146,7 +146,8 @@ static int xhci_start(struct xhci_hcd *xhci)
146 "waited %u microseconds.\n", 146 "waited %u microseconds.\n",
147 XHCI_MAX_HALT_USEC); 147 XHCI_MAX_HALT_USEC);
148 if (!ret) 148 if (!ret)
149 xhci->xhc_state &= ~XHCI_STATE_HALTED; 149 xhci->xhc_state &= ~(XHCI_STATE_HALTED | XHCI_STATE_DYING);
150
150 return ret; 151 return ret;
151} 152}
152 153
@@ -654,15 +655,6 @@ int xhci_run(struct usb_hcd *hcd)
654} 655}
655EXPORT_SYMBOL_GPL(xhci_run); 656EXPORT_SYMBOL_GPL(xhci_run);
656 657
657static void xhci_only_stop_hcd(struct usb_hcd *hcd)
658{
659 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
660
661 spin_lock_irq(&xhci->lock);
662 xhci_halt(xhci);
663 spin_unlock_irq(&xhci->lock);
664}
665
666/* 658/*
667 * Stop xHCI driver. 659 * Stop xHCI driver.
668 * 660 *
@@ -677,12 +669,14 @@ void xhci_stop(struct usb_hcd *hcd)
677 u32 temp; 669 u32 temp;
678 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 670 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
679 671
680 if (!usb_hcd_is_primary_hcd(hcd)) { 672 if (xhci->xhc_state & XHCI_STATE_HALTED)
681 xhci_only_stop_hcd(xhci->shared_hcd);
682 return; 673 return;
683 }
684 674
675 mutex_lock(&xhci->mutex);
685 spin_lock_irq(&xhci->lock); 676 spin_lock_irq(&xhci->lock);
677 xhci->xhc_state |= XHCI_STATE_HALTED;
678 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
679
686 /* Make sure the xHC is halted for a USB3 roothub 680 /* Make sure the xHC is halted for a USB3 roothub
687 * (xhci_stop() could be called as part of failed init). 681 * (xhci_stop() could be called as part of failed init).
688 */ 682 */
@@ -717,6 +711,7 @@ void xhci_stop(struct usb_hcd *hcd)
717 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 711 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
718 "xhci_stop completed - status = %x", 712 "xhci_stop completed - status = %x",
719 readl(&xhci->op_regs->status)); 713 readl(&xhci->op_regs->status));
714 mutex_unlock(&xhci->mutex);
720} 715}
721 716
722/* 717/*
@@ -3793,6 +3788,9 @@ static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3793 3788
3794 mutex_lock(&xhci->mutex); 3789 mutex_lock(&xhci->mutex);
3795 3790
3791 if (xhci->xhc_state) /* dying or halted */
3792 goto out;
3793
3796 if (!udev->slot_id) { 3794 if (!udev->slot_id) {
3797 xhci_dbg_trace(xhci, trace_xhci_dbg_address, 3795 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3798 "Bad Slot ID %d", udev->slot_id); 3796 "Bad Slot ID %d", udev->slot_id);
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 514a6cdaeff6..4a518ff12310 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1051,6 +1051,7 @@ void musb_start(struct musb *musb)
1051 * (c) peripheral initiates, using SRP 1051 * (c) peripheral initiates, using SRP
1052 */ 1052 */
1053 if (musb->port_mode != MUSB_PORT_MODE_HOST && 1053 if (musb->port_mode != MUSB_PORT_MODE_HOST &&
1054 musb->xceiv->otg->state != OTG_STATE_A_WAIT_BCON &&
1054 (devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) { 1055 (devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) {
1055 musb->is_active = 1; 1056 musb->is_active = 1;
1056 } else { 1057 } else {
@@ -2448,6 +2449,9 @@ static int musb_suspend(struct device *dev)
2448 struct musb *musb = dev_to_musb(dev); 2449 struct musb *musb = dev_to_musb(dev);
2449 unsigned long flags; 2450 unsigned long flags;
2450 2451
2452 musb_platform_disable(musb);
2453 musb_generic_disable(musb);
2454
2451 spin_lock_irqsave(&musb->lock, flags); 2455 spin_lock_irqsave(&musb->lock, flags);
2452 2456
2453 if (is_peripheral_active(musb)) { 2457 if (is_peripheral_active(musb)) {
@@ -2501,6 +2505,9 @@ static int musb_resume(struct device *dev)
2501 pm_runtime_disable(dev); 2505 pm_runtime_disable(dev);
2502 pm_runtime_set_active(dev); 2506 pm_runtime_set_active(dev);
2503 pm_runtime_enable(dev); 2507 pm_runtime_enable(dev);
2508
2509 musb_start(musb);
2510
2504 return 0; 2511 return 0;
2505} 2512}
2506 2513
diff --git a/drivers/usb/musb/musb_cppi41.c b/drivers/usb/musb/musb_cppi41.c
index d07cafb7d5f5..e499b862a946 100644
--- a/drivers/usb/musb/musb_cppi41.c
+++ b/drivers/usb/musb/musb_cppi41.c
@@ -551,6 +551,9 @@ static int cppi41_dma_channel_abort(struct dma_channel *channel)
551 } else { 551 } else {
552 cppi41_set_autoreq_mode(cppi41_channel, EP_MODE_AUTOREQ_NONE); 552 cppi41_set_autoreq_mode(cppi41_channel, EP_MODE_AUTOREQ_NONE);
553 553
554 /* delay to drain to cppi dma pipeline for isoch */
555 udelay(250);
556
554 csr = musb_readw(epio, MUSB_RXCSR); 557 csr = musb_readw(epio, MUSB_RXCSR);
555 csr &= ~(MUSB_RXCSR_H_REQPKT | MUSB_RXCSR_DMAENAB); 558 csr &= ~(MUSB_RXCSR_H_REQPKT | MUSB_RXCSR_DMAENAB);
556 musb_writew(epio, MUSB_RXCSR, csr); 559 musb_writew(epio, MUSB_RXCSR, csr);
diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index a0cfead6150f..84512d1d5eee 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -225,8 +225,11 @@ static void dsps_musb_enable(struct musb *musb)
225 225
226 dsps_writel(reg_base, wrp->epintr_set, epmask); 226 dsps_writel(reg_base, wrp->epintr_set, epmask);
227 dsps_writel(reg_base, wrp->coreintr_set, coremask); 227 dsps_writel(reg_base, wrp->coreintr_set, coremask);
228 /* start polling for ID change. */ 228 /* start polling for ID change in dual-role idle mode */
229 mod_timer(&glue->timer, jiffies + msecs_to_jiffies(wrp->poll_timeout)); 229 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
230 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
231 mod_timer(&glue->timer, jiffies +
232 msecs_to_jiffies(wrp->poll_timeout));
230 dsps_musb_try_idle(musb, 0); 233 dsps_musb_try_idle(musb, 0);
231} 234}
232 235
diff --git a/drivers/usb/musb/ux500.c b/drivers/usb/musb/ux500.c
index 39168fe9b406..b2685e75a683 100644
--- a/drivers/usb/musb/ux500.c
+++ b/drivers/usb/musb/ux500.c
@@ -379,6 +379,8 @@ static const struct of_device_id ux500_match[] = {
379 {} 379 {}
380}; 380};
381 381
382MODULE_DEVICE_TABLE(of, ux500_match);
383
382static struct platform_driver ux500_driver = { 384static struct platform_driver ux500_driver = {
383 .probe = ux500_probe, 385 .probe = ux500_probe,
384 .remove = ux500_remove, 386 .remove = ux500_remove,
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 7d3beee2a587..173132416170 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -155,7 +155,7 @@ config USB_MSM_OTG
155config USB_QCOM_8X16_PHY 155config USB_QCOM_8X16_PHY
156 tristate "Qualcomm APQ8016/MSM8916 on-chip USB PHY controller support" 156 tristate "Qualcomm APQ8016/MSM8916 on-chip USB PHY controller support"
157 depends on ARCH_QCOM || COMPILE_TEST 157 depends on ARCH_QCOM || COMPILE_TEST
158 depends on RESET_CONTROLLER 158 depends on RESET_CONTROLLER && EXTCON
159 select USB_PHY 159 select USB_PHY
160 select USB_ULPI_VIEWPORT 160 select USB_ULPI_VIEWPORT
161 help 161 help
diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c
index ec6ecd03269c..5320cb8642cb 100644
--- a/drivers/usb/phy/phy-generic.c
+++ b/drivers/usb/phy/phy-generic.c
@@ -232,7 +232,8 @@ int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_generic *nop,
232 clk_rate = pdata->clk_rate; 232 clk_rate = pdata->clk_rate;
233 needs_vcc = pdata->needs_vcc; 233 needs_vcc = pdata->needs_vcc;
234 if (gpio_is_valid(pdata->gpio_reset)) { 234 if (gpio_is_valid(pdata->gpio_reset)) {
235 err = devm_gpio_request_one(dev, pdata->gpio_reset, 0, 235 err = devm_gpio_request_one(dev, pdata->gpio_reset,
236 GPIOF_ACTIVE_LOW,
236 dev_name(dev)); 237 dev_name(dev));
237 if (!err) 238 if (!err)
238 nop->gpiod_reset = 239 nop->gpiod_reset =
diff --git a/drivers/usb/phy/phy-isp1301.c b/drivers/usb/phy/phy-isp1301.c
index 8a55b37d1a02..db68156568e6 100644
--- a/drivers/usb/phy/phy-isp1301.c
+++ b/drivers/usb/phy/phy-isp1301.c
@@ -31,6 +31,7 @@ static const struct i2c_device_id isp1301_id[] = {
31 { "isp1301", 0 }, 31 { "isp1301", 0 },
32 { } 32 { }
33}; 33};
34MODULE_DEVICE_TABLE(i2c, isp1301_id);
34 35
35static struct i2c_client *isp1301_i2c_client; 36static struct i2c_client *isp1301_i2c_client;
36 37
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index 6d1941a2396a..6956c4f62216 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -278,6 +278,10 @@ static void option_instat_callback(struct urb *urb);
278#define ZTE_PRODUCT_MF622 0x0001 278#define ZTE_PRODUCT_MF622 0x0001
279#define ZTE_PRODUCT_MF628 0x0015 279#define ZTE_PRODUCT_MF628 0x0015
280#define ZTE_PRODUCT_MF626 0x0031 280#define ZTE_PRODUCT_MF626 0x0031
281#define ZTE_PRODUCT_ZM8620_X 0x0396
282#define ZTE_PRODUCT_ME3620_MBIM 0x0426
283#define ZTE_PRODUCT_ME3620_X 0x1432
284#define ZTE_PRODUCT_ME3620_L 0x1433
281#define ZTE_PRODUCT_AC2726 0xfff1 285#define ZTE_PRODUCT_AC2726 0xfff1
282#define ZTE_PRODUCT_MG880 0xfffd 286#define ZTE_PRODUCT_MG880 0xfffd
283#define ZTE_PRODUCT_CDMA_TECH 0xfffe 287#define ZTE_PRODUCT_CDMA_TECH 0xfffe
@@ -544,6 +548,18 @@ static const struct option_blacklist_info zte_mc2716_z_blacklist = {
544 .sendsetup = BIT(1) | BIT(2) | BIT(3), 548 .sendsetup = BIT(1) | BIT(2) | BIT(3),
545}; 549};
546 550
551static const struct option_blacklist_info zte_me3620_mbim_blacklist = {
552 .reserved = BIT(2) | BIT(3) | BIT(4),
553};
554
555static const struct option_blacklist_info zte_me3620_xl_blacklist = {
556 .reserved = BIT(3) | BIT(4) | BIT(5),
557};
558
559static const struct option_blacklist_info zte_zm8620_x_blacklist = {
560 .reserved = BIT(3) | BIT(4) | BIT(5),
561};
562
547static const struct option_blacklist_info huawei_cdc12_blacklist = { 563static const struct option_blacklist_info huawei_cdc12_blacklist = {
548 .reserved = BIT(1) | BIT(2), 564 .reserved = BIT(1) | BIT(2),
549}; 565};
@@ -1591,6 +1607,14 @@ static const struct usb_device_id option_ids[] = {
1591 .driver_info = (kernel_ulong_t)&zte_ad3812_z_blacklist }, 1607 .driver_info = (kernel_ulong_t)&zte_ad3812_z_blacklist },
1592 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MC2716, 0xff, 0xff, 0xff), 1608 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MC2716, 0xff, 0xff, 0xff),
1593 .driver_info = (kernel_ulong_t)&zte_mc2716_z_blacklist }, 1609 .driver_info = (kernel_ulong_t)&zte_mc2716_z_blacklist },
1610 { USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_ME3620_L),
1611 .driver_info = (kernel_ulong_t)&zte_me3620_xl_blacklist },
1612 { USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_ME3620_MBIM),
1613 .driver_info = (kernel_ulong_t)&zte_me3620_mbim_blacklist },
1614 { USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_ME3620_X),
1615 .driver_info = (kernel_ulong_t)&zte_me3620_xl_blacklist },
1616 { USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_ZM8620_X),
1617 .driver_info = (kernel_ulong_t)&zte_zm8620_x_blacklist },
1594 { USB_VENDOR_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff, 0x02, 0x01) }, 1618 { USB_VENDOR_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff, 0x02, 0x01) },
1595 { USB_VENDOR_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff, 0x02, 0x05) }, 1619 { USB_VENDOR_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff, 0x02, 0x05) },
1596 { USB_VENDOR_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff, 0x86, 0x10) }, 1620 { USB_VENDOR_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff, 0x86, 0x10) },
diff --git a/drivers/usb/serial/whiteheat.c b/drivers/usb/serial/whiteheat.c
index 6c3734d2b45a..d3ea90bef84d 100644
--- a/drivers/usb/serial/whiteheat.c
+++ b/drivers/usb/serial/whiteheat.c
@@ -80,6 +80,8 @@ static int whiteheat_firmware_download(struct usb_serial *serial,
80static int whiteheat_firmware_attach(struct usb_serial *serial); 80static int whiteheat_firmware_attach(struct usb_serial *serial);
81 81
82/* function prototypes for the Connect Tech WhiteHEAT serial converter */ 82/* function prototypes for the Connect Tech WhiteHEAT serial converter */
83static int whiteheat_probe(struct usb_serial *serial,
84 const struct usb_device_id *id);
83static int whiteheat_attach(struct usb_serial *serial); 85static int whiteheat_attach(struct usb_serial *serial);
84static void whiteheat_release(struct usb_serial *serial); 86static void whiteheat_release(struct usb_serial *serial);
85static int whiteheat_port_probe(struct usb_serial_port *port); 87static int whiteheat_port_probe(struct usb_serial_port *port);
@@ -116,6 +118,7 @@ static struct usb_serial_driver whiteheat_device = {
116 .description = "Connect Tech - WhiteHEAT", 118 .description = "Connect Tech - WhiteHEAT",
117 .id_table = id_table_std, 119 .id_table = id_table_std,
118 .num_ports = 4, 120 .num_ports = 4,
121 .probe = whiteheat_probe,
119 .attach = whiteheat_attach, 122 .attach = whiteheat_attach,
120 .release = whiteheat_release, 123 .release = whiteheat_release,
121 .port_probe = whiteheat_port_probe, 124 .port_probe = whiteheat_port_probe,
@@ -217,6 +220,34 @@ static int whiteheat_firmware_attach(struct usb_serial *serial)
217/***************************************************************************** 220/*****************************************************************************
218 * Connect Tech's White Heat serial driver functions 221 * Connect Tech's White Heat serial driver functions
219 *****************************************************************************/ 222 *****************************************************************************/
223
224static int whiteheat_probe(struct usb_serial *serial,
225 const struct usb_device_id *id)
226{
227 struct usb_host_interface *iface_desc;
228 struct usb_endpoint_descriptor *endpoint;
229 size_t num_bulk_in = 0;
230 size_t num_bulk_out = 0;
231 size_t min_num_bulk;
232 unsigned int i;
233
234 iface_desc = serial->interface->cur_altsetting;
235
236 for (i = 0; i < iface_desc->desc.bNumEndpoints; i++) {
237 endpoint = &iface_desc->endpoint[i].desc;
238 if (usb_endpoint_is_bulk_in(endpoint))
239 ++num_bulk_in;
240 if (usb_endpoint_is_bulk_out(endpoint))
241 ++num_bulk_out;
242 }
243
244 min_num_bulk = COMMAND_PORT + 1;
245 if (num_bulk_in < min_num_bulk || num_bulk_out < min_num_bulk)
246 return -ENODEV;
247
248 return 0;
249}
250
220static int whiteheat_attach(struct usb_serial *serial) 251static int whiteheat_attach(struct usb_serial *serial)
221{ 252{
222 struct usb_serial_port *command_port; 253 struct usb_serial_port *command_port;
diff --git a/drivers/vhost/net.c b/drivers/vhost/net.c
index 7d137a43cc86..9eda69e40678 100644
--- a/drivers/vhost/net.c
+++ b/drivers/vhost/net.c
@@ -61,8 +61,7 @@ MODULE_PARM_DESC(experimental_zcopytx, "Enable Zero Copy TX;"
61enum { 61enum {
62 VHOST_NET_FEATURES = VHOST_FEATURES | 62 VHOST_NET_FEATURES = VHOST_FEATURES |
63 (1ULL << VHOST_NET_F_VIRTIO_NET_HDR) | 63 (1ULL << VHOST_NET_F_VIRTIO_NET_HDR) |
64 (1ULL << VIRTIO_NET_F_MRG_RXBUF) | 64 (1ULL << VIRTIO_NET_F_MRG_RXBUF)
65 (1ULL << VIRTIO_F_VERSION_1),
66}; 65};
67 66
68enum { 67enum {
diff --git a/drivers/vhost/scsi.c b/drivers/vhost/scsi.c
index f114a9dbb48f..e25a23692822 100644
--- a/drivers/vhost/scsi.c
+++ b/drivers/vhost/scsi.c
@@ -166,9 +166,7 @@ enum {
166/* Note: can't set VIRTIO_F_VERSION_1 yet, since that implies ANY_LAYOUT. */ 166/* Note: can't set VIRTIO_F_VERSION_1 yet, since that implies ANY_LAYOUT. */
167enum { 167enum {
168 VHOST_SCSI_FEATURES = VHOST_FEATURES | (1ULL << VIRTIO_SCSI_F_HOTPLUG) | 168 VHOST_SCSI_FEATURES = VHOST_FEATURES | (1ULL << VIRTIO_SCSI_F_HOTPLUG) |
169 (1ULL << VIRTIO_SCSI_F_T10_PI) | 169 (1ULL << VIRTIO_SCSI_F_T10_PI)
170 (1ULL << VIRTIO_F_ANY_LAYOUT) |
171 (1ULL << VIRTIO_F_VERSION_1)
172}; 170};
173 171
174#define VHOST_SCSI_MAX_TARGET 256 172#define VHOST_SCSI_MAX_TARGET 256
diff --git a/drivers/vhost/test.c b/drivers/vhost/test.c
index d9c501eaa6c3..f2882ac98726 100644
--- a/drivers/vhost/test.c
+++ b/drivers/vhost/test.c
@@ -277,10 +277,13 @@ static long vhost_test_ioctl(struct file *f, unsigned int ioctl,
277 return -EFAULT; 277 return -EFAULT;
278 return 0; 278 return 0;
279 case VHOST_SET_FEATURES: 279 case VHOST_SET_FEATURES:
280 printk(KERN_ERR "1\n");
280 if (copy_from_user(&features, featurep, sizeof features)) 281 if (copy_from_user(&features, featurep, sizeof features))
281 return -EFAULT; 282 return -EFAULT;
283 printk(KERN_ERR "2\n");
282 if (features & ~VHOST_FEATURES) 284 if (features & ~VHOST_FEATURES)
283 return -EOPNOTSUPP; 285 return -EOPNOTSUPP;
286 printk(KERN_ERR "3\n");
284 return vhost_test_set_features(n, features); 287 return vhost_test_set_features(n, features);
285 case VHOST_RESET_OWNER: 288 case VHOST_RESET_OWNER:
286 return vhost_test_reset_owner(n); 289 return vhost_test_reset_owner(n);
diff --git a/drivers/vhost/vhost.h b/drivers/vhost/vhost.h
index ce6f6da4b09f..4772862b71a7 100644
--- a/drivers/vhost/vhost.h
+++ b/drivers/vhost/vhost.h
@@ -173,7 +173,9 @@ enum {
173 VHOST_FEATURES = (1ULL << VIRTIO_F_NOTIFY_ON_EMPTY) | 173 VHOST_FEATURES = (1ULL << VIRTIO_F_NOTIFY_ON_EMPTY) |
174 (1ULL << VIRTIO_RING_F_INDIRECT_DESC) | 174 (1ULL << VIRTIO_RING_F_INDIRECT_DESC) |
175 (1ULL << VIRTIO_RING_F_EVENT_IDX) | 175 (1ULL << VIRTIO_RING_F_EVENT_IDX) |
176 (1ULL << VHOST_F_LOG_ALL), 176 (1ULL << VHOST_F_LOG_ALL) |
177 (1ULL << VIRTIO_F_ANY_LAYOUT) |
178 (1ULL << VIRTIO_F_VERSION_1)
177}; 179};
178 180
179static inline bool vhost_has_feature(struct vhost_virtqueue *vq, int bit) 181static inline bool vhost_has_feature(struct vhost_virtqueue *vq, int bit)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index c68edc16aa54..79e1aa1b0959 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -817,8 +817,9 @@ config ITCO_WDT
817 tristate "Intel TCO Timer/Watchdog" 817 tristate "Intel TCO Timer/Watchdog"
818 depends on (X86 || IA64) && PCI 818 depends on (X86 || IA64) && PCI
819 select WATCHDOG_CORE 819 select WATCHDOG_CORE
820 depends on I2C || I2C=n
820 select LPC_ICH if !EXPERT 821 select LPC_ICH if !EXPERT
821 select I2C_I801 if !EXPERT 822 select I2C_I801 if !EXPERT && I2C
822 ---help--- 823 ---help---
823 Hardware driver for the intel TCO timer based watchdog devices. 824 Hardware driver for the intel TCO timer based watchdog devices.
824 These drivers are included in the Intel 82801 I/O Controller 825 These drivers are included in the Intel 82801 I/O Controller
diff --git a/drivers/watchdog/bcm2835_wdt.c b/drivers/watchdog/bcm2835_wdt.c
index 66c3e656a616..8a5ce5b5a0b6 100644
--- a/drivers/watchdog/bcm2835_wdt.c
+++ b/drivers/watchdog/bcm2835_wdt.c
@@ -36,6 +36,13 @@
36#define PM_RSTC_WRCFG_FULL_RESET 0x00000020 36#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
37#define PM_RSTC_RESET 0x00000102 37#define PM_RSTC_RESET 0x00000102
38 38
39/*
40 * The Raspberry Pi firmware uses the RSTS register to know which partiton
41 * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
42 * Partiton 63 is a special partition used by the firmware to indicate halt.
43 */
44#define PM_RSTS_RASPBERRYPI_HALT 0x555
45
39#define SECS_TO_WDOG_TICKS(x) ((x) << 16) 46#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
40#define WDOG_TICKS_TO_SECS(x) ((x) >> 16) 47#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
41 48
@@ -151,8 +158,7 @@ static void bcm2835_power_off(void)
151 * hard reset. 158 * hard reset.
152 */ 159 */
153 val = readl_relaxed(wdt->base + PM_RSTS); 160 val = readl_relaxed(wdt->base + PM_RSTS);
154 val &= PM_RSTC_WRCFG_CLR; 161 val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
155 val |= PM_PASSWORD | PM_RSTS_HADWRH_SET;
156 writel_relaxed(val, wdt->base + PM_RSTS); 162 writel_relaxed(val, wdt->base + PM_RSTS);
157 163
158 /* Continue with normal reset mechanism */ 164 /* Continue with normal reset mechanism */
diff --git a/drivers/watchdog/gef_wdt.c b/drivers/watchdog/gef_wdt.c
index cc1bdfc2ff71..006e2348022c 100644
--- a/drivers/watchdog/gef_wdt.c
+++ b/drivers/watchdog/gef_wdt.c
@@ -303,6 +303,7 @@ static const struct of_device_id gef_wdt_ids[] = {
303 }, 303 },
304 {}, 304 {},
305}; 305};
306MODULE_DEVICE_TABLE(of, gef_wdt_ids);
306 307
307static struct platform_driver gef_wdt_driver = { 308static struct platform_driver gef_wdt_driver = {
308 .driver = { 309 .driver = {
diff --git a/drivers/watchdog/mena21_wdt.c b/drivers/watchdog/mena21_wdt.c
index 69013007dc47..098fa9c34d6d 100644
--- a/drivers/watchdog/mena21_wdt.c
+++ b/drivers/watchdog/mena21_wdt.c
@@ -253,6 +253,7 @@ static const struct of_device_id a21_wdt_ids[] = {
253 { .compatible = "men,a021-wdt" }, 253 { .compatible = "men,a021-wdt" },
254 { }, 254 { },
255}; 255};
256MODULE_DEVICE_TABLE(of, a21_wdt_ids);
256 257
257static struct platform_driver a21_wdt_driver = { 258static struct platform_driver a21_wdt_driver = {
258 .probe = a21_wdt_probe, 259 .probe = a21_wdt_probe,
diff --git a/drivers/watchdog/moxart_wdt.c b/drivers/watchdog/moxart_wdt.c
index 2789da2c0515..60b0605bd7e6 100644
--- a/drivers/watchdog/moxart_wdt.c
+++ b/drivers/watchdog/moxart_wdt.c
@@ -168,6 +168,7 @@ static const struct of_device_id moxart_watchdog_match[] = {
168 { .compatible = "moxa,moxart-watchdog" }, 168 { .compatible = "moxa,moxart-watchdog" },
169 { }, 169 { },
170}; 170};
171MODULE_DEVICE_TABLE(of, moxart_watchdog_match);
171 172
172static struct platform_driver moxart_wdt_driver = { 173static struct platform_driver moxart_wdt_driver = {
173 .probe = moxart_wdt_probe, 174 .probe = moxart_wdt_probe,
diff --git a/fs/block_dev.c b/fs/block_dev.c
index 22ea424ee741..073bb57adab1 100644
--- a/fs/block_dev.c
+++ b/fs/block_dev.c
@@ -1242,6 +1242,13 @@ static int __blkdev_get(struct block_device *bdev, fmode_t mode, int for_part)
1242 goto out_clear; 1242 goto out_clear;
1243 } 1243 }
1244 bd_set_size(bdev, (loff_t)bdev->bd_part->nr_sects << 9); 1244 bd_set_size(bdev, (loff_t)bdev->bd_part->nr_sects << 9);
1245 /*
1246 * If the partition is not aligned on a page
1247 * boundary, we can't do dax I/O to it.
1248 */
1249 if ((bdev->bd_part->start_sect % (PAGE_SIZE / 512)) ||
1250 (bdev->bd_part->nr_sects % (PAGE_SIZE / 512)))
1251 bdev->bd_inode->i_flags &= ~S_DAX;
1245 } 1252 }
1246 } else { 1253 } else {
1247 if (bdev->bd_contains == bdev) { 1254 if (bdev->bd_contains == bdev) {
diff --git a/fs/btrfs/btrfs_inode.h b/fs/btrfs/btrfs_inode.h
index 81220b2203c6..0ef5cc13fae2 100644
--- a/fs/btrfs/btrfs_inode.h
+++ b/fs/btrfs/btrfs_inode.h
@@ -44,8 +44,6 @@
44#define BTRFS_INODE_IN_DELALLOC_LIST 9 44#define BTRFS_INODE_IN_DELALLOC_LIST 9
45#define BTRFS_INODE_READDIO_NEED_LOCK 10 45#define BTRFS_INODE_READDIO_NEED_LOCK 10
46#define BTRFS_INODE_HAS_PROPS 11 46#define BTRFS_INODE_HAS_PROPS 11
47/* DIO is ready to submit */
48#define BTRFS_INODE_DIO_READY 12
49/* 47/*
50 * The following 3 bits are meant only for the btree inode. 48 * The following 3 bits are meant only for the btree inode.
51 * When any of them is set, it means an error happened while writing an 49 * When any of them is set, it means an error happened while writing an
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 0d98aee34fee..295795aebe0b 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -3765,9 +3765,7 @@ void close_ctree(struct btrfs_root *root)
3765 * block groups queued for removal, the deletion will be 3765 * block groups queued for removal, the deletion will be
3766 * skipped when we quit the cleaner thread. 3766 * skipped when we quit the cleaner thread.
3767 */ 3767 */
3768 mutex_lock(&root->fs_info->cleaner_mutex);
3769 btrfs_delete_unused_bgs(root->fs_info); 3768 btrfs_delete_unused_bgs(root->fs_info);
3770 mutex_unlock(&root->fs_info->cleaner_mutex);
3771 3769
3772 ret = btrfs_commit_super(root); 3770 ret = btrfs_commit_super(root);
3773 if (ret) 3771 if (ret)
diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c
index 5411f0ab5683..9f9604201333 100644
--- a/fs/btrfs/extent-tree.c
+++ b/fs/btrfs/extent-tree.c
@@ -3742,10 +3742,7 @@ static int update_space_info(struct btrfs_fs_info *info, u64 flags,
3742 found->bytes_reserved = 0; 3742 found->bytes_reserved = 0;
3743 found->bytes_readonly = 0; 3743 found->bytes_readonly = 0;
3744 found->bytes_may_use = 0; 3744 found->bytes_may_use = 0;
3745 if (total_bytes > 0) 3745 found->full = 0;
3746 found->full = 0;
3747 else
3748 found->full = 1;
3749 found->force_alloc = CHUNK_ALLOC_NO_FORCE; 3746 found->force_alloc = CHUNK_ALLOC_NO_FORCE;
3750 found->chunk_alloc = 0; 3747 found->chunk_alloc = 0;
3751 found->flush = 0; 3748 found->flush = 0;
@@ -8668,7 +8665,7 @@ int btrfs_drop_snapshot(struct btrfs_root *root,
8668 } 8665 }
8669 8666
8670 if (test_bit(BTRFS_ROOT_IN_RADIX, &root->state)) { 8667 if (test_bit(BTRFS_ROOT_IN_RADIX, &root->state)) {
8671 btrfs_drop_and_free_fs_root(tree_root->fs_info, root); 8668 btrfs_add_dropped_root(trans, root);
8672 } else { 8669 } else {
8673 free_extent_buffer(root->node); 8670 free_extent_buffer(root->node);
8674 free_extent_buffer(root->commit_root); 8671 free_extent_buffer(root->commit_root);
diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c
index f1018cfbfefa..e2357e31609a 100644
--- a/fs/btrfs/extent_io.c
+++ b/fs/btrfs/extent_io.c
@@ -2798,7 +2798,8 @@ static int submit_extent_page(int rw, struct extent_io_tree *tree,
2798 bio_end_io_t end_io_func, 2798 bio_end_io_t end_io_func,
2799 int mirror_num, 2799 int mirror_num,
2800 unsigned long prev_bio_flags, 2800 unsigned long prev_bio_flags,
2801 unsigned long bio_flags) 2801 unsigned long bio_flags,
2802 bool force_bio_submit)
2802{ 2803{
2803 int ret = 0; 2804 int ret = 0;
2804 struct bio *bio; 2805 struct bio *bio;
@@ -2814,6 +2815,7 @@ static int submit_extent_page(int rw, struct extent_io_tree *tree,
2814 contig = bio_end_sector(bio) == sector; 2815 contig = bio_end_sector(bio) == sector;
2815 2816
2816 if (prev_bio_flags != bio_flags || !contig || 2817 if (prev_bio_flags != bio_flags || !contig ||
2818 force_bio_submit ||
2817 merge_bio(rw, tree, page, offset, page_size, bio, bio_flags) || 2819 merge_bio(rw, tree, page, offset, page_size, bio, bio_flags) ||
2818 bio_add_page(bio, page, page_size, offset) < page_size) { 2820 bio_add_page(bio, page, page_size, offset) < page_size) {
2819 ret = submit_one_bio(rw, bio, mirror_num, 2821 ret = submit_one_bio(rw, bio, mirror_num,
@@ -2910,7 +2912,8 @@ static int __do_readpage(struct extent_io_tree *tree,
2910 get_extent_t *get_extent, 2912 get_extent_t *get_extent,
2911 struct extent_map **em_cached, 2913 struct extent_map **em_cached,
2912 struct bio **bio, int mirror_num, 2914 struct bio **bio, int mirror_num,
2913 unsigned long *bio_flags, int rw) 2915 unsigned long *bio_flags, int rw,
2916 u64 *prev_em_start)
2914{ 2917{
2915 struct inode *inode = page->mapping->host; 2918 struct inode *inode = page->mapping->host;
2916 u64 start = page_offset(page); 2919 u64 start = page_offset(page);
@@ -2958,6 +2961,7 @@ static int __do_readpage(struct extent_io_tree *tree,
2958 } 2961 }
2959 while (cur <= end) { 2962 while (cur <= end) {
2960 unsigned long pnr = (last_byte >> PAGE_CACHE_SHIFT) + 1; 2963 unsigned long pnr = (last_byte >> PAGE_CACHE_SHIFT) + 1;
2964 bool force_bio_submit = false;
2961 2965
2962 if (cur >= last_byte) { 2966 if (cur >= last_byte) {
2963 char *userpage; 2967 char *userpage;
@@ -3008,6 +3012,49 @@ static int __do_readpage(struct extent_io_tree *tree,
3008 block_start = em->block_start; 3012 block_start = em->block_start;
3009 if (test_bit(EXTENT_FLAG_PREALLOC, &em->flags)) 3013 if (test_bit(EXTENT_FLAG_PREALLOC, &em->flags))
3010 block_start = EXTENT_MAP_HOLE; 3014 block_start = EXTENT_MAP_HOLE;
3015
3016 /*
3017 * If we have a file range that points to a compressed extent
3018 * and it's followed by a consecutive file range that points to
3019 * to the same compressed extent (possibly with a different
3020 * offset and/or length, so it either points to the whole extent
3021 * or only part of it), we must make sure we do not submit a
3022 * single bio to populate the pages for the 2 ranges because
3023 * this makes the compressed extent read zero out the pages
3024 * belonging to the 2nd range. Imagine the following scenario:
3025 *
3026 * File layout
3027 * [0 - 8K] [8K - 24K]
3028 * | |
3029 * | |
3030 * points to extent X, points to extent X,
3031 * offset 4K, length of 8K offset 0, length 16K
3032 *
3033 * [extent X, compressed length = 4K uncompressed length = 16K]
3034 *
3035 * If the bio to read the compressed extent covers both ranges,
3036 * it will decompress extent X into the pages belonging to the
3037 * first range and then it will stop, zeroing out the remaining
3038 * pages that belong to the other range that points to extent X.
3039 * So here we make sure we submit 2 bios, one for the first
3040 * range and another one for the third range. Both will target
3041 * the same physical extent from disk, but we can't currently
3042 * make the compressed bio endio callback populate the pages
3043 * for both ranges because each compressed bio is tightly
3044 * coupled with a single extent map, and each range can have
3045 * an extent map with a different offset value relative to the
3046 * uncompressed data of our extent and different lengths. This
3047 * is a corner case so we prioritize correctness over
3048 * non-optimal behavior (submitting 2 bios for the same extent).
3049 */
3050 if (test_bit(EXTENT_FLAG_COMPRESSED, &em->flags) &&
3051 prev_em_start && *prev_em_start != (u64)-1 &&
3052 *prev_em_start != em->orig_start)
3053 force_bio_submit = true;
3054
3055 if (prev_em_start)
3056 *prev_em_start = em->orig_start;
3057
3011 free_extent_map(em); 3058 free_extent_map(em);
3012 em = NULL; 3059 em = NULL;
3013 3060
@@ -3057,7 +3104,8 @@ static int __do_readpage(struct extent_io_tree *tree,
3057 bdev, bio, pnr, 3104 bdev, bio, pnr,
3058 end_bio_extent_readpage, mirror_num, 3105 end_bio_extent_readpage, mirror_num,
3059 *bio_flags, 3106 *bio_flags,
3060 this_bio_flag); 3107 this_bio_flag,
3108 force_bio_submit);
3061 if (!ret) { 3109 if (!ret) {
3062 nr++; 3110 nr++;
3063 *bio_flags = this_bio_flag; 3111 *bio_flags = this_bio_flag;
@@ -3089,6 +3137,7 @@ static inline void __do_contiguous_readpages(struct extent_io_tree *tree,
3089 struct inode *inode; 3137 struct inode *inode;
3090 struct btrfs_ordered_extent *ordered; 3138 struct btrfs_ordered_extent *ordered;
3091 int index; 3139 int index;
3140 u64 prev_em_start = (u64)-1;
3092 3141
3093 inode = pages[0]->mapping->host; 3142 inode = pages[0]->mapping->host;
3094 while (1) { 3143 while (1) {
@@ -3104,7 +3153,7 @@ static inline void __do_contiguous_readpages(struct extent_io_tree *tree,
3104 3153
3105 for (index = 0; index < nr_pages; index++) { 3154 for (index = 0; index < nr_pages; index++) {
3106 __do_readpage(tree, pages[index], get_extent, em_cached, bio, 3155 __do_readpage(tree, pages[index], get_extent, em_cached, bio,
3107 mirror_num, bio_flags, rw); 3156 mirror_num, bio_flags, rw, &prev_em_start);
3108 page_cache_release(pages[index]); 3157 page_cache_release(pages[index]);
3109 } 3158 }
3110} 3159}
@@ -3172,7 +3221,7 @@ static int __extent_read_full_page(struct extent_io_tree *tree,
3172 } 3221 }
3173 3222
3174 ret = __do_readpage(tree, page, get_extent, NULL, bio, mirror_num, 3223 ret = __do_readpage(tree, page, get_extent, NULL, bio, mirror_num,
3175 bio_flags, rw); 3224 bio_flags, rw, NULL);
3176 return ret; 3225 return ret;
3177} 3226}
3178 3227
@@ -3198,7 +3247,7 @@ int extent_read_full_page_nolock(struct extent_io_tree *tree, struct page *page,
3198 int ret; 3247 int ret;
3199 3248
3200 ret = __do_readpage(tree, page, get_extent, NULL, &bio, mirror_num, 3249 ret = __do_readpage(tree, page, get_extent, NULL, &bio, mirror_num,
3201 &bio_flags, READ); 3250 &bio_flags, READ, NULL);
3202 if (bio) 3251 if (bio)
3203 ret = submit_one_bio(READ, bio, mirror_num, bio_flags); 3252 ret = submit_one_bio(READ, bio, mirror_num, bio_flags);
3204 return ret; 3253 return ret;
@@ -3451,7 +3500,7 @@ static noinline_for_stack int __extent_writepage_io(struct inode *inode,
3451 sector, iosize, pg_offset, 3500 sector, iosize, pg_offset,
3452 bdev, &epd->bio, max_nr, 3501 bdev, &epd->bio, max_nr,
3453 end_bio_extent_writepage, 3502 end_bio_extent_writepage,
3454 0, 0, 0); 3503 0, 0, 0, false);
3455 if (ret) 3504 if (ret)
3456 SetPageError(page); 3505 SetPageError(page);
3457 } 3506 }
@@ -3754,7 +3803,7 @@ static noinline_for_stack int write_one_eb(struct extent_buffer *eb,
3754 ret = submit_extent_page(rw, tree, wbc, p, offset >> 9, 3803 ret = submit_extent_page(rw, tree, wbc, p, offset >> 9,
3755 PAGE_CACHE_SIZE, 0, bdev, &epd->bio, 3804 PAGE_CACHE_SIZE, 0, bdev, &epd->bio,
3756 -1, end_bio_extent_buffer_writepage, 3805 -1, end_bio_extent_buffer_writepage,
3757 0, epd->bio_flags, bio_flags); 3806 0, epd->bio_flags, bio_flags, false);
3758 epd->bio_flags = bio_flags; 3807 epd->bio_flags = bio_flags;
3759 if (ret) { 3808 if (ret) {
3760 set_btree_ioerr(p); 3809 set_btree_ioerr(p);
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
index a0fa7253a2d7..611b66d73e80 100644
--- a/fs/btrfs/inode.c
+++ b/fs/btrfs/inode.c
@@ -5084,7 +5084,8 @@ void btrfs_evict_inode(struct inode *inode)
5084 goto no_delete; 5084 goto no_delete;
5085 } 5085 }
5086 /* do we really want it for ->i_nlink > 0 and zero btrfs_root_refs? */ 5086 /* do we really want it for ->i_nlink > 0 and zero btrfs_root_refs? */
5087 btrfs_wait_ordered_range(inode, 0, (u64)-1); 5087 if (!special_file(inode->i_mode))
5088 btrfs_wait_ordered_range(inode, 0, (u64)-1);
5088 5089
5089 btrfs_free_io_failure_record(inode, 0, (u64)-1); 5090 btrfs_free_io_failure_record(inode, 0, (u64)-1);
5090 5091
@@ -7408,6 +7409,10 @@ static struct extent_map *create_pinned_em(struct inode *inode, u64 start,
7408 return em; 7409 return em;
7409} 7410}
7410 7411
7412struct btrfs_dio_data {
7413 u64 outstanding_extents;
7414 u64 reserve;
7415};
7411 7416
7412static int btrfs_get_blocks_direct(struct inode *inode, sector_t iblock, 7417static int btrfs_get_blocks_direct(struct inode *inode, sector_t iblock,
7413 struct buffer_head *bh_result, int create) 7418 struct buffer_head *bh_result, int create)
@@ -7415,10 +7420,10 @@ static int btrfs_get_blocks_direct(struct inode *inode, sector_t iblock,
7415 struct extent_map *em; 7420 struct extent_map *em;
7416 struct btrfs_root *root = BTRFS_I(inode)->root; 7421 struct btrfs_root *root = BTRFS_I(inode)->root;
7417 struct extent_state *cached_state = NULL; 7422 struct extent_state *cached_state = NULL;
7423 struct btrfs_dio_data *dio_data = NULL;
7418 u64 start = iblock << inode->i_blkbits; 7424 u64 start = iblock << inode->i_blkbits;
7419 u64 lockstart, lockend; 7425 u64 lockstart, lockend;
7420 u64 len = bh_result->b_size; 7426 u64 len = bh_result->b_size;
7421 u64 *outstanding_extents = NULL;
7422 int unlock_bits = EXTENT_LOCKED; 7427 int unlock_bits = EXTENT_LOCKED;
7423 int ret = 0; 7428 int ret = 0;
7424 7429
@@ -7436,7 +7441,7 @@ static int btrfs_get_blocks_direct(struct inode *inode, sector_t iblock,
7436 * that anything that needs to check if there's a transction doesn't get 7441 * that anything that needs to check if there's a transction doesn't get
7437 * confused. 7442 * confused.
7438 */ 7443 */
7439 outstanding_extents = current->journal_info; 7444 dio_data = current->journal_info;
7440 current->journal_info = NULL; 7445 current->journal_info = NULL;
7441 } 7446 }
7442 7447
@@ -7568,17 +7573,18 @@ unlock:
7568 * within our reservation, otherwise we need to adjust our inode 7573 * within our reservation, otherwise we need to adjust our inode
7569 * counter appropriately. 7574 * counter appropriately.
7570 */ 7575 */
7571 if (*outstanding_extents) { 7576 if (dio_data->outstanding_extents) {
7572 (*outstanding_extents)--; 7577 (dio_data->outstanding_extents)--;
7573 } else { 7578 } else {
7574 spin_lock(&BTRFS_I(inode)->lock); 7579 spin_lock(&BTRFS_I(inode)->lock);
7575 BTRFS_I(inode)->outstanding_extents++; 7580 BTRFS_I(inode)->outstanding_extents++;
7576 spin_unlock(&BTRFS_I(inode)->lock); 7581 spin_unlock(&BTRFS_I(inode)->lock);
7577 } 7582 }
7578 7583
7579 current->journal_info = outstanding_extents;
7580 btrfs_free_reserved_data_space(inode, len); 7584 btrfs_free_reserved_data_space(inode, len);
7581 set_bit(BTRFS_INODE_DIO_READY, &BTRFS_I(inode)->runtime_flags); 7585 WARN_ON(dio_data->reserve < len);
7586 dio_data->reserve -= len;
7587 current->journal_info = dio_data;
7582 } 7588 }
7583 7589
7584 /* 7590 /*
@@ -7601,8 +7607,8 @@ unlock:
7601unlock_err: 7607unlock_err:
7602 clear_extent_bit(&BTRFS_I(inode)->io_tree, lockstart, lockend, 7608 clear_extent_bit(&BTRFS_I(inode)->io_tree, lockstart, lockend,
7603 unlock_bits, 1, 0, &cached_state, GFP_NOFS); 7609 unlock_bits, 1, 0, &cached_state, GFP_NOFS);
7604 if (outstanding_extents) 7610 if (dio_data)
7605 current->journal_info = outstanding_extents; 7611 current->journal_info = dio_data;
7606 return ret; 7612 return ret;
7607} 7613}
7608 7614
@@ -8329,7 +8335,8 @@ static ssize_t btrfs_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
8329{ 8335{
8330 struct file *file = iocb->ki_filp; 8336 struct file *file = iocb->ki_filp;
8331 struct inode *inode = file->f_mapping->host; 8337 struct inode *inode = file->f_mapping->host;
8332 u64 outstanding_extents = 0; 8338 struct btrfs_root *root = BTRFS_I(inode)->root;
8339 struct btrfs_dio_data dio_data = { 0 };
8333 size_t count = 0; 8340 size_t count = 0;
8334 int flags = 0; 8341 int flags = 0;
8335 bool wakeup = true; 8342 bool wakeup = true;
@@ -8367,7 +8374,7 @@ static ssize_t btrfs_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
8367 ret = btrfs_delalloc_reserve_space(inode, count); 8374 ret = btrfs_delalloc_reserve_space(inode, count);
8368 if (ret) 8375 if (ret)
8369 goto out; 8376 goto out;
8370 outstanding_extents = div64_u64(count + 8377 dio_data.outstanding_extents = div64_u64(count +
8371 BTRFS_MAX_EXTENT_SIZE - 1, 8378 BTRFS_MAX_EXTENT_SIZE - 1,
8372 BTRFS_MAX_EXTENT_SIZE); 8379 BTRFS_MAX_EXTENT_SIZE);
8373 8380
@@ -8376,7 +8383,8 @@ static ssize_t btrfs_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
8376 * do the accounting properly if we go over the number we 8383 * do the accounting properly if we go over the number we
8377 * originally calculated. Abuse current->journal_info for this. 8384 * originally calculated. Abuse current->journal_info for this.
8378 */ 8385 */
8379 current->journal_info = &outstanding_extents; 8386 dio_data.reserve = round_up(count, root->sectorsize);
8387 current->journal_info = &dio_data;
8380 } else if (test_bit(BTRFS_INODE_READDIO_NEED_LOCK, 8388 } else if (test_bit(BTRFS_INODE_READDIO_NEED_LOCK,
8381 &BTRFS_I(inode)->runtime_flags)) { 8389 &BTRFS_I(inode)->runtime_flags)) {
8382 inode_dio_end(inode); 8390 inode_dio_end(inode);
@@ -8391,16 +8399,9 @@ static ssize_t btrfs_direct_IO(struct kiocb *iocb, struct iov_iter *iter,
8391 if (iov_iter_rw(iter) == WRITE) { 8399 if (iov_iter_rw(iter) == WRITE) {
8392 current->journal_info = NULL; 8400 current->journal_info = NULL;
8393 if (ret < 0 && ret != -EIOCBQUEUED) { 8401 if (ret < 0 && ret != -EIOCBQUEUED) {
8394 /* 8402 if (dio_data.reserve)
8395 * If the error comes from submitting stage, 8403 btrfs_delalloc_release_space(inode,
8396 * btrfs_get_blocsk_direct() has free'd data space, 8404 dio_data.reserve);
8397 * and metadata space will be handled by
8398 * finish_ordered_fn, don't do that again to make
8399 * sure bytes_may_use is correct.
8400 */
8401 if (!test_and_clear_bit(BTRFS_INODE_DIO_READY,
8402 &BTRFS_I(inode)->runtime_flags))
8403 btrfs_delalloc_release_space(inode, count);
8404 } else if (ret >= 0 && (size_t)ret < count) 8405 } else if (ret >= 0 && (size_t)ret < count)
8405 btrfs_delalloc_release_space(inode, 8406 btrfs_delalloc_release_space(inode,
8406 count - (size_t)ret); 8407 count - (size_t)ret);
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c
index 2b07b3581781..11d1eab9234d 100644
--- a/fs/btrfs/super.c
+++ b/fs/btrfs/super.c
@@ -1658,9 +1658,7 @@ static int btrfs_remount(struct super_block *sb, int *flags, char *data)
1658 * groups on disk until we're mounted read-write again 1658 * groups on disk until we're mounted read-write again
1659 * unless we clean them up here. 1659 * unless we clean them up here.
1660 */ 1660 */
1661 mutex_lock(&root->fs_info->cleaner_mutex);
1662 btrfs_delete_unused_bgs(fs_info); 1661 btrfs_delete_unused_bgs(fs_info);
1663 mutex_unlock(&root->fs_info->cleaner_mutex);
1664 1662
1665 btrfs_dev_replace_suspend_for_unmount(fs_info); 1663 btrfs_dev_replace_suspend_for_unmount(fs_info);
1666 btrfs_scrub_cancel(fs_info); 1664 btrfs_scrub_cancel(fs_info);
diff --git a/fs/btrfs/transaction.c b/fs/btrfs/transaction.c
index 8f259b3a66b3..74bc3338418b 100644
--- a/fs/btrfs/transaction.c
+++ b/fs/btrfs/transaction.c
@@ -117,6 +117,18 @@ static noinline void switch_commit_roots(struct btrfs_transaction *trans,
117 btrfs_unpin_free_ino(root); 117 btrfs_unpin_free_ino(root);
118 clear_btree_io_tree(&root->dirty_log_pages); 118 clear_btree_io_tree(&root->dirty_log_pages);
119 } 119 }
120
121 /* We can free old roots now. */
122 spin_lock(&trans->dropped_roots_lock);
123 while (!list_empty(&trans->dropped_roots)) {
124 root = list_first_entry(&trans->dropped_roots,
125 struct btrfs_root, root_list);
126 list_del_init(&root->root_list);
127 spin_unlock(&trans->dropped_roots_lock);
128 btrfs_drop_and_free_fs_root(fs_info, root);
129 spin_lock(&trans->dropped_roots_lock);
130 }
131 spin_unlock(&trans->dropped_roots_lock);
120 up_write(&fs_info->commit_root_sem); 132 up_write(&fs_info->commit_root_sem);
121} 133}
122 134
@@ -255,11 +267,13 @@ loop:
255 INIT_LIST_HEAD(&cur_trans->pending_ordered); 267 INIT_LIST_HEAD(&cur_trans->pending_ordered);
256 INIT_LIST_HEAD(&cur_trans->dirty_bgs); 268 INIT_LIST_HEAD(&cur_trans->dirty_bgs);
257 INIT_LIST_HEAD(&cur_trans->io_bgs); 269 INIT_LIST_HEAD(&cur_trans->io_bgs);
270 INIT_LIST_HEAD(&cur_trans->dropped_roots);
258 mutex_init(&cur_trans->cache_write_mutex); 271 mutex_init(&cur_trans->cache_write_mutex);
259 cur_trans->num_dirty_bgs = 0; 272 cur_trans->num_dirty_bgs = 0;
260 spin_lock_init(&cur_trans->dirty_bgs_lock); 273 spin_lock_init(&cur_trans->dirty_bgs_lock);
261 INIT_LIST_HEAD(&cur_trans->deleted_bgs); 274 INIT_LIST_HEAD(&cur_trans->deleted_bgs);
262 spin_lock_init(&cur_trans->deleted_bgs_lock); 275 spin_lock_init(&cur_trans->deleted_bgs_lock);
276 spin_lock_init(&cur_trans->dropped_roots_lock);
263 list_add_tail(&cur_trans->list, &fs_info->trans_list); 277 list_add_tail(&cur_trans->list, &fs_info->trans_list);
264 extent_io_tree_init(&cur_trans->dirty_pages, 278 extent_io_tree_init(&cur_trans->dirty_pages,
265 fs_info->btree_inode->i_mapping); 279 fs_info->btree_inode->i_mapping);
@@ -336,6 +350,24 @@ static int record_root_in_trans(struct btrfs_trans_handle *trans,
336} 350}
337 351
338 352
353void btrfs_add_dropped_root(struct btrfs_trans_handle *trans,
354 struct btrfs_root *root)
355{
356 struct btrfs_transaction *cur_trans = trans->transaction;
357
358 /* Add ourselves to the transaction dropped list */
359 spin_lock(&cur_trans->dropped_roots_lock);
360 list_add_tail(&root->root_list, &cur_trans->dropped_roots);
361 spin_unlock(&cur_trans->dropped_roots_lock);
362
363 /* Make sure we don't try to update the root at commit time */
364 spin_lock(&root->fs_info->fs_roots_radix_lock);
365 radix_tree_tag_clear(&root->fs_info->fs_roots_radix,
366 (unsigned long)root->root_key.objectid,
367 BTRFS_ROOT_TRANS_TAG);
368 spin_unlock(&root->fs_info->fs_roots_radix_lock);
369}
370
339int btrfs_record_root_in_trans(struct btrfs_trans_handle *trans, 371int btrfs_record_root_in_trans(struct btrfs_trans_handle *trans,
340 struct btrfs_root *root) 372 struct btrfs_root *root)
341{ 373{
diff --git a/fs/btrfs/transaction.h b/fs/btrfs/transaction.h
index edc2fbc262d7..87964bf8892d 100644
--- a/fs/btrfs/transaction.h
+++ b/fs/btrfs/transaction.h
@@ -65,6 +65,7 @@ struct btrfs_transaction {
65 struct list_head switch_commits; 65 struct list_head switch_commits;
66 struct list_head dirty_bgs; 66 struct list_head dirty_bgs;
67 struct list_head io_bgs; 67 struct list_head io_bgs;
68 struct list_head dropped_roots;
68 u64 num_dirty_bgs; 69 u64 num_dirty_bgs;
69 70
70 /* 71 /*
@@ -76,6 +77,7 @@ struct btrfs_transaction {
76 spinlock_t dirty_bgs_lock; 77 spinlock_t dirty_bgs_lock;
77 struct list_head deleted_bgs; 78 struct list_head deleted_bgs;
78 spinlock_t deleted_bgs_lock; 79 spinlock_t deleted_bgs_lock;
80 spinlock_t dropped_roots_lock;
79 struct btrfs_delayed_ref_root delayed_refs; 81 struct btrfs_delayed_ref_root delayed_refs;
80 int aborted; 82 int aborted;
81 int dirty_bg_run; 83 int dirty_bg_run;
@@ -216,5 +218,6 @@ int btrfs_transaction_blocked(struct btrfs_fs_info *info);
216int btrfs_transaction_in_commit(struct btrfs_fs_info *info); 218int btrfs_transaction_in_commit(struct btrfs_fs_info *info);
217void btrfs_put_transaction(struct btrfs_transaction *transaction); 219void btrfs_put_transaction(struct btrfs_transaction *transaction);
218void btrfs_apply_pending_changes(struct btrfs_fs_info *fs_info); 220void btrfs_apply_pending_changes(struct btrfs_fs_info *fs_info);
219 221void btrfs_add_dropped_root(struct btrfs_trans_handle *trans,
222 struct btrfs_root *root);
220#endif 223#endif
diff --git a/fs/cifs/cifsencrypt.c b/fs/cifs/cifsencrypt.c
index aa0dc2573374..afa09fce8151 100644
--- a/fs/cifs/cifsencrypt.c
+++ b/fs/cifs/cifsencrypt.c
@@ -444,6 +444,48 @@ find_domain_name(struct cifs_ses *ses, const struct nls_table *nls_cp)
444 return 0; 444 return 0;
445} 445}
446 446
447/* Server has provided av pairs/target info in the type 2 challenge
448 * packet and we have plucked it and stored within smb session.
449 * We parse that blob here to find the server given timestamp
450 * as part of ntlmv2 authentication (or local current time as
451 * default in case of failure)
452 */
453static __le64
454find_timestamp(struct cifs_ses *ses)
455{
456 unsigned int attrsize;
457 unsigned int type;
458 unsigned int onesize = sizeof(struct ntlmssp2_name);
459 unsigned char *blobptr;
460 unsigned char *blobend;
461 struct ntlmssp2_name *attrptr;
462
463 if (!ses->auth_key.len || !ses->auth_key.response)
464 return 0;
465
466 blobptr = ses->auth_key.response;
467 blobend = blobptr + ses->auth_key.len;
468
469 while (blobptr + onesize < blobend) {
470 attrptr = (struct ntlmssp2_name *) blobptr;
471 type = le16_to_cpu(attrptr->type);
472 if (type == NTLMSSP_AV_EOL)
473 break;
474 blobptr += 2; /* advance attr type */
475 attrsize = le16_to_cpu(attrptr->length);
476 blobptr += 2; /* advance attr size */
477 if (blobptr + attrsize > blobend)
478 break;
479 if (type == NTLMSSP_AV_TIMESTAMP) {
480 if (attrsize == sizeof(u64))
481 return *((__le64 *)blobptr);
482 }
483 blobptr += attrsize; /* advance attr value */
484 }
485
486 return cpu_to_le64(cifs_UnixTimeToNT(CURRENT_TIME));
487}
488
447static int calc_ntlmv2_hash(struct cifs_ses *ses, char *ntlmv2_hash, 489static int calc_ntlmv2_hash(struct cifs_ses *ses, char *ntlmv2_hash,
448 const struct nls_table *nls_cp) 490 const struct nls_table *nls_cp)
449{ 491{
@@ -641,6 +683,7 @@ setup_ntlmv2_rsp(struct cifs_ses *ses, const struct nls_table *nls_cp)
641 struct ntlmv2_resp *ntlmv2; 683 struct ntlmv2_resp *ntlmv2;
642 char ntlmv2_hash[16]; 684 char ntlmv2_hash[16];
643 unsigned char *tiblob = NULL; /* target info blob */ 685 unsigned char *tiblob = NULL; /* target info blob */
686 __le64 rsp_timestamp;
644 687
645 if (ses->server->negflavor == CIFS_NEGFLAVOR_EXTENDED) { 688 if (ses->server->negflavor == CIFS_NEGFLAVOR_EXTENDED) {
646 if (!ses->domainName) { 689 if (!ses->domainName) {
@@ -659,6 +702,12 @@ setup_ntlmv2_rsp(struct cifs_ses *ses, const struct nls_table *nls_cp)
659 } 702 }
660 } 703 }
661 704
705 /* Must be within 5 minutes of the server (or in range +/-2h
706 * in case of Mac OS X), so simply carry over server timestamp
707 * (as Windows 7 does)
708 */
709 rsp_timestamp = find_timestamp(ses);
710
662 baselen = CIFS_SESS_KEY_SIZE + sizeof(struct ntlmv2_resp); 711 baselen = CIFS_SESS_KEY_SIZE + sizeof(struct ntlmv2_resp);
663 tilen = ses->auth_key.len; 712 tilen = ses->auth_key.len;
664 tiblob = ses->auth_key.response; 713 tiblob = ses->auth_key.response;
@@ -675,8 +724,8 @@ setup_ntlmv2_rsp(struct cifs_ses *ses, const struct nls_table *nls_cp)
675 (ses->auth_key.response + CIFS_SESS_KEY_SIZE); 724 (ses->auth_key.response + CIFS_SESS_KEY_SIZE);
676 ntlmv2->blob_signature = cpu_to_le32(0x00000101); 725 ntlmv2->blob_signature = cpu_to_le32(0x00000101);
677 ntlmv2->reserved = 0; 726 ntlmv2->reserved = 0;
678 /* Must be within 5 minutes of the server */ 727 ntlmv2->time = rsp_timestamp;
679 ntlmv2->time = cpu_to_le64(cifs_UnixTimeToNT(CURRENT_TIME)); 728
680 get_random_bytes(&ntlmv2->client_chal, sizeof(ntlmv2->client_chal)); 729 get_random_bytes(&ntlmv2->client_chal, sizeof(ntlmv2->client_chal));
681 ntlmv2->reserved2 = 0; 730 ntlmv2->reserved2 = 0;
682 731
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index 6a1119e87fbb..e739950ca084 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -325,8 +325,11 @@ cifs_show_address(struct seq_file *s, struct TCP_Server_Info *server)
325static void 325static void
326cifs_show_security(struct seq_file *s, struct cifs_ses *ses) 326cifs_show_security(struct seq_file *s, struct cifs_ses *ses)
327{ 327{
328 if (ses->sectype == Unspecified) 328 if (ses->sectype == Unspecified) {
329 if (ses->user_name == NULL)
330 seq_puts(s, ",sec=none");
329 return; 331 return;
332 }
330 333
331 seq_puts(s, ",sec="); 334 seq_puts(s, ",sec=");
332 335
diff --git a/fs/cifs/ioctl.c b/fs/cifs/ioctl.c
index c63f5227b681..28a77bf1d559 100644
--- a/fs/cifs/ioctl.c
+++ b/fs/cifs/ioctl.c
@@ -67,6 +67,12 @@ static long cifs_ioctl_clone(unsigned int xid, struct file *dst_file,
67 goto out_drop_write; 67 goto out_drop_write;
68 } 68 }
69 69
70 if (src_file.file->f_op->unlocked_ioctl != cifs_ioctl) {
71 rc = -EBADF;
72 cifs_dbg(VFS, "src file seems to be from a different filesystem type\n");
73 goto out_fput;
74 }
75
70 if ((!src_file.file->private_data) || (!dst_file->private_data)) { 76 if ((!src_file.file->private_data) || (!dst_file->private_data)) {
71 rc = -EBADF; 77 rc = -EBADF;
72 cifs_dbg(VFS, "missing cifsFileInfo on copy range src file\n"); 78 cifs_dbg(VFS, "missing cifsFileInfo on copy range src file\n");
diff --git a/fs/cifs/smb2ops.c b/fs/cifs/smb2ops.c
index df91bcf56d67..18da19f4f811 100644
--- a/fs/cifs/smb2ops.c
+++ b/fs/cifs/smb2ops.c
@@ -50,9 +50,13 @@ change_conf(struct TCP_Server_Info *server)
50 break; 50 break;
51 default: 51 default:
52 server->echoes = true; 52 server->echoes = true;
53 server->oplocks = true; 53 if (enable_oplocks) {
54 server->oplocks = true;
55 server->oplock_credits = 1;
56 } else
57 server->oplocks = false;
58
54 server->echo_credits = 1; 59 server->echo_credits = 1;
55 server->oplock_credits = 1;
56 } 60 }
57 server->credits -= server->echo_credits + server->oplock_credits; 61 server->credits -= server->echo_credits + server->oplock_credits;
58 return 0; 62 return 0;
diff --git a/fs/cifs/smb2pdu.c b/fs/cifs/smb2pdu.c
index 070fb2ad85ce..ce83e2edbe0a 100644
--- a/fs/cifs/smb2pdu.c
+++ b/fs/cifs/smb2pdu.c
@@ -46,6 +46,7 @@
46#include "smb2status.h" 46#include "smb2status.h"
47#include "smb2glob.h" 47#include "smb2glob.h"
48#include "cifspdu.h" 48#include "cifspdu.h"
49#include "cifs_spnego.h"
49 50
50/* 51/*
51 * The following table defines the expected "StructureSize" of SMB2 requests 52 * The following table defines the expected "StructureSize" of SMB2 requests
@@ -486,19 +487,15 @@ SMB2_negotiate(const unsigned int xid, struct cifs_ses *ses)
486 cifs_dbg(FYI, "missing security blob on negprot\n"); 487 cifs_dbg(FYI, "missing security blob on negprot\n");
487 488
488 rc = cifs_enable_signing(server, ses->sign); 489 rc = cifs_enable_signing(server, ses->sign);
489#ifdef CONFIG_SMB2_ASN1 /* BB REMOVEME when updated asn1.c ready */
490 if (rc) 490 if (rc)
491 goto neg_exit; 491 goto neg_exit;
492 if (blob_length) 492 if (blob_length) {
493 rc = decode_negTokenInit(security_blob, blob_length, server); 493 rc = decode_negTokenInit(security_blob, blob_length, server);
494 if (rc == 1) 494 if (rc == 1)
495 rc = 0; 495 rc = 0;
496 else if (rc == 0) { 496 else if (rc == 0)
497 rc = -EIO; 497 rc = -EIO;
498 goto neg_exit;
499 } 498 }
500#endif
501
502neg_exit: 499neg_exit:
503 free_rsp_buf(resp_buftype, rsp); 500 free_rsp_buf(resp_buftype, rsp);
504 return rc; 501 return rc;
@@ -592,7 +589,8 @@ SMB2_sess_setup(const unsigned int xid, struct cifs_ses *ses,
592 __le32 phase = NtLmNegotiate; /* NTLMSSP, if needed, is multistage */ 589 __le32 phase = NtLmNegotiate; /* NTLMSSP, if needed, is multistage */
593 struct TCP_Server_Info *server = ses->server; 590 struct TCP_Server_Info *server = ses->server;
594 u16 blob_length = 0; 591 u16 blob_length = 0;
595 char *security_blob; 592 struct key *spnego_key = NULL;
593 char *security_blob = NULL;
596 char *ntlmssp_blob = NULL; 594 char *ntlmssp_blob = NULL;
597 bool use_spnego = false; /* else use raw ntlmssp */ 595 bool use_spnego = false; /* else use raw ntlmssp */
598 596
@@ -620,7 +618,8 @@ SMB2_sess_setup(const unsigned int xid, struct cifs_ses *ses,
620 ses->ntlmssp->sesskey_per_smbsess = true; 618 ses->ntlmssp->sesskey_per_smbsess = true;
621 619
622 /* FIXME: allow for other auth types besides NTLMSSP (e.g. krb5) */ 620 /* FIXME: allow for other auth types besides NTLMSSP (e.g. krb5) */
623 ses->sectype = RawNTLMSSP; 621 if (ses->sectype != Kerberos && ses->sectype != RawNTLMSSP)
622 ses->sectype = RawNTLMSSP;
624 623
625ssetup_ntlmssp_authenticate: 624ssetup_ntlmssp_authenticate:
626 if (phase == NtLmChallenge) 625 if (phase == NtLmChallenge)
@@ -649,7 +648,48 @@ ssetup_ntlmssp_authenticate:
649 iov[0].iov_base = (char *)req; 648 iov[0].iov_base = (char *)req;
650 /* 4 for rfc1002 length field and 1 for pad */ 649 /* 4 for rfc1002 length field and 1 for pad */
651 iov[0].iov_len = get_rfc1002_length(req) + 4 - 1; 650 iov[0].iov_len = get_rfc1002_length(req) + 4 - 1;
652 if (phase == NtLmNegotiate) { 651
652 if (ses->sectype == Kerberos) {
653#ifdef CONFIG_CIFS_UPCALL
654 struct cifs_spnego_msg *msg;
655
656 spnego_key = cifs_get_spnego_key(ses);
657 if (IS_ERR(spnego_key)) {
658 rc = PTR_ERR(spnego_key);
659 spnego_key = NULL;
660 goto ssetup_exit;
661 }
662
663 msg = spnego_key->payload.data;
664 /*
665 * check version field to make sure that cifs.upcall is
666 * sending us a response in an expected form
667 */
668 if (msg->version != CIFS_SPNEGO_UPCALL_VERSION) {
669 cifs_dbg(VFS,
670 "bad cifs.upcall version. Expected %d got %d",
671 CIFS_SPNEGO_UPCALL_VERSION, msg->version);
672 rc = -EKEYREJECTED;
673 goto ssetup_exit;
674 }
675 ses->auth_key.response = kmemdup(msg->data, msg->sesskey_len,
676 GFP_KERNEL);
677 if (!ses->auth_key.response) {
678 cifs_dbg(VFS,
679 "Kerberos can't allocate (%u bytes) memory",
680 msg->sesskey_len);
681 rc = -ENOMEM;
682 goto ssetup_exit;
683 }
684 ses->auth_key.len = msg->sesskey_len;
685 blob_length = msg->secblob_len;
686 iov[1].iov_base = msg->data + msg->sesskey_len;
687 iov[1].iov_len = blob_length;
688#else
689 rc = -EOPNOTSUPP;
690 goto ssetup_exit;
691#endif /* CONFIG_CIFS_UPCALL */
692 } else if (phase == NtLmNegotiate) { /* if not krb5 must be ntlmssp */
653 ntlmssp_blob = kmalloc(sizeof(struct _NEGOTIATE_MESSAGE), 693 ntlmssp_blob = kmalloc(sizeof(struct _NEGOTIATE_MESSAGE),
654 GFP_KERNEL); 694 GFP_KERNEL);
655 if (ntlmssp_blob == NULL) { 695 if (ntlmssp_blob == NULL) {
@@ -672,6 +712,8 @@ ssetup_ntlmssp_authenticate:
672 /* with raw NTLMSSP we don't encapsulate in SPNEGO */ 712 /* with raw NTLMSSP we don't encapsulate in SPNEGO */
673 security_blob = ntlmssp_blob; 713 security_blob = ntlmssp_blob;
674 } 714 }
715 iov[1].iov_base = security_blob;
716 iov[1].iov_len = blob_length;
675 } else if (phase == NtLmAuthenticate) { 717 } else if (phase == NtLmAuthenticate) {
676 req->hdr.SessionId = ses->Suid; 718 req->hdr.SessionId = ses->Suid;
677 ntlmssp_blob = kzalloc(sizeof(struct _NEGOTIATE_MESSAGE) + 500, 719 ntlmssp_blob = kzalloc(sizeof(struct _NEGOTIATE_MESSAGE) + 500,
@@ -699,6 +741,8 @@ ssetup_ntlmssp_authenticate:
699 } else { 741 } else {
700 security_blob = ntlmssp_blob; 742 security_blob = ntlmssp_blob;
701 } 743 }
744 iov[1].iov_base = security_blob;
745 iov[1].iov_len = blob_length;
702 } else { 746 } else {
703 cifs_dbg(VFS, "illegal ntlmssp phase\n"); 747 cifs_dbg(VFS, "illegal ntlmssp phase\n");
704 rc = -EIO; 748 rc = -EIO;
@@ -710,8 +754,6 @@ ssetup_ntlmssp_authenticate:
710 cpu_to_le16(sizeof(struct smb2_sess_setup_req) - 754 cpu_to_le16(sizeof(struct smb2_sess_setup_req) -
711 1 /* pad */ - 4 /* rfc1001 len */); 755 1 /* pad */ - 4 /* rfc1001 len */);
712 req->SecurityBufferLength = cpu_to_le16(blob_length); 756 req->SecurityBufferLength = cpu_to_le16(blob_length);
713 iov[1].iov_base = security_blob;
714 iov[1].iov_len = blob_length;
715 757
716 inc_rfc1001_len(req, blob_length - 1 /* pad */); 758 inc_rfc1001_len(req, blob_length - 1 /* pad */);
717 759
@@ -722,6 +764,7 @@ ssetup_ntlmssp_authenticate:
722 764
723 kfree(security_blob); 765 kfree(security_blob);
724 rsp = (struct smb2_sess_setup_rsp *)iov[0].iov_base; 766 rsp = (struct smb2_sess_setup_rsp *)iov[0].iov_base;
767 ses->Suid = rsp->hdr.SessionId;
725 if (resp_buftype != CIFS_NO_BUFFER && 768 if (resp_buftype != CIFS_NO_BUFFER &&
726 rsp->hdr.Status == STATUS_MORE_PROCESSING_REQUIRED) { 769 rsp->hdr.Status == STATUS_MORE_PROCESSING_REQUIRED) {
727 if (phase != NtLmNegotiate) { 770 if (phase != NtLmNegotiate) {
@@ -739,7 +782,6 @@ ssetup_ntlmssp_authenticate:
739 /* NTLMSSP Negotiate sent now processing challenge (response) */ 782 /* NTLMSSP Negotiate sent now processing challenge (response) */
740 phase = NtLmChallenge; /* process ntlmssp challenge */ 783 phase = NtLmChallenge; /* process ntlmssp challenge */
741 rc = 0; /* MORE_PROCESSING is not an error here but expected */ 784 rc = 0; /* MORE_PROCESSING is not an error here but expected */
742 ses->Suid = rsp->hdr.SessionId;
743 rc = decode_ntlmssp_challenge(rsp->Buffer, 785 rc = decode_ntlmssp_challenge(rsp->Buffer,
744 le16_to_cpu(rsp->SecurityBufferLength), ses); 786 le16_to_cpu(rsp->SecurityBufferLength), ses);
745 } 787 }
@@ -796,6 +838,10 @@ keygen_exit:
796 kfree(ses->auth_key.response); 838 kfree(ses->auth_key.response);
797 ses->auth_key.response = NULL; 839 ses->auth_key.response = NULL;
798 } 840 }
841 if (spnego_key) {
842 key_invalidate(spnego_key);
843 key_put(spnego_key);
844 }
799 kfree(ses->ntlmssp); 845 kfree(ses->ntlmssp);
800 846
801 return rc; 847 return rc;
@@ -876,6 +922,12 @@ SMB2_tcon(const unsigned int xid, struct cifs_ses *ses, const char *tree,
876 if (tcon && tcon->bad_network_name) 922 if (tcon && tcon->bad_network_name)
877 return -ENOENT; 923 return -ENOENT;
878 924
925 if ((tcon->seal) &&
926 ((ses->server->capabilities & SMB2_GLOBAL_CAP_ENCRYPTION) == 0)) {
927 cifs_dbg(VFS, "encryption requested but no server support");
928 return -EOPNOTSUPP;
929 }
930
879 unc_path = kmalloc(MAX_SHARENAME_LENGTH * 2, GFP_KERNEL); 931 unc_path = kmalloc(MAX_SHARENAME_LENGTH * 2, GFP_KERNEL);
880 if (unc_path == NULL) 932 if (unc_path == NULL)
881 return -ENOMEM; 933 return -ENOMEM;
@@ -955,6 +1007,8 @@ SMB2_tcon(const unsigned int xid, struct cifs_ses *ses, const char *tree,
955 ((tcon->share_flags & SHI1005_FLAGS_DFS) == 0)) 1007 ((tcon->share_flags & SHI1005_FLAGS_DFS) == 0))
956 cifs_dbg(VFS, "DFS capability contradicts DFS flag\n"); 1008 cifs_dbg(VFS, "DFS capability contradicts DFS flag\n");
957 init_copy_chunk_defaults(tcon); 1009 init_copy_chunk_defaults(tcon);
1010 if (tcon->share_flags & SHI1005_FLAGS_ENCRYPT_DATA)
1011 cifs_dbg(VFS, "Encrypted shares not supported");
958 if (tcon->ses->server->ops->validate_negotiate) 1012 if (tcon->ses->server->ops->validate_negotiate)
959 rc = tcon->ses->server->ops->validate_negotiate(xid, tcon); 1013 rc = tcon->ses->server->ops->validate_negotiate(xid, tcon);
960tcon_exit: 1014tcon_exit:
diff --git a/fs/dax.c b/fs/dax.c
index 93bf2f990ace..bcfb14bfc1e4 100644
--- a/fs/dax.c
+++ b/fs/dax.c
@@ -119,7 +119,8 @@ static ssize_t dax_io(struct inode *inode, struct iov_iter *iter,
119 size_t len; 119 size_t len;
120 if (pos == max) { 120 if (pos == max) {
121 unsigned blkbits = inode->i_blkbits; 121 unsigned blkbits = inode->i_blkbits;
122 sector_t block = pos >> blkbits; 122 long page = pos >> PAGE_SHIFT;
123 sector_t block = page << (PAGE_SHIFT - blkbits);
123 unsigned first = pos - (block << blkbits); 124 unsigned first = pos - (block << blkbits);
124 long size; 125 long size;
125 126
@@ -568,8 +569,20 @@ int __dax_pmd_fault(struct vm_area_struct *vma, unsigned long address,
568 if (!buffer_size_valid(&bh) || bh.b_size < PMD_SIZE) 569 if (!buffer_size_valid(&bh) || bh.b_size < PMD_SIZE)
569 goto fallback; 570 goto fallback;
570 571
572 sector = bh.b_blocknr << (blkbits - 9);
573
571 if (buffer_unwritten(&bh) || buffer_new(&bh)) { 574 if (buffer_unwritten(&bh) || buffer_new(&bh)) {
572 int i; 575 int i;
576
577 length = bdev_direct_access(bh.b_bdev, sector, &kaddr, &pfn,
578 bh.b_size);
579 if (length < 0) {
580 result = VM_FAULT_SIGBUS;
581 goto out;
582 }
583 if ((length < PMD_SIZE) || (pfn & PG_PMD_COLOUR))
584 goto fallback;
585
573 for (i = 0; i < PTRS_PER_PMD; i++) 586 for (i = 0; i < PTRS_PER_PMD; i++)
574 clear_pmem(kaddr + i * PAGE_SIZE, PAGE_SIZE); 587 clear_pmem(kaddr + i * PAGE_SIZE, PAGE_SIZE);
575 wmb_pmem(); 588 wmb_pmem();
@@ -622,7 +635,6 @@ int __dax_pmd_fault(struct vm_area_struct *vma, unsigned long address,
622 result = VM_FAULT_NOPAGE; 635 result = VM_FAULT_NOPAGE;
623 spin_unlock(ptl); 636 spin_unlock(ptl);
624 } else { 637 } else {
625 sector = bh.b_blocknr << (blkbits - 9);
626 length = bdev_direct_access(bh.b_bdev, sector, &kaddr, &pfn, 638 length = bdev_direct_access(bh.b_bdev, sector, &kaddr, &pfn,
627 bh.b_size); 639 bh.b_size);
628 if (length < 0) { 640 if (length < 0) {
diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c
index 587ac08eabb6..091a36444972 100644
--- a/fs/fs-writeback.c
+++ b/fs/fs-writeback.c
@@ -1481,6 +1481,21 @@ static long writeback_sb_inodes(struct super_block *sb,
1481 wbc_detach_inode(&wbc); 1481 wbc_detach_inode(&wbc);
1482 work->nr_pages -= write_chunk - wbc.nr_to_write; 1482 work->nr_pages -= write_chunk - wbc.nr_to_write;
1483 wrote += write_chunk - wbc.nr_to_write; 1483 wrote += write_chunk - wbc.nr_to_write;
1484
1485 if (need_resched()) {
1486 /*
1487 * We're trying to balance between building up a nice
1488 * long list of IOs to improve our merge rate, and
1489 * getting those IOs out quickly for anyone throttling
1490 * in balance_dirty_pages(). cond_resched() doesn't
1491 * unplug, so get our IOs out the door before we
1492 * give up the CPU.
1493 */
1494 blk_flush_plug(current);
1495 cond_resched();
1496 }
1497
1498
1484 spin_lock(&wb->list_lock); 1499 spin_lock(&wb->list_lock);
1485 spin_lock(&inode->i_lock); 1500 spin_lock(&inode->i_lock);
1486 if (!(inode->i_state & I_DIRTY_ALL)) 1501 if (!(inode->i_state & I_DIRTY_ALL))
@@ -1488,7 +1503,7 @@ static long writeback_sb_inodes(struct super_block *sb,
1488 requeue_inode(inode, wb, &wbc); 1503 requeue_inode(inode, wb, &wbc);
1489 inode_sync_complete(inode); 1504 inode_sync_complete(inode);
1490 spin_unlock(&inode->i_lock); 1505 spin_unlock(&inode->i_lock);
1491 cond_resched_lock(&wb->list_lock); 1506
1492 /* 1507 /*
1493 * bail out to wb_writeback() often enough to check 1508 * bail out to wb_writeback() often enough to check
1494 * background threshold and other termination conditions. 1509 * background threshold and other termination conditions.
diff --git a/fs/nfs/delegation.c b/fs/nfs/delegation.c
index 2714ef835bdd..be806ead7f4d 100644
--- a/fs/nfs/delegation.c
+++ b/fs/nfs/delegation.c
@@ -113,7 +113,8 @@ out:
113 return status; 113 return status;
114} 114}
115 115
116static int nfs_delegation_claim_opens(struct inode *inode, const nfs4_stateid *stateid) 116static int nfs_delegation_claim_opens(struct inode *inode,
117 const nfs4_stateid *stateid, fmode_t type)
117{ 118{
118 struct nfs_inode *nfsi = NFS_I(inode); 119 struct nfs_inode *nfsi = NFS_I(inode);
119 struct nfs_open_context *ctx; 120 struct nfs_open_context *ctx;
@@ -140,7 +141,7 @@ again:
140 /* Block nfs4_proc_unlck */ 141 /* Block nfs4_proc_unlck */
141 mutex_lock(&sp->so_delegreturn_mutex); 142 mutex_lock(&sp->so_delegreturn_mutex);
142 seq = raw_seqcount_begin(&sp->so_reclaim_seqcount); 143 seq = raw_seqcount_begin(&sp->so_reclaim_seqcount);
143 err = nfs4_open_delegation_recall(ctx, state, stateid); 144 err = nfs4_open_delegation_recall(ctx, state, stateid, type);
144 if (!err) 145 if (!err)
145 err = nfs_delegation_claim_locks(ctx, state, stateid); 146 err = nfs_delegation_claim_locks(ctx, state, stateid);
146 if (!err && read_seqcount_retry(&sp->so_reclaim_seqcount, seq)) 147 if (!err && read_seqcount_retry(&sp->so_reclaim_seqcount, seq))
@@ -411,7 +412,8 @@ static int nfs_end_delegation_return(struct inode *inode, struct nfs_delegation
411 do { 412 do {
412 if (test_bit(NFS_DELEGATION_REVOKED, &delegation->flags)) 413 if (test_bit(NFS_DELEGATION_REVOKED, &delegation->flags))
413 break; 414 break;
414 err = nfs_delegation_claim_opens(inode, &delegation->stateid); 415 err = nfs_delegation_claim_opens(inode, &delegation->stateid,
416 delegation->type);
415 if (!issync || err != -EAGAIN) 417 if (!issync || err != -EAGAIN)
416 break; 418 break;
417 /* 419 /*
diff --git a/fs/nfs/delegation.h b/fs/nfs/delegation.h
index a44829173e57..333063e032f0 100644
--- a/fs/nfs/delegation.h
+++ b/fs/nfs/delegation.h
@@ -54,7 +54,7 @@ void nfs_delegation_reap_unclaimed(struct nfs_client *clp);
54 54
55/* NFSv4 delegation-related procedures */ 55/* NFSv4 delegation-related procedures */
56int nfs4_proc_delegreturn(struct inode *inode, struct rpc_cred *cred, const nfs4_stateid *stateid, int issync); 56int nfs4_proc_delegreturn(struct inode *inode, struct rpc_cred *cred, const nfs4_stateid *stateid, int issync);
57int nfs4_open_delegation_recall(struct nfs_open_context *ctx, struct nfs4_state *state, const nfs4_stateid *stateid); 57int nfs4_open_delegation_recall(struct nfs_open_context *ctx, struct nfs4_state *state, const nfs4_stateid *stateid, fmode_t type);
58int nfs4_lock_delegation_recall(struct file_lock *fl, struct nfs4_state *state, const nfs4_stateid *stateid); 58int nfs4_lock_delegation_recall(struct file_lock *fl, struct nfs4_state *state, const nfs4_stateid *stateid);
59bool nfs4_copy_delegation_stateid(nfs4_stateid *dst, struct inode *inode, fmode_t flags); 59bool nfs4_copy_delegation_stateid(nfs4_stateid *dst, struct inode *inode, fmode_t flags);
60 60
diff --git a/fs/nfs/direct.c b/fs/nfs/direct.c
index 38678d9a5cc4..4b1d08f56aba 100644
--- a/fs/nfs/direct.c
+++ b/fs/nfs/direct.c
@@ -166,8 +166,11 @@ nfs_direct_select_verf(struct nfs_direct_req *dreq,
166 struct nfs_writeverf *verfp = &dreq->verf; 166 struct nfs_writeverf *verfp = &dreq->verf;
167 167
168#ifdef CONFIG_NFS_V4_1 168#ifdef CONFIG_NFS_V4_1
169 if (ds_clp) { 169 /*
170 /* pNFS is in use, use the DS verf */ 170 * pNFS is in use, use the DS verf except commit_through_mds is set
171 * for layout segment where nbuckets is zero.
172 */
173 if (ds_clp && dreq->ds_cinfo.nbuckets > 0) {
171 if (commit_idx >= 0 && commit_idx < dreq->ds_cinfo.nbuckets) 174 if (commit_idx >= 0 && commit_idx < dreq->ds_cinfo.nbuckets)
172 verfp = &dreq->ds_cinfo.buckets[commit_idx].direct_verf; 175 verfp = &dreq->ds_cinfo.buckets[commit_idx].direct_verf;
173 else 176 else
diff --git a/fs/nfs/filelayout/filelayout.c b/fs/nfs/filelayout/filelayout.c
index b34f2e228601..02ec07973bc4 100644
--- a/fs/nfs/filelayout/filelayout.c
+++ b/fs/nfs/filelayout/filelayout.c
@@ -629,23 +629,18 @@ out_put:
629 goto out; 629 goto out;
630} 630}
631 631
632static void filelayout_free_fh_array(struct nfs4_filelayout_segment *fl) 632static void _filelayout_free_lseg(struct nfs4_filelayout_segment *fl)
633{ 633{
634 int i; 634 int i;
635 635
636 for (i = 0; i < fl->num_fh; i++) { 636 if (fl->fh_array) {
637 if (!fl->fh_array[i]) 637 for (i = 0; i < fl->num_fh; i++) {
638 break; 638 if (!fl->fh_array[i])
639 kfree(fl->fh_array[i]); 639 break;
640 kfree(fl->fh_array[i]);
641 }
642 kfree(fl->fh_array);
640 } 643 }
641 kfree(fl->fh_array);
642 fl->fh_array = NULL;
643}
644
645static void
646_filelayout_free_lseg(struct nfs4_filelayout_segment *fl)
647{
648 filelayout_free_fh_array(fl);
649 kfree(fl); 644 kfree(fl);
650} 645}
651 646
@@ -716,21 +711,21 @@ filelayout_decode_layout(struct pnfs_layout_hdr *flo,
716 /* Do we want to use a mempool here? */ 711 /* Do we want to use a mempool here? */
717 fl->fh_array[i] = kmalloc(sizeof(struct nfs_fh), gfp_flags); 712 fl->fh_array[i] = kmalloc(sizeof(struct nfs_fh), gfp_flags);
718 if (!fl->fh_array[i]) 713 if (!fl->fh_array[i])
719 goto out_err_free; 714 goto out_err;
720 715
721 p = xdr_inline_decode(&stream, 4); 716 p = xdr_inline_decode(&stream, 4);
722 if (unlikely(!p)) 717 if (unlikely(!p))
723 goto out_err_free; 718 goto out_err;
724 fl->fh_array[i]->size = be32_to_cpup(p++); 719 fl->fh_array[i]->size = be32_to_cpup(p++);
725 if (sizeof(struct nfs_fh) < fl->fh_array[i]->size) { 720 if (sizeof(struct nfs_fh) < fl->fh_array[i]->size) {
726 printk(KERN_ERR "NFS: Too big fh %d received %d\n", 721 printk(KERN_ERR "NFS: Too big fh %d received %d\n",
727 i, fl->fh_array[i]->size); 722 i, fl->fh_array[i]->size);
728 goto out_err_free; 723 goto out_err;
729 } 724 }
730 725
731 p = xdr_inline_decode(&stream, fl->fh_array[i]->size); 726 p = xdr_inline_decode(&stream, fl->fh_array[i]->size);
732 if (unlikely(!p)) 727 if (unlikely(!p))
733 goto out_err_free; 728 goto out_err;
734 memcpy(fl->fh_array[i]->data, p, fl->fh_array[i]->size); 729 memcpy(fl->fh_array[i]->data, p, fl->fh_array[i]->size);
735 dprintk("DEBUG: %s: fh len %d\n", __func__, 730 dprintk("DEBUG: %s: fh len %d\n", __func__,
736 fl->fh_array[i]->size); 731 fl->fh_array[i]->size);
@@ -739,8 +734,6 @@ filelayout_decode_layout(struct pnfs_layout_hdr *flo,
739 __free_page(scratch); 734 __free_page(scratch);
740 return 0; 735 return 0;
741 736
742out_err_free:
743 filelayout_free_fh_array(fl);
744out_err: 737out_err:
745 __free_page(scratch); 738 __free_page(scratch);
746 return -EIO; 739 return -EIO;
diff --git a/fs/nfs/nfs42proc.c b/fs/nfs/nfs42proc.c
index d731bbf974aa..0f020e4d8421 100644
--- a/fs/nfs/nfs42proc.c
+++ b/fs/nfs/nfs42proc.c
@@ -175,10 +175,12 @@ loff_t nfs42_proc_llseek(struct file *filep, loff_t offset, int whence)
175{ 175{
176 struct nfs_server *server = NFS_SERVER(file_inode(filep)); 176 struct nfs_server *server = NFS_SERVER(file_inode(filep));
177 struct nfs4_exception exception = { }; 177 struct nfs4_exception exception = { };
178 int err; 178 loff_t err;
179 179
180 do { 180 do {
181 err = _nfs42_proc_llseek(filep, offset, whence); 181 err = _nfs42_proc_llseek(filep, offset, whence);
182 if (err >= 0)
183 break;
182 if (err == -ENOTSUPP) 184 if (err == -ENOTSUPP)
183 return -EOPNOTSUPP; 185 return -EOPNOTSUPP;
184 err = nfs4_handle_exception(server, err, &exception); 186 err = nfs4_handle_exception(server, err, &exception);
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index 693b903b48bd..f93b9cdb4934 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/nfs4proc.c
@@ -1127,6 +1127,21 @@ static int nfs4_wait_for_completion_rpc_task(struct rpc_task *task)
1127 return ret; 1127 return ret;
1128} 1128}
1129 1129
1130static bool nfs4_mode_match_open_stateid(struct nfs4_state *state,
1131 fmode_t fmode)
1132{
1133 switch(fmode & (FMODE_READ|FMODE_WRITE)) {
1134 case FMODE_READ|FMODE_WRITE:
1135 return state->n_rdwr != 0;
1136 case FMODE_WRITE:
1137 return state->n_wronly != 0;
1138 case FMODE_READ:
1139 return state->n_rdonly != 0;
1140 }
1141 WARN_ON_ONCE(1);
1142 return false;
1143}
1144
1130static int can_open_cached(struct nfs4_state *state, fmode_t mode, int open_mode) 1145static int can_open_cached(struct nfs4_state *state, fmode_t mode, int open_mode)
1131{ 1146{
1132 int ret = 0; 1147 int ret = 0;
@@ -1571,17 +1586,13 @@ static struct nfs4_opendata *nfs4_open_recoverdata_alloc(struct nfs_open_context
1571 return opendata; 1586 return opendata;
1572} 1587}
1573 1588
1574static int nfs4_open_recover_helper(struct nfs4_opendata *opendata, fmode_t fmode, struct nfs4_state **res) 1589static int nfs4_open_recover_helper(struct nfs4_opendata *opendata,
1590 fmode_t fmode)
1575{ 1591{
1576 struct nfs4_state *newstate; 1592 struct nfs4_state *newstate;
1577 int ret; 1593 int ret;
1578 1594
1579 if ((opendata->o_arg.claim == NFS4_OPEN_CLAIM_DELEGATE_CUR || 1595 if (!nfs4_mode_match_open_stateid(opendata->state, fmode))
1580 opendata->o_arg.claim == NFS4_OPEN_CLAIM_DELEG_CUR_FH) &&
1581 (opendata->o_arg.u.delegation_type & fmode) != fmode)
1582 /* This mode can't have been delegated, so we must have
1583 * a valid open_stateid to cover it - not need to reclaim.
1584 */
1585 return 0; 1596 return 0;
1586 opendata->o_arg.open_flags = 0; 1597 opendata->o_arg.open_flags = 0;
1587 opendata->o_arg.fmode = fmode; 1598 opendata->o_arg.fmode = fmode;
@@ -1597,14 +1608,14 @@ static int nfs4_open_recover_helper(struct nfs4_opendata *opendata, fmode_t fmod
1597 newstate = nfs4_opendata_to_nfs4_state(opendata); 1608 newstate = nfs4_opendata_to_nfs4_state(opendata);
1598 if (IS_ERR(newstate)) 1609 if (IS_ERR(newstate))
1599 return PTR_ERR(newstate); 1610 return PTR_ERR(newstate);
1611 if (newstate != opendata->state)
1612 ret = -ESTALE;
1600 nfs4_close_state(newstate, fmode); 1613 nfs4_close_state(newstate, fmode);
1601 *res = newstate; 1614 return ret;
1602 return 0;
1603} 1615}
1604 1616
1605static int nfs4_open_recover(struct nfs4_opendata *opendata, struct nfs4_state *state) 1617static int nfs4_open_recover(struct nfs4_opendata *opendata, struct nfs4_state *state)
1606{ 1618{
1607 struct nfs4_state *newstate;
1608 int ret; 1619 int ret;
1609 1620
1610 /* Don't trigger recovery in nfs_test_and_clear_all_open_stateid */ 1621 /* Don't trigger recovery in nfs_test_and_clear_all_open_stateid */
@@ -1615,27 +1626,15 @@ static int nfs4_open_recover(struct nfs4_opendata *opendata, struct nfs4_state *
1615 clear_bit(NFS_DELEGATED_STATE, &state->flags); 1626 clear_bit(NFS_DELEGATED_STATE, &state->flags);
1616 clear_bit(NFS_OPEN_STATE, &state->flags); 1627 clear_bit(NFS_OPEN_STATE, &state->flags);
1617 smp_rmb(); 1628 smp_rmb();
1618 if (state->n_rdwr != 0) { 1629 ret = nfs4_open_recover_helper(opendata, FMODE_READ|FMODE_WRITE);
1619 ret = nfs4_open_recover_helper(opendata, FMODE_READ|FMODE_WRITE, &newstate); 1630 if (ret != 0)
1620 if (ret != 0) 1631 return ret;
1621 return ret; 1632 ret = nfs4_open_recover_helper(opendata, FMODE_WRITE);
1622 if (newstate != state) 1633 if (ret != 0)
1623 return -ESTALE; 1634 return ret;
1624 } 1635 ret = nfs4_open_recover_helper(opendata, FMODE_READ);
1625 if (state->n_wronly != 0) { 1636 if (ret != 0)
1626 ret = nfs4_open_recover_helper(opendata, FMODE_WRITE, &newstate); 1637 return ret;
1627 if (ret != 0)
1628 return ret;
1629 if (newstate != state)
1630 return -ESTALE;
1631 }
1632 if (state->n_rdonly != 0) {
1633 ret = nfs4_open_recover_helper(opendata, FMODE_READ, &newstate);
1634 if (ret != 0)
1635 return ret;
1636 if (newstate != state)
1637 return -ESTALE;
1638 }
1639 /* 1638 /*
1640 * We may have performed cached opens for all three recoveries. 1639 * We may have performed cached opens for all three recoveries.
1641 * Check if we need to update the current stateid. 1640 * Check if we need to update the current stateid.
@@ -1759,18 +1758,32 @@ static int nfs4_handle_delegation_recall_error(struct nfs_server *server, struct
1759 return err; 1758 return err;
1760} 1759}
1761 1760
1762int nfs4_open_delegation_recall(struct nfs_open_context *ctx, struct nfs4_state *state, const nfs4_stateid *stateid) 1761int nfs4_open_delegation_recall(struct nfs_open_context *ctx,
1762 struct nfs4_state *state, const nfs4_stateid *stateid,
1763 fmode_t type)
1763{ 1764{
1764 struct nfs_server *server = NFS_SERVER(state->inode); 1765 struct nfs_server *server = NFS_SERVER(state->inode);
1765 struct nfs4_opendata *opendata; 1766 struct nfs4_opendata *opendata;
1766 int err; 1767 int err = 0;
1767 1768
1768 opendata = nfs4_open_recoverdata_alloc(ctx, state, 1769 opendata = nfs4_open_recoverdata_alloc(ctx, state,
1769 NFS4_OPEN_CLAIM_DELEG_CUR_FH); 1770 NFS4_OPEN_CLAIM_DELEG_CUR_FH);
1770 if (IS_ERR(opendata)) 1771 if (IS_ERR(opendata))
1771 return PTR_ERR(opendata); 1772 return PTR_ERR(opendata);
1772 nfs4_stateid_copy(&opendata->o_arg.u.delegation, stateid); 1773 nfs4_stateid_copy(&opendata->o_arg.u.delegation, stateid);
1773 err = nfs4_open_recover(opendata, state); 1774 clear_bit(NFS_DELEGATED_STATE, &state->flags);
1775 switch (type & (FMODE_READ|FMODE_WRITE)) {
1776 case FMODE_READ|FMODE_WRITE:
1777 case FMODE_WRITE:
1778 err = nfs4_open_recover_helper(opendata, FMODE_READ|FMODE_WRITE);
1779 if (err)
1780 break;
1781 err = nfs4_open_recover_helper(opendata, FMODE_WRITE);
1782 if (err)
1783 break;
1784 case FMODE_READ:
1785 err = nfs4_open_recover_helper(opendata, FMODE_READ);
1786 }
1774 nfs4_opendata_put(opendata); 1787 nfs4_opendata_put(opendata);
1775 return nfs4_handle_delegation_recall_error(server, state, stateid, err); 1788 return nfs4_handle_delegation_recall_error(server, state, stateid, err);
1776} 1789}
@@ -2645,6 +2658,15 @@ out:
2645 return err; 2658 return err;
2646} 2659}
2647 2660
2661static bool
2662nfs4_wait_on_layoutreturn(struct inode *inode, struct rpc_task *task)
2663{
2664 if (inode == NULL || !nfs_have_layout(inode))
2665 return false;
2666
2667 return pnfs_wait_on_layoutreturn(inode, task);
2668}
2669
2648struct nfs4_closedata { 2670struct nfs4_closedata {
2649 struct inode *inode; 2671 struct inode *inode;
2650 struct nfs4_state *state; 2672 struct nfs4_state *state;
@@ -2763,6 +2785,11 @@ static void nfs4_close_prepare(struct rpc_task *task, void *data)
2763 goto out_no_action; 2785 goto out_no_action;
2764 } 2786 }
2765 2787
2788 if (nfs4_wait_on_layoutreturn(inode, task)) {
2789 nfs_release_seqid(calldata->arg.seqid);
2790 goto out_wait;
2791 }
2792
2766 if (calldata->arg.fmode == 0) 2793 if (calldata->arg.fmode == 0)
2767 task->tk_msg.rpc_proc = &nfs4_procedures[NFSPROC4_CLNT_CLOSE]; 2794 task->tk_msg.rpc_proc = &nfs4_procedures[NFSPROC4_CLNT_CLOSE];
2768 if (calldata->roc) 2795 if (calldata->roc)
@@ -5308,6 +5335,9 @@ static void nfs4_delegreturn_prepare(struct rpc_task *task, void *data)
5308 5335
5309 d_data = (struct nfs4_delegreturndata *)data; 5336 d_data = (struct nfs4_delegreturndata *)data;
5310 5337
5338 if (nfs4_wait_on_layoutreturn(d_data->inode, task))
5339 return;
5340
5311 if (d_data->roc) 5341 if (d_data->roc)
5312 pnfs_roc_get_barrier(d_data->inode, &d_data->roc_barrier); 5342 pnfs_roc_get_barrier(d_data->inode, &d_data->roc_barrier);
5313 5343
@@ -7800,39 +7830,46 @@ static void nfs4_layoutget_done(struct rpc_task *task, void *calldata)
7800 dprintk("%s: NFS4ERR_RECALLCONFLICT waiting %lu\n", 7830 dprintk("%s: NFS4ERR_RECALLCONFLICT waiting %lu\n",
7801 __func__, delay); 7831 __func__, delay);
7802 rpc_delay(task, delay); 7832 rpc_delay(task, delay);
7803 task->tk_status = 0; 7833 /* Do not call nfs4_async_handle_error() */
7804 rpc_restart_call_prepare(task); 7834 goto out_restart;
7805 goto out; /* Do not call nfs4_async_handle_error() */
7806 } 7835 }
7807 break; 7836 break;
7808 case -NFS4ERR_EXPIRED: 7837 case -NFS4ERR_EXPIRED:
7809 case -NFS4ERR_BAD_STATEID: 7838 case -NFS4ERR_BAD_STATEID:
7810 spin_lock(&inode->i_lock); 7839 spin_lock(&inode->i_lock);
7811 lo = NFS_I(inode)->layout; 7840 if (nfs4_stateid_match(&lgp->args.stateid,
7812 if (!lo || list_empty(&lo->plh_segs)) { 7841 &lgp->args.ctx->state->stateid)) {
7813 spin_unlock(&inode->i_lock); 7842 spin_unlock(&inode->i_lock);
7814 /* If the open stateid was bad, then recover it. */ 7843 /* If the open stateid was bad, then recover it. */
7815 state = lgp->args.ctx->state; 7844 state = lgp->args.ctx->state;
7816 } else { 7845 break;
7846 }
7847 lo = NFS_I(inode)->layout;
7848 if (lo && nfs4_stateid_match(&lgp->args.stateid,
7849 &lo->plh_stateid)) {
7817 LIST_HEAD(head); 7850 LIST_HEAD(head);
7818 7851
7819 /* 7852 /*
7820 * Mark the bad layout state as invalid, then retry 7853 * Mark the bad layout state as invalid, then retry
7821 * with the current stateid. 7854 * with the current stateid.
7822 */ 7855 */
7856 set_bit(NFS_LAYOUT_INVALID_STID, &lo->plh_flags);
7823 pnfs_mark_matching_lsegs_invalid(lo, &head, NULL); 7857 pnfs_mark_matching_lsegs_invalid(lo, &head, NULL);
7824 spin_unlock(&inode->i_lock); 7858 spin_unlock(&inode->i_lock);
7825 pnfs_free_lseg_list(&head); 7859 pnfs_free_lseg_list(&head);
7826 7860 } else
7827 task->tk_status = 0; 7861 spin_unlock(&inode->i_lock);
7828 rpc_restart_call_prepare(task); 7862 goto out_restart;
7829 }
7830 } 7863 }
7831 if (nfs4_async_handle_error(task, server, state, NULL) == -EAGAIN) 7864 if (nfs4_async_handle_error(task, server, state, NULL) == -EAGAIN)
7832 rpc_restart_call_prepare(task); 7865 goto out_restart;
7833out: 7866out:
7834 dprintk("<-- %s\n", __func__); 7867 dprintk("<-- %s\n", __func__);
7835 return; 7868 return;
7869out_restart:
7870 task->tk_status = 0;
7871 rpc_restart_call_prepare(task);
7872 return;
7836out_overflow: 7873out_overflow:
7837 task->tk_status = -EOVERFLOW; 7874 task->tk_status = -EOVERFLOW;
7838 goto out; 7875 goto out;
diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c
index da73bc443238..5db324635e92 100644
--- a/fs/nfs/nfs4state.c
+++ b/fs/nfs/nfs4state.c
@@ -1481,7 +1481,7 @@ restart:
1481 spin_unlock(&state->state_lock); 1481 spin_unlock(&state->state_lock);
1482 } 1482 }
1483 nfs4_put_open_state(state); 1483 nfs4_put_open_state(state);
1484 clear_bit(NFS4CLNT_RECLAIM_NOGRACE, 1484 clear_bit(NFS_STATE_RECLAIM_NOGRACE,
1485 &state->flags); 1485 &state->flags);
1486 spin_lock(&sp->so_lock); 1486 spin_lock(&sp->so_lock);
1487 goto restart; 1487 goto restart;
diff --git a/fs/nfs/pagelist.c b/fs/nfs/pagelist.c
index 7c5718ba625e..fe3ddd20ff89 100644
--- a/fs/nfs/pagelist.c
+++ b/fs/nfs/pagelist.c
@@ -508,7 +508,7 @@ size_t nfs_generic_pg_test(struct nfs_pageio_descriptor *desc,
508 * for it without upsetting the slab allocator. 508 * for it without upsetting the slab allocator.
509 */ 509 */
510 if (((mirror->pg_count + req->wb_bytes) >> PAGE_SHIFT) * 510 if (((mirror->pg_count + req->wb_bytes) >> PAGE_SHIFT) *
511 sizeof(struct page) > PAGE_SIZE) 511 sizeof(struct page *) > PAGE_SIZE)
512 return 0; 512 return 0;
513 513
514 return min(mirror->pg_bsize - mirror->pg_count, (size_t)req->wb_bytes); 514 return min(mirror->pg_bsize - mirror->pg_count, (size_t)req->wb_bytes);
diff --git a/fs/nfs/pnfs.c b/fs/nfs/pnfs.c
index ba1246433794..8abe27165ad0 100644
--- a/fs/nfs/pnfs.c
+++ b/fs/nfs/pnfs.c
@@ -1104,20 +1104,15 @@ bool pnfs_roc(struct inode *ino)
1104 mark_lseg_invalid(lseg, &tmp_list); 1104 mark_lseg_invalid(lseg, &tmp_list);
1105 found = true; 1105 found = true;
1106 } 1106 }
1107 /* pnfs_prepare_layoutreturn() grabs lo ref and it will be put 1107 /* ROC in two conditions:
1108 * in pnfs_roc_release(). We don't really send a layoutreturn but
1109 * still want others to view us like we are sending one!
1110 *
1111 * If pnfs_prepare_layoutreturn() fails, it means someone else is doing
1112 * LAYOUTRETURN, so we proceed like there are no layouts to return.
1113 *
1114 * ROC in three conditions:
1115 * 1. there are ROC lsegs 1108 * 1. there are ROC lsegs
1116 * 2. we don't send layoutreturn 1109 * 2. we don't send layoutreturn
1117 * 3. no others are sending layoutreturn
1118 */ 1110 */
1119 if (found && !layoutreturn && pnfs_prepare_layoutreturn(lo)) 1111 if (found && !layoutreturn) {
1112 /* lo ref dropped in pnfs_roc_release() */
1113 pnfs_get_layout_hdr(lo);
1120 roc = true; 1114 roc = true;
1115 }
1121 1116
1122out_noroc: 1117out_noroc:
1123 spin_unlock(&ino->i_lock); 1118 spin_unlock(&ino->i_lock);
@@ -1172,6 +1167,26 @@ void pnfs_roc_get_barrier(struct inode *ino, u32 *barrier)
1172 spin_unlock(&ino->i_lock); 1167 spin_unlock(&ino->i_lock);
1173} 1168}
1174 1169
1170bool pnfs_wait_on_layoutreturn(struct inode *ino, struct rpc_task *task)
1171{
1172 struct nfs_inode *nfsi = NFS_I(ino);
1173 struct pnfs_layout_hdr *lo;
1174 bool sleep = false;
1175
1176 /* we might not have grabbed lo reference. so need to check under
1177 * i_lock */
1178 spin_lock(&ino->i_lock);
1179 lo = nfsi->layout;
1180 if (lo && test_bit(NFS_LAYOUT_RETURN, &lo->plh_flags))
1181 sleep = true;
1182 spin_unlock(&ino->i_lock);
1183
1184 if (sleep)
1185 rpc_sleep_on(&NFS_SERVER(ino)->roc_rpcwaitq, task, NULL);
1186
1187 return sleep;
1188}
1189
1175/* 1190/*
1176 * Compare two layout segments for sorting into layout cache. 1191 * Compare two layout segments for sorting into layout cache.
1177 * We want to preferentially return RW over RO layouts, so ensure those 1192 * We want to preferentially return RW over RO layouts, so ensure those
diff --git a/fs/nfs/pnfs.h b/fs/nfs/pnfs.h
index 78c9351ff117..d1990e90e7a0 100644
--- a/fs/nfs/pnfs.h
+++ b/fs/nfs/pnfs.h
@@ -270,6 +270,7 @@ bool pnfs_roc(struct inode *ino);
270void pnfs_roc_release(struct inode *ino); 270void pnfs_roc_release(struct inode *ino);
271void pnfs_roc_set_barrier(struct inode *ino, u32 barrier); 271void pnfs_roc_set_barrier(struct inode *ino, u32 barrier);
272void pnfs_roc_get_barrier(struct inode *ino, u32 *barrier); 272void pnfs_roc_get_barrier(struct inode *ino, u32 *barrier);
273bool pnfs_wait_on_layoutreturn(struct inode *ino, struct rpc_task *task);
273void pnfs_set_layoutcommit(struct inode *, struct pnfs_layout_segment *, loff_t); 274void pnfs_set_layoutcommit(struct inode *, struct pnfs_layout_segment *, loff_t);
274void pnfs_cleanup_layoutcommit(struct nfs4_layoutcommit_data *data); 275void pnfs_cleanup_layoutcommit(struct nfs4_layoutcommit_data *data);
275int pnfs_layoutcommit_inode(struct inode *inode, bool sync); 276int pnfs_layoutcommit_inode(struct inode *inode, bool sync);
@@ -639,6 +640,12 @@ pnfs_roc_get_barrier(struct inode *ino, u32 *barrier)
639{ 640{
640} 641}
641 642
643static inline bool
644pnfs_wait_on_layoutreturn(struct inode *ino, struct rpc_task *task)
645{
646 return false;
647}
648
642static inline void set_pnfs_layoutdriver(struct nfs_server *s, 649static inline void set_pnfs_layoutdriver(struct nfs_server *s,
643 const struct nfs_fh *mntfh, u32 id) 650 const struct nfs_fh *mntfh, u32 id)
644{ 651{
diff --git a/fs/nfs/read.c b/fs/nfs/read.c
index ae0ff7a11b40..01b8cc8e8cfc 100644
--- a/fs/nfs/read.c
+++ b/fs/nfs/read.c
@@ -72,6 +72,9 @@ void nfs_pageio_reset_read_mds(struct nfs_pageio_descriptor *pgio)
72{ 72{
73 struct nfs_pgio_mirror *mirror; 73 struct nfs_pgio_mirror *mirror;
74 74
75 if (pgio->pg_ops && pgio->pg_ops->pg_cleanup)
76 pgio->pg_ops->pg_cleanup(pgio);
77
75 pgio->pg_ops = &nfs_pgio_rw_ops; 78 pgio->pg_ops = &nfs_pgio_rw_ops;
76 79
77 /* read path should never have more than one mirror */ 80 /* read path should never have more than one mirror */
diff --git a/fs/nfs/write.c b/fs/nfs/write.c
index 388f48079c43..72624dc4a623 100644
--- a/fs/nfs/write.c
+++ b/fs/nfs/write.c
@@ -1351,6 +1351,9 @@ void nfs_pageio_reset_write_mds(struct nfs_pageio_descriptor *pgio)
1351{ 1351{
1352 struct nfs_pgio_mirror *mirror; 1352 struct nfs_pgio_mirror *mirror;
1353 1353
1354 if (pgio->pg_ops && pgio->pg_ops->pg_cleanup)
1355 pgio->pg_ops->pg_cleanup(pgio);
1356
1354 pgio->pg_ops = &nfs_pgio_rw_ops; 1357 pgio->pg_ops = &nfs_pgio_rw_ops;
1355 1358
1356 nfs_pageio_stop_mirroring(pgio); 1359 nfs_pageio_stop_mirroring(pgio);
diff --git a/fs/ocfs2/dlm/dlmmaster.c b/fs/ocfs2/dlm/dlmmaster.c
index 46b8b2bbc95a..ee5aa4daaea0 100644
--- a/fs/ocfs2/dlm/dlmmaster.c
+++ b/fs/ocfs2/dlm/dlmmaster.c
@@ -1439,6 +1439,7 @@ int dlm_master_request_handler(struct o2net_msg *msg, u32 len, void *data,
1439 int found, ret; 1439 int found, ret;
1440 int set_maybe; 1440 int set_maybe;
1441 int dispatch_assert = 0; 1441 int dispatch_assert = 0;
1442 int dispatched = 0;
1442 1443
1443 if (!dlm_grab(dlm)) 1444 if (!dlm_grab(dlm))
1444 return DLM_MASTER_RESP_NO; 1445 return DLM_MASTER_RESP_NO;
@@ -1658,15 +1659,18 @@ send_response:
1658 mlog(ML_ERROR, "failed to dispatch assert master work\n"); 1659 mlog(ML_ERROR, "failed to dispatch assert master work\n");
1659 response = DLM_MASTER_RESP_ERROR; 1660 response = DLM_MASTER_RESP_ERROR;
1660 dlm_lockres_put(res); 1661 dlm_lockres_put(res);
1661 } else 1662 } else {
1663 dispatched = 1;
1662 __dlm_lockres_grab_inflight_worker(dlm, res); 1664 __dlm_lockres_grab_inflight_worker(dlm, res);
1665 }
1663 spin_unlock(&res->spinlock); 1666 spin_unlock(&res->spinlock);
1664 } else { 1667 } else {
1665 if (res) 1668 if (res)
1666 dlm_lockres_put(res); 1669 dlm_lockres_put(res);
1667 } 1670 }
1668 1671
1669 dlm_put(dlm); 1672 if (!dispatched)
1673 dlm_put(dlm);
1670 return response; 1674 return response;
1671} 1675}
1672 1676
@@ -2090,7 +2094,6 @@ int dlm_dispatch_assert_master(struct dlm_ctxt *dlm,
2090 2094
2091 2095
2092 /* queue up work for dlm_assert_master_worker */ 2096 /* queue up work for dlm_assert_master_worker */
2093 dlm_grab(dlm); /* get an extra ref for the work item */
2094 dlm_init_work_item(dlm, item, dlm_assert_master_worker, NULL); 2097 dlm_init_work_item(dlm, item, dlm_assert_master_worker, NULL);
2095 item->u.am.lockres = res; /* already have a ref */ 2098 item->u.am.lockres = res; /* already have a ref */
2096 /* can optionally ignore node numbers higher than this node */ 2099 /* can optionally ignore node numbers higher than this node */
diff --git a/fs/ocfs2/dlm/dlmrecovery.c b/fs/ocfs2/dlm/dlmrecovery.c
index ce12e0b1a31f..3d90ad7ff91f 100644
--- a/fs/ocfs2/dlm/dlmrecovery.c
+++ b/fs/ocfs2/dlm/dlmrecovery.c
@@ -1694,6 +1694,7 @@ int dlm_master_requery_handler(struct o2net_msg *msg, u32 len, void *data,
1694 unsigned int hash; 1694 unsigned int hash;
1695 int master = DLM_LOCK_RES_OWNER_UNKNOWN; 1695 int master = DLM_LOCK_RES_OWNER_UNKNOWN;
1696 u32 flags = DLM_ASSERT_MASTER_REQUERY; 1696 u32 flags = DLM_ASSERT_MASTER_REQUERY;
1697 int dispatched = 0;
1697 1698
1698 if (!dlm_grab(dlm)) { 1699 if (!dlm_grab(dlm)) {
1699 /* since the domain has gone away on this 1700 /* since the domain has gone away on this
@@ -1719,8 +1720,10 @@ int dlm_master_requery_handler(struct o2net_msg *msg, u32 len, void *data,
1719 dlm_put(dlm); 1720 dlm_put(dlm);
1720 /* sender will take care of this and retry */ 1721 /* sender will take care of this and retry */
1721 return ret; 1722 return ret;
1722 } else 1723 } else {
1724 dispatched = 1;
1723 __dlm_lockres_grab_inflight_worker(dlm, res); 1725 __dlm_lockres_grab_inflight_worker(dlm, res);
1726 }
1724 spin_unlock(&res->spinlock); 1727 spin_unlock(&res->spinlock);
1725 } else { 1728 } else {
1726 /* put.. incase we are not the master */ 1729 /* put.. incase we are not the master */
@@ -1730,7 +1733,8 @@ int dlm_master_requery_handler(struct o2net_msg *msg, u32 len, void *data,
1730 } 1733 }
1731 spin_unlock(&dlm->spinlock); 1734 spin_unlock(&dlm->spinlock);
1732 1735
1733 dlm_put(dlm); 1736 if (!dispatched)
1737 dlm_put(dlm);
1734 return master; 1738 return master;
1735} 1739}
1736 1740
diff --git a/fs/ubifs/xattr.c b/fs/ubifs/xattr.c
index 96f3448b6eb4..fd65b3f1923c 100644
--- a/fs/ubifs/xattr.c
+++ b/fs/ubifs/xattr.c
@@ -652,11 +652,8 @@ int ubifs_init_security(struct inode *dentry, struct inode *inode,
652{ 652{
653 int err; 653 int err;
654 654
655 mutex_lock(&inode->i_mutex);
656 err = security_inode_init_security(inode, dentry, qstr, 655 err = security_inode_init_security(inode, dentry, qstr,
657 &init_xattrs, 0); 656 &init_xattrs, 0);
658 mutex_unlock(&inode->i_mutex);
659
660 if (err) { 657 if (err) {
661 struct ubifs_info *c = dentry->i_sb->s_fs_info; 658 struct ubifs_info *c = dentry->i_sb->s_fs_info;
662 ubifs_err(c, "cannot initialize security for inode %lu, error %d", 659 ubifs_err(c, "cannot initialize security for inode %lu, error %d",
diff --git a/fs/userfaultfd.c b/fs/userfaultfd.c
index 634e676072cb..50311703135b 100644
--- a/fs/userfaultfd.c
+++ b/fs/userfaultfd.c
@@ -467,8 +467,8 @@ static int userfaultfd_release(struct inode *inode, struct file *file)
467 * the fault_*wqh. 467 * the fault_*wqh.
468 */ 468 */
469 spin_lock(&ctx->fault_pending_wqh.lock); 469 spin_lock(&ctx->fault_pending_wqh.lock);
470 __wake_up_locked_key(&ctx->fault_pending_wqh, TASK_NORMAL, 0, &range); 470 __wake_up_locked_key(&ctx->fault_pending_wqh, TASK_NORMAL, &range);
471 __wake_up_locked_key(&ctx->fault_wqh, TASK_NORMAL, 0, &range); 471 __wake_up_locked_key(&ctx->fault_wqh, TASK_NORMAL, &range);
472 spin_unlock(&ctx->fault_pending_wqh.lock); 472 spin_unlock(&ctx->fault_pending_wqh.lock);
473 473
474 wake_up_poll(&ctx->fd_wqh, POLLHUP); 474 wake_up_poll(&ctx->fd_wqh, POLLHUP);
@@ -650,10 +650,10 @@ static void __wake_userfault(struct userfaultfd_ctx *ctx,
650 spin_lock(&ctx->fault_pending_wqh.lock); 650 spin_lock(&ctx->fault_pending_wqh.lock);
651 /* wake all in the range and autoremove */ 651 /* wake all in the range and autoremove */
652 if (waitqueue_active(&ctx->fault_pending_wqh)) 652 if (waitqueue_active(&ctx->fault_pending_wqh))
653 __wake_up_locked_key(&ctx->fault_pending_wqh, TASK_NORMAL, 0, 653 __wake_up_locked_key(&ctx->fault_pending_wqh, TASK_NORMAL,
654 range); 654 range);
655 if (waitqueue_active(&ctx->fault_wqh)) 655 if (waitqueue_active(&ctx->fault_wqh))
656 __wake_up_locked_key(&ctx->fault_wqh, TASK_NORMAL, 0, range); 656 __wake_up_locked_key(&ctx->fault_wqh, TASK_NORMAL, range);
657 spin_unlock(&ctx->fault_pending_wqh.lock); 657 spin_unlock(&ctx->fault_pending_wqh.lock);
658} 658}
659 659
@@ -1287,8 +1287,10 @@ static struct file *userfaultfd_file_create(int flags)
1287 1287
1288 file = anon_inode_getfile("[userfaultfd]", &userfaultfd_fops, ctx, 1288 file = anon_inode_getfile("[userfaultfd]", &userfaultfd_fops, ctx,
1289 O_RDWR | (flags & UFFD_SHARED_FCNTL_FLAGS)); 1289 O_RDWR | (flags & UFFD_SHARED_FCNTL_FLAGS));
1290 if (IS_ERR(file)) 1290 if (IS_ERR(file)) {
1291 mmput(ctx->mm);
1291 kmem_cache_free(userfaultfd_ctx_cachep, ctx); 1292 kmem_cache_free(userfaultfd_ctx_cachep, ctx);
1293 }
1292out: 1294out:
1293 return file; 1295 return file;
1294} 1296}
diff --git a/include/acpi/button.h b/include/acpi/button.h
index 97eea0e4c016..1cad8b2d460c 100644
--- a/include/acpi/button.h
+++ b/include/acpi/button.h
@@ -3,7 +3,7 @@
3 3
4#include <linux/notifier.h> 4#include <linux/notifier.h>
5 5
6#if defined(CONFIG_ACPI_BUTTON) || defined(CONFIG_ACPI_BUTTON_MODULE) 6#if IS_ENABLED(CONFIG_ACPI_BUTTON)
7extern int acpi_lid_notifier_register(struct notifier_block *nb); 7extern int acpi_lid_notifier_register(struct notifier_block *nb);
8extern int acpi_lid_notifier_unregister(struct notifier_block *nb); 8extern int acpi_lid_notifier_unregister(struct notifier_block *nb);
9extern int acpi_lid_open(void); 9extern int acpi_lid_open(void);
@@ -20,6 +20,6 @@ static inline int acpi_lid_open(void)
20{ 20{
21 return 1; 21 return 1;
22} 22}
23#endif /* defined(CONFIG_ACPI_BUTTON) || defined(CONFIG_ACPI_BUTTON_MODULE) */ 23#endif /* IS_ENABLED(CONFIG_ACPI_BUTTON) */
24 24
25#endif /* ACPI_BUTTON_H */ 25#endif /* ACPI_BUTTON_H */
diff --git a/include/acpi/video.h b/include/acpi/video.h
index e840b294c6f5..c62392d9b52a 100644
--- a/include/acpi/video.h
+++ b/include/acpi/video.h
@@ -24,7 +24,7 @@ enum acpi_backlight_type {
24 acpi_backlight_native, 24 acpi_backlight_native,
25}; 25};
26 26
27#if (defined CONFIG_ACPI_VIDEO || defined CONFIG_ACPI_VIDEO_MODULE) 27#if IS_ENABLED(CONFIG_ACPI_VIDEO)
28extern int acpi_video_register(void); 28extern int acpi_video_register(void);
29extern void acpi_video_unregister(void); 29extern void acpi_video_unregister(void);
30extern int acpi_video_get_edid(struct acpi_device *device, int type, 30extern int acpi_video_get_edid(struct acpi_device *device, int type,
diff --git a/include/asm-generic/memory_model.h b/include/asm-generic/memory_model.h
index f20f407ce45d..4b4b056a6eb0 100644
--- a/include/asm-generic/memory_model.h
+++ b/include/asm-generic/memory_model.h
@@ -73,7 +73,7 @@
73 * Convert a physical address to a Page Frame Number and back 73 * Convert a physical address to a Page Frame Number and back
74 */ 74 */
75#define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT)) 75#define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT))
76#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) 76#define __pfn_to_phys(pfn) PFN_PHYS(pfn)
77 77
78#define page_to_pfn __page_to_pfn 78#define page_to_pfn __page_to_pfn
79#define pfn_to_page __pfn_to_page 79#define pfn_to_page __pfn_to_page
diff --git a/include/asm-generic/qspinlock.h b/include/asm-generic/qspinlock.h
index 83bfb87f5bf1..e2aadbc7151f 100644
--- a/include/asm-generic/qspinlock.h
+++ b/include/asm-generic/qspinlock.h
@@ -111,8 +111,8 @@ static inline void queued_spin_unlock_wait(struct qspinlock *lock)
111 cpu_relax(); 111 cpu_relax();
112} 112}
113 113
114#ifndef virt_queued_spin_lock 114#ifndef virt_spin_lock
115static __always_inline bool virt_queued_spin_lock(struct qspinlock *lock) 115static __always_inline bool virt_spin_lock(struct qspinlock *lock)
116{ 116{
117 return false; 117 return false;
118} 118}
diff --git a/include/asm-generic/word-at-a-time.h b/include/asm-generic/word-at-a-time.h
index 94f9ea8abcae..011dde083f23 100644
--- a/include/asm-generic/word-at-a-time.h
+++ b/include/asm-generic/word-at-a-time.h
@@ -1,15 +1,10 @@
1#ifndef _ASM_WORD_AT_A_TIME_H 1#ifndef _ASM_WORD_AT_A_TIME_H
2#define _ASM_WORD_AT_A_TIME_H 2#define _ASM_WORD_AT_A_TIME_H
3 3
4/*
5 * This says "generic", but it's actually big-endian only.
6 * Little-endian can use more efficient versions of these
7 * interfaces, see for example
8 * arch/x86/include/asm/word-at-a-time.h
9 * for those.
10 */
11
12#include <linux/kernel.h> 4#include <linux/kernel.h>
5#include <asm/byteorder.h>
6
7#ifdef __BIG_ENDIAN
13 8
14struct word_at_a_time { 9struct word_at_a_time {
15 const unsigned long high_bits, low_bits; 10 const unsigned long high_bits, low_bits;
@@ -53,4 +48,73 @@ static inline bool has_zero(unsigned long val, unsigned long *data, const struct
53#define zero_bytemask(mask) (~1ul << __fls(mask)) 48#define zero_bytemask(mask) (~1ul << __fls(mask))
54#endif 49#endif
55 50
51#else
52
53/*
54 * The optimal byte mask counting is probably going to be something
55 * that is architecture-specific. If you have a reliably fast
56 * bit count instruction, that might be better than the multiply
57 * and shift, for example.
58 */
59struct word_at_a_time {
60 const unsigned long one_bits, high_bits;
61};
62
63#define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0x01), REPEAT_BYTE(0x80) }
64
65#ifdef CONFIG_64BIT
66
67/*
68 * Jan Achrenius on G+: microoptimized version of
69 * the simpler "(mask & ONEBYTES) * ONEBYTES >> 56"
70 * that works for the bytemasks without having to
71 * mask them first.
72 */
73static inline long count_masked_bytes(unsigned long mask)
74{
75 return mask*0x0001020304050608ul >> 56;
76}
77
78#else /* 32-bit case */
79
80/* Carl Chatfield / Jan Achrenius G+ version for 32-bit */
81static inline long count_masked_bytes(long mask)
82{
83 /* (000000 0000ff 00ffff ffffff) -> ( 1 1 2 3 ) */
84 long a = (0x0ff0001+mask) >> 23;
85 /* Fix the 1 for 00 case */
86 return a & mask;
87}
88
89#endif
90
91/* Return nonzero if it has a zero */
92static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
93{
94 unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits;
95 *bits = mask;
96 return mask;
97}
98
99static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
100{
101 return bits;
102}
103
104static inline unsigned long create_zero_mask(unsigned long bits)
105{
106 bits = (bits - 1) & ~bits;
107 return bits >> 7;
108}
109
110/* The mask we created is directly usable as a bytemask */
111#define zero_bytemask(mask) (mask)
112
113static inline unsigned long find_zero(unsigned long mask)
114{
115 return count_masked_bytes(mask);
116}
117
118#endif /* __BIG_ENDIAN */
119
56#endif /* _ASM_WORD_AT_A_TIME_H */ 120#endif /* _ASM_WORD_AT_A_TIME_H */
diff --git a/include/drm/drm_crtc_helper.h b/include/drm/drm_crtc_helper.h
index 2a747a91fded..3febb4b9fce9 100644
--- a/include/drm/drm_crtc_helper.h
+++ b/include/drm/drm_crtc_helper.h
@@ -240,5 +240,6 @@ extern void drm_kms_helper_hotplug_event(struct drm_device *dev);
240 240
241extern void drm_kms_helper_poll_disable(struct drm_device *dev); 241extern void drm_kms_helper_poll_disable(struct drm_device *dev);
242extern void drm_kms_helper_poll_enable(struct drm_device *dev); 242extern void drm_kms_helper_poll_enable(struct drm_device *dev);
243extern void drm_kms_helper_poll_enable_locked(struct drm_device *dev);
243 244
244#endif 245#endif
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 499e9f625aef..0212d139a480 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -568,6 +568,10 @@
568#define MODE_I2C_READ 4 568#define MODE_I2C_READ 4
569#define MODE_I2C_STOP 8 569#define MODE_I2C_STOP 8
570 570
571/* DP 1.2 MST PORTs - Section 2.5.1 v1.2a spec */
572#define DP_MST_PHYSICAL_PORT_0 0
573#define DP_MST_LOGICAL_PORT_0 8
574
571#define DP_LINK_STATUS_SIZE 6 575#define DP_LINK_STATUS_SIZE 6
572bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], 576bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
573 int lane_count); 577 int lane_count);
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 86d0b25ed054..0f408b002d98 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -374,6 +374,7 @@ struct drm_dp_mst_topology_mgr;
374struct drm_dp_mst_topology_cbs { 374struct drm_dp_mst_topology_cbs {
375 /* create a connector for a port */ 375 /* create a connector for a port */
376 struct drm_connector *(*add_connector)(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *path); 376 struct drm_connector *(*add_connector)(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *path);
377 void (*register_connector)(struct drm_connector *connector);
377 void (*destroy_connector)(struct drm_dp_mst_topology_mgr *mgr, 378 void (*destroy_connector)(struct drm_dp_mst_topology_mgr *mgr,
378 struct drm_connector *connector); 379 struct drm_connector *connector);
379 void (*hotplug)(struct drm_dp_mst_topology_mgr *mgr); 380 void (*hotplug)(struct drm_dp_mst_topology_mgr *mgr);
diff --git a/include/dt-bindings/clock/berlin2q.h b/include/dt-bindings/clock/berlin2q.h
index 287fc3b4afb2..72eaf91c9ca6 100644
--- a/include/dt-bindings/clock/berlin2q.h
+++ b/include/dt-bindings/clock/berlin2q.h
@@ -29,3 +29,4 @@
29#define CLKID_SMEMC 24 29#define CLKID_SMEMC 24
30#define CLKID_PCIE 25 30#define CLKID_PCIE 25
31#define CLKID_TWD 26 31#define CLKID_TWD 26
32#define CLKID_CPU 27
diff --git a/include/dt-bindings/clock/exynos5250.h b/include/dt-bindings/clock/exynos5250.h
index 8183d1c237d9..15508adcdfde 100644
--- a/include/dt-bindings/clock/exynos5250.h
+++ b/include/dt-bindings/clock/exynos5250.h
@@ -173,8 +173,10 @@
173/* mux clocks */ 173/* mux clocks */
174#define CLK_MOUT_HDMI 1024 174#define CLK_MOUT_HDMI 1024
175#define CLK_MOUT_GPLL 1025 175#define CLK_MOUT_GPLL 1025
176#define CLK_MOUT_ACLK200_DISP1_SUB 1026
177#define CLK_MOUT_ACLK300_DISP1_SUB 1027
176 178
177/* must be greater than maximal clock id */ 179/* must be greater than maximal clock id */
178#define CLK_NR_CLKS 1026 180#define CLK_NR_CLKS 1028
179 181
180#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5250_H */ 182#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5250_H */
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
index 8de173ff19f3..77985cc43316 100644
--- a/include/dt-bindings/clock/imx6qdl-clock.h
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -254,6 +254,7 @@
254#define IMX6QDL_CLK_CAAM_MEM 241 254#define IMX6QDL_CLK_CAAM_MEM 241
255#define IMX6QDL_CLK_CAAM_ACLK 242 255#define IMX6QDL_CLK_CAAM_ACLK 242
256#define IMX6QDL_CLK_CAAM_IPG 243 256#define IMX6QDL_CLK_CAAM_IPG 243
257#define IMX6QDL_CLK_END 244 257#define IMX6QDL_CLK_SPDIF_GCLK 244
258#define IMX6QDL_CLK_END 245
258 259
259#endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */ 260#endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */
diff --git a/include/dt-bindings/clock/imx6sl-clock.h b/include/dt-bindings/clock/imx6sl-clock.h
index 9ce4e421096f..e14573e293c5 100644
--- a/include/dt-bindings/clock/imx6sl-clock.h
+++ b/include/dt-bindings/clock/imx6sl-clock.h
@@ -174,6 +174,7 @@
174#define IMX6SL_CLK_SSI1_IPG 161 174#define IMX6SL_CLK_SSI1_IPG 161
175#define IMX6SL_CLK_SSI2_IPG 162 175#define IMX6SL_CLK_SSI2_IPG 162
176#define IMX6SL_CLK_SSI3_IPG 163 176#define IMX6SL_CLK_SSI3_IPG 163
177#define IMX6SL_CLK_END 164 177#define IMX6SL_CLK_SPDIF_GCLK 164
178#define IMX6SL_CLK_END 165
178 179
179#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */ 180#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */
diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h
index 995709119ec5..36f0324902a5 100644
--- a/include/dt-bindings/clock/imx6sx-clock.h
+++ b/include/dt-bindings/clock/imx6sx-clock.h
@@ -274,6 +274,7 @@
274#define IMX6SX_PLL5_BYPASS 261 274#define IMX6SX_PLL5_BYPASS 261
275#define IMX6SX_PLL6_BYPASS 262 275#define IMX6SX_PLL6_BYPASS 262
276#define IMX6SX_PLL7_BYPASS 263 276#define IMX6SX_PLL7_BYPASS 263
277#define IMX6SX_CLK_CLK_END 264 277#define IMX6SX_CLK_SPDIF_GCLK 264
278#define IMX6SX_CLK_CLK_END 265
278 279
279#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */ 280#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
diff --git a/include/dt-bindings/clock/imx7d-clock.h b/include/dt-bindings/clock/imx7d-clock.h
index 728df28b00d5..a4a7a9ce3457 100644
--- a/include/dt-bindings/clock/imx7d-clock.h
+++ b/include/dt-bindings/clock/imx7d-clock.h
@@ -446,5 +446,6 @@
446#define IMX7D_MU_ROOT_CLK 433 446#define IMX7D_MU_ROOT_CLK 433
447#define IMX7D_SEMA4_HS_ROOT_CLK 434 447#define IMX7D_SEMA4_HS_ROOT_CLK 434
448#define IMX7D_PLL_DRAM_TEST_DIV 435 448#define IMX7D_PLL_DRAM_TEST_DIV 435
449#define IMX7D_CLK_END 436 449#define IMX7D_ADC_ROOT_CLK 436
450#define IMX7D_CLK_END 437
450#endif /* __DT_BINDINGS_CLOCK_IMX7D_H */ 451#endif /* __DT_BINDINGS_CLOCK_IMX7D_H */
diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h
index d19763439472..56c16aaea112 100644
--- a/include/dt-bindings/clock/vf610-clock.h
+++ b/include/dt-bindings/clock/vf610-clock.h
@@ -194,6 +194,7 @@
194#define VF610_PLL7_BYPASS 181 194#define VF610_PLL7_BYPASS 181
195#define VF610_CLK_SNVS 182 195#define VF610_CLK_SNVS 182
196#define VF610_CLK_DAP 183 196#define VF610_CLK_DAP 183
197#define VF610_CLK_END 184 197#define VF610_CLK_OCOTP 184
198#define VF610_CLK_END 185
198 199
199#endif /* __DT_BINDINGS_CLOCK_VF610_H */ 200#endif /* __DT_BINDINGS_CLOCK_VF610_H */
diff --git a/include/dt-bindings/power/rk3288-power.h b/include/dt-bindings/power/rk3288-power.h
new file mode 100644
index 000000000000..b8b1045f3daa
--- /dev/null
+++ b/include/dt-bindings/power/rk3288-power.h
@@ -0,0 +1,31 @@
1#ifndef __DT_BINDINGS_POWER_RK3288_POWER_H__
2#define __DT_BINDINGS_POWER_RK3288_POWER_H__
3
4/**
5 * RK3288 Power Domain and Voltage Domain Summary.
6 */
7
8/* VD_CORE */
9#define RK3288_PD_A17_0 0
10#define RK3288_PD_A17_1 1
11#define RK3288_PD_A17_2 2
12#define RK3288_PD_A17_3 3
13#define RK3288_PD_SCU 4
14#define RK3288_PD_DEBUG 5
15#define RK3288_PD_MEM 6
16
17/* VD_LOGIC */
18#define RK3288_PD_BUS 7
19#define RK3288_PD_PERI 8
20#define RK3288_PD_VIO 9
21#define RK3288_PD_ALIVE 10
22#define RK3288_PD_HEVC 11
23#define RK3288_PD_VIDEO 12
24
25/* VD_GPU */
26#define RK3288_PD_GPU 13
27
28/* VD_PMU */
29#define RK3288_PD_PMU 14
30
31#endif
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index d901f1a47be6..4e14dac282bb 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -35,11 +35,7 @@
35#define VGIC_V3_MAX_LRS 16 35#define VGIC_V3_MAX_LRS 16
36#define VGIC_MAX_IRQS 1024 36#define VGIC_MAX_IRQS 1024
37#define VGIC_V2_MAX_CPUS 8 37#define VGIC_V2_MAX_CPUS 8
38 38#define VGIC_V3_MAX_CPUS 255
39/* Sanity checks... */
40#if (KVM_MAX_VCPUS > 255)
41#error Too many KVM VCPUs, the VGIC only supports up to 255 VCPUs for now
42#endif
43 39
44#if (VGIC_NR_IRQS_LEGACY & 31) 40#if (VGIC_NR_IRQS_LEGACY & 31)
45#error "VGIC_NR_IRQS must be a multiple of 32" 41#error "VGIC_NR_IRQS must be a multiple of 32"
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 7235c4851460..43856d19cf4d 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -217,6 +217,7 @@ struct pci_dev;
217 217
218int acpi_pci_irq_enable (struct pci_dev *dev); 218int acpi_pci_irq_enable (struct pci_dev *dev);
219void acpi_penalize_isa_irq(int irq, int active); 219void acpi_penalize_isa_irq(int irq, int active);
220bool acpi_isa_irq_available(int irq);
220void acpi_penalize_sci_irq(int irq, int trigger, int polarity); 221void acpi_penalize_sci_irq(int irq, int trigger, int polarity);
221void acpi_pci_irq_disable (struct pci_dev *dev); 222void acpi_pci_irq_disable (struct pci_dev *dev);
222 223
diff --git a/include/linux/backing-dev.h b/include/linux/backing-dev.h
index 5a5d79ee256f..d5eb4ad1c534 100644
--- a/include/linux/backing-dev.h
+++ b/include/linux/backing-dev.h
@@ -13,6 +13,7 @@
13#include <linux/sched.h> 13#include <linux/sched.h>
14#include <linux/blkdev.h> 14#include <linux/blkdev.h>
15#include <linux/writeback.h> 15#include <linux/writeback.h>
16#include <linux/memcontrol.h>
16#include <linux/blk-cgroup.h> 17#include <linux/blk-cgroup.h>
17#include <linux/backing-dev-defs.h> 18#include <linux/backing-dev-defs.h>
18#include <linux/slab.h> 19#include <linux/slab.h>
@@ -252,13 +253,19 @@ int inode_congested(struct inode *inode, int cong_bits);
252 * @inode: inode of interest 253 * @inode: inode of interest
253 * 254 *
254 * cgroup writeback requires support from both the bdi and filesystem. 255 * cgroup writeback requires support from both the bdi and filesystem.
255 * Test whether @inode has both. 256 * Also, both memcg and iocg have to be on the default hierarchy. Test
257 * whether all conditions are met.
258 *
259 * Note that the test result may change dynamically on the same inode
260 * depending on how memcg and iocg are configured.
256 */ 261 */
257static inline bool inode_cgwb_enabled(struct inode *inode) 262static inline bool inode_cgwb_enabled(struct inode *inode)
258{ 263{
259 struct backing_dev_info *bdi = inode_to_bdi(inode); 264 struct backing_dev_info *bdi = inode_to_bdi(inode);
260 265
261 return bdi_cap_account_dirty(bdi) && 266 return cgroup_on_dfl(mem_cgroup_root_css->cgroup) &&
267 cgroup_on_dfl(blkcg_root_css->cgroup) &&
268 bdi_cap_account_dirty(bdi) &&
262 (bdi->capabilities & BDI_CAP_CGROUP_WRITEBACK) && 269 (bdi->capabilities & BDI_CAP_CGROUP_WRITEBACK) &&
263 (inode->i_sb->s_iflags & SB_I_CGROUPWB); 270 (inode->i_sb->s_iflags & SB_I_CGROUPWB);
264} 271}
diff --git a/include/linux/blk-mq.h b/include/linux/blk-mq.h
index 37d1602c4f7a..5e7d43ab61c0 100644
--- a/include/linux/blk-mq.h
+++ b/include/linux/blk-mq.h
@@ -145,7 +145,6 @@ enum {
145 BLK_MQ_F_SHOULD_MERGE = 1 << 0, 145 BLK_MQ_F_SHOULD_MERGE = 1 << 0,
146 BLK_MQ_F_TAG_SHARED = 1 << 1, 146 BLK_MQ_F_TAG_SHARED = 1 << 1,
147 BLK_MQ_F_SG_MERGE = 1 << 2, 147 BLK_MQ_F_SG_MERGE = 1 << 2,
148 BLK_MQ_F_SYSFS_UP = 1 << 3,
149 BLK_MQ_F_DEFER_ISSUE = 1 << 4, 148 BLK_MQ_F_DEFER_ISSUE = 1 << 4,
150 BLK_MQ_F_ALLOC_POLICY_START_BIT = 8, 149 BLK_MQ_F_ALLOC_POLICY_START_BIT = 8,
151 BLK_MQ_F_ALLOC_POLICY_BITS = 1, 150 BLK_MQ_F_ALLOC_POLICY_BITS = 1,
@@ -215,7 +214,7 @@ void blk_mq_add_to_requeue_list(struct request *rq, bool at_head);
215void blk_mq_cancel_requeue_work(struct request_queue *q); 214void blk_mq_cancel_requeue_work(struct request_queue *q);
216void blk_mq_kick_requeue_list(struct request_queue *q); 215void blk_mq_kick_requeue_list(struct request_queue *q);
217void blk_mq_abort_requeue_list(struct request_queue *q); 216void blk_mq_abort_requeue_list(struct request_queue *q);
218void blk_mq_complete_request(struct request *rq); 217void blk_mq_complete_request(struct request *rq, int error);
219 218
220void blk_mq_stop_hw_queue(struct blk_mq_hw_ctx *hctx); 219void blk_mq_stop_hw_queue(struct blk_mq_hw_ctx *hctx);
221void blk_mq_start_hw_queue(struct blk_mq_hw_ctx *hctx); 220void blk_mq_start_hw_queue(struct blk_mq_hw_ctx *hctx);
@@ -224,8 +223,6 @@ void blk_mq_start_hw_queues(struct request_queue *q);
224void blk_mq_start_stopped_hw_queues(struct request_queue *q, bool async); 223void blk_mq_start_stopped_hw_queues(struct request_queue *q, bool async);
225void blk_mq_run_hw_queues(struct request_queue *q, bool async); 224void blk_mq_run_hw_queues(struct request_queue *q, bool async);
226void blk_mq_delay_queue(struct blk_mq_hw_ctx *hctx, unsigned long msecs); 225void blk_mq_delay_queue(struct blk_mq_hw_ctx *hctx, unsigned long msecs);
227void blk_mq_tag_busy_iter(struct blk_mq_hw_ctx *hctx, busy_iter_fn *fn,
228 void *priv);
229void blk_mq_all_tag_busy_iter(struct blk_mq_tags *tags, busy_tag_iter_fn *fn, 226void blk_mq_all_tag_busy_iter(struct blk_mq_tags *tags, busy_tag_iter_fn *fn,
230 void *priv); 227 void *priv);
231void blk_mq_freeze_queue(struct request_queue *q); 228void blk_mq_freeze_queue(struct request_queue *q);
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 38a5ff772a37..19c2e947d4d1 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -456,6 +456,8 @@ struct request_queue {
456 struct blk_mq_tag_set *tag_set; 456 struct blk_mq_tag_set *tag_set;
457 struct list_head tag_set_list; 457 struct list_head tag_set_list;
458 struct bio_set *bio_split; 458 struct bio_set *bio_split;
459
460 bool mq_sysfs_init_done;
459}; 461};
460 462
461#define QUEUE_FLAG_QUEUED 1 /* uses generic tag queueing */ 463#define QUEUE_FLAG_QUEUED 1 /* uses generic tag queueing */
@@ -1368,6 +1370,26 @@ static inline bool bvec_gap_to_prev(struct request_queue *q,
1368 ((bprv->bv_offset + bprv->bv_len) & queue_virt_boundary(q)); 1370 ((bprv->bv_offset + bprv->bv_len) & queue_virt_boundary(q));
1369} 1371}
1370 1372
1373static inline bool bio_will_gap(struct request_queue *q, struct bio *prev,
1374 struct bio *next)
1375{
1376 if (!bio_has_data(prev))
1377 return false;
1378
1379 return bvec_gap_to_prev(q, &prev->bi_io_vec[prev->bi_vcnt - 1],
1380 next->bi_io_vec[0].bv_offset);
1381}
1382
1383static inline bool req_gap_back_merge(struct request *req, struct bio *bio)
1384{
1385 return bio_will_gap(req->q, req->biotail, bio);
1386}
1387
1388static inline bool req_gap_front_merge(struct request *req, struct bio *bio)
1389{
1390 return bio_will_gap(req->q, bio, req->bio);
1391}
1392
1371struct work_struct; 1393struct work_struct;
1372int kblockd_schedule_work(struct work_struct *work); 1394int kblockd_schedule_work(struct work_struct *work);
1373int kblockd_schedule_delayed_work(struct delayed_work *dwork, unsigned long delay); 1395int kblockd_schedule_delayed_work(struct delayed_work *dwork, unsigned long delay);
@@ -1494,6 +1516,26 @@ queue_max_integrity_segments(struct request_queue *q)
1494 return q->limits.max_integrity_segments; 1516 return q->limits.max_integrity_segments;
1495} 1517}
1496 1518
1519static inline bool integrity_req_gap_back_merge(struct request *req,
1520 struct bio *next)
1521{
1522 struct bio_integrity_payload *bip = bio_integrity(req->bio);
1523 struct bio_integrity_payload *bip_next = bio_integrity(next);
1524
1525 return bvec_gap_to_prev(req->q, &bip->bip_vec[bip->bip_vcnt - 1],
1526 bip_next->bip_vec[0].bv_offset);
1527}
1528
1529static inline bool integrity_req_gap_front_merge(struct request *req,
1530 struct bio *bio)
1531{
1532 struct bio_integrity_payload *bip = bio_integrity(bio);
1533 struct bio_integrity_payload *bip_next = bio_integrity(req->bio);
1534
1535 return bvec_gap_to_prev(req->q, &bip->bip_vec[bip->bip_vcnt - 1],
1536 bip_next->bip_vec[0].bv_offset);
1537}
1538
1497#else /* CONFIG_BLK_DEV_INTEGRITY */ 1539#else /* CONFIG_BLK_DEV_INTEGRITY */
1498 1540
1499struct bio; 1541struct bio;
@@ -1560,6 +1602,16 @@ static inline bool blk_integrity_is_initialized(struct gendisk *g)
1560{ 1602{
1561 return 0; 1603 return 0;
1562} 1604}
1605static inline bool integrity_req_gap_back_merge(struct request *req,
1606 struct bio *next)
1607{
1608 return false;
1609}
1610static inline bool integrity_req_gap_front_merge(struct request *req,
1611 struct bio *bio)
1612{
1613 return false;
1614}
1563 1615
1564#endif /* CONFIG_BLK_DEV_INTEGRITY */ 1616#endif /* CONFIG_BLK_DEV_INTEGRITY */
1565 1617
diff --git a/include/linux/ceph/ceph_features.h b/include/linux/ceph/ceph_features.h
index 4763ad64e832..f89b31d45cc8 100644
--- a/include/linux/ceph/ceph_features.h
+++ b/include/linux/ceph/ceph_features.h
@@ -107,6 +107,7 @@ static inline u64 ceph_sanitize_features(u64 features)
107 CEPH_FEATURE_OSDMAP_ENC | \ 107 CEPH_FEATURE_OSDMAP_ENC | \
108 CEPH_FEATURE_CRUSH_TUNABLES3 | \ 108 CEPH_FEATURE_CRUSH_TUNABLES3 | \
109 CEPH_FEATURE_OSD_PRIMARY_AFFINITY | \ 109 CEPH_FEATURE_OSD_PRIMARY_AFFINITY | \
110 CEPH_FEATURE_MSGR_KEEPALIVE2 | \
110 CEPH_FEATURE_CRUSH_V4) 111 CEPH_FEATURE_CRUSH_V4)
111 112
112#define CEPH_FEATURES_REQUIRED_DEFAULT \ 113#define CEPH_FEATURES_REQUIRED_DEFAULT \
diff --git a/include/linux/ceph/messenger.h b/include/linux/ceph/messenger.h
index 7e1252e97a30..b2371d9b51fa 100644
--- a/include/linux/ceph/messenger.h
+++ b/include/linux/ceph/messenger.h
@@ -238,6 +238,8 @@ struct ceph_connection {
238 bool out_kvec_is_msg; /* kvec refers to out_msg */ 238 bool out_kvec_is_msg; /* kvec refers to out_msg */
239 int out_more; /* there is more data after the kvecs */ 239 int out_more; /* there is more data after the kvecs */
240 __le64 out_temp_ack; /* for writing an ack */ 240 __le64 out_temp_ack; /* for writing an ack */
241 struct ceph_timespec out_temp_keepalive2; /* for writing keepalive2
242 stamp */
241 243
242 /* message in temps */ 244 /* message in temps */
243 struct ceph_msg_header in_hdr; 245 struct ceph_msg_header in_hdr;
@@ -248,7 +250,7 @@ struct ceph_connection {
248 int in_base_pos; /* bytes read */ 250 int in_base_pos; /* bytes read */
249 __le64 in_temp_ack; /* for reading an ack */ 251 __le64 in_temp_ack; /* for reading an ack */
250 252
251 struct timespec last_keepalive_ack; 253 struct timespec last_keepalive_ack; /* keepalive2 ack stamp */
252 254
253 struct delayed_work work; /* send|recv work */ 255 struct delayed_work work; /* send|recv work */
254 unsigned long delay; /* current delay interval */ 256 unsigned long delay; /* current delay interval */
diff --git a/include/linux/cgroup-defs.h b/include/linux/cgroup-defs.h
index 4d8fcf2187dc..8492721b39be 100644
--- a/include/linux/cgroup-defs.h
+++ b/include/linux/cgroup-defs.h
@@ -473,31 +473,8 @@ struct cgroup_subsys {
473 unsigned int depends_on; 473 unsigned int depends_on;
474}; 474};
475 475
476extern struct percpu_rw_semaphore cgroup_threadgroup_rwsem; 476void cgroup_threadgroup_change_begin(struct task_struct *tsk);
477 477void cgroup_threadgroup_change_end(struct task_struct *tsk);
478/**
479 * cgroup_threadgroup_change_begin - threadgroup exclusion for cgroups
480 * @tsk: target task
481 *
482 * Called from threadgroup_change_begin() and allows cgroup operations to
483 * synchronize against threadgroup changes using a percpu_rw_semaphore.
484 */
485static inline void cgroup_threadgroup_change_begin(struct task_struct *tsk)
486{
487 percpu_down_read(&cgroup_threadgroup_rwsem);
488}
489
490/**
491 * cgroup_threadgroup_change_end - threadgroup exclusion for cgroups
492 * @tsk: target task
493 *
494 * Called from threadgroup_change_end(). Counterpart of
495 * cgroup_threadcgroup_change_begin().
496 */
497static inline void cgroup_threadgroup_change_end(struct task_struct *tsk)
498{
499 percpu_up_read(&cgroup_threadgroup_rwsem);
500}
501 478
502#else /* CONFIG_CGROUPS */ 479#else /* CONFIG_CGROUPS */
503 480
diff --git a/include/linux/clockchips.h b/include/linux/clockchips.h
index 31ce435981fe..bdcf358dfce2 100644
--- a/include/linux/clockchips.h
+++ b/include/linux/clockchips.h
@@ -18,15 +18,6 @@
18struct clock_event_device; 18struct clock_event_device;
19struct module; 19struct module;
20 20
21/* Clock event mode commands for legacy ->set_mode(): OBSOLETE */
22enum clock_event_mode {
23 CLOCK_EVT_MODE_UNUSED,
24 CLOCK_EVT_MODE_SHUTDOWN,
25 CLOCK_EVT_MODE_PERIODIC,
26 CLOCK_EVT_MODE_ONESHOT,
27 CLOCK_EVT_MODE_RESUME,
28};
29
30/* 21/*
31 * Possible states of a clock event device. 22 * Possible states of a clock event device.
32 * 23 *
@@ -86,16 +77,14 @@ enum clock_event_state {
86 * @min_delta_ns: minimum delta value in ns 77 * @min_delta_ns: minimum delta value in ns
87 * @mult: nanosecond to cycles multiplier 78 * @mult: nanosecond to cycles multiplier
88 * @shift: nanoseconds to cycles divisor (power of two) 79 * @shift: nanoseconds to cycles divisor (power of two)
89 * @mode: operating mode, relevant only to ->set_mode(), OBSOLETE
90 * @state_use_accessors:current state of the device, assigned by the core code 80 * @state_use_accessors:current state of the device, assigned by the core code
91 * @features: features 81 * @features: features
92 * @retries: number of forced programming retries 82 * @retries: number of forced programming retries
93 * @set_mode: legacy set mode function, only for modes <= CLOCK_EVT_MODE_RESUME. 83 * @set_state_periodic: switch state to periodic
94 * @set_state_periodic: switch state to periodic, if !set_mode 84 * @set_state_oneshot: switch state to oneshot
95 * @set_state_oneshot: switch state to oneshot, if !set_mode 85 * @set_state_oneshot_stopped: switch state to oneshot_stopped
96 * @set_state_oneshot_stopped: switch state to oneshot_stopped, if !set_mode 86 * @set_state_shutdown: switch state to shutdown
97 * @set_state_shutdown: switch state to shutdown, if !set_mode 87 * @tick_resume: resume clkevt device
98 * @tick_resume: resume clkevt device, if !set_mode
99 * @broadcast: function to broadcast events 88 * @broadcast: function to broadcast events
100 * @min_delta_ticks: minimum delta value in ticks stored for reconfiguration 89 * @min_delta_ticks: minimum delta value in ticks stored for reconfiguration
101 * @max_delta_ticks: maximum delta value in ticks stored for reconfiguration 90 * @max_delta_ticks: maximum delta value in ticks stored for reconfiguration
@@ -116,18 +105,10 @@ struct clock_event_device {
116 u64 min_delta_ns; 105 u64 min_delta_ns;
117 u32 mult; 106 u32 mult;
118 u32 shift; 107 u32 shift;
119 enum clock_event_mode mode;
120 enum clock_event_state state_use_accessors; 108 enum clock_event_state state_use_accessors;
121 unsigned int features; 109 unsigned int features;
122 unsigned long retries; 110 unsigned long retries;
123 111
124 /*
125 * State transition callback(s): Only one of the two groups should be
126 * defined:
127 * - set_mode(), only for modes <= CLOCK_EVT_MODE_RESUME.
128 * - set_state_{shutdown|periodic|oneshot|oneshot_stopped}(), tick_resume().
129 */
130 void (*set_mode)(enum clock_event_mode mode, struct clock_event_device *);
131 int (*set_state_periodic)(struct clock_event_device *); 112 int (*set_state_periodic)(struct clock_event_device *);
132 int (*set_state_oneshot)(struct clock_event_device *); 113 int (*set_state_oneshot)(struct clock_event_device *);
133 int (*set_state_oneshot_stopped)(struct clock_event_device *); 114 int (*set_state_oneshot_stopped)(struct clock_event_device *);
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 430efcbea48e..dca22de98d94 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -127,9 +127,14 @@ struct cpufreq_policy {
127#define CPUFREQ_SHARED_TYPE_ANY (3) /* Freq can be set from any dependent CPU*/ 127#define CPUFREQ_SHARED_TYPE_ANY (3) /* Freq can be set from any dependent CPU*/
128 128
129#ifdef CONFIG_CPU_FREQ 129#ifdef CONFIG_CPU_FREQ
130struct cpufreq_policy *cpufreq_cpu_get_raw(unsigned int cpu);
130struct cpufreq_policy *cpufreq_cpu_get(unsigned int cpu); 131struct cpufreq_policy *cpufreq_cpu_get(unsigned int cpu);
131void cpufreq_cpu_put(struct cpufreq_policy *policy); 132void cpufreq_cpu_put(struct cpufreq_policy *policy);
132#else 133#else
134static inline struct cpufreq_policy *cpufreq_cpu_get_raw(unsigned int cpu)
135{
136 return NULL;
137}
133static inline struct cpufreq_policy *cpufreq_cpu_get(unsigned int cpu) 138static inline struct cpufreq_policy *cpufreq_cpu_get(unsigned int cpu)
134{ 139{
135 return NULL; 140 return NULL;
diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
index ce447f0f1bad..68030e22af35 100644
--- a/include/linux/devfreq.h
+++ b/include/linux/devfreq.h
@@ -65,7 +65,10 @@ struct devfreq_dev_status {
65 * The "flags" parameter's possible values are 65 * The "flags" parameter's possible values are
66 * explained above with "DEVFREQ_FLAG_*" macros. 66 * explained above with "DEVFREQ_FLAG_*" macros.
67 * @get_dev_status: The device should provide the current performance 67 * @get_dev_status: The device should provide the current performance
68 * status to devfreq, which is used by governors. 68 * status to devfreq. Governors are recommended not to
69 * use this directly. Instead, governors are recommended
70 * to use devfreq_update_stats() along with
71 * devfreq.last_status.
69 * @get_cur_freq: The device should provide the current frequency 72 * @get_cur_freq: The device should provide the current frequency
70 * at which it is operating. 73 * at which it is operating.
71 * @exit: An optional callback that is called when devfreq 74 * @exit: An optional callback that is called when devfreq
@@ -161,6 +164,7 @@ struct devfreq {
161 struct delayed_work work; 164 struct delayed_work work;
162 165
163 unsigned long previous_freq; 166 unsigned long previous_freq;
167 struct devfreq_dev_status last_status;
164 168
165 void *data; /* private data for governors */ 169 void *data; /* private data for governors */
166 170
@@ -204,6 +208,19 @@ extern int devm_devfreq_register_opp_notifier(struct device *dev,
204extern void devm_devfreq_unregister_opp_notifier(struct device *dev, 208extern void devm_devfreq_unregister_opp_notifier(struct device *dev,
205 struct devfreq *devfreq); 209 struct devfreq *devfreq);
206 210
211/**
212 * devfreq_update_stats() - update the last_status pointer in struct devfreq
213 * @df: the devfreq instance whose status needs updating
214 *
215 * Governors are recommended to use this function along with last_status,
216 * which allows other entities to reuse the last_status without affecting
217 * the values fetched later by governors.
218 */
219static inline int devfreq_update_stats(struct devfreq *df)
220{
221 return df->profile->get_dev_status(df->dev.parent, &df->last_status);
222}
223
207#if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND) 224#if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND)
208/** 225/**
209 * struct devfreq_simple_ondemand_data - void *data fed to struct devfreq 226 * struct devfreq_simple_ondemand_data - void *data fed to struct devfreq
@@ -289,6 +306,11 @@ static inline void devm_devfreq_unregister_opp_notifier(struct device *dev,
289 struct devfreq *devfreq) 306 struct devfreq *devfreq)
290{ 307{
291} 308}
309
310static inline int devfreq_update_stats(struct devfreq *df)
311{
312 return -EINVAL;
313}
292#endif /* CONFIG_PM_DEVFREQ */ 314#endif /* CONFIG_PM_DEVFREQ */
293 315
294#endif /* __LINUX_DEVFREQ_H__ */ 316#endif /* __LINUX_DEVFREQ_H__ */
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index d0b380ee7d67..e38681f4912d 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -25,6 +25,13 @@
25extern struct files_struct init_files; 25extern struct files_struct init_files;
26extern struct fs_struct init_fs; 26extern struct fs_struct init_fs;
27 27
28#ifdef CONFIG_CGROUPS
29#define INIT_GROUP_RWSEM(sig) \
30 .group_rwsem = __RWSEM_INITIALIZER(sig.group_rwsem),
31#else
32#define INIT_GROUP_RWSEM(sig)
33#endif
34
28#ifdef CONFIG_CPUSETS 35#ifdef CONFIG_CPUSETS
29#define INIT_CPUSET_SEQ(tsk) \ 36#define INIT_CPUSET_SEQ(tsk) \
30 .mems_allowed_seq = SEQCNT_ZERO(tsk.mems_allowed_seq), 37 .mems_allowed_seq = SEQCNT_ZERO(tsk.mems_allowed_seq),
@@ -57,6 +64,7 @@ extern struct fs_struct init_fs;
57 INIT_PREV_CPUTIME(sig) \ 64 INIT_PREV_CPUTIME(sig) \
58 .cred_guard_mutex = \ 65 .cred_guard_mutex = \
59 __MUTEX_INITIALIZER(sig.cred_guard_mutex), \ 66 __MUTEX_INITIALIZER(sig.cred_guard_mutex), \
67 INIT_GROUP_RWSEM(sig) \
60} 68}
61 69
62extern struct nsproxy init_nsproxy; 70extern struct nsproxy init_nsproxy;
diff --git a/include/linux/iova.h b/include/linux/iova.h
index 3920a19d8194..92f7177db2ce 100644
--- a/include/linux/iova.h
+++ b/include/linux/iova.h
@@ -68,8 +68,8 @@ static inline unsigned long iova_pfn(struct iova_domain *iovad, dma_addr_t iova)
68 return iova >> iova_shift(iovad); 68 return iova >> iova_shift(iovad);
69} 69}
70 70
71int iommu_iova_cache_init(void); 71int iova_cache_get(void);
72void iommu_iova_cache_destroy(void); 72void iova_cache_put(void);
73 73
74struct iova *alloc_iova_mem(void); 74struct iova *alloc_iova_mem(void);
75void free_iova_mem(struct iova *iova); 75void free_iova_mem(struct iova *iova);
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 6f8b34066442..11bf09288ddb 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -110,8 +110,8 @@ enum {
110/* 110/*
111 * Return value for chip->irq_set_affinity() 111 * Return value for chip->irq_set_affinity()
112 * 112 *
113 * IRQ_SET_MASK_OK - OK, core updates irq_data.affinity 113 * IRQ_SET_MASK_OK - OK, core updates irq_common_data.affinity
114 * IRQ_SET_MASK_NOCPY - OK, chip did update irq_data.affinity 114 * IRQ_SET_MASK_NOCPY - OK, chip did update irq_common_data.affinity
115 * IRQ_SET_MASK_OK_DONE - Same as IRQ_SET_MASK_OK for core. Special code to 115 * IRQ_SET_MASK_OK_DONE - Same as IRQ_SET_MASK_OK for core. Special code to
116 * support stacked irqchips, which indicates skipping 116 * support stacked irqchips, which indicates skipping
117 * all descendent irqchips. 117 * all descendent irqchips.
@@ -129,9 +129,19 @@ struct irq_domain;
129 * struct irq_common_data - per irq data shared by all irqchips 129 * struct irq_common_data - per irq data shared by all irqchips
130 * @state_use_accessors: status information for irq chip functions. 130 * @state_use_accessors: status information for irq chip functions.
131 * Use accessor functions to deal with it 131 * Use accessor functions to deal with it
132 * @node: node index useful for balancing
133 * @handler_data: per-IRQ data for the irq_chip methods
134 * @affinity: IRQ affinity on SMP
135 * @msi_desc: MSI descriptor
132 */ 136 */
133struct irq_common_data { 137struct irq_common_data {
134 unsigned int state_use_accessors; 138 unsigned int state_use_accessors;
139#ifdef CONFIG_NUMA
140 unsigned int node;
141#endif
142 void *handler_data;
143 struct msi_desc *msi_desc;
144 cpumask_var_t affinity;
135}; 145};
136 146
137/** 147/**
@@ -139,38 +149,26 @@ struct irq_common_data {
139 * @mask: precomputed bitmask for accessing the chip registers 149 * @mask: precomputed bitmask for accessing the chip registers
140 * @irq: interrupt number 150 * @irq: interrupt number
141 * @hwirq: hardware interrupt number, local to the interrupt domain 151 * @hwirq: hardware interrupt number, local to the interrupt domain
142 * @node: node index useful for balancing
143 * @common: point to data shared by all irqchips 152 * @common: point to data shared by all irqchips
144 * @chip: low level interrupt hardware access 153 * @chip: low level interrupt hardware access
145 * @domain: Interrupt translation domain; responsible for mapping 154 * @domain: Interrupt translation domain; responsible for mapping
146 * between hwirq number and linux irq number. 155 * between hwirq number and linux irq number.
147 * @parent_data: pointer to parent struct irq_data to support hierarchy 156 * @parent_data: pointer to parent struct irq_data to support hierarchy
148 * irq_domain 157 * irq_domain
149 * @handler_data: per-IRQ data for the irq_chip methods
150 * @chip_data: platform-specific per-chip private data for the chip 158 * @chip_data: platform-specific per-chip private data for the chip
151 * methods, to allow shared chip implementations 159 * methods, to allow shared chip implementations
152 * @msi_desc: MSI descriptor
153 * @affinity: IRQ affinity on SMP
154 *
155 * The fields here need to overlay the ones in irq_desc until we
156 * cleaned up the direct references and switched everything over to
157 * irq_data.
158 */ 160 */
159struct irq_data { 161struct irq_data {
160 u32 mask; 162 u32 mask;
161 unsigned int irq; 163 unsigned int irq;
162 unsigned long hwirq; 164 unsigned long hwirq;
163 unsigned int node;
164 struct irq_common_data *common; 165 struct irq_common_data *common;
165 struct irq_chip *chip; 166 struct irq_chip *chip;
166 struct irq_domain *domain; 167 struct irq_domain *domain;
167#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY 168#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
168 struct irq_data *parent_data; 169 struct irq_data *parent_data;
169#endif 170#endif
170 void *handler_data;
171 void *chip_data; 171 void *chip_data;
172 struct msi_desc *msi_desc;
173 cpumask_var_t affinity;
174}; 172};
175 173
176/* 174/*
@@ -190,6 +188,7 @@ struct irq_data {
190 * IRQD_IRQ_MASKED - Masked state of the interrupt 188 * IRQD_IRQ_MASKED - Masked state of the interrupt
191 * IRQD_IRQ_INPROGRESS - In progress state of the interrupt 189 * IRQD_IRQ_INPROGRESS - In progress state of the interrupt
192 * IRQD_WAKEUP_ARMED - Wakeup mode armed 190 * IRQD_WAKEUP_ARMED - Wakeup mode armed
191 * IRQD_FORWARDED_TO_VCPU - The interrupt is forwarded to a VCPU
193 */ 192 */
194enum { 193enum {
195 IRQD_TRIGGER_MASK = 0xf, 194 IRQD_TRIGGER_MASK = 0xf,
@@ -204,6 +203,7 @@ enum {
204 IRQD_IRQ_MASKED = (1 << 17), 203 IRQD_IRQ_MASKED = (1 << 17),
205 IRQD_IRQ_INPROGRESS = (1 << 18), 204 IRQD_IRQ_INPROGRESS = (1 << 18),
206 IRQD_WAKEUP_ARMED = (1 << 19), 205 IRQD_WAKEUP_ARMED = (1 << 19),
206 IRQD_FORWARDED_TO_VCPU = (1 << 20),
207}; 207};
208 208
209#define __irqd_to_state(d) ((d)->common->state_use_accessors) 209#define __irqd_to_state(d) ((d)->common->state_use_accessors)
@@ -282,6 +282,20 @@ static inline bool irqd_is_wakeup_armed(struct irq_data *d)
282 return __irqd_to_state(d) & IRQD_WAKEUP_ARMED; 282 return __irqd_to_state(d) & IRQD_WAKEUP_ARMED;
283} 283}
284 284
285static inline bool irqd_is_forwarded_to_vcpu(struct irq_data *d)
286{
287 return __irqd_to_state(d) & IRQD_FORWARDED_TO_VCPU;
288}
289
290static inline void irqd_set_forwarded_to_vcpu(struct irq_data *d)
291{
292 __irqd_to_state(d) |= IRQD_FORWARDED_TO_VCPU;
293}
294
295static inline void irqd_clr_forwarded_to_vcpu(struct irq_data *d)
296{
297 __irqd_to_state(d) &= ~IRQD_FORWARDED_TO_VCPU;
298}
285 299
286/* 300/*
287 * Functions for chained handlers which can be enabled/disabled by the 301 * Functions for chained handlers which can be enabled/disabled by the
@@ -461,14 +475,14 @@ static inline int irq_set_parent(int irq, int parent_irq)
461 * Built-in IRQ handlers for various IRQ types, 475 * Built-in IRQ handlers for various IRQ types,
462 * callable via desc->handle_irq() 476 * callable via desc->handle_irq()
463 */ 477 */
464extern void handle_level_irq(unsigned int irq, struct irq_desc *desc); 478extern void handle_level_irq(struct irq_desc *desc);
465extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc); 479extern void handle_fasteoi_irq(struct irq_desc *desc);
466extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc); 480extern void handle_edge_irq(struct irq_desc *desc);
467extern void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc); 481extern void handle_edge_eoi_irq(struct irq_desc *desc);
468extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc); 482extern void handle_simple_irq(struct irq_desc *desc);
469extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc); 483extern void handle_percpu_irq(struct irq_desc *desc);
470extern void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc); 484extern void handle_percpu_devid_irq(struct irq_desc *desc);
471extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc); 485extern void handle_bad_irq(struct irq_desc *desc);
472extern void handle_nested_irq(unsigned int irq); 486extern void handle_nested_irq(unsigned int irq);
473 487
474extern int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg); 488extern int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg);
@@ -627,23 +641,23 @@ static inline void *irq_data_get_irq_chip_data(struct irq_data *d)
627static inline void *irq_get_handler_data(unsigned int irq) 641static inline void *irq_get_handler_data(unsigned int irq)
628{ 642{
629 struct irq_data *d = irq_get_irq_data(irq); 643 struct irq_data *d = irq_get_irq_data(irq);
630 return d ? d->handler_data : NULL; 644 return d ? d->common->handler_data : NULL;
631} 645}
632 646
633static inline void *irq_data_get_irq_handler_data(struct irq_data *d) 647static inline void *irq_data_get_irq_handler_data(struct irq_data *d)
634{ 648{
635 return d->handler_data; 649 return d->common->handler_data;
636} 650}
637 651
638static inline struct msi_desc *irq_get_msi_desc(unsigned int irq) 652static inline struct msi_desc *irq_get_msi_desc(unsigned int irq)
639{ 653{
640 struct irq_data *d = irq_get_irq_data(irq); 654 struct irq_data *d = irq_get_irq_data(irq);
641 return d ? d->msi_desc : NULL; 655 return d ? d->common->msi_desc : NULL;
642} 656}
643 657
644static inline struct msi_desc *irq_data_get_msi_desc(struct irq_data *d) 658static inline struct msi_desc *irq_data_get_msi_desc(struct irq_data *d)
645{ 659{
646 return d->msi_desc; 660 return d->common->msi_desc;
647} 661}
648 662
649static inline u32 irq_get_trigger_type(unsigned int irq) 663static inline u32 irq_get_trigger_type(unsigned int irq)
@@ -652,21 +666,30 @@ static inline u32 irq_get_trigger_type(unsigned int irq)
652 return d ? irqd_get_trigger_type(d) : 0; 666 return d ? irqd_get_trigger_type(d) : 0;
653} 667}
654 668
655static inline int irq_data_get_node(struct irq_data *d) 669static inline int irq_common_data_get_node(struct irq_common_data *d)
656{ 670{
671#ifdef CONFIG_NUMA
657 return d->node; 672 return d->node;
673#else
674 return 0;
675#endif
676}
677
678static inline int irq_data_get_node(struct irq_data *d)
679{
680 return irq_common_data_get_node(d->common);
658} 681}
659 682
660static inline struct cpumask *irq_get_affinity_mask(int irq) 683static inline struct cpumask *irq_get_affinity_mask(int irq)
661{ 684{
662 struct irq_data *d = irq_get_irq_data(irq); 685 struct irq_data *d = irq_get_irq_data(irq);
663 686
664 return d ? d->affinity : NULL; 687 return d ? d->common->affinity : NULL;
665} 688}
666 689
667static inline struct cpumask *irq_data_get_affinity_mask(struct irq_data *d) 690static inline struct cpumask *irq_data_get_affinity_mask(struct irq_data *d)
668{ 691{
669 return d->affinity; 692 return d->common->affinity;
670} 693}
671 694
672unsigned int arch_dynirq_lower_bound(unsigned int from); 695unsigned int arch_dynirq_lower_bound(unsigned int from);
diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h
index 5acfa26602e1..a587a33363c7 100644
--- a/include/linux/irqdesc.h
+++ b/include/linux/irqdesc.h
@@ -98,11 +98,7 @@ extern struct irq_desc irq_desc[NR_IRQS];
98 98
99static inline struct irq_desc *irq_data_to_desc(struct irq_data *data) 99static inline struct irq_desc *irq_data_to_desc(struct irq_data *data)
100{ 100{
101#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY 101 return container_of(data->common, struct irq_desc, irq_common_data);
102 return irq_to_desc(data->irq);
103#else
104 return container_of(data, struct irq_desc, irq_data);
105#endif
106} 102}
107 103
108static inline unsigned int irq_desc_get_irq(struct irq_desc *desc) 104static inline unsigned int irq_desc_get_irq(struct irq_desc *desc)
@@ -127,23 +123,21 @@ static inline void *irq_desc_get_chip_data(struct irq_desc *desc)
127 123
128static inline void *irq_desc_get_handler_data(struct irq_desc *desc) 124static inline void *irq_desc_get_handler_data(struct irq_desc *desc)
129{ 125{
130 return desc->irq_data.handler_data; 126 return desc->irq_common_data.handler_data;
131} 127}
132 128
133static inline struct msi_desc *irq_desc_get_msi_desc(struct irq_desc *desc) 129static inline struct msi_desc *irq_desc_get_msi_desc(struct irq_desc *desc)
134{ 130{
135 return desc->irq_data.msi_desc; 131 return desc->irq_common_data.msi_desc;
136} 132}
137 133
138/* 134/*
139 * Architectures call this to let the generic IRQ layer 135 * Architectures call this to let the generic IRQ layer
140 * handle an interrupt. If the descriptor is attached to an 136 * handle an interrupt.
141 * irqchip-style controller then we call the ->handle_irq() handler,
142 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
143 */ 137 */
144static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc) 138static inline void generic_handle_irq_desc(struct irq_desc *desc)
145{ 139{
146 desc->handle_irq(irq, desc); 140 desc->handle_irq(desc);
147} 141}
148 142
149int generic_handle_irq(unsigned int irq); 143int generic_handle_irq(unsigned int irq);
@@ -176,29 +170,6 @@ static inline int irq_has_action(unsigned int irq)
176 return irq_desc_has_action(irq_to_desc(irq)); 170 return irq_desc_has_action(irq_to_desc(irq));
177} 171}
178 172
179/* caller has locked the irq_desc and both params are valid */
180static inline void __irq_set_handler_locked(unsigned int irq,
181 irq_flow_handler_t handler)
182{
183 struct irq_desc *desc;
184
185 desc = irq_to_desc(irq);
186 desc->handle_irq = handler;
187}
188
189/* caller has locked the irq_desc and both params are valid */
190static inline void
191__irq_set_chip_handler_name_locked(unsigned int irq, struct irq_chip *chip,
192 irq_flow_handler_t handler, const char *name)
193{
194 struct irq_desc *desc;
195
196 desc = irq_to_desc(irq);
197 irq_desc_get_irq_data(desc)->chip = chip;
198 desc->handle_irq = handler;
199 desc->name = name;
200}
201
202/** 173/**
203 * irq_set_handler_locked - Set irq handler from a locked region 174 * irq_set_handler_locked - Set irq handler from a locked region
204 * @data: Pointer to the irq_data structure which identifies the irq 175 * @data: Pointer to the irq_data structure which identifies the irq
diff --git a/include/linux/irqhandler.h b/include/linux/irqhandler.h
index 62d543004197..661bed0ed1f3 100644
--- a/include/linux/irqhandler.h
+++ b/include/linux/irqhandler.h
@@ -8,7 +8,7 @@
8 8
9struct irq_desc; 9struct irq_desc;
10struct irq_data; 10struct irq_data;
11typedef void (*irq_flow_handler_t)(unsigned int irq, struct irq_desc *desc); 11typedef void (*irq_flow_handler_t)(struct irq_desc *desc);
12typedef void (*irq_preflow_handler_t)(struct irq_data *data); 12typedef void (*irq_preflow_handler_t)(struct irq_data *data);
13 13
14#endif 14#endif
diff --git a/include/linux/jump_label.h b/include/linux/jump_label.h
index 7f653e8f6690..f1094238ab2a 100644
--- a/include/linux/jump_label.h
+++ b/include/linux/jump_label.h
@@ -21,8 +21,8 @@
21 * 21 *
22 * DEFINE_STATIC_KEY_TRUE(key); 22 * DEFINE_STATIC_KEY_TRUE(key);
23 * DEFINE_STATIC_KEY_FALSE(key); 23 * DEFINE_STATIC_KEY_FALSE(key);
24 * static_key_likely() 24 * static_branch_likely()
25 * statick_key_unlikely() 25 * static_branch_unlikely()
26 * 26 *
27 * Jump labels provide an interface to generate dynamic branches using 27 * Jump labels provide an interface to generate dynamic branches using
28 * self-modifying code. Assuming toolchain and architecture support, if we 28 * self-modifying code. Assuming toolchain and architecture support, if we
@@ -45,12 +45,10 @@
45 * statement, setting the key to true requires us to patch in a jump 45 * statement, setting the key to true requires us to patch in a jump
46 * to the out-of-line of true branch. 46 * to the out-of-line of true branch.
47 * 47 *
48 * In addtion to static_branch_{enable,disable}, we can also reference count 48 * In addition to static_branch_{enable,disable}, we can also reference count
49 * the key or branch direction via static_branch_{inc,dec}. Thus, 49 * the key or branch direction via static_branch_{inc,dec}. Thus,
50 * static_branch_inc() can be thought of as a 'make more true' and 50 * static_branch_inc() can be thought of as a 'make more true' and
51 * static_branch_dec() as a 'make more false'. The inc()/dec() 51 * static_branch_dec() as a 'make more false'.
52 * interface is meant to be used exclusively from the inc()/dec() for a given
53 * key.
54 * 52 *
55 * Since this relies on modifying code, the branch modifying functions 53 * Since this relies on modifying code, the branch modifying functions
56 * must be considered absolute slow paths (machine wide synchronization etc.). 54 * must be considered absolute slow paths (machine wide synchronization etc.).
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index ad800e62cb7a..6452ff4c463f 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -242,7 +242,6 @@ struct mem_cgroup {
242 * percpu counter. 242 * percpu counter.
243 */ 243 */
244 struct mem_cgroup_stat_cpu __percpu *stat; 244 struct mem_cgroup_stat_cpu __percpu *stat;
245 spinlock_t pcp_counter_lock;
246 245
247#if defined(CONFIG_MEMCG_KMEM) && defined(CONFIG_INET) 246#if defined(CONFIG_MEMCG_KMEM) && defined(CONFIG_INET)
248 struct cg_proto tcp_mem; 247 struct cg_proto tcp_mem;
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 8eb3b19af2a4..250b1ff8b48d 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -402,17 +402,6 @@ struct mlx5_cmd_teardown_hca_mbox_out {
402 u8 rsvd[8]; 402 u8 rsvd[8];
403}; 403};
404 404
405struct mlx5_cmd_query_special_contexts_mbox_in {
406 struct mlx5_inbox_hdr hdr;
407 u8 rsvd[8];
408};
409
410struct mlx5_cmd_query_special_contexts_mbox_out {
411 struct mlx5_outbox_hdr hdr;
412 __be32 dump_fill_mkey;
413 __be32 resd_lkey;
414};
415
416struct mlx5_cmd_layout { 405struct mlx5_cmd_layout {
417 u8 type; 406 u8 type;
418 u8 rsvd0[3]; 407 u8 rsvd0[3];
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index 27b53f9a24ad..8b6d6f2154a4 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -845,7 +845,6 @@ void *mlx5_get_protocol_dev(struct mlx5_core_dev *mdev, int protocol);
845int mlx5_register_interface(struct mlx5_interface *intf); 845int mlx5_register_interface(struct mlx5_interface *intf);
846void mlx5_unregister_interface(struct mlx5_interface *intf); 846void mlx5_unregister_interface(struct mlx5_interface *intf);
847int mlx5_core_query_vendor_id(struct mlx5_core_dev *mdev, u32 *vendor_id); 847int mlx5_core_query_vendor_id(struct mlx5_core_dev *mdev, u32 *vendor_id);
848int mlx5_core_query_special_context(struct mlx5_core_dev *dev, u32 *rsvd_lkey);
849 848
850struct mlx5_profile { 849struct mlx5_profile {
851 u64 mask; 850 u64 mask;
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 91c08f6f0dc9..80001de019ba 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -905,6 +905,27 @@ static inline void set_page_links(struct page *page, enum zone_type zone,
905#endif 905#endif
906} 906}
907 907
908#ifdef CONFIG_MEMCG
909static inline struct mem_cgroup *page_memcg(struct page *page)
910{
911 return page->mem_cgroup;
912}
913
914static inline void set_page_memcg(struct page *page, struct mem_cgroup *memcg)
915{
916 page->mem_cgroup = memcg;
917}
918#else
919static inline struct mem_cgroup *page_memcg(struct page *page)
920{
921 return NULL;
922}
923
924static inline void set_page_memcg(struct page *page, struct mem_cgroup *memcg)
925{
926}
927#endif
928
908/* 929/*
909 * Some inline functions in vmstat.h depend on page_zone() 930 * Some inline functions in vmstat.h depend on page_zone()
910 */ 931 */
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 88a00694eda5..2d15e3831440 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -507,6 +507,7 @@ static inline void napi_enable(struct napi_struct *n)
507 BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state)); 507 BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
508 smp_mb__before_atomic(); 508 smp_mb__before_atomic();
509 clear_bit(NAPI_STATE_SCHED, &n->state); 509 clear_bit(NAPI_STATE_SCHED, &n->state);
510 clear_bit(NAPI_STATE_NPSVC, &n->state);
510} 511}
511 512
512#ifdef CONFIG_SMP 513#ifdef CONFIG_SMP
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 962387a192f1..4a4e3a092337 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -19,6 +19,7 @@
19#include <linux/spinlock.h> 19#include <linux/spinlock.h>
20#include <linux/ethtool.h> 20#include <linux/ethtool.h>
21#include <linux/mii.h> 21#include <linux/mii.h>
22#include <linux/module.h>
22#include <linux/timer.h> 23#include <linux/timer.h>
23#include <linux/workqueue.h> 24#include <linux/workqueue.h>
24#include <linux/mod_devicetable.h> 25#include <linux/mod_devicetable.h>
@@ -153,6 +154,7 @@ struct sk_buff;
153 * PHYs should register using this structure 154 * PHYs should register using this structure
154 */ 155 */
155struct mii_bus { 156struct mii_bus {
157 struct module *owner;
156 const char *name; 158 const char *name;
157 char id[MII_BUS_ID_SIZE]; 159 char id[MII_BUS_ID_SIZE];
158 void *priv; 160 void *priv;
@@ -198,7 +200,8 @@ static inline struct mii_bus *mdiobus_alloc(void)
198 return mdiobus_alloc_size(0); 200 return mdiobus_alloc_size(0);
199} 201}
200 202
201int mdiobus_register(struct mii_bus *bus); 203int __mdiobus_register(struct mii_bus *bus, struct module *owner);
204#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
202void mdiobus_unregister(struct mii_bus *bus); 205void mdiobus_unregister(struct mii_bus *bus);
203void mdiobus_free(struct mii_bus *bus); 206void mdiobus_free(struct mii_bus *bus);
204struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 207struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
@@ -742,6 +745,7 @@ struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
742 struct phy_c45_device_ids *c45_ids); 745 struct phy_c45_device_ids *c45_ids);
743struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 746struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
744int phy_device_register(struct phy_device *phy); 747int phy_device_register(struct phy_device *phy);
748void phy_device_remove(struct phy_device *phydev);
745int phy_init_hw(struct phy_device *phydev); 749int phy_init_hw(struct phy_device *phydev);
746int phy_suspend(struct phy_device *phydev); 750int phy_suspend(struct phy_device *phydev);
747int phy_resume(struct phy_device *phydev); 751int phy_resume(struct phy_device *phydev);
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index ff476515f716..581abf848566 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -230,12 +230,11 @@ void __wait_rcu_gp(bool checktiny, int n, call_rcu_func_t *crcu_array,
230 struct rcu_synchronize *rs_array); 230 struct rcu_synchronize *rs_array);
231 231
232#define _wait_rcu_gp(checktiny, ...) \ 232#define _wait_rcu_gp(checktiny, ...) \
233do { \ 233do { \
234 call_rcu_func_t __crcu_array[] = { __VA_ARGS__ }; \ 234 call_rcu_func_t __crcu_array[] = { __VA_ARGS__ }; \
235 const int __n = ARRAY_SIZE(__crcu_array); \ 235 struct rcu_synchronize __rs_array[ARRAY_SIZE(__crcu_array)]; \
236 struct rcu_synchronize __rs_array[__n]; \ 236 __wait_rcu_gp(checktiny, ARRAY_SIZE(__crcu_array), \
237 \ 237 __crcu_array, __rs_array); \
238 __wait_rcu_gp(checktiny, __n, __crcu_array, __rs_array); \
239} while (0) 238} while (0)
240 239
241#define wait_rcu_gp(...) _wait_rcu_gp(false, __VA_ARGS__) 240#define wait_rcu_gp(...) _wait_rcu_gp(false, __VA_ARGS__)
diff --git a/include/linux/sched.h b/include/linux/sched.h
index a4ab9daa387c..b7b9501b41af 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -762,6 +762,18 @@ struct signal_struct {
762 unsigned audit_tty_log_passwd; 762 unsigned audit_tty_log_passwd;
763 struct tty_audit_buf *tty_audit_buf; 763 struct tty_audit_buf *tty_audit_buf;
764#endif 764#endif
765#ifdef CONFIG_CGROUPS
766 /*
767 * group_rwsem prevents new tasks from entering the threadgroup and
768 * member tasks from exiting,a more specifically, setting of
769 * PF_EXITING. fork and exit paths are protected with this rwsem
770 * using threadgroup_change_begin/end(). Users which require
771 * threadgroup to remain stable should use threadgroup_[un]lock()
772 * which also takes care of exec path. Currently, cgroup is the
773 * only user.
774 */
775 struct rw_semaphore group_rwsem;
776#endif
765 777
766 oom_flags_t oom_flags; 778 oom_flags_t oom_flags;
767 short oom_score_adj; /* OOM kill score adjustment */ 779 short oom_score_adj; /* OOM kill score adjustment */
diff --git a/include/linux/security.h b/include/linux/security.h
index 79d85ddf8093..2f4c1f7aa7db 100644
--- a/include/linux/security.h
+++ b/include/linux/security.h
@@ -946,7 +946,7 @@ static inline int security_task_prctl(int option, unsigned long arg2,
946 unsigned long arg4, 946 unsigned long arg4,
947 unsigned long arg5) 947 unsigned long arg5)
948{ 948{
949 return cap_task_prctl(option, arg2, arg3, arg3, arg5); 949 return cap_task_prctl(option, arg2, arg3, arg4, arg5);
950} 950}
951 951
952static inline void security_task_to_inode(struct task_struct *p, struct inode *inode) 952static inline void security_task_to_inode(struct task_struct *p, struct inode *inode)
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 2738d355cdf9..4398411236f1 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -179,6 +179,9 @@ struct nf_bridge_info {
179 u8 bridged_dnat:1; 179 u8 bridged_dnat:1;
180 __u16 frag_max_size; 180 __u16 frag_max_size;
181 struct net_device *physindev; 181 struct net_device *physindev;
182
183 /* always valid & non-NULL from FORWARD on, for physdev match */
184 struct net_device *physoutdev;
182 union { 185 union {
183 /* prerouting: detect dnat in orig/reply direction */ 186 /* prerouting: detect dnat in orig/reply direction */
184 __be32 ipv4_daddr; 187 __be32 ipv4_daddr;
@@ -189,9 +192,6 @@ struct nf_bridge_info {
189 * skb is out in neigh layer. 192 * skb is out in neigh layer.
190 */ 193 */
191 char neigh_header[8]; 194 char neigh_header[8];
192
193 /* always valid & non-NULL from FORWARD on, for physdev match */
194 struct net_device *physoutdev;
195 }; 195 };
196}; 196};
197#endif 197#endif
@@ -2707,6 +2707,9 @@ static inline void skb_postpull_rcsum(struct sk_buff *skb,
2707{ 2707{
2708 if (skb->ip_summed == CHECKSUM_COMPLETE) 2708 if (skb->ip_summed == CHECKSUM_COMPLETE)
2709 skb->csum = csum_sub(skb->csum, csum_partial(start, len, 0)); 2709 skb->csum = csum_sub(skb->csum, csum_partial(start, len, 0));
2710 else if (skb->ip_summed == CHECKSUM_PARTIAL &&
2711 skb_checksum_start_offset(skb) < 0)
2712 skb->ip_summed = CHECKSUM_NONE;
2710} 2713}
2711 2714
2712unsigned char *skb_pull_rcsum(struct sk_buff *skb, unsigned int len); 2715unsigned char *skb_pull_rcsum(struct sk_buff *skb, unsigned int len);
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 269e8afd3e2a..6b00f18f5e6b 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -34,7 +34,7 @@ extern struct bus_type spi_bus_type;
34 34
35/** 35/**
36 * struct spi_statistics - statistics for spi transfers 36 * struct spi_statistics - statistics for spi transfers
37 * @clock: lock protecting this structure 37 * @lock: lock protecting this structure
38 * 38 *
39 * @messages: number of spi-messages handled 39 * @messages: number of spi-messages handled
40 * @transfers: number of spi_transfers handled 40 * @transfers: number of spi_transfers handled
diff --git a/include/linux/string.h b/include/linux/string.h
index a8d90db9c4b0..9ef7795e65e4 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -25,6 +25,9 @@ extern char * strncpy(char *,const char *, __kernel_size_t);
25#ifndef __HAVE_ARCH_STRLCPY 25#ifndef __HAVE_ARCH_STRLCPY
26size_t strlcpy(char *, const char *, size_t); 26size_t strlcpy(char *, const char *, size_t);
27#endif 27#endif
28#ifndef __HAVE_ARCH_STRSCPY
29ssize_t __must_check strscpy(char *, const char *, size_t);
30#endif
28#ifndef __HAVE_ARCH_STRCAT 31#ifndef __HAVE_ARCH_STRCAT
29extern char * strcat(char *, const char *); 32extern char * strcat(char *, const char *);
30#endif 33#endif
diff --git a/include/linux/sunrpc/xprtsock.h b/include/linux/sunrpc/xprtsock.h
index 7591788e9fbf..357e44c1a46b 100644
--- a/include/linux/sunrpc/xprtsock.h
+++ b/include/linux/sunrpc/xprtsock.h
@@ -42,6 +42,7 @@ struct sock_xprt {
42 /* 42 /*
43 * Connection of transports 43 * Connection of transports
44 */ 44 */
45 unsigned long sock_state;
45 struct delayed_work connect_worker; 46 struct delayed_work connect_worker;
46 struct sockaddr_storage srcaddr; 47 struct sockaddr_storage srcaddr;
47 unsigned short srcport; 48 unsigned short srcport;
@@ -76,6 +77,8 @@ struct sock_xprt {
76 */ 77 */
77#define TCP_RPC_REPLY (1UL << 6) 78#define TCP_RPC_REPLY (1UL << 6)
78 79
80#define XPRT_SOCK_CONNECTING 1U
81
79#endif /* __KERNEL__ */ 82#endif /* __KERNEL__ */
80 83
81#endif /* _LINUX_SUNRPC_XPRTSOCK_H */ 84#endif /* _LINUX_SUNRPC_XPRTSOCK_H */
diff --git a/include/linux/thermal.h b/include/linux/thermal.h
index 17292fee8686..157d366e761b 100644
--- a/include/linux/thermal.h
+++ b/include/linux/thermal.h
@@ -360,7 +360,7 @@ static inline struct thermal_zone_device *
360thermal_zone_of_sensor_register(struct device *dev, int id, void *data, 360thermal_zone_of_sensor_register(struct device *dev, int id, void *data,
361 const struct thermal_zone_of_device_ops *ops) 361 const struct thermal_zone_of_device_ops *ops)
362{ 362{
363 return NULL; 363 return ERR_PTR(-ENODEV);
364} 364}
365 365
366static inline 366static inline
@@ -380,6 +380,8 @@ static inline bool cdev_is_power_actor(struct thermal_cooling_device *cdev)
380 380
381int power_actor_get_max_power(struct thermal_cooling_device *, 381int power_actor_get_max_power(struct thermal_cooling_device *,
382 struct thermal_zone_device *tz, u32 *max_power); 382 struct thermal_zone_device *tz, u32 *max_power);
383int power_actor_get_min_power(struct thermal_cooling_device *,
384 struct thermal_zone_device *tz, u32 *min_power);
383int power_actor_set_power(struct thermal_cooling_device *, 385int power_actor_set_power(struct thermal_cooling_device *,
384 struct thermal_instance *, u32); 386 struct thermal_instance *, u32);
385struct thermal_zone_device *thermal_zone_device_register(const char *, int, int, 387struct thermal_zone_device *thermal_zone_device_register(const char *, int, int,
@@ -415,6 +417,10 @@ static inline bool cdev_is_power_actor(struct thermal_cooling_device *cdev)
415static inline int power_actor_get_max_power(struct thermal_cooling_device *cdev, 417static inline int power_actor_get_max_power(struct thermal_cooling_device *cdev,
416 struct thermal_zone_device *tz, u32 *max_power) 418 struct thermal_zone_device *tz, u32 *max_power)
417{ return 0; } 419{ return 0; }
420static inline int power_actor_get_min_power(struct thermal_cooling_device *cdev,
421 struct thermal_zone_device *tz,
422 u32 *min_power)
423{ return -ENODEV; }
418static inline int power_actor_set_power(struct thermal_cooling_device *cdev, 424static inline int power_actor_set_power(struct thermal_cooling_device *cdev,
419 struct thermal_instance *tz, u32 power) 425 struct thermal_instance *tz, u32 power)
420{ return 0; } 426{ return 0; }
diff --git a/include/linux/tick.h b/include/linux/tick.h
index 48d901f83f92..e312219ff823 100644
--- a/include/linux/tick.h
+++ b/include/linux/tick.h
@@ -147,11 +147,20 @@ static inline void tick_nohz_full_add_cpus_to(struct cpumask *mask)
147 cpumask_or(mask, mask, tick_nohz_full_mask); 147 cpumask_or(mask, mask, tick_nohz_full_mask);
148} 148}
149 149
150static inline int housekeeping_any_cpu(void)
151{
152 return cpumask_any_and(housekeeping_mask, cpu_online_mask);
153}
154
150extern void tick_nohz_full_kick(void); 155extern void tick_nohz_full_kick(void);
151extern void tick_nohz_full_kick_cpu(int cpu); 156extern void tick_nohz_full_kick_cpu(int cpu);
152extern void tick_nohz_full_kick_all(void); 157extern void tick_nohz_full_kick_all(void);
153extern void __tick_nohz_task_switch(void); 158extern void __tick_nohz_task_switch(void);
154#else 159#else
160static inline int housekeeping_any_cpu(void)
161{
162 return smp_processor_id();
163}
155static inline bool tick_nohz_full_enabled(void) { return false; } 164static inline bool tick_nohz_full_enabled(void) { return false; }
156static inline bool tick_nohz_full_cpu(int cpu) { return false; } 165static inline bool tick_nohz_full_cpu(int cpu) { return false; }
157static inline void tick_nohz_full_add_cpus_to(struct cpumask *mask) { } 166static inline void tick_nohz_full_add_cpus_to(struct cpumask *mask) { }
diff --git a/include/linux/wait.h b/include/linux/wait.h
index d3d077228d4c..1e1bf9f963a9 100644
--- a/include/linux/wait.h
+++ b/include/linux/wait.h
@@ -147,8 +147,7 @@ __remove_wait_queue(wait_queue_head_t *head, wait_queue_t *old)
147 147
148typedef int wait_bit_action_f(struct wait_bit_key *); 148typedef int wait_bit_action_f(struct wait_bit_key *);
149void __wake_up(wait_queue_head_t *q, unsigned int mode, int nr, void *key); 149void __wake_up(wait_queue_head_t *q, unsigned int mode, int nr, void *key);
150void __wake_up_locked_key(wait_queue_head_t *q, unsigned int mode, int nr, 150void __wake_up_locked_key(wait_queue_head_t *q, unsigned int mode, void *key);
151 void *key);
152void __wake_up_sync_key(wait_queue_head_t *q, unsigned int mode, int nr, void *key); 151void __wake_up_sync_key(wait_queue_head_t *q, unsigned int mode, int nr, void *key);
153void __wake_up_locked(wait_queue_head_t *q, unsigned int mode, int nr); 152void __wake_up_locked(wait_queue_head_t *q, unsigned int mode, int nr);
154void __wake_up_sync(wait_queue_head_t *q, unsigned int mode, int nr); 153void __wake_up_sync(wait_queue_head_t *q, unsigned int mode, int nr);
@@ -180,7 +179,7 @@ wait_queue_head_t *bit_waitqueue(void *, int);
180#define wake_up_poll(x, m) \ 179#define wake_up_poll(x, m) \
181 __wake_up(x, TASK_NORMAL, 1, (void *) (m)) 180 __wake_up(x, TASK_NORMAL, 1, (void *) (m))
182#define wake_up_locked_poll(x, m) \ 181#define wake_up_locked_poll(x, m) \
183 __wake_up_locked_key((x), TASK_NORMAL, 1, (void *) (m)) 182 __wake_up_locked_key((x), TASK_NORMAL, (void *) (m))
184#define wake_up_interruptible_poll(x, m) \ 183#define wake_up_interruptible_poll(x, m) \
185 __wake_up(x, TASK_INTERRUPTIBLE, 1, (void *) (m)) 184 __wake_up(x, TASK_INTERRUPTIBLE, 1, (void *) (m))
186#define wake_up_interruptible_sync_poll(x, m) \ 185#define wake_up_interruptible_sync_poll(x, m) \
diff --git a/include/net/af_unix.h b/include/net/af_unix.h
index 4a167b30a12f..cb1b9bbda332 100644
--- a/include/net/af_unix.h
+++ b/include/net/af_unix.h
@@ -63,7 +63,11 @@ struct unix_sock {
63#define UNIX_GC_MAYBE_CYCLE 1 63#define UNIX_GC_MAYBE_CYCLE 1
64 struct socket_wq peer_wq; 64 struct socket_wq peer_wq;
65}; 65};
66#define unix_sk(__sk) ((struct unix_sock *)__sk) 66
67static inline struct unix_sock *unix_sk(struct sock *sk)
68{
69 return (struct unix_sock *)sk;
70}
67 71
68#define peer_wait peer_wq.wait 72#define peer_wait peer_wq.wait
69 73
diff --git a/include/net/flow.h b/include/net/flow.h
index acd6a096250e..9b85db85f13c 100644
--- a/include/net/flow.h
+++ b/include/net/flow.h
@@ -35,6 +35,7 @@ struct flowi_common {
35#define FLOWI_FLAG_ANYSRC 0x01 35#define FLOWI_FLAG_ANYSRC 0x01
36#define FLOWI_FLAG_KNOWN_NH 0x02 36#define FLOWI_FLAG_KNOWN_NH 0x02
37#define FLOWI_FLAG_VRFSRC 0x04 37#define FLOWI_FLAG_VRFSRC 0x04
38#define FLOWI_FLAG_SKIP_NH_OIF 0x08
38 __u32 flowic_secid; 39 __u32 flowic_secid;
39 struct flowi_tunnel flowic_tun_key; 40 struct flowi_tunnel flowic_tun_key;
40}; 41};
diff --git a/include/net/inet_timewait_sock.h b/include/net/inet_timewait_sock.h
index 879d6e5a973b..186f3a1e1b1f 100644
--- a/include/net/inet_timewait_sock.h
+++ b/include/net/inet_timewait_sock.h
@@ -110,7 +110,19 @@ struct inet_timewait_sock *inet_twsk_alloc(const struct sock *sk,
110void __inet_twsk_hashdance(struct inet_timewait_sock *tw, struct sock *sk, 110void __inet_twsk_hashdance(struct inet_timewait_sock *tw, struct sock *sk,
111 struct inet_hashinfo *hashinfo); 111 struct inet_hashinfo *hashinfo);
112 112
113void inet_twsk_schedule(struct inet_timewait_sock *tw, const int timeo); 113void __inet_twsk_schedule(struct inet_timewait_sock *tw, int timeo,
114 bool rearm);
115
116static void inline inet_twsk_schedule(struct inet_timewait_sock *tw, int timeo)
117{
118 __inet_twsk_schedule(tw, timeo, false);
119}
120
121static void inline inet_twsk_reschedule(struct inet_timewait_sock *tw, int timeo)
122{
123 __inet_twsk_schedule(tw, timeo, true);
124}
125
114void inet_twsk_deschedule_put(struct inet_timewait_sock *tw); 126void inet_twsk_deschedule_put(struct inet_timewait_sock *tw);
115 127
116void inet_twsk_purge(struct inet_hashinfo *hashinfo, 128void inet_twsk_purge(struct inet_hashinfo *hashinfo,
diff --git a/include/net/ip6_fib.h b/include/net/ip6_fib.h
index 063d30474cf6..aaf9700fc9e5 100644
--- a/include/net/ip6_fib.h
+++ b/include/net/ip6_fib.h
@@ -275,7 +275,8 @@ int fib6_add(struct fib6_node *root, struct rt6_info *rt,
275 struct nl_info *info, struct mx6_config *mxc); 275 struct nl_info *info, struct mx6_config *mxc);
276int fib6_del(struct rt6_info *rt, struct nl_info *info); 276int fib6_del(struct rt6_info *rt, struct nl_info *info);
277 277
278void inet6_rt_notify(int event, struct rt6_info *rt, struct nl_info *info); 278void inet6_rt_notify(int event, struct rt6_info *rt, struct nl_info *info,
279 unsigned int flags);
279 280
280void fib6_run_gc(unsigned long expires, struct net *net, bool force); 281void fib6_run_gc(unsigned long expires, struct net *net, bool force);
281 282
diff --git a/include/net/ip6_tunnel.h b/include/net/ip6_tunnel.h
index b8529aa1dae7..fa915fa0f703 100644
--- a/include/net/ip6_tunnel.h
+++ b/include/net/ip6_tunnel.h
@@ -32,6 +32,12 @@ struct __ip6_tnl_parm {
32 __be32 o_key; 32 __be32 o_key;
33}; 33};
34 34
35struct ip6_tnl_dst {
36 seqlock_t lock;
37 struct dst_entry __rcu *dst;
38 u32 cookie;
39};
40
35/* IPv6 tunnel */ 41/* IPv6 tunnel */
36struct ip6_tnl { 42struct ip6_tnl {
37 struct ip6_tnl __rcu *next; /* next tunnel in list */ 43 struct ip6_tnl __rcu *next; /* next tunnel in list */
@@ -39,8 +45,7 @@ struct ip6_tnl {
39 struct net *net; /* netns for packet i/o */ 45 struct net *net; /* netns for packet i/o */
40 struct __ip6_tnl_parm parms; /* tunnel configuration parameters */ 46 struct __ip6_tnl_parm parms; /* tunnel configuration parameters */
41 struct flowi fl; /* flowi template for xmit */ 47 struct flowi fl; /* flowi template for xmit */
42 struct dst_entry *dst_cache; /* cached dst */ 48 struct ip6_tnl_dst __percpu *dst_cache; /* cached dst */
43 u32 dst_cookie;
44 49
45 int err_count; 50 int err_count;
46 unsigned long err_time; 51 unsigned long err_time;
@@ -60,9 +65,11 @@ struct ipv6_tlv_tnl_enc_lim {
60 __u8 encap_limit; /* tunnel encapsulation limit */ 65 __u8 encap_limit; /* tunnel encapsulation limit */
61} __packed; 66} __packed;
62 67
63struct dst_entry *ip6_tnl_dst_check(struct ip6_tnl *t); 68struct dst_entry *ip6_tnl_dst_get(struct ip6_tnl *t);
69int ip6_tnl_dst_init(struct ip6_tnl *t);
70void ip6_tnl_dst_destroy(struct ip6_tnl *t);
64void ip6_tnl_dst_reset(struct ip6_tnl *t); 71void ip6_tnl_dst_reset(struct ip6_tnl *t);
65void ip6_tnl_dst_store(struct ip6_tnl *t, struct dst_entry *dst); 72void ip6_tnl_dst_set(struct ip6_tnl *t, struct dst_entry *dst);
66int ip6_tnl_rcv_ctl(struct ip6_tnl *t, const struct in6_addr *laddr, 73int ip6_tnl_rcv_ctl(struct ip6_tnl *t, const struct in6_addr *laddr,
67 const struct in6_addr *raddr); 74 const struct in6_addr *raddr);
68int ip6_tnl_xmit_ctl(struct ip6_tnl *t, const struct in6_addr *laddr, 75int ip6_tnl_xmit_ctl(struct ip6_tnl *t, const struct in6_addr *laddr,
@@ -79,7 +86,7 @@ static inline void ip6tunnel_xmit(struct sock *sk, struct sk_buff *skb,
79 struct net_device_stats *stats = &dev->stats; 86 struct net_device_stats *stats = &dev->stats;
80 int pkt_len, err; 87 int pkt_len, err;
81 88
82 pkt_len = skb->len; 89 pkt_len = skb->len - skb_inner_network_offset(skb);
83 err = ip6_local_out_sk(sk, skb); 90 err = ip6_local_out_sk(sk, skb);
84 91
85 if (net_xmit_eval(err) == 0) { 92 if (net_xmit_eval(err) == 0) {
diff --git a/include/net/ip_fib.h b/include/net/ip_fib.h
index a37d0432bebd..727d6e9a9685 100644
--- a/include/net/ip_fib.h
+++ b/include/net/ip_fib.h
@@ -236,8 +236,11 @@ static inline int fib_lookup(struct net *net, const struct flowi4 *flp,
236 rcu_read_lock(); 236 rcu_read_lock();
237 237
238 tb = fib_get_table(net, RT_TABLE_MAIN); 238 tb = fib_get_table(net, RT_TABLE_MAIN);
239 if (tb && !fib_table_lookup(tb, flp, res, flags | FIB_LOOKUP_NOREF)) 239 if (tb)
240 err = 0; 240 err = fib_table_lookup(tb, flp, res, flags | FIB_LOOKUP_NOREF);
241
242 if (err == -EAGAIN)
243 err = -ENETUNREACH;
241 244
242 rcu_read_unlock(); 245 rcu_read_unlock();
243 246
@@ -258,7 +261,7 @@ static inline int fib_lookup(struct net *net, struct flowi4 *flp,
258 struct fib_result *res, unsigned int flags) 261 struct fib_result *res, unsigned int flags)
259{ 262{
260 struct fib_table *tb; 263 struct fib_table *tb;
261 int err; 264 int err = -ENETUNREACH;
262 265
263 flags |= FIB_LOOKUP_NOREF; 266 flags |= FIB_LOOKUP_NOREF;
264 if (net->ipv4.fib_has_custom_rules) 267 if (net->ipv4.fib_has_custom_rules)
@@ -268,15 +271,20 @@ static inline int fib_lookup(struct net *net, struct flowi4 *flp,
268 271
269 res->tclassid = 0; 272 res->tclassid = 0;
270 273
271 for (err = 0; !err; err = -ENETUNREACH) { 274 tb = rcu_dereference_rtnl(net->ipv4.fib_main);
272 tb = rcu_dereference_rtnl(net->ipv4.fib_main); 275 if (tb)
273 if (tb && !fib_table_lookup(tb, flp, res, flags)) 276 err = fib_table_lookup(tb, flp, res, flags);
274 break; 277
278 if (!err)
279 goto out;
280
281 tb = rcu_dereference_rtnl(net->ipv4.fib_default);
282 if (tb)
283 err = fib_table_lookup(tb, flp, res, flags);
275 284
276 tb = rcu_dereference_rtnl(net->ipv4.fib_default); 285out:
277 if (tb && !fib_table_lookup(tb, flp, res, flags)) 286 if (err == -EAGAIN)
278 break; 287 err = -ENETUNREACH;
279 }
280 288
281 rcu_read_unlock(); 289 rcu_read_unlock();
282 290
diff --git a/include/net/ip_tunnels.h b/include/net/ip_tunnels.h
index 9a6a3ba888e8..f6dafec9102c 100644
--- a/include/net/ip_tunnels.h
+++ b/include/net/ip_tunnels.h
@@ -276,6 +276,8 @@ int iptunnel_pull_header(struct sk_buff *skb, int hdr_len, __be16 inner_proto);
276int iptunnel_xmit(struct sock *sk, struct rtable *rt, struct sk_buff *skb, 276int iptunnel_xmit(struct sock *sk, struct rtable *rt, struct sk_buff *skb,
277 __be32 src, __be32 dst, u8 proto, 277 __be32 src, __be32 dst, u8 proto,
278 u8 tos, u8 ttl, __be16 df, bool xnet); 278 u8 tos, u8 ttl, __be16 df, bool xnet);
279struct metadata_dst *iptunnel_metadata_reply(struct metadata_dst *md,
280 gfp_t flags);
279 281
280struct sk_buff *iptunnel_handle_offloads(struct sk_buff *skb, bool gre_csum, 282struct sk_buff *iptunnel_handle_offloads(struct sk_buff *skb, bool gre_csum,
281 int gso_type_mask); 283 int gso_type_mask);
diff --git a/include/net/route.h b/include/net/route.h
index cc61cb95f059..f46af256880c 100644
--- a/include/net/route.h
+++ b/include/net/route.h
@@ -255,7 +255,7 @@ static inline void ip_route_connect_init(struct flowi4 *fl4, __be32 dst, __be32
255 flow_flags |= FLOWI_FLAG_ANYSRC; 255 flow_flags |= FLOWI_FLAG_ANYSRC;
256 256
257 if (netif_index_is_vrf(sock_net(sk), oif)) 257 if (netif_index_is_vrf(sock_net(sk), oif))
258 flow_flags |= FLOWI_FLAG_VRFSRC; 258 flow_flags |= FLOWI_FLAG_VRFSRC | FLOWI_FLAG_SKIP_NH_OIF;
259 259
260 flowi4_init_output(fl4, oif, sk->sk_mark, tos, RT_SCOPE_UNIVERSE, 260 flowi4_init_output(fl4, oif, sk->sk_mark, tos, RT_SCOPE_UNIVERSE,
261 protocol, flow_flags, dst, src, dport, sport); 261 protocol, flow_flags, dst, src, dport, sport);
diff --git a/include/rdma/opa_port_info.h b/include/rdma/opa_port_info.h
index 391dae1931c0..a0fa975cd1c1 100644
--- a/include/rdma/opa_port_info.h
+++ b/include/rdma/opa_port_info.h
@@ -294,8 +294,8 @@ struct opa_port_states {
294 294
295struct opa_port_state_info { 295struct opa_port_state_info {
296 struct opa_port_states port_states; 296 struct opa_port_states port_states;
297 u16 link_width_downgrade_tx_active; 297 __be16 link_width_downgrade_tx_active;
298 u16 link_width_downgrade_rx_active; 298 __be16 link_width_downgrade_rx_active;
299}; 299};
300 300
301struct opa_port_info { 301struct opa_port_info {
diff --git a/include/target/target_core_base.h b/include/target/target_core_base.h
index ac9bf1c0e42d..5f48754dc36a 100644
--- a/include/target/target_core_base.h
+++ b/include/target/target_core_base.h
@@ -730,6 +730,7 @@ struct se_device {
730#define DF_EMULATED_VPD_UNIT_SERIAL 0x00000004 730#define DF_EMULATED_VPD_UNIT_SERIAL 0x00000004
731#define DF_USING_UDEV_PATH 0x00000008 731#define DF_USING_UDEV_PATH 0x00000008
732#define DF_USING_ALIAS 0x00000010 732#define DF_USING_ALIAS 0x00000010
733#define DF_READ_ONLY 0x00000020
733 /* Physical device queue depth */ 734 /* Physical device queue depth */
734 u32 queue_depth; 735 u32 queue_depth;
735 /* Used for SPC-2 reservations enforce of ISIDs */ 736 /* Used for SPC-2 reservations enforce of ISIDs */
diff --git a/include/uapi/asm-generic/unistd.h b/include/uapi/asm-generic/unistd.h
index 8da542a2874d..ee124009e12a 100644
--- a/include/uapi/asm-generic/unistd.h
+++ b/include/uapi/asm-generic/unistd.h
@@ -709,17 +709,19 @@ __SYSCALL(__NR_memfd_create, sys_memfd_create)
709__SYSCALL(__NR_bpf, sys_bpf) 709__SYSCALL(__NR_bpf, sys_bpf)
710#define __NR_execveat 281 710#define __NR_execveat 281
711__SC_COMP(__NR_execveat, sys_execveat, compat_sys_execveat) 711__SC_COMP(__NR_execveat, sys_execveat, compat_sys_execveat)
712#define __NR_membarrier 282 712#define __NR_userfaultfd 282
713__SYSCALL(__NR_userfaultfd, sys_userfaultfd)
714#define __NR_membarrier 283
713__SYSCALL(__NR_membarrier, sys_membarrier) 715__SYSCALL(__NR_membarrier, sys_membarrier)
714 716
715#undef __NR_syscalls 717#undef __NR_syscalls
716#define __NR_syscalls 283 718#define __NR_syscalls 284
717 719
718/* 720/*
719 * All syscalls below here should go away really, 721 * All syscalls below here should go away really,
720 * these are provided for both review and as a porting 722 * these are provided for both review and as a porting
721 * help for the C library version. 723 * help for the C library version.
722* 724 *
723 * Last chance: are any of these important enough to 725 * Last chance: are any of these important enough to
724 * enable by default? 726 * enable by default?
725 */ 727 */
diff --git a/include/uapi/linux/lwtunnel.h b/include/uapi/linux/lwtunnel.h
index 34141a5dfe74..f8b01887a495 100644
--- a/include/uapi/linux/lwtunnel.h
+++ b/include/uapi/linux/lwtunnel.h
@@ -21,8 +21,6 @@ enum lwtunnel_ip_t {
21 LWTUNNEL_IP_SRC, 21 LWTUNNEL_IP_SRC,
22 LWTUNNEL_IP_TTL, 22 LWTUNNEL_IP_TTL,
23 LWTUNNEL_IP_TOS, 23 LWTUNNEL_IP_TOS,
24 LWTUNNEL_IP_SPORT,
25 LWTUNNEL_IP_DPORT,
26 LWTUNNEL_IP_FLAGS, 24 LWTUNNEL_IP_FLAGS,
27 __LWTUNNEL_IP_MAX, 25 __LWTUNNEL_IP_MAX,
28}; 26};
@@ -36,8 +34,6 @@ enum lwtunnel_ip6_t {
36 LWTUNNEL_IP6_SRC, 34 LWTUNNEL_IP6_SRC,
37 LWTUNNEL_IP6_HOPLIMIT, 35 LWTUNNEL_IP6_HOPLIMIT,
38 LWTUNNEL_IP6_TC, 36 LWTUNNEL_IP6_TC,
39 LWTUNNEL_IP6_SPORT,
40 LWTUNNEL_IP6_DPORT,
41 LWTUNNEL_IP6_FLAGS, 37 LWTUNNEL_IP6_FLAGS,
42 __LWTUNNEL_IP6_MAX, 38 __LWTUNNEL_IP6_MAX,
43}; 39};
diff --git a/include/uapi/linux/userfaultfd.h b/include/uapi/linux/userfaultfd.h
index df0e09bb7dd5..9057d7af3ae1 100644
--- a/include/uapi/linux/userfaultfd.h
+++ b/include/uapi/linux/userfaultfd.h
@@ -11,8 +11,6 @@
11 11
12#include <linux/types.h> 12#include <linux/types.h>
13 13
14#include <linux/compiler.h>
15
16#define UFFD_API ((__u64)0xAA) 14#define UFFD_API ((__u64)0xAA)
17/* 15/*
18 * After implementing the respective features it will become: 16 * After implementing the respective features it will become:
diff --git a/ipc/msg.c b/ipc/msg.c
index 66c4f567eb73..1471db9a7e61 100644
--- a/ipc/msg.c
+++ b/ipc/msg.c
@@ -137,13 +137,6 @@ static int newque(struct ipc_namespace *ns, struct ipc_params *params)
137 return retval; 137 return retval;
138 } 138 }
139 139
140 /* ipc_addid() locks msq upon success. */
141 id = ipc_addid(&msg_ids(ns), &msq->q_perm, ns->msg_ctlmni);
142 if (id < 0) {
143 ipc_rcu_putref(msq, msg_rcu_free);
144 return id;
145 }
146
147 msq->q_stime = msq->q_rtime = 0; 140 msq->q_stime = msq->q_rtime = 0;
148 msq->q_ctime = get_seconds(); 141 msq->q_ctime = get_seconds();
149 msq->q_cbytes = msq->q_qnum = 0; 142 msq->q_cbytes = msq->q_qnum = 0;
@@ -153,6 +146,13 @@ static int newque(struct ipc_namespace *ns, struct ipc_params *params)
153 INIT_LIST_HEAD(&msq->q_receivers); 146 INIT_LIST_HEAD(&msq->q_receivers);
154 INIT_LIST_HEAD(&msq->q_senders); 147 INIT_LIST_HEAD(&msq->q_senders);
155 148
149 /* ipc_addid() locks msq upon success. */
150 id = ipc_addid(&msg_ids(ns), &msq->q_perm, ns->msg_ctlmni);
151 if (id < 0) {
152 ipc_rcu_putref(msq, msg_rcu_free);
153 return id;
154 }
155
156 ipc_unlock_object(&msq->q_perm); 156 ipc_unlock_object(&msq->q_perm);
157 rcu_read_unlock(); 157 rcu_read_unlock();
158 158
diff --git a/ipc/shm.c b/ipc/shm.c
index 222131e8e38f..41787276e141 100644
--- a/ipc/shm.c
+++ b/ipc/shm.c
@@ -551,12 +551,6 @@ static int newseg(struct ipc_namespace *ns, struct ipc_params *params)
551 if (IS_ERR(file)) 551 if (IS_ERR(file))
552 goto no_file; 552 goto no_file;
553 553
554 id = ipc_addid(&shm_ids(ns), &shp->shm_perm, ns->shm_ctlmni);
555 if (id < 0) {
556 error = id;
557 goto no_id;
558 }
559
560 shp->shm_cprid = task_tgid_vnr(current); 554 shp->shm_cprid = task_tgid_vnr(current);
561 shp->shm_lprid = 0; 555 shp->shm_lprid = 0;
562 shp->shm_atim = shp->shm_dtim = 0; 556 shp->shm_atim = shp->shm_dtim = 0;
@@ -565,6 +559,13 @@ static int newseg(struct ipc_namespace *ns, struct ipc_params *params)
565 shp->shm_nattch = 0; 559 shp->shm_nattch = 0;
566 shp->shm_file = file; 560 shp->shm_file = file;
567 shp->shm_creator = current; 561 shp->shm_creator = current;
562
563 id = ipc_addid(&shm_ids(ns), &shp->shm_perm, ns->shm_ctlmni);
564 if (id < 0) {
565 error = id;
566 goto no_id;
567 }
568
568 list_add(&shp->shm_clist, &current->sysvshm.shm_clist); 569 list_add(&shp->shm_clist, &current->sysvshm.shm_clist);
569 570
570 /* 571 /*
diff --git a/ipc/util.c b/ipc/util.c
index be4230020a1f..0f401d94b7c6 100644
--- a/ipc/util.c
+++ b/ipc/util.c
@@ -237,6 +237,10 @@ int ipc_addid(struct ipc_ids *ids, struct kern_ipc_perm *new, int size)
237 rcu_read_lock(); 237 rcu_read_lock();
238 spin_lock(&new->lock); 238 spin_lock(&new->lock);
239 239
240 current_euid_egid(&euid, &egid);
241 new->cuid = new->uid = euid;
242 new->gid = new->cgid = egid;
243
240 id = idr_alloc(&ids->ipcs_idr, new, 244 id = idr_alloc(&ids->ipcs_idr, new,
241 (next_id < 0) ? 0 : ipcid_to_idx(next_id), 0, 245 (next_id < 0) ? 0 : ipcid_to_idx(next_id), 0,
242 GFP_NOWAIT); 246 GFP_NOWAIT);
@@ -249,10 +253,6 @@ int ipc_addid(struct ipc_ids *ids, struct kern_ipc_perm *new, int size)
249 253
250 ids->in_use++; 254 ids->in_use++;
251 255
252 current_euid_egid(&euid, &egid);
253 new->cuid = new->uid = euid;
254 new->gid = new->cgid = egid;
255
256 if (next_id < 0) { 256 if (next_id < 0) {
257 new->seq = ids->seq++; 257 new->seq = ids->seq++;
258 if (ids->seq > IPCID_SEQ_MAX) 258 if (ids->seq > IPCID_SEQ_MAX)
diff --git a/kernel/cgroup.c b/kernel/cgroup.c
index 2cf0f79f1fc9..2c9eae6ad970 100644
--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
@@ -46,7 +46,6 @@
46#include <linux/slab.h> 46#include <linux/slab.h>
47#include <linux/spinlock.h> 47#include <linux/spinlock.h>
48#include <linux/rwsem.h> 48#include <linux/rwsem.h>
49#include <linux/percpu-rwsem.h>
50#include <linux/string.h> 49#include <linux/string.h>
51#include <linux/sort.h> 50#include <linux/sort.h>
52#include <linux/kmod.h> 51#include <linux/kmod.h>
@@ -104,8 +103,6 @@ static DEFINE_SPINLOCK(cgroup_idr_lock);
104 */ 103 */
105static DEFINE_SPINLOCK(release_agent_path_lock); 104static DEFINE_SPINLOCK(release_agent_path_lock);
106 105
107struct percpu_rw_semaphore cgroup_threadgroup_rwsem;
108
109#define cgroup_assert_mutex_or_rcu_locked() \ 106#define cgroup_assert_mutex_or_rcu_locked() \
110 RCU_LOCKDEP_WARN(!rcu_read_lock_held() && \ 107 RCU_LOCKDEP_WARN(!rcu_read_lock_held() && \
111 !lockdep_is_held(&cgroup_mutex), \ 108 !lockdep_is_held(&cgroup_mutex), \
@@ -874,6 +871,48 @@ static struct css_set *find_css_set(struct css_set *old_cset,
874 return cset; 871 return cset;
875} 872}
876 873
874void cgroup_threadgroup_change_begin(struct task_struct *tsk)
875{
876 down_read(&tsk->signal->group_rwsem);
877}
878
879void cgroup_threadgroup_change_end(struct task_struct *tsk)
880{
881 up_read(&tsk->signal->group_rwsem);
882}
883
884/**
885 * threadgroup_lock - lock threadgroup
886 * @tsk: member task of the threadgroup to lock
887 *
888 * Lock the threadgroup @tsk belongs to. No new task is allowed to enter
889 * and member tasks aren't allowed to exit (as indicated by PF_EXITING) or
890 * change ->group_leader/pid. This is useful for cases where the threadgroup
891 * needs to stay stable across blockable operations.
892 *
893 * fork and exit explicitly call threadgroup_change_{begin|end}() for
894 * synchronization. While held, no new task will be added to threadgroup
895 * and no existing live task will have its PF_EXITING set.
896 *
897 * de_thread() does threadgroup_change_{begin|end}() when a non-leader
898 * sub-thread becomes a new leader.
899 */
900static void threadgroup_lock(struct task_struct *tsk)
901{
902 down_write(&tsk->signal->group_rwsem);
903}
904
905/**
906 * threadgroup_unlock - unlock threadgroup
907 * @tsk: member task of the threadgroup to unlock
908 *
909 * Reverse threadgroup_lock().
910 */
911static inline void threadgroup_unlock(struct task_struct *tsk)
912{
913 up_write(&tsk->signal->group_rwsem);
914}
915
877static struct cgroup_root *cgroup_root_from_kf(struct kernfs_root *kf_root) 916static struct cgroup_root *cgroup_root_from_kf(struct kernfs_root *kf_root)
878{ 917{
879 struct cgroup *root_cgrp = kf_root->kn->priv; 918 struct cgroup *root_cgrp = kf_root->kn->priv;
@@ -2074,9 +2113,9 @@ static void cgroup_task_migrate(struct cgroup *old_cgrp,
2074 lockdep_assert_held(&css_set_rwsem); 2113 lockdep_assert_held(&css_set_rwsem);
2075 2114
2076 /* 2115 /*
2077 * We are synchronized through cgroup_threadgroup_rwsem against 2116 * We are synchronized through threadgroup_lock() against PF_EXITING
2078 * PF_EXITING setting such that we can't race against cgroup_exit() 2117 * setting such that we can't race against cgroup_exit() changing the
2079 * changing the css_set to init_css_set and dropping the old one. 2118 * css_set to init_css_set and dropping the old one.
2080 */ 2119 */
2081 WARN_ON_ONCE(tsk->flags & PF_EXITING); 2120 WARN_ON_ONCE(tsk->flags & PF_EXITING);
2082 old_cset = task_css_set(tsk); 2121 old_cset = task_css_set(tsk);
@@ -2133,11 +2172,10 @@ static void cgroup_migrate_finish(struct list_head *preloaded_csets)
2133 * @src_cset and add it to @preloaded_csets, which should later be cleaned 2172 * @src_cset and add it to @preloaded_csets, which should later be cleaned
2134 * up by cgroup_migrate_finish(). 2173 * up by cgroup_migrate_finish().
2135 * 2174 *
2136 * This function may be called without holding cgroup_threadgroup_rwsem 2175 * This function may be called without holding threadgroup_lock even if the
2137 * even if the target is a process. Threads may be created and destroyed 2176 * target is a process. Threads may be created and destroyed but as long
2138 * but as long as cgroup_mutex is not dropped, no new css_set can be put 2177 * as cgroup_mutex is not dropped, no new css_set can be put into play and
2139 * into play and the preloaded css_sets are guaranteed to cover all 2178 * the preloaded css_sets are guaranteed to cover all migrations.
2140 * migrations.
2141 */ 2179 */
2142static void cgroup_migrate_add_src(struct css_set *src_cset, 2180static void cgroup_migrate_add_src(struct css_set *src_cset,
2143 struct cgroup *dst_cgrp, 2181 struct cgroup *dst_cgrp,
@@ -2240,7 +2278,7 @@ err:
2240 * @threadgroup: whether @leader points to the whole process or a single task 2278 * @threadgroup: whether @leader points to the whole process or a single task
2241 * 2279 *
2242 * Migrate a process or task denoted by @leader to @cgrp. If migrating a 2280 * Migrate a process or task denoted by @leader to @cgrp. If migrating a
2243 * process, the caller must be holding cgroup_threadgroup_rwsem. The 2281 * process, the caller must be holding threadgroup_lock of @leader. The
2244 * caller is also responsible for invoking cgroup_migrate_add_src() and 2282 * caller is also responsible for invoking cgroup_migrate_add_src() and
2245 * cgroup_migrate_prepare_dst() on the targets before invoking this 2283 * cgroup_migrate_prepare_dst() on the targets before invoking this
2246 * function and following up with cgroup_migrate_finish(). 2284 * function and following up with cgroup_migrate_finish().
@@ -2368,7 +2406,7 @@ out_release_tset:
2368 * @leader: the task or the leader of the threadgroup to be attached 2406 * @leader: the task or the leader of the threadgroup to be attached
2369 * @threadgroup: attach the whole threadgroup? 2407 * @threadgroup: attach the whole threadgroup?
2370 * 2408 *
2371 * Call holding cgroup_mutex and cgroup_threadgroup_rwsem. 2409 * Call holding cgroup_mutex and threadgroup_lock of @leader.
2372 */ 2410 */
2373static int cgroup_attach_task(struct cgroup *dst_cgrp, 2411static int cgroup_attach_task(struct cgroup *dst_cgrp,
2374 struct task_struct *leader, bool threadgroup) 2412 struct task_struct *leader, bool threadgroup)
@@ -2460,13 +2498,14 @@ static ssize_t __cgroup_procs_write(struct kernfs_open_file *of, char *buf,
2460 if (!cgrp) 2498 if (!cgrp)
2461 return -ENODEV; 2499 return -ENODEV;
2462 2500
2463 percpu_down_write(&cgroup_threadgroup_rwsem); 2501retry_find_task:
2464 rcu_read_lock(); 2502 rcu_read_lock();
2465 if (pid) { 2503 if (pid) {
2466 tsk = find_task_by_vpid(pid); 2504 tsk = find_task_by_vpid(pid);
2467 if (!tsk) { 2505 if (!tsk) {
2506 rcu_read_unlock();
2468 ret = -ESRCH; 2507 ret = -ESRCH;
2469 goto out_unlock_rcu; 2508 goto out_unlock_cgroup;
2470 } 2509 }
2471 } else { 2510 } else {
2472 tsk = current; 2511 tsk = current;
@@ -2482,23 +2521,37 @@ static ssize_t __cgroup_procs_write(struct kernfs_open_file *of, char *buf,
2482 */ 2521 */
2483 if (tsk == kthreadd_task || (tsk->flags & PF_NO_SETAFFINITY)) { 2522 if (tsk == kthreadd_task || (tsk->flags & PF_NO_SETAFFINITY)) {
2484 ret = -EINVAL; 2523 ret = -EINVAL;
2485 goto out_unlock_rcu; 2524 rcu_read_unlock();
2525 goto out_unlock_cgroup;
2486 } 2526 }
2487 2527
2488 get_task_struct(tsk); 2528 get_task_struct(tsk);
2489 rcu_read_unlock(); 2529 rcu_read_unlock();
2490 2530
2531 threadgroup_lock(tsk);
2532 if (threadgroup) {
2533 if (!thread_group_leader(tsk)) {
2534 /*
2535 * a race with de_thread from another thread's exec()
2536 * may strip us of our leadership, if this happens,
2537 * there is no choice but to throw this task away and
2538 * try again; this is
2539 * "double-double-toil-and-trouble-check locking".
2540 */
2541 threadgroup_unlock(tsk);
2542 put_task_struct(tsk);
2543 goto retry_find_task;
2544 }
2545 }
2546
2491 ret = cgroup_procs_write_permission(tsk, cgrp, of); 2547 ret = cgroup_procs_write_permission(tsk, cgrp, of);
2492 if (!ret) 2548 if (!ret)
2493 ret = cgroup_attach_task(cgrp, tsk, threadgroup); 2549 ret = cgroup_attach_task(cgrp, tsk, threadgroup);
2494 2550
2495 put_task_struct(tsk); 2551 threadgroup_unlock(tsk);
2496 goto out_unlock_threadgroup;
2497 2552
2498out_unlock_rcu: 2553 put_task_struct(tsk);
2499 rcu_read_unlock(); 2554out_unlock_cgroup:
2500out_unlock_threadgroup:
2501 percpu_up_write(&cgroup_threadgroup_rwsem);
2502 cgroup_kn_unlock(of->kn); 2555 cgroup_kn_unlock(of->kn);
2503 return ret ?: nbytes; 2556 return ret ?: nbytes;
2504} 2557}
@@ -2643,8 +2696,6 @@ static int cgroup_update_dfl_csses(struct cgroup *cgrp)
2643 2696
2644 lockdep_assert_held(&cgroup_mutex); 2697 lockdep_assert_held(&cgroup_mutex);
2645 2698
2646 percpu_down_write(&cgroup_threadgroup_rwsem);
2647
2648 /* look up all csses currently attached to @cgrp's subtree */ 2699 /* look up all csses currently attached to @cgrp's subtree */
2649 down_read(&css_set_rwsem); 2700 down_read(&css_set_rwsem);
2650 css_for_each_descendant_pre(css, cgroup_css(cgrp, NULL)) { 2701 css_for_each_descendant_pre(css, cgroup_css(cgrp, NULL)) {
@@ -2700,8 +2751,17 @@ static int cgroup_update_dfl_csses(struct cgroup *cgrp)
2700 goto out_finish; 2751 goto out_finish;
2701 last_task = task; 2752 last_task = task;
2702 2753
2754 threadgroup_lock(task);
2755 /* raced against de_thread() from another thread? */
2756 if (!thread_group_leader(task)) {
2757 threadgroup_unlock(task);
2758 put_task_struct(task);
2759 continue;
2760 }
2761
2703 ret = cgroup_migrate(src_cset->dfl_cgrp, task, true); 2762 ret = cgroup_migrate(src_cset->dfl_cgrp, task, true);
2704 2763
2764 threadgroup_unlock(task);
2705 put_task_struct(task); 2765 put_task_struct(task);
2706 2766
2707 if (WARN(ret, "cgroup: failed to update controllers for the default hierarchy (%d), further operations may crash or hang\n", ret)) 2767 if (WARN(ret, "cgroup: failed to update controllers for the default hierarchy (%d), further operations may crash or hang\n", ret))
@@ -2711,7 +2771,6 @@ static int cgroup_update_dfl_csses(struct cgroup *cgrp)
2711 2771
2712out_finish: 2772out_finish:
2713 cgroup_migrate_finish(&preloaded_csets); 2773 cgroup_migrate_finish(&preloaded_csets);
2714 percpu_up_write(&cgroup_threadgroup_rwsem);
2715 return ret; 2774 return ret;
2716} 2775}
2717 2776
@@ -5024,7 +5083,6 @@ int __init cgroup_init(void)
5024 unsigned long key; 5083 unsigned long key;
5025 int ssid, err; 5084 int ssid, err;
5026 5085
5027 BUG_ON(percpu_init_rwsem(&cgroup_threadgroup_rwsem));
5028 BUG_ON(cgroup_init_cftypes(NULL, cgroup_dfl_base_files)); 5086 BUG_ON(cgroup_init_cftypes(NULL, cgroup_dfl_base_files));
5029 BUG_ON(cgroup_init_cftypes(NULL, cgroup_legacy_base_files)); 5087 BUG_ON(cgroup_init_cftypes(NULL, cgroup_legacy_base_files));
5030 5088
diff --git a/kernel/events/core.c b/kernel/events/core.c
index f548f69c4299..b11756f9b6dc 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -1243,11 +1243,7 @@ static inline void perf_event__state_init(struct perf_event *event)
1243 PERF_EVENT_STATE_INACTIVE; 1243 PERF_EVENT_STATE_INACTIVE;
1244} 1244}
1245 1245
1246/* 1246static void __perf_event_read_size(struct perf_event *event, int nr_siblings)
1247 * Called at perf_event creation and when events are attached/detached from a
1248 * group.
1249 */
1250static void perf_event__read_size(struct perf_event *event)
1251{ 1247{
1252 int entry = sizeof(u64); /* value */ 1248 int entry = sizeof(u64); /* value */
1253 int size = 0; 1249 int size = 0;
@@ -1263,7 +1259,7 @@ static void perf_event__read_size(struct perf_event *event)
1263 entry += sizeof(u64); 1259 entry += sizeof(u64);
1264 1260
1265 if (event->attr.read_format & PERF_FORMAT_GROUP) { 1261 if (event->attr.read_format & PERF_FORMAT_GROUP) {
1266 nr += event->group_leader->nr_siblings; 1262 nr += nr_siblings;
1267 size += sizeof(u64); 1263 size += sizeof(u64);
1268 } 1264 }
1269 1265
@@ -1271,14 +1267,11 @@ static void perf_event__read_size(struct perf_event *event)
1271 event->read_size = size; 1267 event->read_size = size;
1272} 1268}
1273 1269
1274static void perf_event__header_size(struct perf_event *event) 1270static void __perf_event_header_size(struct perf_event *event, u64 sample_type)
1275{ 1271{
1276 struct perf_sample_data *data; 1272 struct perf_sample_data *data;
1277 u64 sample_type = event->attr.sample_type;
1278 u16 size = 0; 1273 u16 size = 0;
1279 1274
1280 perf_event__read_size(event);
1281
1282 if (sample_type & PERF_SAMPLE_IP) 1275 if (sample_type & PERF_SAMPLE_IP)
1283 size += sizeof(data->ip); 1276 size += sizeof(data->ip);
1284 1277
@@ -1303,6 +1296,17 @@ static void perf_event__header_size(struct perf_event *event)
1303 event->header_size = size; 1296 event->header_size = size;
1304} 1297}
1305 1298
1299/*
1300 * Called at perf_event creation and when events are attached/detached from a
1301 * group.
1302 */
1303static void perf_event__header_size(struct perf_event *event)
1304{
1305 __perf_event_read_size(event,
1306 event->group_leader->nr_siblings);
1307 __perf_event_header_size(event, event->attr.sample_type);
1308}
1309
1306static void perf_event__id_header_size(struct perf_event *event) 1310static void perf_event__id_header_size(struct perf_event *event)
1307{ 1311{
1308 struct perf_sample_data *data; 1312 struct perf_sample_data *data;
@@ -1330,6 +1334,27 @@ static void perf_event__id_header_size(struct perf_event *event)
1330 event->id_header_size = size; 1334 event->id_header_size = size;
1331} 1335}
1332 1336
1337static bool perf_event_validate_size(struct perf_event *event)
1338{
1339 /*
1340 * The values computed here will be over-written when we actually
1341 * attach the event.
1342 */
1343 __perf_event_read_size(event, event->group_leader->nr_siblings + 1);
1344 __perf_event_header_size(event, event->attr.sample_type & ~PERF_SAMPLE_READ);
1345 perf_event__id_header_size(event);
1346
1347 /*
1348 * Sum the lot; should not exceed the 64k limit we have on records.
1349 * Conservative limit to allow for callchains and other variable fields.
1350 */
1351 if (event->read_size + event->header_size +
1352 event->id_header_size + sizeof(struct perf_event_header) >= 16*1024)
1353 return false;
1354
1355 return true;
1356}
1357
1333static void perf_group_attach(struct perf_event *event) 1358static void perf_group_attach(struct perf_event *event)
1334{ 1359{
1335 struct perf_event *group_leader = event->group_leader, *pos; 1360 struct perf_event *group_leader = event->group_leader, *pos;
@@ -8297,13 +8322,35 @@ SYSCALL_DEFINE5(perf_event_open,
8297 8322
8298 if (move_group) { 8323 if (move_group) {
8299 gctx = group_leader->ctx; 8324 gctx = group_leader->ctx;
8325 mutex_lock_double(&gctx->mutex, &ctx->mutex);
8326 } else {
8327 mutex_lock(&ctx->mutex);
8328 }
8300 8329
8330 if (!perf_event_validate_size(event)) {
8331 err = -E2BIG;
8332 goto err_locked;
8333 }
8334
8335 /*
8336 * Must be under the same ctx::mutex as perf_install_in_context(),
8337 * because we need to serialize with concurrent event creation.
8338 */
8339 if (!exclusive_event_installable(event, ctx)) {
8340 /* exclusive and group stuff are assumed mutually exclusive */
8341 WARN_ON_ONCE(move_group);
8342
8343 err = -EBUSY;
8344 goto err_locked;
8345 }
8346
8347 WARN_ON_ONCE(ctx->parent_ctx);
8348
8349 if (move_group) {
8301 /* 8350 /*
8302 * See perf_event_ctx_lock() for comments on the details 8351 * See perf_event_ctx_lock() for comments on the details
8303 * of swizzling perf_event::ctx. 8352 * of swizzling perf_event::ctx.
8304 */ 8353 */
8305 mutex_lock_double(&gctx->mutex, &ctx->mutex);
8306
8307 perf_remove_from_context(group_leader, false); 8354 perf_remove_from_context(group_leader, false);
8308 8355
8309 list_for_each_entry(sibling, &group_leader->sibling_list, 8356 list_for_each_entry(sibling, &group_leader->sibling_list,
@@ -8311,13 +8358,7 @@ SYSCALL_DEFINE5(perf_event_open,
8311 perf_remove_from_context(sibling, false); 8358 perf_remove_from_context(sibling, false);
8312 put_ctx(gctx); 8359 put_ctx(gctx);
8313 } 8360 }
8314 } else {
8315 mutex_lock(&ctx->mutex);
8316 }
8317 8361
8318 WARN_ON_ONCE(ctx->parent_ctx);
8319
8320 if (move_group) {
8321 /* 8362 /*
8322 * Wait for everybody to stop referencing the events through 8363 * Wait for everybody to stop referencing the events through
8323 * the old lists, before installing it on new lists. 8364 * the old lists, before installing it on new lists.
@@ -8349,22 +8390,29 @@ SYSCALL_DEFINE5(perf_event_open,
8349 perf_event__state_init(group_leader); 8390 perf_event__state_init(group_leader);
8350 perf_install_in_context(ctx, group_leader, group_leader->cpu); 8391 perf_install_in_context(ctx, group_leader, group_leader->cpu);
8351 get_ctx(ctx); 8392 get_ctx(ctx);
8352 }
8353 8393
8354 if (!exclusive_event_installable(event, ctx)) { 8394 /*
8355 err = -EBUSY; 8395 * Now that all events are installed in @ctx, nothing
8356 mutex_unlock(&ctx->mutex); 8396 * references @gctx anymore, so drop the last reference we have
8357 fput(event_file); 8397 * on it.
8358 goto err_context; 8398 */
8399 put_ctx(gctx);
8359 } 8400 }
8360 8401
8402 /*
8403 * Precalculate sample_data sizes; do while holding ctx::mutex such
8404 * that we're serialized against further additions and before
8405 * perf_install_in_context() which is the point the event is active and
8406 * can use these values.
8407 */
8408 perf_event__header_size(event);
8409 perf_event__id_header_size(event);
8410
8361 perf_install_in_context(ctx, event, event->cpu); 8411 perf_install_in_context(ctx, event, event->cpu);
8362 perf_unpin_context(ctx); 8412 perf_unpin_context(ctx);
8363 8413
8364 if (move_group) { 8414 if (move_group)
8365 mutex_unlock(&gctx->mutex); 8415 mutex_unlock(&gctx->mutex);
8366 put_ctx(gctx);
8367 }
8368 mutex_unlock(&ctx->mutex); 8416 mutex_unlock(&ctx->mutex);
8369 8417
8370 put_online_cpus(); 8418 put_online_cpus();
@@ -8376,12 +8424,6 @@ SYSCALL_DEFINE5(perf_event_open,
8376 mutex_unlock(&current->perf_event_mutex); 8424 mutex_unlock(&current->perf_event_mutex);
8377 8425
8378 /* 8426 /*
8379 * Precalculate sample_data sizes
8380 */
8381 perf_event__header_size(event);
8382 perf_event__id_header_size(event);
8383
8384 /*
8385 * Drop the reference on the group_event after placing the 8427 * Drop the reference on the group_event after placing the
8386 * new event on the sibling_list. This ensures destruction 8428 * new event on the sibling_list. This ensures destruction
8387 * of the group leader will find the pointer to itself in 8429 * of the group leader will find the pointer to itself in
@@ -8391,6 +8433,12 @@ SYSCALL_DEFINE5(perf_event_open,
8391 fd_install(event_fd, event_file); 8433 fd_install(event_fd, event_file);
8392 return event_fd; 8434 return event_fd;
8393 8435
8436err_locked:
8437 if (move_group)
8438 mutex_unlock(&gctx->mutex);
8439 mutex_unlock(&ctx->mutex);
8440/* err_file: */
8441 fput(event_file);
8394err_context: 8442err_context:
8395 perf_unpin_context(ctx); 8443 perf_unpin_context(ctx);
8396 put_ctx(ctx); 8444 put_ctx(ctx);
diff --git a/kernel/fork.c b/kernel/fork.c
index 7d5f0f118a63..2845623fb582 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -1149,6 +1149,10 @@ static int copy_signal(unsigned long clone_flags, struct task_struct *tsk)
1149 tty_audit_fork(sig); 1149 tty_audit_fork(sig);
1150 sched_autogroup_fork(sig); 1150 sched_autogroup_fork(sig);
1151 1151
1152#ifdef CONFIG_CGROUPS
1153 init_rwsem(&sig->group_rwsem);
1154#endif
1155
1152 sig->oom_score_adj = current->signal->oom_score_adj; 1156 sig->oom_score_adj = current->signal->oom_score_adj;
1153 sig->oom_score_adj_min = current->signal->oom_score_adj_min; 1157 sig->oom_score_adj_min = current->signal->oom_score_adj_min;
1154 1158
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index 6e40a9539763..e28169dd1c36 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -83,7 +83,7 @@ int irq_set_handler_data(unsigned int irq, void *data)
83 83
84 if (!desc) 84 if (!desc)
85 return -EINVAL; 85 return -EINVAL;
86 desc->irq_data.handler_data = data; 86 desc->irq_common_data.handler_data = data;
87 irq_put_desc_unlock(desc, flags); 87 irq_put_desc_unlock(desc, flags);
88 return 0; 88 return 0;
89} 89}
@@ -105,7 +105,7 @@ int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
105 105
106 if (!desc) 106 if (!desc)
107 return -EINVAL; 107 return -EINVAL;
108 desc->irq_data.msi_desc = entry; 108 desc->irq_common_data.msi_desc = entry;
109 if (entry && !irq_offset) 109 if (entry && !irq_offset)
110 entry->irq = irq_base; 110 entry->irq = irq_base;
111 irq_put_desc_unlock(desc, flags); 111 irq_put_desc_unlock(desc, flags);
@@ -372,7 +372,6 @@ static bool irq_may_run(struct irq_desc *desc)
372 372
373/** 373/**
374 * handle_simple_irq - Simple and software-decoded IRQs. 374 * handle_simple_irq - Simple and software-decoded IRQs.
375 * @irq: the interrupt number
376 * @desc: the interrupt description structure for this irq 375 * @desc: the interrupt description structure for this irq
377 * 376 *
378 * Simple interrupts are either sent from a demultiplexing interrupt 377 * Simple interrupts are either sent from a demultiplexing interrupt
@@ -382,8 +381,7 @@ static bool irq_may_run(struct irq_desc *desc)
382 * Note: The caller is expected to handle the ack, clear, mask and 381 * Note: The caller is expected to handle the ack, clear, mask and
383 * unmask issues if necessary. 382 * unmask issues if necessary.
384 */ 383 */
385void 384void handle_simple_irq(struct irq_desc *desc)
386handle_simple_irq(unsigned int irq, struct irq_desc *desc)
387{ 385{
388 raw_spin_lock(&desc->lock); 386 raw_spin_lock(&desc->lock);
389 387
@@ -425,7 +423,6 @@ static void cond_unmask_irq(struct irq_desc *desc)
425 423
426/** 424/**
427 * handle_level_irq - Level type irq handler 425 * handle_level_irq - Level type irq handler
428 * @irq: the interrupt number
429 * @desc: the interrupt description structure for this irq 426 * @desc: the interrupt description structure for this irq
430 * 427 *
431 * Level type interrupts are active as long as the hardware line has 428 * Level type interrupts are active as long as the hardware line has
@@ -433,8 +430,7 @@ static void cond_unmask_irq(struct irq_desc *desc)
433 * it after the associated handler has acknowledged the device, so the 430 * it after the associated handler has acknowledged the device, so the
434 * interrupt line is back to inactive. 431 * interrupt line is back to inactive.
435 */ 432 */
436void 433void handle_level_irq(struct irq_desc *desc)
437handle_level_irq(unsigned int irq, struct irq_desc *desc)
438{ 434{
439 raw_spin_lock(&desc->lock); 435 raw_spin_lock(&desc->lock);
440 mask_ack_irq(desc); 436 mask_ack_irq(desc);
@@ -496,7 +492,6 @@ static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
496 492
497/** 493/**
498 * handle_fasteoi_irq - irq handler for transparent controllers 494 * handle_fasteoi_irq - irq handler for transparent controllers
499 * @irq: the interrupt number
500 * @desc: the interrupt description structure for this irq 495 * @desc: the interrupt description structure for this irq
501 * 496 *
502 * Only a single callback will be issued to the chip: an ->eoi() 497 * Only a single callback will be issued to the chip: an ->eoi()
@@ -504,8 +499,7 @@ static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
504 * for modern forms of interrupt handlers, which handle the flow 499 * for modern forms of interrupt handlers, which handle the flow
505 * details in hardware, transparently. 500 * details in hardware, transparently.
506 */ 501 */
507void 502void handle_fasteoi_irq(struct irq_desc *desc)
508handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
509{ 503{
510 struct irq_chip *chip = desc->irq_data.chip; 504 struct irq_chip *chip = desc->irq_data.chip;
511 505
@@ -546,7 +540,6 @@ EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
546 540
547/** 541/**
548 * handle_edge_irq - edge type IRQ handler 542 * handle_edge_irq - edge type IRQ handler
549 * @irq: the interrupt number
550 * @desc: the interrupt description structure for this irq 543 * @desc: the interrupt description structure for this irq
551 * 544 *
552 * Interrupt occures on the falling and/or rising edge of a hardware 545 * Interrupt occures on the falling and/or rising edge of a hardware
@@ -560,8 +553,7 @@ EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
560 * the handler was running. If all pending interrupts are handled, the 553 * the handler was running. If all pending interrupts are handled, the
561 * loop is left. 554 * loop is left.
562 */ 555 */
563void 556void handle_edge_irq(struct irq_desc *desc)
564handle_edge_irq(unsigned int irq, struct irq_desc *desc)
565{ 557{
566 raw_spin_lock(&desc->lock); 558 raw_spin_lock(&desc->lock);
567 559
@@ -618,13 +610,12 @@ EXPORT_SYMBOL(handle_edge_irq);
618#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER 610#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
619/** 611/**
620 * handle_edge_eoi_irq - edge eoi type IRQ handler 612 * handle_edge_eoi_irq - edge eoi type IRQ handler
621 * @irq: the interrupt number
622 * @desc: the interrupt description structure for this irq 613 * @desc: the interrupt description structure for this irq
623 * 614 *
624 * Similar as the above handle_edge_irq, but using eoi and w/o the 615 * Similar as the above handle_edge_irq, but using eoi and w/o the
625 * mask/unmask logic. 616 * mask/unmask logic.
626 */ 617 */
627void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc) 618void handle_edge_eoi_irq(struct irq_desc *desc)
628{ 619{
629 struct irq_chip *chip = irq_desc_get_chip(desc); 620 struct irq_chip *chip = irq_desc_get_chip(desc);
630 621
@@ -665,13 +656,11 @@ out_eoi:
665 656
666/** 657/**
667 * handle_percpu_irq - Per CPU local irq handler 658 * handle_percpu_irq - Per CPU local irq handler
668 * @irq: the interrupt number
669 * @desc: the interrupt description structure for this irq 659 * @desc: the interrupt description structure for this irq
670 * 660 *
671 * Per CPU interrupts on SMP machines without locking requirements 661 * Per CPU interrupts on SMP machines without locking requirements
672 */ 662 */
673void 663void handle_percpu_irq(struct irq_desc *desc)
674handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
675{ 664{
676 struct irq_chip *chip = irq_desc_get_chip(desc); 665 struct irq_chip *chip = irq_desc_get_chip(desc);
677 666
@@ -688,7 +677,6 @@ handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
688 677
689/** 678/**
690 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids 679 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
691 * @irq: the interrupt number
692 * @desc: the interrupt description structure for this irq 680 * @desc: the interrupt description structure for this irq
693 * 681 *
694 * Per CPU interrupts on SMP machines without locking requirements. Same as 682 * Per CPU interrupts on SMP machines without locking requirements. Same as
@@ -698,11 +686,12 @@ handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
698 * contain the real device id for the cpu on which this handler is 686 * contain the real device id for the cpu on which this handler is
699 * called 687 * called
700 */ 688 */
701void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc) 689void handle_percpu_devid_irq(struct irq_desc *desc)
702{ 690{
703 struct irq_chip *chip = irq_desc_get_chip(desc); 691 struct irq_chip *chip = irq_desc_get_chip(desc);
704 struct irqaction *action = desc->action; 692 struct irqaction *action = desc->action;
705 void *dev_id = raw_cpu_ptr(action->percpu_dev_id); 693 void *dev_id = raw_cpu_ptr(action->percpu_dev_id);
694 unsigned int irq = irq_desc_get_irq(desc);
706 irqreturn_t res; 695 irqreturn_t res;
707 696
708 kstat_incr_irqs_this_cpu(desc); 697 kstat_incr_irqs_this_cpu(desc);
@@ -796,7 +785,7 @@ irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
796 return; 785 return;
797 786
798 __irq_do_set_handler(desc, handle, 1, NULL); 787 __irq_do_set_handler(desc, handle, 1, NULL);
799 desc->irq_data.handler_data = data; 788 desc->irq_common_data.handler_data = data;
800 789
801 irq_put_desc_busunlock(desc, flags); 790 irq_put_desc_busunlock(desc, flags);
802} 791}
diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c
index b6eeea8a80c5..de41a68fc038 100644
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -27,8 +27,10 @@
27 * 27 *
28 * Handles spurious and unhandled IRQ's. It also prints a debugmessage. 28 * Handles spurious and unhandled IRQ's. It also prints a debugmessage.
29 */ 29 */
30void handle_bad_irq(unsigned int irq, struct irq_desc *desc) 30void handle_bad_irq(struct irq_desc *desc)
31{ 31{
32 unsigned int irq = irq_desc_get_irq(desc);
33
32 print_irq_desc(irq, desc); 34 print_irq_desc(irq, desc);
33 kstat_incr_irqs_this_cpu(desc); 35 kstat_incr_irqs_this_cpu(desc);
34 ack_bad_irq(irq); 36 ack_bad_irq(irq);
diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h
index eee4b385cffb..5ef0c2dbe930 100644
--- a/kernel/irq/internals.h
+++ b/kernel/irq/internals.h
@@ -194,7 +194,7 @@ static inline void kstat_incr_irqs_this_cpu(struct irq_desc *desc)
194 194
195static inline int irq_desc_get_node(struct irq_desc *desc) 195static inline int irq_desc_get_node(struct irq_desc *desc)
196{ 196{
197 return irq_data_get_node(&desc->irq_data); 197 return irq_common_data_get_node(&desc->irq_common_data);
198} 198}
199 199
200#ifdef CONFIG_PM_SLEEP 200#ifdef CONFIG_PM_SLEEP
diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c
index 0a2a4b697bcb..239e2ae2c947 100644
--- a/kernel/irq/irqdesc.c
+++ b/kernel/irq/irqdesc.c
@@ -38,12 +38,13 @@ static void __init init_irq_default_affinity(void)
38#ifdef CONFIG_SMP 38#ifdef CONFIG_SMP
39static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) 39static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node)
40{ 40{
41 if (!zalloc_cpumask_var_node(&desc->irq_data.affinity, gfp, node)) 41 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity,
42 gfp, node))
42 return -ENOMEM; 43 return -ENOMEM;
43 44
44#ifdef CONFIG_GENERIC_PENDING_IRQ 45#ifdef CONFIG_GENERIC_PENDING_IRQ
45 if (!zalloc_cpumask_var_node(&desc->pending_mask, gfp, node)) { 46 if (!zalloc_cpumask_var_node(&desc->pending_mask, gfp, node)) {
46 free_cpumask_var(desc->irq_data.affinity); 47 free_cpumask_var(desc->irq_common_data.affinity);
47 return -ENOMEM; 48 return -ENOMEM;
48 } 49 }
49#endif 50#endif
@@ -52,11 +53,13 @@ static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node)
52 53
53static void desc_smp_init(struct irq_desc *desc, int node) 54static void desc_smp_init(struct irq_desc *desc, int node)
54{ 55{
55 desc->irq_data.node = node; 56 cpumask_copy(desc->irq_common_data.affinity, irq_default_affinity);
56 cpumask_copy(desc->irq_data.affinity, irq_default_affinity);
57#ifdef CONFIG_GENERIC_PENDING_IRQ 57#ifdef CONFIG_GENERIC_PENDING_IRQ
58 cpumask_clear(desc->pending_mask); 58 cpumask_clear(desc->pending_mask);
59#endif 59#endif
60#ifdef CONFIG_NUMA
61 desc->irq_common_data.node = node;
62#endif
60} 63}
61 64
62#else 65#else
@@ -70,12 +73,13 @@ static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node,
70{ 73{
71 int cpu; 74 int cpu;
72 75
76 desc->irq_common_data.handler_data = NULL;
77 desc->irq_common_data.msi_desc = NULL;
78
73 desc->irq_data.common = &desc->irq_common_data; 79 desc->irq_data.common = &desc->irq_common_data;
74 desc->irq_data.irq = irq; 80 desc->irq_data.irq = irq;
75 desc->irq_data.chip = &no_irq_chip; 81 desc->irq_data.chip = &no_irq_chip;
76 desc->irq_data.chip_data = NULL; 82 desc->irq_data.chip_data = NULL;
77 desc->irq_data.handler_data = NULL;
78 desc->irq_data.msi_desc = NULL;
79 irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS); 83 irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
80 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED); 84 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
81 desc->handle_irq = handle_bad_irq; 85 desc->handle_irq = handle_bad_irq;
@@ -121,7 +125,7 @@ static void free_masks(struct irq_desc *desc)
121#ifdef CONFIG_GENERIC_PENDING_IRQ 125#ifdef CONFIG_GENERIC_PENDING_IRQ
122 free_cpumask_var(desc->pending_mask); 126 free_cpumask_var(desc->pending_mask);
123#endif 127#endif
124 free_cpumask_var(desc->irq_data.affinity); 128 free_cpumask_var(desc->irq_common_data.affinity);
125} 129}
126#else 130#else
127static inline void free_masks(struct irq_desc *desc) { } 131static inline void free_masks(struct irq_desc *desc) { }
@@ -343,7 +347,7 @@ int generic_handle_irq(unsigned int irq)
343 347
344 if (!desc) 348 if (!desc)
345 return -EINVAL; 349 return -EINVAL;
346 generic_handle_irq_desc(irq, desc); 350 generic_handle_irq_desc(desc);
347 return 0; 351 return 0;
348} 352}
349EXPORT_SYMBOL_GPL(generic_handle_irq); 353EXPORT_SYMBOL_GPL(generic_handle_irq);
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
index 79baaf8a7813..dc9d27c0c158 100644
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -844,7 +844,6 @@ static struct irq_data *irq_domain_insert_irq_data(struct irq_domain *domain,
844 child->parent_data = irq_data; 844 child->parent_data = irq_data;
845 irq_data->irq = child->irq; 845 irq_data->irq = child->irq;
846 irq_data->common = child->common; 846 irq_data->common = child->common;
847 irq_data->node = child->node;
848 irq_data->domain = domain; 847 irq_data->domain = domain;
849 } 848 }
850 849
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index ad1b064f94fe..f9a59f6cabd2 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -192,7 +192,7 @@ int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
192 switch (ret) { 192 switch (ret) {
193 case IRQ_SET_MASK_OK: 193 case IRQ_SET_MASK_OK:
194 case IRQ_SET_MASK_OK_DONE: 194 case IRQ_SET_MASK_OK_DONE:
195 cpumask_copy(data->affinity, mask); 195 cpumask_copy(desc->irq_common_data.affinity, mask);
196 case IRQ_SET_MASK_OK_NOCOPY: 196 case IRQ_SET_MASK_OK_NOCOPY:
197 irq_set_thread_affinity(desc); 197 irq_set_thread_affinity(desc);
198 ret = 0; 198 ret = 0;
@@ -304,7 +304,7 @@ static void irq_affinity_notify(struct work_struct *work)
304 if (irq_move_pending(&desc->irq_data)) 304 if (irq_move_pending(&desc->irq_data))
305 irq_get_pending(cpumask, desc); 305 irq_get_pending(cpumask, desc);
306 else 306 else
307 cpumask_copy(cpumask, desc->irq_data.affinity); 307 cpumask_copy(cpumask, desc->irq_common_data.affinity);
308 raw_spin_unlock_irqrestore(&desc->lock, flags); 308 raw_spin_unlock_irqrestore(&desc->lock, flags);
309 309
310 notify->notify(notify, cpumask); 310 notify->notify(notify, cpumask);
@@ -375,9 +375,9 @@ static int setup_affinity(struct irq_desc *desc, struct cpumask *mask)
375 * one of the targets is online. 375 * one of the targets is online.
376 */ 376 */
377 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) { 377 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
378 if (cpumask_intersects(desc->irq_data.affinity, 378 if (cpumask_intersects(desc->irq_common_data.affinity,
379 cpu_online_mask)) 379 cpu_online_mask))
380 set = desc->irq_data.affinity; 380 set = desc->irq_common_data.affinity;
381 else 381 else
382 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET); 382 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
383 } 383 }
@@ -829,8 +829,8 @@ irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
829 * This code is triggered unconditionally. Check the affinity 829 * This code is triggered unconditionally. Check the affinity
830 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out. 830 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
831 */ 831 */
832 if (desc->irq_data.affinity) 832 if (desc->irq_common_data.affinity)
833 cpumask_copy(mask, desc->irq_data.affinity); 833 cpumask_copy(mask, desc->irq_common_data.affinity);
834 else 834 else
835 valid = false; 835 valid = false;
836 raw_spin_unlock_irq(&desc->lock); 836 raw_spin_unlock_irq(&desc->lock);
diff --git a/kernel/irq/proc.c b/kernel/irq/proc.c
index 0e97c142ce40..a50ddc9417ff 100644
--- a/kernel/irq/proc.c
+++ b/kernel/irq/proc.c
@@ -12,6 +12,7 @@
12#include <linux/seq_file.h> 12#include <linux/seq_file.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/kernel_stat.h> 14#include <linux/kernel_stat.h>
15#include <linux/mutex.h>
15 16
16#include "internals.h" 17#include "internals.h"
17 18
@@ -39,7 +40,7 @@ static struct proc_dir_entry *root_irq_dir;
39static int show_irq_affinity(int type, struct seq_file *m, void *v) 40static int show_irq_affinity(int type, struct seq_file *m, void *v)
40{ 41{
41 struct irq_desc *desc = irq_to_desc((long)m->private); 42 struct irq_desc *desc = irq_to_desc((long)m->private);
42 const struct cpumask *mask = desc->irq_data.affinity; 43 const struct cpumask *mask = desc->irq_common_data.affinity;
43 44
44#ifdef CONFIG_GENERIC_PENDING_IRQ 45#ifdef CONFIG_GENERIC_PENDING_IRQ
45 if (irqd_is_setaffinity_pending(&desc->irq_data)) 46 if (irqd_is_setaffinity_pending(&desc->irq_data))
@@ -323,18 +324,29 @@ void register_handler_proc(unsigned int irq, struct irqaction *action)
323 324
324void register_irq_proc(unsigned int irq, struct irq_desc *desc) 325void register_irq_proc(unsigned int irq, struct irq_desc *desc)
325{ 326{
327 static DEFINE_MUTEX(register_lock);
326 char name [MAX_NAMELEN]; 328 char name [MAX_NAMELEN];
327 329
328 if (!root_irq_dir || (desc->irq_data.chip == &no_irq_chip) || desc->dir) 330 if (!root_irq_dir || (desc->irq_data.chip == &no_irq_chip))
329 return; 331 return;
330 332
333 /*
334 * irq directories are registered only when a handler is
335 * added, not when the descriptor is created, so multiple
336 * tasks might try to register at the same time.
337 */
338 mutex_lock(&register_lock);
339
340 if (desc->dir)
341 goto out_unlock;
342
331 memset(name, 0, MAX_NAMELEN); 343 memset(name, 0, MAX_NAMELEN);
332 sprintf(name, "%d", irq); 344 sprintf(name, "%d", irq);
333 345
334 /* create /proc/irq/1234 */ 346 /* create /proc/irq/1234 */
335 desc->dir = proc_mkdir(name, root_irq_dir); 347 desc->dir = proc_mkdir(name, root_irq_dir);
336 if (!desc->dir) 348 if (!desc->dir)
337 return; 349 goto out_unlock;
338 350
339#ifdef CONFIG_SMP 351#ifdef CONFIG_SMP
340 /* create /proc/irq/<irq>/smp_affinity */ 352 /* create /proc/irq/<irq>/smp_affinity */
@@ -355,6 +367,9 @@ void register_irq_proc(unsigned int irq, struct irq_desc *desc)
355 367
356 proc_create_data("spurious", 0444, desc->dir, 368 proc_create_data("spurious", 0444, desc->dir,
357 &irq_spurious_proc_fops, (void *)(long)irq); 369 &irq_spurious_proc_fops, (void *)(long)irq);
370
371out_unlock:
372 mutex_unlock(&register_lock);
358} 373}
359 374
360void unregister_irq_proc(unsigned int irq, struct irq_desc *desc) 375void unregister_irq_proc(unsigned int irq, struct irq_desc *desc)
diff --git a/kernel/irq/resend.c b/kernel/irq/resend.c
index dd95f44f99b2..b86886beee4f 100644
--- a/kernel/irq/resend.c
+++ b/kernel/irq/resend.c
@@ -38,7 +38,7 @@ static void resend_irqs(unsigned long arg)
38 clear_bit(irq, irqs_resend); 38 clear_bit(irq, irqs_resend);
39 desc = irq_to_desc(irq); 39 desc = irq_to_desc(irq);
40 local_irq_disable(); 40 local_irq_disable();
41 desc->handle_irq(irq, desc); 41 desc->handle_irq(desc);
42 local_irq_enable(); 42 local_irq_enable();
43 } 43 }
44} 44}
diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c
index 8acfbf773e06..4e49cc4c9952 100644
--- a/kernel/locking/lockdep.c
+++ b/kernel/locking/lockdep.c
@@ -3068,7 +3068,7 @@ static int __lock_is_held(struct lockdep_map *lock);
3068static int __lock_acquire(struct lockdep_map *lock, unsigned int subclass, 3068static int __lock_acquire(struct lockdep_map *lock, unsigned int subclass,
3069 int trylock, int read, int check, int hardirqs_off, 3069 int trylock, int read, int check, int hardirqs_off,
3070 struct lockdep_map *nest_lock, unsigned long ip, 3070 struct lockdep_map *nest_lock, unsigned long ip,
3071 int references) 3071 int references, int pin_count)
3072{ 3072{
3073 struct task_struct *curr = current; 3073 struct task_struct *curr = current;
3074 struct lock_class *class = NULL; 3074 struct lock_class *class = NULL;
@@ -3157,7 +3157,7 @@ static int __lock_acquire(struct lockdep_map *lock, unsigned int subclass,
3157 hlock->waittime_stamp = 0; 3157 hlock->waittime_stamp = 0;
3158 hlock->holdtime_stamp = lockstat_clock(); 3158 hlock->holdtime_stamp = lockstat_clock();
3159#endif 3159#endif
3160 hlock->pin_count = 0; 3160 hlock->pin_count = pin_count;
3161 3161
3162 if (check && !mark_irqflags(curr, hlock)) 3162 if (check && !mark_irqflags(curr, hlock))
3163 return 0; 3163 return 0;
@@ -3343,7 +3343,7 @@ found_it:
3343 hlock_class(hlock)->subclass, hlock->trylock, 3343 hlock_class(hlock)->subclass, hlock->trylock,
3344 hlock->read, hlock->check, hlock->hardirqs_off, 3344 hlock->read, hlock->check, hlock->hardirqs_off,
3345 hlock->nest_lock, hlock->acquire_ip, 3345 hlock->nest_lock, hlock->acquire_ip,
3346 hlock->references)) 3346 hlock->references, hlock->pin_count))
3347 return 0; 3347 return 0;
3348 } 3348 }
3349 3349
@@ -3433,7 +3433,7 @@ found_it:
3433 hlock_class(hlock)->subclass, hlock->trylock, 3433 hlock_class(hlock)->subclass, hlock->trylock,
3434 hlock->read, hlock->check, hlock->hardirqs_off, 3434 hlock->read, hlock->check, hlock->hardirqs_off,
3435 hlock->nest_lock, hlock->acquire_ip, 3435 hlock->nest_lock, hlock->acquire_ip,
3436 hlock->references)) 3436 hlock->references, hlock->pin_count))
3437 return 0; 3437 return 0;
3438 } 3438 }
3439 3439
@@ -3583,7 +3583,7 @@ void lock_acquire(struct lockdep_map *lock, unsigned int subclass,
3583 current->lockdep_recursion = 1; 3583 current->lockdep_recursion = 1;
3584 trace_lock_acquire(lock, subclass, trylock, read, check, nest_lock, ip); 3584 trace_lock_acquire(lock, subclass, trylock, read, check, nest_lock, ip);
3585 __lock_acquire(lock, subclass, trylock, read, check, 3585 __lock_acquire(lock, subclass, trylock, read, check,
3586 irqs_disabled_flags(flags), nest_lock, ip, 0); 3586 irqs_disabled_flags(flags), nest_lock, ip, 0, 0);
3587 current->lockdep_recursion = 0; 3587 current->lockdep_recursion = 0;
3588 raw_local_irq_restore(flags); 3588 raw_local_irq_restore(flags);
3589} 3589}
diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
index 337c8818541d..87e9ce6a63c5 100644
--- a/kernel/locking/qspinlock.c
+++ b/kernel/locking/qspinlock.c
@@ -289,7 +289,7 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
289 if (pv_enabled()) 289 if (pv_enabled())
290 goto queue; 290 goto queue;
291 291
292 if (virt_queued_spin_lock(lock)) 292 if (virt_spin_lock(lock))
293 return; 293 return;
294 294
295 /* 295 /*
diff --git a/kernel/rcu/tree.c b/kernel/rcu/tree.c
index 9f75f25cc5d9..775d36cc0050 100644
--- a/kernel/rcu/tree.c
+++ b/kernel/rcu/tree.c
@@ -3868,6 +3868,7 @@ static void rcu_init_new_rnp(struct rcu_node *rnp_leaf)
3868static void __init 3868static void __init
3869rcu_boot_init_percpu_data(int cpu, struct rcu_state *rsp) 3869rcu_boot_init_percpu_data(int cpu, struct rcu_state *rsp)
3870{ 3870{
3871 static struct lock_class_key rcu_exp_sched_rdp_class;
3871 unsigned long flags; 3872 unsigned long flags;
3872 struct rcu_data *rdp = per_cpu_ptr(rsp->rda, cpu); 3873 struct rcu_data *rdp = per_cpu_ptr(rsp->rda, cpu);
3873 struct rcu_node *rnp = rcu_get_root(rsp); 3874 struct rcu_node *rnp = rcu_get_root(rsp);
@@ -3883,6 +3884,10 @@ rcu_boot_init_percpu_data(int cpu, struct rcu_state *rsp)
3883 mutex_init(&rdp->exp_funnel_mutex); 3884 mutex_init(&rdp->exp_funnel_mutex);
3884 rcu_boot_init_nocb_percpu_data(rdp); 3885 rcu_boot_init_nocb_percpu_data(rdp);
3885 raw_spin_unlock_irqrestore(&rnp->lock, flags); 3886 raw_spin_unlock_irqrestore(&rnp->lock, flags);
3887 if (rsp == &rcu_sched_state)
3888 lockdep_set_class_and_name(&rdp->exp_funnel_mutex,
3889 &rcu_exp_sched_rdp_class,
3890 "rcu_data_exp_sched");
3886} 3891}
3887 3892
3888/* 3893/*
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 3595403921bd..615953141951 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -621,18 +621,21 @@ int get_nohz_timer_target(void)
621 int i, cpu = smp_processor_id(); 621 int i, cpu = smp_processor_id();
622 struct sched_domain *sd; 622 struct sched_domain *sd;
623 623
624 if (!idle_cpu(cpu)) 624 if (!idle_cpu(cpu) && is_housekeeping_cpu(cpu))
625 return cpu; 625 return cpu;
626 626
627 rcu_read_lock(); 627 rcu_read_lock();
628 for_each_domain(cpu, sd) { 628 for_each_domain(cpu, sd) {
629 for_each_cpu(i, sched_domain_span(sd)) { 629 for_each_cpu(i, sched_domain_span(sd)) {
630 if (!idle_cpu(i)) { 630 if (!idle_cpu(i) && is_housekeeping_cpu(cpu)) {
631 cpu = i; 631 cpu = i;
632 goto unlock; 632 goto unlock;
633 } 633 }
634 } 634 }
635 } 635 }
636
637 if (!is_housekeeping_cpu(cpu))
638 cpu = housekeeping_any_cpu();
636unlock: 639unlock:
637 rcu_read_unlock(); 640 rcu_read_unlock();
638 return cpu; 641 return cpu;
@@ -2666,13 +2669,20 @@ unsigned long nr_running(void)
2666 2669
2667/* 2670/*
2668 * Check if only the current task is running on the cpu. 2671 * Check if only the current task is running on the cpu.
2672 *
2673 * Caution: this function does not check that the caller has disabled
2674 * preemption, thus the result might have a time-of-check-to-time-of-use
2675 * race. The caller is responsible to use it correctly, for example:
2676 *
2677 * - from a non-preemptable section (of course)
2678 *
2679 * - from a thread that is bound to a single CPU
2680 *
2681 * - in a loop with very short iterations (e.g. a polling loop)
2669 */ 2682 */
2670bool single_task_running(void) 2683bool single_task_running(void)
2671{ 2684{
2672 if (cpu_rq(smp_processor_id())->nr_running == 1) 2685 return raw_rq()->nr_running == 1;
2673 return true;
2674 else
2675 return false;
2676} 2686}
2677EXPORT_SYMBOL(single_task_running); 2687EXPORT_SYMBOL(single_task_running);
2678 2688
@@ -4924,7 +4934,15 @@ void init_idle(struct task_struct *idle, int cpu)
4924 idle->state = TASK_RUNNING; 4934 idle->state = TASK_RUNNING;
4925 idle->se.exec_start = sched_clock(); 4935 idle->se.exec_start = sched_clock();
4926 4936
4927 do_set_cpus_allowed(idle, cpumask_of(cpu)); 4937#ifdef CONFIG_SMP
4938 /*
4939 * Its possible that init_idle() gets called multiple times on a task,
4940 * in that case do_set_cpus_allowed() will not do the right thing.
4941 *
4942 * And since this is boot we can forgo the serialization.
4943 */
4944 set_cpus_allowed_common(idle, cpumask_of(cpu));
4945#endif
4928 /* 4946 /*
4929 * We're having a chicken and egg problem, even though we are 4947 * We're having a chicken and egg problem, even though we are
4930 * holding rq->lock, the cpu isn't yet set to this cpu so the 4948 * holding rq->lock, the cpu isn't yet set to this cpu so the
@@ -4941,7 +4959,7 @@ void init_idle(struct task_struct *idle, int cpu)
4941 4959
4942 rq->curr = rq->idle = idle; 4960 rq->curr = rq->idle = idle;
4943 idle->on_rq = TASK_ON_RQ_QUEUED; 4961 idle->on_rq = TASK_ON_RQ_QUEUED;
4944#if defined(CONFIG_SMP) 4962#ifdef CONFIG_SMP
4945 idle->on_cpu = 1; 4963 idle->on_cpu = 1;
4946#endif 4964#endif
4947 raw_spin_unlock(&rq->lock); 4965 raw_spin_unlock(&rq->lock);
@@ -4956,7 +4974,7 @@ void init_idle(struct task_struct *idle, int cpu)
4956 idle->sched_class = &idle_sched_class; 4974 idle->sched_class = &idle_sched_class;
4957 ftrace_graph_init_idle_task(idle, cpu); 4975 ftrace_graph_init_idle_task(idle, cpu);
4958 vtime_init_idle(idle, cpu); 4976 vtime_init_idle(idle, cpu);
4959#if defined(CONFIG_SMP) 4977#ifdef CONFIG_SMP
4960 sprintf(idle->comm, "%s/%d", INIT_TASK_COMM, cpu); 4978 sprintf(idle->comm, "%s/%d", INIT_TASK_COMM, cpu);
4961#endif 4979#endif
4962} 4980}
@@ -5178,24 +5196,47 @@ static void migrate_tasks(struct rq *dead_rq)
5178 break; 5196 break;
5179 5197
5180 /* 5198 /*
5181 * Ensure rq->lock covers the entire task selection 5199 * pick_next_task assumes pinned rq->lock.
5182 * until the migration.
5183 */ 5200 */
5184 lockdep_pin_lock(&rq->lock); 5201 lockdep_pin_lock(&rq->lock);
5185 next = pick_next_task(rq, &fake_task); 5202 next = pick_next_task(rq, &fake_task);
5186 BUG_ON(!next); 5203 BUG_ON(!next);
5187 next->sched_class->put_prev_task(rq, next); 5204 next->sched_class->put_prev_task(rq, next);
5188 5205
5206 /*
5207 * Rules for changing task_struct::cpus_allowed are holding
5208 * both pi_lock and rq->lock, such that holding either
5209 * stabilizes the mask.
5210 *
5211 * Drop rq->lock is not quite as disastrous as it usually is
5212 * because !cpu_active at this point, which means load-balance
5213 * will not interfere. Also, stop-machine.
5214 */
5215 lockdep_unpin_lock(&rq->lock);
5216 raw_spin_unlock(&rq->lock);
5217 raw_spin_lock(&next->pi_lock);
5218 raw_spin_lock(&rq->lock);
5219
5220 /*
5221 * Since we're inside stop-machine, _nothing_ should have
5222 * changed the task, WARN if weird stuff happened, because in
5223 * that case the above rq->lock drop is a fail too.
5224 */
5225 if (WARN_ON(task_rq(next) != rq || !task_on_rq_queued(next))) {
5226 raw_spin_unlock(&next->pi_lock);
5227 continue;
5228 }
5229
5189 /* Find suitable destination for @next, with force if needed. */ 5230 /* Find suitable destination for @next, with force if needed. */
5190 dest_cpu = select_fallback_rq(dead_rq->cpu, next); 5231 dest_cpu = select_fallback_rq(dead_rq->cpu, next);
5191 5232
5192 lockdep_unpin_lock(&rq->lock);
5193 rq = __migrate_task(rq, next, dest_cpu); 5233 rq = __migrate_task(rq, next, dest_cpu);
5194 if (rq != dead_rq) { 5234 if (rq != dead_rq) {
5195 raw_spin_unlock(&rq->lock); 5235 raw_spin_unlock(&rq->lock);
5196 rq = dead_rq; 5236 rq = dead_rq;
5197 raw_spin_lock(&rq->lock); 5237 raw_spin_lock(&rq->lock);
5198 } 5238 }
5239 raw_spin_unlock(&next->pi_lock);
5199 } 5240 }
5200 5241
5201 rq->stop = stop; 5242 rq->stop = stop;
diff --git a/kernel/sched/wait.c b/kernel/sched/wait.c
index 272d9322bc5d..052e02672d12 100644
--- a/kernel/sched/wait.c
+++ b/kernel/sched/wait.c
@@ -106,10 +106,9 @@ void __wake_up_locked(wait_queue_head_t *q, unsigned int mode, int nr)
106} 106}
107EXPORT_SYMBOL_GPL(__wake_up_locked); 107EXPORT_SYMBOL_GPL(__wake_up_locked);
108 108
109void __wake_up_locked_key(wait_queue_head_t *q, unsigned int mode, int nr, 109void __wake_up_locked_key(wait_queue_head_t *q, unsigned int mode, void *key)
110 void *key)
111{ 110{
112 __wake_up_common(q, mode, nr, 0, key); 111 __wake_up_common(q, mode, 1, 0, key);
113} 112}
114EXPORT_SYMBOL_GPL(__wake_up_locked_key); 113EXPORT_SYMBOL_GPL(__wake_up_locked_key);
115 114
@@ -284,7 +283,7 @@ void abort_exclusive_wait(wait_queue_head_t *q, wait_queue_t *wait,
284 if (!list_empty(&wait->task_list)) 283 if (!list_empty(&wait->task_list))
285 list_del_init(&wait->task_list); 284 list_del_init(&wait->task_list);
286 else if (waitqueue_active(q)) 285 else if (waitqueue_active(q))
287 __wake_up_locked_key(q, mode, 1, key); 286 __wake_up_locked_key(q, mode, key);
288 spin_unlock_irqrestore(&q->lock, flags); 287 spin_unlock_irqrestore(&q->lock, flags);
289} 288}
290EXPORT_SYMBOL(abort_exclusive_wait); 289EXPORT_SYMBOL(abort_exclusive_wait);
diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c
index 50eb107f1198..a9b76a40319e 100644
--- a/kernel/time/clockevents.c
+++ b/kernel/time/clockevents.c
@@ -97,20 +97,6 @@ EXPORT_SYMBOL_GPL(clockevent_delta2ns);
97static int __clockevents_switch_state(struct clock_event_device *dev, 97static int __clockevents_switch_state(struct clock_event_device *dev,
98 enum clock_event_state state) 98 enum clock_event_state state)
99{ 99{
100 /* Transition with legacy set_mode() callback */
101 if (dev->set_mode) {
102 /* Legacy callback doesn't support new modes */
103 if (state > CLOCK_EVT_STATE_ONESHOT)
104 return -ENOSYS;
105 /*
106 * 'clock_event_state' and 'clock_event_mode' have 1-to-1
107 * mapping until *_ONESHOT, and so a simple cast will work.
108 */
109 dev->set_mode((enum clock_event_mode)state, dev);
110 dev->mode = (enum clock_event_mode)state;
111 return 0;
112 }
113
114 if (dev->features & CLOCK_EVT_FEAT_DUMMY) 100 if (dev->features & CLOCK_EVT_FEAT_DUMMY)
115 return 0; 101 return 0;
116 102
@@ -204,12 +190,8 @@ int clockevents_tick_resume(struct clock_event_device *dev)
204{ 190{
205 int ret = 0; 191 int ret = 0;
206 192
207 if (dev->set_mode) { 193 if (dev->tick_resume)
208 dev->set_mode(CLOCK_EVT_MODE_RESUME, dev);
209 dev->mode = CLOCK_EVT_MODE_RESUME;
210 } else if (dev->tick_resume) {
211 ret = dev->tick_resume(dev); 194 ret = dev->tick_resume(dev);
212 }
213 195
214 return ret; 196 return ret;
215} 197}
@@ -460,26 +442,6 @@ int clockevents_unbind_device(struct clock_event_device *ced, int cpu)
460} 442}
461EXPORT_SYMBOL_GPL(clockevents_unbind_device); 443EXPORT_SYMBOL_GPL(clockevents_unbind_device);
462 444
463/* Sanity check of state transition callbacks */
464static int clockevents_sanity_check(struct clock_event_device *dev)
465{
466 /* Legacy set_mode() callback */
467 if (dev->set_mode) {
468 /* We shouldn't be supporting new modes now */
469 WARN_ON(dev->set_state_periodic || dev->set_state_oneshot ||
470 dev->set_state_shutdown || dev->tick_resume ||
471 dev->set_state_oneshot_stopped);
472
473 BUG_ON(dev->mode != CLOCK_EVT_MODE_UNUSED);
474 return 0;
475 }
476
477 if (dev->features & CLOCK_EVT_FEAT_DUMMY)
478 return 0;
479
480 return 0;
481}
482
483/** 445/**
484 * clockevents_register_device - register a clock event device 446 * clockevents_register_device - register a clock event device
485 * @dev: device to register 447 * @dev: device to register
@@ -488,8 +450,6 @@ void clockevents_register_device(struct clock_event_device *dev)
488{ 450{
489 unsigned long flags; 451 unsigned long flags;
490 452
491 BUG_ON(clockevents_sanity_check(dev));
492
493 /* Initialize state to DETACHED */ 453 /* Initialize state to DETACHED */
494 clockevent_set_state(dev, CLOCK_EVT_STATE_DETACHED); 454 clockevent_set_state(dev, CLOCK_EVT_STATE_DETACHED);
495 455
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index 841b72f720e8..3a38775b50c2 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -217,7 +217,7 @@ static void clocksource_watchdog(unsigned long data)
217 continue; 217 continue;
218 218
219 /* Check the deviation from the watchdog clocksource. */ 219 /* Check the deviation from the watchdog clocksource. */
220 if ((abs(cs_nsec - wd_nsec) > WATCHDOG_THRESHOLD)) { 220 if (abs64(cs_nsec - wd_nsec) > WATCHDOG_THRESHOLD) {
221 pr_warn("timekeeping watchdog: Marking clocksource '%s' as unstable because the skew is too large:\n", 221 pr_warn("timekeeping watchdog: Marking clocksource '%s' as unstable because the skew is too large:\n",
222 cs->name); 222 cs->name);
223 pr_warn(" '%s' wd_now: %llx wd_last: %llx mask: %llx\n", 223 pr_warn(" '%s' wd_now: %llx wd_last: %llx mask: %llx\n",
diff --git a/kernel/time/tick-common.c b/kernel/time/tick-common.c
index d11c55b6ab7d..4fcd99e12aa0 100644
--- a/kernel/time/tick-common.c
+++ b/kernel/time/tick-common.c
@@ -398,7 +398,6 @@ void tick_shutdown(unsigned int cpu)
398 * the set mode function! 398 * the set mode function!
399 */ 399 */
400 clockevent_set_state(dev, CLOCK_EVT_STATE_DETACHED); 400 clockevent_set_state(dev, CLOCK_EVT_STATE_DETACHED);
401 dev->mode = CLOCK_EVT_MODE_UNUSED;
402 clockevents_exchange_device(dev, NULL); 401 clockevents_exchange_device(dev, NULL);
403 dev->event_handler = clockevents_handle_noop; 402 dev->event_handler = clockevents_handle_noop;
404 td->evtdev = NULL; 403 td->evtdev = NULL;
diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index 3319e16f31e5..7c7ec4515983 100644
--- a/kernel/time/tick-sched.c
+++ b/kernel/time/tick-sched.c
@@ -290,16 +290,17 @@ static int __init tick_nohz_full_setup(char *str)
290__setup("nohz_full=", tick_nohz_full_setup); 290__setup("nohz_full=", tick_nohz_full_setup);
291 291
292static int tick_nohz_cpu_down_callback(struct notifier_block *nfb, 292static int tick_nohz_cpu_down_callback(struct notifier_block *nfb,
293 unsigned long action, 293 unsigned long action,
294 void *hcpu) 294 void *hcpu)
295{ 295{
296 unsigned int cpu = (unsigned long)hcpu; 296 unsigned int cpu = (unsigned long)hcpu;
297 297
298 switch (action & ~CPU_TASKS_FROZEN) { 298 switch (action & ~CPU_TASKS_FROZEN) {
299 case CPU_DOWN_PREPARE: 299 case CPU_DOWN_PREPARE:
300 /* 300 /*
301 * If we handle the timekeeping duty for full dynticks CPUs, 301 * The boot CPU handles housekeeping duty (unbound timers,
302 * we can't safely shutdown that CPU. 302 * workqueues, timekeeping, ...) on behalf of full dynticks
303 * CPUs. It must remain online when nohz full is enabled.
303 */ 304 */
304 if (tick_nohz_full_running && tick_do_timer_cpu == cpu) 305 if (tick_nohz_full_running && tick_do_timer_cpu == cpu)
305 return NOTIFY_BAD; 306 return NOTIFY_BAD;
@@ -370,6 +371,12 @@ void __init tick_nohz_init(void)
370 cpu_notifier(tick_nohz_cpu_down_callback, 0); 371 cpu_notifier(tick_nohz_cpu_down_callback, 0);
371 pr_info("NO_HZ: Full dynticks CPUs: %*pbl.\n", 372 pr_info("NO_HZ: Full dynticks CPUs: %*pbl.\n",
372 cpumask_pr_args(tick_nohz_full_mask)); 373 cpumask_pr_args(tick_nohz_full_mask));
374
375 /*
376 * We need at least one CPU to handle housekeeping work such
377 * as timekeeping, unbound timers, workqueues, ...
378 */
379 WARN_ON_ONCE(cpumask_empty(housekeeping_mask));
373} 380}
374#endif 381#endif
375 382
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index f6ee2e6b6f5d..3739ac6aa473 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -1614,7 +1614,7 @@ static __always_inline void timekeeping_freqadjust(struct timekeeper *tk,
1614 negative = (tick_error < 0); 1614 negative = (tick_error < 0);
1615 1615
1616 /* Sort out the magnitude of the correction */ 1616 /* Sort out the magnitude of the correction */
1617 tick_error = abs(tick_error); 1617 tick_error = abs64(tick_error);
1618 for (adj = 0; tick_error > interval; adj++) 1618 for (adj = 0; tick_error > interval; adj++)
1619 tick_error >>= 1; 1619 tick_error >>= 1;
1620 1620
diff --git a/kernel/time/timer_list.c b/kernel/time/timer_list.c
index 129c96033e46..f75e35b60149 100644
--- a/kernel/time/timer_list.c
+++ b/kernel/time/timer_list.c
@@ -225,7 +225,7 @@ print_tickdevice(struct seq_file *m, struct tick_device *td, int cpu)
225 (unsigned long long) dev->min_delta_ns); 225 (unsigned long long) dev->min_delta_ns);
226 SEQ_printf(m, " mult: %u\n", dev->mult); 226 SEQ_printf(m, " mult: %u\n", dev->mult);
227 SEQ_printf(m, " shift: %u\n", dev->shift); 227 SEQ_printf(m, " shift: %u\n", dev->shift);
228 SEQ_printf(m, " mode: %d\n", dev->mode); 228 SEQ_printf(m, " mode: %d\n", clockevent_get_state(dev));
229 SEQ_printf(m, " next_event: %Ld nsecs\n", 229 SEQ_printf(m, " next_event: %Ld nsecs\n",
230 (unsigned long long) ktime_to_ns(dev->next_event)); 230 (unsigned long long) ktime_to_ns(dev->next_event));
231 231
@@ -233,40 +233,34 @@ print_tickdevice(struct seq_file *m, struct tick_device *td, int cpu)
233 print_name_offset(m, dev->set_next_event); 233 print_name_offset(m, dev->set_next_event);
234 SEQ_printf(m, "\n"); 234 SEQ_printf(m, "\n");
235 235
236 if (dev->set_mode) { 236 if (dev->set_state_shutdown) {
237 SEQ_printf(m, " set_mode: "); 237 SEQ_printf(m, " shutdown: ");
238 print_name_offset(m, dev->set_mode); 238 print_name_offset(m, dev->set_state_shutdown);
239 SEQ_printf(m, "\n"); 239 SEQ_printf(m, "\n");
240 } else { 240 }
241 if (dev->set_state_shutdown) {
242 SEQ_printf(m, " shutdown: ");
243 print_name_offset(m, dev->set_state_shutdown);
244 SEQ_printf(m, "\n");
245 }
246 241
247 if (dev->set_state_periodic) { 242 if (dev->set_state_periodic) {
248 SEQ_printf(m, " periodic: "); 243 SEQ_printf(m, " periodic: ");
249 print_name_offset(m, dev->set_state_periodic); 244 print_name_offset(m, dev->set_state_periodic);
250 SEQ_printf(m, "\n"); 245 SEQ_printf(m, "\n");
251 } 246 }
252 247
253 if (dev->set_state_oneshot) { 248 if (dev->set_state_oneshot) {
254 SEQ_printf(m, " oneshot: "); 249 SEQ_printf(m, " oneshot: ");
255 print_name_offset(m, dev->set_state_oneshot); 250 print_name_offset(m, dev->set_state_oneshot);
256 SEQ_printf(m, "\n"); 251 SEQ_printf(m, "\n");
257 } 252 }
258 253
259 if (dev->set_state_oneshot_stopped) { 254 if (dev->set_state_oneshot_stopped) {
260 SEQ_printf(m, " oneshot stopped: "); 255 SEQ_printf(m, " oneshot stopped: ");
261 print_name_offset(m, dev->set_state_oneshot_stopped); 256 print_name_offset(m, dev->set_state_oneshot_stopped);
262 SEQ_printf(m, "\n"); 257 SEQ_printf(m, "\n");
263 } 258 }
264 259
265 if (dev->tick_resume) { 260 if (dev->tick_resume) {
266 SEQ_printf(m, " resume: "); 261 SEQ_printf(m, " resume: ");
267 print_name_offset(m, dev->tick_resume); 262 print_name_offset(m, dev->tick_resume);
268 SEQ_printf(m, "\n"); 263 SEQ_printf(m, "\n");
269 }
270 } 264 }
271 265
272 SEQ_printf(m, " event_handler: "); 266 SEQ_printf(m, " event_handler: ");
diff --git a/lib/iommu-common.c b/lib/iommu-common.c
index ff19f66d3f7f..b1c93e94ca7a 100644
--- a/lib/iommu-common.c
+++ b/lib/iommu-common.c
@@ -21,8 +21,7 @@ static DEFINE_PER_CPU(unsigned int, iommu_hash_common);
21 21
22static inline bool need_flush(struct iommu_map_table *iommu) 22static inline bool need_flush(struct iommu_map_table *iommu)
23{ 23{
24 return (iommu->lazy_flush != NULL && 24 return ((iommu->flags & IOMMU_NEED_FLUSH) != 0);
25 (iommu->flags & IOMMU_NEED_FLUSH) != 0);
26} 25}
27 26
28static inline void set_flush(struct iommu_map_table *iommu) 27static inline void set_flush(struct iommu_map_table *iommu)
@@ -211,7 +210,8 @@ unsigned long iommu_tbl_range_alloc(struct device *dev,
211 goto bail; 210 goto bail;
212 } 211 }
213 } 212 }
214 if (n < pool->hint || need_flush(iommu)) { 213 if (iommu->lazy_flush &&
214 (n < pool->hint || need_flush(iommu))) {
215 clear_flush(iommu); 215 clear_flush(iommu);
216 iommu->lazy_flush(iommu); 216 iommu->lazy_flush(iommu);
217 } 217 }
diff --git a/lib/rhashtable.c b/lib/rhashtable.c
index cc0c69710dcf..a54ff8949f91 100644
--- a/lib/rhashtable.c
+++ b/lib/rhashtable.c
@@ -187,10 +187,7 @@ static int rhashtable_rehash_one(struct rhashtable *ht, unsigned int old_hash)
187 head = rht_dereference_bucket(new_tbl->buckets[new_hash], 187 head = rht_dereference_bucket(new_tbl->buckets[new_hash],
188 new_tbl, new_hash); 188 new_tbl, new_hash);
189 189
190 if (rht_is_a_nulls(head)) 190 RCU_INIT_POINTER(entry->next, head);
191 INIT_RHT_NULLS_HEAD(entry->next, ht, new_hash);
192 else
193 RCU_INIT_POINTER(entry->next, head);
194 191
195 rcu_assign_pointer(new_tbl->buckets[new_hash], entry); 192 rcu_assign_pointer(new_tbl->buckets[new_hash], entry);
196 spin_unlock(new_bucket_lock); 193 spin_unlock(new_bucket_lock);
diff --git a/lib/string.c b/lib/string.c
index 13d1e84ddb80..8dbb7b1eab50 100644
--- a/lib/string.c
+++ b/lib/string.c
@@ -27,6 +27,10 @@
27#include <linux/bug.h> 27#include <linux/bug.h>
28#include <linux/errno.h> 28#include <linux/errno.h>
29 29
30#include <asm/byteorder.h>
31#include <asm/word-at-a-time.h>
32#include <asm/page.h>
33
30#ifndef __HAVE_ARCH_STRNCASECMP 34#ifndef __HAVE_ARCH_STRNCASECMP
31/** 35/**
32 * strncasecmp - Case insensitive, length-limited string comparison 36 * strncasecmp - Case insensitive, length-limited string comparison
@@ -146,6 +150,90 @@ size_t strlcpy(char *dest, const char *src, size_t size)
146EXPORT_SYMBOL(strlcpy); 150EXPORT_SYMBOL(strlcpy);
147#endif 151#endif
148 152
153#ifndef __HAVE_ARCH_STRSCPY
154/**
155 * strscpy - Copy a C-string into a sized buffer
156 * @dest: Where to copy the string to
157 * @src: Where to copy the string from
158 * @count: Size of destination buffer
159 *
160 * Copy the string, or as much of it as fits, into the dest buffer.
161 * The routine returns the number of characters copied (not including
162 * the trailing NUL) or -E2BIG if the destination buffer wasn't big enough.
163 * The behavior is undefined if the string buffers overlap.
164 * The destination buffer is always NUL terminated, unless it's zero-sized.
165 *
166 * Preferred to strlcpy() since the API doesn't require reading memory
167 * from the src string beyond the specified "count" bytes, and since
168 * the return value is easier to error-check than strlcpy()'s.
169 * In addition, the implementation is robust to the string changing out
170 * from underneath it, unlike the current strlcpy() implementation.
171 *
172 * Preferred to strncpy() since it always returns a valid string, and
173 * doesn't unnecessarily force the tail of the destination buffer to be
174 * zeroed. If the zeroing is desired, it's likely cleaner to use strscpy()
175 * with an overflow test, then just memset() the tail of the dest buffer.
176 */
177ssize_t strscpy(char *dest, const char *src, size_t count)
178{
179 const struct word_at_a_time constants = WORD_AT_A_TIME_CONSTANTS;
180 size_t max = count;
181 long res = 0;
182
183 if (count == 0)
184 return -E2BIG;
185
186#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
187 /*
188 * If src is unaligned, don't cross a page boundary,
189 * since we don't know if the next page is mapped.
190 */
191 if ((long)src & (sizeof(long) - 1)) {
192 size_t limit = PAGE_SIZE - ((long)src & (PAGE_SIZE - 1));
193 if (limit < max)
194 max = limit;
195 }
196#else
197 /* If src or dest is unaligned, don't do word-at-a-time. */
198 if (((long) dest | (long) src) & (sizeof(long) - 1))
199 max = 0;
200#endif
201
202 while (max >= sizeof(unsigned long)) {
203 unsigned long c, data;
204
205 c = *(unsigned long *)(src+res);
206 *(unsigned long *)(dest+res) = c;
207 if (has_zero(c, &data, &constants)) {
208 data = prep_zero_mask(c, data, &constants);
209 data = create_zero_mask(data);
210 return res + find_zero(data);
211 }
212 res += sizeof(unsigned long);
213 count -= sizeof(unsigned long);
214 max -= sizeof(unsigned long);
215 }
216
217 while (count) {
218 char c;
219
220 c = src[res];
221 dest[res] = c;
222 if (!c)
223 return res;
224 res++;
225 count--;
226 }
227
228 /* Hit buffer length without finding a NUL; force NUL-termination. */
229 if (res)
230 dest[res-1] = '\0';
231
232 return -E2BIG;
233}
234EXPORT_SYMBOL(strscpy);
235#endif
236
149#ifndef __HAVE_ARCH_STRCAT 237#ifndef __HAVE_ARCH_STRCAT
150/** 238/**
151 * strcat - Append one %NUL-terminated string to another 239 * strcat - Append one %NUL-terminated string to another
diff --git a/lib/string_helpers.c b/lib/string_helpers.c
index 54036ce2e2dd..5939f63d90cd 100644
--- a/lib/string_helpers.c
+++ b/lib/string_helpers.c
@@ -59,7 +59,11 @@ void string_get_size(u64 size, u64 blk_size, const enum string_size_units units,
59 } 59 }
60 60
61 exp = divisor[units] / (u32)blk_size; 61 exp = divisor[units] / (u32)blk_size;
62 if (size >= exp) { 62 /*
63 * size must be strictly greater than exp here to ensure that remainder
64 * is greater than divisor[units] coming out of the if below.
65 */
66 if (size > exp) {
63 remainder = do_div(size, divisor[units]); 67 remainder = do_div(size, divisor[units]);
64 remainder *= blk_size; 68 remainder *= blk_size;
65 i++; 69 i++;
diff --git a/mm/dmapool.c b/mm/dmapool.c
index 71a8998cd03a..312a716fa14c 100644
--- a/mm/dmapool.c
+++ b/mm/dmapool.c
@@ -394,7 +394,7 @@ static struct dma_page *pool_find_page(struct dma_pool *pool, dma_addr_t dma)
394 list_for_each_entry(page, &pool->page_list, page_list) { 394 list_for_each_entry(page, &pool->page_list, page_list) {
395 if (dma < page->dma) 395 if (dma < page->dma)
396 continue; 396 continue;
397 if (dma < (page->dma + pool->allocation)) 397 if ((dma - page->dma) < pool->allocation)
398 return page; 398 return page;
399 } 399 }
400 return NULL; 400 return NULL;
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 999fb0aef8f1..9cc773483624 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -3202,6 +3202,14 @@ static void unmap_ref_private(struct mm_struct *mm, struct vm_area_struct *vma,
3202 continue; 3202 continue;
3203 3203
3204 /* 3204 /*
3205 * Shared VMAs have their own reserves and do not affect
3206 * MAP_PRIVATE accounting but it is possible that a shared
3207 * VMA is using the same page so check and skip such VMAs.
3208 */
3209 if (iter_vma->vm_flags & VM_MAYSHARE)
3210 continue;
3211
3212 /*
3205 * Unmap the page from other VMAs without their own reserves. 3213 * Unmap the page from other VMAs without their own reserves.
3206 * They get marked to be SIGKILLed if they fault in these 3214 * They get marked to be SIGKILLed if they fault in these
3207 * areas. This is because a future no-page fault on this VMA 3215 * areas. This is because a future no-page fault on this VMA
diff --git a/mm/kasan/kasan.c b/mm/kasan/kasan.c
index 7b28e9cdf1c7..8da211411b57 100644
--- a/mm/kasan/kasan.c
+++ b/mm/kasan/kasan.c
@@ -135,12 +135,11 @@ static __always_inline bool memory_is_poisoned_16(unsigned long addr)
135 135
136 if (unlikely(*shadow_addr)) { 136 if (unlikely(*shadow_addr)) {
137 u16 shadow_first_bytes = *(u16 *)shadow_addr; 137 u16 shadow_first_bytes = *(u16 *)shadow_addr;
138 s8 last_byte = (addr + 15) & KASAN_SHADOW_MASK;
139 138
140 if (unlikely(shadow_first_bytes)) 139 if (unlikely(shadow_first_bytes))
141 return true; 140 return true;
142 141
143 if (likely(!last_byte)) 142 if (likely(IS_ALIGNED(addr, 8)))
144 return false; 143 return false;
145 144
146 return memory_is_poisoned_1(addr + 15); 145 return memory_is_poisoned_1(addr + 15);
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 6ddaeba34e09..1fedbde68f59 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -644,12 +644,14 @@ mem_cgroup_largest_soft_limit_node(struct mem_cgroup_tree_per_zone *mctz)
644} 644}
645 645
646/* 646/*
647 * Return page count for single (non recursive) @memcg.
648 *
647 * Implementation Note: reading percpu statistics for memcg. 649 * Implementation Note: reading percpu statistics for memcg.
648 * 650 *
649 * Both of vmstat[] and percpu_counter has threshold and do periodic 651 * Both of vmstat[] and percpu_counter has threshold and do periodic
650 * synchronization to implement "quick" read. There are trade-off between 652 * synchronization to implement "quick" read. There are trade-off between
651 * reading cost and precision of value. Then, we may have a chance to implement 653 * reading cost and precision of value. Then, we may have a chance to implement
652 * a periodic synchronizion of counter in memcg's counter. 654 * a periodic synchronization of counter in memcg's counter.
653 * 655 *
654 * But this _read() function is used for user interface now. The user accounts 656 * But this _read() function is used for user interface now. The user accounts
655 * memory usage by memory cgroup and he _always_ requires exact value because 657 * memory usage by memory cgroup and he _always_ requires exact value because
@@ -659,17 +661,24 @@ mem_cgroup_largest_soft_limit_node(struct mem_cgroup_tree_per_zone *mctz)
659 * 661 *
660 * If there are kernel internal actions which can make use of some not-exact 662 * If there are kernel internal actions which can make use of some not-exact
661 * value, and reading all cpu value can be performance bottleneck in some 663 * value, and reading all cpu value can be performance bottleneck in some
662 * common workload, threashold and synchonization as vmstat[] should be 664 * common workload, threshold and synchronization as vmstat[] should be
663 * implemented. 665 * implemented.
664 */ 666 */
665static long mem_cgroup_read_stat(struct mem_cgroup *memcg, 667static unsigned long
666 enum mem_cgroup_stat_index idx) 668mem_cgroup_read_stat(struct mem_cgroup *memcg, enum mem_cgroup_stat_index idx)
667{ 669{
668 long val = 0; 670 long val = 0;
669 int cpu; 671 int cpu;
670 672
673 /* Per-cpu values can be negative, use a signed accumulator */
671 for_each_possible_cpu(cpu) 674 for_each_possible_cpu(cpu)
672 val += per_cpu(memcg->stat->count[idx], cpu); 675 val += per_cpu(memcg->stat->count[idx], cpu);
676 /*
677 * Summing races with updates, so val may be negative. Avoid exposing
678 * transient negative values.
679 */
680 if (val < 0)
681 val = 0;
673 return val; 682 return val;
674} 683}
675 684
@@ -1254,7 +1263,7 @@ void mem_cgroup_print_oom_info(struct mem_cgroup *memcg, struct task_struct *p)
1254 for (i = 0; i < MEM_CGROUP_STAT_NSTATS; i++) { 1263 for (i = 0; i < MEM_CGROUP_STAT_NSTATS; i++) {
1255 if (i == MEM_CGROUP_STAT_SWAP && !do_swap_account) 1264 if (i == MEM_CGROUP_STAT_SWAP && !do_swap_account)
1256 continue; 1265 continue;
1257 pr_cont(" %s:%ldKB", mem_cgroup_stat_names[i], 1266 pr_cont(" %s:%luKB", mem_cgroup_stat_names[i],
1258 K(mem_cgroup_read_stat(iter, i))); 1267 K(mem_cgroup_read_stat(iter, i)));
1259 } 1268 }
1260 1269
@@ -2819,14 +2828,11 @@ static unsigned long tree_stat(struct mem_cgroup *memcg,
2819 enum mem_cgroup_stat_index idx) 2828 enum mem_cgroup_stat_index idx)
2820{ 2829{
2821 struct mem_cgroup *iter; 2830 struct mem_cgroup *iter;
2822 long val = 0; 2831 unsigned long val = 0;
2823 2832
2824 /* Per-cpu values can be negative, use a signed accumulator */
2825 for_each_mem_cgroup_tree(iter, memcg) 2833 for_each_mem_cgroup_tree(iter, memcg)
2826 val += mem_cgroup_read_stat(iter, idx); 2834 val += mem_cgroup_read_stat(iter, idx);
2827 2835
2828 if (val < 0) /* race ? */
2829 val = 0;
2830 return val; 2836 return val;
2831} 2837}
2832 2838
@@ -3169,7 +3175,7 @@ static int memcg_stat_show(struct seq_file *m, void *v)
3169 for (i = 0; i < MEM_CGROUP_STAT_NSTATS; i++) { 3175 for (i = 0; i < MEM_CGROUP_STAT_NSTATS; i++) {
3170 if (i == MEM_CGROUP_STAT_SWAP && !do_swap_account) 3176 if (i == MEM_CGROUP_STAT_SWAP && !do_swap_account)
3171 continue; 3177 continue;
3172 seq_printf(m, "%s %ld\n", mem_cgroup_stat_names[i], 3178 seq_printf(m, "%s %lu\n", mem_cgroup_stat_names[i],
3173 mem_cgroup_read_stat(memcg, i) * PAGE_SIZE); 3179 mem_cgroup_read_stat(memcg, i) * PAGE_SIZE);
3174 } 3180 }
3175 3181
@@ -3194,13 +3200,13 @@ static int memcg_stat_show(struct seq_file *m, void *v)
3194 (u64)memsw * PAGE_SIZE); 3200 (u64)memsw * PAGE_SIZE);
3195 3201
3196 for (i = 0; i < MEM_CGROUP_STAT_NSTATS; i++) { 3202 for (i = 0; i < MEM_CGROUP_STAT_NSTATS; i++) {
3197 long long val = 0; 3203 unsigned long long val = 0;
3198 3204
3199 if (i == MEM_CGROUP_STAT_SWAP && !do_swap_account) 3205 if (i == MEM_CGROUP_STAT_SWAP && !do_swap_account)
3200 continue; 3206 continue;
3201 for_each_mem_cgroup_tree(mi, memcg) 3207 for_each_mem_cgroup_tree(mi, memcg)
3202 val += mem_cgroup_read_stat(mi, i) * PAGE_SIZE; 3208 val += mem_cgroup_read_stat(mi, i) * PAGE_SIZE;
3203 seq_printf(m, "total_%s %lld\n", mem_cgroup_stat_names[i], val); 3209 seq_printf(m, "total_%s %llu\n", mem_cgroup_stat_names[i], val);
3204 } 3210 }
3205 3211
3206 for (i = 0; i < MEM_CGROUP_EVENTS_NSTATS; i++) { 3212 for (i = 0; i < MEM_CGROUP_EVENTS_NSTATS; i++) {
@@ -4179,7 +4185,6 @@ static struct mem_cgroup *mem_cgroup_alloc(void)
4179 if (memcg_wb_domain_init(memcg, GFP_KERNEL)) 4185 if (memcg_wb_domain_init(memcg, GFP_KERNEL))
4180 goto out_free_stat; 4186 goto out_free_stat;
4181 4187
4182 spin_lock_init(&memcg->pcp_counter_lock);
4183 return memcg; 4188 return memcg;
4184 4189
4185out_free_stat: 4190out_free_stat:
diff --git a/mm/migrate.c b/mm/migrate.c
index c3cb566af3e2..842ecd7aaf7f 100644
--- a/mm/migrate.c
+++ b/mm/migrate.c
@@ -740,6 +740,15 @@ static int move_to_new_page(struct page *newpage, struct page *page,
740 if (PageSwapBacked(page)) 740 if (PageSwapBacked(page))
741 SetPageSwapBacked(newpage); 741 SetPageSwapBacked(newpage);
742 742
743 /*
744 * Indirectly called below, migrate_page_copy() copies PG_dirty and thus
745 * needs newpage's memcg set to transfer memcg dirty page accounting.
746 * So perform memcg migration in two steps:
747 * 1. set newpage->mem_cgroup (here)
748 * 2. clear page->mem_cgroup (below)
749 */
750 set_page_memcg(newpage, page_memcg(page));
751
743 mapping = page_mapping(page); 752 mapping = page_mapping(page);
744 if (!mapping) 753 if (!mapping)
745 rc = migrate_page(mapping, newpage, page, mode); 754 rc = migrate_page(mapping, newpage, page, mode);
@@ -756,9 +765,10 @@ static int move_to_new_page(struct page *newpage, struct page *page,
756 rc = fallback_migrate_page(mapping, newpage, page, mode); 765 rc = fallback_migrate_page(mapping, newpage, page, mode);
757 766
758 if (rc != MIGRATEPAGE_SUCCESS) { 767 if (rc != MIGRATEPAGE_SUCCESS) {
768 set_page_memcg(newpage, NULL);
759 newpage->mapping = NULL; 769 newpage->mapping = NULL;
760 } else { 770 } else {
761 mem_cgroup_migrate(page, newpage, false); 771 set_page_memcg(page, NULL);
762 if (page_was_mapped) 772 if (page_was_mapped)
763 remove_migration_ptes(page, newpage); 773 remove_migration_ptes(page, newpage);
764 page->mapping = NULL; 774 page->mapping = NULL;
@@ -1075,7 +1085,7 @@ out:
1075 if (rc != MIGRATEPAGE_SUCCESS && put_new_page) 1085 if (rc != MIGRATEPAGE_SUCCESS && put_new_page)
1076 put_new_page(new_hpage, private); 1086 put_new_page(new_hpage, private);
1077 else 1087 else
1078 put_page(new_hpage); 1088 putback_active_hugepage(new_hpage);
1079 1089
1080 if (result) { 1090 if (result) {
1081 if (rc) 1091 if (rc)
diff --git a/mm/mmap.c b/mm/mmap.c
index 971dd2cb77d2..79bcc9f92e48 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -612,8 +612,6 @@ static unsigned long count_vma_pages_range(struct mm_struct *mm,
612void __vma_link_rb(struct mm_struct *mm, struct vm_area_struct *vma, 612void __vma_link_rb(struct mm_struct *mm, struct vm_area_struct *vma,
613 struct rb_node **rb_link, struct rb_node *rb_parent) 613 struct rb_node **rb_link, struct rb_node *rb_parent)
614{ 614{
615 WARN_ONCE(vma->vm_file && !vma->vm_ops, "missing vma->vm_ops");
616
617 /* Update tracking information for the gap following the new vma. */ 615 /* Update tracking information for the gap following the new vma. */
618 if (vma->vm_next) 616 if (vma->vm_next)
619 vma_gap_update(vma->vm_next); 617 vma_gap_update(vma->vm_next);
@@ -1492,13 +1490,14 @@ SYSCALL_DEFINE1(old_mmap, struct mmap_arg_struct __user *, arg)
1492int vma_wants_writenotify(struct vm_area_struct *vma) 1490int vma_wants_writenotify(struct vm_area_struct *vma)
1493{ 1491{
1494 vm_flags_t vm_flags = vma->vm_flags; 1492 vm_flags_t vm_flags = vma->vm_flags;
1493 const struct vm_operations_struct *vm_ops = vma->vm_ops;
1495 1494
1496 /* If it was private or non-writable, the write bit is already clear */ 1495 /* If it was private or non-writable, the write bit is already clear */
1497 if ((vm_flags & (VM_WRITE|VM_SHARED)) != ((VM_WRITE|VM_SHARED))) 1496 if ((vm_flags & (VM_WRITE|VM_SHARED)) != ((VM_WRITE|VM_SHARED)))
1498 return 0; 1497 return 0;
1499 1498
1500 /* The backer wishes to know when pages are first written to? */ 1499 /* The backer wishes to know when pages are first written to? */
1501 if (vma->vm_ops && vma->vm_ops->page_mkwrite) 1500 if (vm_ops && (vm_ops->page_mkwrite || vm_ops->pfn_mkwrite))
1502 return 1; 1501 return 1;
1503 1502
1504 /* The open routine did something to the protections that pgprot_modify 1503 /* The open routine did something to the protections that pgprot_modify
@@ -1638,12 +1637,6 @@ unsigned long mmap_region(struct file *file, unsigned long addr,
1638 */ 1637 */
1639 WARN_ON_ONCE(addr != vma->vm_start); 1638 WARN_ON_ONCE(addr != vma->vm_start);
1640 1639
1641 /* All file mapping must have ->vm_ops set */
1642 if (!vma->vm_ops) {
1643 static const struct vm_operations_struct dummy_ops = {};
1644 vma->vm_ops = &dummy_ops;
1645 }
1646
1647 addr = vma->vm_start; 1640 addr = vma->vm_start;
1648 vm_flags = vma->vm_flags; 1641 vm_flags = vma->vm_flags;
1649 } else if (vm_flags & VM_SHARED) { 1642 } else if (vm_flags & VM_SHARED) {
diff --git a/mm/slab.c b/mm/slab.c
index c77ebe6cc87c..4fcc5dd8d5a6 100644
--- a/mm/slab.c
+++ b/mm/slab.c
@@ -2190,9 +2190,16 @@ __kmem_cache_create (struct kmem_cache *cachep, unsigned long flags)
2190 size += BYTES_PER_WORD; 2190 size += BYTES_PER_WORD;
2191 } 2191 }
2192#if FORCED_DEBUG && defined(CONFIG_DEBUG_PAGEALLOC) 2192#if FORCED_DEBUG && defined(CONFIG_DEBUG_PAGEALLOC)
2193 if (size >= kmalloc_size(INDEX_NODE + 1) 2193 /*
2194 && cachep->object_size > cache_line_size() 2194 * To activate debug pagealloc, off-slab management is necessary
2195 && ALIGN(size, cachep->align) < PAGE_SIZE) { 2195 * requirement. In early phase of initialization, small sized slab
2196 * doesn't get initialized so it would not be possible. So, we need
2197 * to check size >= 256. It guarantees that all necessary small
2198 * sized slab is initialized in current slab initialization sequence.
2199 */
2200 if (!slab_early_init && size >= kmalloc_size(INDEX_NODE) &&
2201 size >= 256 && cachep->object_size > cache_line_size() &&
2202 ALIGN(size, cachep->align) < PAGE_SIZE) {
2196 cachep->obj_offset += PAGE_SIZE - ALIGN(size, cachep->align); 2203 cachep->obj_offset += PAGE_SIZE - ALIGN(size, cachep->align);
2197 size = PAGE_SIZE; 2204 size = PAGE_SIZE;
2198 } 2205 }
diff --git a/mm/vmscan.c b/mm/vmscan.c
index 2d978b28a410..7f63a9381f71 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -175,7 +175,7 @@ static bool sane_reclaim(struct scan_control *sc)
175 if (!memcg) 175 if (!memcg)
176 return true; 176 return true;
177#ifdef CONFIG_CGROUP_WRITEBACK 177#ifdef CONFIG_CGROUP_WRITEBACK
178 if (memcg->css.cgroup) 178 if (cgroup_on_dfl(memcg->css.cgroup))
179 return true; 179 return true;
180#endif 180#endif
181 return false; 181 return false;
diff --git a/net/atm/clip.c b/net/atm/clip.c
index 17e55dfecbe2..e07f551a863c 100644
--- a/net/atm/clip.c
+++ b/net/atm/clip.c
@@ -317,6 +317,9 @@ static int clip_constructor(struct neighbour *neigh)
317 317
318static int clip_encap(struct atm_vcc *vcc, int mode) 318static int clip_encap(struct atm_vcc *vcc, int mode)
319{ 319{
320 if (!CLIP_VCC(vcc))
321 return -EBADFD;
322
320 CLIP_VCC(vcc)->encap = mode; 323 CLIP_VCC(vcc)->encap = mode;
321 return 0; 324 return 0;
322} 325}
diff --git a/net/bluetooth/smp.c b/net/bluetooth/smp.c
index ad82324f710f..0510a577a7b5 100644
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -2311,12 +2311,6 @@ int smp_conn_security(struct hci_conn *hcon, __u8 sec_level)
2311 if (!conn) 2311 if (!conn)
2312 return 1; 2312 return 1;
2313 2313
2314 chan = conn->smp;
2315 if (!chan) {
2316 BT_ERR("SMP security requested but not available");
2317 return 1;
2318 }
2319
2320 if (!hci_dev_test_flag(hcon->hdev, HCI_LE_ENABLED)) 2314 if (!hci_dev_test_flag(hcon->hdev, HCI_LE_ENABLED))
2321 return 1; 2315 return 1;
2322 2316
@@ -2330,6 +2324,12 @@ int smp_conn_security(struct hci_conn *hcon, __u8 sec_level)
2330 if (smp_ltk_encrypt(conn, hcon->pending_sec_level)) 2324 if (smp_ltk_encrypt(conn, hcon->pending_sec_level))
2331 return 0; 2325 return 0;
2332 2326
2327 chan = conn->smp;
2328 if (!chan) {
2329 BT_ERR("SMP security requested but not available");
2330 return 1;
2331 }
2332
2333 l2cap_chan_lock(chan); 2333 l2cap_chan_lock(chan);
2334 2334
2335 /* If SMP is already in progress ignore this request */ 2335 /* If SMP is already in progress ignore this request */
diff --git a/net/bridge/br_multicast.c b/net/bridge/br_multicast.c
index 66efdc21f548..480b3de1a0e3 100644
--- a/net/bridge/br_multicast.c
+++ b/net/bridge/br_multicast.c
@@ -1006,7 +1006,7 @@ static int br_ip4_multicast_igmp3_report(struct net_bridge *br,
1006 1006
1007 ih = igmpv3_report_hdr(skb); 1007 ih = igmpv3_report_hdr(skb);
1008 num = ntohs(ih->ngrec); 1008 num = ntohs(ih->ngrec);
1009 len = sizeof(*ih); 1009 len = skb_transport_offset(skb) + sizeof(*ih);
1010 1010
1011 for (i = 0; i < num; i++) { 1011 for (i = 0; i < num; i++) {
1012 len += sizeof(*grec); 1012 len += sizeof(*grec);
@@ -1067,7 +1067,7 @@ static int br_ip6_multicast_mld2_report(struct net_bridge *br,
1067 1067
1068 icmp6h = icmp6_hdr(skb); 1068 icmp6h = icmp6_hdr(skb);
1069 num = ntohs(icmp6h->icmp6_dataun.un_data16[1]); 1069 num = ntohs(icmp6h->icmp6_dataun.un_data16[1]);
1070 len = sizeof(*icmp6h); 1070 len = skb_transport_offset(skb) + sizeof(*icmp6h);
1071 1071
1072 for (i = 0; i < num; i++) { 1072 for (i = 0; i < num; i++) {
1073 __be16 *nsrcs, _nsrcs; 1073 __be16 *nsrcs, _nsrcs;
diff --git a/net/ceph/messenger.c b/net/ceph/messenger.c
index 525f454f7531..b9b0e3b5da49 100644
--- a/net/ceph/messenger.c
+++ b/net/ceph/messenger.c
@@ -1353,11 +1353,12 @@ static void prepare_write_keepalive(struct ceph_connection *con)
1353 dout("prepare_write_keepalive %p\n", con); 1353 dout("prepare_write_keepalive %p\n", con);
1354 con_out_kvec_reset(con); 1354 con_out_kvec_reset(con);
1355 if (con->peer_features & CEPH_FEATURE_MSGR_KEEPALIVE2) { 1355 if (con->peer_features & CEPH_FEATURE_MSGR_KEEPALIVE2) {
1356 struct timespec ts = CURRENT_TIME; 1356 struct timespec now = CURRENT_TIME;
1357 struct ceph_timespec ceph_ts; 1357
1358 ceph_encode_timespec(&ceph_ts, &ts);
1359 con_out_kvec_add(con, sizeof(tag_keepalive2), &tag_keepalive2); 1358 con_out_kvec_add(con, sizeof(tag_keepalive2), &tag_keepalive2);
1360 con_out_kvec_add(con, sizeof(ceph_ts), &ceph_ts); 1359 ceph_encode_timespec(&con->out_temp_keepalive2, &now);
1360 con_out_kvec_add(con, sizeof(con->out_temp_keepalive2),
1361 &con->out_temp_keepalive2);
1361 } else { 1362 } else {
1362 con_out_kvec_add(con, sizeof(tag_keepalive), &tag_keepalive); 1363 con_out_kvec_add(con, sizeof(tag_keepalive), &tag_keepalive);
1363 } 1364 }
diff --git a/net/core/dev.c b/net/core/dev.c
index 877c84834d81..6bb6470f5b7b 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -4713,6 +4713,8 @@ void napi_disable(struct napi_struct *n)
4713 4713
4714 while (test_and_set_bit(NAPI_STATE_SCHED, &n->state)) 4714 while (test_and_set_bit(NAPI_STATE_SCHED, &n->state))
4715 msleep(1); 4715 msleep(1);
4716 while (test_and_set_bit(NAPI_STATE_NPSVC, &n->state))
4717 msleep(1);
4716 4718
4717 hrtimer_cancel(&n->timer); 4719 hrtimer_cancel(&n->timer);
4718 4720
diff --git a/net/core/fib_rules.c b/net/core/fib_rules.c
index bf77e3639ce0..365de66436ac 100644
--- a/net/core/fib_rules.c
+++ b/net/core/fib_rules.c
@@ -631,15 +631,17 @@ static int dump_rules(struct sk_buff *skb, struct netlink_callback *cb,
631{ 631{
632 int idx = 0; 632 int idx = 0;
633 struct fib_rule *rule; 633 struct fib_rule *rule;
634 int err = 0;
634 635
635 rcu_read_lock(); 636 rcu_read_lock();
636 list_for_each_entry_rcu(rule, &ops->rules_list, list) { 637 list_for_each_entry_rcu(rule, &ops->rules_list, list) {
637 if (idx < cb->args[1]) 638 if (idx < cb->args[1])
638 goto skip; 639 goto skip;
639 640
640 if (fib_nl_fill_rule(skb, rule, NETLINK_CB(cb->skb).portid, 641 err = fib_nl_fill_rule(skb, rule, NETLINK_CB(cb->skb).portid,
641 cb->nlh->nlmsg_seq, RTM_NEWRULE, 642 cb->nlh->nlmsg_seq, RTM_NEWRULE,
642 NLM_F_MULTI, ops) < 0) 643 NLM_F_MULTI, ops);
644 if (err)
643 break; 645 break;
644skip: 646skip:
645 idx++; 647 idx++;
@@ -648,7 +650,7 @@ skip:
648 cb->args[1] = idx; 650 cb->args[1] = idx;
649 rules_ops_put(ops); 651 rules_ops_put(ops);
650 652
651 return skb->len; 653 return err;
652} 654}
653 655
654static int fib_nl_dumprule(struct sk_buff *skb, struct netlink_callback *cb) 656static int fib_nl_dumprule(struct sk_buff *skb, struct netlink_callback *cb)
@@ -664,7 +666,9 @@ static int fib_nl_dumprule(struct sk_buff *skb, struct netlink_callback *cb)
664 if (ops == NULL) 666 if (ops == NULL)
665 return -EAFNOSUPPORT; 667 return -EAFNOSUPPORT;
666 668
667 return dump_rules(skb, cb, ops); 669 dump_rules(skb, cb, ops);
670
671 return skb->len;
668 } 672 }
669 673
670 rcu_read_lock(); 674 rcu_read_lock();
diff --git a/net/core/filter.c b/net/core/filter.c
index 13079f03902e..05a04ea87172 100644
--- a/net/core/filter.c
+++ b/net/core/filter.c
@@ -478,9 +478,9 @@ do_pass:
478 bpf_src = BPF_X; 478 bpf_src = BPF_X;
479 } else { 479 } else {
480 insn->dst_reg = BPF_REG_A; 480 insn->dst_reg = BPF_REG_A;
481 insn->src_reg = BPF_REG_X;
482 insn->imm = fp->k; 481 insn->imm = fp->k;
483 bpf_src = BPF_SRC(fp->code); 482 bpf_src = BPF_SRC(fp->code);
483 insn->src_reg = bpf_src == BPF_X ? BPF_REG_X : 0;
484 } 484 }
485 485
486 /* Common case where 'jump_false' is next insn. */ 486 /* Common case where 'jump_false' is next insn. */
diff --git a/net/core/net-sysfs.c b/net/core/net-sysfs.c
index b279077c3089..830f8a7c1cb1 100644
--- a/net/core/net-sysfs.c
+++ b/net/core/net-sysfs.c
@@ -31,7 +31,6 @@
31static const char fmt_hex[] = "%#x\n"; 31static const char fmt_hex[] = "%#x\n";
32static const char fmt_long_hex[] = "%#lx\n"; 32static const char fmt_long_hex[] = "%#lx\n";
33static const char fmt_dec[] = "%d\n"; 33static const char fmt_dec[] = "%d\n";
34static const char fmt_udec[] = "%u\n";
35static const char fmt_ulong[] = "%lu\n"; 34static const char fmt_ulong[] = "%lu\n";
36static const char fmt_u64[] = "%llu\n"; 35static const char fmt_u64[] = "%llu\n";
37 36
@@ -202,7 +201,7 @@ static ssize_t speed_show(struct device *dev,
202 if (netif_running(netdev)) { 201 if (netif_running(netdev)) {
203 struct ethtool_cmd cmd; 202 struct ethtool_cmd cmd;
204 if (!__ethtool_get_settings(netdev, &cmd)) 203 if (!__ethtool_get_settings(netdev, &cmd))
205 ret = sprintf(buf, fmt_udec, ethtool_cmd_speed(&cmd)); 204 ret = sprintf(buf, fmt_dec, ethtool_cmd_speed(&cmd));
206 } 205 }
207 rtnl_unlock(); 206 rtnl_unlock();
208 return ret; 207 return ret;
@@ -1481,6 +1480,15 @@ static int of_dev_node_match(struct device *dev, const void *data)
1481 return ret == 0 ? dev->of_node == data : ret; 1480 return ret == 0 ? dev->of_node == data : ret;
1482} 1481}
1483 1482
1483/*
1484 * of_find_net_device_by_node - lookup the net device for the device node
1485 * @np: OF device node
1486 *
1487 * Looks up the net_device structure corresponding with the device node.
1488 * If successful, returns a pointer to the net_device with the embedded
1489 * struct device refcount incremented by one, or NULL on failure. The
1490 * refcount must be dropped when done with the net_device.
1491 */
1484struct net_device *of_find_net_device_by_node(struct device_node *np) 1492struct net_device *of_find_net_device_by_node(struct device_node *np)
1485{ 1493{
1486 struct device *dev; 1494 struct device *dev;
diff --git a/net/core/netpoll.c b/net/core/netpoll.c
index 6aa3db8dfc3b..8bdada242a7d 100644
--- a/net/core/netpoll.c
+++ b/net/core/netpoll.c
@@ -142,7 +142,7 @@ static void queue_process(struct work_struct *work)
142 */ 142 */
143static int poll_one_napi(struct napi_struct *napi, int budget) 143static int poll_one_napi(struct napi_struct *napi, int budget)
144{ 144{
145 int work; 145 int work = 0;
146 146
147 /* net_rx_action's ->poll() invocations and our's are 147 /* net_rx_action's ->poll() invocations and our's are
148 * synchronized by this test which is only made while 148 * synchronized by this test which is only made while
@@ -151,7 +151,12 @@ static int poll_one_napi(struct napi_struct *napi, int budget)
151 if (!test_bit(NAPI_STATE_SCHED, &napi->state)) 151 if (!test_bit(NAPI_STATE_SCHED, &napi->state))
152 return budget; 152 return budget;
153 153
154 set_bit(NAPI_STATE_NPSVC, &napi->state); 154 /* If we set this bit but see that it has already been set,
155 * that indicates that napi has been disabled and we need
156 * to abort this operation
157 */
158 if (test_and_set_bit(NAPI_STATE_NPSVC, &napi->state))
159 goto out;
155 160
156 work = napi->poll(napi, budget); 161 work = napi->poll(napi, budget);
157 WARN_ONCE(work > budget, "%pF exceeded budget in poll\n", napi->poll); 162 WARN_ONCE(work > budget, "%pF exceeded budget in poll\n", napi->poll);
@@ -159,6 +164,7 @@ static int poll_one_napi(struct napi_struct *napi, int budget)
159 164
160 clear_bit(NAPI_STATE_NPSVC, &napi->state); 165 clear_bit(NAPI_STATE_NPSVC, &napi->state);
161 166
167out:
162 return budget - work; 168 return budget - work;
163} 169}
164 170
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index a466821d1441..0ec48403ed68 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -3047,6 +3047,7 @@ static int rtnl_bridge_getlink(struct sk_buff *skb, struct netlink_callback *cb)
3047 u32 portid = NETLINK_CB(cb->skb).portid; 3047 u32 portid = NETLINK_CB(cb->skb).portid;
3048 u32 seq = cb->nlh->nlmsg_seq; 3048 u32 seq = cb->nlh->nlmsg_seq;
3049 u32 filter_mask = 0; 3049 u32 filter_mask = 0;
3050 int err;
3050 3051
3051 if (nlmsg_len(cb->nlh) > sizeof(struct ifinfomsg)) { 3052 if (nlmsg_len(cb->nlh) > sizeof(struct ifinfomsg)) {
3052 struct nlattr *extfilt; 3053 struct nlattr *extfilt;
@@ -3067,20 +3068,25 @@ static int rtnl_bridge_getlink(struct sk_buff *skb, struct netlink_callback *cb)
3067 struct net_device *br_dev = netdev_master_upper_dev_get(dev); 3068 struct net_device *br_dev = netdev_master_upper_dev_get(dev);
3068 3069
3069 if (br_dev && br_dev->netdev_ops->ndo_bridge_getlink) { 3070 if (br_dev && br_dev->netdev_ops->ndo_bridge_getlink) {
3070 if (idx >= cb->args[0] && 3071 if (idx >= cb->args[0]) {
3071 br_dev->netdev_ops->ndo_bridge_getlink( 3072 err = br_dev->netdev_ops->ndo_bridge_getlink(
3072 skb, portid, seq, dev, filter_mask, 3073 skb, portid, seq, dev,
3073 NLM_F_MULTI) < 0) 3074 filter_mask, NLM_F_MULTI);
3074 break; 3075 if (err < 0 && err != -EOPNOTSUPP)
3076 break;
3077 }
3075 idx++; 3078 idx++;
3076 } 3079 }
3077 3080
3078 if (ops->ndo_bridge_getlink) { 3081 if (ops->ndo_bridge_getlink) {
3079 if (idx >= cb->args[0] && 3082 if (idx >= cb->args[0]) {
3080 ops->ndo_bridge_getlink(skb, portid, seq, dev, 3083 err = ops->ndo_bridge_getlink(skb, portid,
3081 filter_mask, 3084 seq, dev,
3082 NLM_F_MULTI) < 0) 3085 filter_mask,
3083 break; 3086 NLM_F_MULTI);
3087 if (err < 0 && err != -EOPNOTSUPP)
3088 break;
3089 }
3084 idx++; 3090 idx++;
3085 } 3091 }
3086 } 3092 }
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index dad4dd37e2aa..fab4599ba8b2 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -2958,11 +2958,12 @@ EXPORT_SYMBOL_GPL(skb_append_pagefrags);
2958 */ 2958 */
2959unsigned char *skb_pull_rcsum(struct sk_buff *skb, unsigned int len) 2959unsigned char *skb_pull_rcsum(struct sk_buff *skb, unsigned int len)
2960{ 2960{
2961 unsigned char *data = skb->data;
2962
2961 BUG_ON(len > skb->len); 2963 BUG_ON(len > skb->len);
2962 skb->len -= len; 2964 __skb_pull(skb, len);
2963 BUG_ON(skb->len < skb->data_len); 2965 skb_postpull_rcsum(skb, data, len);
2964 skb_postpull_rcsum(skb, skb->data, len); 2966 return skb->data;
2965 return skb->data += len;
2966} 2967}
2967EXPORT_SYMBOL_GPL(skb_pull_rcsum); 2968EXPORT_SYMBOL_GPL(skb_pull_rcsum);
2968 2969
diff --git a/net/core/sock.c b/net/core/sock.c
index ca2984afe16e..3307c02244d3 100644
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -2740,10 +2740,8 @@ static void req_prot_cleanup(struct request_sock_ops *rsk_prot)
2740 return; 2740 return;
2741 kfree(rsk_prot->slab_name); 2741 kfree(rsk_prot->slab_name);
2742 rsk_prot->slab_name = NULL; 2742 rsk_prot->slab_name = NULL;
2743 if (rsk_prot->slab) { 2743 kmem_cache_destroy(rsk_prot->slab);
2744 kmem_cache_destroy(rsk_prot->slab); 2744 rsk_prot->slab = NULL;
2745 rsk_prot->slab = NULL;
2746 }
2747} 2745}
2748 2746
2749static int req_prot_init(const struct proto *prot) 2747static int req_prot_init(const struct proto *prot)
@@ -2828,10 +2826,8 @@ void proto_unregister(struct proto *prot)
2828 list_del(&prot->node); 2826 list_del(&prot->node);
2829 mutex_unlock(&proto_list_mutex); 2827 mutex_unlock(&proto_list_mutex);
2830 2828
2831 if (prot->slab != NULL) { 2829 kmem_cache_destroy(prot->slab);
2832 kmem_cache_destroy(prot->slab); 2830 prot->slab = NULL;
2833 prot->slab = NULL;
2834 }
2835 2831
2836 req_prot_cleanup(prot->rsk_prot); 2832 req_prot_cleanup(prot->rsk_prot);
2837 2833
diff --git a/net/dccp/ackvec.c b/net/dccp/ackvec.c
index bd9e718c2a20..3de0d0362d7f 100644
--- a/net/dccp/ackvec.c
+++ b/net/dccp/ackvec.c
@@ -398,12 +398,8 @@ out_err:
398 398
399void dccp_ackvec_exit(void) 399void dccp_ackvec_exit(void)
400{ 400{
401 if (dccp_ackvec_slab != NULL) { 401 kmem_cache_destroy(dccp_ackvec_slab);
402 kmem_cache_destroy(dccp_ackvec_slab); 402 dccp_ackvec_slab = NULL;
403 dccp_ackvec_slab = NULL; 403 kmem_cache_destroy(dccp_ackvec_record_slab);
404 } 404 dccp_ackvec_record_slab = NULL;
405 if (dccp_ackvec_record_slab != NULL) {
406 kmem_cache_destroy(dccp_ackvec_record_slab);
407 dccp_ackvec_record_slab = NULL;
408 }
409} 405}
diff --git a/net/dccp/ccid.c b/net/dccp/ccid.c
index 83498975165f..90f77d08cc37 100644
--- a/net/dccp/ccid.c
+++ b/net/dccp/ccid.c
@@ -95,8 +95,7 @@ static struct kmem_cache *ccid_kmem_cache_create(int obj_size, char *slab_name_f
95 95
96static void ccid_kmem_cache_destroy(struct kmem_cache *slab) 96static void ccid_kmem_cache_destroy(struct kmem_cache *slab)
97{ 97{
98 if (slab != NULL) 98 kmem_cache_destroy(slab);
99 kmem_cache_destroy(slab);
100} 99}
101 100
102static int __init ccid_activate(struct ccid_operations *ccid_ops) 101static int __init ccid_activate(struct ccid_operations *ccid_ops)
diff --git a/net/dccp/minisocks.c b/net/dccp/minisocks.c
index 30addee2dd03..838f524cf11a 100644
--- a/net/dccp/minisocks.c
+++ b/net/dccp/minisocks.c
@@ -48,8 +48,6 @@ void dccp_time_wait(struct sock *sk, int state, int timeo)
48 tw->tw_ipv6only = sk->sk_ipv6only; 48 tw->tw_ipv6only = sk->sk_ipv6only;
49 } 49 }
50#endif 50#endif
51 /* Linkage updates. */
52 __inet_twsk_hashdance(tw, sk, &dccp_hashinfo);
53 51
54 /* Get the TIME_WAIT timeout firing. */ 52 /* Get the TIME_WAIT timeout firing. */
55 if (timeo < rto) 53 if (timeo < rto)
@@ -60,6 +58,8 @@ void dccp_time_wait(struct sock *sk, int state, int timeo)
60 timeo = DCCP_TIMEWAIT_LEN; 58 timeo = DCCP_TIMEWAIT_LEN;
61 59
62 inet_twsk_schedule(tw, timeo); 60 inet_twsk_schedule(tw, timeo);
61 /* Linkage updates. */
62 __inet_twsk_hashdance(tw, sk, &dccp_hashinfo);
63 inet_twsk_put(tw); 63 inet_twsk_put(tw);
64 } else { 64 } else {
65 /* Sorry, if we're out of memory, just CLOSE this 65 /* Sorry, if we're out of memory, just CLOSE this
diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c
index 76e3800765f8..c59fa5d9c22c 100644
--- a/net/dsa/dsa.c
+++ b/net/dsa/dsa.c
@@ -634,6 +634,10 @@ static void dsa_of_free_platform_data(struct dsa_platform_data *pd)
634 port_index++; 634 port_index++;
635 } 635 }
636 kfree(pd->chip[i].rtable); 636 kfree(pd->chip[i].rtable);
637
638 /* Drop our reference to the MDIO bus device */
639 if (pd->chip[i].host_dev)
640 put_device(pd->chip[i].host_dev);
637 } 641 }
638 kfree(pd->chip); 642 kfree(pd->chip);
639} 643}
@@ -661,16 +665,22 @@ static int dsa_of_probe(struct device *dev)
661 return -EPROBE_DEFER; 665 return -EPROBE_DEFER;
662 666
663 ethernet = of_parse_phandle(np, "dsa,ethernet", 0); 667 ethernet = of_parse_phandle(np, "dsa,ethernet", 0);
664 if (!ethernet) 668 if (!ethernet) {
665 return -EINVAL; 669 ret = -EINVAL;
670 goto out_put_mdio;
671 }
666 672
667 ethernet_dev = of_find_net_device_by_node(ethernet); 673 ethernet_dev = of_find_net_device_by_node(ethernet);
668 if (!ethernet_dev) 674 if (!ethernet_dev) {
669 return -EPROBE_DEFER; 675 ret = -EPROBE_DEFER;
676 goto out_put_mdio;
677 }
670 678
671 pd = kzalloc(sizeof(*pd), GFP_KERNEL); 679 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
672 if (!pd) 680 if (!pd) {
673 return -ENOMEM; 681 ret = -ENOMEM;
682 goto out_put_ethernet;
683 }
674 684
675 dev->platform_data = pd; 685 dev->platform_data = pd;
676 pd->of_netdev = ethernet_dev; 686 pd->of_netdev = ethernet_dev;
@@ -691,7 +701,9 @@ static int dsa_of_probe(struct device *dev)
691 cd = &pd->chip[chip_index]; 701 cd = &pd->chip[chip_index];
692 702
693 cd->of_node = child; 703 cd->of_node = child;
694 cd->host_dev = &mdio_bus->dev; 704
705 /* When assigning the host device, increment its refcount */
706 cd->host_dev = get_device(&mdio_bus->dev);
695 707
696 sw_addr = of_get_property(child, "reg", NULL); 708 sw_addr = of_get_property(child, "reg", NULL);
697 if (!sw_addr) 709 if (!sw_addr)
@@ -711,6 +723,12 @@ static int dsa_of_probe(struct device *dev)
711 ret = -EPROBE_DEFER; 723 ret = -EPROBE_DEFER;
712 goto out_free_chip; 724 goto out_free_chip;
713 } 725 }
726
727 /* Drop the mdio_bus device ref, replacing the host
728 * device with the mdio_bus_switch device, keeping
729 * the refcount from of_mdio_find_bus() above.
730 */
731 put_device(cd->host_dev);
714 cd->host_dev = &mdio_bus_switch->dev; 732 cd->host_dev = &mdio_bus_switch->dev;
715 } 733 }
716 734
@@ -744,6 +762,10 @@ static int dsa_of_probe(struct device *dev)
744 } 762 }
745 } 763 }
746 764
765 /* The individual chips hold their own refcount on the mdio bus,
766 * so drop ours */
767 put_device(&mdio_bus->dev);
768
747 return 0; 769 return 0;
748 770
749out_free_chip: 771out_free_chip:
@@ -751,6 +773,10 @@ out_free_chip:
751out_free: 773out_free:
752 kfree(pd); 774 kfree(pd);
753 dev->platform_data = NULL; 775 dev->platform_data = NULL;
776out_put_ethernet:
777 put_device(&ethernet_dev->dev);
778out_put_mdio:
779 put_device(&mdio_bus->dev);
754 return ret; 780 return ret;
755} 781}
756 782
@@ -762,6 +788,7 @@ static void dsa_of_remove(struct device *dev)
762 return; 788 return;
763 789
764 dsa_of_free_platform_data(pd); 790 dsa_of_free_platform_data(pd);
791 put_device(&pd->of_netdev->dev);
765 kfree(pd); 792 kfree(pd);
766} 793}
767#else 794#else
diff --git a/net/dsa/slave.c b/net/dsa/slave.c
index cce97385f743..7d91f4612ac0 100644
--- a/net/dsa/slave.c
+++ b/net/dsa/slave.c
@@ -458,12 +458,17 @@ static int dsa_slave_stp_update(struct net_device *dev, u8 state)
458static int dsa_slave_port_attr_set(struct net_device *dev, 458static int dsa_slave_port_attr_set(struct net_device *dev,
459 struct switchdev_attr *attr) 459 struct switchdev_attr *attr)
460{ 460{
461 int ret = 0; 461 struct dsa_slave_priv *p = netdev_priv(dev);
462 struct dsa_switch *ds = p->parent;
463 int ret;
462 464
463 switch (attr->id) { 465 switch (attr->id) {
464 case SWITCHDEV_ATTR_PORT_STP_STATE: 466 case SWITCHDEV_ATTR_PORT_STP_STATE:
465 if (attr->trans == SWITCHDEV_TRANS_COMMIT) 467 if (attr->trans == SWITCHDEV_TRANS_PREPARE)
466 ret = dsa_slave_stp_update(dev, attr->u.stp_state); 468 ret = ds->drv->port_stp_update ? 0 : -EOPNOTSUPP;
469 else
470 ret = ds->drv->port_stp_update(ds, p->port,
471 attr->u.stp_state);
467 break; 472 break;
468 default: 473 default:
469 ret = -EOPNOTSUPP; 474 ret = -EOPNOTSUPP;
diff --git a/net/dsa/tag_trailer.c b/net/dsa/tag_trailer.c
index d25efc93d8f1..b6ca0890d018 100644
--- a/net/dsa/tag_trailer.c
+++ b/net/dsa/tag_trailer.c
@@ -78,7 +78,7 @@ static int trailer_rcv(struct sk_buff *skb, struct net_device *dev,
78 78
79 trailer = skb_tail_pointer(skb) - 4; 79 trailer = skb_tail_pointer(skb) - 4;
80 if (trailer[0] != 0x80 || (trailer[1] & 0xf8) != 0x00 || 80 if (trailer[0] != 0x80 || (trailer[1] & 0xf8) != 0x00 ||
81 (trailer[3] & 0xef) != 0x00 || trailer[3] != 0x00) 81 (trailer[2] & 0xef) != 0x00 || trailer[3] != 0x00)
82 goto out_drop; 82 goto out_drop;
83 83
84 source_port = trailer[1] & 7; 84 source_port = trailer[1] & 7;
diff --git a/net/ipv4/arp.c b/net/ipv4/arp.c
index 30409b75e925..f03db8b7abee 100644
--- a/net/ipv4/arp.c
+++ b/net/ipv4/arp.c
@@ -113,6 +113,8 @@
113#include <net/arp.h> 113#include <net/arp.h>
114#include <net/ax25.h> 114#include <net/ax25.h>
115#include <net/netrom.h> 115#include <net/netrom.h>
116#include <net/dst_metadata.h>
117#include <net/ip_tunnels.h>
116 118
117#include <linux/uaccess.h> 119#include <linux/uaccess.h>
118 120
@@ -296,7 +298,8 @@ static void arp_send_dst(int type, int ptype, __be32 dest_ip,
296 struct net_device *dev, __be32 src_ip, 298 struct net_device *dev, __be32 src_ip,
297 const unsigned char *dest_hw, 299 const unsigned char *dest_hw,
298 const unsigned char *src_hw, 300 const unsigned char *src_hw,
299 const unsigned char *target_hw, struct sk_buff *oskb) 301 const unsigned char *target_hw,
302 struct dst_entry *dst)
300{ 303{
301 struct sk_buff *skb; 304 struct sk_buff *skb;
302 305
@@ -309,9 +312,7 @@ static void arp_send_dst(int type, int ptype, __be32 dest_ip,
309 if (!skb) 312 if (!skb)
310 return; 313 return;
311 314
312 if (oskb) 315 skb_dst_set(skb, dst);
313 skb_dst_copy(skb, oskb);
314
315 arp_xmit(skb); 316 arp_xmit(skb);
316} 317}
317 318
@@ -333,6 +334,7 @@ static void arp_solicit(struct neighbour *neigh, struct sk_buff *skb)
333 __be32 target = *(__be32 *)neigh->primary_key; 334 __be32 target = *(__be32 *)neigh->primary_key;
334 int probes = atomic_read(&neigh->probes); 335 int probes = atomic_read(&neigh->probes);
335 struct in_device *in_dev; 336 struct in_device *in_dev;
337 struct dst_entry *dst = NULL;
336 338
337 rcu_read_lock(); 339 rcu_read_lock();
338 in_dev = __in_dev_get_rcu(dev); 340 in_dev = __in_dev_get_rcu(dev);
@@ -381,9 +383,10 @@ static void arp_solicit(struct neighbour *neigh, struct sk_buff *skb)
381 } 383 }
382 } 384 }
383 385
386 if (skb && !(dev->priv_flags & IFF_XMIT_DST_RELEASE))
387 dst = dst_clone(skb_dst(skb));
384 arp_send_dst(ARPOP_REQUEST, ETH_P_ARP, target, dev, saddr, 388 arp_send_dst(ARPOP_REQUEST, ETH_P_ARP, target, dev, saddr,
385 dst_hw, dev->dev_addr, NULL, 389 dst_hw, dev->dev_addr, NULL, dst);
386 dev->priv_flags & IFF_XMIT_DST_RELEASE ? NULL : skb);
387} 390}
388 391
389static int arp_ignore(struct in_device *in_dev, __be32 sip, __be32 tip) 392static int arp_ignore(struct in_device *in_dev, __be32 sip, __be32 tip)
@@ -649,6 +652,7 @@ static int arp_process(struct sock *sk, struct sk_buff *skb)
649 int addr_type; 652 int addr_type;
650 struct neighbour *n; 653 struct neighbour *n;
651 struct net *net = dev_net(dev); 654 struct net *net = dev_net(dev);
655 struct dst_entry *reply_dst = NULL;
652 bool is_garp = false; 656 bool is_garp = false;
653 657
654 /* arp_rcv below verifies the ARP header and verifies the device 658 /* arp_rcv below verifies the ARP header and verifies the device
@@ -749,13 +753,18 @@ static int arp_process(struct sock *sk, struct sk_buff *skb)
749 * cache. 753 * cache.
750 */ 754 */
751 755
756 if (arp->ar_op == htons(ARPOP_REQUEST) && skb_metadata_dst(skb))
757 reply_dst = (struct dst_entry *)
758 iptunnel_metadata_reply(skb_metadata_dst(skb),
759 GFP_ATOMIC);
760
752 /* Special case: IPv4 duplicate address detection packet (RFC2131) */ 761 /* Special case: IPv4 duplicate address detection packet (RFC2131) */
753 if (sip == 0) { 762 if (sip == 0) {
754 if (arp->ar_op == htons(ARPOP_REQUEST) && 763 if (arp->ar_op == htons(ARPOP_REQUEST) &&
755 inet_addr_type_dev_table(net, dev, tip) == RTN_LOCAL && 764 inet_addr_type_dev_table(net, dev, tip) == RTN_LOCAL &&
756 !arp_ignore(in_dev, sip, tip)) 765 !arp_ignore(in_dev, sip, tip))
757 arp_send(ARPOP_REPLY, ETH_P_ARP, sip, dev, tip, sha, 766 arp_send_dst(ARPOP_REPLY, ETH_P_ARP, sip, dev, tip,
758 dev->dev_addr, sha); 767 sha, dev->dev_addr, sha, reply_dst);
759 goto out; 768 goto out;
760 } 769 }
761 770
@@ -774,9 +783,10 @@ static int arp_process(struct sock *sk, struct sk_buff *skb)
774 if (!dont_send) { 783 if (!dont_send) {
775 n = neigh_event_ns(&arp_tbl, sha, &sip, dev); 784 n = neigh_event_ns(&arp_tbl, sha, &sip, dev);
776 if (n) { 785 if (n) {
777 arp_send(ARPOP_REPLY, ETH_P_ARP, sip, 786 arp_send_dst(ARPOP_REPLY, ETH_P_ARP,
778 dev, tip, sha, dev->dev_addr, 787 sip, dev, tip, sha,
779 sha); 788 dev->dev_addr, sha,
789 reply_dst);
780 neigh_release(n); 790 neigh_release(n);
781 } 791 }
782 } 792 }
@@ -794,9 +804,10 @@ static int arp_process(struct sock *sk, struct sk_buff *skb)
794 if (NEIGH_CB(skb)->flags & LOCALLY_ENQUEUED || 804 if (NEIGH_CB(skb)->flags & LOCALLY_ENQUEUED ||
795 skb->pkt_type == PACKET_HOST || 805 skb->pkt_type == PACKET_HOST ||
796 NEIGH_VAR(in_dev->arp_parms, PROXY_DELAY) == 0) { 806 NEIGH_VAR(in_dev->arp_parms, PROXY_DELAY) == 0) {
797 arp_send(ARPOP_REPLY, ETH_P_ARP, sip, 807 arp_send_dst(ARPOP_REPLY, ETH_P_ARP,
798 dev, tip, sha, dev->dev_addr, 808 sip, dev, tip, sha,
799 sha); 809 dev->dev_addr, sha,
810 reply_dst);
800 } else { 811 } else {
801 pneigh_enqueue(&arp_tbl, 812 pneigh_enqueue(&arp_tbl,
802 in_dev->arp_parms, skb); 813 in_dev->arp_parms, skb);
diff --git a/net/ipv4/fib_frontend.c b/net/ipv4/fib_frontend.c
index 6fcbd215cdbc..690bcbc59f26 100644
--- a/net/ipv4/fib_frontend.c
+++ b/net/ipv4/fib_frontend.c
@@ -340,6 +340,7 @@ static int __fib_validate_source(struct sk_buff *skb, __be32 src, __be32 dst,
340 fl4.flowi4_tos = tos; 340 fl4.flowi4_tos = tos;
341 fl4.flowi4_scope = RT_SCOPE_UNIVERSE; 341 fl4.flowi4_scope = RT_SCOPE_UNIVERSE;
342 fl4.flowi4_tun_key.tun_id = 0; 342 fl4.flowi4_tun_key.tun_id = 0;
343 fl4.flowi4_flags = 0;
343 344
344 no_addr = idev->ifa_list == NULL; 345 no_addr = idev->ifa_list == NULL;
345 346
diff --git a/net/ipv4/fib_trie.c b/net/ipv4/fib_trie.c
index 26d6ffb6d23c..6c2af797f2f9 100644
--- a/net/ipv4/fib_trie.c
+++ b/net/ipv4/fib_trie.c
@@ -1426,7 +1426,7 @@ found:
1426 nh->nh_flags & RTNH_F_LINKDOWN && 1426 nh->nh_flags & RTNH_F_LINKDOWN &&
1427 !(fib_flags & FIB_LOOKUP_IGNORE_LINKSTATE)) 1427 !(fib_flags & FIB_LOOKUP_IGNORE_LINKSTATE))
1428 continue; 1428 continue;
1429 if (!(flp->flowi4_flags & FLOWI_FLAG_VRFSRC)) { 1429 if (!(flp->flowi4_flags & FLOWI_FLAG_SKIP_NH_OIF)) {
1430 if (flp->flowi4_oif && 1430 if (flp->flowi4_oif &&
1431 flp->flowi4_oif != nh->nh_oif) 1431 flp->flowi4_oif != nh->nh_oif)
1432 continue; 1432 continue;
diff --git a/net/ipv4/icmp.c b/net/ipv4/icmp.c
index 79fe05befcae..e5eb8ac4089d 100644
--- a/net/ipv4/icmp.c
+++ b/net/ipv4/icmp.c
@@ -427,7 +427,7 @@ static void icmp_reply(struct icmp_bxm *icmp_param, struct sk_buff *skb)
427 fl4.flowi4_mark = mark; 427 fl4.flowi4_mark = mark;
428 fl4.flowi4_tos = RT_TOS(ip_hdr(skb)->tos); 428 fl4.flowi4_tos = RT_TOS(ip_hdr(skb)->tos);
429 fl4.flowi4_proto = IPPROTO_ICMP; 429 fl4.flowi4_proto = IPPROTO_ICMP;
430 fl4.flowi4_oif = vrf_master_ifindex(skb->dev) ? : skb->dev->ifindex; 430 fl4.flowi4_oif = vrf_master_ifindex(skb->dev);
431 security_skb_classify_flow(skb, flowi4_to_flowi(&fl4)); 431 security_skb_classify_flow(skb, flowi4_to_flowi(&fl4));
432 rt = ip_route_output_key(net, &fl4); 432 rt = ip_route_output_key(net, &fl4);
433 if (IS_ERR(rt)) 433 if (IS_ERR(rt))
@@ -461,7 +461,7 @@ static struct rtable *icmp_route_lookup(struct net *net,
461 fl4->flowi4_proto = IPPROTO_ICMP; 461 fl4->flowi4_proto = IPPROTO_ICMP;
462 fl4->fl4_icmp_type = type; 462 fl4->fl4_icmp_type = type;
463 fl4->fl4_icmp_code = code; 463 fl4->fl4_icmp_code = code;
464 fl4->flowi4_oif = vrf_master_ifindex(skb_in->dev) ? : skb_in->dev->ifindex; 464 fl4->flowi4_oif = vrf_master_ifindex(skb_in->dev);
465 465
466 security_skb_classify_flow(skb_in, flowi4_to_flowi(fl4)); 466 security_skb_classify_flow(skb_in, flowi4_to_flowi(fl4));
467 rt = __ip_route_output_key(net, fl4); 467 rt = __ip_route_output_key(net, fl4);
diff --git a/net/ipv4/inet_connection_sock.c b/net/ipv4/inet_connection_sock.c
index 134957159c27..7bb9c39e0a4d 100644
--- a/net/ipv4/inet_connection_sock.c
+++ b/net/ipv4/inet_connection_sock.c
@@ -685,20 +685,20 @@ void reqsk_queue_hash_req(struct request_sock_queue *queue,
685 req->num_timeout = 0; 685 req->num_timeout = 0;
686 req->sk = NULL; 686 req->sk = NULL;
687 687
688 setup_timer(&req->rsk_timer, reqsk_timer_handler, (unsigned long)req);
689 mod_timer_pinned(&req->rsk_timer, jiffies + timeout);
690 req->rsk_hash = hash;
691
688 /* before letting lookups find us, make sure all req fields 692 /* before letting lookups find us, make sure all req fields
689 * are committed to memory and refcnt initialized. 693 * are committed to memory and refcnt initialized.
690 */ 694 */
691 smp_wmb(); 695 smp_wmb();
692 atomic_set(&req->rsk_refcnt, 2); 696 atomic_set(&req->rsk_refcnt, 2);
693 setup_timer(&req->rsk_timer, reqsk_timer_handler, (unsigned long)req);
694 req->rsk_hash = hash;
695 697
696 spin_lock(&queue->syn_wait_lock); 698 spin_lock(&queue->syn_wait_lock);
697 req->dl_next = lopt->syn_table[hash]; 699 req->dl_next = lopt->syn_table[hash];
698 lopt->syn_table[hash] = req; 700 lopt->syn_table[hash] = req;
699 spin_unlock(&queue->syn_wait_lock); 701 spin_unlock(&queue->syn_wait_lock);
700
701 mod_timer_pinned(&req->rsk_timer, jiffies + timeout);
702} 702}
703EXPORT_SYMBOL(reqsk_queue_hash_req); 703EXPORT_SYMBOL(reqsk_queue_hash_req);
704 704
diff --git a/net/ipv4/inet_timewait_sock.c b/net/ipv4/inet_timewait_sock.c
index ae22cc24fbe8..c67f9bd7699c 100644
--- a/net/ipv4/inet_timewait_sock.c
+++ b/net/ipv4/inet_timewait_sock.c
@@ -123,13 +123,15 @@ void __inet_twsk_hashdance(struct inet_timewait_sock *tw, struct sock *sk,
123 /* 123 /*
124 * Step 2: Hash TW into tcp ehash chain. 124 * Step 2: Hash TW into tcp ehash chain.
125 * Notes : 125 * Notes :
126 * - tw_refcnt is set to 3 because : 126 * - tw_refcnt is set to 4 because :
127 * - We have one reference from bhash chain. 127 * - We have one reference from bhash chain.
128 * - We have one reference from ehash chain. 128 * - We have one reference from ehash chain.
129 * - We have one reference from timer.
130 * - One reference for ourself (our caller will release it).
129 * We can use atomic_set() because prior spin_lock()/spin_unlock() 131 * We can use atomic_set() because prior spin_lock()/spin_unlock()
130 * committed into memory all tw fields. 132 * committed into memory all tw fields.
131 */ 133 */
132 atomic_set(&tw->tw_refcnt, 1 + 1 + 1); 134 atomic_set(&tw->tw_refcnt, 4);
133 inet_twsk_add_node_rcu(tw, &ehead->chain); 135 inet_twsk_add_node_rcu(tw, &ehead->chain);
134 136
135 /* Step 3: Remove SK from hash chain */ 137 /* Step 3: Remove SK from hash chain */
@@ -217,7 +219,7 @@ void inet_twsk_deschedule_put(struct inet_timewait_sock *tw)
217} 219}
218EXPORT_SYMBOL(inet_twsk_deschedule_put); 220EXPORT_SYMBOL(inet_twsk_deschedule_put);
219 221
220void inet_twsk_schedule(struct inet_timewait_sock *tw, const int timeo) 222void __inet_twsk_schedule(struct inet_timewait_sock *tw, int timeo, bool rearm)
221{ 223{
222 /* timeout := RTO * 3.5 224 /* timeout := RTO * 3.5
223 * 225 *
@@ -245,12 +247,14 @@ void inet_twsk_schedule(struct inet_timewait_sock *tw, const int timeo)
245 */ 247 */
246 248
247 tw->tw_kill = timeo <= 4*HZ; 249 tw->tw_kill = timeo <= 4*HZ;
248 if (!mod_timer_pinned(&tw->tw_timer, jiffies + timeo)) { 250 if (!rearm) {
249 atomic_inc(&tw->tw_refcnt); 251 BUG_ON(mod_timer_pinned(&tw->tw_timer, jiffies + timeo));
250 atomic_inc(&tw->tw_dr->tw_count); 252 atomic_inc(&tw->tw_dr->tw_count);
253 } else {
254 mod_timer_pending(&tw->tw_timer, jiffies + timeo);
251 } 255 }
252} 256}
253EXPORT_SYMBOL_GPL(inet_twsk_schedule); 257EXPORT_SYMBOL_GPL(__inet_twsk_schedule);
254 258
255void inet_twsk_purge(struct inet_hashinfo *hashinfo, 259void inet_twsk_purge(struct inet_hashinfo *hashinfo,
256 struct inet_timewait_death_row *twdr, int family) 260 struct inet_timewait_death_row *twdr, int family)
diff --git a/net/ipv4/ip_tunnel_core.c b/net/ipv4/ip_tunnel_core.c
index 29ed6c5a5185..84dce6a92f93 100644
--- a/net/ipv4/ip_tunnel_core.c
+++ b/net/ipv4/ip_tunnel_core.c
@@ -46,12 +46,13 @@
46#include <net/net_namespace.h> 46#include <net/net_namespace.h>
47#include <net/netns/generic.h> 47#include <net/netns/generic.h>
48#include <net/rtnetlink.h> 48#include <net/rtnetlink.h>
49#include <net/dst_metadata.h>
49 50
50int iptunnel_xmit(struct sock *sk, struct rtable *rt, struct sk_buff *skb, 51int iptunnel_xmit(struct sock *sk, struct rtable *rt, struct sk_buff *skb,
51 __be32 src, __be32 dst, __u8 proto, 52 __be32 src, __be32 dst, __u8 proto,
52 __u8 tos, __u8 ttl, __be16 df, bool xnet) 53 __u8 tos, __u8 ttl, __be16 df, bool xnet)
53{ 54{
54 int pkt_len = skb->len; 55 int pkt_len = skb->len - skb_inner_network_offset(skb);
55 struct iphdr *iph; 56 struct iphdr *iph;
56 int err; 57 int err;
57 58
@@ -119,6 +120,33 @@ int iptunnel_pull_header(struct sk_buff *skb, int hdr_len, __be16 inner_proto)
119} 120}
120EXPORT_SYMBOL_GPL(iptunnel_pull_header); 121EXPORT_SYMBOL_GPL(iptunnel_pull_header);
121 122
123struct metadata_dst *iptunnel_metadata_reply(struct metadata_dst *md,
124 gfp_t flags)
125{
126 struct metadata_dst *res;
127 struct ip_tunnel_info *dst, *src;
128
129 if (!md || md->u.tun_info.mode & IP_TUNNEL_INFO_TX)
130 return NULL;
131
132 res = metadata_dst_alloc(0, flags);
133 if (!res)
134 return NULL;
135
136 dst = &res->u.tun_info;
137 src = &md->u.tun_info;
138 dst->key.tun_id = src->key.tun_id;
139 if (src->mode & IP_TUNNEL_INFO_IPV6)
140 memcpy(&dst->key.u.ipv6.dst, &src->key.u.ipv6.src,
141 sizeof(struct in6_addr));
142 else
143 dst->key.u.ipv4.dst = src->key.u.ipv4.src;
144 dst->mode = src->mode | IP_TUNNEL_INFO_TX;
145
146 return res;
147}
148EXPORT_SYMBOL_GPL(iptunnel_metadata_reply);
149
122struct sk_buff *iptunnel_handle_offloads(struct sk_buff *skb, 150struct sk_buff *iptunnel_handle_offloads(struct sk_buff *skb,
123 bool csum_help, 151 bool csum_help,
124 int gso_type_mask) 152 int gso_type_mask)
@@ -198,8 +226,6 @@ static const struct nla_policy ip_tun_policy[LWTUNNEL_IP_MAX + 1] = {
198 [LWTUNNEL_IP_SRC] = { .type = NLA_U32 }, 226 [LWTUNNEL_IP_SRC] = { .type = NLA_U32 },
199 [LWTUNNEL_IP_TTL] = { .type = NLA_U8 }, 227 [LWTUNNEL_IP_TTL] = { .type = NLA_U8 },
200 [LWTUNNEL_IP_TOS] = { .type = NLA_U8 }, 228 [LWTUNNEL_IP_TOS] = { .type = NLA_U8 },
201 [LWTUNNEL_IP_SPORT] = { .type = NLA_U16 },
202 [LWTUNNEL_IP_DPORT] = { .type = NLA_U16 },
203 [LWTUNNEL_IP_FLAGS] = { .type = NLA_U16 }, 229 [LWTUNNEL_IP_FLAGS] = { .type = NLA_U16 },
204}; 230};
205 231
@@ -239,12 +265,6 @@ static int ip_tun_build_state(struct net_device *dev, struct nlattr *attr,
239 if (tb[LWTUNNEL_IP_TOS]) 265 if (tb[LWTUNNEL_IP_TOS])
240 tun_info->key.tos = nla_get_u8(tb[LWTUNNEL_IP_TOS]); 266 tun_info->key.tos = nla_get_u8(tb[LWTUNNEL_IP_TOS]);
241 267
242 if (tb[LWTUNNEL_IP_SPORT])
243 tun_info->key.tp_src = nla_get_be16(tb[LWTUNNEL_IP_SPORT]);
244
245 if (tb[LWTUNNEL_IP_DPORT])
246 tun_info->key.tp_dst = nla_get_be16(tb[LWTUNNEL_IP_DPORT]);
247
248 if (tb[LWTUNNEL_IP_FLAGS]) 268 if (tb[LWTUNNEL_IP_FLAGS])
249 tun_info->key.tun_flags = nla_get_u16(tb[LWTUNNEL_IP_FLAGS]); 269 tun_info->key.tun_flags = nla_get_u16(tb[LWTUNNEL_IP_FLAGS]);
250 270
@@ -266,8 +286,6 @@ static int ip_tun_fill_encap_info(struct sk_buff *skb,
266 nla_put_be32(skb, LWTUNNEL_IP_SRC, tun_info->key.u.ipv4.src) || 286 nla_put_be32(skb, LWTUNNEL_IP_SRC, tun_info->key.u.ipv4.src) ||
267 nla_put_u8(skb, LWTUNNEL_IP_TOS, tun_info->key.tos) || 287 nla_put_u8(skb, LWTUNNEL_IP_TOS, tun_info->key.tos) ||
268 nla_put_u8(skb, LWTUNNEL_IP_TTL, tun_info->key.ttl) || 288 nla_put_u8(skb, LWTUNNEL_IP_TTL, tun_info->key.ttl) ||
269 nla_put_u16(skb, LWTUNNEL_IP_SPORT, tun_info->key.tp_src) ||
270 nla_put_u16(skb, LWTUNNEL_IP_DPORT, tun_info->key.tp_dst) ||
271 nla_put_u16(skb, LWTUNNEL_IP_FLAGS, tun_info->key.tun_flags)) 289 nla_put_u16(skb, LWTUNNEL_IP_FLAGS, tun_info->key.tun_flags))
272 return -ENOMEM; 290 return -ENOMEM;
273 291
@@ -281,8 +299,6 @@ static int ip_tun_encap_nlsize(struct lwtunnel_state *lwtstate)
281 + nla_total_size(4) /* LWTUNNEL_IP_SRC */ 299 + nla_total_size(4) /* LWTUNNEL_IP_SRC */
282 + nla_total_size(1) /* LWTUNNEL_IP_TOS */ 300 + nla_total_size(1) /* LWTUNNEL_IP_TOS */
283 + nla_total_size(1) /* LWTUNNEL_IP_TTL */ 301 + nla_total_size(1) /* LWTUNNEL_IP_TTL */
284 + nla_total_size(2) /* LWTUNNEL_IP_SPORT */
285 + nla_total_size(2) /* LWTUNNEL_IP_DPORT */
286 + nla_total_size(2); /* LWTUNNEL_IP_FLAGS */ 302 + nla_total_size(2); /* LWTUNNEL_IP_FLAGS */
287} 303}
288 304
@@ -305,8 +321,6 @@ static const struct nla_policy ip6_tun_policy[LWTUNNEL_IP6_MAX + 1] = {
305 [LWTUNNEL_IP6_SRC] = { .len = sizeof(struct in6_addr) }, 321 [LWTUNNEL_IP6_SRC] = { .len = sizeof(struct in6_addr) },
306 [LWTUNNEL_IP6_HOPLIMIT] = { .type = NLA_U8 }, 322 [LWTUNNEL_IP6_HOPLIMIT] = { .type = NLA_U8 },
307 [LWTUNNEL_IP6_TC] = { .type = NLA_U8 }, 323 [LWTUNNEL_IP6_TC] = { .type = NLA_U8 },
308 [LWTUNNEL_IP6_SPORT] = { .type = NLA_U16 },
309 [LWTUNNEL_IP6_DPORT] = { .type = NLA_U16 },
310 [LWTUNNEL_IP6_FLAGS] = { .type = NLA_U16 }, 324 [LWTUNNEL_IP6_FLAGS] = { .type = NLA_U16 },
311}; 325};
312 326
@@ -346,12 +360,6 @@ static int ip6_tun_build_state(struct net_device *dev, struct nlattr *attr,
346 if (tb[LWTUNNEL_IP6_TC]) 360 if (tb[LWTUNNEL_IP6_TC])
347 tun_info->key.tos = nla_get_u8(tb[LWTUNNEL_IP6_TC]); 361 tun_info->key.tos = nla_get_u8(tb[LWTUNNEL_IP6_TC]);
348 362
349 if (tb[LWTUNNEL_IP6_SPORT])
350 tun_info->key.tp_src = nla_get_be16(tb[LWTUNNEL_IP6_SPORT]);
351
352 if (tb[LWTUNNEL_IP6_DPORT])
353 tun_info->key.tp_dst = nla_get_be16(tb[LWTUNNEL_IP6_DPORT]);
354
355 if (tb[LWTUNNEL_IP6_FLAGS]) 363 if (tb[LWTUNNEL_IP6_FLAGS])
356 tun_info->key.tun_flags = nla_get_u16(tb[LWTUNNEL_IP6_FLAGS]); 364 tun_info->key.tun_flags = nla_get_u16(tb[LWTUNNEL_IP6_FLAGS]);
357 365
@@ -373,8 +381,6 @@ static int ip6_tun_fill_encap_info(struct sk_buff *skb,
373 nla_put_in6_addr(skb, LWTUNNEL_IP6_SRC, &tun_info->key.u.ipv6.src) || 381 nla_put_in6_addr(skb, LWTUNNEL_IP6_SRC, &tun_info->key.u.ipv6.src) ||
374 nla_put_u8(skb, LWTUNNEL_IP6_HOPLIMIT, tun_info->key.tos) || 382 nla_put_u8(skb, LWTUNNEL_IP6_HOPLIMIT, tun_info->key.tos) ||
375 nla_put_u8(skb, LWTUNNEL_IP6_TC, tun_info->key.ttl) || 383 nla_put_u8(skb, LWTUNNEL_IP6_TC, tun_info->key.ttl) ||
376 nla_put_u16(skb, LWTUNNEL_IP6_SPORT, tun_info->key.tp_src) ||
377 nla_put_u16(skb, LWTUNNEL_IP6_DPORT, tun_info->key.tp_dst) ||
378 nla_put_u16(skb, LWTUNNEL_IP6_FLAGS, tun_info->key.tun_flags)) 384 nla_put_u16(skb, LWTUNNEL_IP6_FLAGS, tun_info->key.tun_flags))
379 return -ENOMEM; 385 return -ENOMEM;
380 386
@@ -388,8 +394,6 @@ static int ip6_tun_encap_nlsize(struct lwtunnel_state *lwtstate)
388 + nla_total_size(16) /* LWTUNNEL_IP6_SRC */ 394 + nla_total_size(16) /* LWTUNNEL_IP6_SRC */
389 + nla_total_size(1) /* LWTUNNEL_IP6_HOPLIMIT */ 395 + nla_total_size(1) /* LWTUNNEL_IP6_HOPLIMIT */
390 + nla_total_size(1) /* LWTUNNEL_IP6_TC */ 396 + nla_total_size(1) /* LWTUNNEL_IP6_TC */
391 + nla_total_size(2) /* LWTUNNEL_IP6_SPORT */
392 + nla_total_size(2) /* LWTUNNEL_IP6_DPORT */
393 + nla_total_size(2); /* LWTUNNEL_IP6_FLAGS */ 397 + nla_total_size(2); /* LWTUNNEL_IP6_FLAGS */
394} 398}
395 399
diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index 5f4a5565ad8b..c81deb85acb4 100644
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -1737,6 +1737,7 @@ static int ip_route_input_slow(struct sk_buff *skb, __be32 daddr, __be32 saddr,
1737 fl4.flowi4_mark = skb->mark; 1737 fl4.flowi4_mark = skb->mark;
1738 fl4.flowi4_tos = tos; 1738 fl4.flowi4_tos = tos;
1739 fl4.flowi4_scope = RT_SCOPE_UNIVERSE; 1739 fl4.flowi4_scope = RT_SCOPE_UNIVERSE;
1740 fl4.flowi4_flags = 0;
1740 fl4.daddr = daddr; 1741 fl4.daddr = daddr;
1741 fl4.saddr = saddr; 1742 fl4.saddr = saddr;
1742 err = fib_lookup(net, &fl4, &res, 0); 1743 err = fib_lookup(net, &fl4, &res, 0);
@@ -2045,6 +2046,7 @@ struct rtable *__ip_route_output_key(struct net *net, struct flowi4 *fl4)
2045 struct fib_result res; 2046 struct fib_result res;
2046 struct rtable *rth; 2047 struct rtable *rth;
2047 int orig_oif; 2048 int orig_oif;
2049 int err = -ENETUNREACH;
2048 2050
2049 res.tclassid = 0; 2051 res.tclassid = 0;
2050 res.fi = NULL; 2052 res.fi = NULL;
@@ -2153,7 +2155,8 @@ struct rtable *__ip_route_output_key(struct net *net, struct flowi4 *fl4)
2153 goto make_route; 2155 goto make_route;
2154 } 2156 }
2155 2157
2156 if (fib_lookup(net, fl4, &res, 0)) { 2158 err = fib_lookup(net, fl4, &res, 0);
2159 if (err) {
2157 res.fi = NULL; 2160 res.fi = NULL;
2158 res.table = NULL; 2161 res.table = NULL;
2159 if (fl4->flowi4_oif) { 2162 if (fl4->flowi4_oif) {
@@ -2181,7 +2184,7 @@ struct rtable *__ip_route_output_key(struct net *net, struct flowi4 *fl4)
2181 res.type = RTN_UNICAST; 2184 res.type = RTN_UNICAST;
2182 goto make_route; 2185 goto make_route;
2183 } 2186 }
2184 rth = ERR_PTR(-ENETUNREACH); 2187 rth = ERR_PTR(err);
2185 goto out; 2188 goto out;
2186 } 2189 }
2187 2190
diff --git a/net/ipv4/tcp_cubic.c b/net/ipv4/tcp_cubic.c
index c6ded6b2a79f..448c2615fece 100644
--- a/net/ipv4/tcp_cubic.c
+++ b/net/ipv4/tcp_cubic.c
@@ -154,14 +154,20 @@ static void bictcp_init(struct sock *sk)
154static void bictcp_cwnd_event(struct sock *sk, enum tcp_ca_event event) 154static void bictcp_cwnd_event(struct sock *sk, enum tcp_ca_event event)
155{ 155{
156 if (event == CA_EVENT_TX_START) { 156 if (event == CA_EVENT_TX_START) {
157 s32 delta = tcp_time_stamp - tcp_sk(sk)->lsndtime;
158 struct bictcp *ca = inet_csk_ca(sk); 157 struct bictcp *ca = inet_csk_ca(sk);
158 u32 now = tcp_time_stamp;
159 s32 delta;
160
161 delta = now - tcp_sk(sk)->lsndtime;
159 162
160 /* We were application limited (idle) for a while. 163 /* We were application limited (idle) for a while.
161 * Shift epoch_start to keep cwnd growth to cubic curve. 164 * Shift epoch_start to keep cwnd growth to cubic curve.
162 */ 165 */
163 if (ca->epoch_start && delta > 0) 166 if (ca->epoch_start && delta > 0) {
164 ca->epoch_start += delta; 167 ca->epoch_start += delta;
168 if (after(ca->epoch_start, now))
169 ca->epoch_start = now;
170 }
165 return; 171 return;
166 } 172 }
167} 173}
diff --git a/net/ipv4/tcp_minisocks.c b/net/ipv4/tcp_minisocks.c
index 6d8795b066ac..def765911ff8 100644
--- a/net/ipv4/tcp_minisocks.c
+++ b/net/ipv4/tcp_minisocks.c
@@ -162,9 +162,9 @@ kill_with_rst:
162 if (tcp_death_row.sysctl_tw_recycle && 162 if (tcp_death_row.sysctl_tw_recycle &&
163 tcptw->tw_ts_recent_stamp && 163 tcptw->tw_ts_recent_stamp &&
164 tcp_tw_remember_stamp(tw)) 164 tcp_tw_remember_stamp(tw))
165 inet_twsk_schedule(tw, tw->tw_timeout); 165 inet_twsk_reschedule(tw, tw->tw_timeout);
166 else 166 else
167 inet_twsk_schedule(tw, TCP_TIMEWAIT_LEN); 167 inet_twsk_reschedule(tw, TCP_TIMEWAIT_LEN);
168 return TCP_TW_ACK; 168 return TCP_TW_ACK;
169 } 169 }
170 170
@@ -201,7 +201,7 @@ kill:
201 return TCP_TW_SUCCESS; 201 return TCP_TW_SUCCESS;
202 } 202 }
203 } 203 }
204 inet_twsk_schedule(tw, TCP_TIMEWAIT_LEN); 204 inet_twsk_reschedule(tw, TCP_TIMEWAIT_LEN);
205 205
206 if (tmp_opt.saw_tstamp) { 206 if (tmp_opt.saw_tstamp) {
207 tcptw->tw_ts_recent = tmp_opt.rcv_tsval; 207 tcptw->tw_ts_recent = tmp_opt.rcv_tsval;
@@ -251,7 +251,7 @@ kill:
251 * Do not reschedule in the last case. 251 * Do not reschedule in the last case.
252 */ 252 */
253 if (paws_reject || th->ack) 253 if (paws_reject || th->ack)
254 inet_twsk_schedule(tw, TCP_TIMEWAIT_LEN); 254 inet_twsk_reschedule(tw, TCP_TIMEWAIT_LEN);
255 255
256 return tcp_timewait_check_oow_rate_limit( 256 return tcp_timewait_check_oow_rate_limit(
257 tw, skb, LINUX_MIB_TCPACKSKIPPEDTIMEWAIT); 257 tw, skb, LINUX_MIB_TCPACKSKIPPEDTIMEWAIT);
@@ -322,9 +322,6 @@ void tcp_time_wait(struct sock *sk, int state, int timeo)
322 } while (0); 322 } while (0);
323#endif 323#endif
324 324
325 /* Linkage updates. */
326 __inet_twsk_hashdance(tw, sk, &tcp_hashinfo);
327
328 /* Get the TIME_WAIT timeout firing. */ 325 /* Get the TIME_WAIT timeout firing. */
329 if (timeo < rto) 326 if (timeo < rto)
330 timeo = rto; 327 timeo = rto;
@@ -338,6 +335,8 @@ void tcp_time_wait(struct sock *sk, int state, int timeo)
338 } 335 }
339 336
340 inet_twsk_schedule(tw, timeo); 337 inet_twsk_schedule(tw, timeo);
338 /* Linkage updates. */
339 __inet_twsk_hashdance(tw, sk, &tcp_hashinfo);
341 inet_twsk_put(tw); 340 inet_twsk_put(tw);
342 } else { 341 } else {
343 /* Sorry, if we're out of memory, just CLOSE this 342 /* Sorry, if we're out of memory, just CLOSE this
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index f9a8a12b62ee..1100ffe4a722 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -2897,6 +2897,7 @@ void tcp_send_active_reset(struct sock *sk, gfp_t priority)
2897 skb_reserve(skb, MAX_TCP_HEADER); 2897 skb_reserve(skb, MAX_TCP_HEADER);
2898 tcp_init_nondata_skb(skb, tcp_acceptable_seq(sk), 2898 tcp_init_nondata_skb(skb, tcp_acceptable_seq(sk),
2899 TCPHDR_ACK | TCPHDR_RST); 2899 TCPHDR_ACK | TCPHDR_RST);
2900 skb_mstamp_get(&skb->skb_mstamp);
2900 /* Send it off. */ 2901 /* Send it off. */
2901 if (tcp_transmit_skb(sk, skb, 0, priority)) 2902 if (tcp_transmit_skb(sk, skb, 0, priority))
2902 NET_INC_STATS(sock_net(sk), LINUX_MIB_TCPABORTFAILED); 2903 NET_INC_STATS(sock_net(sk), LINUX_MIB_TCPABORTFAILED);
diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c
index c0a15e7f359f..f7d1d5e19e95 100644
--- a/net/ipv4/udp.c
+++ b/net/ipv4/udp.c
@@ -1024,7 +1024,8 @@ int udp_sendmsg(struct sock *sk, struct msghdr *msg, size_t len)
1024 if (netif_index_is_vrf(net, ipc.oif)) { 1024 if (netif_index_is_vrf(net, ipc.oif)) {
1025 flowi4_init_output(fl4, ipc.oif, sk->sk_mark, tos, 1025 flowi4_init_output(fl4, ipc.oif, sk->sk_mark, tos,
1026 RT_SCOPE_UNIVERSE, sk->sk_protocol, 1026 RT_SCOPE_UNIVERSE, sk->sk_protocol,
1027 (flow_flags | FLOWI_FLAG_VRFSRC), 1027 (flow_flags | FLOWI_FLAG_VRFSRC |
1028 FLOWI_FLAG_SKIP_NH_OIF),
1028 faddr, saddr, dport, 1029 faddr, saddr, dport,
1029 inet->inet_sport); 1030 inet->inet_sport);
1030 1031
diff --git a/net/ipv4/xfrm4_policy.c b/net/ipv4/xfrm4_policy.c
index bb919b28619f..c10a9ee68433 100644
--- a/net/ipv4/xfrm4_policy.c
+++ b/net/ipv4/xfrm4_policy.c
@@ -33,6 +33,8 @@ static struct dst_entry *__xfrm4_dst_lookup(struct net *net, struct flowi4 *fl4,
33 if (saddr) 33 if (saddr)
34 fl4->saddr = saddr->a4; 34 fl4->saddr = saddr->a4;
35 35
36 fl4->flowi4_flags = FLOWI_FLAG_SKIP_NH_OIF;
37
36 rt = __ip_route_output_key(net, fl4); 38 rt = __ip_route_output_key(net, fl4);
37 if (!IS_ERR(rt)) 39 if (!IS_ERR(rt))
38 return &rt->dst; 40 return &rt->dst;
diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
index 030fefdc9aed..900113376d4e 100644
--- a/net/ipv6/addrconf.c
+++ b/net/ipv6/addrconf.c
@@ -5127,13 +5127,12 @@ static void __ipv6_ifa_notify(int event, struct inet6_ifaddr *ifp)
5127 5127
5128 rt = addrconf_get_prefix_route(&ifp->peer_addr, 128, 5128 rt = addrconf_get_prefix_route(&ifp->peer_addr, 128,
5129 ifp->idev->dev, 0, 0); 5129 ifp->idev->dev, 0, 0);
5130 if (rt && ip6_del_rt(rt)) 5130 if (rt)
5131 dst_free(&rt->dst); 5131 ip6_del_rt(rt);
5132 } 5132 }
5133 dst_hold(&ifp->rt->dst); 5133 dst_hold(&ifp->rt->dst);
5134 5134
5135 if (ip6_del_rt(ifp->rt)) 5135 ip6_del_rt(ifp->rt);
5136 dst_free(&ifp->rt->dst);
5137 5136
5138 rt_genid_bump_ipv6(net); 5137 rt_genid_bump_ipv6(net);
5139 break; 5138 break;
diff --git a/net/ipv6/ip6_fib.c b/net/ipv6/ip6_fib.c
index 418d9823692b..7d2e0023c72d 100644
--- a/net/ipv6/ip6_fib.c
+++ b/net/ipv6/ip6_fib.c
@@ -155,6 +155,11 @@ static void node_free(struct fib6_node *fn)
155 kmem_cache_free(fib6_node_kmem, fn); 155 kmem_cache_free(fib6_node_kmem, fn);
156} 156}
157 157
158static void rt6_rcu_free(struct rt6_info *rt)
159{
160 call_rcu(&rt->dst.rcu_head, dst_rcu_free);
161}
162
158static void rt6_free_pcpu(struct rt6_info *non_pcpu_rt) 163static void rt6_free_pcpu(struct rt6_info *non_pcpu_rt)
159{ 164{
160 int cpu; 165 int cpu;
@@ -169,7 +174,7 @@ static void rt6_free_pcpu(struct rt6_info *non_pcpu_rt)
169 ppcpu_rt = per_cpu_ptr(non_pcpu_rt->rt6i_pcpu, cpu); 174 ppcpu_rt = per_cpu_ptr(non_pcpu_rt->rt6i_pcpu, cpu);
170 pcpu_rt = *ppcpu_rt; 175 pcpu_rt = *ppcpu_rt;
171 if (pcpu_rt) { 176 if (pcpu_rt) {
172 dst_free(&pcpu_rt->dst); 177 rt6_rcu_free(pcpu_rt);
173 *ppcpu_rt = NULL; 178 *ppcpu_rt = NULL;
174 } 179 }
175 } 180 }
@@ -181,7 +186,7 @@ static void rt6_release(struct rt6_info *rt)
181{ 186{
182 if (atomic_dec_and_test(&rt->rt6i_ref)) { 187 if (atomic_dec_and_test(&rt->rt6i_ref)) {
183 rt6_free_pcpu(rt); 188 rt6_free_pcpu(rt);
184 dst_free(&rt->dst); 189 rt6_rcu_free(rt);
185 } 190 }
186} 191}
187 192
@@ -846,7 +851,7 @@ add:
846 *ins = rt; 851 *ins = rt;
847 rt->rt6i_node = fn; 852 rt->rt6i_node = fn;
848 atomic_inc(&rt->rt6i_ref); 853 atomic_inc(&rt->rt6i_ref);
849 inet6_rt_notify(RTM_NEWROUTE, rt, info); 854 inet6_rt_notify(RTM_NEWROUTE, rt, info, 0);
850 info->nl_net->ipv6.rt6_stats->fib_rt_entries++; 855 info->nl_net->ipv6.rt6_stats->fib_rt_entries++;
851 856
852 if (!(fn->fn_flags & RTN_RTINFO)) { 857 if (!(fn->fn_flags & RTN_RTINFO)) {
@@ -872,7 +877,7 @@ add:
872 rt->rt6i_node = fn; 877 rt->rt6i_node = fn;
873 rt->dst.rt6_next = iter->dst.rt6_next; 878 rt->dst.rt6_next = iter->dst.rt6_next;
874 atomic_inc(&rt->rt6i_ref); 879 atomic_inc(&rt->rt6i_ref);
875 inet6_rt_notify(RTM_NEWROUTE, rt, info); 880 inet6_rt_notify(RTM_NEWROUTE, rt, info, NLM_F_REPLACE);
876 if (!(fn->fn_flags & RTN_RTINFO)) { 881 if (!(fn->fn_flags & RTN_RTINFO)) {
877 info->nl_net->ipv6.rt6_stats->fib_route_nodes++; 882 info->nl_net->ipv6.rt6_stats->fib_route_nodes++;
878 fn->fn_flags |= RTN_RTINFO; 883 fn->fn_flags |= RTN_RTINFO;
@@ -933,6 +938,10 @@ int fib6_add(struct fib6_node *root, struct rt6_info *rt,
933 int replace_required = 0; 938 int replace_required = 0;
934 int sernum = fib6_new_sernum(info->nl_net); 939 int sernum = fib6_new_sernum(info->nl_net);
935 940
941 if (WARN_ON_ONCE((rt->dst.flags & DST_NOCACHE) &&
942 !atomic_read(&rt->dst.__refcnt)))
943 return -EINVAL;
944
936 if (info->nlh) { 945 if (info->nlh) {
937 if (!(info->nlh->nlmsg_flags & NLM_F_CREATE)) 946 if (!(info->nlh->nlmsg_flags & NLM_F_CREATE))
938 allow_create = 0; 947 allow_create = 0;
@@ -1025,6 +1034,7 @@ int fib6_add(struct fib6_node *root, struct rt6_info *rt,
1025 fib6_start_gc(info->nl_net, rt); 1034 fib6_start_gc(info->nl_net, rt);
1026 if (!(rt->rt6i_flags & RTF_CACHE)) 1035 if (!(rt->rt6i_flags & RTF_CACHE))
1027 fib6_prune_clones(info->nl_net, pn); 1036 fib6_prune_clones(info->nl_net, pn);
1037 rt->dst.flags &= ~DST_NOCACHE;
1028 } 1038 }
1029 1039
1030out: 1040out:
@@ -1049,7 +1059,8 @@ out:
1049 atomic_inc(&pn->leaf->rt6i_ref); 1059 atomic_inc(&pn->leaf->rt6i_ref);
1050 } 1060 }
1051#endif 1061#endif
1052 dst_free(&rt->dst); 1062 if (!(rt->dst.flags & DST_NOCACHE))
1063 dst_free(&rt->dst);
1053 } 1064 }
1054 return err; 1065 return err;
1055 1066
@@ -1060,7 +1071,8 @@ out:
1060st_failure: 1071st_failure:
1061 if (fn && !(fn->fn_flags & (RTN_RTINFO|RTN_ROOT))) 1072 if (fn && !(fn->fn_flags & (RTN_RTINFO|RTN_ROOT)))
1062 fib6_repair_tree(info->nl_net, fn); 1073 fib6_repair_tree(info->nl_net, fn);
1063 dst_free(&rt->dst); 1074 if (!(rt->dst.flags & DST_NOCACHE))
1075 dst_free(&rt->dst);
1064 return err; 1076 return err;
1065#endif 1077#endif
1066} 1078}
@@ -1410,7 +1422,7 @@ static void fib6_del_route(struct fib6_node *fn, struct rt6_info **rtp,
1410 1422
1411 fib6_purge_rt(rt, fn, net); 1423 fib6_purge_rt(rt, fn, net);
1412 1424
1413 inet6_rt_notify(RTM_DELROUTE, rt, info); 1425 inet6_rt_notify(RTM_DELROUTE, rt, info, 0);
1414 rt6_release(rt); 1426 rt6_release(rt);
1415} 1427}
1416 1428
diff --git a/net/ipv6/ip6_gre.c b/net/ipv6/ip6_gre.c
index 4038c694ec03..3c7b9310b33f 100644
--- a/net/ipv6/ip6_gre.c
+++ b/net/ipv6/ip6_gre.c
@@ -404,13 +404,13 @@ static void ip6gre_err(struct sk_buff *skb, struct inet6_skb_parm *opt,
404 struct ipv6_tlv_tnl_enc_lim *tel; 404 struct ipv6_tlv_tnl_enc_lim *tel;
405 __u32 mtu; 405 __u32 mtu;
406 case ICMPV6_DEST_UNREACH: 406 case ICMPV6_DEST_UNREACH:
407 net_warn_ratelimited("%s: Path to destination invalid or inactive!\n", 407 net_dbg_ratelimited("%s: Path to destination invalid or inactive!\n",
408 t->parms.name); 408 t->parms.name);
409 break; 409 break;
410 case ICMPV6_TIME_EXCEED: 410 case ICMPV6_TIME_EXCEED:
411 if (code == ICMPV6_EXC_HOPLIMIT) { 411 if (code == ICMPV6_EXC_HOPLIMIT) {
412 net_warn_ratelimited("%s: Too small hop limit or routing loop in tunnel!\n", 412 net_dbg_ratelimited("%s: Too small hop limit or routing loop in tunnel!\n",
413 t->parms.name); 413 t->parms.name);
414 } 414 }
415 break; 415 break;
416 case ICMPV6_PARAMPROB: 416 case ICMPV6_PARAMPROB:
@@ -421,12 +421,12 @@ static void ip6gre_err(struct sk_buff *skb, struct inet6_skb_parm *opt,
421 if (teli && teli == be32_to_cpu(info) - 2) { 421 if (teli && teli == be32_to_cpu(info) - 2) {
422 tel = (struct ipv6_tlv_tnl_enc_lim *) &skb->data[teli]; 422 tel = (struct ipv6_tlv_tnl_enc_lim *) &skb->data[teli];
423 if (tel->encap_limit == 0) { 423 if (tel->encap_limit == 0) {
424 net_warn_ratelimited("%s: Too small encapsulation limit or routing loop in tunnel!\n", 424 net_dbg_ratelimited("%s: Too small encapsulation limit or routing loop in tunnel!\n",
425 t->parms.name); 425 t->parms.name);
426 } 426 }
427 } else { 427 } else {
428 net_warn_ratelimited("%s: Recipient unable to parse tunneled packet!\n", 428 net_dbg_ratelimited("%s: Recipient unable to parse tunneled packet!\n",
429 t->parms.name); 429 t->parms.name);
430 } 430 }
431 break; 431 break;
432 case ICMPV6_PKT_TOOBIG: 432 case ICMPV6_PKT_TOOBIG:
@@ -634,20 +634,20 @@ static netdev_tx_t ip6gre_xmit2(struct sk_buff *skb,
634 } 634 }
635 635
636 if (!fl6->flowi6_mark) 636 if (!fl6->flowi6_mark)
637 dst = ip6_tnl_dst_check(tunnel); 637 dst = ip6_tnl_dst_get(tunnel);
638 638
639 if (!dst) { 639 if (!dst) {
640 ndst = ip6_route_output(net, NULL, fl6); 640 dst = ip6_route_output(net, NULL, fl6);
641 641
642 if (ndst->error) 642 if (dst->error)
643 goto tx_err_link_failure; 643 goto tx_err_link_failure;
644 ndst = xfrm_lookup(net, ndst, flowi6_to_flowi(fl6), NULL, 0); 644 dst = xfrm_lookup(net, dst, flowi6_to_flowi(fl6), NULL, 0);
645 if (IS_ERR(ndst)) { 645 if (IS_ERR(dst)) {
646 err = PTR_ERR(ndst); 646 err = PTR_ERR(dst);
647 ndst = NULL; 647 dst = NULL;
648 goto tx_err_link_failure; 648 goto tx_err_link_failure;
649 } 649 }
650 dst = ndst; 650 ndst = dst;
651 } 651 }
652 652
653 tdev = dst->dev; 653 tdev = dst->dev;
@@ -702,12 +702,9 @@ static netdev_tx_t ip6gre_xmit2(struct sk_buff *skb,
702 skb = new_skb; 702 skb = new_skb;
703 } 703 }
704 704
705 if (fl6->flowi6_mark) { 705 if (!fl6->flowi6_mark && ndst)
706 skb_dst_set(skb, dst); 706 ip6_tnl_dst_set(tunnel, ndst);
707 ndst = NULL; 707 skb_dst_set(skb, dst);
708 } else {
709 skb_dst_set_noref(skb, dst);
710 }
711 708
712 proto = NEXTHDR_GRE; 709 proto = NEXTHDR_GRE;
713 if (encap_limit >= 0) { 710 if (encap_limit >= 0) {
@@ -762,14 +759,12 @@ static netdev_tx_t ip6gre_xmit2(struct sk_buff *skb,
762 skb_set_inner_protocol(skb, protocol); 759 skb_set_inner_protocol(skb, protocol);
763 760
764 ip6tunnel_xmit(NULL, skb, dev); 761 ip6tunnel_xmit(NULL, skb, dev);
765 if (ndst)
766 ip6_tnl_dst_store(tunnel, ndst);
767 return 0; 762 return 0;
768tx_err_link_failure: 763tx_err_link_failure:
769 stats->tx_carrier_errors++; 764 stats->tx_carrier_errors++;
770 dst_link_failure(skb); 765 dst_link_failure(skb);
771tx_err_dst_release: 766tx_err_dst_release:
772 dst_release(ndst); 767 dst_release(dst);
773 return err; 768 return err;
774} 769}
775 770
@@ -1223,6 +1218,9 @@ static const struct net_device_ops ip6gre_netdev_ops = {
1223 1218
1224static void ip6gre_dev_free(struct net_device *dev) 1219static void ip6gre_dev_free(struct net_device *dev)
1225{ 1220{
1221 struct ip6_tnl *t = netdev_priv(dev);
1222
1223 ip6_tnl_dst_destroy(t);
1226 free_percpu(dev->tstats); 1224 free_percpu(dev->tstats);
1227 free_netdev(dev); 1225 free_netdev(dev);
1228} 1226}
@@ -1245,9 +1243,10 @@ static void ip6gre_tunnel_setup(struct net_device *dev)
1245 netif_keep_dst(dev); 1243 netif_keep_dst(dev);
1246} 1244}
1247 1245
1248static int ip6gre_tunnel_init(struct net_device *dev) 1246static int ip6gre_tunnel_init_common(struct net_device *dev)
1249{ 1247{
1250 struct ip6_tnl *tunnel; 1248 struct ip6_tnl *tunnel;
1249 int ret;
1251 1250
1252 tunnel = netdev_priv(dev); 1251 tunnel = netdev_priv(dev);
1253 1252
@@ -1255,16 +1254,37 @@ static int ip6gre_tunnel_init(struct net_device *dev)
1255 tunnel->net = dev_net(dev); 1254 tunnel->net = dev_net(dev);
1256 strcpy(tunnel->parms.name, dev->name); 1255 strcpy(tunnel->parms.name, dev->name);
1257 1256
1257 dev->tstats = netdev_alloc_pcpu_stats(struct pcpu_sw_netstats);
1258 if (!dev->tstats)
1259 return -ENOMEM;
1260
1261 ret = ip6_tnl_dst_init(tunnel);
1262 if (ret) {
1263 free_percpu(dev->tstats);
1264 dev->tstats = NULL;
1265 return ret;
1266 }
1267
1268 return 0;
1269}
1270
1271static int ip6gre_tunnel_init(struct net_device *dev)
1272{
1273 struct ip6_tnl *tunnel;
1274 int ret;
1275
1276 ret = ip6gre_tunnel_init_common(dev);
1277 if (ret)
1278 return ret;
1279
1280 tunnel = netdev_priv(dev);
1281
1258 memcpy(dev->dev_addr, &tunnel->parms.laddr, sizeof(struct in6_addr)); 1282 memcpy(dev->dev_addr, &tunnel->parms.laddr, sizeof(struct in6_addr));
1259 memcpy(dev->broadcast, &tunnel->parms.raddr, sizeof(struct in6_addr)); 1283 memcpy(dev->broadcast, &tunnel->parms.raddr, sizeof(struct in6_addr));
1260 1284
1261 if (ipv6_addr_any(&tunnel->parms.raddr)) 1285 if (ipv6_addr_any(&tunnel->parms.raddr))
1262 dev->header_ops = &ip6gre_header_ops; 1286 dev->header_ops = &ip6gre_header_ops;
1263 1287
1264 dev->tstats = netdev_alloc_pcpu_stats(struct pcpu_sw_netstats);
1265 if (!dev->tstats)
1266 return -ENOMEM;
1267
1268 return 0; 1288 return 0;
1269} 1289}
1270 1290
@@ -1460,19 +1480,16 @@ static void ip6gre_netlink_parms(struct nlattr *data[],
1460static int ip6gre_tap_init(struct net_device *dev) 1480static int ip6gre_tap_init(struct net_device *dev)
1461{ 1481{
1462 struct ip6_tnl *tunnel; 1482 struct ip6_tnl *tunnel;
1483 int ret;
1463 1484
1464 tunnel = netdev_priv(dev); 1485 ret = ip6gre_tunnel_init_common(dev);
1486 if (ret)
1487 return ret;
1465 1488
1466 tunnel->dev = dev; 1489 tunnel = netdev_priv(dev);
1467 tunnel->net = dev_net(dev);
1468 strcpy(tunnel->parms.name, dev->name);
1469 1490
1470 ip6gre_tnl_link_config(tunnel, 1); 1491 ip6gre_tnl_link_config(tunnel, 1);
1471 1492
1472 dev->tstats = netdev_alloc_pcpu_stats(struct pcpu_sw_netstats);
1473 if (!dev->tstats)
1474 return -ENOMEM;
1475
1476 return 0; 1493 return 0;
1477} 1494}
1478 1495
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
index 26ea47930740..92b1aa38f121 100644
--- a/net/ipv6/ip6_output.c
+++ b/net/ipv6/ip6_output.c
@@ -586,20 +586,22 @@ int ip6_fragment(struct sock *sk, struct sk_buff *skb,
586 frag_id = ipv6_select_ident(net, &ipv6_hdr(skb)->daddr, 586 frag_id = ipv6_select_ident(net, &ipv6_hdr(skb)->daddr,
587 &ipv6_hdr(skb)->saddr); 587 &ipv6_hdr(skb)->saddr);
588 588
589 hroom = LL_RESERVED_SPACE(rt->dst.dev);
589 if (skb_has_frag_list(skb)) { 590 if (skb_has_frag_list(skb)) {
590 int first_len = skb_pagelen(skb); 591 int first_len = skb_pagelen(skb);
591 struct sk_buff *frag2; 592 struct sk_buff *frag2;
592 593
593 if (first_len - hlen > mtu || 594 if (first_len - hlen > mtu ||
594 ((first_len - hlen) & 7) || 595 ((first_len - hlen) & 7) ||
595 skb_cloned(skb)) 596 skb_cloned(skb) ||
597 skb_headroom(skb) < (hroom + sizeof(struct frag_hdr)))
596 goto slow_path; 598 goto slow_path;
597 599
598 skb_walk_frags(skb, frag) { 600 skb_walk_frags(skb, frag) {
599 /* Correct geometry. */ 601 /* Correct geometry. */
600 if (frag->len > mtu || 602 if (frag->len > mtu ||
601 ((frag->len & 7) && frag->next) || 603 ((frag->len & 7) && frag->next) ||
602 skb_headroom(frag) < hlen) 604 skb_headroom(frag) < (hlen + hroom + sizeof(struct frag_hdr)))
603 goto slow_path_clean; 605 goto slow_path_clean;
604 606
605 /* Partially cloned skb? */ 607 /* Partially cloned skb? */
@@ -616,8 +618,6 @@ int ip6_fragment(struct sock *sk, struct sk_buff *skb,
616 618
617 err = 0; 619 err = 0;
618 offset = 0; 620 offset = 0;
619 frag = skb_shinfo(skb)->frag_list;
620 skb_frag_list_init(skb);
621 /* BUILD HEADER */ 621 /* BUILD HEADER */
622 622
623 *prevhdr = NEXTHDR_FRAGMENT; 623 *prevhdr = NEXTHDR_FRAGMENT;
@@ -625,8 +625,11 @@ int ip6_fragment(struct sock *sk, struct sk_buff *skb,
625 if (!tmp_hdr) { 625 if (!tmp_hdr) {
626 IP6_INC_STATS(net, ip6_dst_idev(skb_dst(skb)), 626 IP6_INC_STATS(net, ip6_dst_idev(skb_dst(skb)),
627 IPSTATS_MIB_FRAGFAILS); 627 IPSTATS_MIB_FRAGFAILS);
628 return -ENOMEM; 628 err = -ENOMEM;
629 goto fail;
629 } 630 }
631 frag = skb_shinfo(skb)->frag_list;
632 skb_frag_list_init(skb);
630 633
631 __skb_pull(skb, hlen); 634 __skb_pull(skb, hlen);
632 fh = (struct frag_hdr *)__skb_push(skb, sizeof(struct frag_hdr)); 635 fh = (struct frag_hdr *)__skb_push(skb, sizeof(struct frag_hdr));
@@ -723,7 +726,6 @@ slow_path:
723 */ 726 */
724 727
725 *prevhdr = NEXTHDR_FRAGMENT; 728 *prevhdr = NEXTHDR_FRAGMENT;
726 hroom = LL_RESERVED_SPACE(rt->dst.dev);
727 troom = rt->dst.dev->needed_tailroom; 729 troom = rt->dst.dev->needed_tailroom;
728 730
729 /* 731 /*
diff --git a/net/ipv6/ip6_tunnel.c b/net/ipv6/ip6_tunnel.c
index b0ab420612bc..eabffbb89795 100644
--- a/net/ipv6/ip6_tunnel.c
+++ b/net/ipv6/ip6_tunnel.c
@@ -126,36 +126,92 @@ static struct net_device_stats *ip6_get_stats(struct net_device *dev)
126 * Locking : hash tables are protected by RCU and RTNL 126 * Locking : hash tables are protected by RCU and RTNL
127 */ 127 */
128 128
129struct dst_entry *ip6_tnl_dst_check(struct ip6_tnl *t) 129static void ip6_tnl_per_cpu_dst_set(struct ip6_tnl_dst *idst,
130 struct dst_entry *dst)
130{ 131{
131 struct dst_entry *dst = t->dst_cache; 132 write_seqlock_bh(&idst->lock);
133 dst_release(rcu_dereference_protected(
134 idst->dst,
135 lockdep_is_held(&idst->lock.lock)));
136 if (dst) {
137 dst_hold(dst);
138 idst->cookie = rt6_get_cookie((struct rt6_info *)dst);
139 } else {
140 idst->cookie = 0;
141 }
142 rcu_assign_pointer(idst->dst, dst);
143 write_sequnlock_bh(&idst->lock);
144}
145
146struct dst_entry *ip6_tnl_dst_get(struct ip6_tnl *t)
147{
148 struct ip6_tnl_dst *idst;
149 struct dst_entry *dst;
150 unsigned int seq;
151 u32 cookie;
132 152
133 if (dst && dst->obsolete && 153 idst = raw_cpu_ptr(t->dst_cache);
134 !dst->ops->check(dst, t->dst_cookie)) { 154
135 t->dst_cache = NULL; 155 rcu_read_lock();
156 do {
157 seq = read_seqbegin(&idst->lock);
158 dst = rcu_dereference(idst->dst);
159 cookie = idst->cookie;
160 } while (read_seqretry(&idst->lock, seq));
161
162 if (dst && !atomic_inc_not_zero(&dst->__refcnt))
163 dst = NULL;
164 rcu_read_unlock();
165
166 if (dst && dst->obsolete && !dst->ops->check(dst, cookie)) {
167 ip6_tnl_per_cpu_dst_set(idst, NULL);
136 dst_release(dst); 168 dst_release(dst);
137 return NULL; 169 dst = NULL;
138 } 170 }
139
140 return dst; 171 return dst;
141} 172}
142EXPORT_SYMBOL_GPL(ip6_tnl_dst_check); 173EXPORT_SYMBOL_GPL(ip6_tnl_dst_get);
143 174
144void ip6_tnl_dst_reset(struct ip6_tnl *t) 175void ip6_tnl_dst_reset(struct ip6_tnl *t)
145{ 176{
146 dst_release(t->dst_cache); 177 int i;
147 t->dst_cache = NULL; 178
179 for_each_possible_cpu(i)
180 ip6_tnl_per_cpu_dst_set(raw_cpu_ptr(t->dst_cache), NULL);
148} 181}
149EXPORT_SYMBOL_GPL(ip6_tnl_dst_reset); 182EXPORT_SYMBOL_GPL(ip6_tnl_dst_reset);
150 183
151void ip6_tnl_dst_store(struct ip6_tnl *t, struct dst_entry *dst) 184void ip6_tnl_dst_set(struct ip6_tnl *t, struct dst_entry *dst)
185{
186 ip6_tnl_per_cpu_dst_set(raw_cpu_ptr(t->dst_cache), dst);
187
188}
189EXPORT_SYMBOL_GPL(ip6_tnl_dst_set);
190
191void ip6_tnl_dst_destroy(struct ip6_tnl *t)
152{ 192{
153 struct rt6_info *rt = (struct rt6_info *) dst; 193 if (!t->dst_cache)
154 t->dst_cookie = rt6_get_cookie(rt); 194 return;
155 dst_release(t->dst_cache); 195
156 t->dst_cache = dst; 196 ip6_tnl_dst_reset(t);
197 free_percpu(t->dst_cache);
157} 198}
158EXPORT_SYMBOL_GPL(ip6_tnl_dst_store); 199EXPORT_SYMBOL_GPL(ip6_tnl_dst_destroy);
200
201int ip6_tnl_dst_init(struct ip6_tnl *t)
202{
203 int i;
204
205 t->dst_cache = alloc_percpu(struct ip6_tnl_dst);
206 if (!t->dst_cache)
207 return -ENOMEM;
208
209 for_each_possible_cpu(i)
210 seqlock_init(&per_cpu_ptr(t->dst_cache, i)->lock);
211
212 return 0;
213}
214EXPORT_SYMBOL_GPL(ip6_tnl_dst_init);
159 215
160/** 216/**
161 * ip6_tnl_lookup - fetch tunnel matching the end-point addresses 217 * ip6_tnl_lookup - fetch tunnel matching the end-point addresses
@@ -271,6 +327,9 @@ ip6_tnl_unlink(struct ip6_tnl_net *ip6n, struct ip6_tnl *t)
271 327
272static void ip6_dev_free(struct net_device *dev) 328static void ip6_dev_free(struct net_device *dev)
273{ 329{
330 struct ip6_tnl *t = netdev_priv(dev);
331
332 ip6_tnl_dst_destroy(t);
274 free_percpu(dev->tstats); 333 free_percpu(dev->tstats);
275 free_netdev(dev); 334 free_netdev(dev);
276} 335}
@@ -510,14 +569,14 @@ ip6_tnl_err(struct sk_buff *skb, __u8 ipproto, struct inet6_skb_parm *opt,
510 struct ipv6_tlv_tnl_enc_lim *tel; 569 struct ipv6_tlv_tnl_enc_lim *tel;
511 __u32 mtu; 570 __u32 mtu;
512 case ICMPV6_DEST_UNREACH: 571 case ICMPV6_DEST_UNREACH:
513 net_warn_ratelimited("%s: Path to destination invalid or inactive!\n", 572 net_dbg_ratelimited("%s: Path to destination invalid or inactive!\n",
514 t->parms.name); 573 t->parms.name);
515 rel_msg = 1; 574 rel_msg = 1;
516 break; 575 break;
517 case ICMPV6_TIME_EXCEED: 576 case ICMPV6_TIME_EXCEED:
518 if ((*code) == ICMPV6_EXC_HOPLIMIT) { 577 if ((*code) == ICMPV6_EXC_HOPLIMIT) {
519 net_warn_ratelimited("%s: Too small hop limit or routing loop in tunnel!\n", 578 net_dbg_ratelimited("%s: Too small hop limit or routing loop in tunnel!\n",
520 t->parms.name); 579 t->parms.name);
521 rel_msg = 1; 580 rel_msg = 1;
522 } 581 }
523 break; 582 break;
@@ -529,13 +588,13 @@ ip6_tnl_err(struct sk_buff *skb, __u8 ipproto, struct inet6_skb_parm *opt,
529 if (teli && teli == *info - 2) { 588 if (teli && teli == *info - 2) {
530 tel = (struct ipv6_tlv_tnl_enc_lim *) &skb->data[teli]; 589 tel = (struct ipv6_tlv_tnl_enc_lim *) &skb->data[teli];
531 if (tel->encap_limit == 0) { 590 if (tel->encap_limit == 0) {
532 net_warn_ratelimited("%s: Too small encapsulation limit or routing loop in tunnel!\n", 591 net_dbg_ratelimited("%s: Too small encapsulation limit or routing loop in tunnel!\n",
533 t->parms.name); 592 t->parms.name);
534 rel_msg = 1; 593 rel_msg = 1;
535 } 594 }
536 } else { 595 } else {
537 net_warn_ratelimited("%s: Recipient unable to parse tunneled packet!\n", 596 net_dbg_ratelimited("%s: Recipient unable to parse tunneled packet!\n",
538 t->parms.name); 597 t->parms.name);
539 } 598 }
540 break; 599 break;
541 case ICMPV6_PKT_TOOBIG: 600 case ICMPV6_PKT_TOOBIG:
@@ -1010,23 +1069,23 @@ static int ip6_tnl_xmit2(struct sk_buff *skb,
1010 memcpy(&fl6->daddr, addr6, sizeof(fl6->daddr)); 1069 memcpy(&fl6->daddr, addr6, sizeof(fl6->daddr));
1011 neigh_release(neigh); 1070 neigh_release(neigh);
1012 } else if (!fl6->flowi6_mark) 1071 } else if (!fl6->flowi6_mark)
1013 dst = ip6_tnl_dst_check(t); 1072 dst = ip6_tnl_dst_get(t);
1014 1073
1015 if (!ip6_tnl_xmit_ctl(t, &fl6->saddr, &fl6->daddr)) 1074 if (!ip6_tnl_xmit_ctl(t, &fl6->saddr, &fl6->daddr))
1016 goto tx_err_link_failure; 1075 goto tx_err_link_failure;
1017 1076
1018 if (!dst) { 1077 if (!dst) {
1019 ndst = ip6_route_output(net, NULL, fl6); 1078 dst = ip6_route_output(net, NULL, fl6);
1020 1079
1021 if (ndst->error) 1080 if (dst->error)
1022 goto tx_err_link_failure; 1081 goto tx_err_link_failure;
1023 ndst = xfrm_lookup(net, ndst, flowi6_to_flowi(fl6), NULL, 0); 1082 dst = xfrm_lookup(net, dst, flowi6_to_flowi(fl6), NULL, 0);
1024 if (IS_ERR(ndst)) { 1083 if (IS_ERR(dst)) {
1025 err = PTR_ERR(ndst); 1084 err = PTR_ERR(dst);
1026 ndst = NULL; 1085 dst = NULL;
1027 goto tx_err_link_failure; 1086 goto tx_err_link_failure;
1028 } 1087 }
1029 dst = ndst; 1088 ndst = dst;
1030 } 1089 }
1031 1090
1032 tdev = dst->dev; 1091 tdev = dst->dev;
@@ -1072,12 +1131,11 @@ static int ip6_tnl_xmit2(struct sk_buff *skb,
1072 consume_skb(skb); 1131 consume_skb(skb);
1073 skb = new_skb; 1132 skb = new_skb;
1074 } 1133 }
1075 if (fl6->flowi6_mark) { 1134
1076 skb_dst_set(skb, dst); 1135 if (!fl6->flowi6_mark && ndst)
1077 ndst = NULL; 1136 ip6_tnl_dst_set(t, ndst);
1078 } else { 1137 skb_dst_set(skb, dst);
1079 skb_dst_set_noref(skb, dst); 1138
1080 }
1081 skb->transport_header = skb->network_header; 1139 skb->transport_header = skb->network_header;
1082 1140
1083 proto = fl6->flowi6_proto; 1141 proto = fl6->flowi6_proto;
@@ -1101,14 +1159,12 @@ static int ip6_tnl_xmit2(struct sk_buff *skb,
1101 ipv6h->saddr = fl6->saddr; 1159 ipv6h->saddr = fl6->saddr;
1102 ipv6h->daddr = fl6->daddr; 1160 ipv6h->daddr = fl6->daddr;
1103 ip6tunnel_xmit(NULL, skb, dev); 1161 ip6tunnel_xmit(NULL, skb, dev);
1104 if (ndst)
1105 ip6_tnl_dst_store(t, ndst);
1106 return 0; 1162 return 0;
1107tx_err_link_failure: 1163tx_err_link_failure:
1108 stats->tx_carrier_errors++; 1164 stats->tx_carrier_errors++;
1109 dst_link_failure(skb); 1165 dst_link_failure(skb);
1110tx_err_dst_release: 1166tx_err_dst_release:
1111 dst_release(ndst); 1167 dst_release(dst);
1112 return err; 1168 return err;
1113} 1169}
1114 1170
@@ -1573,12 +1629,21 @@ static inline int
1573ip6_tnl_dev_init_gen(struct net_device *dev) 1629ip6_tnl_dev_init_gen(struct net_device *dev)
1574{ 1630{
1575 struct ip6_tnl *t = netdev_priv(dev); 1631 struct ip6_tnl *t = netdev_priv(dev);
1632 int ret;
1576 1633
1577 t->dev = dev; 1634 t->dev = dev;
1578 t->net = dev_net(dev); 1635 t->net = dev_net(dev);
1579 dev->tstats = netdev_alloc_pcpu_stats(struct pcpu_sw_netstats); 1636 dev->tstats = netdev_alloc_pcpu_stats(struct pcpu_sw_netstats);
1580 if (!dev->tstats) 1637 if (!dev->tstats)
1581 return -ENOMEM; 1638 return -ENOMEM;
1639
1640 ret = ip6_tnl_dst_init(t);
1641 if (ret) {
1642 free_percpu(dev->tstats);
1643 dev->tstats = NULL;
1644 return ret;
1645 }
1646
1582 return 0; 1647 return 0;
1583} 1648}
1584 1649
diff --git a/net/ipv6/route.c b/net/ipv6/route.c
index 53617d715188..cb32ce250db0 100644
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -1193,7 +1193,8 @@ struct dst_entry *ip6_route_output(struct net *net, const struct sock *sk,
1193 1193
1194 fl6->flowi6_iif = LOOPBACK_IFINDEX; 1194 fl6->flowi6_iif = LOOPBACK_IFINDEX;
1195 1195
1196 if ((sk && sk->sk_bound_dev_if) || rt6_need_strict(&fl6->daddr)) 1196 if ((sk && sk->sk_bound_dev_if) || rt6_need_strict(&fl6->daddr) ||
1197 fl6->flowi6_oif)
1197 flags |= RT6_LOOKUP_F_IFACE; 1198 flags |= RT6_LOOKUP_F_IFACE;
1198 1199
1199 if (!ipv6_addr_any(&fl6->saddr)) 1200 if (!ipv6_addr_any(&fl6->saddr))
@@ -1322,8 +1323,7 @@ static void ip6_link_failure(struct sk_buff *skb)
1322 if (rt) { 1323 if (rt) {
1323 if (rt->rt6i_flags & RTF_CACHE) { 1324 if (rt->rt6i_flags & RTF_CACHE) {
1324 dst_hold(&rt->dst); 1325 dst_hold(&rt->dst);
1325 if (ip6_del_rt(rt)) 1326 ip6_del_rt(rt);
1326 dst_free(&rt->dst);
1327 } else if (rt->rt6i_node && (rt->rt6i_flags & RTF_DEFAULT)) { 1327 } else if (rt->rt6i_node && (rt->rt6i_flags & RTF_DEFAULT)) {
1328 rt->rt6i_node->fn_sernum = -1; 1328 rt->rt6i_node->fn_sernum = -1;
1329 } 1329 }
@@ -1886,9 +1886,11 @@ int ip6_route_info_create(struct fib6_config *cfg, struct rt6_info **rt_ret)
1886 rt->dst.input = ip6_pkt_prohibit; 1886 rt->dst.input = ip6_pkt_prohibit;
1887 break; 1887 break;
1888 case RTN_THROW: 1888 case RTN_THROW:
1889 case RTN_UNREACHABLE:
1889 default: 1890 default:
1890 rt->dst.error = (cfg->fc_type == RTN_THROW) ? -EAGAIN 1891 rt->dst.error = (cfg->fc_type == RTN_THROW) ? -EAGAIN
1891 : -ENETUNREACH; 1892 : (cfg->fc_type == RTN_UNREACHABLE)
1893 ? -EHOSTUNREACH : -ENETUNREACH;
1892 rt->dst.output = ip6_pkt_discard_out; 1894 rt->dst.output = ip6_pkt_discard_out;
1893 rt->dst.input = ip6_pkt_discard; 1895 rt->dst.input = ip6_pkt_discard;
1894 break; 1896 break;
@@ -2028,7 +2030,8 @@ static int __ip6_del_rt(struct rt6_info *rt, struct nl_info *info)
2028 struct fib6_table *table; 2030 struct fib6_table *table;
2029 struct net *net = dev_net(rt->dst.dev); 2031 struct net *net = dev_net(rt->dst.dev);
2030 2032
2031 if (rt == net->ipv6.ip6_null_entry) { 2033 if (rt == net->ipv6.ip6_null_entry ||
2034 rt->dst.flags & DST_NOCACHE) {
2032 err = -ENOENT; 2035 err = -ENOENT;
2033 goto out; 2036 goto out;
2034 } 2037 }
@@ -2515,6 +2518,7 @@ struct rt6_info *addrconf_dst_alloc(struct inet6_dev *idev,
2515 rt->rt6i_dst.addr = *addr; 2518 rt->rt6i_dst.addr = *addr;
2516 rt->rt6i_dst.plen = 128; 2519 rt->rt6i_dst.plen = 128;
2517 rt->rt6i_table = fib6_get_table(net, RT6_TABLE_LOCAL); 2520 rt->rt6i_table = fib6_get_table(net, RT6_TABLE_LOCAL);
2521 rt->dst.flags |= DST_NOCACHE;
2518 2522
2519 atomic_set(&rt->dst.__refcnt, 1); 2523 atomic_set(&rt->dst.__refcnt, 1);
2520 2524
@@ -3303,7 +3307,8 @@ errout:
3303 return err; 3307 return err;
3304} 3308}
3305 3309
3306void inet6_rt_notify(int event, struct rt6_info *rt, struct nl_info *info) 3310void inet6_rt_notify(int event, struct rt6_info *rt, struct nl_info *info,
3311 unsigned int nlm_flags)
3307{ 3312{
3308 struct sk_buff *skb; 3313 struct sk_buff *skb;
3309 struct net *net = info->nl_net; 3314 struct net *net = info->nl_net;
@@ -3318,7 +3323,7 @@ void inet6_rt_notify(int event, struct rt6_info *rt, struct nl_info *info)
3318 goto errout; 3323 goto errout;
3319 3324
3320 err = rt6_fill_node(net, skb, rt, NULL, NULL, 0, 3325 err = rt6_fill_node(net, skb, rt, NULL, NULL, 0,
3321 event, info->portid, seq, 0, 0, 0); 3326 event, info->portid, seq, 0, 0, nlm_flags);
3322 if (err < 0) { 3327 if (err < 0) {
3323 /* -EMSGSIZE implies BUG in rt6_nlmsg_size() */ 3328 /* -EMSGSIZE implies BUG in rt6_nlmsg_size() */
3324 WARN_ON(err == -EMSGSIZE); 3329 WARN_ON(err == -EMSGSIZE);
diff --git a/net/l2tp/l2tp_core.c b/net/l2tp/l2tp_core.c
index f6b090df3930..afca2eb4dfa7 100644
--- a/net/l2tp/l2tp_core.c
+++ b/net/l2tp/l2tp_core.c
@@ -1319,7 +1319,7 @@ static void l2tp_tunnel_del_work(struct work_struct *work)
1319 tunnel = container_of(work, struct l2tp_tunnel, del_work); 1319 tunnel = container_of(work, struct l2tp_tunnel, del_work);
1320 sk = l2tp_tunnel_sock_lookup(tunnel); 1320 sk = l2tp_tunnel_sock_lookup(tunnel);
1321 if (!sk) 1321 if (!sk)
1322 return; 1322 goto out;
1323 1323
1324 sock = sk->sk_socket; 1324 sock = sk->sk_socket;
1325 1325
@@ -1341,6 +1341,8 @@ static void l2tp_tunnel_del_work(struct work_struct *work)
1341 } 1341 }
1342 1342
1343 l2tp_tunnel_sock_put(sk); 1343 l2tp_tunnel_sock_put(sk);
1344out:
1345 l2tp_tunnel_dec_refcount(tunnel);
1344} 1346}
1345 1347
1346/* Create a socket for the tunnel, if one isn't set up by 1348/* Create a socket for the tunnel, if one isn't set up by
@@ -1636,8 +1638,13 @@ EXPORT_SYMBOL_GPL(l2tp_tunnel_create);
1636 */ 1638 */
1637int l2tp_tunnel_delete(struct l2tp_tunnel *tunnel) 1639int l2tp_tunnel_delete(struct l2tp_tunnel *tunnel)
1638{ 1640{
1641 l2tp_tunnel_inc_refcount(tunnel);
1639 l2tp_tunnel_closeall(tunnel); 1642 l2tp_tunnel_closeall(tunnel);
1640 return (false == queue_work(l2tp_wq, &tunnel->del_work)); 1643 if (false == queue_work(l2tp_wq, &tunnel->del_work)) {
1644 l2tp_tunnel_dec_refcount(tunnel);
1645 return 1;
1646 }
1647 return 0;
1641} 1648}
1642EXPORT_SYMBOL_GPL(l2tp_tunnel_delete); 1649EXPORT_SYMBOL_GPL(l2tp_tunnel_delete);
1643 1650
diff --git a/net/mac80211/cfg.c b/net/mac80211/cfg.c
index 17b1fe961c5d..7a77a1470f25 100644
--- a/net/mac80211/cfg.c
+++ b/net/mac80211/cfg.c
@@ -2474,6 +2474,7 @@ static int ieee80211_set_cqm_rssi_config(struct wiphy *wiphy,
2474 2474
2475 bss_conf->cqm_rssi_thold = rssi_thold; 2475 bss_conf->cqm_rssi_thold = rssi_thold;
2476 bss_conf->cqm_rssi_hyst = rssi_hyst; 2476 bss_conf->cqm_rssi_hyst = rssi_hyst;
2477 sdata->u.mgd.last_cqm_event_signal = 0;
2477 2478
2478 /* tell the driver upon association, unless already associated */ 2479 /* tell the driver upon association, unless already associated */
2479 if (sdata->u.mgd.associated && 2480 if (sdata->u.mgd.associated &&
@@ -2518,15 +2519,17 @@ static int ieee80211_set_bitrate_mask(struct wiphy *wiphy,
2518 continue; 2519 continue;
2519 2520
2520 for (j = 0; j < IEEE80211_HT_MCS_MASK_LEN; j++) { 2521 for (j = 0; j < IEEE80211_HT_MCS_MASK_LEN; j++) {
2521 if (~sdata->rc_rateidx_mcs_mask[i][j]) 2522 if (~sdata->rc_rateidx_mcs_mask[i][j]) {
2522 sdata->rc_has_mcs_mask[i] = true; 2523 sdata->rc_has_mcs_mask[i] = true;
2524 break;
2525 }
2526 }
2523 2527
2524 if (~sdata->rc_rateidx_vht_mcs_mask[i][j]) 2528 for (j = 0; j < NL80211_VHT_NSS_MAX; j++) {
2529 if (~sdata->rc_rateidx_vht_mcs_mask[i][j]) {
2525 sdata->rc_has_vht_mcs_mask[i] = true; 2530 sdata->rc_has_vht_mcs_mask[i] = true;
2526
2527 if (sdata->rc_has_mcs_mask[i] &&
2528 sdata->rc_has_vht_mcs_mask[i])
2529 break; 2531 break;
2532 }
2530 } 2533 }
2531 } 2534 }
2532 2535
diff --git a/net/netfilter/nf_log.c b/net/netfilter/nf_log.c
index 675d12c69e32..a5d41dfa9f05 100644
--- a/net/netfilter/nf_log.c
+++ b/net/netfilter/nf_log.c
@@ -107,12 +107,17 @@ EXPORT_SYMBOL(nf_log_register);
107 107
108void nf_log_unregister(struct nf_logger *logger) 108void nf_log_unregister(struct nf_logger *logger)
109{ 109{
110 const struct nf_logger *log;
110 int i; 111 int i;
111 112
112 mutex_lock(&nf_log_mutex); 113 mutex_lock(&nf_log_mutex);
113 for (i = 0; i < NFPROTO_NUMPROTO; i++) 114 for (i = 0; i < NFPROTO_NUMPROTO; i++) {
114 RCU_INIT_POINTER(loggers[i][logger->type], NULL); 115 log = nft_log_dereference(loggers[i][logger->type]);
116 if (log == logger)
117 RCU_INIT_POINTER(loggers[i][logger->type], NULL);
118 }
115 mutex_unlock(&nf_log_mutex); 119 mutex_unlock(&nf_log_mutex);
120 synchronize_rcu();
116} 121}
117EXPORT_SYMBOL(nf_log_unregister); 122EXPORT_SYMBOL(nf_log_unregister);
118 123
diff --git a/net/netfilter/nft_compat.c b/net/netfilter/nft_compat.c
index 66def315eb56..9c8fab00164b 100644
--- a/net/netfilter/nft_compat.c
+++ b/net/netfilter/nft_compat.c
@@ -619,6 +619,13 @@ struct nft_xt {
619 619
620static struct nft_expr_type nft_match_type; 620static struct nft_expr_type nft_match_type;
621 621
622static bool nft_match_cmp(const struct xt_match *match,
623 const char *name, u32 rev, u32 family)
624{
625 return strcmp(match->name, name) == 0 && match->revision == rev &&
626 (match->family == NFPROTO_UNSPEC || match->family == family);
627}
628
622static const struct nft_expr_ops * 629static const struct nft_expr_ops *
623nft_match_select_ops(const struct nft_ctx *ctx, 630nft_match_select_ops(const struct nft_ctx *ctx,
624 const struct nlattr * const tb[]) 631 const struct nlattr * const tb[])
@@ -626,7 +633,7 @@ nft_match_select_ops(const struct nft_ctx *ctx,
626 struct nft_xt *nft_match; 633 struct nft_xt *nft_match;
627 struct xt_match *match; 634 struct xt_match *match;
628 char *mt_name; 635 char *mt_name;
629 __u32 rev, family; 636 u32 rev, family;
630 637
631 if (tb[NFTA_MATCH_NAME] == NULL || 638 if (tb[NFTA_MATCH_NAME] == NULL ||
632 tb[NFTA_MATCH_REV] == NULL || 639 tb[NFTA_MATCH_REV] == NULL ||
@@ -641,8 +648,7 @@ nft_match_select_ops(const struct nft_ctx *ctx,
641 list_for_each_entry(nft_match, &nft_match_list, head) { 648 list_for_each_entry(nft_match, &nft_match_list, head) {
642 struct xt_match *match = nft_match->ops.data; 649 struct xt_match *match = nft_match->ops.data;
643 650
644 if (strcmp(match->name, mt_name) == 0 && 651 if (nft_match_cmp(match, mt_name, rev, family)) {
645 match->revision == rev && match->family == family) {
646 if (!try_module_get(match->me)) 652 if (!try_module_get(match->me))
647 return ERR_PTR(-ENOENT); 653 return ERR_PTR(-ENOENT);
648 654
@@ -693,6 +699,13 @@ static LIST_HEAD(nft_target_list);
693 699
694static struct nft_expr_type nft_target_type; 700static struct nft_expr_type nft_target_type;
695 701
702static bool nft_target_cmp(const struct xt_target *tg,
703 const char *name, u32 rev, u32 family)
704{
705 return strcmp(tg->name, name) == 0 && tg->revision == rev &&
706 (tg->family == NFPROTO_UNSPEC || tg->family == family);
707}
708
696static const struct nft_expr_ops * 709static const struct nft_expr_ops *
697nft_target_select_ops(const struct nft_ctx *ctx, 710nft_target_select_ops(const struct nft_ctx *ctx,
698 const struct nlattr * const tb[]) 711 const struct nlattr * const tb[])
@@ -700,7 +713,7 @@ nft_target_select_ops(const struct nft_ctx *ctx,
700 struct nft_xt *nft_target; 713 struct nft_xt *nft_target;
701 struct xt_target *target; 714 struct xt_target *target;
702 char *tg_name; 715 char *tg_name;
703 __u32 rev, family; 716 u32 rev, family;
704 717
705 if (tb[NFTA_TARGET_NAME] == NULL || 718 if (tb[NFTA_TARGET_NAME] == NULL ||
706 tb[NFTA_TARGET_REV] == NULL || 719 tb[NFTA_TARGET_REV] == NULL ||
@@ -715,8 +728,7 @@ nft_target_select_ops(const struct nft_ctx *ctx,
715 list_for_each_entry(nft_target, &nft_target_list, head) { 728 list_for_each_entry(nft_target, &nft_target_list, head) {
716 struct xt_target *target = nft_target->ops.data; 729 struct xt_target *target = nft_target->ops.data;
717 730
718 if (strcmp(target->name, tg_name) == 0 && 731 if (nft_target_cmp(target, tg_name, rev, family)) {
719 target->revision == rev && target->family == family) {
720 if (!try_module_get(target->me)) 732 if (!try_module_get(target->me))
721 return ERR_PTR(-ENOENT); 733 return ERR_PTR(-ENOENT);
722 734
diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c
index 7f86d3b55060..8f060d7f9a0e 100644
--- a/net/netlink/af_netlink.c
+++ b/net/netlink/af_netlink.c
@@ -125,6 +125,24 @@ static inline u32 netlink_group_mask(u32 group)
125 return group ? 1 << (group - 1) : 0; 125 return group ? 1 << (group - 1) : 0;
126} 126}
127 127
128static struct sk_buff *netlink_to_full_skb(const struct sk_buff *skb,
129 gfp_t gfp_mask)
130{
131 unsigned int len = skb_end_offset(skb);
132 struct sk_buff *new;
133
134 new = alloc_skb(len, gfp_mask);
135 if (new == NULL)
136 return NULL;
137
138 NETLINK_CB(new).portid = NETLINK_CB(skb).portid;
139 NETLINK_CB(new).dst_group = NETLINK_CB(skb).dst_group;
140 NETLINK_CB(new).creds = NETLINK_CB(skb).creds;
141
142 memcpy(skb_put(new, len), skb->data, len);
143 return new;
144}
145
128int netlink_add_tap(struct netlink_tap *nt) 146int netlink_add_tap(struct netlink_tap *nt)
129{ 147{
130 if (unlikely(nt->dev->type != ARPHRD_NETLINK)) 148 if (unlikely(nt->dev->type != ARPHRD_NETLINK))
@@ -206,7 +224,11 @@ static int __netlink_deliver_tap_skb(struct sk_buff *skb,
206 int ret = -ENOMEM; 224 int ret = -ENOMEM;
207 225
208 dev_hold(dev); 226 dev_hold(dev);
209 nskb = skb_clone(skb, GFP_ATOMIC); 227
228 if (netlink_skb_is_mmaped(skb) || is_vmalloc_addr(skb->head))
229 nskb = netlink_to_full_skb(skb, GFP_ATOMIC);
230 else
231 nskb = skb_clone(skb, GFP_ATOMIC);
210 if (nskb) { 232 if (nskb) {
211 nskb->dev = dev; 233 nskb->dev = dev;
212 nskb->protocol = htons((u16) sk->sk_protocol); 234 nskb->protocol = htons((u16) sk->sk_protocol);
@@ -279,11 +301,6 @@ static void netlink_rcv_wake(struct sock *sk)
279} 301}
280 302
281#ifdef CONFIG_NETLINK_MMAP 303#ifdef CONFIG_NETLINK_MMAP
282static bool netlink_skb_is_mmaped(const struct sk_buff *skb)
283{
284 return NETLINK_CB(skb).flags & NETLINK_SKB_MMAPED;
285}
286
287static bool netlink_rx_is_mmaped(struct sock *sk) 304static bool netlink_rx_is_mmaped(struct sock *sk)
288{ 305{
289 return nlk_sk(sk)->rx_ring.pg_vec != NULL; 306 return nlk_sk(sk)->rx_ring.pg_vec != NULL;
@@ -846,7 +863,6 @@ static void netlink_ring_set_copied(struct sock *sk, struct sk_buff *skb)
846} 863}
847 864
848#else /* CONFIG_NETLINK_MMAP */ 865#else /* CONFIG_NETLINK_MMAP */
849#define netlink_skb_is_mmaped(skb) false
850#define netlink_rx_is_mmaped(sk) false 866#define netlink_rx_is_mmaped(sk) false
851#define netlink_tx_is_mmaped(sk) false 867#define netlink_tx_is_mmaped(sk) false
852#define netlink_mmap sock_no_mmap 868#define netlink_mmap sock_no_mmap
@@ -1094,8 +1110,8 @@ static int netlink_insert(struct sock *sk, u32 portid)
1094 1110
1095 lock_sock(sk); 1111 lock_sock(sk);
1096 1112
1097 err = -EBUSY; 1113 err = nlk_sk(sk)->portid == portid ? 0 : -EBUSY;
1098 if (nlk_sk(sk)->portid) 1114 if (nlk_sk(sk)->bound)
1099 goto err; 1115 goto err;
1100 1116
1101 err = -ENOMEM; 1117 err = -ENOMEM;
@@ -1115,10 +1131,14 @@ static int netlink_insert(struct sock *sk, u32 portid)
1115 err = -EOVERFLOW; 1131 err = -EOVERFLOW;
1116 if (err == -EEXIST) 1132 if (err == -EEXIST)
1117 err = -EADDRINUSE; 1133 err = -EADDRINUSE;
1118 nlk_sk(sk)->portid = 0;
1119 sock_put(sk); 1134 sock_put(sk);
1135 goto err;
1120 } 1136 }
1121 1137
1138 /* We need to ensure that the socket is hashed and visible. */
1139 smp_wmb();
1140 nlk_sk(sk)->bound = portid;
1141
1122err: 1142err:
1123 release_sock(sk); 1143 release_sock(sk);
1124 return err; 1144 return err;
@@ -1503,6 +1523,7 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr,
1503 struct sockaddr_nl *nladdr = (struct sockaddr_nl *)addr; 1523 struct sockaddr_nl *nladdr = (struct sockaddr_nl *)addr;
1504 int err; 1524 int err;
1505 long unsigned int groups = nladdr->nl_groups; 1525 long unsigned int groups = nladdr->nl_groups;
1526 bool bound;
1506 1527
1507 if (addr_len < sizeof(struct sockaddr_nl)) 1528 if (addr_len < sizeof(struct sockaddr_nl))
1508 return -EINVAL; 1529 return -EINVAL;
@@ -1519,9 +1540,14 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr,
1519 return err; 1540 return err;
1520 } 1541 }
1521 1542
1522 if (nlk->portid) 1543 bound = nlk->bound;
1544 if (bound) {
1545 /* Ensure nlk->portid is up-to-date. */
1546 smp_rmb();
1547
1523 if (nladdr->nl_pid != nlk->portid) 1548 if (nladdr->nl_pid != nlk->portid)
1524 return -EINVAL; 1549 return -EINVAL;
1550 }
1525 1551
1526 if (nlk->netlink_bind && groups) { 1552 if (nlk->netlink_bind && groups) {
1527 int group; 1553 int group;
@@ -1537,7 +1563,10 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr,
1537 } 1563 }
1538 } 1564 }
1539 1565
1540 if (!nlk->portid) { 1566 /* No need for barriers here as we return to user-space without
1567 * using any of the bound attributes.
1568 */
1569 if (!bound) {
1541 err = nladdr->nl_pid ? 1570 err = nladdr->nl_pid ?
1542 netlink_insert(sk, nladdr->nl_pid) : 1571 netlink_insert(sk, nladdr->nl_pid) :
1543 netlink_autobind(sock); 1572 netlink_autobind(sock);
@@ -1585,7 +1614,10 @@ static int netlink_connect(struct socket *sock, struct sockaddr *addr,
1585 !netlink_allowed(sock, NL_CFG_F_NONROOT_SEND)) 1614 !netlink_allowed(sock, NL_CFG_F_NONROOT_SEND))
1586 return -EPERM; 1615 return -EPERM;
1587 1616
1588 if (!nlk->portid) 1617 /* No need for barriers here as we return to user-space without
1618 * using any of the bound attributes.
1619 */
1620 if (!nlk->bound)
1589 err = netlink_autobind(sock); 1621 err = netlink_autobind(sock);
1590 1622
1591 if (err == 0) { 1623 if (err == 0) {
@@ -2426,10 +2458,13 @@ static int netlink_sendmsg(struct socket *sock, struct msghdr *msg, size_t len)
2426 dst_group = nlk->dst_group; 2458 dst_group = nlk->dst_group;
2427 } 2459 }
2428 2460
2429 if (!nlk->portid) { 2461 if (!nlk->bound) {
2430 err = netlink_autobind(sock); 2462 err = netlink_autobind(sock);
2431 if (err) 2463 if (err)
2432 goto out; 2464 goto out;
2465 } else {
2466 /* Ensure nlk is hashed and visible. */
2467 smp_rmb();
2433 } 2468 }
2434 2469
2435 /* It's a really convoluted way for userland to ask for mmaped 2470 /* It's a really convoluted way for userland to ask for mmaped
diff --git a/net/netlink/af_netlink.h b/net/netlink/af_netlink.h
index 89008405d6b4..14437d9b1965 100644
--- a/net/netlink/af_netlink.h
+++ b/net/netlink/af_netlink.h
@@ -35,6 +35,7 @@ struct netlink_sock {
35 unsigned long state; 35 unsigned long state;
36 size_t max_recvmsg_len; 36 size_t max_recvmsg_len;
37 wait_queue_head_t wait; 37 wait_queue_head_t wait;
38 bool bound;
38 bool cb_running; 39 bool cb_running;
39 struct netlink_callback cb; 40 struct netlink_callback cb;
40 struct mutex *cb_mutex; 41 struct mutex *cb_mutex;
@@ -59,6 +60,15 @@ static inline struct netlink_sock *nlk_sk(struct sock *sk)
59 return container_of(sk, struct netlink_sock, sk); 60 return container_of(sk, struct netlink_sock, sk);
60} 61}
61 62
63static inline bool netlink_skb_is_mmaped(const struct sk_buff *skb)
64{
65#ifdef CONFIG_NETLINK_MMAP
66 return NETLINK_CB(skb).flags & NETLINK_SKB_MMAPED;
67#else
68 return false;
69#endif /* CONFIG_NETLINK_MMAP */
70}
71
62struct netlink_table { 72struct netlink_table {
63 struct rhashtable hash; 73 struct rhashtable hash;
64 struct hlist_head mc_list; 74 struct hlist_head mc_list;
diff --git a/net/openvswitch/Kconfig b/net/openvswitch/Kconfig
index 2a071f470d57..d143aa9f6654 100644
--- a/net/openvswitch/Kconfig
+++ b/net/openvswitch/Kconfig
@@ -5,7 +5,8 @@
5config OPENVSWITCH 5config OPENVSWITCH
6 tristate "Open vSwitch" 6 tristate "Open vSwitch"
7 depends on INET 7 depends on INET
8 depends on (!NF_CONNTRACK || NF_CONNTRACK) 8 depends on !NF_CONNTRACK || \
9 (NF_CONNTRACK && (!NF_DEFRAG_IPV6 || NF_DEFRAG_IPV6))
9 select LIBCRC32C 10 select LIBCRC32C
10 select MPLS 11 select MPLS
11 select NET_MPLS_GSO 12 select NET_MPLS_GSO
diff --git a/net/openvswitch/conntrack.c b/net/openvswitch/conntrack.c
index e8e524ad8a01..002a755fa07e 100644
--- a/net/openvswitch/conntrack.c
+++ b/net/openvswitch/conntrack.c
@@ -275,13 +275,15 @@ static int ovs_ct_helper(struct sk_buff *skb, u16 proto)
275 case NFPROTO_IPV6: { 275 case NFPROTO_IPV6: {
276 u8 nexthdr = ipv6_hdr(skb)->nexthdr; 276 u8 nexthdr = ipv6_hdr(skb)->nexthdr;
277 __be16 frag_off; 277 __be16 frag_off;
278 int ofs;
278 279
279 protoff = ipv6_skip_exthdr(skb, sizeof(struct ipv6hdr), 280 ofs = ipv6_skip_exthdr(skb, sizeof(struct ipv6hdr), &nexthdr,
280 &nexthdr, &frag_off); 281 &frag_off);
281 if (protoff < 0 || (frag_off & htons(~0x7)) != 0) { 282 if (ofs < 0 || (frag_off & htons(~0x7)) != 0) {
282 pr_debug("proto header not found\n"); 283 pr_debug("proto header not found\n");
283 return NF_ACCEPT; 284 return NF_ACCEPT;
284 } 285 }
286 protoff = ofs;
285 break; 287 break;
286 } 288 }
287 default: 289 default:
diff --git a/net/openvswitch/datapath.c b/net/openvswitch/datapath.c
index 6fbd2decb19e..b816ff871528 100644
--- a/net/openvswitch/datapath.c
+++ b/net/openvswitch/datapath.c
@@ -952,7 +952,7 @@ static int ovs_flow_cmd_new(struct sk_buff *skb, struct genl_info *info)
952 if (error) 952 if (error)
953 goto err_kfree_flow; 953 goto err_kfree_flow;
954 954
955 ovs_flow_mask_key(&new_flow->key, &key, &mask); 955 ovs_flow_mask_key(&new_flow->key, &key, true, &mask);
956 956
957 /* Extract flow identifier. */ 957 /* Extract flow identifier. */
958 error = ovs_nla_get_identifier(&new_flow->id, a[OVS_FLOW_ATTR_UFID], 958 error = ovs_nla_get_identifier(&new_flow->id, a[OVS_FLOW_ATTR_UFID],
@@ -1080,7 +1080,7 @@ static struct sw_flow_actions *get_flow_actions(struct net *net,
1080 struct sw_flow_key masked_key; 1080 struct sw_flow_key masked_key;
1081 int error; 1081 int error;
1082 1082
1083 ovs_flow_mask_key(&masked_key, key, mask); 1083 ovs_flow_mask_key(&masked_key, key, true, mask);
1084 error = ovs_nla_copy_actions(net, a, &masked_key, &acts, log); 1084 error = ovs_nla_copy_actions(net, a, &masked_key, &acts, log);
1085 if (error) { 1085 if (error) {
1086 OVS_NLERR(log, 1086 OVS_NLERR(log,
diff --git a/net/openvswitch/flow_netlink.c b/net/openvswitch/flow_netlink.c
index c92d6a262bc5..5c030a4d7338 100644
--- a/net/openvswitch/flow_netlink.c
+++ b/net/openvswitch/flow_netlink.c
@@ -57,6 +57,7 @@ struct ovs_len_tbl {
57}; 57};
58 58
59#define OVS_ATTR_NESTED -1 59#define OVS_ATTR_NESTED -1
60#define OVS_ATTR_VARIABLE -2
60 61
61static void update_range(struct sw_flow_match *match, 62static void update_range(struct sw_flow_match *match,
62 size_t offset, size_t size, bool is_mask) 63 size_t offset, size_t size, bool is_mask)
@@ -304,6 +305,10 @@ size_t ovs_key_attr_size(void)
304 + nla_total_size(28); /* OVS_KEY_ATTR_ND */ 305 + nla_total_size(28); /* OVS_KEY_ATTR_ND */
305} 306}
306 307
308static const struct ovs_len_tbl ovs_vxlan_ext_key_lens[OVS_VXLAN_EXT_MAX + 1] = {
309 [OVS_VXLAN_EXT_GBP] = { .len = sizeof(u32) },
310};
311
307static const struct ovs_len_tbl ovs_tunnel_key_lens[OVS_TUNNEL_KEY_ATTR_MAX + 1] = { 312static const struct ovs_len_tbl ovs_tunnel_key_lens[OVS_TUNNEL_KEY_ATTR_MAX + 1] = {
308 [OVS_TUNNEL_KEY_ATTR_ID] = { .len = sizeof(u64) }, 313 [OVS_TUNNEL_KEY_ATTR_ID] = { .len = sizeof(u64) },
309 [OVS_TUNNEL_KEY_ATTR_IPV4_SRC] = { .len = sizeof(u32) }, 314 [OVS_TUNNEL_KEY_ATTR_IPV4_SRC] = { .len = sizeof(u32) },
@@ -315,8 +320,9 @@ static const struct ovs_len_tbl ovs_tunnel_key_lens[OVS_TUNNEL_KEY_ATTR_MAX + 1]
315 [OVS_TUNNEL_KEY_ATTR_TP_SRC] = { .len = sizeof(u16) }, 320 [OVS_TUNNEL_KEY_ATTR_TP_SRC] = { .len = sizeof(u16) },
316 [OVS_TUNNEL_KEY_ATTR_TP_DST] = { .len = sizeof(u16) }, 321 [OVS_TUNNEL_KEY_ATTR_TP_DST] = { .len = sizeof(u16) },
317 [OVS_TUNNEL_KEY_ATTR_OAM] = { .len = 0 }, 322 [OVS_TUNNEL_KEY_ATTR_OAM] = { .len = 0 },
318 [OVS_TUNNEL_KEY_ATTR_GENEVE_OPTS] = { .len = OVS_ATTR_NESTED }, 323 [OVS_TUNNEL_KEY_ATTR_GENEVE_OPTS] = { .len = OVS_ATTR_VARIABLE },
319 [OVS_TUNNEL_KEY_ATTR_VXLAN_OPTS] = { .len = OVS_ATTR_NESTED }, 324 [OVS_TUNNEL_KEY_ATTR_VXLAN_OPTS] = { .len = OVS_ATTR_NESTED,
325 .next = ovs_vxlan_ext_key_lens },
320}; 326};
321 327
322/* The size of the argument for each %OVS_KEY_ATTR_* Netlink attribute. */ 328/* The size of the argument for each %OVS_KEY_ATTR_* Netlink attribute. */
@@ -349,6 +355,13 @@ static const struct ovs_len_tbl ovs_key_lens[OVS_KEY_ATTR_MAX + 1] = {
349 [OVS_KEY_ATTR_CT_LABEL] = { .len = sizeof(struct ovs_key_ct_label) }, 355 [OVS_KEY_ATTR_CT_LABEL] = { .len = sizeof(struct ovs_key_ct_label) },
350}; 356};
351 357
358static bool check_attr_len(unsigned int attr_len, unsigned int expected_len)
359{
360 return expected_len == attr_len ||
361 expected_len == OVS_ATTR_NESTED ||
362 expected_len == OVS_ATTR_VARIABLE;
363}
364
352static bool is_all_zero(const u8 *fp, size_t size) 365static bool is_all_zero(const u8 *fp, size_t size)
353{ 366{
354 int i; 367 int i;
@@ -388,7 +401,7 @@ static int __parse_flow_nlattrs(const struct nlattr *attr,
388 } 401 }
389 402
390 expected_len = ovs_key_lens[type].len; 403 expected_len = ovs_key_lens[type].len;
391 if (nla_len(nla) != expected_len && expected_len != OVS_ATTR_NESTED) { 404 if (!check_attr_len(nla_len(nla), expected_len)) {
392 OVS_NLERR(log, "Key %d has unexpected len %d expected %d", 405 OVS_NLERR(log, "Key %d has unexpected len %d expected %d",
393 type, nla_len(nla), expected_len); 406 type, nla_len(nla), expected_len);
394 return -EINVAL; 407 return -EINVAL;
@@ -473,29 +486,50 @@ static int genev_tun_opt_from_nlattr(const struct nlattr *a,
473 return 0; 486 return 0;
474} 487}
475 488
476static const struct nla_policy vxlan_opt_policy[OVS_VXLAN_EXT_MAX + 1] = { 489static int vxlan_tun_opt_from_nlattr(const struct nlattr *attr,
477 [OVS_VXLAN_EXT_GBP] = { .type = NLA_U32 },
478};
479
480static int vxlan_tun_opt_from_nlattr(const struct nlattr *a,
481 struct sw_flow_match *match, bool is_mask, 490 struct sw_flow_match *match, bool is_mask,
482 bool log) 491 bool log)
483{ 492{
484 struct nlattr *tb[OVS_VXLAN_EXT_MAX+1]; 493 struct nlattr *a;
494 int rem;
485 unsigned long opt_key_offset; 495 unsigned long opt_key_offset;
486 struct vxlan_metadata opts; 496 struct vxlan_metadata opts;
487 int err;
488 497
489 BUILD_BUG_ON(sizeof(opts) > sizeof(match->key->tun_opts)); 498 BUILD_BUG_ON(sizeof(opts) > sizeof(match->key->tun_opts));
490 499
491 err = nla_parse_nested(tb, OVS_VXLAN_EXT_MAX, a, vxlan_opt_policy);
492 if (err < 0)
493 return err;
494
495 memset(&opts, 0, sizeof(opts)); 500 memset(&opts, 0, sizeof(opts));
501 nla_for_each_nested(a, attr, rem) {
502 int type = nla_type(a);
496 503
497 if (tb[OVS_VXLAN_EXT_GBP]) 504 if (type > OVS_VXLAN_EXT_MAX) {
498 opts.gbp = nla_get_u32(tb[OVS_VXLAN_EXT_GBP]); 505 OVS_NLERR(log, "VXLAN extension %d out of range max %d",
506 type, OVS_VXLAN_EXT_MAX);
507 return -EINVAL;
508 }
509
510 if (!check_attr_len(nla_len(a),
511 ovs_vxlan_ext_key_lens[type].len)) {
512 OVS_NLERR(log, "VXLAN extension %d has unexpected len %d expected %d",
513 type, nla_len(a),
514 ovs_vxlan_ext_key_lens[type].len);
515 return -EINVAL;
516 }
517
518 switch (type) {
519 case OVS_VXLAN_EXT_GBP:
520 opts.gbp = nla_get_u32(a);
521 break;
522 default:
523 OVS_NLERR(log, "Unknown VXLAN extension attribute %d",
524 type);
525 return -EINVAL;
526 }
527 }
528 if (rem) {
529 OVS_NLERR(log, "VXLAN extension message has %d unknown bytes.",
530 rem);
531 return -EINVAL;
532 }
499 533
500 if (!is_mask) 534 if (!is_mask)
501 SW_FLOW_KEY_PUT(match, tun_opts_len, sizeof(opts), false); 535 SW_FLOW_KEY_PUT(match, tun_opts_len, sizeof(opts), false);
@@ -528,8 +562,8 @@ static int ipv4_tun_from_nlattr(const struct nlattr *attr,
528 return -EINVAL; 562 return -EINVAL;
529 } 563 }
530 564
531 if (ovs_tunnel_key_lens[type].len != nla_len(a) && 565 if (!check_attr_len(nla_len(a),
532 ovs_tunnel_key_lens[type].len != OVS_ATTR_NESTED) { 566 ovs_tunnel_key_lens[type].len)) {
533 OVS_NLERR(log, "Tunnel attr %d has unexpected len %d expected %d", 567 OVS_NLERR(log, "Tunnel attr %d has unexpected len %d expected %d",
534 type, nla_len(a), ovs_tunnel_key_lens[type].len); 568 type, nla_len(a), ovs_tunnel_key_lens[type].len);
535 return -EINVAL; 569 return -EINVAL;
@@ -1052,10 +1086,13 @@ static void nlattr_set(struct nlattr *attr, u8 val,
1052 1086
1053 /* The nlattr stream should already have been validated */ 1087 /* The nlattr stream should already have been validated */
1054 nla_for_each_nested(nla, attr, rem) { 1088 nla_for_each_nested(nla, attr, rem) {
1055 if (tbl && tbl[nla_type(nla)].len == OVS_ATTR_NESTED) 1089 if (tbl[nla_type(nla)].len == OVS_ATTR_NESTED) {
1056 nlattr_set(nla, val, tbl[nla_type(nla)].next); 1090 if (tbl[nla_type(nla)].next)
1057 else 1091 tbl = tbl[nla_type(nla)].next;
1092 nlattr_set(nla, val, tbl);
1093 } else {
1058 memset(nla_data(nla), val, nla_len(nla)); 1094 memset(nla_data(nla), val, nla_len(nla));
1095 }
1059 } 1096 }
1060} 1097}
1061 1098
@@ -1922,8 +1959,7 @@ static int validate_set(const struct nlattr *a,
1922 key_len /= 2; 1959 key_len /= 2;
1923 1960
1924 if (key_type > OVS_KEY_ATTR_MAX || 1961 if (key_type > OVS_KEY_ATTR_MAX ||
1925 (ovs_key_lens[key_type].len != key_len && 1962 !check_attr_len(key_len, ovs_key_lens[key_type].len))
1926 ovs_key_lens[key_type].len != OVS_ATTR_NESTED))
1927 return -EINVAL; 1963 return -EINVAL;
1928 1964
1929 if (masked && !validate_masked(nla_data(ovs_key), key_len)) 1965 if (masked && !validate_masked(nla_data(ovs_key), key_len))
diff --git a/net/openvswitch/flow_table.c b/net/openvswitch/flow_table.c
index d22d8e948d0f..f2ea83ba4763 100644
--- a/net/openvswitch/flow_table.c
+++ b/net/openvswitch/flow_table.c
@@ -57,20 +57,21 @@ static u16 range_n_bytes(const struct sw_flow_key_range *range)
57} 57}
58 58
59void ovs_flow_mask_key(struct sw_flow_key *dst, const struct sw_flow_key *src, 59void ovs_flow_mask_key(struct sw_flow_key *dst, const struct sw_flow_key *src,
60 const struct sw_flow_mask *mask) 60 bool full, const struct sw_flow_mask *mask)
61{ 61{
62 const long *m = (const long *)((const u8 *)&mask->key + 62 int start = full ? 0 : mask->range.start;
63 mask->range.start); 63 int len = full ? sizeof *dst : range_n_bytes(&mask->range);
64 const long *s = (const long *)((const u8 *)src + 64 const long *m = (const long *)((const u8 *)&mask->key + start);
65 mask->range.start); 65 const long *s = (const long *)((const u8 *)src + start);
66 long *d = (long *)((u8 *)dst + mask->range.start); 66 long *d = (long *)((u8 *)dst + start);
67 int i; 67 int i;
68 68
69 /* The memory outside of the 'mask->range' are not set since 69 /* If 'full' is true then all of 'dst' is fully initialized. Otherwise,
70 * further operations on 'dst' only uses contents within 70 * if 'full' is false the memory outside of the 'mask->range' is left
71 * 'mask->range'. 71 * uninitialized. This can be used as an optimization when further
72 * operations on 'dst' only use contents within 'mask->range'.
72 */ 73 */
73 for (i = 0; i < range_n_bytes(&mask->range); i += sizeof(long)) 74 for (i = 0; i < len; i += sizeof(long))
74 *d++ = *s++ & *m++; 75 *d++ = *s++ & *m++;
75} 76}
76 77
@@ -475,7 +476,7 @@ static struct sw_flow *masked_flow_lookup(struct table_instance *ti,
475 u32 hash; 476 u32 hash;
476 struct sw_flow_key masked_key; 477 struct sw_flow_key masked_key;
477 478
478 ovs_flow_mask_key(&masked_key, unmasked, mask); 479 ovs_flow_mask_key(&masked_key, unmasked, false, mask);
479 hash = flow_hash(&masked_key, &mask->range); 480 hash = flow_hash(&masked_key, &mask->range);
480 head = find_bucket(ti, hash); 481 head = find_bucket(ti, hash);
481 hlist_for_each_entry_rcu(flow, head, flow_table.node[ti->node_ver]) { 482 hlist_for_each_entry_rcu(flow, head, flow_table.node[ti->node_ver]) {
diff --git a/net/openvswitch/flow_table.h b/net/openvswitch/flow_table.h
index 616eda10d955..2dd9900f533d 100644
--- a/net/openvswitch/flow_table.h
+++ b/net/openvswitch/flow_table.h
@@ -86,5 +86,5 @@ struct sw_flow *ovs_flow_tbl_lookup_ufid(struct flow_table *,
86bool ovs_flow_cmp(const struct sw_flow *, const struct sw_flow_match *); 86bool ovs_flow_cmp(const struct sw_flow *, const struct sw_flow_match *);
87 87
88void ovs_flow_mask_key(struct sw_flow_key *dst, const struct sw_flow_key *src, 88void ovs_flow_mask_key(struct sw_flow_key *dst, const struct sw_flow_key *src,
89 const struct sw_flow_mask *mask); 89 bool full, const struct sw_flow_mask *mask);
90#endif /* flow_table.h */ 90#endif /* flow_table.h */
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 7b8e39a22387..aa4b15c35884 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -230,6 +230,8 @@ struct packet_skb_cb {
230 } sa; 230 } sa;
231}; 231};
232 232
233#define vio_le() virtio_legacy_is_little_endian()
234
233#define PACKET_SKB_CB(__skb) ((struct packet_skb_cb *)((__skb)->cb)) 235#define PACKET_SKB_CB(__skb) ((struct packet_skb_cb *)((__skb)->cb))
234 236
235#define GET_PBDQC_FROM_RB(x) ((struct tpacket_kbdq_core *)(&(x)->prb_bdqc)) 237#define GET_PBDQC_FROM_RB(x) ((struct tpacket_kbdq_core *)(&(x)->prb_bdqc))
@@ -2680,15 +2682,15 @@ static int packet_snd(struct socket *sock, struct msghdr *msg, size_t len)
2680 goto out_unlock; 2682 goto out_unlock;
2681 2683
2682 if ((vnet_hdr.flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) && 2684 if ((vnet_hdr.flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) &&
2683 (__virtio16_to_cpu(false, vnet_hdr.csum_start) + 2685 (__virtio16_to_cpu(vio_le(), vnet_hdr.csum_start) +
2684 __virtio16_to_cpu(false, vnet_hdr.csum_offset) + 2 > 2686 __virtio16_to_cpu(vio_le(), vnet_hdr.csum_offset) + 2 >
2685 __virtio16_to_cpu(false, vnet_hdr.hdr_len))) 2687 __virtio16_to_cpu(vio_le(), vnet_hdr.hdr_len)))
2686 vnet_hdr.hdr_len = __cpu_to_virtio16(false, 2688 vnet_hdr.hdr_len = __cpu_to_virtio16(vio_le(),
2687 __virtio16_to_cpu(false, vnet_hdr.csum_start) + 2689 __virtio16_to_cpu(vio_le(), vnet_hdr.csum_start) +
2688 __virtio16_to_cpu(false, vnet_hdr.csum_offset) + 2); 2690 __virtio16_to_cpu(vio_le(), vnet_hdr.csum_offset) + 2);
2689 2691
2690 err = -EINVAL; 2692 err = -EINVAL;
2691 if (__virtio16_to_cpu(false, vnet_hdr.hdr_len) > len) 2693 if (__virtio16_to_cpu(vio_le(), vnet_hdr.hdr_len) > len)
2692 goto out_unlock; 2694 goto out_unlock;
2693 2695
2694 if (vnet_hdr.gso_type != VIRTIO_NET_HDR_GSO_NONE) { 2696 if (vnet_hdr.gso_type != VIRTIO_NET_HDR_GSO_NONE) {
@@ -2731,7 +2733,7 @@ static int packet_snd(struct socket *sock, struct msghdr *msg, size_t len)
2731 hlen = LL_RESERVED_SPACE(dev); 2733 hlen = LL_RESERVED_SPACE(dev);
2732 tlen = dev->needed_tailroom; 2734 tlen = dev->needed_tailroom;
2733 skb = packet_alloc_skb(sk, hlen + tlen, hlen, len, 2735 skb = packet_alloc_skb(sk, hlen + tlen, hlen, len,
2734 __virtio16_to_cpu(false, vnet_hdr.hdr_len), 2736 __virtio16_to_cpu(vio_le(), vnet_hdr.hdr_len),
2735 msg->msg_flags & MSG_DONTWAIT, &err); 2737 msg->msg_flags & MSG_DONTWAIT, &err);
2736 if (skb == NULL) 2738 if (skb == NULL)
2737 goto out_unlock; 2739 goto out_unlock;
@@ -2778,8 +2780,8 @@ static int packet_snd(struct socket *sock, struct msghdr *msg, size_t len)
2778 2780
2779 if (po->has_vnet_hdr) { 2781 if (po->has_vnet_hdr) {
2780 if (vnet_hdr.flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) { 2782 if (vnet_hdr.flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) {
2781 u16 s = __virtio16_to_cpu(false, vnet_hdr.csum_start); 2783 u16 s = __virtio16_to_cpu(vio_le(), vnet_hdr.csum_start);
2782 u16 o = __virtio16_to_cpu(false, vnet_hdr.csum_offset); 2784 u16 o = __virtio16_to_cpu(vio_le(), vnet_hdr.csum_offset);
2783 if (!skb_partial_csum_set(skb, s, o)) { 2785 if (!skb_partial_csum_set(skb, s, o)) {
2784 err = -EINVAL; 2786 err = -EINVAL;
2785 goto out_free; 2787 goto out_free;
@@ -2787,7 +2789,7 @@ static int packet_snd(struct socket *sock, struct msghdr *msg, size_t len)
2787 } 2789 }
2788 2790
2789 skb_shinfo(skb)->gso_size = 2791 skb_shinfo(skb)->gso_size =
2790 __virtio16_to_cpu(false, vnet_hdr.gso_size); 2792 __virtio16_to_cpu(vio_le(), vnet_hdr.gso_size);
2791 skb_shinfo(skb)->gso_type = gso_type; 2793 skb_shinfo(skb)->gso_type = gso_type;
2792 2794
2793 /* Header must be checked, and gso_segs computed. */ 2795 /* Header must be checked, and gso_segs computed. */
@@ -3161,9 +3163,9 @@ static int packet_recvmsg(struct socket *sock, struct msghdr *msg, size_t len,
3161 3163
3162 /* This is a hint as to how much should be linear. */ 3164 /* This is a hint as to how much should be linear. */
3163 vnet_hdr.hdr_len = 3165 vnet_hdr.hdr_len =
3164 __cpu_to_virtio16(false, skb_headlen(skb)); 3166 __cpu_to_virtio16(vio_le(), skb_headlen(skb));
3165 vnet_hdr.gso_size = 3167 vnet_hdr.gso_size =
3166 __cpu_to_virtio16(false, sinfo->gso_size); 3168 __cpu_to_virtio16(vio_le(), sinfo->gso_size);
3167 if (sinfo->gso_type & SKB_GSO_TCPV4) 3169 if (sinfo->gso_type & SKB_GSO_TCPV4)
3168 vnet_hdr.gso_type = VIRTIO_NET_HDR_GSO_TCPV4; 3170 vnet_hdr.gso_type = VIRTIO_NET_HDR_GSO_TCPV4;
3169 else if (sinfo->gso_type & SKB_GSO_TCPV6) 3171 else if (sinfo->gso_type & SKB_GSO_TCPV6)
@@ -3181,9 +3183,9 @@ static int packet_recvmsg(struct socket *sock, struct msghdr *msg, size_t len,
3181 3183
3182 if (skb->ip_summed == CHECKSUM_PARTIAL) { 3184 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3183 vnet_hdr.flags = VIRTIO_NET_HDR_F_NEEDS_CSUM; 3185 vnet_hdr.flags = VIRTIO_NET_HDR_F_NEEDS_CSUM;
3184 vnet_hdr.csum_start = __cpu_to_virtio16(false, 3186 vnet_hdr.csum_start = __cpu_to_virtio16(vio_le(),
3185 skb_checksum_start_offset(skb)); 3187 skb_checksum_start_offset(skb));
3186 vnet_hdr.csum_offset = __cpu_to_virtio16(false, 3188 vnet_hdr.csum_offset = __cpu_to_virtio16(vio_le(),
3187 skb->csum_offset); 3189 skb->csum_offset);
3188 } else if (skb->ip_summed == CHECKSUM_UNNECESSARY) { 3190 } else if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
3189 vnet_hdr.flags = VIRTIO_NET_HDR_F_DATA_VALID; 3191 vnet_hdr.flags = VIRTIO_NET_HDR_F_DATA_VALID;
diff --git a/net/sched/cls_fw.c b/net/sched/cls_fw.c
index 715e01e5910a..f23a3b68bba6 100644
--- a/net/sched/cls_fw.c
+++ b/net/sched/cls_fw.c
@@ -33,7 +33,6 @@
33 33
34struct fw_head { 34struct fw_head {
35 u32 mask; 35 u32 mask;
36 bool mask_set;
37 struct fw_filter __rcu *ht[HTSIZE]; 36 struct fw_filter __rcu *ht[HTSIZE];
38 struct rcu_head rcu; 37 struct rcu_head rcu;
39}; 38};
@@ -84,7 +83,7 @@ static int fw_classify(struct sk_buff *skb, const struct tcf_proto *tp,
84 } 83 }
85 } 84 }
86 } else { 85 } else {
87 /* old method */ 86 /* Old method: classify the packet using its skb mark. */
88 if (id && (TC_H_MAJ(id) == 0 || 87 if (id && (TC_H_MAJ(id) == 0 ||
89 !(TC_H_MAJ(id ^ tp->q->handle)))) { 88 !(TC_H_MAJ(id ^ tp->q->handle)))) {
90 res->classid = id; 89 res->classid = id;
@@ -114,14 +113,9 @@ static unsigned long fw_get(struct tcf_proto *tp, u32 handle)
114 113
115static int fw_init(struct tcf_proto *tp) 114static int fw_init(struct tcf_proto *tp)
116{ 115{
117 struct fw_head *head; 116 /* We don't allocate fw_head here, because in the old method
118 117 * we don't need it at all.
119 head = kzalloc(sizeof(struct fw_head), GFP_KERNEL); 118 */
120 if (head == NULL)
121 return -ENOBUFS;
122
123 head->mask_set = false;
124 rcu_assign_pointer(tp->root, head);
125 return 0; 119 return 0;
126} 120}
127 121
@@ -252,7 +246,7 @@ static int fw_change(struct net *net, struct sk_buff *in_skb,
252 int err; 246 int err;
253 247
254 if (!opt) 248 if (!opt)
255 return handle ? -EINVAL : 0; 249 return handle ? -EINVAL : 0; /* Succeed if it is old method. */
256 250
257 err = nla_parse_nested(tb, TCA_FW_MAX, opt, fw_policy); 251 err = nla_parse_nested(tb, TCA_FW_MAX, opt, fw_policy);
258 if (err < 0) 252 if (err < 0)
@@ -302,11 +296,17 @@ static int fw_change(struct net *net, struct sk_buff *in_skb,
302 if (!handle) 296 if (!handle)
303 return -EINVAL; 297 return -EINVAL;
304 298
305 if (!head->mask_set) { 299 if (!head) {
306 head->mask = 0xFFFFFFFF; 300 u32 mask = 0xFFFFFFFF;
307 if (tb[TCA_FW_MASK]) 301 if (tb[TCA_FW_MASK])
308 head->mask = nla_get_u32(tb[TCA_FW_MASK]); 302 mask = nla_get_u32(tb[TCA_FW_MASK]);
309 head->mask_set = true; 303
304 head = kzalloc(sizeof(*head), GFP_KERNEL);
305 if (!head)
306 return -ENOBUFS;
307 head->mask = mask;
308
309 rcu_assign_pointer(tp->root, head);
310 } 310 }
311 311
312 f = kzalloc(sizeof(struct fw_filter), GFP_KERNEL); 312 f = kzalloc(sizeof(struct fw_filter), GFP_KERNEL);
diff --git a/net/sctp/associola.c b/net/sctp/associola.c
index 197c3f59ecbf..b00f1f9611d6 100644
--- a/net/sctp/associola.c
+++ b/net/sctp/associola.c
@@ -1208,20 +1208,22 @@ void sctp_assoc_update(struct sctp_association *asoc,
1208 * within this document. 1208 * within this document.
1209 * 1209 *
1210 * Our basic strategy is to round-robin transports in priorities 1210 * Our basic strategy is to round-robin transports in priorities
1211 * according to sctp_state_prio_map[] e.g., if no such 1211 * according to sctp_trans_score() e.g., if no such
1212 * transport with state SCTP_ACTIVE exists, round-robin through 1212 * transport with state SCTP_ACTIVE exists, round-robin through
1213 * SCTP_UNKNOWN, etc. You get the picture. 1213 * SCTP_UNKNOWN, etc. You get the picture.
1214 */ 1214 */
1215static const u8 sctp_trans_state_to_prio_map[] = {
1216 [SCTP_ACTIVE] = 3, /* best case */
1217 [SCTP_UNKNOWN] = 2,
1218 [SCTP_PF] = 1,
1219 [SCTP_INACTIVE] = 0, /* worst case */
1220};
1221
1222static u8 sctp_trans_score(const struct sctp_transport *trans) 1215static u8 sctp_trans_score(const struct sctp_transport *trans)
1223{ 1216{
1224 return sctp_trans_state_to_prio_map[trans->state]; 1217 switch (trans->state) {
1218 case SCTP_ACTIVE:
1219 return 3; /* best case */
1220 case SCTP_UNKNOWN:
1221 return 2;
1222 case SCTP_PF:
1223 return 1;
1224 default: /* case SCTP_INACTIVE */
1225 return 0; /* worst case */
1226 }
1225} 1227}
1226 1228
1227static struct sctp_transport *sctp_trans_elect_tie(struct sctp_transport *trans1, 1229static struct sctp_transport *sctp_trans_elect_tie(struct sctp_transport *trans1,
diff --git a/net/sctp/protocol.c b/net/sctp/protocol.c
index b7143337e4fa..3d9ea9a48289 100644
--- a/net/sctp/protocol.c
+++ b/net/sctp/protocol.c
@@ -1186,7 +1186,7 @@ static void sctp_v4_del_protocol(void)
1186 unregister_inetaddr_notifier(&sctp_inetaddr_notifier); 1186 unregister_inetaddr_notifier(&sctp_inetaddr_notifier);
1187} 1187}
1188 1188
1189static int __net_init sctp_net_init(struct net *net) 1189static int __net_init sctp_defaults_init(struct net *net)
1190{ 1190{
1191 int status; 1191 int status;
1192 1192
@@ -1279,12 +1279,6 @@ static int __net_init sctp_net_init(struct net *net)
1279 1279
1280 sctp_dbg_objcnt_init(net); 1280 sctp_dbg_objcnt_init(net);
1281 1281
1282 /* Initialize the control inode/socket for handling OOTB packets. */
1283 if ((status = sctp_ctl_sock_init(net))) {
1284 pr_err("Failed to initialize the SCTP control sock\n");
1285 goto err_ctl_sock_init;
1286 }
1287
1288 /* Initialize the local address list. */ 1282 /* Initialize the local address list. */
1289 INIT_LIST_HEAD(&net->sctp.local_addr_list); 1283 INIT_LIST_HEAD(&net->sctp.local_addr_list);
1290 spin_lock_init(&net->sctp.local_addr_lock); 1284 spin_lock_init(&net->sctp.local_addr_lock);
@@ -1300,9 +1294,6 @@ static int __net_init sctp_net_init(struct net *net)
1300 1294
1301 return 0; 1295 return 0;
1302 1296
1303err_ctl_sock_init:
1304 sctp_dbg_objcnt_exit(net);
1305 sctp_proc_exit(net);
1306err_init_proc: 1297err_init_proc:
1307 cleanup_sctp_mibs(net); 1298 cleanup_sctp_mibs(net);
1308err_init_mibs: 1299err_init_mibs:
@@ -1311,15 +1302,12 @@ err_sysctl_register:
1311 return status; 1302 return status;
1312} 1303}
1313 1304
1314static void __net_exit sctp_net_exit(struct net *net) 1305static void __net_exit sctp_defaults_exit(struct net *net)
1315{ 1306{
1316 /* Free the local address list */ 1307 /* Free the local address list */
1317 sctp_free_addr_wq(net); 1308 sctp_free_addr_wq(net);
1318 sctp_free_local_addr_list(net); 1309 sctp_free_local_addr_list(net);
1319 1310
1320 /* Free the control endpoint. */
1321 inet_ctl_sock_destroy(net->sctp.ctl_sock);
1322
1323 sctp_dbg_objcnt_exit(net); 1311 sctp_dbg_objcnt_exit(net);
1324 1312
1325 sctp_proc_exit(net); 1313 sctp_proc_exit(net);
@@ -1327,9 +1315,32 @@ static void __net_exit sctp_net_exit(struct net *net)
1327 sctp_sysctl_net_unregister(net); 1315 sctp_sysctl_net_unregister(net);
1328} 1316}
1329 1317
1330static struct pernet_operations sctp_net_ops = { 1318static struct pernet_operations sctp_defaults_ops = {
1331 .init = sctp_net_init, 1319 .init = sctp_defaults_init,
1332 .exit = sctp_net_exit, 1320 .exit = sctp_defaults_exit,
1321};
1322
1323static int __net_init sctp_ctrlsock_init(struct net *net)
1324{
1325 int status;
1326
1327 /* Initialize the control inode/socket for handling OOTB packets. */
1328 status = sctp_ctl_sock_init(net);
1329 if (status)
1330 pr_err("Failed to initialize the SCTP control sock\n");
1331
1332 return status;
1333}
1334
1335static void __net_init sctp_ctrlsock_exit(struct net *net)
1336{
1337 /* Free the control endpoint. */
1338 inet_ctl_sock_destroy(net->sctp.ctl_sock);
1339}
1340
1341static struct pernet_operations sctp_ctrlsock_ops = {
1342 .init = sctp_ctrlsock_init,
1343 .exit = sctp_ctrlsock_exit,
1333}; 1344};
1334 1345
1335/* Initialize the universe into something sensible. */ 1346/* Initialize the universe into something sensible. */
@@ -1462,8 +1473,11 @@ static __init int sctp_init(void)
1462 sctp_v4_pf_init(); 1473 sctp_v4_pf_init();
1463 sctp_v6_pf_init(); 1474 sctp_v6_pf_init();
1464 1475
1465 status = sctp_v4_protosw_init(); 1476 status = register_pernet_subsys(&sctp_defaults_ops);
1477 if (status)
1478 goto err_register_defaults;
1466 1479
1480 status = sctp_v4_protosw_init();
1467 if (status) 1481 if (status)
1468 goto err_protosw_init; 1482 goto err_protosw_init;
1469 1483
@@ -1471,9 +1485,9 @@ static __init int sctp_init(void)
1471 if (status) 1485 if (status)
1472 goto err_v6_protosw_init; 1486 goto err_v6_protosw_init;
1473 1487
1474 status = register_pernet_subsys(&sctp_net_ops); 1488 status = register_pernet_subsys(&sctp_ctrlsock_ops);
1475 if (status) 1489 if (status)
1476 goto err_register_pernet_subsys; 1490 goto err_register_ctrlsock;
1477 1491
1478 status = sctp_v4_add_protocol(); 1492 status = sctp_v4_add_protocol();
1479 if (status) 1493 if (status)
@@ -1489,12 +1503,14 @@ out:
1489err_v6_add_protocol: 1503err_v6_add_protocol:
1490 sctp_v4_del_protocol(); 1504 sctp_v4_del_protocol();
1491err_add_protocol: 1505err_add_protocol:
1492 unregister_pernet_subsys(&sctp_net_ops); 1506 unregister_pernet_subsys(&sctp_ctrlsock_ops);
1493err_register_pernet_subsys: 1507err_register_ctrlsock:
1494 sctp_v6_protosw_exit(); 1508 sctp_v6_protosw_exit();
1495err_v6_protosw_init: 1509err_v6_protosw_init:
1496 sctp_v4_protosw_exit(); 1510 sctp_v4_protosw_exit();
1497err_protosw_init: 1511err_protosw_init:
1512 unregister_pernet_subsys(&sctp_defaults_ops);
1513err_register_defaults:
1498 sctp_v4_pf_exit(); 1514 sctp_v4_pf_exit();
1499 sctp_v6_pf_exit(); 1515 sctp_v6_pf_exit();
1500 sctp_sysctl_unregister(); 1516 sctp_sysctl_unregister();
@@ -1527,12 +1543,14 @@ static __exit void sctp_exit(void)
1527 sctp_v6_del_protocol(); 1543 sctp_v6_del_protocol();
1528 sctp_v4_del_protocol(); 1544 sctp_v4_del_protocol();
1529 1545
1530 unregister_pernet_subsys(&sctp_net_ops); 1546 unregister_pernet_subsys(&sctp_ctrlsock_ops);
1531 1547
1532 /* Free protosw registrations */ 1548 /* Free protosw registrations */
1533 sctp_v6_protosw_exit(); 1549 sctp_v6_protosw_exit();
1534 sctp_v4_protosw_exit(); 1550 sctp_v4_protosw_exit();
1535 1551
1552 unregister_pernet_subsys(&sctp_defaults_ops);
1553
1536 /* Unregister with socket layer. */ 1554 /* Unregister with socket layer. */
1537 sctp_v6_pf_exit(); 1555 sctp_v6_pf_exit();
1538 sctp_v4_pf_exit(); 1556 sctp_v4_pf_exit();
diff --git a/net/sctp/sm_sideeffect.c b/net/sctp/sm_sideeffect.c
index 35df1266bf07..6098d4c42fa9 100644
--- a/net/sctp/sm_sideeffect.c
+++ b/net/sctp/sm_sideeffect.c
@@ -244,12 +244,13 @@ void sctp_generate_t3_rtx_event(unsigned long peer)
244 int error; 244 int error;
245 struct sctp_transport *transport = (struct sctp_transport *) peer; 245 struct sctp_transport *transport = (struct sctp_transport *) peer;
246 struct sctp_association *asoc = transport->asoc; 246 struct sctp_association *asoc = transport->asoc;
247 struct net *net = sock_net(asoc->base.sk); 247 struct sock *sk = asoc->base.sk;
248 struct net *net = sock_net(sk);
248 249
249 /* Check whether a task is in the sock. */ 250 /* Check whether a task is in the sock. */
250 251
251 bh_lock_sock(asoc->base.sk); 252 bh_lock_sock(sk);
252 if (sock_owned_by_user(asoc->base.sk)) { 253 if (sock_owned_by_user(sk)) {
253 pr_debug("%s: sock is busy\n", __func__); 254 pr_debug("%s: sock is busy\n", __func__);
254 255
255 /* Try again later. */ 256 /* Try again later. */
@@ -272,10 +273,10 @@ void sctp_generate_t3_rtx_event(unsigned long peer)
272 transport, GFP_ATOMIC); 273 transport, GFP_ATOMIC);
273 274
274 if (error) 275 if (error)
275 asoc->base.sk->sk_err = -error; 276 sk->sk_err = -error;
276 277
277out_unlock: 278out_unlock:
278 bh_unlock_sock(asoc->base.sk); 279 bh_unlock_sock(sk);
279 sctp_transport_put(transport); 280 sctp_transport_put(transport);
280} 281}
281 282
@@ -285,11 +286,12 @@ out_unlock:
285static void sctp_generate_timeout_event(struct sctp_association *asoc, 286static void sctp_generate_timeout_event(struct sctp_association *asoc,
286 sctp_event_timeout_t timeout_type) 287 sctp_event_timeout_t timeout_type)
287{ 288{
288 struct net *net = sock_net(asoc->base.sk); 289 struct sock *sk = asoc->base.sk;
290 struct net *net = sock_net(sk);
289 int error = 0; 291 int error = 0;
290 292
291 bh_lock_sock(asoc->base.sk); 293 bh_lock_sock(sk);
292 if (sock_owned_by_user(asoc->base.sk)) { 294 if (sock_owned_by_user(sk)) {
293 pr_debug("%s: sock is busy: timer %d\n", __func__, 295 pr_debug("%s: sock is busy: timer %d\n", __func__,
294 timeout_type); 296 timeout_type);
295 297
@@ -312,10 +314,10 @@ static void sctp_generate_timeout_event(struct sctp_association *asoc,
312 (void *)timeout_type, GFP_ATOMIC); 314 (void *)timeout_type, GFP_ATOMIC);
313 315
314 if (error) 316 if (error)
315 asoc->base.sk->sk_err = -error; 317 sk->sk_err = -error;
316 318
317out_unlock: 319out_unlock:
318 bh_unlock_sock(asoc->base.sk); 320 bh_unlock_sock(sk);
319 sctp_association_put(asoc); 321 sctp_association_put(asoc);
320} 322}
321 323
@@ -365,10 +367,11 @@ void sctp_generate_heartbeat_event(unsigned long data)
365 int error = 0; 367 int error = 0;
366 struct sctp_transport *transport = (struct sctp_transport *) data; 368 struct sctp_transport *transport = (struct sctp_transport *) data;
367 struct sctp_association *asoc = transport->asoc; 369 struct sctp_association *asoc = transport->asoc;
368 struct net *net = sock_net(asoc->base.sk); 370 struct sock *sk = asoc->base.sk;
371 struct net *net = sock_net(sk);
369 372
370 bh_lock_sock(asoc->base.sk); 373 bh_lock_sock(sk);
371 if (sock_owned_by_user(asoc->base.sk)) { 374 if (sock_owned_by_user(sk)) {
372 pr_debug("%s: sock is busy\n", __func__); 375 pr_debug("%s: sock is busy\n", __func__);
373 376
374 /* Try again later. */ 377 /* Try again later. */
@@ -388,11 +391,11 @@ void sctp_generate_heartbeat_event(unsigned long data)
388 asoc->state, asoc->ep, asoc, 391 asoc->state, asoc->ep, asoc,
389 transport, GFP_ATOMIC); 392 transport, GFP_ATOMIC);
390 393
391 if (error) 394 if (error)
392 asoc->base.sk->sk_err = -error; 395 sk->sk_err = -error;
393 396
394out_unlock: 397out_unlock:
395 bh_unlock_sock(asoc->base.sk); 398 bh_unlock_sock(sk);
396 sctp_transport_put(transport); 399 sctp_transport_put(transport);
397} 400}
398 401
@@ -403,10 +406,11 @@ void sctp_generate_proto_unreach_event(unsigned long data)
403{ 406{
404 struct sctp_transport *transport = (struct sctp_transport *) data; 407 struct sctp_transport *transport = (struct sctp_transport *) data;
405 struct sctp_association *asoc = transport->asoc; 408 struct sctp_association *asoc = transport->asoc;
406 struct net *net = sock_net(asoc->base.sk); 409 struct sock *sk = asoc->base.sk;
410 struct net *net = sock_net(sk);
407 411
408 bh_lock_sock(asoc->base.sk); 412 bh_lock_sock(sk);
409 if (sock_owned_by_user(asoc->base.sk)) { 413 if (sock_owned_by_user(sk)) {
410 pr_debug("%s: sock is busy\n", __func__); 414 pr_debug("%s: sock is busy\n", __func__);
411 415
412 /* Try again later. */ 416 /* Try again later. */
@@ -427,7 +431,7 @@ void sctp_generate_proto_unreach_event(unsigned long data)
427 asoc->state, asoc->ep, asoc, transport, GFP_ATOMIC); 431 asoc->state, asoc->ep, asoc, transport, GFP_ATOMIC);
428 432
429out_unlock: 433out_unlock:
430 bh_unlock_sock(asoc->base.sk); 434 bh_unlock_sock(sk);
431 sctp_association_put(asoc); 435 sctp_association_put(asoc);
432} 436}
433 437
diff --git a/net/sunrpc/sched.c b/net/sunrpc/sched.c
index b140c092d226..f14f24ee9983 100644
--- a/net/sunrpc/sched.c
+++ b/net/sunrpc/sched.c
@@ -297,7 +297,7 @@ static int rpc_complete_task(struct rpc_task *task)
297 clear_bit(RPC_TASK_ACTIVE, &task->tk_runstate); 297 clear_bit(RPC_TASK_ACTIVE, &task->tk_runstate);
298 ret = atomic_dec_and_test(&task->tk_count); 298 ret = atomic_dec_and_test(&task->tk_count);
299 if (waitqueue_active(wq)) 299 if (waitqueue_active(wq))
300 __wake_up_locked_key(wq, TASK_NORMAL, 1, &k); 300 __wake_up_locked_key(wq, TASK_NORMAL, &k);
301 spin_unlock_irqrestore(&wq->lock, flags); 301 spin_unlock_irqrestore(&wq->lock, flags);
302 return ret; 302 return ret;
303} 303}
@@ -1092,14 +1092,10 @@ void
1092rpc_destroy_mempool(void) 1092rpc_destroy_mempool(void)
1093{ 1093{
1094 rpciod_stop(); 1094 rpciod_stop();
1095 if (rpc_buffer_mempool) 1095 mempool_destroy(rpc_buffer_mempool);
1096 mempool_destroy(rpc_buffer_mempool); 1096 mempool_destroy(rpc_task_mempool);
1097 if (rpc_task_mempool) 1097 kmem_cache_destroy(rpc_task_slabp);
1098 mempool_destroy(rpc_task_mempool); 1098 kmem_cache_destroy(rpc_buffer_slabp);
1099 if (rpc_task_slabp)
1100 kmem_cache_destroy(rpc_task_slabp);
1101 if (rpc_buffer_slabp)
1102 kmem_cache_destroy(rpc_buffer_slabp);
1103 rpc_destroy_wait_queue(&delay_queue); 1099 rpc_destroy_wait_queue(&delay_queue);
1104} 1100}
1105 1101
diff --git a/net/sunrpc/xprt.c b/net/sunrpc/xprt.c
index ab5dd621ae0c..2e98f4a243e5 100644
--- a/net/sunrpc/xprt.c
+++ b/net/sunrpc/xprt.c
@@ -614,6 +614,7 @@ static void xprt_autoclose(struct work_struct *work)
614 clear_bit(XPRT_CLOSE_WAIT, &xprt->state); 614 clear_bit(XPRT_CLOSE_WAIT, &xprt->state);
615 xprt->ops->close(xprt); 615 xprt->ops->close(xprt);
616 xprt_release_write(xprt, NULL); 616 xprt_release_write(xprt, NULL);
617 wake_up_bit(&xprt->state, XPRT_LOCKED);
617} 618}
618 619
619/** 620/**
@@ -723,6 +724,7 @@ void xprt_unlock_connect(struct rpc_xprt *xprt, void *cookie)
723 xprt->ops->release_xprt(xprt, NULL); 724 xprt->ops->release_xprt(xprt, NULL);
724out: 725out:
725 spin_unlock_bh(&xprt->transport_lock); 726 spin_unlock_bh(&xprt->transport_lock);
727 wake_up_bit(&xprt->state, XPRT_LOCKED);
726} 728}
727 729
728/** 730/**
@@ -1394,6 +1396,10 @@ out:
1394static void xprt_destroy(struct rpc_xprt *xprt) 1396static void xprt_destroy(struct rpc_xprt *xprt)
1395{ 1397{
1396 dprintk("RPC: destroying transport %p\n", xprt); 1398 dprintk("RPC: destroying transport %p\n", xprt);
1399
1400 /* Exclude transport connect/disconnect handlers */
1401 wait_on_bit_lock(&xprt->state, XPRT_LOCKED, TASK_UNINTERRUPTIBLE);
1402
1397 del_timer_sync(&xprt->timer); 1403 del_timer_sync(&xprt->timer);
1398 1404
1399 rpc_xprt_debugfs_unregister(xprt); 1405 rpc_xprt_debugfs_unregister(xprt);
diff --git a/net/sunrpc/xprtrdma/fmr_ops.c b/net/sunrpc/xprtrdma/fmr_ops.c
index cb25c89da623..f1e8dafbd507 100644
--- a/net/sunrpc/xprtrdma/fmr_ops.c
+++ b/net/sunrpc/xprtrdma/fmr_ops.c
@@ -39,25 +39,6 @@ static int
39fmr_op_open(struct rpcrdma_ia *ia, struct rpcrdma_ep *ep, 39fmr_op_open(struct rpcrdma_ia *ia, struct rpcrdma_ep *ep,
40 struct rpcrdma_create_data_internal *cdata) 40 struct rpcrdma_create_data_internal *cdata)
41{ 41{
42 struct ib_device_attr *devattr = &ia->ri_devattr;
43 struct ib_mr *mr;
44
45 /* Obtain an lkey to use for the regbufs, which are
46 * protected from remote access.
47 */
48 if (devattr->device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY) {
49 ia->ri_dma_lkey = ia->ri_device->local_dma_lkey;
50 } else {
51 mr = ib_get_dma_mr(ia->ri_pd, IB_ACCESS_LOCAL_WRITE);
52 if (IS_ERR(mr)) {
53 pr_err("%s: ib_get_dma_mr for failed with %lX\n",
54 __func__, PTR_ERR(mr));
55 return -ENOMEM;
56 }
57 ia->ri_dma_lkey = ia->ri_dma_mr->lkey;
58 ia->ri_dma_mr = mr;
59 }
60
61 return 0; 42 return 0;
62} 43}
63 44
diff --git a/net/sunrpc/xprtrdma/frwr_ops.c b/net/sunrpc/xprtrdma/frwr_ops.c
index d6653f5d0830..5318951b3b53 100644
--- a/net/sunrpc/xprtrdma/frwr_ops.c
+++ b/net/sunrpc/xprtrdma/frwr_ops.c
@@ -189,11 +189,6 @@ frwr_op_open(struct rpcrdma_ia *ia, struct rpcrdma_ep *ep,
189 struct ib_device_attr *devattr = &ia->ri_devattr; 189 struct ib_device_attr *devattr = &ia->ri_devattr;
190 int depth, delta; 190 int depth, delta;
191 191
192 /* Obtain an lkey to use for the regbufs, which are
193 * protected from remote access.
194 */
195 ia->ri_dma_lkey = ia->ri_device->local_dma_lkey;
196
197 ia->ri_max_frmr_depth = 192 ia->ri_max_frmr_depth =
198 min_t(unsigned int, RPCRDMA_MAX_DATA_SEGS, 193 min_t(unsigned int, RPCRDMA_MAX_DATA_SEGS,
199 devattr->max_fast_reg_page_list_len); 194 devattr->max_fast_reg_page_list_len);
diff --git a/net/sunrpc/xprtrdma/physical_ops.c b/net/sunrpc/xprtrdma/physical_ops.c
index 72cf8b15bbb4..617b76f22154 100644
--- a/net/sunrpc/xprtrdma/physical_ops.c
+++ b/net/sunrpc/xprtrdma/physical_ops.c
@@ -23,7 +23,6 @@ static int
23physical_op_open(struct rpcrdma_ia *ia, struct rpcrdma_ep *ep, 23physical_op_open(struct rpcrdma_ia *ia, struct rpcrdma_ep *ep,
24 struct rpcrdma_create_data_internal *cdata) 24 struct rpcrdma_create_data_internal *cdata)
25{ 25{
26 struct ib_device_attr *devattr = &ia->ri_devattr;
27 struct ib_mr *mr; 26 struct ib_mr *mr;
28 27
29 /* Obtain an rkey to use for RPC data payloads. 28 /* Obtain an rkey to use for RPC data payloads.
@@ -37,15 +36,8 @@ physical_op_open(struct rpcrdma_ia *ia, struct rpcrdma_ep *ep,
37 __func__, PTR_ERR(mr)); 36 __func__, PTR_ERR(mr));
38 return -ENOMEM; 37 return -ENOMEM;
39 } 38 }
40 ia->ri_dma_mr = mr;
41
42 /* Obtain an lkey to use for regbufs.
43 */
44 if (devattr->device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)
45 ia->ri_dma_lkey = ia->ri_device->local_dma_lkey;
46 else
47 ia->ri_dma_lkey = ia->ri_dma_mr->lkey;
48 39
40 ia->ri_dma_mr = mr;
49 return 0; 41 return 0;
50} 42}
51 43
diff --git a/net/sunrpc/xprtrdma/verbs.c b/net/sunrpc/xprtrdma/verbs.c
index 682996779970..eb081ad05e33 100644
--- a/net/sunrpc/xprtrdma/verbs.c
+++ b/net/sunrpc/xprtrdma/verbs.c
@@ -1252,7 +1252,7 @@ rpcrdma_alloc_regbuf(struct rpcrdma_ia *ia, size_t size, gfp_t flags)
1252 goto out_free; 1252 goto out_free;
1253 1253
1254 iov->length = size; 1254 iov->length = size;
1255 iov->lkey = ia->ri_dma_lkey; 1255 iov->lkey = ia->ri_pd->local_dma_lkey;
1256 rb->rg_size = size; 1256 rb->rg_size = size;
1257 rb->rg_owner = NULL; 1257 rb->rg_owner = NULL;
1258 return rb; 1258 return rb;
diff --git a/net/sunrpc/xprtrdma/xprt_rdma.h b/net/sunrpc/xprtrdma/xprt_rdma.h
index 02512221b8bc..c09414e6f91b 100644
--- a/net/sunrpc/xprtrdma/xprt_rdma.h
+++ b/net/sunrpc/xprtrdma/xprt_rdma.h
@@ -65,7 +65,6 @@ struct rpcrdma_ia {
65 struct rdma_cm_id *ri_id; 65 struct rdma_cm_id *ri_id;
66 struct ib_pd *ri_pd; 66 struct ib_pd *ri_pd;
67 struct ib_mr *ri_dma_mr; 67 struct ib_mr *ri_dma_mr;
68 u32 ri_dma_lkey;
69 struct completion ri_done; 68 struct completion ri_done;
70 int ri_async_rc; 69 int ri_async_rc;
71 unsigned int ri_max_frmr_depth; 70 unsigned int ri_max_frmr_depth;
diff --git a/net/sunrpc/xprtsock.c b/net/sunrpc/xprtsock.c
index 7be90bc1a7c2..1a85e0ed0b48 100644
--- a/net/sunrpc/xprtsock.c
+++ b/net/sunrpc/xprtsock.c
@@ -777,7 +777,6 @@ static void xs_sock_mark_closed(struct rpc_xprt *xprt)
777 xs_sock_reset_connection_flags(xprt); 777 xs_sock_reset_connection_flags(xprt);
778 /* Mark transport as closed and wake up all pending tasks */ 778 /* Mark transport as closed and wake up all pending tasks */
779 xprt_disconnect_done(xprt); 779 xprt_disconnect_done(xprt);
780 xprt_force_disconnect(xprt);
781} 780}
782 781
783/** 782/**
@@ -881,8 +880,11 @@ static void xs_xprt_free(struct rpc_xprt *xprt)
881 */ 880 */
882static void xs_destroy(struct rpc_xprt *xprt) 881static void xs_destroy(struct rpc_xprt *xprt)
883{ 882{
883 struct sock_xprt *transport = container_of(xprt,
884 struct sock_xprt, xprt);
884 dprintk("RPC: xs_destroy xprt %p\n", xprt); 885 dprintk("RPC: xs_destroy xprt %p\n", xprt);
885 886
887 cancel_delayed_work_sync(&transport->connect_worker);
886 xs_close(xprt); 888 xs_close(xprt);
887 xs_xprt_free(xprt); 889 xs_xprt_free(xprt);
888 module_put(THIS_MODULE); 890 module_put(THIS_MODULE);
@@ -1435,6 +1437,7 @@ out:
1435static void xs_tcp_state_change(struct sock *sk) 1437static void xs_tcp_state_change(struct sock *sk)
1436{ 1438{
1437 struct rpc_xprt *xprt; 1439 struct rpc_xprt *xprt;
1440 struct sock_xprt *transport;
1438 1441
1439 read_lock_bh(&sk->sk_callback_lock); 1442 read_lock_bh(&sk->sk_callback_lock);
1440 if (!(xprt = xprt_from_sock(sk))) 1443 if (!(xprt = xprt_from_sock(sk)))
@@ -1446,13 +1449,12 @@ static void xs_tcp_state_change(struct sock *sk)
1446 sock_flag(sk, SOCK_ZAPPED), 1449 sock_flag(sk, SOCK_ZAPPED),
1447 sk->sk_shutdown); 1450 sk->sk_shutdown);
1448 1451
1452 transport = container_of(xprt, struct sock_xprt, xprt);
1449 trace_rpc_socket_state_change(xprt, sk->sk_socket); 1453 trace_rpc_socket_state_change(xprt, sk->sk_socket);
1450 switch (sk->sk_state) { 1454 switch (sk->sk_state) {
1451 case TCP_ESTABLISHED: 1455 case TCP_ESTABLISHED:
1452 spin_lock(&xprt->transport_lock); 1456 spin_lock(&xprt->transport_lock);
1453 if (!xprt_test_and_set_connected(xprt)) { 1457 if (!xprt_test_and_set_connected(xprt)) {
1454 struct sock_xprt *transport = container_of(xprt,
1455 struct sock_xprt, xprt);
1456 1458
1457 /* Reset TCP record info */ 1459 /* Reset TCP record info */
1458 transport->tcp_offset = 0; 1460 transport->tcp_offset = 0;
@@ -1461,6 +1463,8 @@ static void xs_tcp_state_change(struct sock *sk)
1461 transport->tcp_flags = 1463 transport->tcp_flags =
1462 TCP_RCV_COPY_FRAGHDR | TCP_RCV_COPY_XID; 1464 TCP_RCV_COPY_FRAGHDR | TCP_RCV_COPY_XID;
1463 xprt->connect_cookie++; 1465 xprt->connect_cookie++;
1466 clear_bit(XPRT_SOCK_CONNECTING, &transport->sock_state);
1467 xprt_clear_connecting(xprt);
1464 1468
1465 xprt_wake_pending_tasks(xprt, -EAGAIN); 1469 xprt_wake_pending_tasks(xprt, -EAGAIN);
1466 } 1470 }
@@ -1496,6 +1500,9 @@ static void xs_tcp_state_change(struct sock *sk)
1496 smp_mb__after_atomic(); 1500 smp_mb__after_atomic();
1497 break; 1501 break;
1498 case TCP_CLOSE: 1502 case TCP_CLOSE:
1503 if (test_and_clear_bit(XPRT_SOCK_CONNECTING,
1504 &transport->sock_state))
1505 xprt_clear_connecting(xprt);
1499 xs_sock_mark_closed(xprt); 1506 xs_sock_mark_closed(xprt);
1500 } 1507 }
1501 out: 1508 out:
@@ -2179,6 +2186,7 @@ static int xs_tcp_finish_connecting(struct rpc_xprt *xprt, struct socket *sock)
2179 /* Tell the socket layer to start connecting... */ 2186 /* Tell the socket layer to start connecting... */
2180 xprt->stat.connect_count++; 2187 xprt->stat.connect_count++;
2181 xprt->stat.connect_start = jiffies; 2188 xprt->stat.connect_start = jiffies;
2189 set_bit(XPRT_SOCK_CONNECTING, &transport->sock_state);
2182 ret = kernel_connect(sock, xs_addr(xprt), xprt->addrlen, O_NONBLOCK); 2190 ret = kernel_connect(sock, xs_addr(xprt), xprt->addrlen, O_NONBLOCK);
2183 switch (ret) { 2191 switch (ret) {
2184 case 0: 2192 case 0:
@@ -2240,7 +2248,6 @@ static void xs_tcp_setup_socket(struct work_struct *work)
2240 case -EINPROGRESS: 2248 case -EINPROGRESS:
2241 case -EALREADY: 2249 case -EALREADY:
2242 xprt_unlock_connect(xprt, transport); 2250 xprt_unlock_connect(xprt, transport);
2243 xprt_clear_connecting(xprt);
2244 return; 2251 return;
2245 case -EINVAL: 2252 case -EINVAL:
2246 /* Happens, for instance, if the user specified a link 2253 /* Happens, for instance, if the user specified a link
diff --git a/net/tipc/msg.c b/net/tipc/msg.c
index 562c926a51cc..c5ac436235e0 100644
--- a/net/tipc/msg.c
+++ b/net/tipc/msg.c
@@ -539,6 +539,7 @@ bool tipc_msg_lookup_dest(struct net *net, struct sk_buff *skb, int *err)
539 *err = -TIPC_ERR_NO_NAME; 539 *err = -TIPC_ERR_NO_NAME;
540 if (skb_linearize(skb)) 540 if (skb_linearize(skb))
541 return false; 541 return false;
542 msg = buf_msg(skb);
542 if (msg_reroute_cnt(msg)) 543 if (msg_reroute_cnt(msg))
543 return false; 544 return false;
544 dnode = addr_domain(net, msg_lookup_scope(msg)); 545 dnode = addr_domain(net, msg_lookup_scope(msg));
diff --git a/net/unix/af_unix.c b/net/unix/af_unix.c
index 03ee4d359f6a..ef31b40ad550 100644
--- a/net/unix/af_unix.c
+++ b/net/unix/af_unix.c
@@ -2179,8 +2179,21 @@ unlock:
2179 if (UNIXCB(skb).fp) 2179 if (UNIXCB(skb).fp)
2180 scm.fp = scm_fp_dup(UNIXCB(skb).fp); 2180 scm.fp = scm_fp_dup(UNIXCB(skb).fp);
2181 2181
2182 sk_peek_offset_fwd(sk, chunk); 2182 if (skip) {
2183 sk_peek_offset_fwd(sk, chunk);
2184 skip -= chunk;
2185 }
2183 2186
2187 if (UNIXCB(skb).fp)
2188 break;
2189
2190 last = skb;
2191 last_len = skb->len;
2192 unix_state_lock(sk);
2193 skb = skb_peek_next(skb, &sk->sk_receive_queue);
2194 if (skb)
2195 goto again;
2196 unix_state_unlock(sk);
2184 break; 2197 break;
2185 } 2198 }
2186 } while (size); 2199 } while (size);
diff --git a/samples/kprobes/jprobe_example.c b/samples/kprobes/jprobe_example.c
index 9119ac6a8270..c285a3b8a9f1 100644
--- a/samples/kprobes/jprobe_example.c
+++ b/samples/kprobes/jprobe_example.c
@@ -1,13 +1,13 @@
1/* 1/*
2 * Here's a sample kernel module showing the use of jprobes to dump 2 * Here's a sample kernel module showing the use of jprobes to dump
3 * the arguments of do_fork(). 3 * the arguments of _do_fork().
4 * 4 *
5 * For more information on theory of operation of jprobes, see 5 * For more information on theory of operation of jprobes, see
6 * Documentation/kprobes.txt 6 * Documentation/kprobes.txt
7 * 7 *
8 * Build and insert the kernel module as done in the kprobe example. 8 * Build and insert the kernel module as done in the kprobe example.
9 * You will see the trace data in /var/log/messages and on the 9 * You will see the trace data in /var/log/messages and on the
10 * console whenever do_fork() is invoked to create a new process. 10 * console whenever _do_fork() is invoked to create a new process.
11 * (Some messages may be suppressed if syslogd is configured to 11 * (Some messages may be suppressed if syslogd is configured to
12 * eliminate duplicate messages.) 12 * eliminate duplicate messages.)
13 */ 13 */
@@ -17,13 +17,13 @@
17#include <linux/kprobes.h> 17#include <linux/kprobes.h>
18 18
19/* 19/*
20 * Jumper probe for do_fork. 20 * Jumper probe for _do_fork.
21 * Mirror principle enables access to arguments of the probed routine 21 * Mirror principle enables access to arguments of the probed routine
22 * from the probe handler. 22 * from the probe handler.
23 */ 23 */
24 24
25/* Proxy routine having the same arguments as actual do_fork() routine */ 25/* Proxy routine having the same arguments as actual _do_fork() routine */
26static long jdo_fork(unsigned long clone_flags, unsigned long stack_start, 26static long j_do_fork(unsigned long clone_flags, unsigned long stack_start,
27 unsigned long stack_size, int __user *parent_tidptr, 27 unsigned long stack_size, int __user *parent_tidptr,
28 int __user *child_tidptr) 28 int __user *child_tidptr)
29{ 29{
@@ -36,9 +36,9 @@ static long jdo_fork(unsigned long clone_flags, unsigned long stack_start,
36} 36}
37 37
38static struct jprobe my_jprobe = { 38static struct jprobe my_jprobe = {
39 .entry = jdo_fork, 39 .entry = j_do_fork,
40 .kp = { 40 .kp = {
41 .symbol_name = "do_fork", 41 .symbol_name = "_do_fork",
42 }, 42 },
43}; 43};
44 44
diff --git a/samples/kprobes/kprobe_example.c b/samples/kprobes/kprobe_example.c
index 366db1a9fb65..727eb21c9c56 100644
--- a/samples/kprobes/kprobe_example.c
+++ b/samples/kprobes/kprobe_example.c
@@ -1,13 +1,13 @@
1/* 1/*
2 * NOTE: This example is works on x86 and powerpc. 2 * NOTE: This example is works on x86 and powerpc.
3 * Here's a sample kernel module showing the use of kprobes to dump a 3 * Here's a sample kernel module showing the use of kprobes to dump a
4 * stack trace and selected registers when do_fork() is called. 4 * stack trace and selected registers when _do_fork() is called.
5 * 5 *
6 * For more information on theory of operation of kprobes, see 6 * For more information on theory of operation of kprobes, see
7 * Documentation/kprobes.txt 7 * Documentation/kprobes.txt
8 * 8 *
9 * You will see the trace data in /var/log/messages and on the console 9 * You will see the trace data in /var/log/messages and on the console
10 * whenever do_fork() is invoked to create a new process. 10 * whenever _do_fork() is invoked to create a new process.
11 */ 11 */
12 12
13#include <linux/kernel.h> 13#include <linux/kernel.h>
@@ -16,7 +16,7 @@
16 16
17/* For each probe you need to allocate a kprobe structure */ 17/* For each probe you need to allocate a kprobe structure */
18static struct kprobe kp = { 18static struct kprobe kp = {
19 .symbol_name = "do_fork", 19 .symbol_name = "_do_fork",
20}; 20};
21 21
22/* kprobe pre_handler: called just before the probed instruction is executed */ 22/* kprobe pre_handler: called just before the probed instruction is executed */
diff --git a/samples/kprobes/kretprobe_example.c b/samples/kprobes/kretprobe_example.c
index 1041b6731598..ebb1d1aed547 100644
--- a/samples/kprobes/kretprobe_example.c
+++ b/samples/kprobes/kretprobe_example.c
@@ -7,7 +7,7 @@
7 * 7 *
8 * usage: insmod kretprobe_example.ko func=<func_name> 8 * usage: insmod kretprobe_example.ko func=<func_name>
9 * 9 *
10 * If no func_name is specified, do_fork is instrumented 10 * If no func_name is specified, _do_fork is instrumented
11 * 11 *
12 * For more information on theory of operation of kretprobes, see 12 * For more information on theory of operation of kretprobes, see
13 * Documentation/kprobes.txt 13 * Documentation/kprobes.txt
@@ -25,7 +25,7 @@
25#include <linux/limits.h> 25#include <linux/limits.h>
26#include <linux/sched.h> 26#include <linux/sched.h>
27 27
28static char func_name[NAME_MAX] = "do_fork"; 28static char func_name[NAME_MAX] = "_do_fork";
29module_param_string(func, func_name, NAME_MAX, S_IRUGO); 29module_param_string(func, func_name, NAME_MAX, S_IRUGO);
30MODULE_PARM_DESC(func, "Function to kretprobe; this module will report the" 30MODULE_PARM_DESC(func, "Function to kretprobe; this module will report the"
31 " function's execution time"); 31 " function's execution time");
diff --git a/scripts/extract-cert.c b/scripts/extract-cert.c
index 10d23ca9f617..b071bf476fea 100644
--- a/scripts/extract-cert.c
+++ b/scripts/extract-cert.c
@@ -1,15 +1,15 @@
1/* Extract X.509 certificate in DER form from PKCS#11 or PEM. 1/* Extract X.509 certificate in DER form from PKCS#11 or PEM.
2 * 2 *
3 * Copyright © 2014 Red Hat, Inc. All Rights Reserved. 3 * Copyright © 2014-2015 Red Hat, Inc. All Rights Reserved.
4 * Copyright © 2015 Intel Corporation. 4 * Copyright © 2015 Intel Corporation.
5 * 5 *
6 * Authors: David Howells <dhowells@redhat.com> 6 * Authors: David Howells <dhowells@redhat.com>
7 * David Woodhouse <dwmw2@infradead.org> 7 * David Woodhouse <dwmw2@infradead.org>
8 * 8 *
9 * This program is free software; you can redistribute it and/or 9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public Licence 10 * modify it under the terms of the GNU Lesser General Public License
11 * as published by the Free Software Foundation; either version 11 * as published by the Free Software Foundation; either version 2.1
12 * 2 of the Licence, or (at your option) any later version. 12 * of the licence, or (at your option) any later version.
13 */ 13 */
14#define _GNU_SOURCE 14#define _GNU_SOURCE
15#include <stdio.h> 15#include <stdio.h>
@@ -17,13 +17,9 @@
17#include <stdint.h> 17#include <stdint.h>
18#include <stdbool.h> 18#include <stdbool.h>
19#include <string.h> 19#include <string.h>
20#include <getopt.h>
21#include <err.h> 20#include <err.h>
22#include <arpa/inet.h>
23#include <openssl/bio.h> 21#include <openssl/bio.h>
24#include <openssl/evp.h>
25#include <openssl/pem.h> 22#include <openssl/pem.h>
26#include <openssl/pkcs7.h>
27#include <openssl/err.h> 23#include <openssl/err.h>
28#include <openssl/engine.h> 24#include <openssl/engine.h>
29 25
diff --git a/scripts/sign-file.c b/scripts/sign-file.c
index 058bba3103e2..250a7a645033 100755
--- a/scripts/sign-file.c
+++ b/scripts/sign-file.c
@@ -1,12 +1,15 @@
1/* Sign a module file using the given key. 1/* Sign a module file using the given key.
2 * 2 *
3 * Copyright (C) 2014 Red Hat, Inc. All Rights Reserved. 3 * Copyright © 2014-2015 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com) 4 * Copyright © 2015 Intel Corporation.
5 *
6 * Authors: David Howells <dhowells@redhat.com>
7 * David Woodhouse <dwmw2@infradead.org>
5 * 8 *
6 * This program is free software; you can redistribute it and/or 9 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence 10 * modify it under the terms of the GNU Lesser General Public License
8 * as published by the Free Software Foundation; either version 11 * as published by the Free Software Foundation; either version 2.1
9 * 2 of the Licence, or (at your option) any later version. 12 * of the licence, or (at your option) any later version.
10 */ 13 */
11#define _GNU_SOURCE 14#define _GNU_SOURCE
12#include <stdio.h> 15#include <stdio.h>
@@ -17,13 +20,34 @@
17#include <getopt.h> 20#include <getopt.h>
18#include <err.h> 21#include <err.h>
19#include <arpa/inet.h> 22#include <arpa/inet.h>
23#include <openssl/opensslv.h>
20#include <openssl/bio.h> 24#include <openssl/bio.h>
21#include <openssl/evp.h> 25#include <openssl/evp.h>
22#include <openssl/pem.h> 26#include <openssl/pem.h>
23#include <openssl/cms.h>
24#include <openssl/err.h> 27#include <openssl/err.h>
25#include <openssl/engine.h> 28#include <openssl/engine.h>
26 29
30/*
31 * Use CMS if we have openssl-1.0.0 or newer available - otherwise we have to
32 * assume that it's not available and its header file is missing and that we
33 * should use PKCS#7 instead. Switching to the older PKCS#7 format restricts
34 * the options we have on specifying the X.509 certificate we want.
35 *
36 * Further, older versions of OpenSSL don't support manually adding signers to
37 * the PKCS#7 message so have to accept that we get a certificate included in
38 * the signature message. Nor do such older versions of OpenSSL support
39 * signing with anything other than SHA1 - so we're stuck with that if such is
40 * the case.
41 */
42#if OPENSSL_VERSION_NUMBER < 0x10000000L
43#define USE_PKCS7
44#endif
45#ifndef USE_PKCS7
46#include <openssl/cms.h>
47#else
48#include <openssl/pkcs7.h>
49#endif
50
27struct module_signature { 51struct module_signature {
28 uint8_t algo; /* Public-key crypto algorithm [0] */ 52 uint8_t algo; /* Public-key crypto algorithm [0] */
29 uint8_t hash; /* Digest algorithm [0] */ 53 uint8_t hash; /* Digest algorithm [0] */
@@ -107,30 +131,42 @@ int main(int argc, char **argv)
107 struct module_signature sig_info = { .id_type = PKEY_ID_PKCS7 }; 131 struct module_signature sig_info = { .id_type = PKEY_ID_PKCS7 };
108 char *hash_algo = NULL; 132 char *hash_algo = NULL;
109 char *private_key_name, *x509_name, *module_name, *dest_name; 133 char *private_key_name, *x509_name, *module_name, *dest_name;
110 bool save_cms = false, replace_orig; 134 bool save_sig = false, replace_orig;
111 bool sign_only = false; 135 bool sign_only = false;
112 unsigned char buf[4096]; 136 unsigned char buf[4096];
113 unsigned long module_size, cms_size; 137 unsigned long module_size, sig_size;
114 unsigned int use_keyid = 0, use_signed_attrs = CMS_NOATTR; 138 unsigned int use_signed_attrs;
115 const EVP_MD *digest_algo; 139 const EVP_MD *digest_algo;
116 EVP_PKEY *private_key; 140 EVP_PKEY *private_key;
141#ifndef USE_PKCS7
117 CMS_ContentInfo *cms; 142 CMS_ContentInfo *cms;
143 unsigned int use_keyid = 0;
144#else
145 PKCS7 *pkcs7;
146#endif
118 X509 *x509; 147 X509 *x509;
119 BIO *b, *bd = NULL, *bm; 148 BIO *b, *bd = NULL, *bm;
120 int opt, n; 149 int opt, n;
121
122 OpenSSL_add_all_algorithms(); 150 OpenSSL_add_all_algorithms();
123 ERR_load_crypto_strings(); 151 ERR_load_crypto_strings();
124 ERR_clear_error(); 152 ERR_clear_error();
125 153
126 key_pass = getenv("KBUILD_SIGN_PIN"); 154 key_pass = getenv("KBUILD_SIGN_PIN");
127 155
156#ifndef USE_PKCS7
157 use_signed_attrs = CMS_NOATTR;
158#else
159 use_signed_attrs = PKCS7_NOATTR;
160#endif
161
128 do { 162 do {
129 opt = getopt(argc, argv, "dpk"); 163 opt = getopt(argc, argv, "dpk");
130 switch (opt) { 164 switch (opt) {
131 case 'p': save_cms = true; break; 165 case 'p': save_sig = true; break;
132 case 'd': sign_only = true; save_cms = true; break; 166 case 'd': sign_only = true; save_sig = true; break;
167#ifndef USE_PKCS7
133 case 'k': use_keyid = CMS_USE_KEYID; break; 168 case 'k': use_keyid = CMS_USE_KEYID; break;
169#endif
134 case -1: break; 170 case -1: break;
135 default: format(); 171 default: format();
136 } 172 }
@@ -154,6 +190,14 @@ int main(int argc, char **argv)
154 replace_orig = true; 190 replace_orig = true;
155 } 191 }
156 192
193#ifdef USE_PKCS7
194 if (strcmp(hash_algo, "sha1") != 0) {
195 fprintf(stderr, "sign-file: %s only supports SHA1 signing\n",
196 OPENSSL_VERSION_TEXT);
197 exit(3);
198 }
199#endif
200
157 /* Read the private key and the X.509 cert the PKCS#7 message 201 /* Read the private key and the X.509 cert the PKCS#7 message
158 * will point to. 202 * will point to.
159 */ 203 */
@@ -210,7 +254,8 @@ int main(int argc, char **argv)
210 bm = BIO_new_file(module_name, "rb"); 254 bm = BIO_new_file(module_name, "rb");
211 ERR(!bm, "%s", module_name); 255 ERR(!bm, "%s", module_name);
212 256
213 /* Load the CMS message from the digest buffer. */ 257#ifndef USE_PKCS7
258 /* Load the signature message from the digest buffer. */
214 cms = CMS_sign(NULL, NULL, NULL, NULL, 259 cms = CMS_sign(NULL, NULL, NULL, NULL,
215 CMS_NOCERTS | CMS_PARTIAL | CMS_BINARY | CMS_DETACHED | CMS_STREAM); 260 CMS_NOCERTS | CMS_PARTIAL | CMS_BINARY | CMS_DETACHED | CMS_STREAM);
216 ERR(!cms, "CMS_sign"); 261 ERR(!cms, "CMS_sign");
@@ -218,17 +263,31 @@ int main(int argc, char **argv)
218 ERR(!CMS_add1_signer(cms, x509, private_key, digest_algo, 263 ERR(!CMS_add1_signer(cms, x509, private_key, digest_algo,
219 CMS_NOCERTS | CMS_BINARY | CMS_NOSMIMECAP | 264 CMS_NOCERTS | CMS_BINARY | CMS_NOSMIMECAP |
220 use_keyid | use_signed_attrs), 265 use_keyid | use_signed_attrs),
221 "CMS_sign_add_signer"); 266 "CMS_add1_signer");
222 ERR(CMS_final(cms, bm, NULL, CMS_NOCERTS | CMS_BINARY) < 0, 267 ERR(CMS_final(cms, bm, NULL, CMS_NOCERTS | CMS_BINARY) < 0,
223 "CMS_final"); 268 "CMS_final");
224 269
225 if (save_cms) { 270#else
226 char *cms_name; 271 pkcs7 = PKCS7_sign(x509, private_key, NULL, bm,
272 PKCS7_NOCERTS | PKCS7_BINARY |
273 PKCS7_DETACHED | use_signed_attrs);
274 ERR(!pkcs7, "PKCS7_sign");
275#endif
276
277 if (save_sig) {
278 char *sig_file_name;
227 279
228 ERR(asprintf(&cms_name, "%s.p7s", module_name) < 0, "asprintf"); 280 ERR(asprintf(&sig_file_name, "%s.p7s", module_name) < 0,
229 b = BIO_new_file(cms_name, "wb"); 281 "asprintf");
230 ERR(!b, "%s", cms_name); 282 b = BIO_new_file(sig_file_name, "wb");
231 ERR(i2d_CMS_bio_stream(b, cms, NULL, 0) < 0, "%s", cms_name); 283 ERR(!b, "%s", sig_file_name);
284#ifndef USE_PKCS7
285 ERR(i2d_CMS_bio_stream(b, cms, NULL, 0) < 0,
286 "%s", sig_file_name);
287#else
288 ERR(i2d_PKCS7_bio(b, pkcs7) < 0,
289 "%s", sig_file_name);
290#endif
232 BIO_free(b); 291 BIO_free(b);
233 } 292 }
234 293
@@ -244,9 +303,13 @@ int main(int argc, char **argv)
244 ERR(n < 0, "%s", module_name); 303 ERR(n < 0, "%s", module_name);
245 module_size = BIO_number_written(bd); 304 module_size = BIO_number_written(bd);
246 305
306#ifndef USE_PKCS7
247 ERR(i2d_CMS_bio_stream(bd, cms, NULL, 0) < 0, "%s", dest_name); 307 ERR(i2d_CMS_bio_stream(bd, cms, NULL, 0) < 0, "%s", dest_name);
248 cms_size = BIO_number_written(bd) - module_size; 308#else
249 sig_info.sig_len = htonl(cms_size); 309 ERR(i2d_PKCS7_bio(bd, pkcs7) < 0, "%s", dest_name);
310#endif
311 sig_size = BIO_number_written(bd) - module_size;
312 sig_info.sig_len = htonl(sig_size);
250 ERR(BIO_write(bd, &sig_info, sizeof(sig_info)) < 0, "%s", dest_name); 313 ERR(BIO_write(bd, &sig_info, sizeof(sig_info)) < 0, "%s", dest_name);
251 ERR(BIO_write(bd, magic_number, sizeof(magic_number) - 1) < 0, "%s", dest_name); 314 ERR(BIO_write(bd, magic_number, sizeof(magic_number) - 1) < 0, "%s", dest_name);
252 315
diff --git a/security/device_cgroup.c b/security/device_cgroup.c
index 73455089feef..03c1652c9a1f 100644
--- a/security/device_cgroup.c
+++ b/security/device_cgroup.c
@@ -401,7 +401,7 @@ static bool verify_new_ex(struct dev_cgroup *dev_cgroup,
401 bool match = false; 401 bool match = false;
402 402
403 RCU_LOCKDEP_WARN(!rcu_read_lock_held() && 403 RCU_LOCKDEP_WARN(!rcu_read_lock_held() &&
404 lockdep_is_held(&devcgroup_mutex), 404 !lockdep_is_held(&devcgroup_mutex),
405 "device_cgroup:verify_new_ex called without proper synchronization"); 405 "device_cgroup:verify_new_ex called without proper synchronization");
406 406
407 if (dev_cgroup->behavior == DEVCG_DEFAULT_ALLOW) { 407 if (dev_cgroup->behavior == DEVCG_DEFAULT_ALLOW) {
diff --git a/security/keys/gc.c b/security/keys/gc.c
index c7952375ac53..39eac1fd5706 100644
--- a/security/keys/gc.c
+++ b/security/keys/gc.c
@@ -134,6 +134,10 @@ static noinline void key_gc_unused_keys(struct list_head *keys)
134 kdebug("- %u", key->serial); 134 kdebug("- %u", key->serial);
135 key_check(key); 135 key_check(key);
136 136
137 /* Throw away the key data */
138 if (key->type->destroy)
139 key->type->destroy(key);
140
137 security_key_free(key); 141 security_key_free(key);
138 142
139 /* deal with the user's key tracking and quota */ 143 /* deal with the user's key tracking and quota */
@@ -148,10 +152,6 @@ static noinline void key_gc_unused_keys(struct list_head *keys)
148 if (test_bit(KEY_FLAG_INSTANTIATED, &key->flags)) 152 if (test_bit(KEY_FLAG_INSTANTIATED, &key->flags))
149 atomic_dec(&key->user->nikeys); 153 atomic_dec(&key->user->nikeys);
150 154
151 /* now throw away the key memory */
152 if (key->type->destroy)
153 key->type->destroy(key);
154
155 key_user_put(key->user); 155 key_user_put(key->user);
156 156
157 kfree(key->description); 157 kfree(key->description);
diff --git a/sound/arm/Kconfig b/sound/arm/Kconfig
index 885683a3b0bd..e0406211716b 100644
--- a/sound/arm/Kconfig
+++ b/sound/arm/Kconfig
@@ -9,6 +9,14 @@ menuconfig SND_ARM
9 Drivers that are implemented on ASoC can be found in 9 Drivers that are implemented on ASoC can be found in
10 "ALSA for SoC audio support" section. 10 "ALSA for SoC audio support" section.
11 11
12config SND_PXA2XX_LIB
13 tristate
14 select SND_AC97_CODEC if SND_PXA2XX_LIB_AC97
15 select SND_DMAENGINE_PCM
16
17config SND_PXA2XX_LIB_AC97
18 bool
19
12if SND_ARM 20if SND_ARM
13 21
14config SND_ARMAACI 22config SND_ARMAACI
@@ -21,13 +29,6 @@ config SND_PXA2XX_PCM
21 tristate 29 tristate
22 select SND_PCM 30 select SND_PCM
23 31
24config SND_PXA2XX_LIB
25 tristate
26 select SND_AC97_CODEC if SND_PXA2XX_LIB_AC97
27
28config SND_PXA2XX_LIB_AC97
29 bool
30
31config SND_PXA2XX_AC97 32config SND_PXA2XX_AC97
32 tristate "AC97 driver for the Intel PXA2xx chip" 33 tristate "AC97 driver for the Intel PXA2xx chip"
33 depends on ARCH_PXA 34 depends on ARCH_PXA
diff --git a/sound/pci/hda/hda_tegra.c b/sound/pci/hda/hda_tegra.c
index 477742cb70a2..58c0aad37284 100644
--- a/sound/pci/hda/hda_tegra.c
+++ b/sound/pci/hda/hda_tegra.c
@@ -73,6 +73,7 @@ struct hda_tegra {
73 struct clk *hda2codec_2x_clk; 73 struct clk *hda2codec_2x_clk;
74 struct clk *hda2hdmi_clk; 74 struct clk *hda2hdmi_clk;
75 void __iomem *regs; 75 void __iomem *regs;
76 struct work_struct probe_work;
76}; 77};
77 78
78#ifdef CONFIG_PM 79#ifdef CONFIG_PM
@@ -294,7 +295,9 @@ static int hda_tegra_dev_disconnect(struct snd_device *device)
294static int hda_tegra_dev_free(struct snd_device *device) 295static int hda_tegra_dev_free(struct snd_device *device)
295{ 296{
296 struct azx *chip = device->device_data; 297 struct azx *chip = device->device_data;
298 struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
297 299
300 cancel_work_sync(&hda->probe_work);
298 if (azx_bus(chip)->chip_init) { 301 if (azx_bus(chip)->chip_init) {
299 azx_stop_all_streams(chip); 302 azx_stop_all_streams(chip);
300 azx_stop_chip(chip); 303 azx_stop_chip(chip);
@@ -426,6 +429,9 @@ static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
426/* 429/*
427 * constructor 430 * constructor
428 */ 431 */
432
433static void hda_tegra_probe_work(struct work_struct *work);
434
429static int hda_tegra_create(struct snd_card *card, 435static int hda_tegra_create(struct snd_card *card,
430 unsigned int driver_caps, 436 unsigned int driver_caps,
431 struct hda_tegra *hda) 437 struct hda_tegra *hda)
@@ -452,6 +458,8 @@ static int hda_tegra_create(struct snd_card *card,
452 chip->single_cmd = false; 458 chip->single_cmd = false;
453 chip->snoop = true; 459 chip->snoop = true;
454 460
461 INIT_WORK(&hda->probe_work, hda_tegra_probe_work);
462
455 err = azx_bus_init(chip, NULL, &hda_tegra_io_ops); 463 err = azx_bus_init(chip, NULL, &hda_tegra_io_ops);
456 if (err < 0) 464 if (err < 0)
457 return err; 465 return err;
@@ -499,6 +507,21 @@ static int hda_tegra_probe(struct platform_device *pdev)
499 card->private_data = chip; 507 card->private_data = chip;
500 508
501 dev_set_drvdata(&pdev->dev, card); 509 dev_set_drvdata(&pdev->dev, card);
510 schedule_work(&hda->probe_work);
511
512 return 0;
513
514out_free:
515 snd_card_free(card);
516 return err;
517}
518
519static void hda_tegra_probe_work(struct work_struct *work)
520{
521 struct hda_tegra *hda = container_of(work, struct hda_tegra, probe_work);
522 struct azx *chip = &hda->chip;
523 struct platform_device *pdev = to_platform_device(hda->dev);
524 int err;
502 525
503 err = hda_tegra_first_init(chip, pdev); 526 err = hda_tegra_first_init(chip, pdev);
504 if (err < 0) 527 if (err < 0)
@@ -520,11 +543,8 @@ static int hda_tegra_probe(struct platform_device *pdev)
520 chip->running = 1; 543 chip->running = 1;
521 snd_hda_set_power_save(&chip->bus, power_save * 1000); 544 snd_hda_set_power_save(&chip->bus, power_save * 1000);
522 545
523 return 0; 546 out_free:
524 547 return; /* no error return from async probe */
525out_free:
526 snd_card_free(card);
527 return err;
528} 548}
529 549
530static int hda_tegra_remove(struct platform_device *pdev) 550static int hda_tegra_remove(struct platform_device *pdev)
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index a75b5611d1e4..afec6dc9f91f 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -4188,6 +4188,24 @@ static void alc_fixup_disable_aamix(struct hda_codec *codec,
4188 } 4188 }
4189} 4189}
4190 4190
4191/* fixup for Thinkpad docks: add dock pins, avoid HP parser fixup */
4192static void alc_fixup_tpt440_dock(struct hda_codec *codec,
4193 const struct hda_fixup *fix, int action)
4194{
4195 static const struct hda_pintbl pincfgs[] = {
4196 { 0x16, 0x21211010 }, /* dock headphone */
4197 { 0x19, 0x21a11010 }, /* dock mic */
4198 { }
4199 };
4200 struct alc_spec *spec = codec->spec;
4201
4202 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4203 spec->parse_flags = HDA_PINCFG_NO_HP_FIXUP;
4204 codec->power_save_node = 0; /* avoid click noises */
4205 snd_hda_apply_pincfgs(codec, pincfgs);
4206 }
4207}
4208
4191static void alc_shutup_dell_xps13(struct hda_codec *codec) 4209static void alc_shutup_dell_xps13(struct hda_codec *codec)
4192{ 4210{
4193 struct alc_spec *spec = codec->spec; 4211 struct alc_spec *spec = codec->spec;
@@ -4562,7 +4580,6 @@ enum {
4562 ALC255_FIXUP_HEADSET_MODE_NO_HP_MIC, 4580 ALC255_FIXUP_HEADSET_MODE_NO_HP_MIC,
4563 ALC293_FIXUP_DELL1_MIC_NO_PRESENCE, 4581 ALC293_FIXUP_DELL1_MIC_NO_PRESENCE,
4564 ALC292_FIXUP_TPT440_DOCK, 4582 ALC292_FIXUP_TPT440_DOCK,
4565 ALC292_FIXUP_TPT440_DOCK2,
4566 ALC283_FIXUP_BXBT2807_MIC, 4583 ALC283_FIXUP_BXBT2807_MIC,
4567 ALC255_FIXUP_DELL_WMI_MIC_MUTE_LED, 4584 ALC255_FIXUP_DELL_WMI_MIC_MUTE_LED,
4568 ALC282_FIXUP_ASPIRE_V5_PINS, 4585 ALC282_FIXUP_ASPIRE_V5_PINS,
@@ -5029,17 +5046,7 @@ static const struct hda_fixup alc269_fixups[] = {
5029 }, 5046 },
5030 [ALC292_FIXUP_TPT440_DOCK] = { 5047 [ALC292_FIXUP_TPT440_DOCK] = {
5031 .type = HDA_FIXUP_FUNC, 5048 .type = HDA_FIXUP_FUNC,
5032 .v.func = alc269_fixup_pincfg_no_hp_to_lineout, 5049 .v.func = alc_fixup_tpt440_dock,
5033 .chained = true,
5034 .chain_id = ALC292_FIXUP_TPT440_DOCK2
5035 },
5036 [ALC292_FIXUP_TPT440_DOCK2] = {
5037 .type = HDA_FIXUP_PINS,
5038 .v.pins = (const struct hda_pintbl[]) {
5039 { 0x16, 0x21211010 }, /* dock headphone */
5040 { 0x19, 0x21a11010 }, /* dock mic */
5041 { }
5042 },
5043 .chained = true, 5050 .chained = true,
5044 .chain_id = ALC269_FIXUP_LIMIT_INT_MIC_BOOST 5051 .chain_id = ALC269_FIXUP_LIMIT_INT_MIC_BOOST
5045 }, 5052 },
diff --git a/sound/soc/au1x/psc-i2s.c b/sound/soc/au1x/psc-i2s.c
index 38e853add96e..0bf9d62b91a0 100644
--- a/sound/soc/au1x/psc-i2s.c
+++ b/sound/soc/au1x/psc-i2s.c
@@ -296,7 +296,6 @@ static int au1xpsc_i2s_drvprobe(struct platform_device *pdev)
296{ 296{
297 struct resource *iores, *dmares; 297 struct resource *iores, *dmares;
298 unsigned long sel; 298 unsigned long sel;
299 int ret;
300 struct au1xpsc_audio_data *wd; 299 struct au1xpsc_audio_data *wd;
301 300
302 wd = devm_kzalloc(&pdev->dev, sizeof(struct au1xpsc_audio_data), 301 wd = devm_kzalloc(&pdev->dev, sizeof(struct au1xpsc_audio_data),
diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c
index 4972bf3efa91..268a28bd1df4 100644
--- a/sound/soc/codecs/rt5645.c
+++ b/sound/soc/codecs/rt5645.c
@@ -732,14 +732,14 @@ static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
732static const struct snd_kcontrol_new rt5645_dac_l_mix[] = { 732static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
733 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER, 733 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
734 RT5645_M_ADCMIX_L_SFT, 1, 1), 734 RT5645_M_ADCMIX_L_SFT, 1, 1),
735 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER, 735 SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
736 RT5645_M_DAC1_L_SFT, 1, 1), 736 RT5645_M_DAC1_L_SFT, 1, 1),
737}; 737};
738 738
739static const struct snd_kcontrol_new rt5645_dac_r_mix[] = { 739static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
740 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER, 740 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
741 RT5645_M_ADCMIX_R_SFT, 1, 1), 741 RT5645_M_ADCMIX_R_SFT, 1, 1),
742 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER, 742 SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
743 RT5645_M_DAC1_R_SFT, 1, 1), 743 RT5645_M_DAC1_R_SFT, 1, 1),
744}; 744};
745 745
@@ -1381,7 +1381,7 @@ static void hp_amp_power(struct snd_soc_codec *codec, int on)
1381 regmap_write(rt5645->regmap, RT5645_PR_BASE + 1381 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1382 RT5645_MAMP_INT_REG2, 0xfc00); 1382 RT5645_MAMP_INT_REG2, 0xfc00);
1383 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140); 1383 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140);
1384 mdelay(5); 1384 msleep(40);
1385 rt5645->hp_on = true; 1385 rt5645->hp_on = true;
1386 } else { 1386 } else {
1387 /* depop parameters */ 1387 /* depop parameters */
@@ -2829,13 +2829,12 @@ static int rt5645_jack_detect(struct snd_soc_codec *codec, int jack_insert)
2829 snd_soc_dapm_sync(dapm); 2829 snd_soc_dapm_sync(dapm);
2830 rt5645->jack_type = SND_JACK_HEADPHONE; 2830 rt5645->jack_type = SND_JACK_HEADPHONE;
2831 } 2831 }
2832
2833 snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2834 snd_soc_write(codec, RT5645_DEPOP_M1, 0x001d);
2835 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0001);
2836 } else { /* jack out */ 2832 } else { /* jack out */
2837 rt5645->jack_type = 0; 2833 rt5645->jack_type = 0;
2838 2834
2835 regmap_update_bits(rt5645->regmap, RT5645_HP_VOL,
2836 RT5645_L_MUTE | RT5645_R_MUTE,
2837 RT5645_L_MUTE | RT5645_R_MUTE);
2839 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, 2838 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
2840 RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD); 2839 RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2841 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, 2840 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
@@ -2880,8 +2879,6 @@ int rt5645_set_jack_detect(struct snd_soc_codec *codec,
2880 rt5645->en_button_func = true; 2879 rt5645->en_button_func = true;
2881 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, 2880 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2882 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ); 2881 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
2883 regmap_update_bits(rt5645->regmap, RT5645_DEPOP_M1,
2884 RT5645_HP_CB_MASK, RT5645_HP_CB_PU);
2885 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1, 2882 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
2886 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL); 2883 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2887 } 2884 }
@@ -3205,6 +3202,13 @@ static const struct dmi_system_id dmi_platform_intel_braswell[] = {
3205 DMI_MATCH(DMI_PRODUCT_NAME, "Celes"), 3202 DMI_MATCH(DMI_PRODUCT_NAME, "Celes"),
3206 }, 3203 },
3207 }, 3204 },
3205 {
3206 .ident = "Google Ultima",
3207 .callback = strago_quirk_cb,
3208 .matches = {
3209 DMI_MATCH(DMI_PRODUCT_NAME, "Ultima"),
3210 },
3211 },
3208 { } 3212 { }
3209}; 3213};
3210 3214
diff --git a/sound/soc/codecs/wm0010.c b/sound/soc/codecs/wm0010.c
index f2c6ad4b8fde..581ec1502228 100644
--- a/sound/soc/codecs/wm0010.c
+++ b/sound/soc/codecs/wm0010.c
@@ -577,7 +577,6 @@ static int wm0010_boot(struct snd_soc_codec *codec)
577 struct wm0010_priv *wm0010 = snd_soc_codec_get_drvdata(codec); 577 struct wm0010_priv *wm0010 = snd_soc_codec_get_drvdata(codec);
578 unsigned long flags; 578 unsigned long flags;
579 int ret; 579 int ret;
580 const struct firmware *fw;
581 struct spi_message m; 580 struct spi_message m;
582 struct spi_transfer t; 581 struct spi_transfer t;
583 struct dfw_pllrec pll_rec; 582 struct dfw_pllrec pll_rec;
@@ -623,14 +622,6 @@ static int wm0010_boot(struct snd_soc_codec *codec)
623 wm0010->state = WM0010_OUT_OF_RESET; 622 wm0010->state = WM0010_OUT_OF_RESET;
624 spin_unlock_irqrestore(&wm0010->irq_lock, flags); 623 spin_unlock_irqrestore(&wm0010->irq_lock, flags);
625 624
626 /* First the bootloader */
627 ret = request_firmware(&fw, "wm0010_stage2.bin", codec->dev);
628 if (ret != 0) {
629 dev_err(codec->dev, "Failed to request stage2 loader: %d\n",
630 ret);
631 goto abort;
632 }
633
634 if (!wait_for_completion_timeout(&wm0010->boot_completion, 625 if (!wait_for_completion_timeout(&wm0010->boot_completion,
635 msecs_to_jiffies(20))) 626 msecs_to_jiffies(20)))
636 dev_err(codec->dev, "Failed to get interrupt from DSP\n"); 627 dev_err(codec->dev, "Failed to get interrupt from DSP\n");
@@ -673,7 +664,7 @@ static int wm0010_boot(struct snd_soc_codec *codec)
673 664
674 img_swap = kzalloc(len, GFP_KERNEL | GFP_DMA); 665 img_swap = kzalloc(len, GFP_KERNEL | GFP_DMA);
675 if (!img_swap) 666 if (!img_swap)
676 goto abort; 667 goto abort_out;
677 668
678 /* We need to re-order for 0010 */ 669 /* We need to re-order for 0010 */
679 byte_swap_64((u64 *)&pll_rec, img_swap, len); 670 byte_swap_64((u64 *)&pll_rec, img_swap, len);
@@ -688,16 +679,16 @@ static int wm0010_boot(struct snd_soc_codec *codec)
688 spi_message_add_tail(&t, &m); 679 spi_message_add_tail(&t, &m);
689 680
690 ret = spi_sync(spi, &m); 681 ret = spi_sync(spi, &m);
691 if (ret != 0) { 682 if (ret) {
692 dev_err(codec->dev, "First PLL write failed: %d\n", ret); 683 dev_err(codec->dev, "First PLL write failed: %d\n", ret);
693 goto abort; 684 goto abort_swap;
694 } 685 }
695 686
696 /* Use a second send of the message to get the return status */ 687 /* Use a second send of the message to get the return status */
697 ret = spi_sync(spi, &m); 688 ret = spi_sync(spi, &m);
698 if (ret != 0) { 689 if (ret) {
699 dev_err(codec->dev, "Second PLL write failed: %d\n", ret); 690 dev_err(codec->dev, "Second PLL write failed: %d\n", ret);
700 goto abort; 691 goto abort_swap;
701 } 692 }
702 693
703 p = (u32 *)out; 694 p = (u32 *)out;
@@ -730,6 +721,10 @@ static int wm0010_boot(struct snd_soc_codec *codec)
730 721
731 return 0; 722 return 0;
732 723
724abort_swap:
725 kfree(img_swap);
726abort_out:
727 kfree(out);
733abort: 728abort:
734 /* Put the chip back into reset */ 729 /* Put the chip back into reset */
735 wm0010_halt(codec); 730 wm0010_halt(codec);
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c
index e3b7d0c57411..dbd88408861a 100644
--- a/sound/soc/codecs/wm8960.c
+++ b/sound/soc/codecs/wm8960.c
@@ -211,28 +211,38 @@ static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
211 return wm8960_set_deemph(codec); 211 return wm8960_set_deemph(codec);
212} 212}
213 213
214static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0); 214static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
215static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1); 215static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
216static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
216static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0); 217static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
217static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1); 218static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
218static const DECLARE_TLV_DB_SCALE(boost_tlv, -1200, 300, 1); 219static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
220static const unsigned int micboost_tlv[] = {
221 TLV_DB_RANGE_HEAD(2),
222 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
223 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
224};
219 225
220static const struct snd_kcontrol_new wm8960_snd_controls[] = { 226static const struct snd_kcontrol_new wm8960_snd_controls[] = {
221SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL, 227SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
222 0, 63, 0, adc_tlv), 228 0, 63, 0, inpga_tlv),
223SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL, 229SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
224 6, 1, 0), 230 6, 1, 0),
225SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL, 231SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
226 7, 1, 0), 232 7, 1, 0),
227 233
228SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume", 234SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
229 WM8960_INBMIX1, 4, 7, 0, boost_tlv), 235 WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
230SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume", 236SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
231 WM8960_INBMIX1, 1, 7, 0, boost_tlv), 237 WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
232SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume", 238SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
233 WM8960_INBMIX2, 4, 7, 0, boost_tlv), 239 WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
234SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume", 240SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
235 WM8960_INBMIX2, 1, 7, 0, boost_tlv), 241 WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
242SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
243 WM8960_RINPATH, 4, 3, 0, micboost_tlv),
244SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
245 WM8960_LINPATH, 4, 3, 0, micboost_tlv),
236 246
237SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC, 247SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
238 0, 255, 0, dac_tlv), 248 0, 255, 0, dac_tlv),
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index b4eb975da981..293e47a6ff59 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -2944,7 +2944,8 @@ static int wm8962_mute(struct snd_soc_dai *dai, int mute)
2944 WM8962_DAC_MUTE, val); 2944 WM8962_DAC_MUTE, val);
2945} 2945}
2946 2946
2947#define WM8962_RATES SNDRV_PCM_RATE_8000_96000 2947#define WM8962_RATES (SNDRV_PCM_RATE_8000_48000 |\
2948 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
2948 2949
2949#define WM8962_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 2950#define WM8962_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
2950 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 2951 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index add6bb99661d..7d45d98a861f 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -663,7 +663,7 @@ static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream,
663 u8 rx_ser = 0; 663 u8 rx_ser = 0;
664 u8 slots = mcasp->tdm_slots; 664 u8 slots = mcasp->tdm_slots;
665 u8 max_active_serializers = (channels + slots - 1) / slots; 665 u8 max_active_serializers = (channels + slots - 1) / slots;
666 int active_serializers, numevt, n; 666 int active_serializers, numevt;
667 u32 reg; 667 u32 reg;
668 /* Default configuration */ 668 /* Default configuration */
669 if (mcasp->version < MCASP_VERSION_3) 669 if (mcasp->version < MCASP_VERSION_3)
@@ -745,9 +745,8 @@ static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream,
745 * The number of words for numevt need to be in steps of active 745 * The number of words for numevt need to be in steps of active
746 * serializers. 746 * serializers.
747 */ 747 */
748 n = numevt % active_serializers; 748 numevt = (numevt / active_serializers) * active_serializers;
749 if (n) 749
750 numevt += (active_serializers - n);
751 while (period_words % numevt && numevt > 0) 750 while (period_words % numevt && numevt > 0)
752 numevt -= active_serializers; 751 numevt -= active_serializers;
753 if (numevt <= 0) 752 if (numevt <= 0)
@@ -1299,6 +1298,7 @@ static struct snd_soc_dai_driver davinci_mcasp_dai[] = {
1299 .ops = &davinci_mcasp_dai_ops, 1298 .ops = &davinci_mcasp_dai_ops,
1300 1299
1301 .symmetric_samplebits = 1, 1300 .symmetric_samplebits = 1,
1301 .symmetric_rates = 1,
1302 }, 1302 },
1303 { 1303 {
1304 .name = "davinci-mcasp.1", 1304 .name = "davinci-mcasp.1",
@@ -1685,7 +1685,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1685 1685
1686 irq = platform_get_irq_byname(pdev, "common"); 1686 irq = platform_get_irq_byname(pdev, "common");
1687 if (irq >= 0) { 1687 if (irq >= 0) {
1688 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_common\n", 1688 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_common",
1689 dev_name(&pdev->dev)); 1689 dev_name(&pdev->dev));
1690 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, 1690 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1691 davinci_mcasp_common_irq_handler, 1691 davinci_mcasp_common_irq_handler,
@@ -1702,7 +1702,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1702 1702
1703 irq = platform_get_irq_byname(pdev, "rx"); 1703 irq = platform_get_irq_byname(pdev, "rx");
1704 if (irq >= 0) { 1704 if (irq >= 0) {
1705 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_rx\n", 1705 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_rx",
1706 dev_name(&pdev->dev)); 1706 dev_name(&pdev->dev));
1707 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, 1707 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1708 davinci_mcasp_rx_irq_handler, 1708 davinci_mcasp_rx_irq_handler,
@@ -1717,7 +1717,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1717 1717
1718 irq = platform_get_irq_byname(pdev, "tx"); 1718 irq = platform_get_irq_byname(pdev, "tx");
1719 if (irq >= 0) { 1719 if (irq >= 0) {
1720 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_tx\n", 1720 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_tx",
1721 dev_name(&pdev->dev)); 1721 dev_name(&pdev->dev));
1722 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, 1722 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1723 davinci_mcasp_tx_irq_handler, 1723 davinci_mcasp_tx_irq_handler,
diff --git a/sound/soc/fsl/fsl-asoc-card.c b/sound/soc/fsl/fsl-asoc-card.c
index 5aeb6ed4827e..96f55ae75c71 100644
--- a/sound/soc/fsl/fsl-asoc-card.c
+++ b/sound/soc/fsl/fsl-asoc-card.c
@@ -488,7 +488,8 @@ static int fsl_asoc_card_probe(struct platform_device *pdev)
488 priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM; 488 priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
489 } else { 489 } else {
490 dev_err(&pdev->dev, "unknown Device Tree compatible\n"); 490 dev_err(&pdev->dev, "unknown Device Tree compatible\n");
491 return -EINVAL; 491 ret = -EINVAL;
492 goto asrc_fail;
492 } 493 }
493 494
494 /* Common settings for corresponding Freescale CPU DAI driver */ 495 /* Common settings for corresponding Freescale CPU DAI driver */
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 8ec6fb208ea0..37c5cd4d0e59 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -249,7 +249,8 @@ MODULE_DEVICE_TABLE(of, fsl_ssi_ids);
249 249
250static bool fsl_ssi_is_ac97(struct fsl_ssi_private *ssi_private) 250static bool fsl_ssi_is_ac97(struct fsl_ssi_private *ssi_private)
251{ 251{
252 return !!(ssi_private->dai_fmt & SND_SOC_DAIFMT_AC97); 252 return (ssi_private->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) ==
253 SND_SOC_DAIFMT_AC97;
253} 254}
254 255
255static bool fsl_ssi_is_i2s_master(struct fsl_ssi_private *ssi_private) 256static bool fsl_ssi_is_i2s_master(struct fsl_ssi_private *ssi_private)
@@ -947,7 +948,7 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev,
947 CCSR_SSI_SCR_TCH_EN); 948 CCSR_SSI_SCR_TCH_EN);
948 } 949 }
949 950
950 if (fmt & SND_SOC_DAIFMT_AC97) 951 if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_AC97)
951 fsl_ssi_setup_ac97(ssi_private); 952 fsl_ssi_setup_ac97(ssi_private);
952 953
953 return 0; 954 return 0;
diff --git a/sound/soc/intel/haswell/sst-haswell-ipc.c b/sound/soc/intel/haswell/sst-haswell-ipc.c
index f6efa9d4acad..b27f25f70730 100644
--- a/sound/soc/intel/haswell/sst-haswell-ipc.c
+++ b/sound/soc/intel/haswell/sst-haswell-ipc.c
@@ -302,6 +302,10 @@ struct sst_hsw {
302 struct sst_hsw_ipc_dx_reply dx; 302 struct sst_hsw_ipc_dx_reply dx;
303 void *dx_context; 303 void *dx_context;
304 dma_addr_t dx_context_paddr; 304 dma_addr_t dx_context_paddr;
305 enum sst_hsw_device_id dx_dev;
306 enum sst_hsw_device_mclk dx_mclk;
307 enum sst_hsw_device_mode dx_mode;
308 u32 dx_clock_divider;
305 309
306 /* boot */ 310 /* boot */
307 wait_queue_head_t boot_wait; 311 wait_queue_head_t boot_wait;
@@ -1400,10 +1404,10 @@ int sst_hsw_device_set_config(struct sst_hsw *hsw,
1400 1404
1401 trace_ipc_request("set device config", dev); 1405 trace_ipc_request("set device config", dev);
1402 1406
1403 config.ssp_interface = dev; 1407 hsw->dx_dev = config.ssp_interface = dev;
1404 config.clock_frequency = mclk; 1408 hsw->dx_mclk = config.clock_frequency = mclk;
1405 config.mode = mode; 1409 hsw->dx_mode = config.mode = mode;
1406 config.clock_divider = clock_divider; 1410 hsw->dx_clock_divider = config.clock_divider = clock_divider;
1407 if (mode == SST_HSW_DEVICE_TDM_CLOCK_MASTER) 1411 if (mode == SST_HSW_DEVICE_TDM_CLOCK_MASTER)
1408 config.channels = 4; 1412 config.channels = 4;
1409 else 1413 else
@@ -1704,10 +1708,10 @@ int sst_hsw_dsp_runtime_resume(struct sst_hsw *hsw)
1704 return -EIO; 1708 return -EIO;
1705 } 1709 }
1706 1710
1707 /* Set ADSP SSP port settings */ 1711 /* Set ADSP SSP port settings - sadly the FW does not store SSP port
1708 ret = sst_hsw_device_set_config(hsw, SST_HSW_DEVICE_SSP_0, 1712 settings as part of the PM context. */
1709 SST_HSW_DEVICE_MCLK_FREQ_24_MHZ, 1713 ret = sst_hsw_device_set_config(hsw, hsw->dx_dev, hsw->dx_mclk,
1710 SST_HSW_DEVICE_CLOCK_MASTER, 9); 1714 hsw->dx_mode, hsw->dx_clock_divider);
1711 if (ret < 0) 1715 if (ret < 0)
1712 dev_err(dev, "error: SSP re-initialization failed\n"); 1716 dev_err(dev, "error: SSP re-initialization failed\n");
1713 1717
diff --git a/sound/soc/mediatek/mtk-afe-pcm.c b/sound/soc/mediatek/mtk-afe-pcm.c
index d190fe017559..f5baf3c38863 100644
--- a/sound/soc/mediatek/mtk-afe-pcm.c
+++ b/sound/soc/mediatek/mtk-afe-pcm.c
@@ -549,6 +549,23 @@ static int mtk_afe_dais_startup(struct snd_pcm_substream *substream,
549 memif->substream = substream; 549 memif->substream = substream;
550 550
551 snd_soc_set_runtime_hwparams(substream, &mtk_afe_hardware); 551 snd_soc_set_runtime_hwparams(substream, &mtk_afe_hardware);
552
553 /*
554 * Capture cannot use ping-pong buffer since hw_ptr at IRQ may be
555 * smaller than period_size due to AFE's internal buffer.
556 * This easily leads to overrun when avail_min is period_size.
557 * One more period can hold the possible unread buffer.
558 */
559 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
560 ret = snd_pcm_hw_constraint_minmax(runtime,
561 SNDRV_PCM_HW_PARAM_PERIODS,
562 3,
563 mtk_afe_hardware.periods_max);
564 if (ret < 0) {
565 dev_err(afe->dev, "hw_constraint_minmax failed\n");
566 return ret;
567 }
568 }
552 ret = snd_pcm_hw_constraint_integer(runtime, 569 ret = snd_pcm_hw_constraint_integer(runtime,
553 SNDRV_PCM_HW_PARAM_PERIODS); 570 SNDRV_PCM_HW_PARAM_PERIODS);
554 if (ret < 0) 571 if (ret < 0)
diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index 39cea80846c3..f2bf8661dd21 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
@@ -1,7 +1,6 @@
1config SND_PXA2XX_SOC 1config SND_PXA2XX_SOC
2 tristate "SoC Audio for the Intel PXA2xx chip" 2 tristate "SoC Audio for the Intel PXA2xx chip"
3 depends on ARCH_PXA 3 depends on ARCH_PXA
4 select SND_ARM
5 select SND_PXA2XX_LIB 4 select SND_PXA2XX_LIB
6 help 5 help
7 Say Y or M if you want to add support for codecs attached to 6 Say Y or M if you want to add support for codecs attached to
@@ -25,7 +24,6 @@ config SND_PXA2XX_AC97
25config SND_PXA2XX_SOC_AC97 24config SND_PXA2XX_SOC_AC97
26 tristate 25 tristate
27 select AC97_BUS 26 select AC97_BUS
28 select SND_ARM
29 select SND_PXA2XX_LIB_AC97 27 select SND_PXA2XX_LIB_AC97
30 select SND_SOC_AC97_BUS 28 select SND_SOC_AC97_BUS
31 29
diff --git a/sound/soc/pxa/pxa2xx-ac97.c b/sound/soc/pxa/pxa2xx-ac97.c
index 1f6054650991..9e4b04e0fbd1 100644
--- a/sound/soc/pxa/pxa2xx-ac97.c
+++ b/sound/soc/pxa/pxa2xx-ac97.c
@@ -49,7 +49,7 @@ static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
49 .reset = pxa2xx_ac97_cold_reset, 49 .reset = pxa2xx_ac97_cold_reset,
50}; 50};
51 51
52static unsigned long pxa2xx_ac97_pcm_stereo_in_req = 12; 52static unsigned long pxa2xx_ac97_pcm_stereo_in_req = 11;
53static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_in = { 53static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_in = {
54 .addr = __PREG(PCDR), 54 .addr = __PREG(PCDR),
55 .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, 55 .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
@@ -57,7 +57,7 @@ static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_in = {
57 .filter_data = &pxa2xx_ac97_pcm_stereo_in_req, 57 .filter_data = &pxa2xx_ac97_pcm_stereo_in_req,
58}; 58};
59 59
60static unsigned long pxa2xx_ac97_pcm_stereo_out_req = 11; 60static unsigned long pxa2xx_ac97_pcm_stereo_out_req = 12;
61static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_out = { 61static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_out = {
62 .addr = __PREG(PCDR), 62 .addr = __PREG(PCDR),
63 .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, 63 .addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
index f4bf21a5539b..ff8bda471b25 100644
--- a/sound/soc/soc-dapm.c
+++ b/sound/soc/soc-dapm.c
@@ -3501,7 +3501,7 @@ static int snd_soc_dai_link_event(struct snd_soc_dapm_widget *w,
3501 3501
3502 default: 3502 default:
3503 WARN(1, "Unknown event %d\n", event); 3503 WARN(1, "Unknown event %d\n", event);
3504 return -EINVAL; 3504 ret = -EINVAL;
3505 } 3505 }
3506 3506
3507out: 3507out:
diff --git a/sound/soc/soc-utils.c b/sound/soc/soc-utils.c
index 362c69ac1d6c..53dd085d3ee2 100644
--- a/sound/soc/soc-utils.c
+++ b/sound/soc/soc-utils.c
@@ -101,6 +101,15 @@ static struct snd_soc_codec_driver dummy_codec;
101 SNDRV_PCM_FMTBIT_S32_LE | \ 101 SNDRV_PCM_FMTBIT_S32_LE | \
102 SNDRV_PCM_FMTBIT_U32_LE | \ 102 SNDRV_PCM_FMTBIT_U32_LE | \
103 SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE) 103 SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE)
104/*
105 * The dummy CODEC is only meant to be used in situations where there is no
106 * actual hardware.
107 *
108 * If there is actual hardware even if it does not have a control bus
109 * the hardware will still have constraints like supported samplerates, etc.
110 * which should be modelled. And the data flow graph also should be modelled
111 * using DAPM.
112 */
104static struct snd_soc_dai_driver dummy_dai = { 113static struct snd_soc_dai_driver dummy_dai = {
105 .name = "snd-soc-dummy-dai", 114 .name = "snd-soc-dummy-dai",
106 .playback = { 115 .playback = {
diff --git a/sound/soc/spear/Kconfig b/sound/soc/spear/Kconfig
index 0a53053495f3..4fb91412ebec 100644
--- a/sound/soc/spear/Kconfig
+++ b/sound/soc/spear/Kconfig
@@ -1,6 +1,6 @@
1config SND_SPEAR_SOC 1config SND_SPEAR_SOC
2 tristate 2 tristate
3 select SND_DMAENGINE_PCM 3 select SND_SOC_GENERIC_DMAENGINE_PCM
4 4
5config SND_SPEAR_SPDIF_OUT 5config SND_SPEAR_SPDIF_OUT
6 tristate 6 tristate
diff --git a/sound/soc/sti/uniperif_player.c b/sound/soc/sti/uniperif_player.c
index f6eefe1b8f8f..843f037a317d 100644
--- a/sound/soc/sti/uniperif_player.c
+++ b/sound/soc/sti/uniperif_player.c
@@ -989,8 +989,8 @@ static int uni_player_parse_dt(struct platform_device *pdev,
989 if (!info) 989 if (!info)
990 return -ENOMEM; 990 return -ENOMEM;
991 991
992 of_property_read_u32(pnode, "version", &player->ver); 992 if (of_property_read_u32(pnode, "version", &player->ver) ||
993 if (player->ver == SND_ST_UNIPERIF_VERSION_UNKNOWN) { 993 player->ver == SND_ST_UNIPERIF_VERSION_UNKNOWN) {
994 dev_err(dev, "Unknown uniperipheral version "); 994 dev_err(dev, "Unknown uniperipheral version ");
995 return -EINVAL; 995 return -EINVAL;
996 } 996 }
@@ -998,10 +998,16 @@ static int uni_player_parse_dt(struct platform_device *pdev,
998 if (player->ver >= SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0) 998 if (player->ver >= SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0)
999 info->underflow_enabled = 1; 999 info->underflow_enabled = 1;
1000 1000
1001 of_property_read_u32(pnode, "uniperiph-id", &info->id); 1001 if (of_property_read_u32(pnode, "uniperiph-id", &info->id)) {
1002 dev_err(dev, "uniperipheral id not defined");
1003 return -EINVAL;
1004 }
1002 1005
1003 /* Read the device mode property */ 1006 /* Read the device mode property */
1004 of_property_read_string(pnode, "mode", &mode); 1007 if (of_property_read_string(pnode, "mode", &mode)) {
1008 dev_err(dev, "uniperipheral mode not defined");
1009 return -EINVAL;
1010 }
1005 1011
1006 if (strcasecmp(mode, "hdmi") == 0) 1012 if (strcasecmp(mode, "hdmi") == 0)
1007 info->player_type = SND_ST_UNIPERIF_PLAYER_TYPE_HDMI; 1013 info->player_type = SND_ST_UNIPERIF_PLAYER_TYPE_HDMI;
diff --git a/sound/soc/sti/uniperif_reader.c b/sound/soc/sti/uniperif_reader.c
index c502626f339b..f791239a3087 100644
--- a/sound/soc/sti/uniperif_reader.c
+++ b/sound/soc/sti/uniperif_reader.c
@@ -316,7 +316,11 @@ static int uni_reader_parse_dt(struct platform_device *pdev,
316 if (!info) 316 if (!info)
317 return -ENOMEM; 317 return -ENOMEM;
318 318
319 of_property_read_u32(node, "version", &reader->ver); 319 if (of_property_read_u32(node, "version", &reader->ver) ||
320 reader->ver == SND_ST_UNIPERIF_VERSION_UNKNOWN) {
321 dev_err(&pdev->dev, "Unknown uniperipheral version ");
322 return -EINVAL;
323 }
320 324
321 /* Save the info structure */ 325 /* Save the info structure */
322 reader->info = info; 326 reader->info = info;
diff --git a/tools/build/Makefile.feature b/tools/build/Makefile.feature
index 2975632d51e2..c8fe6d177119 100644
--- a/tools/build/Makefile.feature
+++ b/tools/build/Makefile.feature
@@ -41,6 +41,7 @@ FEATURE_TESTS ?= \
41 libelf-getphdrnum \ 41 libelf-getphdrnum \
42 libelf-mmap \ 42 libelf-mmap \
43 libnuma \ 43 libnuma \
44 numa_num_possible_cpus \
44 libperl \ 45 libperl \
45 libpython \ 46 libpython \
46 libpython-version \ 47 libpython-version \
@@ -51,7 +52,8 @@ FEATURE_TESTS ?= \
51 timerfd \ 52 timerfd \
52 libdw-dwarf-unwind \ 53 libdw-dwarf-unwind \
53 zlib \ 54 zlib \
54 lzma 55 lzma \
56 get_cpuid
55 57
56FEATURE_DISPLAY ?= \ 58FEATURE_DISPLAY ?= \
57 dwarf \ 59 dwarf \
@@ -61,13 +63,15 @@ FEATURE_DISPLAY ?= \
61 libbfd \ 63 libbfd \
62 libelf \ 64 libelf \
63 libnuma \ 65 libnuma \
66 numa_num_possible_cpus \
64 libperl \ 67 libperl \
65 libpython \ 68 libpython \
66 libslang \ 69 libslang \
67 libunwind \ 70 libunwind \
68 libdw-dwarf-unwind \ 71 libdw-dwarf-unwind \
69 zlib \ 72 zlib \
70 lzma 73 lzma \
74 get_cpuid
71 75
72# Set FEATURE_CHECK_(C|LD)FLAGS-all for all FEATURE_TESTS features. 76# Set FEATURE_CHECK_(C|LD)FLAGS-all for all FEATURE_TESTS features.
73# If in the future we need per-feature checks/flags for features not 77# If in the future we need per-feature checks/flags for features not
diff --git a/tools/build/feature/Makefile b/tools/build/feature/Makefile
index 74ca42093d70..e43a2971bf56 100644
--- a/tools/build/feature/Makefile
+++ b/tools/build/feature/Makefile
@@ -19,6 +19,7 @@ FILES= \
19 test-libelf-getphdrnum.bin \ 19 test-libelf-getphdrnum.bin \
20 test-libelf-mmap.bin \ 20 test-libelf-mmap.bin \
21 test-libnuma.bin \ 21 test-libnuma.bin \
22 test-numa_num_possible_cpus.bin \
22 test-libperl.bin \ 23 test-libperl.bin \
23 test-libpython.bin \ 24 test-libpython.bin \
24 test-libpython-version.bin \ 25 test-libpython-version.bin \
@@ -34,7 +35,8 @@ FILES= \
34 test-compile-x32.bin \ 35 test-compile-x32.bin \
35 test-zlib.bin \ 36 test-zlib.bin \
36 test-lzma.bin \ 37 test-lzma.bin \
37 test-bpf.bin 38 test-bpf.bin \
39 test-get_cpuid.bin
38 40
39CC := $(CROSS_COMPILE)gcc -MD 41CC := $(CROSS_COMPILE)gcc -MD
40PKG_CONFIG := $(CROSS_COMPILE)pkg-config 42PKG_CONFIG := $(CROSS_COMPILE)pkg-config
@@ -87,6 +89,9 @@ test-libelf-getphdrnum.bin:
87test-libnuma.bin: 89test-libnuma.bin:
88 $(BUILD) -lnuma 90 $(BUILD) -lnuma
89 91
92test-numa_num_possible_cpus.bin:
93 $(BUILD) -lnuma
94
90test-libunwind.bin: 95test-libunwind.bin:
91 $(BUILD) -lelf 96 $(BUILD) -lelf
92 97
@@ -162,6 +167,9 @@ test-zlib.bin:
162test-lzma.bin: 167test-lzma.bin:
163 $(BUILD) -llzma 168 $(BUILD) -llzma
164 169
170test-get_cpuid.bin:
171 $(BUILD)
172
165test-bpf.bin: 173test-bpf.bin:
166 $(BUILD) 174 $(BUILD)
167 175
diff --git a/tools/build/feature/test-all.c b/tools/build/feature/test-all.c
index 84689a67814a..33cf6f20bd4e 100644
--- a/tools/build/feature/test-all.c
+++ b/tools/build/feature/test-all.c
@@ -77,6 +77,10 @@
77# include "test-libnuma.c" 77# include "test-libnuma.c"
78#undef main 78#undef main
79 79
80#define main main_test_numa_num_possible_cpus
81# include "test-numa_num_possible_cpus.c"
82#undef main
83
80#define main main_test_timerfd 84#define main main_test_timerfd
81# include "test-timerfd.c" 85# include "test-timerfd.c"
82#undef main 86#undef main
@@ -117,6 +121,10 @@
117# include "test-lzma.c" 121# include "test-lzma.c"
118#undef main 122#undef main
119 123
124#define main main_test_get_cpuid
125# include "test-get_cpuid.c"
126#undef main
127
120int main(int argc, char *argv[]) 128int main(int argc, char *argv[])
121{ 129{
122 main_test_libpython(); 130 main_test_libpython();
@@ -136,6 +144,7 @@ int main(int argc, char *argv[])
136 main_test_libbfd(); 144 main_test_libbfd();
137 main_test_backtrace(); 145 main_test_backtrace();
138 main_test_libnuma(); 146 main_test_libnuma();
147 main_test_numa_num_possible_cpus();
139 main_test_timerfd(); 148 main_test_timerfd();
140 main_test_stackprotector_all(); 149 main_test_stackprotector_all();
141 main_test_libdw_dwarf_unwind(); 150 main_test_libdw_dwarf_unwind();
@@ -143,6 +152,7 @@ int main(int argc, char *argv[])
143 main_test_zlib(); 152 main_test_zlib();
144 main_test_pthread_attr_setaffinity_np(); 153 main_test_pthread_attr_setaffinity_np();
145 main_test_lzma(); 154 main_test_lzma();
155 main_test_get_cpuid();
146 156
147 return 0; 157 return 0;
148} 158}
diff --git a/tools/build/feature/test-get_cpuid.c b/tools/build/feature/test-get_cpuid.c
new file mode 100644
index 000000000000..d7a2c407130d
--- /dev/null
+++ b/tools/build/feature/test-get_cpuid.c
@@ -0,0 +1,7 @@
1#include <cpuid.h>
2
3int main(void)
4{
5 unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
6 return __get_cpuid(0x15, &eax, &ebx, &ecx, &edx);
7}
diff --git a/tools/build/feature/test-numa_num_possible_cpus.c b/tools/build/feature/test-numa_num_possible_cpus.c
new file mode 100644
index 000000000000..2606e94b0659
--- /dev/null
+++ b/tools/build/feature/test-numa_num_possible_cpus.c
@@ -0,0 +1,6 @@
1#include <numa.h>
2
3int main(void)
4{
5 return numa_num_possible_cpus();
6}
diff --git a/tools/lib/traceevent/event-parse.c b/tools/lib/traceevent/event-parse.c
index 4d885934b919..cf42b090477b 100644
--- a/tools/lib/traceevent/event-parse.c
+++ b/tools/lib/traceevent/event-parse.c
@@ -3795,7 +3795,7 @@ static void print_str_arg(struct trace_seq *s, void *data, int size,
3795 struct format_field *field; 3795 struct format_field *field;
3796 struct printk_map *printk; 3796 struct printk_map *printk;
3797 long long val, fval; 3797 long long val, fval;
3798 unsigned long addr; 3798 unsigned long long addr;
3799 char *str; 3799 char *str;
3800 unsigned char *hex; 3800 unsigned char *hex;
3801 int print; 3801 int print;
@@ -3828,13 +3828,30 @@ static void print_str_arg(struct trace_seq *s, void *data, int size,
3828 */ 3828 */
3829 if (!(field->flags & FIELD_IS_ARRAY) && 3829 if (!(field->flags & FIELD_IS_ARRAY) &&
3830 field->size == pevent->long_size) { 3830 field->size == pevent->long_size) {
3831 addr = *(unsigned long *)(data + field->offset); 3831
3832 /* Handle heterogeneous recording and processing
3833 * architectures
3834 *
3835 * CASE I:
3836 * Traces recorded on 32-bit devices (32-bit
3837 * addressing) and processed on 64-bit devices:
3838 * In this case, only 32 bits should be read.
3839 *
3840 * CASE II:
3841 * Traces recorded on 64 bit devices and processed
3842 * on 32-bit devices:
3843 * In this case, 64 bits must be read.
3844 */
3845 addr = (pevent->long_size == 8) ?
3846 *(unsigned long long *)(data + field->offset) :
3847 (unsigned long long)*(unsigned int *)(data + field->offset);
3848
3832 /* Check if it matches a print format */ 3849 /* Check if it matches a print format */
3833 printk = find_printk(pevent, addr); 3850 printk = find_printk(pevent, addr);
3834 if (printk) 3851 if (printk)
3835 trace_seq_puts(s, printk->printk); 3852 trace_seq_puts(s, printk->printk);
3836 else 3853 else
3837 trace_seq_printf(s, "%lx", addr); 3854 trace_seq_printf(s, "%llx", addr);
3838 break; 3855 break;
3839 } 3856 }
3840 str = malloc(len + 1); 3857 str = malloc(len + 1);
diff --git a/tools/perf/Documentation/intel-pt.txt b/tools/perf/Documentation/intel-pt.txt
index 4a0501d7a3b4..c94c9de3173e 100644
--- a/tools/perf/Documentation/intel-pt.txt
+++ b/tools/perf/Documentation/intel-pt.txt
@@ -364,21 +364,6 @@ cyc_thresh Specifies how frequently CYC packets are produced - see cyc
364 364
365 CYC packets are not requested by default. 365 CYC packets are not requested by default.
366 366
367no_force_psb This is a driver option and is not in the IA32_RTIT_CTL MSR.
368
369 It stops the driver resetting the byte count to zero whenever
370 enabling the trace (for example on context switches) which in
371 turn results in no PSB being forced. However some processors
372 will produce a PSB anyway.
373
374 In any case, there is still a PSB when the trace is enabled for
375 the first time.
376
377 no_force_psb can be used to slightly decrease the trace size but
378 may make it harder for the decoder to recover from errors.
379
380 no_force_psb is not selected by default.
381
382 367
383new snapshot option 368new snapshot option
384------------------- 369-------------------
diff --git a/tools/perf/builtin-script.c b/tools/perf/builtin-script.c
index eb51325e8ad9..284a76e04628 100644
--- a/tools/perf/builtin-script.c
+++ b/tools/perf/builtin-script.c
@@ -768,8 +768,8 @@ static int process_exit_event(struct perf_tool *tool,
768 if (!evsel->attr.sample_id_all) { 768 if (!evsel->attr.sample_id_all) {
769 sample->cpu = 0; 769 sample->cpu = 0;
770 sample->time = 0; 770 sample->time = 0;
771 sample->tid = event->comm.tid; 771 sample->tid = event->fork.tid;
772 sample->pid = event->comm.pid; 772 sample->pid = event->fork.pid;
773 } 773 }
774 print_sample_start(sample, thread, evsel); 774 print_sample_start(sample, thread, evsel);
775 perf_event__fprintf(event, stdout); 775 perf_event__fprintf(event, stdout);
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index 827557fc7511..38a08539f4bf 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -573,9 +573,14 @@ ifndef NO_LIBNUMA
573 msg := $(warning No numa.h found, disables 'perf bench numa mem' benchmark, please install numactl-devel/libnuma-devel/libnuma-dev); 573 msg := $(warning No numa.h found, disables 'perf bench numa mem' benchmark, please install numactl-devel/libnuma-devel/libnuma-dev);
574 NO_LIBNUMA := 1 574 NO_LIBNUMA := 1
575 else 575 else
576 CFLAGS += -DHAVE_LIBNUMA_SUPPORT 576 ifeq ($(feature-numa_num_possible_cpus), 0)
577 EXTLIBS += -lnuma 577 msg := $(warning Old numa library found, disables 'perf bench numa mem' benchmark, please install numactl-devel/libnuma-devel/libnuma-dev >= 2.0.8);
578 $(call detected,CONFIG_NUMA) 578 NO_LIBNUMA := 1
579 else
580 CFLAGS += -DHAVE_LIBNUMA_SUPPORT
581 EXTLIBS += -lnuma
582 $(call detected,CONFIG_NUMA)
583 endif
579 endif 584 endif
580endif 585endif
581 586
@@ -621,8 +626,13 @@ ifdef LIBBABELTRACE
621endif 626endif
622 627
623ifndef NO_AUXTRACE 628ifndef NO_AUXTRACE
624 $(call detected,CONFIG_AUXTRACE) 629 ifeq ($(feature-get_cpuid), 0)
625 CFLAGS += -DHAVE_AUXTRACE_SUPPORT 630 msg := $(warning Your gcc lacks the __get_cpuid() builtin, disables support for auxtrace/Intel PT, please install a newer gcc);
631 NO_AUXTRACE := 1
632 else
633 $(call detected,CONFIG_AUXTRACE)
634 CFLAGS += -DHAVE_AUXTRACE_SUPPORT
635 endif
626endif 636endif
627 637
628# Among the variables below, these: 638# Among the variables below, these:
diff --git a/tools/perf/tests/sw-clock.c b/tools/perf/tests/sw-clock.c
index 1aa21c90731b..5b83f56a3b6f 100644
--- a/tools/perf/tests/sw-clock.c
+++ b/tools/perf/tests/sw-clock.c
@@ -34,6 +34,8 @@ static int __test__sw_clock_freq(enum perf_sw_ids clock_id)
34 .disabled = 1, 34 .disabled = 1,
35 .freq = 1, 35 .freq = 1,
36 }; 36 };
37 struct cpu_map *cpus;
38 struct thread_map *threads;
37 39
38 attr.sample_freq = 500; 40 attr.sample_freq = 500;
39 41
@@ -50,14 +52,19 @@ static int __test__sw_clock_freq(enum perf_sw_ids clock_id)
50 } 52 }
51 perf_evlist__add(evlist, evsel); 53 perf_evlist__add(evlist, evsel);
52 54
53 evlist->cpus = cpu_map__dummy_new(); 55 cpus = cpu_map__dummy_new();
54 evlist->threads = thread_map__new_by_tid(getpid()); 56 threads = thread_map__new_by_tid(getpid());
55 if (!evlist->cpus || !evlist->threads) { 57 if (!cpus || !threads) {
56 err = -ENOMEM; 58 err = -ENOMEM;
57 pr_debug("Not enough memory to create thread/cpu maps\n"); 59 pr_debug("Not enough memory to create thread/cpu maps\n");
58 goto out_delete_evlist; 60 goto out_free_maps;
59 } 61 }
60 62
63 perf_evlist__set_maps(evlist, cpus, threads);
64
65 cpus = NULL;
66 threads = NULL;
67
61 if (perf_evlist__open(evlist)) { 68 if (perf_evlist__open(evlist)) {
62 const char *knob = "/proc/sys/kernel/perf_event_max_sample_rate"; 69 const char *knob = "/proc/sys/kernel/perf_event_max_sample_rate";
63 70
@@ -107,6 +114,9 @@ next_event:
107 err = -1; 114 err = -1;
108 } 115 }
109 116
117out_free_maps:
118 cpu_map__put(cpus);
119 thread_map__put(threads);
110out_delete_evlist: 120out_delete_evlist:
111 perf_evlist__delete(evlist); 121 perf_evlist__delete(evlist);
112 return err; 122 return err;
diff --git a/tools/perf/tests/task-exit.c b/tools/perf/tests/task-exit.c
index 3a8fedef83bc..add16385f13e 100644
--- a/tools/perf/tests/task-exit.c
+++ b/tools/perf/tests/task-exit.c
@@ -43,6 +43,8 @@ int test__task_exit(void)
43 }; 43 };
44 const char *argv[] = { "true", NULL }; 44 const char *argv[] = { "true", NULL };
45 char sbuf[STRERR_BUFSIZE]; 45 char sbuf[STRERR_BUFSIZE];
46 struct cpu_map *cpus;
47 struct thread_map *threads;
46 48
47 signal(SIGCHLD, sig_handler); 49 signal(SIGCHLD, sig_handler);
48 50
@@ -58,14 +60,19 @@ int test__task_exit(void)
58 * perf_evlist__prepare_workload we'll fill in the only thread 60 * perf_evlist__prepare_workload we'll fill in the only thread
59 * we're monitoring, the one forked there. 61 * we're monitoring, the one forked there.
60 */ 62 */
61 evlist->cpus = cpu_map__dummy_new(); 63 cpus = cpu_map__dummy_new();
62 evlist->threads = thread_map__new_by_tid(-1); 64 threads = thread_map__new_by_tid(-1);
63 if (!evlist->cpus || !evlist->threads) { 65 if (!cpus || !threads) {
64 err = -ENOMEM; 66 err = -ENOMEM;
65 pr_debug("Not enough memory to create thread/cpu maps\n"); 67 pr_debug("Not enough memory to create thread/cpu maps\n");
66 goto out_delete_evlist; 68 goto out_free_maps;
67 } 69 }
68 70
71 perf_evlist__set_maps(evlist, cpus, threads);
72
73 cpus = NULL;
74 threads = NULL;
75
69 err = perf_evlist__prepare_workload(evlist, &target, argv, false, 76 err = perf_evlist__prepare_workload(evlist, &target, argv, false,
70 workload_exec_failed_signal); 77 workload_exec_failed_signal);
71 if (err < 0) { 78 if (err < 0) {
@@ -114,6 +121,9 @@ retry:
114 err = -1; 121 err = -1;
115 } 122 }
116 123
124out_free_maps:
125 cpu_map__put(cpus);
126 thread_map__put(threads);
117out_delete_evlist: 127out_delete_evlist:
118 perf_evlist__delete(evlist); 128 perf_evlist__delete(evlist);
119 return err; 129 return err;
diff --git a/tools/perf/ui/browsers/hists.c b/tools/perf/ui/browsers/hists.c
index cf86f2d3a5e7..c04c60d4863c 100644
--- a/tools/perf/ui/browsers/hists.c
+++ b/tools/perf/ui/browsers/hists.c
@@ -1968,7 +1968,8 @@ skip_annotation:
1968 &options[nr_options], dso); 1968 &options[nr_options], dso);
1969 nr_options += add_map_opt(browser, &actions[nr_options], 1969 nr_options += add_map_opt(browser, &actions[nr_options],
1970 &options[nr_options], 1970 &options[nr_options],
1971 browser->selection->map); 1971 browser->selection ?
1972 browser->selection->map : NULL);
1972 1973
1973 /* perf script support */ 1974 /* perf script support */
1974 if (browser->he_selection) { 1975 if (browser->he_selection) {
@@ -1976,6 +1977,15 @@ skip_annotation:
1976 &actions[nr_options], 1977 &actions[nr_options],
1977 &options[nr_options], 1978 &options[nr_options],
1978 thread, NULL); 1979 thread, NULL);
1980 /*
1981 * Note that browser->selection != NULL
1982 * when browser->he_selection is not NULL,
1983 * so we don't need to check browser->selection
1984 * before fetching browser->selection->sym like what
1985 * we do before fetching browser->selection->map.
1986 *
1987 * See hist_browser__show_entry.
1988 */
1979 nr_options += add_script_opt(browser, 1989 nr_options += add_script_opt(browser,
1980 &actions[nr_options], 1990 &actions[nr_options],
1981 &options[nr_options], 1991 &options[nr_options],
diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c
index d51a5200c8af..c8fc8a258f42 100644
--- a/tools/perf/util/evlist.c
+++ b/tools/perf/util/evlist.c
@@ -124,6 +124,33 @@ void perf_evlist__delete(struct perf_evlist *evlist)
124 free(evlist); 124 free(evlist);
125} 125}
126 126
127static void __perf_evlist__propagate_maps(struct perf_evlist *evlist,
128 struct perf_evsel *evsel)
129{
130 /*
131 * We already have cpus for evsel (via PMU sysfs) so
132 * keep it, if there's no target cpu list defined.
133 */
134 if (!evsel->own_cpus || evlist->has_user_cpus) {
135 cpu_map__put(evsel->cpus);
136 evsel->cpus = cpu_map__get(evlist->cpus);
137 } else if (evsel->cpus != evsel->own_cpus) {
138 cpu_map__put(evsel->cpus);
139 evsel->cpus = cpu_map__get(evsel->own_cpus);
140 }
141
142 thread_map__put(evsel->threads);
143 evsel->threads = thread_map__get(evlist->threads);
144}
145
146static void perf_evlist__propagate_maps(struct perf_evlist *evlist)
147{
148 struct perf_evsel *evsel;
149
150 evlist__for_each(evlist, evsel)
151 __perf_evlist__propagate_maps(evlist, evsel);
152}
153
127void perf_evlist__add(struct perf_evlist *evlist, struct perf_evsel *entry) 154void perf_evlist__add(struct perf_evlist *evlist, struct perf_evsel *entry)
128{ 155{
129 entry->evlist = evlist; 156 entry->evlist = evlist;
@@ -133,18 +160,19 @@ void perf_evlist__add(struct perf_evlist *evlist, struct perf_evsel *entry)
133 160
134 if (!evlist->nr_entries++) 161 if (!evlist->nr_entries++)
135 perf_evlist__set_id_pos(evlist); 162 perf_evlist__set_id_pos(evlist);
163
164 __perf_evlist__propagate_maps(evlist, entry);
136} 165}
137 166
138void perf_evlist__splice_list_tail(struct perf_evlist *evlist, 167void perf_evlist__splice_list_tail(struct perf_evlist *evlist,
139 struct list_head *list, 168 struct list_head *list)
140 int nr_entries)
141{ 169{
142 bool set_id_pos = !evlist->nr_entries; 170 struct perf_evsel *evsel, *temp;
143 171
144 list_splice_tail(list, &evlist->entries); 172 __evlist__for_each_safe(list, temp, evsel) {
145 evlist->nr_entries += nr_entries; 173 list_del_init(&evsel->node);
146 if (set_id_pos) 174 perf_evlist__add(evlist, evsel);
147 perf_evlist__set_id_pos(evlist); 175 }
148} 176}
149 177
150void __perf_evlist__set_leader(struct list_head *list) 178void __perf_evlist__set_leader(struct list_head *list)
@@ -210,7 +238,7 @@ static int perf_evlist__add_attrs(struct perf_evlist *evlist,
210 list_add_tail(&evsel->node, &head); 238 list_add_tail(&evsel->node, &head);
211 } 239 }
212 240
213 perf_evlist__splice_list_tail(evlist, &head, nr_attrs); 241 perf_evlist__splice_list_tail(evlist, &head);
214 242
215 return 0; 243 return 0;
216 244
@@ -1103,71 +1131,56 @@ int perf_evlist__mmap(struct perf_evlist *evlist, unsigned int pages,
1103 return perf_evlist__mmap_ex(evlist, pages, overwrite, 0, false); 1131 return perf_evlist__mmap_ex(evlist, pages, overwrite, 0, false);
1104} 1132}
1105 1133
1106static int perf_evlist__propagate_maps(struct perf_evlist *evlist,
1107 bool has_user_cpus)
1108{
1109 struct perf_evsel *evsel;
1110
1111 evlist__for_each(evlist, evsel) {
1112 /*
1113 * We already have cpus for evsel (via PMU sysfs) so
1114 * keep it, if there's no target cpu list defined.
1115 */
1116 if (evsel->cpus && has_user_cpus)
1117 cpu_map__put(evsel->cpus);
1118
1119 if (!evsel->cpus || has_user_cpus)
1120 evsel->cpus = cpu_map__get(evlist->cpus);
1121
1122 evsel->threads = thread_map__get(evlist->threads);
1123
1124 if ((evlist->cpus && !evsel->cpus) ||
1125 (evlist->threads && !evsel->threads))
1126 return -ENOMEM;
1127 }
1128
1129 return 0;
1130}
1131
1132int perf_evlist__create_maps(struct perf_evlist *evlist, struct target *target) 1134int perf_evlist__create_maps(struct perf_evlist *evlist, struct target *target)
1133{ 1135{
1134 evlist->threads = thread_map__new_str(target->pid, target->tid, 1136 struct cpu_map *cpus;
1135 target->uid); 1137 struct thread_map *threads;
1138
1139 threads = thread_map__new_str(target->pid, target->tid, target->uid);
1136 1140
1137 if (evlist->threads == NULL) 1141 if (!threads)
1138 return -1; 1142 return -1;
1139 1143
1140 if (target__uses_dummy_map(target)) 1144 if (target__uses_dummy_map(target))
1141 evlist->cpus = cpu_map__dummy_new(); 1145 cpus = cpu_map__dummy_new();
1142 else 1146 else
1143 evlist->cpus = cpu_map__new(target->cpu_list); 1147 cpus = cpu_map__new(target->cpu_list);
1144 1148
1145 if (evlist->cpus == NULL) 1149 if (!cpus)
1146 goto out_delete_threads; 1150 goto out_delete_threads;
1147 1151
1148 return perf_evlist__propagate_maps(evlist, !!target->cpu_list); 1152 evlist->has_user_cpus = !!target->cpu_list;
1153
1154 perf_evlist__set_maps(evlist, cpus, threads);
1155
1156 return 0;
1149 1157
1150out_delete_threads: 1158out_delete_threads:
1151 thread_map__put(evlist->threads); 1159 thread_map__put(threads);
1152 evlist->threads = NULL;
1153 return -1; 1160 return -1;
1154} 1161}
1155 1162
1156int perf_evlist__set_maps(struct perf_evlist *evlist, 1163void perf_evlist__set_maps(struct perf_evlist *evlist, struct cpu_map *cpus,
1157 struct cpu_map *cpus, 1164 struct thread_map *threads)
1158 struct thread_map *threads)
1159{ 1165{
1160 if (evlist->cpus) 1166 /*
1167 * Allow for the possibility that one or another of the maps isn't being
1168 * changed i.e. don't put it. Note we are assuming the maps that are
1169 * being applied are brand new and evlist is taking ownership of the
1170 * original reference count of 1. If that is not the case it is up to
1171 * the caller to increase the reference count.
1172 */
1173 if (cpus != evlist->cpus) {
1161 cpu_map__put(evlist->cpus); 1174 cpu_map__put(evlist->cpus);
1175 evlist->cpus = cpus;
1176 }
1162 1177
1163 evlist->cpus = cpus; 1178 if (threads != evlist->threads) {
1164
1165 if (evlist->threads)
1166 thread_map__put(evlist->threads); 1179 thread_map__put(evlist->threads);
1180 evlist->threads = threads;
1181 }
1167 1182
1168 evlist->threads = threads; 1183 perf_evlist__propagate_maps(evlist);
1169
1170 return perf_evlist__propagate_maps(evlist, false);
1171} 1184}
1172 1185
1173int perf_evlist__apply_filters(struct perf_evlist *evlist, struct perf_evsel **err_evsel) 1186int perf_evlist__apply_filters(struct perf_evlist *evlist, struct perf_evsel **err_evsel)
@@ -1387,6 +1400,8 @@ void perf_evlist__close(struct perf_evlist *evlist)
1387 1400
1388static int perf_evlist__create_syswide_maps(struct perf_evlist *evlist) 1401static int perf_evlist__create_syswide_maps(struct perf_evlist *evlist)
1389{ 1402{
1403 struct cpu_map *cpus;
1404 struct thread_map *threads;
1390 int err = -ENOMEM; 1405 int err = -ENOMEM;
1391 1406
1392 /* 1407 /*
@@ -1398,20 +1413,19 @@ static int perf_evlist__create_syswide_maps(struct perf_evlist *evlist)
1398 * error, and we may not want to do that fallback to a 1413 * error, and we may not want to do that fallback to a
1399 * default cpu identity map :-\ 1414 * default cpu identity map :-\
1400 */ 1415 */
1401 evlist->cpus = cpu_map__new(NULL); 1416 cpus = cpu_map__new(NULL);
1402 if (evlist->cpus == NULL) 1417 if (!cpus)
1403 goto out; 1418 goto out;
1404 1419
1405 evlist->threads = thread_map__new_dummy(); 1420 threads = thread_map__new_dummy();
1406 if (evlist->threads == NULL) 1421 if (!threads)
1407 goto out_free_cpus; 1422 goto out_put;
1408 1423
1409 err = 0; 1424 perf_evlist__set_maps(evlist, cpus, threads);
1410out: 1425out:
1411 return err; 1426 return err;
1412out_free_cpus: 1427out_put:
1413 cpu_map__put(evlist->cpus); 1428 cpu_map__put(cpus);
1414 evlist->cpus = NULL;
1415 goto out; 1429 goto out;
1416} 1430}
1417 1431
diff --git a/tools/perf/util/evlist.h b/tools/perf/util/evlist.h
index b39a6198f4ac..115d8b53c601 100644
--- a/tools/perf/util/evlist.h
+++ b/tools/perf/util/evlist.h
@@ -42,6 +42,7 @@ struct perf_evlist {
42 int nr_mmaps; 42 int nr_mmaps;
43 bool overwrite; 43 bool overwrite;
44 bool enabled; 44 bool enabled;
45 bool has_user_cpus;
45 size_t mmap_len; 46 size_t mmap_len;
46 int id_pos; 47 int id_pos;
47 int is_pos; 48 int is_pos;
@@ -155,9 +156,8 @@ int perf_evlist__enable_event_idx(struct perf_evlist *evlist,
155void perf_evlist__set_selected(struct perf_evlist *evlist, 156void perf_evlist__set_selected(struct perf_evlist *evlist,
156 struct perf_evsel *evsel); 157 struct perf_evsel *evsel);
157 158
158int perf_evlist__set_maps(struct perf_evlist *evlist, 159void perf_evlist__set_maps(struct perf_evlist *evlist, struct cpu_map *cpus,
159 struct cpu_map *cpus, 160 struct thread_map *threads);
160 struct thread_map *threads);
161int perf_evlist__create_maps(struct perf_evlist *evlist, struct target *target); 161int perf_evlist__create_maps(struct perf_evlist *evlist, struct target *target);
162int perf_evlist__apply_filters(struct perf_evlist *evlist, struct perf_evsel **err_evsel); 162int perf_evlist__apply_filters(struct perf_evlist *evlist, struct perf_evsel **err_evsel);
163 163
@@ -179,8 +179,7 @@ bool perf_evlist__valid_sample_id_all(struct perf_evlist *evlist);
179bool perf_evlist__valid_read_format(struct perf_evlist *evlist); 179bool perf_evlist__valid_read_format(struct perf_evlist *evlist);
180 180
181void perf_evlist__splice_list_tail(struct perf_evlist *evlist, 181void perf_evlist__splice_list_tail(struct perf_evlist *evlist,
182 struct list_head *list, 182 struct list_head *list);
183 int nr_entries);
184 183
185static inline struct perf_evsel *perf_evlist__first(struct perf_evlist *evlist) 184static inline struct perf_evsel *perf_evlist__first(struct perf_evlist *evlist)
186{ 185{
diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c
index c53f79123b37..5410483d5219 100644
--- a/tools/perf/util/evsel.c
+++ b/tools/perf/util/evsel.c
@@ -1033,6 +1033,7 @@ void perf_evsel__exit(struct perf_evsel *evsel)
1033 perf_evsel__free_config_terms(evsel); 1033 perf_evsel__free_config_terms(evsel);
1034 close_cgroup(evsel->cgrp); 1034 close_cgroup(evsel->cgrp);
1035 cpu_map__put(evsel->cpus); 1035 cpu_map__put(evsel->cpus);
1036 cpu_map__put(evsel->own_cpus);
1036 thread_map__put(evsel->threads); 1037 thread_map__put(evsel->threads);
1037 zfree(&evsel->group_name); 1038 zfree(&evsel->group_name);
1038 zfree(&evsel->name); 1039 zfree(&evsel->name);
diff --git a/tools/perf/util/evsel.h b/tools/perf/util/evsel.h
index 298e6bbca200..ef8925f7211a 100644
--- a/tools/perf/util/evsel.h
+++ b/tools/perf/util/evsel.h
@@ -98,6 +98,7 @@ struct perf_evsel {
98 struct cgroup_sel *cgrp; 98 struct cgroup_sel *cgrp;
99 void *handler; 99 void *handler;
100 struct cpu_map *cpus; 100 struct cpu_map *cpus;
101 struct cpu_map *own_cpus;
101 struct thread_map *threads; 102 struct thread_map *threads;
102 unsigned int sample_size; 103 unsigned int sample_size;
103 int id_pos; 104 int id_pos;
diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c
index 41814547da15..fce6634aebe2 100644
--- a/tools/perf/util/header.c
+++ b/tools/perf/util/header.c
@@ -1438,7 +1438,7 @@ static int process_nrcpus(struct perf_file_section *section __maybe_unused,
1438 if (ph->needs_swap) 1438 if (ph->needs_swap)
1439 nr = bswap_32(nr); 1439 nr = bswap_32(nr);
1440 1440
1441 ph->env.nr_cpus_online = nr; 1441 ph->env.nr_cpus_avail = nr;
1442 1442
1443 ret = readn(fd, &nr, sizeof(nr)); 1443 ret = readn(fd, &nr, sizeof(nr));
1444 if (ret != sizeof(nr)) 1444 if (ret != sizeof(nr))
@@ -1447,7 +1447,7 @@ static int process_nrcpus(struct perf_file_section *section __maybe_unused,
1447 if (ph->needs_swap) 1447 if (ph->needs_swap)
1448 nr = bswap_32(nr); 1448 nr = bswap_32(nr);
1449 1449
1450 ph->env.nr_cpus_avail = nr; 1450 ph->env.nr_cpus_online = nr;
1451 return 0; 1451 return 0;
1452} 1452}
1453 1453
diff --git a/tools/perf/util/intel-bts.c b/tools/perf/util/intel-bts.c
index ea768625ab5b..eb0e7f8bf515 100644
--- a/tools/perf/util/intel-bts.c
+++ b/tools/perf/util/intel-bts.c
@@ -623,7 +623,7 @@ static int intel_bts_process_event(struct perf_session *session,
623 if (err) 623 if (err)
624 return err; 624 return err;
625 if (event->header.type == PERF_RECORD_EXIT) { 625 if (event->header.type == PERF_RECORD_EXIT) {
626 err = intel_bts_process_tid_exit(bts, event->comm.tid); 626 err = intel_bts_process_tid_exit(bts, event->fork.tid);
627 if (err) 627 if (err)
628 return err; 628 return err;
629 } 629 }
diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
index bb41c20e6005..535d86f8e4d1 100644
--- a/tools/perf/util/intel-pt.c
+++ b/tools/perf/util/intel-pt.c
@@ -1494,7 +1494,7 @@ static int intel_pt_process_event(struct perf_session *session,
1494 if (pt->timeless_decoding) { 1494 if (pt->timeless_decoding) {
1495 if (event->header.type == PERF_RECORD_EXIT) { 1495 if (event->header.type == PERF_RECORD_EXIT) {
1496 err = intel_pt_process_timeless_queues(pt, 1496 err = intel_pt_process_timeless_queues(pt,
1497 event->comm.tid, 1497 event->fork.tid,
1498 sample->time); 1498 sample->time);
1499 } 1499 }
1500 } else if (timestamp) { 1500 } else if (timestamp) {
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
index d826e6f515db..21ed6ee63da9 100644
--- a/tools/perf/util/parse-events.c
+++ b/tools/perf/util/parse-events.c
@@ -287,8 +287,8 @@ __add_event(struct list_head *list, int *idx,
287 if (!evsel) 287 if (!evsel)
288 return NULL; 288 return NULL;
289 289
290 if (cpus) 290 evsel->cpus = cpu_map__get(cpus);
291 evsel->cpus = cpu_map__get(cpus); 291 evsel->own_cpus = cpu_map__get(cpus);
292 292
293 if (name) 293 if (name)
294 evsel->name = strdup(name); 294 evsel->name = strdup(name);
@@ -1140,10 +1140,9 @@ int parse_events(struct perf_evlist *evlist, const char *str,
1140 ret = parse_events__scanner(str, &data, PE_START_EVENTS); 1140 ret = parse_events__scanner(str, &data, PE_START_EVENTS);
1141 perf_pmu__parse_cleanup(); 1141 perf_pmu__parse_cleanup();
1142 if (!ret) { 1142 if (!ret) {
1143 int entries = data.idx - evlist->nr_entries;
1144 struct perf_evsel *last; 1143 struct perf_evsel *last;
1145 1144
1146 perf_evlist__splice_list_tail(evlist, &data.list, entries); 1145 perf_evlist__splice_list_tail(evlist, &data.list);
1147 evlist->nr_groups += data.nr_groups; 1146 evlist->nr_groups += data.nr_groups;
1148 last = perf_evlist__last(evlist); 1147 last = perf_evlist__last(evlist);
1149 last->cmdline_group_boundary = true; 1148 last->cmdline_group_boundary = true;
diff --git a/tools/perf/util/parse-events.y b/tools/perf/util/parse-events.y
index 591905a02b92..9cd70819c795 100644
--- a/tools/perf/util/parse-events.y
+++ b/tools/perf/util/parse-events.y
@@ -255,7 +255,7 @@ PE_PMU_EVENT_PRE '-' PE_PMU_EVENT_SUF sep_dc
255 list_add_tail(&term->list, head); 255 list_add_tail(&term->list, head);
256 256
257 ALLOC_LIST(list); 257 ALLOC_LIST(list);
258 ABORT_ON(parse_events_add_pmu(list, &data->idx, "cpu", head)); 258 ABORT_ON(parse_events_add_pmu(data, list, "cpu", head));
259 parse_events__free_terms(head); 259 parse_events__free_terms(head);
260 $$ = list; 260 $$ = list;
261} 261}
diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c
index eb5f18b75402..c6f9af78f6f5 100644
--- a/tools/perf/util/probe-event.c
+++ b/tools/perf/util/probe-event.c
@@ -270,12 +270,13 @@ static int kernel_get_module_dso(const char *module, struct dso **pdso)
270 int ret = 0; 270 int ret = 0;
271 271
272 if (module) { 272 if (module) {
273 list_for_each_entry(dso, &host_machine->dsos.head, node) { 273 char module_name[128];
274 if (!dso->kernel) 274
275 continue; 275 snprintf(module_name, sizeof(module_name), "[%s]", module);
276 if (strncmp(dso->short_name + 1, module, 276 map = map_groups__find_by_name(&host_machine->kmaps, MAP__FUNCTION, module_name);
277 dso->short_name_len - 2) == 0) 277 if (map) {
278 goto found; 278 dso = map->dso;
279 goto found;
279 } 280 }
280 pr_debug("Failed to find module %s.\n", module); 281 pr_debug("Failed to find module %s.\n", module);
281 return -ENOENT; 282 return -ENOENT;
diff --git a/tools/perf/util/session.c b/tools/perf/util/session.c
index 8a4537ee9bc3..fc3f7c922f99 100644
--- a/tools/perf/util/session.c
+++ b/tools/perf/util/session.c
@@ -1580,7 +1580,10 @@ static int __perf_session__process_events(struct perf_session *session,
1580 file_offset = page_offset; 1580 file_offset = page_offset;
1581 head = data_offset - page_offset; 1581 head = data_offset - page_offset;
1582 1582
1583 if (data_size && (data_offset + data_size < file_size)) 1583 if (data_size == 0)
1584 goto out;
1585
1586 if (data_offset + data_size < file_size)
1584 file_size = data_offset + data_size; 1587 file_size = data_offset + data_size;
1585 1588
1586 ui_progress__init(&prog, file_size, "Processing events..."); 1589 ui_progress__init(&prog, file_size, "Processing events...");
diff --git a/tools/perf/util/stat.c b/tools/perf/util/stat.c
index 415c359de465..2d065d065b67 100644
--- a/tools/perf/util/stat.c
+++ b/tools/perf/util/stat.c
@@ -196,7 +196,8 @@ static void zero_per_pkg(struct perf_evsel *counter)
196 memset(counter->per_pkg_mask, 0, MAX_NR_CPUS); 196 memset(counter->per_pkg_mask, 0, MAX_NR_CPUS);
197} 197}
198 198
199static int check_per_pkg(struct perf_evsel *counter, int cpu, bool *skip) 199static int check_per_pkg(struct perf_evsel *counter,
200 struct perf_counts_values *vals, int cpu, bool *skip)
200{ 201{
201 unsigned long *mask = counter->per_pkg_mask; 202 unsigned long *mask = counter->per_pkg_mask;
202 struct cpu_map *cpus = perf_evsel__cpus(counter); 203 struct cpu_map *cpus = perf_evsel__cpus(counter);
@@ -218,6 +219,17 @@ static int check_per_pkg(struct perf_evsel *counter, int cpu, bool *skip)
218 counter->per_pkg_mask = mask; 219 counter->per_pkg_mask = mask;
219 } 220 }
220 221
222 /*
223 * we do not consider an event that has not run as a good
224 * instance to mark a package as used (skip=1). Otherwise
225 * we may run into a situation where the first CPU in a package
226 * is not running anything, yet the second is, and this function
227 * would mark the package as used after the first CPU and would
228 * not read the values from the second CPU.
229 */
230 if (!(vals->run && vals->ena))
231 return 0;
232
221 s = cpu_map__get_socket(cpus, cpu); 233 s = cpu_map__get_socket(cpus, cpu);
222 if (s < 0) 234 if (s < 0)
223 return -1; 235 return -1;
@@ -235,7 +247,7 @@ process_counter_values(struct perf_stat_config *config, struct perf_evsel *evsel
235 static struct perf_counts_values zero; 247 static struct perf_counts_values zero;
236 bool skip = false; 248 bool skip = false;
237 249
238 if (check_per_pkg(evsel, cpu, &skip)) { 250 if (check_per_pkg(evsel, count, cpu, &skip)) {
239 pr_err("failed to read per-pkg counter\n"); 251 pr_err("failed to read per-pkg counter\n");
240 return -1; 252 return -1;
241 } 253 }
diff --git a/tools/perf/util/symbol-elf.c b/tools/perf/util/symbol-elf.c
index 53bb5f59ec58..475d88d0a1c9 100644
--- a/tools/perf/util/symbol-elf.c
+++ b/tools/perf/util/symbol-elf.c
@@ -38,7 +38,7 @@ static inline char *bfd_demangle(void __maybe_unused *v,
38#endif 38#endif
39 39
40#ifndef HAVE_ELF_GETPHDRNUM_SUPPORT 40#ifndef HAVE_ELF_GETPHDRNUM_SUPPORT
41int elf_getphdrnum(Elf *elf, size_t *dst) 41static int elf_getphdrnum(Elf *elf, size_t *dst)
42{ 42{
43 GElf_Ehdr gehdr; 43 GElf_Ehdr gehdr;
44 GElf_Ehdr *ehdr; 44 GElf_Ehdr *ehdr;
@@ -1271,8 +1271,6 @@ out_close:
1271static int kcore__init(struct kcore *kcore, char *filename, int elfclass, 1271static int kcore__init(struct kcore *kcore, char *filename, int elfclass,
1272 bool temp) 1272 bool temp)
1273{ 1273{
1274 GElf_Ehdr *ehdr;
1275
1276 kcore->elfclass = elfclass; 1274 kcore->elfclass = elfclass;
1277 1275
1278 if (temp) 1276 if (temp)
@@ -1289,9 +1287,7 @@ static int kcore__init(struct kcore *kcore, char *filename, int elfclass,
1289 if (!gelf_newehdr(kcore->elf, elfclass)) 1287 if (!gelf_newehdr(kcore->elf, elfclass))
1290 goto out_end; 1288 goto out_end;
1291 1289
1292 ehdr = gelf_getehdr(kcore->elf, &kcore->ehdr); 1290 memset(&kcore->ehdr, 0, sizeof(GElf_Ehdr));
1293 if (!ehdr)
1294 goto out_end;
1295 1291
1296 return 0; 1292 return 0;
1297 1293
@@ -1348,23 +1344,18 @@ static int kcore__copy_hdr(struct kcore *from, struct kcore *to, size_t count)
1348static int kcore__add_phdr(struct kcore *kcore, int idx, off_t offset, 1344static int kcore__add_phdr(struct kcore *kcore, int idx, off_t offset,
1349 u64 addr, u64 len) 1345 u64 addr, u64 len)
1350{ 1346{
1351 GElf_Phdr gphdr; 1347 GElf_Phdr phdr = {
1352 GElf_Phdr *phdr; 1348 .p_type = PT_LOAD,
1353 1349 .p_flags = PF_R | PF_W | PF_X,
1354 phdr = gelf_getphdr(kcore->elf, idx, &gphdr); 1350 .p_offset = offset,
1355 if (!phdr) 1351 .p_vaddr = addr,
1356 return -1; 1352 .p_paddr = 0,
1357 1353 .p_filesz = len,
1358 phdr->p_type = PT_LOAD; 1354 .p_memsz = len,
1359 phdr->p_flags = PF_R | PF_W | PF_X; 1355 .p_align = page_size,
1360 phdr->p_offset = offset; 1356 };
1361 phdr->p_vaddr = addr; 1357
1362 phdr->p_paddr = 0; 1358 if (!gelf_update_phdr(kcore->elf, idx, &phdr))
1363 phdr->p_filesz = len;
1364 phdr->p_memsz = len;
1365 phdr->p_align = page_size;
1366
1367 if (!gelf_update_phdr(kcore->elf, idx, phdr))
1368 return -1; 1359 return -1;
1369 1360
1370 return 0; 1361 return 0;
diff --git a/tools/perf/util/util.c b/tools/perf/util/util.c
index 7acafb3c5592..c2cd9bf2348b 100644
--- a/tools/perf/util/util.c
+++ b/tools/perf/util/util.c
@@ -709,7 +709,7 @@ bool find_process(const char *name)
709 709
710 dir = opendir(procfs__mountpoint()); 710 dir = opendir(procfs__mountpoint());
711 if (!dir) 711 if (!dir)
712 return -1; 712 return false;
713 713
714 /* Walk through the directory. */ 714 /* Walk through the directory. */
715 while (ret && (d = readdir(dir)) != NULL) { 715 while (ret && (d = readdir(dir)) != NULL) {
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 9655cb49c7cb..bde0ef1a63df 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -71,8 +71,11 @@ unsigned int extra_msr_offset32;
71unsigned int extra_msr_offset64; 71unsigned int extra_msr_offset64;
72unsigned int extra_delta_offset32; 72unsigned int extra_delta_offset32;
73unsigned int extra_delta_offset64; 73unsigned int extra_delta_offset64;
74unsigned int aperf_mperf_multiplier = 1;
74int do_smi; 75int do_smi;
75double bclk; 76double bclk;
77double base_hz;
78double tsc_tweak = 1.0;
76unsigned int show_pkg; 79unsigned int show_pkg;
77unsigned int show_core; 80unsigned int show_core;
78unsigned int show_cpu; 81unsigned int show_cpu;
@@ -502,7 +505,7 @@ int format_counters(struct thread_data *t, struct core_data *c,
502 /* %Busy */ 505 /* %Busy */
503 if (has_aperf) { 506 if (has_aperf) {
504 if (!skip_c0) 507 if (!skip_c0)
505 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc); 508 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
506 else 509 else
507 outp += sprintf(outp, "********"); 510 outp += sprintf(outp, "********");
508 } 511 }
@@ -510,7 +513,7 @@ int format_counters(struct thread_data *t, struct core_data *c,
510 /* Bzy_MHz */ 513 /* Bzy_MHz */
511 if (has_aperf) 514 if (has_aperf)
512 outp += sprintf(outp, "%8.0f", 515 outp += sprintf(outp, "%8.0f",
513 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float); 516 1.0 * t->tsc * tsc_tweak / units * t->aperf / t->mperf / interval_float);
514 517
515 /* TSC_MHz */ 518 /* TSC_MHz */
516 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float); 519 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
@@ -984,6 +987,8 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
984 return -3; 987 return -3;
985 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf)) 988 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
986 return -4; 989 return -4;
990 t->aperf = t->aperf * aperf_mperf_multiplier;
991 t->mperf = t->mperf * aperf_mperf_multiplier;
987 } 992 }
988 993
989 if (do_smi) { 994 if (do_smi) {
@@ -1149,6 +1154,19 @@ int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV,
1149int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; 1154int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1150int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; 1155int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1151 1156
1157
1158static void
1159calculate_tsc_tweak()
1160{
1161 unsigned long long msr;
1162 unsigned int base_ratio;
1163
1164 get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr);
1165 base_ratio = (msr >> 8) & 0xFF;
1166 base_hz = base_ratio * bclk * 1000000;
1167 tsc_tweak = base_hz / tsc_hz;
1168}
1169
1152static void 1170static void
1153dump_nhm_platform_info(void) 1171dump_nhm_platform_info(void)
1154{ 1172{
@@ -1926,8 +1944,6 @@ int has_config_tdp(unsigned int family, unsigned int model)
1926 1944
1927 switch (model) { 1945 switch (model) {
1928 case 0x3A: /* IVB */ 1946 case 0x3A: /* IVB */
1929 case 0x3E: /* IVB Xeon */
1930
1931 case 0x3C: /* HSW */ 1947 case 0x3C: /* HSW */
1932 case 0x3F: /* HSX */ 1948 case 0x3F: /* HSX */
1933 case 0x45: /* HSW */ 1949 case 0x45: /* HSW */
@@ -2543,6 +2559,13 @@ int is_knl(unsigned int family, unsigned int model)
2543 return 0; 2559 return 0;
2544} 2560}
2545 2561
2562unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
2563{
2564 if (is_knl(family, model))
2565 return 1024;
2566 return 1;
2567}
2568
2546#define SLM_BCLK_FREQS 5 2569#define SLM_BCLK_FREQS 5
2547double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0}; 2570double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2548 2571
@@ -2744,6 +2767,9 @@ void process_cpuid()
2744 } 2767 }
2745 } 2768 }
2746 2769
2770 if (has_aperf)
2771 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
2772
2747 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model); 2773 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
2748 do_snb_cstates = has_snb_msrs(family, model); 2774 do_snb_cstates = has_snb_msrs(family, model);
2749 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2); 2775 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
@@ -2762,6 +2788,9 @@ void process_cpuid()
2762 if (debug) 2788 if (debug)
2763 dump_cstate_pstate_config_info(); 2789 dump_cstate_pstate_config_info();
2764 2790
2791 if (has_skl_msrs(family, model))
2792 calculate_tsc_tweak();
2793
2765 return; 2794 return;
2766} 2795}
2767 2796
@@ -3090,7 +3119,7 @@ int get_and_dump_counters(void)
3090} 3119}
3091 3120
3092void print_version() { 3121void print_version() {
3093 fprintf(stderr, "turbostat version 4.7 17-June, 2015" 3122 fprintf(stderr, "turbostat version 4.8 26-Sep, 2015"
3094 " - Len Brown <lenb@kernel.org>\n"); 3123 " - Len Brown <lenb@kernel.org>\n");
3095} 3124}
3096 3125
diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile
index 89b05e2222c9..cfe121353eec 100644
--- a/tools/testing/selftests/Makefile
+++ b/tools/testing/selftests/Makefile
@@ -16,12 +16,12 @@ TARGETS += powerpc
16TARGETS += ptrace 16TARGETS += ptrace
17TARGETS += seccomp 17TARGETS += seccomp
18TARGETS += size 18TARGETS += size
19TARGETS += static_keys
19TARGETS += sysctl 20TARGETS += sysctl
20ifneq (1, $(quicktest)) 21ifneq (1, $(quicktest))
21TARGETS += timers 22TARGETS += timers
22endif 23endif
23TARGETS += user 24TARGETS += user
24TARGETS += jumplabel
25TARGETS += vm 25TARGETS += vm
26TARGETS += x86 26TARGETS += x86
27TARGETS += zram 27TARGETS += zram
diff --git a/tools/testing/selftests/exec/Makefile b/tools/testing/selftests/exec/Makefile
index 6b76bfdc847e..4e400eb83657 100644
--- a/tools/testing/selftests/exec/Makefile
+++ b/tools/testing/selftests/exec/Makefile
@@ -1,6 +1,6 @@
1CFLAGS = -Wall 1CFLAGS = -Wall
2BINARIES = execveat 2BINARIES = execveat
3DEPS = execveat.symlink execveat.denatured script 3DEPS = execveat.symlink execveat.denatured script subdir
4all: $(BINARIES) $(DEPS) 4all: $(BINARIES) $(DEPS)
5 5
6subdir: 6subdir:
@@ -22,7 +22,5 @@ TEST_FILES := $(DEPS)
22 22
23include ../lib.mk 23include ../lib.mk
24 24
25override EMIT_TESTS := echo "mkdir -p subdir; (./execveat && echo \"selftests: execveat [PASS]\") || echo \"selftests: execveat [FAIL]\""
26
27clean: 25clean:
28 rm -rf $(BINARIES) $(DEPS) subdir.moved execveat.moved xxxxx* 26 rm -rf $(BINARIES) $(DEPS) subdir.moved execveat.moved xxxxx*
diff --git a/tools/testing/selftests/ftrace/Makefile b/tools/testing/selftests/ftrace/Makefile
index 0acbeca47225..4e6ed13e7f66 100644
--- a/tools/testing/selftests/ftrace/Makefile
+++ b/tools/testing/selftests/ftrace/Makefile
@@ -1,7 +1,7 @@
1all: 1all:
2 2
3TEST_PROGS := ftracetest 3TEST_PROGS := ftracetest
4TEST_DIRS := test.d/ 4TEST_DIRS := test.d
5 5
6include ../lib.mk 6include ../lib.mk
7 7
diff --git a/tools/testing/selftests/lib.mk b/tools/testing/selftests/lib.mk
index 97f1c6742066..50a93f5f13d6 100644
--- a/tools/testing/selftests/lib.mk
+++ b/tools/testing/selftests/lib.mk
@@ -12,13 +12,10 @@ run_tests: all
12 $(RUN_TESTS) 12 $(RUN_TESTS)
13 13
14define INSTALL_RULE 14define INSTALL_RULE
15 @if [ "X$(TEST_PROGS)$(TEST_PROGS_EXTENDED)$(TEST_FILES)" != "X" ]; then \ 15 @if [ "X$(TEST_PROGS)$(TEST_PROGS_EXTENDED)$(TEST_FILES)" != "X" ]; then \
16 mkdir -p $(INSTALL_PATH); \ 16 mkdir -p ${INSTALL_PATH}; \
17 for TEST_DIR in $(TEST_DIRS); do \ 17 echo "rsync -a $(TEST_DIRS) $(TEST_PROGS) $(TEST_PROGS_EXTENDED) $(TEST_FILES) $(INSTALL_PATH)/"; \
18 cp -r $$TEST_DIR $(INSTALL_PATH); \ 18 rsync -a $(TEST_DIRS) $(TEST_PROGS) $(TEST_PROGS_EXTENDED) $(TEST_FILES) $(INSTALL_PATH)/; \
19 done; \
20 echo "install -t $(INSTALL_PATH) $(TEST_PROGS) $(TEST_PROGS_EXTENDED) $(TEST_FILES)"; \
21 install -t $(INSTALL_PATH) $(TEST_PROGS) $(TEST_PROGS_EXTENDED) $(TEST_FILES); \
22 fi 19 fi
23endef 20endef
24 21
diff --git a/tools/testing/selftests/membarrier/Makefile b/tools/testing/selftests/membarrier/Makefile
index 877a50355d7f..a1a97085847d 100644
--- a/tools/testing/selftests/membarrier/Makefile
+++ b/tools/testing/selftests/membarrier/Makefile
@@ -1,11 +1,10 @@
1CFLAGS += -g -I../../../../usr/include/ 1CFLAGS += -g -I../../../../usr/include/
2 2
3all:
4 $(CC) $(CFLAGS) membarrier_test.c -o membarrier_test
5
6TEST_PROGS := membarrier_test 3TEST_PROGS := membarrier_test
7 4
5all: $(TEST_PROGS)
6
8include ../lib.mk 7include ../lib.mk
9 8
10clean: 9clean:
11 $(RM) membarrier_test 10 $(RM) $(TEST_PROGS)
diff --git a/tools/testing/selftests/membarrier/membarrier_test.c b/tools/testing/selftests/membarrier/membarrier_test.c
index dde312508007..535f0fef4d0b 100644
--- a/tools/testing/selftests/membarrier/membarrier_test.c
+++ b/tools/testing/selftests/membarrier/membarrier_test.c
@@ -1,9 +1,6 @@
1#define _GNU_SOURCE 1#define _GNU_SOURCE
2#define __EXPORTED_HEADERS__
3
4#include <linux/membarrier.h> 2#include <linux/membarrier.h>
5#include <asm-generic/unistd.h> 3#include <syscall.h>
6#include <sys/syscall.h>
7#include <stdio.h> 4#include <stdio.h>
8#include <errno.h> 5#include <errno.h>
9#include <string.h> 6#include <string.h>
diff --git a/tools/testing/selftests/mqueue/Makefile b/tools/testing/selftests/mqueue/Makefile
index 0e3b41eb85cd..eebac29acbd9 100644
--- a/tools/testing/selftests/mqueue/Makefile
+++ b/tools/testing/selftests/mqueue/Makefile
@@ -1,8 +1,8 @@
1CFLAGS = -O2 1CFLAGS += -O2
2LDLIBS = -lrt -lpthread -lpopt
3TEST_PROGS := mq_open_tests mq_perf_tests
2 4
3all: 5all: $(TEST_PROGS)
4 $(CC) $(CFLAGS) mq_open_tests.c -o mq_open_tests -lrt
5 $(CC) $(CFLAGS) -o mq_perf_tests mq_perf_tests.c -lrt -lpthread -lpopt
6 6
7include ../lib.mk 7include ../lib.mk
8 8
@@ -11,8 +11,6 @@ override define RUN_TESTS
11 @./mq_perf_tests || echo "selftests: mq_perf_tests [FAIL]" 11 @./mq_perf_tests || echo "selftests: mq_perf_tests [FAIL]"
12endef 12endef
13 13
14TEST_PROGS := mq_open_tests mq_perf_tests
15
16override define EMIT_TESTS 14override define EMIT_TESTS
17 echo "./mq_open_tests /test1 || echo \"selftests: mq_open_tests [FAIL]\"" 15 echo "./mq_open_tests /test1 || echo \"selftests: mq_open_tests [FAIL]\""
18 echo "./mq_perf_tests || echo \"selftests: mq_perf_tests [FAIL]\"" 16 echo "./mq_perf_tests || echo \"selftests: mq_perf_tests [FAIL]\""
diff --git a/tools/testing/selftests/seccomp/seccomp_bpf.c b/tools/testing/selftests/seccomp/seccomp_bpf.c
index a004b4cce99e..770f47adf295 100644
--- a/tools/testing/selftests/seccomp/seccomp_bpf.c
+++ b/tools/testing/selftests/seccomp/seccomp_bpf.c
@@ -1210,6 +1210,10 @@ TEST_F(TRACE_poke, getpid_runs_normally)
1210# define ARCH_REGS struct pt_regs 1210# define ARCH_REGS struct pt_regs
1211# define SYSCALL_NUM gpr[0] 1211# define SYSCALL_NUM gpr[0]
1212# define SYSCALL_RET gpr[3] 1212# define SYSCALL_RET gpr[3]
1213#elif defined(__s390__)
1214# define ARCH_REGS s390_regs
1215# define SYSCALL_NUM gprs[2]
1216# define SYSCALL_RET gprs[2]
1213#else 1217#else
1214# error "Do not know how to find your architecture's registers and syscalls" 1218# error "Do not know how to find your architecture's registers and syscalls"
1215#endif 1219#endif
@@ -1243,7 +1247,8 @@ void change_syscall(struct __test_metadata *_metadata,
1243 ret = ptrace(PTRACE_GETREGSET, tracee, NT_PRSTATUS, &iov); 1247 ret = ptrace(PTRACE_GETREGSET, tracee, NT_PRSTATUS, &iov);
1244 EXPECT_EQ(0, ret); 1248 EXPECT_EQ(0, ret);
1245 1249
1246#if defined(__x86_64__) || defined(__i386__) || defined(__aarch64__) || defined(__powerpc__) 1250#if defined(__x86_64__) || defined(__i386__) || defined(__aarch64__) || \
1251 defined(__powerpc__) || defined(__s390__)
1247 { 1252 {
1248 regs.SYSCALL_NUM = syscall; 1253 regs.SYSCALL_NUM = syscall;
1249 } 1254 }
@@ -1281,17 +1286,21 @@ void tracer_syscall(struct __test_metadata *_metadata, pid_t tracee,
1281 ret = ptrace(PTRACE_GETEVENTMSG, tracee, NULL, &msg); 1286 ret = ptrace(PTRACE_GETEVENTMSG, tracee, NULL, &msg);
1282 EXPECT_EQ(0, ret); 1287 EXPECT_EQ(0, ret);
1283 1288
1289 /* Validate and take action on expected syscalls. */
1284 switch (msg) { 1290 switch (msg) {
1285 case 0x1002: 1291 case 0x1002:
1286 /* change getpid to getppid. */ 1292 /* change getpid to getppid. */
1293 EXPECT_EQ(__NR_getpid, get_syscall(_metadata, tracee));
1287 change_syscall(_metadata, tracee, __NR_getppid); 1294 change_syscall(_metadata, tracee, __NR_getppid);
1288 break; 1295 break;
1289 case 0x1003: 1296 case 0x1003:
1290 /* skip gettid. */ 1297 /* skip gettid. */
1298 EXPECT_EQ(__NR_gettid, get_syscall(_metadata, tracee));
1291 change_syscall(_metadata, tracee, -1); 1299 change_syscall(_metadata, tracee, -1);
1292 break; 1300 break;
1293 case 0x1004: 1301 case 0x1004:
1294 /* do nothing (allow getppid) */ 1302 /* do nothing (allow getppid) */
1303 EXPECT_EQ(__NR_getppid, get_syscall(_metadata, tracee));
1295 break; 1304 break;
1296 default: 1305 default:
1297 EXPECT_EQ(0, msg) { 1306 EXPECT_EQ(0, msg) {
@@ -1409,6 +1418,8 @@ TEST_F(TRACE_syscall, syscall_dropped)
1409# define __NR_seccomp 277 1418# define __NR_seccomp 277
1410# elif defined(__powerpc__) 1419# elif defined(__powerpc__)
1411# define __NR_seccomp 358 1420# define __NR_seccomp 358
1421# elif defined(__s390__)
1422# define __NR_seccomp 348
1412# else 1423# else
1413# warning "seccomp syscall number unknown for this architecture" 1424# warning "seccomp syscall number unknown for this architecture"
1414# define __NR_seccomp 0xffff 1425# define __NR_seccomp 0xffff
@@ -1453,6 +1464,9 @@ TEST(seccomp_syscall)
1453 1464
1454 /* Reject insane operation. */ 1465 /* Reject insane operation. */
1455 ret = seccomp(-1, 0, &prog); 1466 ret = seccomp(-1, 0, &prog);
1467 ASSERT_NE(ENOSYS, errno) {
1468 TH_LOG("Kernel does not support seccomp syscall!");
1469 }
1456 EXPECT_EQ(EINVAL, errno) { 1470 EXPECT_EQ(EINVAL, errno) {
1457 TH_LOG("Did not reject crazy op value!"); 1471 TH_LOG("Did not reject crazy op value!");
1458 } 1472 }
@@ -1501,6 +1515,9 @@ TEST(seccomp_syscall_mode_lock)
1501 } 1515 }
1502 1516
1503 ret = seccomp(SECCOMP_SET_MODE_FILTER, 0, &prog); 1517 ret = seccomp(SECCOMP_SET_MODE_FILTER, 0, &prog);
1518 ASSERT_NE(ENOSYS, errno) {
1519 TH_LOG("Kernel does not support seccomp syscall!");
1520 }
1504 EXPECT_EQ(0, ret) { 1521 EXPECT_EQ(0, ret) {
1505 TH_LOG("Could not install filter!"); 1522 TH_LOG("Could not install filter!");
1506 } 1523 }
@@ -1535,6 +1552,9 @@ TEST(TSYNC_first)
1535 1552
1536 ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC, 1553 ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC,
1537 &prog); 1554 &prog);
1555 ASSERT_NE(ENOSYS, errno) {
1556 TH_LOG("Kernel does not support seccomp syscall!");
1557 }
1538 EXPECT_EQ(0, ret) { 1558 EXPECT_EQ(0, ret) {
1539 TH_LOG("Could not install initial filter with TSYNC!"); 1559 TH_LOG("Could not install initial filter with TSYNC!");
1540 } 1560 }
@@ -1694,6 +1714,9 @@ TEST_F(TSYNC, siblings_fail_prctl)
1694 1714
1695 /* Check prctl failure detection by requesting sib 0 diverge. */ 1715 /* Check prctl failure detection by requesting sib 0 diverge. */
1696 ret = seccomp(SECCOMP_SET_MODE_FILTER, 0, &prog); 1716 ret = seccomp(SECCOMP_SET_MODE_FILTER, 0, &prog);
1717 ASSERT_NE(ENOSYS, errno) {
1718 TH_LOG("Kernel does not support seccomp syscall!");
1719 }
1697 ASSERT_EQ(0, ret) { 1720 ASSERT_EQ(0, ret) {
1698 TH_LOG("setting filter failed"); 1721 TH_LOG("setting filter failed");
1699 } 1722 }
@@ -1731,6 +1754,9 @@ TEST_F(TSYNC, two_siblings_with_ancestor)
1731 } 1754 }
1732 1755
1733 ret = seccomp(SECCOMP_SET_MODE_FILTER, 0, &self->root_prog); 1756 ret = seccomp(SECCOMP_SET_MODE_FILTER, 0, &self->root_prog);
1757 ASSERT_NE(ENOSYS, errno) {
1758 TH_LOG("Kernel does not support seccomp syscall!");
1759 }
1734 ASSERT_EQ(0, ret) { 1760 ASSERT_EQ(0, ret) {
1735 TH_LOG("Kernel does not support SECCOMP_SET_MODE_FILTER!"); 1761 TH_LOG("Kernel does not support SECCOMP_SET_MODE_FILTER!");
1736 } 1762 }
@@ -1805,6 +1831,9 @@ TEST_F(TSYNC, two_siblings_with_no_filter)
1805 1831
1806 ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC, 1832 ret = seccomp(SECCOMP_SET_MODE_FILTER, SECCOMP_FLAG_FILTER_TSYNC,
1807 &self->apply_prog); 1833 &self->apply_prog);
1834 ASSERT_NE(ENOSYS, errno) {
1835 TH_LOG("Kernel does not support seccomp syscall!");
1836 }
1808 ASSERT_EQ(0, ret) { 1837 ASSERT_EQ(0, ret) {
1809 TH_LOG("Could install filter on all threads!"); 1838 TH_LOG("Could install filter on all threads!");
1810 } 1839 }
@@ -1833,6 +1862,9 @@ TEST_F(TSYNC, two_siblings_with_one_divergence)
1833 } 1862 }
1834 1863
1835 ret = seccomp(SECCOMP_SET_MODE_FILTER, 0, &self->root_prog); 1864 ret = seccomp(SECCOMP_SET_MODE_FILTER, 0, &self->root_prog);
1865 ASSERT_NE(ENOSYS, errno) {
1866 TH_LOG("Kernel does not support seccomp syscall!");
1867 }
1836 ASSERT_EQ(0, ret) { 1868 ASSERT_EQ(0, ret) {
1837 TH_LOG("Kernel does not support SECCOMP_SET_MODE_FILTER!"); 1869 TH_LOG("Kernel does not support SECCOMP_SET_MODE_FILTER!");
1838 } 1870 }
@@ -1890,6 +1922,9 @@ TEST_F(TSYNC, two_siblings_not_under_filter)
1890 } 1922 }
1891 1923
1892 ret = seccomp(SECCOMP_SET_MODE_FILTER, 0, &self->root_prog); 1924 ret = seccomp(SECCOMP_SET_MODE_FILTER, 0, &self->root_prog);
1925 ASSERT_NE(ENOSYS, errno) {
1926 TH_LOG("Kernel does not support seccomp syscall!");
1927 }
1893 ASSERT_EQ(0, ret) { 1928 ASSERT_EQ(0, ret) {
1894 TH_LOG("Kernel does not support SECCOMP_SET_MODE_FILTER!"); 1929 TH_LOG("Kernel does not support SECCOMP_SET_MODE_FILTER!");
1895 } 1930 }
diff --git a/tools/testing/selftests/seccomp/test_harness.h b/tools/testing/selftests/seccomp/test_harness.h
index 977a6afc4489..fb2841601f2f 100644
--- a/tools/testing/selftests/seccomp/test_harness.h
+++ b/tools/testing/selftests/seccomp/test_harness.h
@@ -370,11 +370,8 @@
370 __typeof__(_expected) __exp = (_expected); \ 370 __typeof__(_expected) __exp = (_expected); \
371 __typeof__(_seen) __seen = (_seen); \ 371 __typeof__(_seen) __seen = (_seen); \
372 if (!(__exp _t __seen)) { \ 372 if (!(__exp _t __seen)) { \
373 unsigned long long __exp_print = 0; \ 373 unsigned long long __exp_print = (unsigned long long)__exp; \
374 unsigned long long __seen_print = 0; \ 374 unsigned long long __seen_print = (unsigned long long)__seen; \
375 /* Avoid casting complaints the scariest way we can. */ \
376 memcpy(&__exp_print, &__exp, sizeof(__exp)); \
377 memcpy(&__seen_print, &__seen, sizeof(__seen)); \
378 __TH_LOG("Expected %s (%llu) %s %s (%llu)", \ 375 __TH_LOG("Expected %s (%llu) %s %s (%llu)", \
379 #_expected, __exp_print, #_t, \ 376 #_expected, __exp_print, #_t, \
380 #_seen, __seen_print); \ 377 #_seen, __seen_print); \
diff --git a/tools/testing/selftests/vm/Makefile b/tools/testing/selftests/vm/Makefile
index d36fab7d8ebd..3c53cac15de1 100644
--- a/tools/testing/selftests/vm/Makefile
+++ b/tools/testing/selftests/vm/Makefile
@@ -1,6 +1,6 @@
1# Makefile for vm selftests 1# Makefile for vm selftests
2 2
3CFLAGS = -Wall 3CFLAGS = -Wall -I ../../../../usr/include $(EXTRA_CFLAGS)
4BINARIES = compaction_test 4BINARIES = compaction_test
5BINARIES += hugepage-mmap 5BINARIES += hugepage-mmap
6BINARIES += hugepage-shm 6BINARIES += hugepage-shm
@@ -12,8 +12,11 @@ BINARIES += userfaultfd
12all: $(BINARIES) 12all: $(BINARIES)
13%: %.c 13%: %.c
14 $(CC) $(CFLAGS) -o $@ $^ -lrt 14 $(CC) $(CFLAGS) -o $@ $^ -lrt
15userfaultfd: userfaultfd.c 15userfaultfd: userfaultfd.c ../../../../usr/include/linux/kernel.h
16 $(CC) $(CFLAGS) -O2 -o $@ $^ -lpthread 16 $(CC) $(CFLAGS) -O2 -o $@ $< -lpthread
17
18../../../../usr/include/linux/kernel.h:
19 make -C ../../../.. headers_install
17 20
18TEST_PROGS := run_vmtests 21TEST_PROGS := run_vmtests
19TEST_FILES := $(BINARIES) 22TEST_FILES := $(BINARIES)
diff --git a/tools/testing/selftests/vm/userfaultfd.c b/tools/testing/selftests/vm/userfaultfd.c
index 2c7cca6f26a4..d77ed41b2094 100644
--- a/tools/testing/selftests/vm/userfaultfd.c
+++ b/tools/testing/selftests/vm/userfaultfd.c
@@ -64,17 +64,9 @@
64#include <sys/syscall.h> 64#include <sys/syscall.h>
65#include <sys/ioctl.h> 65#include <sys/ioctl.h>
66#include <pthread.h> 66#include <pthread.h>
67#include "../../../../include/uapi/linux/userfaultfd.h" 67#include <linux/userfaultfd.h>
68 68
69#ifdef __x86_64__ 69#ifdef __NR_userfaultfd
70#define __NR_userfaultfd 323
71#elif defined(__i386__)
72#define __NR_userfaultfd 374
73#elif defined(__powewrpc__)
74#define __NR_userfaultfd 364
75#else
76#error "missing __NR_userfaultfd definition"
77#endif
78 70
79static unsigned long nr_cpus, nr_pages, nr_pages_per_cpu, page_size; 71static unsigned long nr_cpus, nr_pages, nr_pages_per_cpu, page_size;
80 72
@@ -430,7 +422,7 @@ static int userfaultfd_stress(void)
430 struct uffdio_register uffdio_register; 422 struct uffdio_register uffdio_register;
431 struct uffdio_api uffdio_api; 423 struct uffdio_api uffdio_api;
432 unsigned long cpu; 424 unsigned long cpu;
433 int uffd_flags; 425 int uffd_flags, err;
434 unsigned long userfaults[nr_cpus]; 426 unsigned long userfaults[nr_cpus];
435 427
436 if (posix_memalign(&area, page_size, nr_pages * page_size)) { 428 if (posix_memalign(&area, page_size, nr_pages * page_size)) {
@@ -473,6 +465,14 @@ static int userfaultfd_stress(void)
473 *area_mutex(area_src, nr) = (pthread_mutex_t) 465 *area_mutex(area_src, nr) = (pthread_mutex_t)
474 PTHREAD_MUTEX_INITIALIZER; 466 PTHREAD_MUTEX_INITIALIZER;
475 count_verify[nr] = *area_count(area_src, nr) = 1; 467 count_verify[nr] = *area_count(area_src, nr) = 1;
468 /*
469 * In the transition between 255 to 256, powerpc will
470 * read out of order in my_bcmp and see both bytes as
471 * zero, so leave a placeholder below always non-zero
472 * after the count, to avoid my_bcmp to trigger false
473 * positives.
474 */
475 *(area_count(area_src, nr) + 1) = 1;
476 } 476 }
477 477
478 pipefd = malloc(sizeof(int) * nr_cpus * 2); 478 pipefd = malloc(sizeof(int) * nr_cpus * 2);
@@ -499,6 +499,7 @@ static int userfaultfd_stress(void)
499 pthread_attr_init(&attr); 499 pthread_attr_init(&attr);
500 pthread_attr_setstacksize(&attr, 16*1024*1024); 500 pthread_attr_setstacksize(&attr, 16*1024*1024);
501 501
502 err = 0;
502 while (bounces--) { 503 while (bounces--) {
503 unsigned long expected_ioctls; 504 unsigned long expected_ioctls;
504 505
@@ -579,20 +580,13 @@ static int userfaultfd_stress(void)
579 /* verification */ 580 /* verification */
580 if (bounces & BOUNCE_VERIFY) { 581 if (bounces & BOUNCE_VERIFY) {
581 for (nr = 0; nr < nr_pages; nr++) { 582 for (nr = 0; nr < nr_pages; nr++) {
582 if (my_bcmp(area_dst,
583 area_dst + nr * page_size,
584 sizeof(pthread_mutex_t))) {
585 fprintf(stderr,
586 "error mutex 2 %lu\n",
587 nr);
588 bounces = 0;
589 }
590 if (*area_count(area_dst, nr) != count_verify[nr]) { 583 if (*area_count(area_dst, nr) != count_verify[nr]) {
591 fprintf(stderr, 584 fprintf(stderr,
592 "error area_count %Lu %Lu %lu\n", 585 "error area_count %Lu %Lu %lu\n",
593 *area_count(area_src, nr), 586 *area_count(area_src, nr),
594 count_verify[nr], 587 count_verify[nr],
595 nr); 588 nr);
589 err = 1;
596 bounces = 0; 590 bounces = 0;
597 } 591 }
598 } 592 }
@@ -609,7 +603,7 @@ static int userfaultfd_stress(void)
609 printf("\n"); 603 printf("\n");
610 } 604 }
611 605
612 return 0; 606 return err;
613} 607}
614 608
615int main(int argc, char **argv) 609int main(int argc, char **argv)
@@ -618,8 +612,8 @@ int main(int argc, char **argv)
618 fprintf(stderr, "Usage: <MiB> <bounces>\n"), exit(1); 612 fprintf(stderr, "Usage: <MiB> <bounces>\n"), exit(1);
619 nr_cpus = sysconf(_SC_NPROCESSORS_ONLN); 613 nr_cpus = sysconf(_SC_NPROCESSORS_ONLN);
620 page_size = sysconf(_SC_PAGE_SIZE); 614 page_size = sysconf(_SC_PAGE_SIZE);
621 if ((unsigned long) area_count(NULL, 0) + sizeof(unsigned long long) > 615 if ((unsigned long) area_count(NULL, 0) + sizeof(unsigned long long) * 2
622 page_size) 616 > page_size)
623 fprintf(stderr, "Impossible to run this test\n"), exit(2); 617 fprintf(stderr, "Impossible to run this test\n"), exit(2);
624 nr_pages_per_cpu = atol(argv[1]) * 1024*1024 / page_size / 618 nr_pages_per_cpu = atol(argv[1]) * 1024*1024 / page_size /
625 nr_cpus; 619 nr_cpus;
@@ -637,3 +631,15 @@ int main(int argc, char **argv)
637 nr_pages, nr_pages_per_cpu); 631 nr_pages, nr_pages_per_cpu);
638 return userfaultfd_stress(); 632 return userfaultfd_stress();
639} 633}
634
635#else /* __NR_userfaultfd */
636
637#warning "missing __NR_userfaultfd definition"
638
639int main(void)
640{
641 printf("skip: Skipping userfaultfd test (missing __NR_userfaultfd)\n");
642 return 0;
643}
644
645#endif /* __NR_userfaultfd */
diff --git a/tools/testing/selftests/x86/entry_from_vm86.c b/tools/testing/selftests/x86/entry_from_vm86.c
index 9a43a59a9bb4..421c607a8856 100644
--- a/tools/testing/selftests/x86/entry_from_vm86.c
+++ b/tools/testing/selftests/x86/entry_from_vm86.c
@@ -116,8 +116,9 @@ static bool do_test(struct vm86plus_struct *v86, unsigned long eip,
116 v86->regs.eip = eip; 116 v86->regs.eip = eip;
117 ret = vm86(VM86_ENTER, v86); 117 ret = vm86(VM86_ENTER, v86);
118 118
119 if (ret == -1 && errno == ENOSYS) { 119 if (ret == -1 && (errno == ENOSYS || errno == EPERM)) {
120 printf("[SKIP]\tvm86 not supported\n"); 120 printf("[SKIP]\tvm86 %s\n",
121 errno == ENOSYS ? "not supported" : "not allowed");
121 return false; 122 return false;
122 } 123 }
123 124
diff --git a/tools/testing/selftests/zram/zram.sh b/tools/testing/selftests/zram/zram.sh
index 20de9a761269..683a292e3290 100755
--- a/tools/testing/selftests/zram/zram.sh
+++ b/tools/testing/selftests/zram/zram.sh
@@ -1,15 +1,7 @@
1#!/bin/bash 1#!/bin/bash
2TCID="zram.sh" 2TCID="zram.sh"
3 3
4check_prereqs() 4. ./zram_lib.sh
5{
6 local msg="skip all tests:"
7
8 if [ $UID != 0 ]; then
9 echo $msg must be run as root >&2
10 exit 0
11 fi
12}
13 5
14run_zram () { 6run_zram () {
15echo "--------------------" 7echo "--------------------"
diff --git a/tools/testing/selftests/zram/zram_lib.sh b/tools/testing/selftests/zram/zram_lib.sh
index 424e68ed1487..f6a9c73e7a44 100755
--- a/tools/testing/selftests/zram/zram_lib.sh
+++ b/tools/testing/selftests/zram/zram_lib.sh
@@ -23,8 +23,9 @@ trap INT
23check_prereqs() 23check_prereqs()
24{ 24{
25 local msg="skip all tests:" 25 local msg="skip all tests:"
26 local uid=$(id -u)
26 27
27 if [ $UID != 0 ]; then 28 if [ $uid -ne 0 ]; then
28 echo $msg must be run as root >&2 29 echo $msg must be run as root >&2
29 exit 0 30 exit 0
30 fi 31 fi
diff --git a/tools/virtio/Makefile b/tools/virtio/Makefile
index 505ad51b3b51..39c89a5ea990 100644
--- a/tools/virtio/Makefile
+++ b/tools/virtio/Makefile
@@ -6,7 +6,7 @@ vringh_test: vringh_test.o vringh.o virtio_ring.o
6CFLAGS += -g -O2 -Werror -Wall -I. -I../include/ -I ../../usr/include/ -Wno-pointer-sign -fno-strict-overflow -fno-strict-aliasing -fno-common -MMD -U_FORTIFY_SOURCE 6CFLAGS += -g -O2 -Werror -Wall -I. -I../include/ -I ../../usr/include/ -Wno-pointer-sign -fno-strict-overflow -fno-strict-aliasing -fno-common -MMD -U_FORTIFY_SOURCE
7vpath %.c ../../drivers/virtio ../../drivers/vhost 7vpath %.c ../../drivers/virtio ../../drivers/vhost
8mod: 8mod:
9 ${MAKE} -C `pwd`/../.. M=`pwd`/vhost_test 9 ${MAKE} -C `pwd`/../.. M=`pwd`/vhost_test V=${V}
10.PHONY: all test mod clean 10.PHONY: all test mod clean
11clean: 11clean:
12 ${RM} *.o vringh_test virtio_test vhost_test/*.o vhost_test/.*.cmd \ 12 ${RM} *.o vringh_test virtio_test vhost_test/*.o vhost_test/.*.cmd \
diff --git a/tools/virtio/asm/barrier.h b/tools/virtio/asm/barrier.h
index aff61e13306c..26b7926bda88 100644
--- a/tools/virtio/asm/barrier.h
+++ b/tools/virtio/asm/barrier.h
@@ -3,6 +3,8 @@
3#define mb() __sync_synchronize() 3#define mb() __sync_synchronize()
4 4
5#define smp_mb() mb() 5#define smp_mb() mb()
6# define dma_rmb() barrier()
7# define dma_wmb() barrier()
6# define smp_rmb() barrier() 8# define smp_rmb() barrier()
7# define smp_wmb() barrier() 9# define smp_wmb() barrier()
8/* Weak barriers should be used. If not - it's a bug */ 10/* Weak barriers should be used. If not - it's a bug */
diff --git a/tools/virtio/linux/export.h b/tools/virtio/linux/export.h
new file mode 100644
index 000000000000..416875e29254
--- /dev/null
+++ b/tools/virtio/linux/export.h
@@ -0,0 +1,3 @@
1#define EXPORT_SYMBOL_GPL(sym) extern typeof(sym) sym
2#define EXPORT_SYMBOL(sym) extern typeof(sym) sym
3
diff --git a/tools/virtio/linux/kernel.h b/tools/virtio/linux/kernel.h
index 1e8ce6979c1e..0a3da64638ce 100644
--- a/tools/virtio/linux/kernel.h
+++ b/tools/virtio/linux/kernel.h
@@ -22,6 +22,7 @@
22 22
23typedef unsigned long long dma_addr_t; 23typedef unsigned long long dma_addr_t;
24typedef size_t __kernel_size_t; 24typedef size_t __kernel_size_t;
25typedef unsigned int __wsum;
25 26
26struct page { 27struct page {
27 unsigned long long dummy; 28 unsigned long long dummy;
@@ -47,6 +48,13 @@ static inline void *kmalloc(size_t s, gfp_t gfp)
47 return __kmalloc_fake; 48 return __kmalloc_fake;
48 return malloc(s); 49 return malloc(s);
49} 50}
51static inline void *kzalloc(size_t s, gfp_t gfp)
52{
53 void *p = kmalloc(s, gfp);
54
55 memset(p, 0, s);
56 return p;
57}
50 58
51static inline void kfree(void *p) 59static inline void kfree(void *p)
52{ 60{
diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index 76e38d231e99..48c6e1ac6827 100644
--- a/virt/kvm/arm/arch_timer.c
+++ b/virt/kvm/arm/arch_timer.c
@@ -200,6 +200,14 @@ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
200 timer->irq = irq; 200 timer->irq = irq;
201 201
202 /* 202 /*
203 * The bits in CNTV_CTL are architecturally reset to UNKNOWN for ARMv8
204 * and to 0 for ARMv7. We provide an implementation that always
205 * resets the timer to be disabled and unmasked and is compliant with
206 * the ARMv7 architecture.
207 */
208 timer->cntv_ctl = 0;
209
210 /*
203 * Tell the VGIC that the virtual interrupt is tied to a 211 * Tell the VGIC that the virtual interrupt is tied to a
204 * physical interrupt. We do that once per VCPU. 212 * physical interrupt. We do that once per VCPU.
205 */ 213 */
diff --git a/virt/kvm/arm/vgic-v3.c b/virt/kvm/arm/vgic-v3.c
index afbf925b00f4..7dd5d62f10a1 100644
--- a/virt/kvm/arm/vgic-v3.c
+++ b/virt/kvm/arm/vgic-v3.c
@@ -288,7 +288,7 @@ int vgic_v3_probe(struct device_node *vgic_node,
288 288
289 vgic->vctrl_base = NULL; 289 vgic->vctrl_base = NULL;
290 vgic->type = VGIC_V3; 290 vgic->type = VGIC_V3;
291 vgic->max_gic_vcpus = KVM_MAX_VCPUS; 291 vgic->max_gic_vcpus = VGIC_V3_MAX_CPUS;
292 292
293 kvm_info("%s@%llx IRQ%d\n", vgic_node->name, 293 kvm_info("%s@%llx IRQ%d\n", vgic_node->name,
294 vcpu_res.start, vgic->maint_irq); 294 vcpu_res.start, vgic->maint_irq);
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 9eb489a2c94c..6bd1c9bf7ae7 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm/vgic.c
@@ -1144,26 +1144,11 @@ static void vgic_queue_irq_to_lr(struct kvm_vcpu *vcpu, int irq,
1144 struct irq_phys_map *map; 1144 struct irq_phys_map *map;
1145 map = vgic_irq_map_search(vcpu, irq); 1145 map = vgic_irq_map_search(vcpu, irq);
1146 1146
1147 /*
1148 * If we have a mapping, and the virtual interrupt is
1149 * being injected, then we must set the state to
1150 * active in the physical world. Otherwise the
1151 * physical interrupt will fire and the guest will
1152 * exit before processing the virtual interrupt.
1153 */
1154 if (map) { 1147 if (map) {
1155 int ret;
1156
1157 BUG_ON(!map->active);
1158 vlr.hwirq = map->phys_irq; 1148 vlr.hwirq = map->phys_irq;
1159 vlr.state |= LR_HW; 1149 vlr.state |= LR_HW;
1160 vlr.state &= ~LR_EOI_INT; 1150 vlr.state &= ~LR_EOI_INT;
1161 1151
1162 ret = irq_set_irqchip_state(map->irq,
1163 IRQCHIP_STATE_ACTIVE,
1164 true);
1165 WARN_ON(ret);
1166
1167 /* 1152 /*
1168 * Make sure we're not going to sample this 1153 * Make sure we're not going to sample this
1169 * again, as a HW-backed interrupt cannot be 1154 * again, as a HW-backed interrupt cannot be
@@ -1255,7 +1240,7 @@ static void __kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
1255 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; 1240 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
1256 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; 1241 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
1257 unsigned long *pa_percpu, *pa_shared; 1242 unsigned long *pa_percpu, *pa_shared;
1258 int i, vcpu_id; 1243 int i, vcpu_id, lr, ret;
1259 int overflow = 0; 1244 int overflow = 0;
1260 int nr_shared = vgic_nr_shared_irqs(dist); 1245 int nr_shared = vgic_nr_shared_irqs(dist);
1261 1246
@@ -1310,6 +1295,31 @@ epilog:
1310 */ 1295 */
1311 clear_bit(vcpu_id, dist->irq_pending_on_cpu); 1296 clear_bit(vcpu_id, dist->irq_pending_on_cpu);
1312 } 1297 }
1298
1299 for (lr = 0; lr < vgic->nr_lr; lr++) {
1300 struct vgic_lr vlr;
1301
1302 if (!test_bit(lr, vgic_cpu->lr_used))
1303 continue;
1304
1305 vlr = vgic_get_lr(vcpu, lr);
1306
1307 /*
1308 * If we have a mapping, and the virtual interrupt is
1309 * presented to the guest (as pending or active), then we must
1310 * set the state to active in the physical world. See
1311 * Documentation/virtual/kvm/arm/vgic-mapped-irqs.txt.
1312 */
1313 if (vlr.state & LR_HW) {
1314 struct irq_phys_map *map;
1315 map = vgic_irq_map_search(vcpu, vlr.irq);
1316
1317 ret = irq_set_irqchip_state(map->irq,
1318 IRQCHIP_STATE_ACTIVE,
1319 true);
1320 WARN_ON(ret);
1321 }
1322 }
1313} 1323}
1314 1324
1315static bool vgic_process_maintenance(struct kvm_vcpu *vcpu) 1325static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
diff --git a/virt/kvm/coalesced_mmio.h b/virt/kvm/coalesced_mmio.h
index 5cbf190d238c..6bca74ca5331 100644
--- a/virt/kvm/coalesced_mmio.h
+++ b/virt/kvm/coalesced_mmio.h
@@ -24,9 +24,9 @@ struct kvm_coalesced_mmio_dev {
24int kvm_coalesced_mmio_init(struct kvm *kvm); 24int kvm_coalesced_mmio_init(struct kvm *kvm);
25void kvm_coalesced_mmio_free(struct kvm *kvm); 25void kvm_coalesced_mmio_free(struct kvm *kvm);
26int kvm_vm_ioctl_register_coalesced_mmio(struct kvm *kvm, 26int kvm_vm_ioctl_register_coalesced_mmio(struct kvm *kvm,
27 struct kvm_coalesced_mmio_zone *zone); 27 struct kvm_coalesced_mmio_zone *zone);
28int kvm_vm_ioctl_unregister_coalesced_mmio(struct kvm *kvm, 28int kvm_vm_ioctl_unregister_coalesced_mmio(struct kvm *kvm,
29 struct kvm_coalesced_mmio_zone *zone); 29 struct kvm_coalesced_mmio_zone *zone);
30 30
31#else 31#else
32 32
diff --git a/virt/kvm/eventfd.c b/virt/kvm/eventfd.c
index 9ff4193dfa49..79db45336e3a 100644
--- a/virt/kvm/eventfd.c
+++ b/virt/kvm/eventfd.c
@@ -771,40 +771,14 @@ static enum kvm_bus ioeventfd_bus_from_flags(__u32 flags)
771 return KVM_MMIO_BUS; 771 return KVM_MMIO_BUS;
772} 772}
773 773
774static int 774static int kvm_assign_ioeventfd_idx(struct kvm *kvm,
775kvm_assign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args) 775 enum kvm_bus bus_idx,
776 struct kvm_ioeventfd *args)
776{ 777{
777 enum kvm_bus bus_idx;
778 struct _ioeventfd *p;
779 struct eventfd_ctx *eventfd;
780 int ret;
781
782 bus_idx = ioeventfd_bus_from_flags(args->flags);
783 /* must be natural-word sized, or 0 to ignore length */
784 switch (args->len) {
785 case 0:
786 case 1:
787 case 2:
788 case 4:
789 case 8:
790 break;
791 default:
792 return -EINVAL;
793 }
794
795 /* check for range overflow */
796 if (args->addr + args->len < args->addr)
797 return -EINVAL;
798 778
799 /* check for extra flags that we don't understand */ 779 struct eventfd_ctx *eventfd;
800 if (args->flags & ~KVM_IOEVENTFD_VALID_FLAG_MASK) 780 struct _ioeventfd *p;
801 return -EINVAL; 781 int ret;
802
803 /* ioeventfd with no length can't be combined with DATAMATCH */
804 if (!args->len &&
805 args->flags & (KVM_IOEVENTFD_FLAG_PIO |
806 KVM_IOEVENTFD_FLAG_DATAMATCH))
807 return -EINVAL;
808 782
809 eventfd = eventfd_ctx_fdget(args->fd); 783 eventfd = eventfd_ctx_fdget(args->fd);
810 if (IS_ERR(eventfd)) 784 if (IS_ERR(eventfd))
@@ -843,16 +817,6 @@ kvm_assign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
843 if (ret < 0) 817 if (ret < 0)
844 goto unlock_fail; 818 goto unlock_fail;
845 819
846 /* When length is ignored, MMIO is also put on a separate bus, for
847 * faster lookups.
848 */
849 if (!args->len && !(args->flags & KVM_IOEVENTFD_FLAG_PIO)) {
850 ret = kvm_io_bus_register_dev(kvm, KVM_FAST_MMIO_BUS,
851 p->addr, 0, &p->dev);
852 if (ret < 0)
853 goto register_fail;
854 }
855
856 kvm->buses[bus_idx]->ioeventfd_count++; 820 kvm->buses[bus_idx]->ioeventfd_count++;
857 list_add_tail(&p->list, &kvm->ioeventfds); 821 list_add_tail(&p->list, &kvm->ioeventfds);
858 822
@@ -860,8 +824,6 @@ kvm_assign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
860 824
861 return 0; 825 return 0;
862 826
863register_fail:
864 kvm_io_bus_unregister_dev(kvm, bus_idx, &p->dev);
865unlock_fail: 827unlock_fail:
866 mutex_unlock(&kvm->slots_lock); 828 mutex_unlock(&kvm->slots_lock);
867 829
@@ -873,14 +835,13 @@ fail:
873} 835}
874 836
875static int 837static int
876kvm_deassign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args) 838kvm_deassign_ioeventfd_idx(struct kvm *kvm, enum kvm_bus bus_idx,
839 struct kvm_ioeventfd *args)
877{ 840{
878 enum kvm_bus bus_idx;
879 struct _ioeventfd *p, *tmp; 841 struct _ioeventfd *p, *tmp;
880 struct eventfd_ctx *eventfd; 842 struct eventfd_ctx *eventfd;
881 int ret = -ENOENT; 843 int ret = -ENOENT;
882 844
883 bus_idx = ioeventfd_bus_from_flags(args->flags);
884 eventfd = eventfd_ctx_fdget(args->fd); 845 eventfd = eventfd_ctx_fdget(args->fd);
885 if (IS_ERR(eventfd)) 846 if (IS_ERR(eventfd))
886 return PTR_ERR(eventfd); 847 return PTR_ERR(eventfd);
@@ -901,10 +862,6 @@ kvm_deassign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
901 continue; 862 continue;
902 863
903 kvm_io_bus_unregister_dev(kvm, bus_idx, &p->dev); 864 kvm_io_bus_unregister_dev(kvm, bus_idx, &p->dev);
904 if (!p->length) {
905 kvm_io_bus_unregister_dev(kvm, KVM_FAST_MMIO_BUS,
906 &p->dev);
907 }
908 kvm->buses[bus_idx]->ioeventfd_count--; 865 kvm->buses[bus_idx]->ioeventfd_count--;
909 ioeventfd_release(p); 866 ioeventfd_release(p);
910 ret = 0; 867 ret = 0;
@@ -918,6 +875,71 @@ kvm_deassign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
918 return ret; 875 return ret;
919} 876}
920 877
878static int kvm_deassign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
879{
880 enum kvm_bus bus_idx = ioeventfd_bus_from_flags(args->flags);
881 int ret = kvm_deassign_ioeventfd_idx(kvm, bus_idx, args);
882
883 if (!args->len && bus_idx == KVM_MMIO_BUS)
884 kvm_deassign_ioeventfd_idx(kvm, KVM_FAST_MMIO_BUS, args);
885
886 return ret;
887}
888
889static int
890kvm_assign_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
891{
892 enum kvm_bus bus_idx;
893 int ret;
894
895 bus_idx = ioeventfd_bus_from_flags(args->flags);
896 /* must be natural-word sized, or 0 to ignore length */
897 switch (args->len) {
898 case 0:
899 case 1:
900 case 2:
901 case 4:
902 case 8:
903 break;
904 default:
905 return -EINVAL;
906 }
907
908 /* check for range overflow */
909 if (args->addr + args->len < args->addr)
910 return -EINVAL;
911
912 /* check for extra flags that we don't understand */
913 if (args->flags & ~KVM_IOEVENTFD_VALID_FLAG_MASK)
914 return -EINVAL;
915
916 /* ioeventfd with no length can't be combined with DATAMATCH */
917 if (!args->len &&
918 args->flags & (KVM_IOEVENTFD_FLAG_PIO |
919 KVM_IOEVENTFD_FLAG_DATAMATCH))
920 return -EINVAL;
921
922 ret = kvm_assign_ioeventfd_idx(kvm, bus_idx, args);
923 if (ret)
924 goto fail;
925
926 /* When length is ignored, MMIO is also put on a separate bus, for
927 * faster lookups.
928 */
929 if (!args->len && bus_idx == KVM_MMIO_BUS) {
930 ret = kvm_assign_ioeventfd_idx(kvm, KVM_FAST_MMIO_BUS, args);
931 if (ret < 0)
932 goto fast_fail;
933 }
934
935 return 0;
936
937fast_fail:
938 kvm_deassign_ioeventfd_idx(kvm, bus_idx, args);
939fail:
940 return ret;
941}
942
921int 943int
922kvm_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args) 944kvm_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
923{ 945{
diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
index a25a73147f71..8db1d9361993 100644
--- a/virt/kvm/kvm_main.c
+++ b/virt/kvm/kvm_main.c
@@ -66,8 +66,8 @@
66MODULE_AUTHOR("Qumranet"); 66MODULE_AUTHOR("Qumranet");
67MODULE_LICENSE("GPL"); 67MODULE_LICENSE("GPL");
68 68
69/* halt polling only reduces halt latency by 5-7 us, 500us is enough */ 69/* Architectures should define their poll value according to the halt latency */
70static unsigned int halt_poll_ns = 500000; 70static unsigned int halt_poll_ns = KVM_HALT_POLL_NS_DEFAULT;
71module_param(halt_poll_ns, uint, S_IRUGO | S_IWUSR); 71module_param(halt_poll_ns, uint, S_IRUGO | S_IWUSR);
72 72
73/* Default doubles per-vcpu halt_poll_ns. */ 73/* Default doubles per-vcpu halt_poll_ns. */
@@ -2004,6 +2004,7 @@ void kvm_vcpu_block(struct kvm_vcpu *vcpu)
2004 if (vcpu->halt_poll_ns) { 2004 if (vcpu->halt_poll_ns) {
2005 ktime_t stop = ktime_add_ns(ktime_get(), vcpu->halt_poll_ns); 2005 ktime_t stop = ktime_add_ns(ktime_get(), vcpu->halt_poll_ns);
2006 2006
2007 ++vcpu->stat.halt_attempted_poll;
2007 do { 2008 do {
2008 /* 2009 /*
2009 * This sets KVM_REQ_UNHALT if an interrupt 2010 * This sets KVM_REQ_UNHALT if an interrupt
@@ -2043,7 +2044,8 @@ out:
2043 else if (vcpu->halt_poll_ns < halt_poll_ns && 2044 else if (vcpu->halt_poll_ns < halt_poll_ns &&
2044 block_ns < halt_poll_ns) 2045 block_ns < halt_poll_ns)
2045 grow_halt_poll_ns(vcpu); 2046 grow_halt_poll_ns(vcpu);
2046 } 2047 } else
2048 vcpu->halt_poll_ns = 0;
2047 2049
2048 trace_kvm_vcpu_wakeup(block_ns, waited); 2050 trace_kvm_vcpu_wakeup(block_ns, waited);
2049} 2051}
@@ -3156,10 +3158,25 @@ static void kvm_io_bus_destroy(struct kvm_io_bus *bus)
3156static inline int kvm_io_bus_cmp(const struct kvm_io_range *r1, 3158static inline int kvm_io_bus_cmp(const struct kvm_io_range *r1,
3157 const struct kvm_io_range *r2) 3159 const struct kvm_io_range *r2)
3158{ 3160{
3159 if (r1->addr < r2->addr) 3161 gpa_t addr1 = r1->addr;
3162 gpa_t addr2 = r2->addr;
3163
3164 if (addr1 < addr2)
3160 return -1; 3165 return -1;
3161 if (r1->addr + r1->len > r2->addr + r2->len) 3166
3167 /* If r2->len == 0, match the exact address. If r2->len != 0,
3168 * accept any overlapping write. Any order is acceptable for
3169 * overlapping ranges, because kvm_io_bus_get_first_dev ensures
3170 * we process all of them.
3171 */
3172 if (r2->len) {
3173 addr1 += r1->len;
3174 addr2 += r2->len;
3175 }
3176
3177 if (addr1 > addr2)
3162 return 1; 3178 return 1;
3179
3163 return 0; 3180 return 0;
3164} 3181}
3165 3182