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-rw-r--r--arch/arm/boot/dts/aspeed-ast2500-evb.dts22
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts18
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts36
-rw-r--r--arch/arm/boot/dts/aspeed-g4.dtsi109
-rw-r--r--arch/arm/boot/dts/aspeed-g5.dtsi156
5 files changed, 271 insertions, 70 deletions
diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
index d967603dade8..7c90dac99822 100644
--- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
@@ -20,6 +20,28 @@
20 }; 20 };
21}; 21};
22 22
23&fmc {
24 status = "okay";
25 flash@0 {
26 status = "okay";
27 m25p,fast-read;
28 label = "bmc";
29 };
30};
31
32&spi1 {
33 status = "okay";
34 flash@0 {
35 status = "okay";
36 m25p,fast-read;
37 label = "pnor";
38 };
39};
40
41&spi2 {
42 status = "okay";
43};
44
23&uart5 { 45&uart5 {
24 status = "okay"; 46 status = "okay";
25}; 47};
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
index 1d2fc1e1dc29..112551766275 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -31,6 +31,24 @@
31 }; 31 };
32}; 32};
33 33
34&fmc {
35 status = "okay";
36 flash@0 {
37 status = "okay";
38 m25p,fast-read;
39 label = "bmc";
40 };
41};
42
43&spi {
44 status = "okay";
45 flash@0 {
46 status = "okay";
47 m25p,fast-read;
48 label = "pnor";
49 };
50};
51
34&uart5 { 52&uart5 {
35 status = "okay"; 53 status = "okay";
36}; 54};
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
index 7a3b2b50c884..1190fec1b5d0 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
@@ -31,6 +31,42 @@
31 }; 31 };
32}; 32};
33 33
34&fmc {
35 status = "okay";
36 flash@0 {
37 status = "okay";
38 m25p,fast-read;
39 label = "bmc";
40 };
41};
42
43&spi1 {
44 status = "okay";
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_spi1_default>;
47
48 flash@0 {
49 status = "okay";
50 m25p,fast-read;
51 label = "pnor";
52 };
53};
54
55&uart1 {
56 /* Rear RS-232 connector */
57 status = "okay";
58
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_txd1_default
61 &pinctrl_rxd1_default
62 &pinctrl_nrts1_default
63 &pinctrl_ndtr1_default
64 &pinctrl_ndsr1_default
65 &pinctrl_ncts1_default
66 &pinctrl_ndcd1_default
67 &pinctrl_nri1_default>;
68};
69
34&uart5 { 70&uart5 {
35 status = "okay"; 71 status = "okay";
36}; 72};
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 0b4932cc02a8..914f6e7354a9 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -18,21 +18,41 @@
18 }; 18 };
19 }; 19 };
20 20
21 clocks {
22 clk_clkin: clk_clkin {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <48000000>;
26 };
27
28 };
29
30 ahb { 21 ahb {
31 compatible = "simple-bus"; 22 compatible = "simple-bus";
32 #address-cells = <1>; 23 #address-cells = <1>;
33 #size-cells = <1>; 24 #size-cells = <1>;
34 ranges; 25 ranges;
35 26
27 fmc: flash-controller@1e620000 {
28 reg = < 0x1e620000 0x94
29 0x20000000 0x02000000 >;
30 #address-cells = <1>;
31 #size-cells = <0>;
32 compatible = "aspeed,ast2400-fmc";
33 status = "disabled";
34 interrupts = <19>;
35 flash@0 {
36 reg = < 0 >;
37 compatible = "jedec,spi-nor";
38 status = "disabled";
39 };
40 };
41
42 spi: flash-controller@1e630000 {
43 reg = < 0x1e630000 0x18
44 0x30000000 0x02000000 >;
45 #address-cells = <1>;
46 #size-cells = <0>;
47 compatible = "aspeed,ast2400-spi";
48 status = "disabled";
49 flash@0 {
50 reg = < 0 >;
51 compatible = "jedec,spi-nor";
52 status = "disabled";
53 };
54 };
55
36 vic: interrupt-controller@1e6c0080 { 56 vic: interrupt-controller@1e6c0080 {
37 compatible = "aspeed,ast2400-vic"; 57 compatible = "aspeed,ast2400-vic";
38 interrupt-controller; 58 interrupt-controller;
@@ -63,16 +83,48 @@
63 #size-cells = <1>; 83 #size-cells = <1>;
64 ranges; 84 ranges;
65 85
66 clk_hpll: clk_hpll@1e6e2070 {
67 #clock-cells = <0>;
68 compatible = "aspeed,g4-hpll-clock";
69 reg = <0x1e6e2070 0x4>;
70 clocks = <&clk_clkin>;
71 };
72
73 syscon: syscon@1e6e2000 { 86 syscon: syscon@1e6e2000 {
74 compatible = "aspeed,g4-scu", "syscon", "simple-mfd"; 87 compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
75 reg = <0x1e6e2000 0x1a8>; 88 reg = <0x1e6e2000 0x1a8>;
89 #address-cells = <1>;
90 #size-cells = <0>;
91
92 clk_clkin: clk_clkin {
93 #clock-cells = <0>;
94 compatible = "fixed-clock";
95 clock-frequency = <48000000>;
96 };
97
98 clk_hpll: clk_hpll@70 {
99 #clock-cells = <0>;
100 compatible = "aspeed,g4-hpll-clock", "fixed-clock";
101 reg = <0x70>;
102 clocks = <&clk_clkin>;
103 clock-frequency = <384000000>;
104 };
105
106 clk_ahb: clk_ahb@70 {
107 #clock-cells = <0>;
108 compatible = "aspeed,g4-ahb-clock", "fixed-clock";
109 reg = <0x70>;
110 clocks = <&clk_hpll>;
111 clock-frequency = <192000000>;
112 };
113
114 clk_apb: clk_apb@08 {
115 #clock-cells = <0>;
116 compatible = "aspeed,g4-apb-clock", "fixed-clock";
117 reg = <0x08>;
118 clocks = <&clk_hpll>;
119 clock-frequency = <48000000>;
120 };
121
122 clk_uart: clk_uart@2c{
123 #clock-cells = <0>;
124 compatible = "aspeed,g4-uart-clock", "fixed-clock";
125 reg = <0x2c>;
126 clock-frequency = <24000000>;
127 };
76 128
77 pinctrl: pinctrl { 129 pinctrl: pinctrl {
78 compatible = "aspeed,g4-pinctrl"; 130 compatible = "aspeed,g4-pinctrl";
@@ -820,19 +872,6 @@
820 }; 872 };
821 }; 873 };
822 874
823 clk_apb: clk_apb@1e6e2008 {
824 #clock-cells = <0>;
825 compatible = "aspeed,g4-apb-clock";
826 reg = <0x1e6e2008 0x4>;
827 clocks = <&clk_hpll>;
828 };
829
830 clk_uart: clk_uart@1e6e2008 {
831 #clock-cells = <0>;
832 compatible = "aspeed,uart-clock";
833 reg = <0x1e6e202c 0x4>;
834 };
835
836 sram@1e720000 { 875 sram@1e720000 {
837 compatible = "mmio-sram"; 876 compatible = "mmio-sram";
838 reg = <0x1e720000 0x8000>; // 32K 877 reg = <0x1e720000 0x8000>; // 32K
@@ -859,13 +898,13 @@
859 }; 898 };
860 899
861 wdt1: wdt@1e785000 { 900 wdt1: wdt@1e785000 {
862 compatible = "aspeed,wdt"; 901 compatible = "aspeed,ast2400-wdt";
863 reg = <0x1e785000 0x1c>; 902 reg = <0x1e785000 0x1c>;
864 interrupts = <27>; 903 interrupts = <27>;
865 }; 904 };
866 905
867 wdt2: wdt@1e785020 { 906 wdt2: wdt@1e785020 {
868 compatible = "aspeed,wdt"; 907 compatible = "aspeed,ast2400-wdt";
869 reg = <0x1e785020 0x1c>; 908 reg = <0x1e785020 0x1c>;
870 interrupts = <27>; 909 interrupts = <27>;
871 clocks = <&clk_apb>; 910 clocks = <&clk_apb>;
@@ -932,6 +971,14 @@
932 no-loopback-test; 971 no-loopback-test;
933 status = "disabled"; 972 status = "disabled";
934 }; 973 };
974
975 adc: adc@1e6e9000 {
976 compatible = "aspeed,ast2400-adc";
977 reg = <0x1e6e9000 0xb0>;
978 clocks = <&clk_apb>;
979 #io-channel-cells = <1>;
980 status = "disabled";
981 };
935 }; 982 };
936 }; 983 };
937}; 984};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index b664fe380936..20e2af0ce9c1 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -24,6 +24,69 @@
24 #size-cells = <1>; 24 #size-cells = <1>;
25 ranges; 25 ranges;
26 26
27 fmc: flash-controller@1e620000 {
28 reg = < 0x1e620000 0xc4
29 0x20000000 0x10000000 >;
30 #address-cells = <1>;
31 #size-cells = <0>;
32 compatible = "aspeed,ast2500-fmc";
33 status = "disabled";
34 interrupts = <19>;
35 flash@0 {
36 reg = < 0 >;
37 compatible = "jedec,spi-nor";
38 status = "disabled";
39 };
40 flash@1 {
41 reg = < 1 >;
42 compatible = "jedec,spi-nor";
43 status = "disabled";
44 };
45 flash@2 {
46 reg = < 2 >;
47 compatible = "jedec,spi-nor";
48 status = "disabled";
49 };
50 };
51
52 spi1: flash-controller@1e630000 {
53 reg = < 0x1e630000 0xc4
54 0x30000000 0x08000000 >;
55 #address-cells = <1>;
56 #size-cells = <0>;
57 compatible = "aspeed,ast2500-spi";
58 status = "disabled";
59 flash@0 {
60 reg = < 0 >;
61 compatible = "jedec,spi-nor";
62 status = "disabled";
63 };
64 flash@1 {
65 reg = < 1 >;
66 compatible = "jedec,spi-nor";
67 status = "disabled";
68 };
69 };
70
71 spi2: flash-controller@1e631000 {
72 reg = < 0x1e631000 0xc4
73 0x38000000 0x08000000 >;
74 #address-cells = <1>;
75 #size-cells = <0>;
76 compatible = "aspeed,ast2500-spi";
77 status = "disabled";
78 flash@0 {
79 reg = < 0 >;
80 compatible = "jedec,spi-nor";
81 status = "disabled";
82 };
83 flash@1 {
84 reg = < 1 >;
85 compatible = "jedec,spi-nor";
86 status = "disabled";
87 };
88 };
89
27 vic: interrupt-controller@1e6c0080 { 90 vic: interrupt-controller@1e6c0080 {
28 compatible = "aspeed,ast2400-vic"; 91 compatible = "aspeed,ast2400-vic";
29 interrupt-controller; 92 interrupt-controller;
@@ -54,15 +117,49 @@
54 #size-cells = <1>; 117 #size-cells = <1>;
55 ranges; 118 ranges;
56 119
57 clk_clkin: clk_clkin@1e6e2070 {
58 #clock-cells = <0>;
59 compatible = "aspeed,g5-clkin-clock";
60 reg = <0x1e6e2070 0x04>;
61 };
62
63 syscon: syscon@1e6e2000 { 120 syscon: syscon@1e6e2000 {
64 compatible = "aspeed,g5-scu", "syscon", "simple-mfd"; 121 compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
65 reg = <0x1e6e2000 0x1a8>; 122 reg = <0x1e6e2000 0x1a8>;
123 #address-cells = <1>;
124 #size-cells = <0>;
125
126 clk_clkin: clk_clkin@70 {
127 #clock-cells = <0>;
128 compatible = "aspeed,g5-clkin-clock", "fixed-clock";
129 reg = <0x70>;
130 clock-frequency = <24000000>;
131 };
132
133 clk_hpll: clk_hpll@24 {
134 #clock-cells = <0>;
135 compatible = "aspeed,g5-hpll-clock", "fixed-clock";
136 reg = <0x24>;
137 clocks = <&clk_clkin>;
138 clock-frequency = <792000000>;
139 };
140
141 clk_ahb: clk_ahb@70 {
142 #clock-cells = <0>;
143 compatible = "aspeed,g5-ahb-clock", "fixed-clock";
144 reg = <0x70>;
145 clocks = <&clk_hpll>;
146 clock-frequency = <198000000>;
147 };
148
149 clk_apb: clk_apb@08 {
150 #clock-cells = <0>;
151 compatible = "aspeed,g5-apb-clock", "fixed-clock";
152 reg = <0x08>;
153 clocks = <&clk_hpll>;
154 clock-frequency = <24750000>;
155 };
156
157 clk_uart: clk_uart@2c {
158 #clock-cells = <0>;
159 compatible = "aspeed,uart-clock", "fixed-clock";
160 reg = <0x2c>;
161 clock-frequency = <24000000>;
162 };
66 163
67 pinctrl: pinctrl { 164 pinctrl: pinctrl {
68 compatible = "aspeed,g5-pinctrl"; 165 compatible = "aspeed,g5-pinctrl";
@@ -287,7 +384,6 @@
287 function = "LAD0"; 384 function = "LAD0";
288 groups = "LAD0"; 385 groups = "LAD0";
289 }; 386 };
290
291 pinctrl_lad1_default: lad1_default { 387 pinctrl_lad1_default: lad1_default {
292 function = "LAD1"; 388 function = "LAD1";
293 groups = "LAD1"; 389 groups = "LAD1";
@@ -874,33 +970,7 @@
874 }; 970 };
875 971
876 }; 972 };
877 };
878
879 clk_hpll: clk_hpll@1e6e2024 {
880 #clock-cells = <0>;
881 compatible = "aspeed,g5-hpll-clock";
882 reg = <0x1e6e2024 0x4>;
883 clocks = <&clk_clkin>;
884 };
885
886 clk_ahb: clk_ahb@1e6e2070 {
887 #clock-cells = <0>;
888 compatible = "aspeed,g5-ahb-clock";
889 reg = <0x1e6e2070 0x4>;
890 clocks = <&clk_hpll>;
891 };
892 973
893 clk_apb: clk_apb@1e6e2008 {
894 #clock-cells = <0>;
895 compatible = "aspeed,g5-apb-clock";
896 reg = <0x1e6e2008 0x4>;
897 clocks = <&clk_hpll>;
898 };
899
900 clk_uart: clk_uart@1e6e2008 {
901 #clock-cells = <0>;
902 compatible = "aspeed,uart-clock";
903 reg = <0x1e6e202c 0x4>;
904 }; 974 };
905 975
906 gfx: display@1e6e6000 { 976 gfx: display@1e6e6000 {
@@ -936,21 +1006,21 @@
936 1006
937 1007
938 wdt1: wdt@1e785000 { 1008 wdt1: wdt@1e785000 {
939 compatible = "aspeed,wdt"; 1009 compatible = "aspeed,ast2500-wdt";
940 reg = <0x1e785000 0x1c>; 1010 reg = <0x1e785000 0x20>;
941 interrupts = <27>; 1011 interrupts = <27>;
942 }; 1012 };
943 1013
944 wdt2: wdt@1e785020 { 1014 wdt2: wdt@1e785020 {
945 compatible = "aspeed,wdt"; 1015 compatible = "aspeed,ast2500-wdt";
946 reg = <0x1e785020 0x1c>; 1016 reg = <0x1e785020 0x20>;
947 interrupts = <27>; 1017 interrupts = <27>;
948 status = "disabled"; 1018 status = "disabled";
949 }; 1019 };
950 1020
951 wdt3: wdt@1e785040 { 1021 wdt3: wdt@1e785040 {
952 compatible = "aspeed,wdt"; 1022 compatible = "aspeed,ast2500-wdt";
953 reg = <0x1e785074 0x1c>; 1023 reg = <0x1e785040 0x20>;
954 status = "disabled"; 1024 status = "disabled";
955 }; 1025 };
956 1026
@@ -1044,6 +1114,14 @@
1044 no-loopback-test; 1114 no-loopback-test;
1045 status = "disabled"; 1115 status = "disabled";
1046 }; 1116 };
1117
1118 adc: adc@1e6e9000 {
1119 compatible = "aspeed,ast2500-adc";
1120 reg = <0x1e6e9000 0xb0>;
1121 clocks = <&clk_apb>;
1122 #io-channel-cells = <1>;
1123 status = "disabled";
1124 };
1047 }; 1125 };
1048 }; 1126 };
1049}; 1127};
generated by cgit v1.2.2 (git 2.25.0) at 2025-06-03 18:32:32 -0400