diff options
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 50 |
1 files changed, 26 insertions, 24 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c index d0e30192f0cf..5f80eb018014 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c | |||
| @@ -64,18 +64,19 @@ static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_audio_base_clk, "pll-audio-base", | |||
| 64 | BIT(28), /* lock */ | 64 | BIT(28), /* lock */ |
| 65 | CLK_SET_RATE_UNGATE); | 65 | CLK_SET_RATE_UNGATE); |
| 66 | 66 | ||
| 67 | static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(pll_video0_clk, "pll-video0", | 67 | static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(pll_video0_clk, "pll-video0", |
| 68 | "osc24M", 0x010, | 68 | "osc24M", 0x010, |
| 69 | 192000000, /* Minimum rate */ | 69 | 192000000, /* Minimum rate */ |
| 70 | 8, 7, /* N */ | 70 | 1008000000, /* Maximum rate */ |
| 71 | 0, 4, /* M */ | 71 | 8, 7, /* N */ |
| 72 | BIT(24), /* frac enable */ | 72 | 0, 4, /* M */ |
| 73 | BIT(25), /* frac select */ | 73 | BIT(24), /* frac enable */ |
| 74 | 270000000, /* frac rate 0 */ | 74 | BIT(25), /* frac select */ |
| 75 | 297000000, /* frac rate 1 */ | 75 | 270000000, /* frac rate 0 */ |
| 76 | BIT(31), /* gate */ | 76 | 297000000, /* frac rate 1 */ |
| 77 | BIT(28), /* lock */ | 77 | BIT(31), /* gate */ |
| 78 | CLK_SET_RATE_UNGATE); | 78 | BIT(28), /* lock */ |
| 79 | CLK_SET_RATE_UNGATE); | ||
| 79 | 80 | ||
| 80 | static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve", | 81 | static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve", |
| 81 | "osc24M", 0x018, | 82 | "osc24M", 0x018, |
| @@ -126,18 +127,19 @@ static struct ccu_nk pll_periph1_clk = { | |||
| 126 | }, | 127 | }, |
| 127 | }; | 128 | }; |
| 128 | 129 | ||
| 129 | static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(pll_video1_clk, "pll-video1", | 130 | static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(pll_video1_clk, "pll-video1", |
| 130 | "osc24M", 0x030, | 131 | "osc24M", 0x030, |
| 131 | 192000000, /* Minimum rate */ | 132 | 192000000, /* Minimum rate */ |
| 132 | 8, 7, /* N */ | 133 | 1008000000, /* Maximum rate */ |
| 133 | 0, 4, /* M */ | 134 | 8, 7, /* N */ |
| 134 | BIT(24), /* frac enable */ | 135 | 0, 4, /* M */ |
| 135 | BIT(25), /* frac select */ | 136 | BIT(24), /* frac enable */ |
| 136 | 270000000, /* frac rate 0 */ | 137 | BIT(25), /* frac select */ |
| 137 | 297000000, /* frac rate 1 */ | 138 | 270000000, /* frac rate 0 */ |
| 138 | BIT(31), /* gate */ | 139 | 297000000, /* frac rate 1 */ |
| 139 | BIT(28), /* lock */ | 140 | BIT(31), /* gate */ |
| 140 | CLK_SET_RATE_UNGATE); | 141 | BIT(28), /* lock */ |
| 142 | CLK_SET_RATE_UNGATE); | ||
| 141 | 143 | ||
| 142 | static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_gpu_clk, "pll-gpu", | 144 | static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_gpu_clk, "pll-gpu", |
| 143 | "osc24M", 0x038, | 145 | "osc24M", 0x038, |