diff options
-rw-r--r-- | arch/mips/bcm63xx/clk.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index d8dac1f9a65a..ba5758551c94 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c | |||
@@ -248,6 +248,10 @@ static struct clk clk_hsspi = { | |||
248 | .set = hsspi_set, | 248 | .set = hsspi_set, |
249 | }; | 249 | }; |
250 | 250 | ||
251 | /* | ||
252 | * HSSPI PLL | ||
253 | */ | ||
254 | static struct clk clk_hsspi_pll; | ||
251 | 255 | ||
252 | /* | 256 | /* |
253 | * XTM clock | 257 | * XTM clock |
@@ -380,6 +384,7 @@ static struct clk_lookup bcm6328_clks[] = { | |||
380 | CLKDEV_INIT(NULL, "periph", &clk_periph), | 384 | CLKDEV_INIT(NULL, "periph", &clk_periph), |
381 | CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), | 385 | CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), |
382 | CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), | 386 | CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), |
387 | CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), | ||
383 | /* gated clocks */ | 388 | /* gated clocks */ |
384 | CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), | 389 | CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), |
385 | CLKDEV_INIT(NULL, "usbh", &clk_usbh), | 390 | CLKDEV_INIT(NULL, "usbh", &clk_usbh), |
@@ -447,6 +452,7 @@ static struct clk_lookup bcm6362_clks[] = { | |||
447 | CLKDEV_INIT(NULL, "periph", &clk_periph), | 452 | CLKDEV_INIT(NULL, "periph", &clk_periph), |
448 | CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), | 453 | CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), |
449 | CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), | 454 | CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), |
455 | CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), | ||
450 | /* gated clocks */ | 456 | /* gated clocks */ |
451 | CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), | 457 | CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), |
452 | CLKDEV_INIT(NULL, "usbh", &clk_usbh), | 458 | CLKDEV_INIT(NULL, "usbh", &clk_usbh), |
@@ -481,7 +487,7 @@ static int __init bcm63xx_clk_init(void) | |||
481 | clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); | 487 | clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); |
482 | break; | 488 | break; |
483 | case BCM6328_CPU_ID: | 489 | case BCM6328_CPU_ID: |
484 | clk_hsspi.rate = HSSPI_PLL_HZ_6328; | 490 | clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328; |
485 | clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); | 491 | clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); |
486 | break; | 492 | break; |
487 | case BCM6338_CPU_ID: | 493 | case BCM6338_CPU_ID: |
@@ -497,7 +503,7 @@ static int __init bcm63xx_clk_init(void) | |||
497 | clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); | 503 | clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); |
498 | break; | 504 | break; |
499 | case BCM6362_CPU_ID: | 505 | case BCM6362_CPU_ID: |
500 | clk_hsspi.rate = HSSPI_PLL_HZ_6362; | 506 | clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362; |
501 | clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); | 507 | clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); |
502 | break; | 508 | break; |
503 | case BCM6368_CPU_ID: | 509 | case BCM6368_CPU_ID: |