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-rw-r--r--drivers/regulator/s2mps11.c259
1 files changed, 85 insertions, 174 deletions
diff --git a/drivers/regulator/s2mps11.c b/drivers/regulator/s2mps11.c
index 3dede776a837..adab82d5279f 100644
--- a/drivers/regulator/s2mps11.c
+++ b/drivers/regulator/s2mps11.c
@@ -255,28 +255,14 @@ static struct regulator_ops s2mps11_buck_ops = {
255 .set_ramp_delay = s2mps11_set_ramp_delay, 255 .set_ramp_delay = s2mps11_set_ramp_delay,
256}; 256};
257 257
258#define regulator_desc_s2mps11_ldo1(num) { \ 258#define regulator_desc_s2mps11_ldo(num, step) { \
259 .name = "LDO"#num, \ 259 .name = "LDO"#num, \
260 .id = S2MPS11_LDO##num, \ 260 .id = S2MPS11_LDO##num, \
261 .ops = &s2mps11_ldo_ops, \ 261 .ops = &s2mps11_ldo_ops, \
262 .type = REGULATOR_VOLTAGE, \ 262 .type = REGULATOR_VOLTAGE, \
263 .owner = THIS_MODULE, \ 263 .owner = THIS_MODULE, \
264 .min_uV = MIN_800_MV, \ 264 .min_uV = MIN_800_MV, \
265 .uV_step = STEP_50_MV, \ 265 .uV_step = step, \
266 .n_voltages = S2MPS11_LDO_N_VOLTAGES, \
267 .vsel_reg = S2MPS11_REG_L1CTRL + num - 1, \
268 .vsel_mask = S2MPS11_LDO_VSEL_MASK, \
269 .enable_reg = S2MPS11_REG_L1CTRL + num - 1, \
270 .enable_mask = S2MPS11_ENABLE_MASK \
271}
272#define regulator_desc_s2mps11_ldo2(num) { \
273 .name = "LDO"#num, \
274 .id = S2MPS11_LDO##num, \
275 .ops = &s2mps11_ldo_ops, \
276 .type = REGULATOR_VOLTAGE, \
277 .owner = THIS_MODULE, \
278 .min_uV = MIN_800_MV, \
279 .uV_step = STEP_25_MV, \
280 .n_voltages = S2MPS11_LDO_N_VOLTAGES, \ 266 .n_voltages = S2MPS11_LDO_N_VOLTAGES, \
281 .vsel_reg = S2MPS11_REG_L1CTRL + num - 1, \ 267 .vsel_reg = S2MPS11_REG_L1CTRL + num - 1, \
282 .vsel_mask = S2MPS11_LDO_VSEL_MASK, \ 268 .vsel_mask = S2MPS11_LDO_VSEL_MASK, \
@@ -316,14 +302,14 @@ static struct regulator_ops s2mps11_buck_ops = {
316 .enable_mask = S2MPS11_ENABLE_MASK \ 302 .enable_mask = S2MPS11_ENABLE_MASK \
317} 303}
318 304
319#define regulator_desc_s2mps11_buck6_8(num) { \ 305#define regulator_desc_s2mps11_buck6_10(num, min, step) { \
320 .name = "BUCK"#num, \ 306 .name = "BUCK"#num, \
321 .id = S2MPS11_BUCK##num, \ 307 .id = S2MPS11_BUCK##num, \
322 .ops = &s2mps11_buck_ops, \ 308 .ops = &s2mps11_buck_ops, \
323 .type = REGULATOR_VOLTAGE, \ 309 .type = REGULATOR_VOLTAGE, \
324 .owner = THIS_MODULE, \ 310 .owner = THIS_MODULE, \
325 .min_uV = MIN_600_MV, \ 311 .min_uV = min, \
326 .uV_step = STEP_6_25_MV, \ 312 .uV_step = step, \
327 .n_voltages = S2MPS11_BUCK_N_VOLTAGES, \ 313 .n_voltages = S2MPS11_BUCK_N_VOLTAGES, \
328 .ramp_delay = S2MPS11_RAMP_DELAY, \ 314 .ramp_delay = S2MPS11_RAMP_DELAY, \
329 .vsel_reg = S2MPS11_REG_B6CTRL2 + (num - 6) * 2, \ 315 .vsel_reg = S2MPS11_REG_B6CTRL2 + (num - 6) * 2, \
@@ -332,87 +318,55 @@ static struct regulator_ops s2mps11_buck_ops = {
332 .enable_mask = S2MPS11_ENABLE_MASK \ 318 .enable_mask = S2MPS11_ENABLE_MASK \
333} 319}
334 320
335#define regulator_desc_s2mps11_buck9 { \
336 .name = "BUCK9", \
337 .id = S2MPS11_BUCK9, \
338 .ops = &s2mps11_buck_ops, \
339 .type = REGULATOR_VOLTAGE, \
340 .owner = THIS_MODULE, \
341 .min_uV = MIN_3000_MV, \
342 .uV_step = STEP_25_MV, \
343 .n_voltages = S2MPS11_BUCK_N_VOLTAGES, \
344 .ramp_delay = S2MPS11_RAMP_DELAY, \
345 .vsel_reg = S2MPS11_REG_B9CTRL2, \
346 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \
347 .enable_reg = S2MPS11_REG_B9CTRL1, \
348 .enable_mask = S2MPS11_ENABLE_MASK \
349}
350
351#define regulator_desc_s2mps11_buck10 { \
352 .name = "BUCK10", \
353 .id = S2MPS11_BUCK10, \
354 .ops = &s2mps11_buck_ops, \
355 .type = REGULATOR_VOLTAGE, \
356 .owner = THIS_MODULE, \
357 .min_uV = MIN_750_MV, \
358 .uV_step = STEP_12_5_MV, \
359 .n_voltages = S2MPS11_BUCK_N_VOLTAGES, \
360 .ramp_delay = S2MPS11_RAMP_DELAY, \
361 .vsel_reg = S2MPS11_REG_B10CTRL2, \
362 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \
363 .enable_reg = S2MPS11_REG_B10CTRL1, \
364 .enable_mask = S2MPS11_ENABLE_MASK \
365}
366
367static const struct regulator_desc s2mps11_regulators[] = { 321static const struct regulator_desc s2mps11_regulators[] = {
368 regulator_desc_s2mps11_ldo2(1), 322 regulator_desc_s2mps11_ldo(1, STEP_25_MV),
369 regulator_desc_s2mps11_ldo1(2), 323 regulator_desc_s2mps11_ldo(2, STEP_50_MV),
370 regulator_desc_s2mps11_ldo1(3), 324 regulator_desc_s2mps11_ldo(3, STEP_50_MV),
371 regulator_desc_s2mps11_ldo1(4), 325 regulator_desc_s2mps11_ldo(4, STEP_50_MV),
372 regulator_desc_s2mps11_ldo1(5), 326 regulator_desc_s2mps11_ldo(5, STEP_50_MV),
373 regulator_desc_s2mps11_ldo2(6), 327 regulator_desc_s2mps11_ldo(6, STEP_25_MV),
374 regulator_desc_s2mps11_ldo1(7), 328 regulator_desc_s2mps11_ldo(7, STEP_50_MV),
375 regulator_desc_s2mps11_ldo1(8), 329 regulator_desc_s2mps11_ldo(8, STEP_50_MV),
376 regulator_desc_s2mps11_ldo1(9), 330 regulator_desc_s2mps11_ldo(9, STEP_50_MV),
377 regulator_desc_s2mps11_ldo1(10), 331 regulator_desc_s2mps11_ldo(10, STEP_50_MV),
378 regulator_desc_s2mps11_ldo2(11), 332 regulator_desc_s2mps11_ldo(11, STEP_25_MV),
379 regulator_desc_s2mps11_ldo1(12), 333 regulator_desc_s2mps11_ldo(12, STEP_50_MV),
380 regulator_desc_s2mps11_ldo1(13), 334 regulator_desc_s2mps11_ldo(13, STEP_50_MV),
381 regulator_desc_s2mps11_ldo1(14), 335 regulator_desc_s2mps11_ldo(14, STEP_50_MV),
382 regulator_desc_s2mps11_ldo1(15), 336 regulator_desc_s2mps11_ldo(15, STEP_50_MV),
383 regulator_desc_s2mps11_ldo1(16), 337 regulator_desc_s2mps11_ldo(16, STEP_50_MV),
384 regulator_desc_s2mps11_ldo1(17), 338 regulator_desc_s2mps11_ldo(17, STEP_50_MV),
385 regulator_desc_s2mps11_ldo1(18), 339 regulator_desc_s2mps11_ldo(18, STEP_50_MV),
386 regulator_desc_s2mps11_ldo1(19), 340 regulator_desc_s2mps11_ldo(19, STEP_50_MV),
387 regulator_desc_s2mps11_ldo1(20), 341 regulator_desc_s2mps11_ldo(20, STEP_50_MV),
388 regulator_desc_s2mps11_ldo1(21), 342 regulator_desc_s2mps11_ldo(21, STEP_50_MV),
389 regulator_desc_s2mps11_ldo2(22), 343 regulator_desc_s2mps11_ldo(22, STEP_25_MV),
390 regulator_desc_s2mps11_ldo2(23), 344 regulator_desc_s2mps11_ldo(23, STEP_25_MV),
391 regulator_desc_s2mps11_ldo1(24), 345 regulator_desc_s2mps11_ldo(24, STEP_50_MV),
392 regulator_desc_s2mps11_ldo1(25), 346 regulator_desc_s2mps11_ldo(25, STEP_50_MV),
393 regulator_desc_s2mps11_ldo1(26), 347 regulator_desc_s2mps11_ldo(26, STEP_50_MV),
394 regulator_desc_s2mps11_ldo2(27), 348 regulator_desc_s2mps11_ldo(27, STEP_25_MV),
395 regulator_desc_s2mps11_ldo1(28), 349 regulator_desc_s2mps11_ldo(28, STEP_50_MV),
396 regulator_desc_s2mps11_ldo1(29), 350 regulator_desc_s2mps11_ldo(29, STEP_50_MV),
397 regulator_desc_s2mps11_ldo1(30), 351 regulator_desc_s2mps11_ldo(30, STEP_50_MV),
398 regulator_desc_s2mps11_ldo1(31), 352 regulator_desc_s2mps11_ldo(31, STEP_50_MV),
399 regulator_desc_s2mps11_ldo1(32), 353 regulator_desc_s2mps11_ldo(32, STEP_50_MV),
400 regulator_desc_s2mps11_ldo1(33), 354 regulator_desc_s2mps11_ldo(33, STEP_50_MV),
401 regulator_desc_s2mps11_ldo1(34), 355 regulator_desc_s2mps11_ldo(34, STEP_50_MV),
402 regulator_desc_s2mps11_ldo1(35), 356 regulator_desc_s2mps11_ldo(35, STEP_50_MV),
403 regulator_desc_s2mps11_ldo1(36), 357 regulator_desc_s2mps11_ldo(36, STEP_50_MV),
404 regulator_desc_s2mps11_ldo1(37), 358 regulator_desc_s2mps11_ldo(37, STEP_50_MV),
405 regulator_desc_s2mps11_ldo1(38), 359 regulator_desc_s2mps11_ldo(38, STEP_50_MV),
406 regulator_desc_s2mps11_buck1_4(1), 360 regulator_desc_s2mps11_buck1_4(1),
407 regulator_desc_s2mps11_buck1_4(2), 361 regulator_desc_s2mps11_buck1_4(2),
408 regulator_desc_s2mps11_buck1_4(3), 362 regulator_desc_s2mps11_buck1_4(3),
409 regulator_desc_s2mps11_buck1_4(4), 363 regulator_desc_s2mps11_buck1_4(4),
410 regulator_desc_s2mps11_buck5, 364 regulator_desc_s2mps11_buck5,
411 regulator_desc_s2mps11_buck6_8(6), 365 regulator_desc_s2mps11_buck6_10(6, MIN_600_MV, STEP_6_25_MV),
412 regulator_desc_s2mps11_buck6_8(7), 366 regulator_desc_s2mps11_buck6_10(7, MIN_600_MV, STEP_6_25_MV),
413 regulator_desc_s2mps11_buck6_8(8), 367 regulator_desc_s2mps11_buck6_10(8, MIN_600_MV, STEP_6_25_MV),
414 regulator_desc_s2mps11_buck9, 368 regulator_desc_s2mps11_buck6_10(9, MIN_3000_MV, STEP_25_MV),
415 regulator_desc_s2mps11_buck10, 369 regulator_desc_s2mps11_buck6_10(10, MIN_750_MV, STEP_12_5_MV),
416}; 370};
417 371
418static int s2mps14_regulator_enable(struct regulator_dev *rdev) 372static int s2mps14_regulator_enable(struct regulator_dev *rdev)
@@ -510,56 +464,29 @@ static struct regulator_ops s2mps14_reg_ops = {
510 .set_suspend_disable = s2mps14_regulator_set_suspend_disable, 464 .set_suspend_disable = s2mps14_regulator_set_suspend_disable,
511}; 465};
512 466
513#define regulator_desc_s2mps14_ldo1(num) { \ 467#define regulator_desc_s2mps14_ldo(num, min, step) { \
514 .name = "LDO"#num, \ 468 .name = "LDO"#num, \
515 .id = S2MPS14_LDO##num, \ 469 .id = S2MPS14_LDO##num, \
516 .ops = &s2mps14_reg_ops, \ 470 .ops = &s2mps14_reg_ops, \
517 .type = REGULATOR_VOLTAGE, \ 471 .type = REGULATOR_VOLTAGE, \
518 .owner = THIS_MODULE, \ 472 .owner = THIS_MODULE, \
519 .min_uV = MIN_800_MV, \ 473 .min_uV = min, \
520 .uV_step = STEP_25_MV, \ 474 .uV_step = step, \
521 .n_voltages = S2MPS14_LDO_N_VOLTAGES, \ 475 .n_voltages = S2MPS14_LDO_N_VOLTAGES, \
522 .vsel_reg = S2MPS14_REG_L1CTRL + num - 1, \ 476 .vsel_reg = S2MPS14_REG_L1CTRL + num - 1, \
523 .vsel_mask = S2MPS14_LDO_VSEL_MASK, \ 477 .vsel_mask = S2MPS14_LDO_VSEL_MASK, \
524 .enable_reg = S2MPS14_REG_L1CTRL + num - 1, \ 478 .enable_reg = S2MPS14_REG_L1CTRL + num - 1, \
525 .enable_mask = S2MPS14_ENABLE_MASK \ 479 .enable_mask = S2MPS14_ENABLE_MASK \
526} 480}
527#define regulator_desc_s2mps14_ldo2(num) { \ 481
528 .name = "LDO"#num, \ 482#define regulator_desc_s2mps14_buck(num, min, step) { \
529 .id = S2MPS14_LDO##num, \
530 .ops = &s2mps14_reg_ops, \
531 .type = REGULATOR_VOLTAGE, \
532 .owner = THIS_MODULE, \
533 .min_uV = MIN_1800_MV, \
534 .uV_step = STEP_25_MV, \
535 .n_voltages = S2MPS14_LDO_N_VOLTAGES, \
536 .vsel_reg = S2MPS14_REG_L1CTRL + num - 1, \
537 .vsel_mask = S2MPS14_LDO_VSEL_MASK, \
538 .enable_reg = S2MPS14_REG_L1CTRL + num - 1, \
539 .enable_mask = S2MPS14_ENABLE_MASK \
540}
541#define regulator_desc_s2mps14_ldo3(num) { \
542 .name = "LDO"#num, \
543 .id = S2MPS14_LDO##num, \
544 .ops = &s2mps14_reg_ops, \
545 .type = REGULATOR_VOLTAGE, \
546 .owner = THIS_MODULE, \
547 .min_uV = MIN_800_MV, \
548 .uV_step = STEP_12_5_MV, \
549 .n_voltages = S2MPS14_LDO_N_VOLTAGES, \
550 .vsel_reg = S2MPS14_REG_L1CTRL + num - 1, \
551 .vsel_mask = S2MPS14_LDO_VSEL_MASK, \
552 .enable_reg = S2MPS14_REG_L1CTRL + num - 1, \
553 .enable_mask = S2MPS14_ENABLE_MASK \
554}
555#define regulator_desc_s2mps14_buck1235(num) { \
556 .name = "BUCK"#num, \ 483 .name = "BUCK"#num, \
557 .id = S2MPS14_BUCK##num, \ 484 .id = S2MPS14_BUCK##num, \
558 .ops = &s2mps14_reg_ops, \ 485 .ops = &s2mps14_reg_ops, \
559 .type = REGULATOR_VOLTAGE, \ 486 .type = REGULATOR_VOLTAGE, \
560 .owner = THIS_MODULE, \ 487 .owner = THIS_MODULE, \
561 .min_uV = MIN_600_MV, \ 488 .min_uV = min, \
562 .uV_step = STEP_6_25_MV, \ 489 .uV_step = step, \
563 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ 490 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \
564 .linear_min_sel = S2MPS14_BUCK1235_START_SEL, \ 491 .linear_min_sel = S2MPS14_BUCK1235_START_SEL, \
565 .ramp_delay = S2MPS14_BUCK_RAMP_DELAY, \ 492 .ramp_delay = S2MPS14_BUCK_RAMP_DELAY, \
@@ -568,54 +495,38 @@ static struct regulator_ops s2mps14_reg_ops = {
568 .enable_reg = S2MPS14_REG_B1CTRL1 + (num - 1) * 2, \ 495 .enable_reg = S2MPS14_REG_B1CTRL1 + (num - 1) * 2, \
569 .enable_mask = S2MPS14_ENABLE_MASK \ 496 .enable_mask = S2MPS14_ENABLE_MASK \
570} 497}
571#define regulator_desc_s2mps14_buck4(num) { \
572 .name = "BUCK"#num, \
573 .id = S2MPS14_BUCK##num, \
574 .ops = &s2mps14_reg_ops, \
575 .type = REGULATOR_VOLTAGE, \
576 .owner = THIS_MODULE, \
577 .min_uV = MIN_1400_MV, \
578 .uV_step = STEP_12_5_MV, \
579 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \
580 .linear_min_sel = S2MPS14_BUCK4_START_SEL, \
581 .ramp_delay = S2MPS14_BUCK_RAMP_DELAY, \
582 .vsel_reg = S2MPS14_REG_B1CTRL2 + (num - 1) * 2, \
583 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \
584 .enable_reg = S2MPS14_REG_B1CTRL1 + (num - 1) * 2, \
585 .enable_mask = S2MPS14_ENABLE_MASK \
586}
587 498
588static const struct regulator_desc s2mps14_regulators[] = { 499static const struct regulator_desc s2mps14_regulators[] = {
589 regulator_desc_s2mps14_ldo3(1), 500 regulator_desc_s2mps14_ldo(1, MIN_800_MV, STEP_12_5_MV),
590 regulator_desc_s2mps14_ldo3(2), 501 regulator_desc_s2mps14_ldo(2, MIN_800_MV, STEP_12_5_MV),
591 regulator_desc_s2mps14_ldo1(3), 502 regulator_desc_s2mps14_ldo(3, MIN_800_MV, STEP_25_MV),
592 regulator_desc_s2mps14_ldo1(4), 503 regulator_desc_s2mps14_ldo(4, MIN_800_MV, STEP_25_MV),
593 regulator_desc_s2mps14_ldo3(5), 504 regulator_desc_s2mps14_ldo(5, MIN_800_MV, STEP_12_5_MV),
594 regulator_desc_s2mps14_ldo3(6), 505 regulator_desc_s2mps14_ldo(6, MIN_800_MV, STEP_12_5_MV),
595 regulator_desc_s2mps14_ldo1(7), 506 regulator_desc_s2mps14_ldo(7, MIN_800_MV, STEP_25_MV),
596 regulator_desc_s2mps14_ldo2(8), 507 regulator_desc_s2mps14_ldo(8, MIN_1800_MV, STEP_25_MV),
597 regulator_desc_s2mps14_ldo3(9), 508 regulator_desc_s2mps14_ldo(9, MIN_800_MV, STEP_12_5_MV),
598 regulator_desc_s2mps14_ldo3(10), 509 regulator_desc_s2mps14_ldo(10, MIN_800_MV, STEP_12_5_MV),
599 regulator_desc_s2mps14_ldo1(11), 510 regulator_desc_s2mps14_ldo(11, MIN_800_MV, STEP_25_MV),
600 regulator_desc_s2mps14_ldo2(12), 511 regulator_desc_s2mps14_ldo(12, MIN_1800_MV, STEP_25_MV),
601 regulator_desc_s2mps14_ldo2(13), 512 regulator_desc_s2mps14_ldo(13, MIN_1800_MV, STEP_25_MV),
602 regulator_desc_s2mps14_ldo2(14), 513 regulator_desc_s2mps14_ldo(14, MIN_1800_MV, STEP_25_MV),
603 regulator_desc_s2mps14_ldo2(15), 514 regulator_desc_s2mps14_ldo(15, MIN_1800_MV, STEP_25_MV),
604 regulator_desc_s2mps14_ldo2(16), 515 regulator_desc_s2mps14_ldo(16, MIN_1800_MV, STEP_25_MV),
605 regulator_desc_s2mps14_ldo2(17), 516 regulator_desc_s2mps14_ldo(17, MIN_1800_MV, STEP_25_MV),
606 regulator_desc_s2mps14_ldo2(18), 517 regulator_desc_s2mps14_ldo(18, MIN_1800_MV, STEP_25_MV),
607 regulator_desc_s2mps14_ldo1(19), 518 regulator_desc_s2mps14_ldo(19, MIN_800_MV, STEP_25_MV),
608 regulator_desc_s2mps14_ldo1(20), 519 regulator_desc_s2mps14_ldo(20, MIN_800_MV, STEP_25_MV),
609 regulator_desc_s2mps14_ldo1(21), 520 regulator_desc_s2mps14_ldo(21, MIN_800_MV, STEP_25_MV),
610 regulator_desc_s2mps14_ldo3(22), 521 regulator_desc_s2mps14_ldo(22, MIN_800_MV, STEP_12_5_MV),
611 regulator_desc_s2mps14_ldo1(23), 522 regulator_desc_s2mps14_ldo(23, MIN_800_MV, STEP_25_MV),
612 regulator_desc_s2mps14_ldo2(24), 523 regulator_desc_s2mps14_ldo(24, MIN_1800_MV, STEP_25_MV),
613 regulator_desc_s2mps14_ldo2(25), 524 regulator_desc_s2mps14_ldo(25, MIN_1800_MV, STEP_25_MV),
614 regulator_desc_s2mps14_buck1235(1), 525 regulator_desc_s2mps14_buck(1, MIN_600_MV, STEP_6_25_MV),
615 regulator_desc_s2mps14_buck1235(2), 526 regulator_desc_s2mps14_buck(2, MIN_600_MV, STEP_6_25_MV),
616 regulator_desc_s2mps14_buck1235(3), 527 regulator_desc_s2mps14_buck(3, MIN_600_MV, STEP_6_25_MV),
617 regulator_desc_s2mps14_buck4(4), 528 regulator_desc_s2mps14_buck(4, MIN_1400_MV, STEP_12_5_MV),
618 regulator_desc_s2mps14_buck1235(5), 529 regulator_desc_s2mps14_buck(5, MIN_600_MV, STEP_6_25_MV),
619}; 530};
620 531
621static int s2mps14_pmic_enable_ext_control(struct s2mps11_info *s2mps11, 532static int s2mps14_pmic_enable_ext_control(struct s2mps11_info *s2mps11,