diff options
-rw-r--r-- | drivers/mtd/nand/fsl_ifc_nand.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index c30ac7b83d28..5387cec53c9a 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c | |||
@@ -375,21 +375,31 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, | |||
375 | 375 | ||
376 | return; | 376 | return; |
377 | 377 | ||
378 | /* READID must read all 8 possible bytes */ | ||
379 | case NAND_CMD_READID: | 378 | case NAND_CMD_READID: |
379 | case NAND_CMD_PARAM: { | ||
380 | int timing = IFC_FIR_OP_RB; | ||
381 | if (command == NAND_CMD_PARAM) | ||
382 | timing = IFC_FIR_OP_RBCD; | ||
383 | |||
380 | out_be32(&ifc->ifc_nand.nand_fir0, | 384 | out_be32(&ifc->ifc_nand.nand_fir0, |
381 | (IFC_FIR_OP_CMD0 << IFC_NAND_FIR0_OP0_SHIFT) | | 385 | (IFC_FIR_OP_CMD0 << IFC_NAND_FIR0_OP0_SHIFT) | |
382 | (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) | | 386 | (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) | |
383 | (IFC_FIR_OP_RB << IFC_NAND_FIR0_OP2_SHIFT)); | 387 | (timing << IFC_NAND_FIR0_OP2_SHIFT)); |
384 | out_be32(&ifc->ifc_nand.nand_fcr0, | 388 | out_be32(&ifc->ifc_nand.nand_fcr0, |
385 | NAND_CMD_READID << IFC_NAND_FCR0_CMD0_SHIFT); | 389 | command << IFC_NAND_FCR0_CMD0_SHIFT); |
386 | /* 8 bytes for manuf, device and exts */ | 390 | out_be32(&ifc->ifc_nand.row3, column); |
387 | out_be32(&ifc->ifc_nand.nand_fbcr, 8); | 391 | |
388 | ifc_nand_ctrl->read_bytes = 8; | 392 | /* |
393 | * although currently it's 8 bytes for READID, we always read | ||
394 | * the maximum 256 bytes(for PARAM) | ||
395 | */ | ||
396 | out_be32(&ifc->ifc_nand.nand_fbcr, 256); | ||
397 | ifc_nand_ctrl->read_bytes = 256; | ||
389 | 398 | ||
390 | set_addr(mtd, 0, 0, 0); | 399 | set_addr(mtd, 0, 0, 0); |
391 | fsl_ifc_run_command(mtd); | 400 | fsl_ifc_run_command(mtd); |
392 | return; | 401 | return; |
402 | } | ||
393 | 403 | ||
394 | /* ERASE1 stores the block and page address */ | 404 | /* ERASE1 stores the block and page address */ |
395 | case NAND_CMD_ERASE1: | 405 | case NAND_CMD_ERASE1: |