aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/x86/kvm/lapic.c14
-rw-r--r--arch/x86/kvm/lapic.h1
2 files changed, 9 insertions, 6 deletions
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index e0f721bfabcb..954e98a8c2e3 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1257,16 +1257,17 @@ static void start_apic_timer(struct kvm_lapic *apic)
1257 1257
1258static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val) 1258static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val)
1259{ 1259{
1260 int nmi_wd_enabled = apic_lvt_nmi_mode(kvm_apic_get_reg(apic, APIC_LVT0)); 1260 bool lvt0_in_nmi_mode = apic_lvt_nmi_mode(lvt0_val);
1261 1261
1262 if (apic_lvt_nmi_mode(lvt0_val)) { 1262 if (apic->lvt0_in_nmi_mode != lvt0_in_nmi_mode) {
1263 if (!nmi_wd_enabled) { 1263 apic->lvt0_in_nmi_mode = lvt0_in_nmi_mode;
1264 if (lvt0_in_nmi_mode) {
1264 apic_debug("Receive NMI setting on APIC_LVT0 " 1265 apic_debug("Receive NMI setting on APIC_LVT0 "
1265 "for cpu %d\n", apic->vcpu->vcpu_id); 1266 "for cpu %d\n", apic->vcpu->vcpu_id);
1266 atomic_inc(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); 1267 atomic_inc(&apic->vcpu->kvm->arch.vapics_in_nmi_mode);
1267 } 1268 } else
1268 } else if (nmi_wd_enabled) 1269 atomic_dec(&apic->vcpu->kvm->arch.vapics_in_nmi_mode);
1269 atomic_dec(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); 1270 }
1270} 1271}
1271 1272
1272static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val) 1273static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
@@ -1597,6 +1598,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event)
1597 if (!(vcpu->kvm->arch.disabled_quirks & KVM_QUIRK_LINT0_REENABLED)) 1598 if (!(vcpu->kvm->arch.disabled_quirks & KVM_QUIRK_LINT0_REENABLED))
1598 apic_set_reg(apic, APIC_LVT0, 1599 apic_set_reg(apic, APIC_LVT0,
1599 SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT)); 1600 SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT));
1601 apic_manage_nmi_watchdog(apic, kvm_apic_get_reg(apic, APIC_LVT0));
1600 1602
1601 apic_set_reg(apic, APIC_DFR, 0xffffffffU); 1603 apic_set_reg(apic, APIC_DFR, 0xffffffffU);
1602 apic_set_spiv(apic, 0xff); 1604 apic_set_spiv(apic, 0xff);
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index f2f4e10ab772..71952748222a 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -26,6 +26,7 @@ struct kvm_lapic {
26 struct kvm_vcpu *vcpu; 26 struct kvm_vcpu *vcpu;
27 bool sw_enabled; 27 bool sw_enabled;
28 bool irr_pending; 28 bool irr_pending;
29 bool lvt0_in_nmi_mode;
29 /* Number of bits set in ISR. */ 30 /* Number of bits set in ISR. */
30 s16 isr_count; 31 s16 isr_count;
31 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */ 32 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */