diff options
186 files changed, 2692 insertions, 2505 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt index 13df9933f4cd..6b4a98f74be3 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt +++ b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt | |||
@@ -25,6 +25,7 @@ Required properties: | |||
25 | ti,tca6416 | 25 | ti,tca6416 |
26 | ti,tca6424 | 26 | ti,tca6424 |
27 | ti,tca9539 | 27 | ti,tca9539 |
28 | onsemi,pca9654 | ||
28 | exar,xra1202 | 29 | exar,xra1202 |
29 | 30 | ||
30 | Example: | 31 | Example: |
diff --git a/Documentation/devicetree/bindings/gpio/gpio-sx150x.txt b/Documentation/devicetree/bindings/gpio/gpio-sx150x.txt index ba2bb84eeac3..c809acb9c71b 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-sx150x.txt +++ b/Documentation/devicetree/bindings/gpio/gpio-sx150x.txt | |||
@@ -5,7 +5,8 @@ Required properties: | |||
5 | 5 | ||
6 | - compatible: should be "semtech,sx1506q", | 6 | - compatible: should be "semtech,sx1506q", |
7 | "semtech,sx1508q", | 7 | "semtech,sx1508q", |
8 | "semtech,sx1509q". | 8 | "semtech,sx1509q", |
9 | "semtech,sx1502q". | ||
9 | 10 | ||
10 | - reg: The I2C slave address for this device. | 11 | - reg: The I2C slave address for this device. |
11 | 12 | ||
diff --git a/Documentation/devicetree/bindings/gpio/gpio-tps65086.txt b/Documentation/devicetree/bindings/gpio/gpio-tps65086.txt new file mode 100644 index 000000000000..ba051074bedc --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-tps65086.txt | |||
@@ -0,0 +1,16 @@ | |||
1 | * TPS65086 GPO Controller bindings | ||
2 | |||
3 | Required properties: | ||
4 | - compatible : Should be "ti,tps65086-gpio". | ||
5 | - gpio-controller : Marks the device node as a GPIO Controller. | ||
6 | - #gpio-cells : Should be two. The first cell is the pin number | ||
7 | and the second cell is used to specify flags. | ||
8 | See ../gpio/gpio.txt for possible values. | ||
9 | |||
10 | Example: | ||
11 | |||
12 | gpio4: gpio { | ||
13 | compatible = "ti,tps65086-gpio"; | ||
14 | gpio-controller; | ||
15 | #gpio-cells = <2>; | ||
16 | }; | ||
diff --git a/MAINTAINERS b/MAINTAINERS index 11073db4c0a0..d38c324191de 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -240,6 +240,12 @@ L: lm-sensors@lm-sensors.org | |||
240 | S: Maintained | 240 | S: Maintained |
241 | F: drivers/hwmon/abituguru3.c | 241 | F: drivers/hwmon/abituguru3.c |
242 | 242 | ||
243 | ACCES 104-IDI-48 GPIO DRIVER | ||
244 | M: "William Breathitt Gray" <vilhelm.gray@gmail.com> | ||
245 | L: linux-gpio@vger.kernel.org | ||
246 | S: Maintained | ||
247 | F: drivers/gpio/gpio-104-idi-48.c | ||
248 | |||
243 | ACCES 104-IDIO-16 GPIO DRIVER | 249 | ACCES 104-IDIO-16 GPIO DRIVER |
244 | M: "William Breathitt Gray" <vilhelm.gray@gmail.com> | 250 | M: "William Breathitt Gray" <vilhelm.gray@gmail.com> |
245 | L: linux-gpio@vger.kernel.org | 251 | L: linux-gpio@vger.kernel.org |
@@ -7821,11 +7827,12 @@ F: drivers/usb/*/*omap* | |||
7821 | F: arch/arm/*omap*/usb* | 7827 | F: arch/arm/*omap*/usb* |
7822 | 7828 | ||
7823 | OMAP GPIO DRIVER | 7829 | OMAP GPIO DRIVER |
7824 | M: Javier Martinez Canillas <javier@dowhile0.org> | 7830 | M: Grygorii Strashko <grygorii.strashko@ti.com> |
7825 | M: Santosh Shilimkar <ssantosh@kernel.org> | 7831 | M: Santosh Shilimkar <ssantosh@kernel.org> |
7826 | M: Kevin Hilman <khilman@deeprootsystems.com> | 7832 | M: Kevin Hilman <khilman@deeprootsystems.com> |
7827 | L: linux-omap@vger.kernel.org | 7833 | L: linux-omap@vger.kernel.org |
7828 | S: Maintained | 7834 | S: Maintained |
7835 | F: Documentation/devicetree/bindings/gpio/gpio-omap.txt | ||
7829 | F: drivers/gpio/gpio-omap.c | 7836 | F: drivers/gpio/gpio-omap.c |
7830 | 7837 | ||
7831 | OMAP/NEWFLOW NANOBONE MACHINE SUPPORT | 7838 | OMAP/NEWFLOW NANOBONE MACHINE SUPPORT |
@@ -8685,6 +8692,12 @@ F: include/sound/pxa2xx-lib.h | |||
8685 | F: sound/arm/pxa* | 8692 | F: sound/arm/pxa* |
8686 | F: sound/soc/pxa/ | 8693 | F: sound/soc/pxa/ |
8687 | 8694 | ||
8695 | PXA GPIO DRIVER | ||
8696 | M: Robert Jarzmik <robert.jarzmik@free.fr> | ||
8697 | L: linux-gpio@vger.kernel.org | ||
8698 | S: Maintained | ||
8699 | F: drivers/gpio/gpio-pxa.c | ||
8700 | |||
8688 | PXA3xx NAND FLASH DRIVER | 8701 | PXA3xx NAND FLASH DRIVER |
8689 | M: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 8702 | M: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
8690 | L: linux-mtd@lists.infradead.org | 8703 | L: linux-mtd@lists.infradead.org |
diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c index c3d964221767..ba3d7d1b28f8 100644 --- a/arch/arm/mach-clps711x/board-autcpu12.c +++ b/arch/arm/mach-clps711x/board-autcpu12.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #include <linux/mtd/partitions.h> | 31 | #include <linux/mtd/partitions.h> |
32 | #include <linux/mtd/nand-gpio.h> | 32 | #include <linux/mtd/nand-gpio.h> |
33 | #include <linux/platform_device.h> | 33 | #include <linux/platform_device.h> |
34 | #include <linux/basic_mmio_gpio.h> | 34 | #include <linux/gpio/driver.h> |
35 | 35 | ||
36 | #include <mach/hardware.h> | 36 | #include <mach/hardware.h> |
37 | #include <asm/sizes.h> | 37 | #include <asm/sizes.h> |
diff --git a/arch/arm/mach-clps711x/board-p720t.c b/arch/arm/mach-clps711x/board-p720t.c index e68dd629bda2..80a16a8b3776 100644 --- a/arch/arm/mach-clps711x/board-p720t.c +++ b/arch/arm/mach-clps711x/board-p720t.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include <linux/leds.h> | 28 | #include <linux/leds.h> |
29 | #include <linux/sizes.h> | 29 | #include <linux/sizes.h> |
30 | #include <linux/backlight.h> | 30 | #include <linux/backlight.h> |
31 | #include <linux/basic_mmio_gpio.h> | 31 | #include <linux/gpio/driver.h> |
32 | #include <linux/platform_device.h> | 32 | #include <linux/platform_device.h> |
33 | #include <linux/mtd/partitions.h> | 33 | #include <linux/mtd/partitions.h> |
34 | #include <linux/mtd/nand-gpio.h> | 34 | #include <linux/mtd/nand-gpio.h> |
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index 703ce31d7379..9986f9a697c8 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c | |||
@@ -17,7 +17,7 @@ | |||
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/mtd/mtd.h> | 18 | #include <linux/mtd/mtd.h> |
19 | #include <linux/mtd/physmap.h> | 19 | #include <linux/mtd/physmap.h> |
20 | #include <linux/basic_mmio_gpio.h> | 20 | #include <linux/gpio/driver.h> |
21 | #include <linux/gpio.h> | 21 | #include <linux/gpio.h> |
22 | #include <linux/regulator/fixed.h> | 22 | #include <linux/regulator/fixed.h> |
23 | #include <linux/regulator/machine.h> | 23 | #include <linux/regulator/machine.h> |
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index a95499ea8706..97e66558c238 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
@@ -11,7 +11,7 @@ | |||
11 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | #include <linux/basic_mmio_gpio.h> | 14 | #include <linux/gpio/driver.h> |
15 | #include <linux/gpio.h> | 15 | #include <linux/gpio.h> |
16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index f776adcdaee8..723f47fefc81 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c | |||
@@ -29,7 +29,7 @@ | |||
29 | #include <linux/pwm_backlight.h> | 29 | #include <linux/pwm_backlight.h> |
30 | #include <linux/dm9000.h> | 30 | #include <linux/dm9000.h> |
31 | #include <linux/gpio_keys.h> | 31 | #include <linux/gpio_keys.h> |
32 | #include <linux/basic_mmio_gpio.h> | 32 | #include <linux/gpio/driver.h> |
33 | #include <linux/spi/spi.h> | 33 | #include <linux/spi/spi.h> |
34 | 34 | ||
35 | #include <linux/platform_data/pca953x.h> | 35 | #include <linux/platform_data/pca953x.h> |
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c index 4f61378c3453..5020057ac7a2 100644 --- a/arch/avr32/mach-at32ap/pio.c +++ b/arch/avr32/mach-at32ap/pio.c | |||
@@ -203,7 +203,7 @@ fail: | |||
203 | 203 | ||
204 | static int direction_input(struct gpio_chip *chip, unsigned offset) | 204 | static int direction_input(struct gpio_chip *chip, unsigned offset) |
205 | { | 205 | { |
206 | struct pio_device *pio = container_of(chip, struct pio_device, chip); | 206 | struct pio_device *pio = gpiochip_get_data(chip); |
207 | u32 mask = 1 << offset; | 207 | u32 mask = 1 << offset; |
208 | 208 | ||
209 | if (!(pio_readl(pio, PSR) & mask)) | 209 | if (!(pio_readl(pio, PSR) & mask)) |
@@ -215,7 +215,7 @@ static int direction_input(struct gpio_chip *chip, unsigned offset) | |||
215 | 215 | ||
216 | static int gpio_get(struct gpio_chip *chip, unsigned offset) | 216 | static int gpio_get(struct gpio_chip *chip, unsigned offset) |
217 | { | 217 | { |
218 | struct pio_device *pio = container_of(chip, struct pio_device, chip); | 218 | struct pio_device *pio = gpiochip_get_data(chip); |
219 | 219 | ||
220 | return (pio_readl(pio, PDSR) >> offset) & 1; | 220 | return (pio_readl(pio, PDSR) >> offset) & 1; |
221 | } | 221 | } |
@@ -224,7 +224,7 @@ static void gpio_set(struct gpio_chip *chip, unsigned offset, int value); | |||
224 | 224 | ||
225 | static int direction_output(struct gpio_chip *chip, unsigned offset, int value) | 225 | static int direction_output(struct gpio_chip *chip, unsigned offset, int value) |
226 | { | 226 | { |
227 | struct pio_device *pio = container_of(chip, struct pio_device, chip); | 227 | struct pio_device *pio = gpiochip_get_data(chip); |
228 | u32 mask = 1 << offset; | 228 | u32 mask = 1 << offset; |
229 | 229 | ||
230 | if (!(pio_readl(pio, PSR) & mask)) | 230 | if (!(pio_readl(pio, PSR) & mask)) |
@@ -237,7 +237,7 @@ static int direction_output(struct gpio_chip *chip, unsigned offset, int value) | |||
237 | 237 | ||
238 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 238 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
239 | { | 239 | { |
240 | struct pio_device *pio = container_of(chip, struct pio_device, chip); | 240 | struct pio_device *pio = gpiochip_get_data(chip); |
241 | u32 mask = 1 << offset; | 241 | u32 mask = 1 << offset; |
242 | 242 | ||
243 | if (value) | 243 | if (value) |
@@ -335,7 +335,7 @@ gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq) | |||
335 | */ | 335 | */ |
336 | static void pio_bank_show(struct seq_file *s, struct gpio_chip *chip) | 336 | static void pio_bank_show(struct seq_file *s, struct gpio_chip *chip) |
337 | { | 337 | { |
338 | struct pio_device *pio = container_of(chip, struct pio_device, chip); | 338 | struct pio_device *pio = gpiochip_get_data(chip); |
339 | u32 psr, osr, imr, pdsr, pusr, ifsr, mdsr; | 339 | u32 psr, osr, imr, pdsr, pusr, ifsr, mdsr; |
340 | unsigned i; | 340 | unsigned i; |
341 | u32 mask; | 341 | u32 mask; |
@@ -397,7 +397,7 @@ static int __init pio_probe(struct platform_device *pdev) | |||
397 | pio->chip.label = pio->name; | 397 | pio->chip.label = pio->name; |
398 | pio->chip.base = pdev->id * 32; | 398 | pio->chip.base = pdev->id * 32; |
399 | pio->chip.ngpio = 32; | 399 | pio->chip.ngpio = 32; |
400 | pio->chip.dev = &pdev->dev; | 400 | pio->chip.parent = &pdev->dev; |
401 | pio->chip.owner = THIS_MODULE; | 401 | pio->chip.owner = THIS_MODULE; |
402 | 402 | ||
403 | pio->chip.direction_input = direction_input; | 403 | pio->chip.direction_input = direction_input; |
@@ -406,7 +406,7 @@ static int __init pio_probe(struct platform_device *pdev) | |||
406 | pio->chip.set = gpio_set; | 406 | pio->chip.set = gpio_set; |
407 | pio->chip.dbg_show = pio_bank_show; | 407 | pio->chip.dbg_show = pio_bank_show; |
408 | 408 | ||
409 | gpiochip_add(&pio->chip); | 409 | gpiochip_add_data(&pio->chip, pio); |
410 | 410 | ||
411 | gpio_irq_setup(pio, irq, gpio_irq_base); | 411 | gpio_irq_setup(pio, irq, gpio_irq_base); |
412 | 412 | ||
diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c index 504899a72966..98067f757fb0 100644 --- a/drivers/bcma/driver_gpio.c +++ b/drivers/bcma/driver_gpio.c | |||
@@ -17,14 +17,9 @@ | |||
17 | 17 | ||
18 | #define BCMA_GPIO_MAX_PINS 32 | 18 | #define BCMA_GPIO_MAX_PINS 32 |
19 | 19 | ||
20 | static inline struct bcma_drv_cc *bcma_gpio_get_cc(struct gpio_chip *chip) | ||
21 | { | ||
22 | return container_of(chip, struct bcma_drv_cc, gpio); | ||
23 | } | ||
24 | |||
25 | static int bcma_gpio_get_value(struct gpio_chip *chip, unsigned gpio) | 20 | static int bcma_gpio_get_value(struct gpio_chip *chip, unsigned gpio) |
26 | { | 21 | { |
27 | struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); | 22 | struct bcma_drv_cc *cc = gpiochip_get_data(chip); |
28 | 23 | ||
29 | return !!bcma_chipco_gpio_in(cc, 1 << gpio); | 24 | return !!bcma_chipco_gpio_in(cc, 1 << gpio); |
30 | } | 25 | } |
@@ -32,14 +27,14 @@ static int bcma_gpio_get_value(struct gpio_chip *chip, unsigned gpio) | |||
32 | static void bcma_gpio_set_value(struct gpio_chip *chip, unsigned gpio, | 27 | static void bcma_gpio_set_value(struct gpio_chip *chip, unsigned gpio, |
33 | int value) | 28 | int value) |
34 | { | 29 | { |
35 | struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); | 30 | struct bcma_drv_cc *cc = gpiochip_get_data(chip); |
36 | 31 | ||
37 | bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); | 32 | bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); |
38 | } | 33 | } |
39 | 34 | ||
40 | static int bcma_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | 35 | static int bcma_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) |
41 | { | 36 | { |
42 | struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); | 37 | struct bcma_drv_cc *cc = gpiochip_get_data(chip); |
43 | 38 | ||
44 | bcma_chipco_gpio_outen(cc, 1 << gpio, 0); | 39 | bcma_chipco_gpio_outen(cc, 1 << gpio, 0); |
45 | return 0; | 40 | return 0; |
@@ -48,7 +43,7 @@ static int bcma_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | |||
48 | static int bcma_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, | 43 | static int bcma_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, |
49 | int value) | 44 | int value) |
50 | { | 45 | { |
51 | struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); | 46 | struct bcma_drv_cc *cc = gpiochip_get_data(chip); |
52 | 47 | ||
53 | bcma_chipco_gpio_outen(cc, 1 << gpio, 1 << gpio); | 48 | bcma_chipco_gpio_outen(cc, 1 << gpio, 1 << gpio); |
54 | bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); | 49 | bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); |
@@ -57,7 +52,7 @@ static int bcma_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, | |||
57 | 52 | ||
58 | static int bcma_gpio_request(struct gpio_chip *chip, unsigned gpio) | 53 | static int bcma_gpio_request(struct gpio_chip *chip, unsigned gpio) |
59 | { | 54 | { |
60 | struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); | 55 | struct bcma_drv_cc *cc = gpiochip_get_data(chip); |
61 | 56 | ||
62 | bcma_chipco_gpio_control(cc, 1 << gpio, 0); | 57 | bcma_chipco_gpio_control(cc, 1 << gpio, 0); |
63 | /* clear pulldown */ | 58 | /* clear pulldown */ |
@@ -70,7 +65,7 @@ static int bcma_gpio_request(struct gpio_chip *chip, unsigned gpio) | |||
70 | 65 | ||
71 | static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio) | 66 | static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio) |
72 | { | 67 | { |
73 | struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); | 68 | struct bcma_drv_cc *cc = gpiochip_get_data(chip); |
74 | 69 | ||
75 | /* clear pullup */ | 70 | /* clear pullup */ |
76 | bcma_chipco_gpio_pullup(cc, 1 << gpio, 0); | 71 | bcma_chipco_gpio_pullup(cc, 1 << gpio, 0); |
@@ -81,7 +76,7 @@ static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio) | |||
81 | static void bcma_gpio_irq_unmask(struct irq_data *d) | 76 | static void bcma_gpio_irq_unmask(struct irq_data *d) |
82 | { | 77 | { |
83 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 78 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
84 | struct bcma_drv_cc *cc = bcma_gpio_get_cc(gc); | 79 | struct bcma_drv_cc *cc = gpiochip_get_data(gc); |
85 | int gpio = irqd_to_hwirq(d); | 80 | int gpio = irqd_to_hwirq(d); |
86 | u32 val = bcma_chipco_gpio_in(cc, BIT(gpio)); | 81 | u32 val = bcma_chipco_gpio_in(cc, BIT(gpio)); |
87 | 82 | ||
@@ -92,7 +87,7 @@ static void bcma_gpio_irq_unmask(struct irq_data *d) | |||
92 | static void bcma_gpio_irq_mask(struct irq_data *d) | 87 | static void bcma_gpio_irq_mask(struct irq_data *d) |
93 | { | 88 | { |
94 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 89 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
95 | struct bcma_drv_cc *cc = bcma_gpio_get_cc(gc); | 90 | struct bcma_drv_cc *cc = gpiochip_get_data(gc); |
96 | int gpio = irqd_to_hwirq(d); | 91 | int gpio = irqd_to_hwirq(d); |
97 | 92 | ||
98 | bcma_chipco_gpio_intmask(cc, BIT(gpio), 0); | 93 | bcma_chipco_gpio_intmask(cc, BIT(gpio), 0); |
@@ -188,7 +183,7 @@ int bcma_gpio_init(struct bcma_drv_cc *cc) | |||
188 | chip->direction_input = bcma_gpio_direction_input; | 183 | chip->direction_input = bcma_gpio_direction_input; |
189 | chip->direction_output = bcma_gpio_direction_output; | 184 | chip->direction_output = bcma_gpio_direction_output; |
190 | chip->owner = THIS_MODULE; | 185 | chip->owner = THIS_MODULE; |
191 | chip->dev = bcma_bus_get_host_dev(bus); | 186 | chip->parent = bcma_bus_get_host_dev(bus); |
192 | #if IS_BUILTIN(CONFIG_OF) | 187 | #if IS_BUILTIN(CONFIG_OF) |
193 | if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC) | 188 | if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC) |
194 | chip->of_node = cc->core->dev.of_node; | 189 | chip->of_node = cc->core->dev.of_node; |
@@ -216,7 +211,7 @@ int bcma_gpio_init(struct bcma_drv_cc *cc) | |||
216 | else | 211 | else |
217 | chip->base = -1; | 212 | chip->base = -1; |
218 | 213 | ||
219 | err = gpiochip_add(chip); | 214 | err = gpiochip_add_data(chip, cc); |
220 | if (err) | 215 | if (err) |
221 | return err; | 216 | return err; |
222 | 217 | ||
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index b18bea08ff25..cb212ebb39ff 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -134,8 +134,8 @@ config GPIO_BCM_KONA | |||
134 | 134 | ||
135 | config GPIO_BRCMSTB | 135 | config GPIO_BRCMSTB |
136 | tristate "BRCMSTB GPIO support" | 136 | tristate "BRCMSTB GPIO support" |
137 | default y if ARCH_BRCMSTB | 137 | default y if (ARCH_BRCMSTB || BMIPS_GENERIC) |
138 | depends on OF_GPIO && (ARCH_BRCMSTB || COMPILE_TEST) | 138 | depends on OF_GPIO && (ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST) |
139 | select GPIO_GENERIC | 139 | select GPIO_GENERIC |
140 | select GPIOLIB_IRQCHIP | 140 | select GPIOLIB_IRQCHIP |
141 | help | 141 | help |
@@ -496,8 +496,21 @@ menu "Port-mapped I/O GPIO drivers" | |||
496 | 496 | ||
497 | config GPIO_104_IDIO_16 | 497 | config GPIO_104_IDIO_16 |
498 | tristate "ACCES 104-IDIO-16 GPIO support" | 498 | tristate "ACCES 104-IDIO-16 GPIO support" |
499 | select GPIOLIB_IRQCHIP | ||
500 | help | ||
501 | Enables GPIO support for the ACCES 104-IDIO-16 family. The base port | ||
502 | address for the device may be set via the idio_16_base module | ||
503 | parameter. The interrupt line number for the device may be set via the | ||
504 | idio_16_irq module parameter. | ||
505 | |||
506 | config GPIO_104_IDI_48 | ||
507 | tristate "ACCES 104-IDI-48 GPIO support" | ||
508 | select GPIOLIB_IRQCHIP | ||
499 | help | 509 | help |
500 | Enables GPIO support for the ACCES 104-IDIO-16 family. | 510 | Enables GPIO support for the ACCES 104-IDI-48 family. The base port |
511 | address for the device may be configured via the idi_48_base module | ||
512 | parameter. The interrupt line number for the device may be configured | ||
513 | via the idi_48_irq module parameter. | ||
501 | 514 | ||
502 | config GPIO_F7188X | 515 | config GPIO_F7188X |
503 | tristate "F71869, F71869A, F71882FG and F71889F GPIO support" | 516 | tristate "F71869, F71869A, F71882FG and F71889F GPIO support" |
@@ -907,7 +920,6 @@ menu "PCI GPIO expanders" | |||
907 | 920 | ||
908 | config GPIO_AMD8111 | 921 | config GPIO_AMD8111 |
909 | tristate "AMD 8111 GPIO driver" | 922 | tristate "AMD 8111 GPIO driver" |
910 | depends on PCI | ||
911 | help | 923 | help |
912 | The AMD 8111 south bridge contains 32 GPIO pins which can be used. | 924 | The AMD 8111 south bridge contains 32 GPIO pins which can be used. |
913 | 925 | ||
@@ -919,7 +931,7 @@ config GPIO_AMD8111 | |||
919 | 931 | ||
920 | config GPIO_BT8XX | 932 | config GPIO_BT8XX |
921 | tristate "BT8XX GPIO abuser" | 933 | tristate "BT8XX GPIO abuser" |
922 | depends on PCI && VIDEO_BT848=n | 934 | depends on VIDEO_BT848=n |
923 | help | 935 | help |
924 | The BT8xx frame grabber chip has 24 GPIO pins that can be abused | 936 | The BT8xx frame grabber chip has 24 GPIO pins that can be abused |
925 | as a cheap PCI GPIO card. | 937 | as a cheap PCI GPIO card. |
@@ -935,14 +947,13 @@ config GPIO_BT8XX | |||
935 | 947 | ||
936 | config GPIO_INTEL_MID | 948 | config GPIO_INTEL_MID |
937 | bool "Intel Mid GPIO support" | 949 | bool "Intel Mid GPIO support" |
938 | depends on PCI && X86 | 950 | depends on X86 |
939 | select GPIOLIB_IRQCHIP | 951 | select GPIOLIB_IRQCHIP |
940 | help | 952 | help |
941 | Say Y here to support Intel Mid GPIO. | 953 | Say Y here to support Intel Mid GPIO. |
942 | 954 | ||
943 | config GPIO_ML_IOH | 955 | config GPIO_ML_IOH |
944 | tristate "OKI SEMICONDUCTOR ML7213 IOH GPIO support" | 956 | tristate "OKI SEMICONDUCTOR ML7213 IOH GPIO support" |
945 | depends on PCI | ||
946 | select GENERIC_IRQ_CHIP | 957 | select GENERIC_IRQ_CHIP |
947 | help | 958 | help |
948 | ML7213 is companion chip for Intel Atom E6xx series. | 959 | ML7213 is companion chip for Intel Atom E6xx series. |
@@ -952,7 +963,7 @@ config GPIO_ML_IOH | |||
952 | 963 | ||
953 | config GPIO_PCH | 964 | config GPIO_PCH |
954 | tristate "Intel EG20T PCH/LAPIS Semiconductor IOH(ML7223/ML7831) GPIO" | 965 | tristate "Intel EG20T PCH/LAPIS Semiconductor IOH(ML7223/ML7831) GPIO" |
955 | depends on PCI && (X86_32 || COMPILE_TEST) | 966 | depends on X86_32 || MIPS || COMPILE_TEST |
956 | select GENERIC_IRQ_CHIP | 967 | select GENERIC_IRQ_CHIP |
957 | help | 968 | help |
958 | This driver is for PCH(Platform controller Hub) GPIO of Intel Topcliff | 969 | This driver is for PCH(Platform controller Hub) GPIO of Intel Topcliff |
@@ -968,7 +979,6 @@ config GPIO_PCH | |||
968 | 979 | ||
969 | config GPIO_RDC321X | 980 | config GPIO_RDC321X |
970 | tristate "RDC R-321x GPIO support" | 981 | tristate "RDC R-321x GPIO support" |
971 | depends on PCI | ||
972 | select MFD_CORE | 982 | select MFD_CORE |
973 | select MFD_RDC321X | 983 | select MFD_RDC321X |
974 | help | 984 | help |
@@ -977,7 +987,7 @@ config GPIO_RDC321X | |||
977 | 987 | ||
978 | config GPIO_SODAVILLE | 988 | config GPIO_SODAVILLE |
979 | bool "Intel Sodaville GPIO support" | 989 | bool "Intel Sodaville GPIO support" |
980 | depends on X86 && PCI && OF | 990 | depends on X86 && OF |
981 | select GPIO_GENERIC | 991 | select GPIO_GENERIC |
982 | select GENERIC_IRQ_CHIP | 992 | select GENERIC_IRQ_CHIP |
983 | help | 993 | help |
@@ -1028,7 +1038,7 @@ menu "USB GPIO expanders" | |||
1028 | 1038 | ||
1029 | config GPIO_VIPERBOARD | 1039 | config GPIO_VIPERBOARD |
1030 | tristate "Viperboard GPIO a & b support" | 1040 | tristate "Viperboard GPIO a & b support" |
1031 | depends on MFD_VIPERBOARD && USB | 1041 | depends on MFD_VIPERBOARD |
1032 | help | 1042 | help |
1033 | Say yes here to access the GPIO signals of Nano River | 1043 | Say yes here to access the GPIO signals of Nano River |
1034 | Technologies Viperboard. There are two GPIO chips on the | 1044 | Technologies Viperboard. There are two GPIO chips on the |
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 986dbd838cea..548e9b5718ee 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile | |||
@@ -13,6 +13,7 @@ obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o | |||
13 | obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o | 13 | obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o |
14 | 14 | ||
15 | obj-$(CONFIG_GPIO_104_IDIO_16) += gpio-104-idio-16.o | 15 | obj-$(CONFIG_GPIO_104_IDIO_16) += gpio-104-idio-16.o |
16 | obj-$(CONFIG_GPIO_104_IDI_48) += gpio-104-idi-48.o | ||
16 | obj-$(CONFIG_GPIO_74X164) += gpio-74x164.o | 17 | obj-$(CONFIG_GPIO_74X164) += gpio-74x164.o |
17 | obj-$(CONFIG_GPIO_74XX_MMIO) += gpio-74xx-mmio.o | 18 | obj-$(CONFIG_GPIO_74XX_MMIO) += gpio-74xx-mmio.o |
18 | obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o | 19 | obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o |
diff --git a/drivers/gpio/gpio-104-idi-48.c b/drivers/gpio/gpio-104-idi-48.c new file mode 100644 index 000000000000..52eed328ce99 --- /dev/null +++ b/drivers/gpio/gpio-104-idi-48.c | |||
@@ -0,0 +1,343 @@ | |||
1 | /* | ||
2 | * GPIO driver for the ACCES 104-IDI-48 family | ||
3 | * Copyright (C) 2015 William Breathitt Gray | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License, version 2, as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, but | ||
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
12 | * General Public License for more details. | ||
13 | */ | ||
14 | #include <linux/bitops.h> | ||
15 | #include <linux/device.h> | ||
16 | #include <linux/errno.h> | ||
17 | #include <linux/gpio/driver.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <linux/ioport.h> | ||
20 | #include <linux/interrupt.h> | ||
21 | #include <linux/irqdesc.h> | ||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/module.h> | ||
24 | #include <linux/moduleparam.h> | ||
25 | #include <linux/platform_device.h> | ||
26 | #include <linux/spinlock.h> | ||
27 | |||
28 | static unsigned idi_48_base; | ||
29 | module_param(idi_48_base, uint, 0); | ||
30 | MODULE_PARM_DESC(idi_48_base, "ACCES 104-IDI-48 base address"); | ||
31 | static unsigned idi_48_irq; | ||
32 | module_param(idi_48_irq, uint, 0); | ||
33 | MODULE_PARM_DESC(idi_48_irq, "ACCES 104-IDI-48 interrupt line number"); | ||
34 | |||
35 | /** | ||
36 | * struct idi_48_gpio - GPIO device private data structure | ||
37 | * @chip: instance of the gpio_chip | ||
38 | * @lock: synchronization lock to prevent I/O race conditions | ||
39 | * @ack_lock: synchronization lock to prevent IRQ handler race conditions | ||
40 | * @irq_mask: input bits affected by interrupts | ||
41 | * @base: base port address of the GPIO device | ||
42 | * @extent: extent of port address region of the GPIO device | ||
43 | * @irq: Interrupt line number | ||
44 | * @cos_enb: Change-Of-State IRQ enable boundaries mask | ||
45 | */ | ||
46 | struct idi_48_gpio { | ||
47 | struct gpio_chip chip; | ||
48 | spinlock_t lock; | ||
49 | spinlock_t ack_lock; | ||
50 | unsigned char irq_mask[6]; | ||
51 | unsigned base; | ||
52 | unsigned extent; | ||
53 | unsigned irq; | ||
54 | unsigned char cos_enb; | ||
55 | }; | ||
56 | |||
57 | static int idi_48_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | ||
58 | { | ||
59 | return 1; | ||
60 | } | ||
61 | |||
62 | static int idi_48_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | ||
63 | { | ||
64 | return 0; | ||
65 | } | ||
66 | |||
67 | static int idi_48_gpio_get(struct gpio_chip *chip, unsigned offset) | ||
68 | { | ||
69 | struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); | ||
70 | unsigned i; | ||
71 | const unsigned register_offset[6] = { 0, 1, 2, 4, 5, 6 }; | ||
72 | unsigned base_offset; | ||
73 | unsigned mask; | ||
74 | |||
75 | for (i = 0; i < 48; i += 8) | ||
76 | if (offset < i + 8) { | ||
77 | base_offset = register_offset[i / 8]; | ||
78 | mask = BIT(offset - i); | ||
79 | |||
80 | return !!(inb(idi48gpio->base + base_offset) & mask); | ||
81 | } | ||
82 | |||
83 | /* The following line should never execute since offset < 48 */ | ||
84 | return 0; | ||
85 | } | ||
86 | |||
87 | static void idi_48_irq_ack(struct irq_data *data) | ||
88 | { | ||
89 | } | ||
90 | |||
91 | static void idi_48_irq_mask(struct irq_data *data) | ||
92 | { | ||
93 | struct gpio_chip *chip = irq_data_get_irq_chip_data(data); | ||
94 | struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); | ||
95 | const unsigned offset = irqd_to_hwirq(data); | ||
96 | unsigned i; | ||
97 | unsigned mask; | ||
98 | unsigned boundary; | ||
99 | unsigned long flags; | ||
100 | |||
101 | for (i = 0; i < 48; i += 8) | ||
102 | if (offset < i + 8) { | ||
103 | mask = BIT(offset - i); | ||
104 | boundary = i / 8; | ||
105 | |||
106 | idi48gpio->irq_mask[boundary] &= ~mask; | ||
107 | |||
108 | if (!idi48gpio->irq_mask[boundary]) { | ||
109 | idi48gpio->cos_enb &= ~BIT(boundary); | ||
110 | |||
111 | spin_lock_irqsave(&idi48gpio->lock, flags); | ||
112 | |||
113 | outb(idi48gpio->cos_enb, idi48gpio->base + 7); | ||
114 | |||
115 | spin_unlock_irqrestore(&idi48gpio->lock, flags); | ||
116 | } | ||
117 | |||
118 | return; | ||
119 | } | ||
120 | } | ||
121 | |||
122 | static void idi_48_irq_unmask(struct irq_data *data) | ||
123 | { | ||
124 | struct gpio_chip *chip = irq_data_get_irq_chip_data(data); | ||
125 | struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); | ||
126 | const unsigned offset = irqd_to_hwirq(data); | ||
127 | unsigned i; | ||
128 | unsigned mask; | ||
129 | unsigned boundary; | ||
130 | unsigned prev_irq_mask; | ||
131 | unsigned long flags; | ||
132 | |||
133 | for (i = 0; i < 48; i += 8) | ||
134 | if (offset < i + 8) { | ||
135 | mask = BIT(offset - i); | ||
136 | boundary = i / 8; | ||
137 | prev_irq_mask = idi48gpio->irq_mask[boundary]; | ||
138 | |||
139 | idi48gpio->irq_mask[boundary] |= mask; | ||
140 | |||
141 | if (!prev_irq_mask) { | ||
142 | idi48gpio->cos_enb |= BIT(boundary); | ||
143 | |||
144 | spin_lock_irqsave(&idi48gpio->lock, flags); | ||
145 | |||
146 | outb(idi48gpio->cos_enb, idi48gpio->base + 7); | ||
147 | |||
148 | spin_unlock_irqrestore(&idi48gpio->lock, flags); | ||
149 | } | ||
150 | |||
151 | return; | ||
152 | } | ||
153 | } | ||
154 | |||
155 | static int idi_48_irq_set_type(struct irq_data *data, unsigned flow_type) | ||
156 | { | ||
157 | /* The only valid irq types are none and both-edges */ | ||
158 | if (flow_type != IRQ_TYPE_NONE && | ||
159 | (flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH) | ||
160 | return -EINVAL; | ||
161 | |||
162 | return 0; | ||
163 | } | ||
164 | |||
165 | static struct irq_chip idi_48_irqchip = { | ||
166 | .name = "104-idi-48", | ||
167 | .irq_ack = idi_48_irq_ack, | ||
168 | .irq_mask = idi_48_irq_mask, | ||
169 | .irq_unmask = idi_48_irq_unmask, | ||
170 | .irq_set_type = idi_48_irq_set_type | ||
171 | }; | ||
172 | |||
173 | static irqreturn_t idi_48_irq_handler(int irq, void *dev_id) | ||
174 | { | ||
175 | struct idi_48_gpio *const idi48gpio = dev_id; | ||
176 | unsigned long cos_status; | ||
177 | unsigned long boundary; | ||
178 | unsigned long irq_mask; | ||
179 | unsigned long bit_num; | ||
180 | unsigned long gpio; | ||
181 | struct gpio_chip *const chip = &idi48gpio->chip; | ||
182 | |||
183 | spin_lock(&idi48gpio->ack_lock); | ||
184 | |||
185 | spin_lock(&idi48gpio->lock); | ||
186 | |||
187 | cos_status = inb(idi48gpio->base + 7); | ||
188 | |||
189 | spin_unlock(&idi48gpio->lock); | ||
190 | |||
191 | /* IRQ Status (bit 6) is active low (0 = IRQ generated by device) */ | ||
192 | if (cos_status & BIT(6)) { | ||
193 | spin_unlock(&idi48gpio->ack_lock); | ||
194 | return IRQ_NONE; | ||
195 | } | ||
196 | |||
197 | /* Bit 0-5 indicate which Change-Of-State boundary triggered the IRQ */ | ||
198 | cos_status &= 0x3F; | ||
199 | |||
200 | for_each_set_bit(boundary, &cos_status, 6) { | ||
201 | irq_mask = idi48gpio->irq_mask[boundary]; | ||
202 | |||
203 | for_each_set_bit(bit_num, &irq_mask, 8) { | ||
204 | gpio = bit_num + boundary * 8; | ||
205 | |||
206 | generic_handle_irq(irq_find_mapping(chip->irqdomain, | ||
207 | gpio)); | ||
208 | } | ||
209 | } | ||
210 | |||
211 | spin_unlock(&idi48gpio->ack_lock); | ||
212 | |||
213 | return IRQ_HANDLED; | ||
214 | } | ||
215 | |||
216 | static int __init idi_48_probe(struct platform_device *pdev) | ||
217 | { | ||
218 | struct device *dev = &pdev->dev; | ||
219 | struct idi_48_gpio *idi48gpio; | ||
220 | const unsigned base = idi_48_base; | ||
221 | const unsigned extent = 8; | ||
222 | const char *const name = dev_name(dev); | ||
223 | int err; | ||
224 | const unsigned irq = idi_48_irq; | ||
225 | |||
226 | idi48gpio = devm_kzalloc(dev, sizeof(*idi48gpio), GFP_KERNEL); | ||
227 | if (!idi48gpio) | ||
228 | return -ENOMEM; | ||
229 | |||
230 | if (!request_region(base, extent, name)) { | ||
231 | dev_err(dev, "Unable to lock %s port addresses (0x%X-0x%X)\n", | ||
232 | name, base, base + extent); | ||
233 | err = -EBUSY; | ||
234 | goto err_lock_io_port; | ||
235 | } | ||
236 | |||
237 | idi48gpio->chip.label = name; | ||
238 | idi48gpio->chip.parent = dev; | ||
239 | idi48gpio->chip.owner = THIS_MODULE; | ||
240 | idi48gpio->chip.base = -1; | ||
241 | idi48gpio->chip.ngpio = 48; | ||
242 | idi48gpio->chip.get_direction = idi_48_gpio_get_direction; | ||
243 | idi48gpio->chip.direction_input = idi_48_gpio_direction_input; | ||
244 | idi48gpio->chip.get = idi_48_gpio_get; | ||
245 | idi48gpio->base = base; | ||
246 | idi48gpio->extent = extent; | ||
247 | idi48gpio->irq = irq; | ||
248 | |||
249 | spin_lock_init(&idi48gpio->lock); | ||
250 | |||
251 | dev_set_drvdata(dev, idi48gpio); | ||
252 | |||
253 | err = gpiochip_add_data(&idi48gpio->chip, idi48gpio); | ||
254 | if (err) { | ||
255 | dev_err(dev, "GPIO registering failed (%d)\n", err); | ||
256 | goto err_gpio_register; | ||
257 | } | ||
258 | |||
259 | /* Disable IRQ by default */ | ||
260 | outb(0, base + 7); | ||
261 | inb(base + 7); | ||
262 | |||
263 | err = gpiochip_irqchip_add(&idi48gpio->chip, &idi_48_irqchip, 0, | ||
264 | handle_edge_irq, IRQ_TYPE_NONE); | ||
265 | if (err) { | ||
266 | dev_err(dev, "Could not add irqchip (%d)\n", err); | ||
267 | goto err_gpiochip_irqchip_add; | ||
268 | } | ||
269 | |||
270 | err = request_irq(irq, idi_48_irq_handler, 0, name, idi48gpio); | ||
271 | if (err) { | ||
272 | dev_err(dev, "IRQ handler registering failed (%d)\n", err); | ||
273 | goto err_request_irq; | ||
274 | } | ||
275 | |||
276 | return 0; | ||
277 | |||
278 | err_request_irq: | ||
279 | err_gpiochip_irqchip_add: | ||
280 | gpiochip_remove(&idi48gpio->chip); | ||
281 | err_gpio_register: | ||
282 | release_region(base, extent); | ||
283 | err_lock_io_port: | ||
284 | return err; | ||
285 | } | ||
286 | |||
287 | static int idi_48_remove(struct platform_device *pdev) | ||
288 | { | ||
289 | struct idi_48_gpio *const idi48gpio = platform_get_drvdata(pdev); | ||
290 | |||
291 | free_irq(idi48gpio->irq, idi48gpio); | ||
292 | gpiochip_remove(&idi48gpio->chip); | ||
293 | release_region(idi48gpio->base, idi48gpio->extent); | ||
294 | |||
295 | return 0; | ||
296 | } | ||
297 | |||
298 | static struct platform_device *idi_48_device; | ||
299 | |||
300 | static struct platform_driver idi_48_driver = { | ||
301 | .driver = { | ||
302 | .name = "104-idi-48" | ||
303 | }, | ||
304 | .remove = idi_48_remove | ||
305 | }; | ||
306 | |||
307 | static void __exit idi_48_exit(void) | ||
308 | { | ||
309 | platform_device_unregister(idi_48_device); | ||
310 | platform_driver_unregister(&idi_48_driver); | ||
311 | } | ||
312 | |||
313 | static int __init idi_48_init(void) | ||
314 | { | ||
315 | int err; | ||
316 | |||
317 | idi_48_device = platform_device_alloc(idi_48_driver.driver.name, -1); | ||
318 | if (!idi_48_device) | ||
319 | return -ENOMEM; | ||
320 | |||
321 | err = platform_device_add(idi_48_device); | ||
322 | if (err) | ||
323 | goto err_platform_device; | ||
324 | |||
325 | err = platform_driver_probe(&idi_48_driver, idi_48_probe); | ||
326 | if (err) | ||
327 | goto err_platform_driver; | ||
328 | |||
329 | return 0; | ||
330 | |||
331 | err_platform_driver: | ||
332 | platform_device_del(idi_48_device); | ||
333 | err_platform_device: | ||
334 | platform_device_put(idi_48_device); | ||
335 | return err; | ||
336 | } | ||
337 | |||
338 | module_init(idi_48_init); | ||
339 | module_exit(idi_48_exit); | ||
340 | |||
341 | MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>"); | ||
342 | MODULE_DESCRIPTION("ACCES 104-IDI-48 GPIO driver"); | ||
343 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/gpio/gpio-104-idio-16.c b/drivers/gpio/gpio-104-idio-16.c index 5400d7d4d8fd..4d69b50b2d84 100644 --- a/drivers/gpio/gpio-104-idio-16.c +++ b/drivers/gpio/gpio-104-idio-16.c | |||
@@ -11,11 +11,14 @@ | |||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
12 | * General Public License for more details. | 12 | * General Public License for more details. |
13 | */ | 13 | */ |
14 | #include <linux/bitops.h> | ||
14 | #include <linux/device.h> | 15 | #include <linux/device.h> |
15 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
16 | #include <linux/gpio/driver.h> | 17 | #include <linux/gpio/driver.h> |
17 | #include <linux/io.h> | 18 | #include <linux/io.h> |
18 | #include <linux/ioport.h> | 19 | #include <linux/ioport.h> |
20 | #include <linux/interrupt.h> | ||
21 | #include <linux/irqdesc.h> | ||
19 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
20 | #include <linux/module.h> | 23 | #include <linux/module.h> |
21 | #include <linux/moduleparam.h> | 24 | #include <linux/moduleparam.h> |
@@ -25,20 +28,27 @@ | |||
25 | static unsigned idio_16_base; | 28 | static unsigned idio_16_base; |
26 | module_param(idio_16_base, uint, 0); | 29 | module_param(idio_16_base, uint, 0); |
27 | MODULE_PARM_DESC(idio_16_base, "ACCES 104-IDIO-16 base address"); | 30 | MODULE_PARM_DESC(idio_16_base, "ACCES 104-IDIO-16 base address"); |
31 | static unsigned idio_16_irq; | ||
32 | module_param(idio_16_irq, uint, 0); | ||
33 | MODULE_PARM_DESC(idio_16_irq, "ACCES 104-IDIO-16 interrupt line number"); | ||
28 | 34 | ||
29 | /** | 35 | /** |
30 | * struct idio_16_gpio - GPIO device private data structure | 36 | * struct idio_16_gpio - GPIO device private data structure |
31 | * @chip: instance of the gpio_chip | 37 | * @chip: instance of the gpio_chip |
32 | * @lock: synchronization lock to prevent gpio_set race conditions | 38 | * @lock: synchronization lock to prevent I/O race conditions |
39 | * @irq_mask: I/O bits affected by interrupts | ||
33 | * @base: base port address of the GPIO device | 40 | * @base: base port address of the GPIO device |
34 | * @extent: extent of port address region of the GPIO device | 41 | * @extent: extent of port address region of the GPIO device |
42 | * @irq: Interrupt line number | ||
35 | * @out_state: output bits state | 43 | * @out_state: output bits state |
36 | */ | 44 | */ |
37 | struct idio_16_gpio { | 45 | struct idio_16_gpio { |
38 | struct gpio_chip chip; | 46 | struct gpio_chip chip; |
39 | spinlock_t lock; | 47 | spinlock_t lock; |
48 | unsigned long irq_mask; | ||
40 | unsigned base; | 49 | unsigned base; |
41 | unsigned extent; | 50 | unsigned extent; |
51 | unsigned irq; | ||
42 | unsigned out_state; | 52 | unsigned out_state; |
43 | }; | 53 | }; |
44 | 54 | ||
@@ -62,29 +72,24 @@ static int idio_16_gpio_direction_output(struct gpio_chip *chip, | |||
62 | return 0; | 72 | return 0; |
63 | } | 73 | } |
64 | 74 | ||
65 | static struct idio_16_gpio *to_idio16gpio(struct gpio_chip *gc) | ||
66 | { | ||
67 | return container_of(gc, struct idio_16_gpio, chip); | ||
68 | } | ||
69 | |||
70 | static int idio_16_gpio_get(struct gpio_chip *chip, unsigned offset) | 75 | static int idio_16_gpio_get(struct gpio_chip *chip, unsigned offset) |
71 | { | 76 | { |
72 | struct idio_16_gpio *const idio16gpio = to_idio16gpio(chip); | 77 | struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); |
73 | const unsigned BIT_MASK = 1U << (offset-16); | 78 | const unsigned mask = BIT(offset-16); |
74 | 79 | ||
75 | if (offset < 16) | 80 | if (offset < 16) |
76 | return -EINVAL; | 81 | return -EINVAL; |
77 | 82 | ||
78 | if (offset < 24) | 83 | if (offset < 24) |
79 | return !!(inb(idio16gpio->base + 1) & BIT_MASK); | 84 | return !!(inb(idio16gpio->base + 1) & mask); |
80 | 85 | ||
81 | return !!(inb(idio16gpio->base + 5) & (BIT_MASK>>8)); | 86 | return !!(inb(idio16gpio->base + 5) & (mask>>8)); |
82 | } | 87 | } |
83 | 88 | ||
84 | static void idio_16_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 89 | static void idio_16_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
85 | { | 90 | { |
86 | struct idio_16_gpio *const idio16gpio = to_idio16gpio(chip); | 91 | struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); |
87 | const unsigned BIT_MASK = 1U << offset; | 92 | const unsigned mask = BIT(offset); |
88 | unsigned long flags; | 93 | unsigned long flags; |
89 | 94 | ||
90 | if (offset > 15) | 95 | if (offset > 15) |
@@ -93,9 +98,9 @@ static void idio_16_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
93 | spin_lock_irqsave(&idio16gpio->lock, flags); | 98 | spin_lock_irqsave(&idio16gpio->lock, flags); |
94 | 99 | ||
95 | if (value) | 100 | if (value) |
96 | idio16gpio->out_state |= BIT_MASK; | 101 | idio16gpio->out_state |= mask; |
97 | else | 102 | else |
98 | idio16gpio->out_state &= ~BIT_MASK; | 103 | idio16gpio->out_state &= ~mask; |
99 | 104 | ||
100 | if (offset > 7) | 105 | if (offset > 7) |
101 | outb(idio16gpio->out_state >> 8, idio16gpio->base + 4); | 106 | outb(idio16gpio->out_state >> 8, idio16gpio->base + 4); |
@@ -105,29 +110,106 @@ static void idio_16_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
105 | spin_unlock_irqrestore(&idio16gpio->lock, flags); | 110 | spin_unlock_irqrestore(&idio16gpio->lock, flags); |
106 | } | 111 | } |
107 | 112 | ||
113 | static void idio_16_irq_ack(struct irq_data *data) | ||
114 | { | ||
115 | } | ||
116 | |||
117 | static void idio_16_irq_mask(struct irq_data *data) | ||
118 | { | ||
119 | struct gpio_chip *chip = irq_data_get_irq_chip_data(data); | ||
120 | struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); | ||
121 | const unsigned long mask = BIT(irqd_to_hwirq(data)); | ||
122 | unsigned long flags; | ||
123 | |||
124 | idio16gpio->irq_mask &= ~mask; | ||
125 | |||
126 | if (!idio16gpio->irq_mask) { | ||
127 | spin_lock_irqsave(&idio16gpio->lock, flags); | ||
128 | |||
129 | outb(0, idio16gpio->base + 2); | ||
130 | |||
131 | spin_unlock_irqrestore(&idio16gpio->lock, flags); | ||
132 | } | ||
133 | } | ||
134 | |||
135 | static void idio_16_irq_unmask(struct irq_data *data) | ||
136 | { | ||
137 | struct gpio_chip *chip = irq_data_get_irq_chip_data(data); | ||
138 | struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); | ||
139 | const unsigned long mask = BIT(irqd_to_hwirq(data)); | ||
140 | const unsigned long prev_irq_mask = idio16gpio->irq_mask; | ||
141 | unsigned long flags; | ||
142 | |||
143 | idio16gpio->irq_mask |= mask; | ||
144 | |||
145 | if (!prev_irq_mask) { | ||
146 | spin_lock_irqsave(&idio16gpio->lock, flags); | ||
147 | |||
148 | inb(idio16gpio->base + 2); | ||
149 | |||
150 | spin_unlock_irqrestore(&idio16gpio->lock, flags); | ||
151 | } | ||
152 | } | ||
153 | |||
154 | static int idio_16_irq_set_type(struct irq_data *data, unsigned flow_type) | ||
155 | { | ||
156 | /* The only valid irq types are none and both-edges */ | ||
157 | if (flow_type != IRQ_TYPE_NONE && | ||
158 | (flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH) | ||
159 | return -EINVAL; | ||
160 | |||
161 | return 0; | ||
162 | } | ||
163 | |||
164 | static struct irq_chip idio_16_irqchip = { | ||
165 | .name = "104-idio-16", | ||
166 | .irq_ack = idio_16_irq_ack, | ||
167 | .irq_mask = idio_16_irq_mask, | ||
168 | .irq_unmask = idio_16_irq_unmask, | ||
169 | .irq_set_type = idio_16_irq_set_type | ||
170 | }; | ||
171 | |||
172 | static irqreturn_t idio_16_irq_handler(int irq, void *dev_id) | ||
173 | { | ||
174 | struct idio_16_gpio *const idio16gpio = dev_id; | ||
175 | struct gpio_chip *const chip = &idio16gpio->chip; | ||
176 | int gpio; | ||
177 | |||
178 | for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio) | ||
179 | generic_handle_irq(irq_find_mapping(chip->irqdomain, gpio)); | ||
180 | |||
181 | spin_lock(&idio16gpio->lock); | ||
182 | |||
183 | outb(0, idio16gpio->base + 1); | ||
184 | |||
185 | spin_unlock(&idio16gpio->lock); | ||
186 | |||
187 | return IRQ_HANDLED; | ||
188 | } | ||
189 | |||
108 | static int __init idio_16_probe(struct platform_device *pdev) | 190 | static int __init idio_16_probe(struct platform_device *pdev) |
109 | { | 191 | { |
110 | struct device *dev = &pdev->dev; | 192 | struct device *dev = &pdev->dev; |
111 | struct idio_16_gpio *idio16gpio; | 193 | struct idio_16_gpio *idio16gpio; |
194 | const unsigned base = idio_16_base; | ||
195 | const unsigned extent = 8; | ||
196 | const char *const name = dev_name(dev); | ||
112 | int err; | 197 | int err; |
113 | 198 | const unsigned irq = idio_16_irq; | |
114 | const unsigned BASE = idio_16_base; | ||
115 | const unsigned EXTENT = 8; | ||
116 | const char *const NAME = dev_name(dev); | ||
117 | 199 | ||
118 | idio16gpio = devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL); | 200 | idio16gpio = devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL); |
119 | if (!idio16gpio) | 201 | if (!idio16gpio) |
120 | return -ENOMEM; | 202 | return -ENOMEM; |
121 | 203 | ||
122 | if (!request_region(BASE, EXTENT, NAME)) { | 204 | if (!request_region(base, extent, name)) { |
123 | dev_err(dev, "Unable to lock %s port addresses (0x%X-0x%X)\n", | 205 | dev_err(dev, "Unable to lock %s port addresses (0x%X-0x%X)\n", |
124 | NAME, BASE, BASE + EXTENT); | 206 | name, base, base + extent); |
125 | err = -EBUSY; | 207 | err = -EBUSY; |
126 | goto err_lock_io_port; | 208 | goto err_lock_io_port; |
127 | } | 209 | } |
128 | 210 | ||
129 | idio16gpio->chip.label = NAME; | 211 | idio16gpio->chip.label = name; |
130 | idio16gpio->chip.dev = dev; | 212 | idio16gpio->chip.parent = dev; |
131 | idio16gpio->chip.owner = THIS_MODULE; | 213 | idio16gpio->chip.owner = THIS_MODULE; |
132 | idio16gpio->chip.base = -1; | 214 | idio16gpio->chip.base = -1; |
133 | idio16gpio->chip.ngpio = 32; | 215 | idio16gpio->chip.ngpio = 32; |
@@ -136,24 +218,45 @@ static int __init idio_16_probe(struct platform_device *pdev) | |||
136 | idio16gpio->chip.direction_output = idio_16_gpio_direction_output; | 218 | idio16gpio->chip.direction_output = idio_16_gpio_direction_output; |
137 | idio16gpio->chip.get = idio_16_gpio_get; | 219 | idio16gpio->chip.get = idio_16_gpio_get; |
138 | idio16gpio->chip.set = idio_16_gpio_set; | 220 | idio16gpio->chip.set = idio_16_gpio_set; |
139 | idio16gpio->base = BASE; | 221 | idio16gpio->base = base; |
140 | idio16gpio->extent = EXTENT; | 222 | idio16gpio->extent = extent; |
223 | idio16gpio->irq = irq; | ||
141 | idio16gpio->out_state = 0xFFFF; | 224 | idio16gpio->out_state = 0xFFFF; |
142 | 225 | ||
143 | spin_lock_init(&idio16gpio->lock); | 226 | spin_lock_init(&idio16gpio->lock); |
144 | 227 | ||
145 | dev_set_drvdata(dev, idio16gpio); | 228 | dev_set_drvdata(dev, idio16gpio); |
146 | 229 | ||
147 | err = gpiochip_add(&idio16gpio->chip); | 230 | err = gpiochip_add_data(&idio16gpio->chip, idio16gpio); |
148 | if (err) { | 231 | if (err) { |
149 | dev_err(dev, "GPIO registering failed (%d)\n", err); | 232 | dev_err(dev, "GPIO registering failed (%d)\n", err); |
150 | goto err_gpio_register; | 233 | goto err_gpio_register; |
151 | } | 234 | } |
152 | 235 | ||
236 | /* Disable IRQ by default */ | ||
237 | outb(0, base + 2); | ||
238 | outb(0, base + 1); | ||
239 | |||
240 | err = gpiochip_irqchip_add(&idio16gpio->chip, &idio_16_irqchip, 0, | ||
241 | handle_edge_irq, IRQ_TYPE_NONE); | ||
242 | if (err) { | ||
243 | dev_err(dev, "Could not add irqchip (%d)\n", err); | ||
244 | goto err_gpiochip_irqchip_add; | ||
245 | } | ||
246 | |||
247 | err = request_irq(irq, idio_16_irq_handler, 0, name, idio16gpio); | ||
248 | if (err) { | ||
249 | dev_err(dev, "IRQ handler registering failed (%d)\n", err); | ||
250 | goto err_request_irq; | ||
251 | } | ||
252 | |||
153 | return 0; | 253 | return 0; |
154 | 254 | ||
255 | err_request_irq: | ||
256 | err_gpiochip_irqchip_add: | ||
257 | gpiochip_remove(&idio16gpio->chip); | ||
155 | err_gpio_register: | 258 | err_gpio_register: |
156 | release_region(BASE, EXTENT); | 259 | release_region(base, extent); |
157 | err_lock_io_port: | 260 | err_lock_io_port: |
158 | return err; | 261 | return err; |
159 | } | 262 | } |
@@ -162,6 +265,7 @@ static int idio_16_remove(struct platform_device *pdev) | |||
162 | { | 265 | { |
163 | struct idio_16_gpio *const idio16gpio = platform_get_drvdata(pdev); | 266 | struct idio_16_gpio *const idio16gpio = platform_get_drvdata(pdev); |
164 | 267 | ||
268 | free_irq(idio16gpio->irq, idio16gpio); | ||
165 | gpiochip_remove(&idio16gpio->chip); | 269 | gpiochip_remove(&idio16gpio->chip); |
166 | release_region(idio16gpio->base, idio16gpio->extent); | 270 | release_region(idio16gpio->base, idio16gpio->extent); |
167 | 271 | ||
diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c index 60172f835d15..c81224ff2dca 100644 --- a/drivers/gpio/gpio-74x164.c +++ b/drivers/gpio/gpio-74x164.c | |||
@@ -20,56 +20,34 @@ | |||
20 | #define GEN_74X164_NUMBER_GPIOS 8 | 20 | #define GEN_74X164_NUMBER_GPIOS 8 |
21 | 21 | ||
22 | struct gen_74x164_chip { | 22 | struct gen_74x164_chip { |
23 | u8 *buffer; | ||
24 | struct gpio_chip gpio_chip; | 23 | struct gpio_chip gpio_chip; |
25 | struct mutex lock; | 24 | struct mutex lock; |
26 | u32 registers; | 25 | u32 registers; |
27 | }; | ||
28 | |||
29 | static struct gen_74x164_chip *gpio_to_74x164_chip(struct gpio_chip *gc) | ||
30 | { | ||
31 | return container_of(gc, struct gen_74x164_chip, gpio_chip); | ||
32 | } | ||
33 | |||
34 | static int __gen_74x164_write_config(struct gen_74x164_chip *chip) | ||
35 | { | ||
36 | struct spi_device *spi = to_spi_device(chip->gpio_chip.dev); | ||
37 | struct spi_message message; | ||
38 | struct spi_transfer *msg_buf; | ||
39 | int i, ret = 0; | ||
40 | |||
41 | msg_buf = kzalloc(chip->registers * sizeof(struct spi_transfer), | ||
42 | GFP_KERNEL); | ||
43 | if (!msg_buf) | ||
44 | return -ENOMEM; | ||
45 | |||
46 | spi_message_init(&message); | ||
47 | |||
48 | /* | 26 | /* |
49 | * Since the registers are chained, every byte sent will make | 27 | * Since the registers are chained, every byte sent will make |
50 | * the previous byte shift to the next register in the | 28 | * the previous byte shift to the next register in the |
51 | * chain. Thus, the first byte send will end up in the last | 29 | * chain. Thus, the first byte sent will end up in the last |
52 | * register at the end of the transfer. So, to have a logical | 30 | * register at the end of the transfer. So, to have a logical |
53 | * numbering, send the bytes in reverse order so that the last | 31 | * numbering, store the bytes in reverse order. |
54 | * byte of the buffer will end up in the last register. | ||
55 | */ | 32 | */ |
56 | for (i = chip->registers - 1; i >= 0; i--) { | 33 | u8 buffer[0]; |
57 | msg_buf[i].tx_buf = chip->buffer + i; | 34 | }; |
58 | msg_buf[i].len = sizeof(u8); | ||
59 | spi_message_add_tail(msg_buf + i, &message); | ||
60 | } | ||
61 | |||
62 | ret = spi_sync(spi, &message); | ||
63 | 35 | ||
64 | kfree(msg_buf); | 36 | static int __gen_74x164_write_config(struct gen_74x164_chip *chip) |
37 | { | ||
38 | struct spi_transfer xfer = { | ||
39 | .tx_buf = chip->buffer, | ||
40 | .len = chip->registers, | ||
41 | }; | ||
65 | 42 | ||
66 | return ret; | 43 | return spi_sync_transfer(to_spi_device(chip->gpio_chip.parent), |
44 | &xfer, 1); | ||
67 | } | 45 | } |
68 | 46 | ||
69 | static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset) | 47 | static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset) |
70 | { | 48 | { |
71 | struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc); | 49 | struct gen_74x164_chip *chip = gpiochip_get_data(gc); |
72 | u8 bank = offset / 8; | 50 | u8 bank = chip->registers - 1 - offset / 8; |
73 | u8 pin = offset % 8; | 51 | u8 pin = offset % 8; |
74 | int ret; | 52 | int ret; |
75 | 53 | ||
@@ -83,8 +61,8 @@ static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset) | |||
83 | static void gen_74x164_set_value(struct gpio_chip *gc, | 61 | static void gen_74x164_set_value(struct gpio_chip *gc, |
84 | unsigned offset, int val) | 62 | unsigned offset, int val) |
85 | { | 63 | { |
86 | struct gen_74x164_chip *chip = gpio_to_74x164_chip(gc); | 64 | struct gen_74x164_chip *chip = gpiochip_get_data(gc); |
87 | u8 bank = offset / 8; | 65 | u8 bank = chip->registers - 1 - offset / 8; |
88 | u8 pin = offset % 8; | 66 | u8 pin = offset % 8; |
89 | 67 | ||
90 | mutex_lock(&chip->lock); | 68 | mutex_lock(&chip->lock); |
@@ -107,6 +85,7 @@ static int gen_74x164_direction_output(struct gpio_chip *gc, | |||
107 | static int gen_74x164_probe(struct spi_device *spi) | 85 | static int gen_74x164_probe(struct spi_device *spi) |
108 | { | 86 | { |
109 | struct gen_74x164_chip *chip; | 87 | struct gen_74x164_chip *chip; |
88 | u32 nregs; | ||
110 | int ret; | 89 | int ret; |
111 | 90 | ||
112 | /* | 91 | /* |
@@ -118,7 +97,14 @@ static int gen_74x164_probe(struct spi_device *spi) | |||
118 | if (ret < 0) | 97 | if (ret < 0) |
119 | return ret; | 98 | return ret; |
120 | 99 | ||
121 | chip = devm_kzalloc(&spi->dev, sizeof(*chip), GFP_KERNEL); | 100 | if (of_property_read_u32(spi->dev.of_node, "registers-number", |
101 | &nregs)) { | ||
102 | dev_err(&spi->dev, | ||
103 | "Missing registers-number property in the DT.\n"); | ||
104 | return -EINVAL; | ||
105 | } | ||
106 | |||
107 | chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL); | ||
122 | if (!chip) | 108 | if (!chip) |
123 | return -ENOMEM; | 109 | return -ENOMEM; |
124 | 110 | ||
@@ -130,20 +116,11 @@ static int gen_74x164_probe(struct spi_device *spi) | |||
130 | chip->gpio_chip.set = gen_74x164_set_value; | 116 | chip->gpio_chip.set = gen_74x164_set_value; |
131 | chip->gpio_chip.base = -1; | 117 | chip->gpio_chip.base = -1; |
132 | 118 | ||
133 | if (of_property_read_u32(spi->dev.of_node, "registers-number", | 119 | chip->registers = nregs; |
134 | &chip->registers)) { | ||
135 | dev_err(&spi->dev, | ||
136 | "Missing registers-number property in the DT.\n"); | ||
137 | return -EINVAL; | ||
138 | } | ||
139 | |||
140 | chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; | 120 | chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; |
141 | chip->buffer = devm_kzalloc(&spi->dev, chip->registers, GFP_KERNEL); | ||
142 | if (!chip->buffer) | ||
143 | return -ENOMEM; | ||
144 | 121 | ||
145 | chip->gpio_chip.can_sleep = true; | 122 | chip->gpio_chip.can_sleep = true; |
146 | chip->gpio_chip.dev = &spi->dev; | 123 | chip->gpio_chip.parent = &spi->dev; |
147 | chip->gpio_chip.owner = THIS_MODULE; | 124 | chip->gpio_chip.owner = THIS_MODULE; |
148 | 125 | ||
149 | mutex_init(&chip->lock); | 126 | mutex_init(&chip->lock); |
@@ -154,7 +131,7 @@ static int gen_74x164_probe(struct spi_device *spi) | |||
154 | goto exit_destroy; | 131 | goto exit_destroy; |
155 | } | 132 | } |
156 | 133 | ||
157 | ret = gpiochip_add(&chip->gpio_chip); | 134 | ret = gpiochip_add_data(&chip->gpio_chip, chip); |
158 | if (!ret) | 135 | if (!ret) |
159 | return 0; | 136 | return 0; |
160 | 137 | ||
diff --git a/drivers/gpio/gpio-74xx-mmio.c b/drivers/gpio/gpio-74xx-mmio.c index 6b186829087c..372b0e01adc6 100644 --- a/drivers/gpio/gpio-74xx-mmio.c +++ b/drivers/gpio/gpio-74xx-mmio.c | |||
@@ -10,10 +10,9 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/err.h> | 12 | #include <linux/err.h> |
13 | #include <linux/gpio.h> | ||
14 | #include <linux/module.h> | 13 | #include <linux/module.h> |
15 | #include <linux/of_device.h> | 14 | #include <linux/of_device.h> |
16 | #include <linux/basic_mmio_gpio.h> | 15 | #include <linux/gpio/driver.h> |
17 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
18 | 17 | ||
19 | #define MMIO_74XX_DIR_IN (0 << 8) | 18 | #define MMIO_74XX_DIR_IN (0 << 8) |
@@ -21,7 +20,7 @@ | |||
21 | #define MMIO_74XX_BIT_CNT(x) ((x) & 0xff) | 20 | #define MMIO_74XX_BIT_CNT(x) ((x) & 0xff) |
22 | 21 | ||
23 | struct mmio_74xx_gpio_priv { | 22 | struct mmio_74xx_gpio_priv { |
24 | struct bgpio_chip bgc; | 23 | struct gpio_chip gc; |
25 | unsigned flags; | 24 | unsigned flags; |
26 | }; | 25 | }; |
27 | 26 | ||
@@ -78,30 +77,23 @@ static const struct of_device_id mmio_74xx_gpio_ids[] = { | |||
78 | }; | 77 | }; |
79 | MODULE_DEVICE_TABLE(of, mmio_74xx_gpio_ids); | 78 | MODULE_DEVICE_TABLE(of, mmio_74xx_gpio_ids); |
80 | 79 | ||
81 | static inline struct mmio_74xx_gpio_priv *to_74xx_gpio(struct gpio_chip *gc) | ||
82 | { | ||
83 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
84 | |||
85 | return container_of(bgc, struct mmio_74xx_gpio_priv, bgc); | ||
86 | } | ||
87 | |||
88 | static int mmio_74xx_get_direction(struct gpio_chip *gc, unsigned offset) | 80 | static int mmio_74xx_get_direction(struct gpio_chip *gc, unsigned offset) |
89 | { | 81 | { |
90 | struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc); | 82 | struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc); |
91 | 83 | ||
92 | return (priv->flags & MMIO_74XX_DIR_OUT) ? GPIOF_DIR_OUT : GPIOF_DIR_IN; | 84 | return !(priv->flags & MMIO_74XX_DIR_OUT); |
93 | } | 85 | } |
94 | 86 | ||
95 | static int mmio_74xx_dir_in(struct gpio_chip *gc, unsigned int gpio) | 87 | static int mmio_74xx_dir_in(struct gpio_chip *gc, unsigned int gpio) |
96 | { | 88 | { |
97 | struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc); | 89 | struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc); |
98 | 90 | ||
99 | return (priv->flags & MMIO_74XX_DIR_OUT) ? -ENOTSUPP : 0; | 91 | return (priv->flags & MMIO_74XX_DIR_OUT) ? -ENOTSUPP : 0; |
100 | } | 92 | } |
101 | 93 | ||
102 | static int mmio_74xx_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | 94 | static int mmio_74xx_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) |
103 | { | 95 | { |
104 | struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc); | 96 | struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc); |
105 | 97 | ||
106 | if (priv->flags & MMIO_74XX_DIR_OUT) { | 98 | if (priv->flags & MMIO_74XX_DIR_OUT) { |
107 | gc->set(gc, gpio, val); | 99 | gc->set(gc, gpio, val); |
@@ -134,28 +126,29 @@ static int mmio_74xx_gpio_probe(struct platform_device *pdev) | |||
134 | 126 | ||
135 | priv->flags = (uintptr_t) of_id->data; | 127 | priv->flags = (uintptr_t) of_id->data; |
136 | 128 | ||
137 | err = bgpio_init(&priv->bgc, &pdev->dev, | 129 | err = bgpio_init(&priv->gc, &pdev->dev, |
138 | DIV_ROUND_UP(MMIO_74XX_BIT_CNT(priv->flags), 8), | 130 | DIV_ROUND_UP(MMIO_74XX_BIT_CNT(priv->flags), 8), |
139 | dat, NULL, NULL, NULL, NULL, 0); | 131 | dat, NULL, NULL, NULL, NULL, 0); |
140 | if (err) | 132 | if (err) |
141 | return err; | 133 | return err; |
142 | 134 | ||
143 | priv->bgc.gc.direction_input = mmio_74xx_dir_in; | 135 | priv->gc.direction_input = mmio_74xx_dir_in; |
144 | priv->bgc.gc.direction_output = mmio_74xx_dir_out; | 136 | priv->gc.direction_output = mmio_74xx_dir_out; |
145 | priv->bgc.gc.get_direction = mmio_74xx_get_direction; | 137 | priv->gc.get_direction = mmio_74xx_get_direction; |
146 | priv->bgc.gc.ngpio = MMIO_74XX_BIT_CNT(priv->flags); | 138 | priv->gc.ngpio = MMIO_74XX_BIT_CNT(priv->flags); |
147 | priv->bgc.gc.owner = THIS_MODULE; | 139 | priv->gc.owner = THIS_MODULE; |
148 | 140 | ||
149 | platform_set_drvdata(pdev, priv); | 141 | platform_set_drvdata(pdev, priv); |
150 | 142 | ||
151 | return gpiochip_add(&priv->bgc.gc); | 143 | return gpiochip_add_data(&priv->gc, priv); |
152 | } | 144 | } |
153 | 145 | ||
154 | static int mmio_74xx_gpio_remove(struct platform_device *pdev) | 146 | static int mmio_74xx_gpio_remove(struct platform_device *pdev) |
155 | { | 147 | { |
156 | struct mmio_74xx_gpio_priv *priv = platform_get_drvdata(pdev); | 148 | struct mmio_74xx_gpio_priv *priv = platform_get_drvdata(pdev); |
157 | 149 | ||
158 | return bgpio_remove(&priv->bgc); | 150 | gpiochip_remove(&priv->gc); |
151 | return 0; | ||
159 | } | 152 | } |
160 | 153 | ||
161 | static struct platform_driver mmio_74xx_gpio_driver = { | 154 | static struct platform_driver mmio_74xx_gpio_driver = { |
diff --git a/drivers/gpio/gpio-adnp.c b/drivers/gpio/gpio-adnp.c index d3d0a90fe542..fb5b47b69f14 100644 --- a/drivers/gpio/gpio-adnp.c +++ b/drivers/gpio/gpio-adnp.c | |||
@@ -36,18 +36,13 @@ struct adnp { | |||
36 | u8 *irq_low; | 36 | u8 *irq_low; |
37 | }; | 37 | }; |
38 | 38 | ||
39 | static inline struct adnp *to_adnp(struct gpio_chip *chip) | ||
40 | { | ||
41 | return container_of(chip, struct adnp, gpio); | ||
42 | } | ||
43 | |||
44 | static int adnp_read(struct adnp *adnp, unsigned offset, uint8_t *value) | 39 | static int adnp_read(struct adnp *adnp, unsigned offset, uint8_t *value) |
45 | { | 40 | { |
46 | int err; | 41 | int err; |
47 | 42 | ||
48 | err = i2c_smbus_read_byte_data(adnp->client, offset); | 43 | err = i2c_smbus_read_byte_data(adnp->client, offset); |
49 | if (err < 0) { | 44 | if (err < 0) { |
50 | dev_err(adnp->gpio.dev, "%s failed: %d\n", | 45 | dev_err(adnp->gpio.parent, "%s failed: %d\n", |
51 | "i2c_smbus_read_byte_data()", err); | 46 | "i2c_smbus_read_byte_data()", err); |
52 | return err; | 47 | return err; |
53 | } | 48 | } |
@@ -62,7 +57,7 @@ static int adnp_write(struct adnp *adnp, unsigned offset, uint8_t value) | |||
62 | 57 | ||
63 | err = i2c_smbus_write_byte_data(adnp->client, offset, value); | 58 | err = i2c_smbus_write_byte_data(adnp->client, offset, value); |
64 | if (err < 0) { | 59 | if (err < 0) { |
65 | dev_err(adnp->gpio.dev, "%s failed: %d\n", | 60 | dev_err(adnp->gpio.parent, "%s failed: %d\n", |
66 | "i2c_smbus_write_byte_data()", err); | 61 | "i2c_smbus_write_byte_data()", err); |
67 | return err; | 62 | return err; |
68 | } | 63 | } |
@@ -72,7 +67,7 @@ static int adnp_write(struct adnp *adnp, unsigned offset, uint8_t value) | |||
72 | 67 | ||
73 | static int adnp_gpio_get(struct gpio_chip *chip, unsigned offset) | 68 | static int adnp_gpio_get(struct gpio_chip *chip, unsigned offset) |
74 | { | 69 | { |
75 | struct adnp *adnp = to_adnp(chip); | 70 | struct adnp *adnp = gpiochip_get_data(chip); |
76 | unsigned int reg = offset >> adnp->reg_shift; | 71 | unsigned int reg = offset >> adnp->reg_shift; |
77 | unsigned int pos = offset & 7; | 72 | unsigned int pos = offset & 7; |
78 | u8 value; | 73 | u8 value; |
@@ -106,7 +101,7 @@ static void __adnp_gpio_set(struct adnp *adnp, unsigned offset, int value) | |||
106 | 101 | ||
107 | static void adnp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 102 | static void adnp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
108 | { | 103 | { |
109 | struct adnp *adnp = to_adnp(chip); | 104 | struct adnp *adnp = gpiochip_get_data(chip); |
110 | 105 | ||
111 | mutex_lock(&adnp->i2c_lock); | 106 | mutex_lock(&adnp->i2c_lock); |
112 | __adnp_gpio_set(adnp, offset, value); | 107 | __adnp_gpio_set(adnp, offset, value); |
@@ -115,7 +110,7 @@ static void adnp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
115 | 110 | ||
116 | static int adnp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 111 | static int adnp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
117 | { | 112 | { |
118 | struct adnp *adnp = to_adnp(chip); | 113 | struct adnp *adnp = gpiochip_get_data(chip); |
119 | unsigned int reg = offset >> adnp->reg_shift; | 114 | unsigned int reg = offset >> adnp->reg_shift; |
120 | unsigned int pos = offset & 7; | 115 | unsigned int pos = offset & 7; |
121 | u8 value; | 116 | u8 value; |
@@ -150,7 +145,7 @@ out: | |||
150 | static int adnp_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | 145 | static int adnp_gpio_direction_output(struct gpio_chip *chip, unsigned offset, |
151 | int value) | 146 | int value) |
152 | { | 147 | { |
153 | struct adnp *adnp = to_adnp(chip); | 148 | struct adnp *adnp = gpiochip_get_data(chip); |
154 | unsigned int reg = offset >> adnp->reg_shift; | 149 | unsigned int reg = offset >> adnp->reg_shift; |
155 | unsigned int pos = offset & 7; | 150 | unsigned int pos = offset & 7; |
156 | int err; | 151 | int err; |
@@ -187,7 +182,7 @@ out: | |||
187 | 182 | ||
188 | static void adnp_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | 183 | static void adnp_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
189 | { | 184 | { |
190 | struct adnp *adnp = to_adnp(chip); | 185 | struct adnp *adnp = gpiochip_get_data(chip); |
191 | unsigned int num_regs = 1 << adnp->reg_shift, i, j; | 186 | unsigned int num_regs = 1 << adnp->reg_shift, i, j; |
192 | int err; | 187 | int err; |
193 | 188 | ||
@@ -266,11 +261,11 @@ static int adnp_gpio_setup(struct adnp *adnp, unsigned int num_gpios) | |||
266 | chip->base = -1; | 261 | chip->base = -1; |
267 | chip->ngpio = num_gpios; | 262 | chip->ngpio = num_gpios; |
268 | chip->label = adnp->client->name; | 263 | chip->label = adnp->client->name; |
269 | chip->dev = &adnp->client->dev; | 264 | chip->parent = &adnp->client->dev; |
270 | chip->of_node = chip->dev->of_node; | 265 | chip->of_node = chip->parent->of_node; |
271 | chip->owner = THIS_MODULE; | 266 | chip->owner = THIS_MODULE; |
272 | 267 | ||
273 | err = gpiochip_add(chip); | 268 | err = gpiochip_add_data(chip, adnp); |
274 | if (err) | 269 | if (err) |
275 | return err; | 270 | return err; |
276 | 271 | ||
@@ -340,7 +335,7 @@ static irqreturn_t adnp_irq(int irq, void *data) | |||
340 | static void adnp_irq_mask(struct irq_data *d) | 335 | static void adnp_irq_mask(struct irq_data *d) |
341 | { | 336 | { |
342 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 337 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
343 | struct adnp *adnp = to_adnp(gc); | 338 | struct adnp *adnp = gpiochip_get_data(gc); |
344 | unsigned int reg = d->hwirq >> adnp->reg_shift; | 339 | unsigned int reg = d->hwirq >> adnp->reg_shift; |
345 | unsigned int pos = d->hwirq & 7; | 340 | unsigned int pos = d->hwirq & 7; |
346 | 341 | ||
@@ -350,7 +345,7 @@ static void adnp_irq_mask(struct irq_data *d) | |||
350 | static void adnp_irq_unmask(struct irq_data *d) | 345 | static void adnp_irq_unmask(struct irq_data *d) |
351 | { | 346 | { |
352 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 347 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
353 | struct adnp *adnp = to_adnp(gc); | 348 | struct adnp *adnp = gpiochip_get_data(gc); |
354 | unsigned int reg = d->hwirq >> adnp->reg_shift; | 349 | unsigned int reg = d->hwirq >> adnp->reg_shift; |
355 | unsigned int pos = d->hwirq & 7; | 350 | unsigned int pos = d->hwirq & 7; |
356 | 351 | ||
@@ -360,7 +355,7 @@ static void adnp_irq_unmask(struct irq_data *d) | |||
360 | static int adnp_irq_set_type(struct irq_data *d, unsigned int type) | 355 | static int adnp_irq_set_type(struct irq_data *d, unsigned int type) |
361 | { | 356 | { |
362 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 357 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
363 | struct adnp *adnp = to_adnp(gc); | 358 | struct adnp *adnp = gpiochip_get_data(gc); |
364 | unsigned int reg = d->hwirq >> adnp->reg_shift; | 359 | unsigned int reg = d->hwirq >> adnp->reg_shift; |
365 | unsigned int pos = d->hwirq & 7; | 360 | unsigned int pos = d->hwirq & 7; |
366 | 361 | ||
@@ -390,7 +385,7 @@ static int adnp_irq_set_type(struct irq_data *d, unsigned int type) | |||
390 | static void adnp_irq_bus_lock(struct irq_data *d) | 385 | static void adnp_irq_bus_lock(struct irq_data *d) |
391 | { | 386 | { |
392 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 387 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
393 | struct adnp *adnp = to_adnp(gc); | 388 | struct adnp *adnp = gpiochip_get_data(gc); |
394 | 389 | ||
395 | mutex_lock(&adnp->irq_lock); | 390 | mutex_lock(&adnp->irq_lock); |
396 | } | 391 | } |
@@ -398,7 +393,7 @@ static void adnp_irq_bus_lock(struct irq_data *d) | |||
398 | static void adnp_irq_bus_unlock(struct irq_data *d) | 393 | static void adnp_irq_bus_unlock(struct irq_data *d) |
399 | { | 394 | { |
400 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 395 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
401 | struct adnp *adnp = to_adnp(gc); | 396 | struct adnp *adnp = gpiochip_get_data(gc); |
402 | unsigned int num_regs = 1 << adnp->reg_shift, i; | 397 | unsigned int num_regs = 1 << adnp->reg_shift, i; |
403 | 398 | ||
404 | mutex_lock(&adnp->i2c_lock); | 399 | mutex_lock(&adnp->i2c_lock); |
@@ -435,7 +430,8 @@ static int adnp_irq_setup(struct adnp *adnp) | |||
435 | * is chosen to match the register layout of the hardware in that | 430 | * is chosen to match the register layout of the hardware in that |
436 | * each segment contains the corresponding bits for all interrupts. | 431 | * each segment contains the corresponding bits for all interrupts. |
437 | */ | 432 | */ |
438 | adnp->irq_enable = devm_kzalloc(chip->dev, num_regs * 6, GFP_KERNEL); | 433 | adnp->irq_enable = devm_kzalloc(chip->parent, num_regs * 6, |
434 | GFP_KERNEL); | ||
439 | if (!adnp->irq_enable) | 435 | if (!adnp->irq_enable) |
440 | return -ENOMEM; | 436 | return -ENOMEM; |
441 | 437 | ||
@@ -462,12 +458,12 @@ static int adnp_irq_setup(struct adnp *adnp) | |||
462 | adnp->irq_enable[i] = 0x00; | 458 | adnp->irq_enable[i] = 0x00; |
463 | } | 459 | } |
464 | 460 | ||
465 | err = devm_request_threaded_irq(chip->dev, adnp->client->irq, | 461 | err = devm_request_threaded_irq(chip->parent, adnp->client->irq, |
466 | NULL, adnp_irq, | 462 | NULL, adnp_irq, |
467 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, | 463 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, |
468 | dev_name(chip->dev), adnp); | 464 | dev_name(chip->parent), adnp); |
469 | if (err != 0) { | 465 | if (err != 0) { |
470 | dev_err(chip->dev, "can't request IRQ#%d: %d\n", | 466 | dev_err(chip->parent, "can't request IRQ#%d: %d\n", |
471 | adnp->client->irq, err); | 467 | adnp->client->irq, err); |
472 | return err; | 468 | return err; |
473 | } | 469 | } |
@@ -478,7 +474,7 @@ static int adnp_irq_setup(struct adnp *adnp) | |||
478 | handle_simple_irq, | 474 | handle_simple_irq, |
479 | IRQ_TYPE_NONE); | 475 | IRQ_TYPE_NONE); |
480 | if (err) { | 476 | if (err) { |
481 | dev_err(chip->dev, | 477 | dev_err(chip->parent, |
482 | "could not connect irqchip to gpiochip\n"); | 478 | "could not connect irqchip to gpiochip\n"); |
483 | return err; | 479 | return err; |
484 | } | 480 | } |
@@ -547,7 +543,6 @@ MODULE_DEVICE_TABLE(of, adnp_of_match); | |||
547 | static struct i2c_driver adnp_i2c_driver = { | 543 | static struct i2c_driver adnp_i2c_driver = { |
548 | .driver = { | 544 | .driver = { |
549 | .name = "gpio-adnp", | 545 | .name = "gpio-adnp", |
550 | .owner = THIS_MODULE, | ||
551 | .of_match_table = adnp_of_match, | 546 | .of_match_table = adnp_of_match, |
552 | }, | 547 | }, |
553 | .probe = adnp_i2c_probe, | 548 | .probe = adnp_i2c_probe, |
diff --git a/drivers/gpio/gpio-adp5520.c b/drivers/gpio/gpio-adp5520.c index caff711ca5a9..4fa7ff1fec9a 100644 --- a/drivers/gpio/gpio-adp5520.c +++ b/drivers/gpio/gpio-adp5520.c | |||
@@ -27,7 +27,7 @@ static int adp5520_gpio_get_value(struct gpio_chip *chip, unsigned off) | |||
27 | struct adp5520_gpio *dev; | 27 | struct adp5520_gpio *dev; |
28 | uint8_t reg_val; | 28 | uint8_t reg_val; |
29 | 29 | ||
30 | dev = container_of(chip, struct adp5520_gpio, gpio_chip); | 30 | dev = gpiochip_get_data(chip); |
31 | 31 | ||
32 | /* | 32 | /* |
33 | * There are dedicated registers for GPIO IN/OUT. | 33 | * There are dedicated registers for GPIO IN/OUT. |
@@ -46,7 +46,7 @@ static void adp5520_gpio_set_value(struct gpio_chip *chip, | |||
46 | unsigned off, int val) | 46 | unsigned off, int val) |
47 | { | 47 | { |
48 | struct adp5520_gpio *dev; | 48 | struct adp5520_gpio *dev; |
49 | dev = container_of(chip, struct adp5520_gpio, gpio_chip); | 49 | dev = gpiochip_get_data(chip); |
50 | 50 | ||
51 | if (val) | 51 | if (val) |
52 | adp5520_set_bits(dev->master, ADP5520_GPIO_OUT, dev->lut[off]); | 52 | adp5520_set_bits(dev->master, ADP5520_GPIO_OUT, dev->lut[off]); |
@@ -57,7 +57,7 @@ static void adp5520_gpio_set_value(struct gpio_chip *chip, | |||
57 | static int adp5520_gpio_direction_input(struct gpio_chip *chip, unsigned off) | 57 | static int adp5520_gpio_direction_input(struct gpio_chip *chip, unsigned off) |
58 | { | 58 | { |
59 | struct adp5520_gpio *dev; | 59 | struct adp5520_gpio *dev; |
60 | dev = container_of(chip, struct adp5520_gpio, gpio_chip); | 60 | dev = gpiochip_get_data(chip); |
61 | 61 | ||
62 | clear_bit(off, &dev->output); | 62 | clear_bit(off, &dev->output); |
63 | 63 | ||
@@ -70,7 +70,7 @@ static int adp5520_gpio_direction_output(struct gpio_chip *chip, | |||
70 | { | 70 | { |
71 | struct adp5520_gpio *dev; | 71 | struct adp5520_gpio *dev; |
72 | int ret = 0; | 72 | int ret = 0; |
73 | dev = container_of(chip, struct adp5520_gpio, gpio_chip); | 73 | dev = gpiochip_get_data(chip); |
74 | 74 | ||
75 | set_bit(off, &dev->output); | 75 | set_bit(off, &dev->output); |
76 | 76 | ||
@@ -153,7 +153,7 @@ static int adp5520_gpio_probe(struct platform_device *pdev) | |||
153 | goto err; | 153 | goto err; |
154 | } | 154 | } |
155 | 155 | ||
156 | ret = gpiochip_add(&dev->gpio_chip); | 156 | ret = gpiochip_add_data(&dev->gpio_chip, dev); |
157 | if (ret) | 157 | if (ret) |
158 | goto err; | 158 | goto err; |
159 | 159 | ||
diff --git a/drivers/gpio/gpio-adp5588.c b/drivers/gpio/gpio-adp5588.c index 984186ee58a0..19a0eba1e942 100644 --- a/drivers/gpio/gpio-adp5588.c +++ b/drivers/gpio/gpio-adp5588.c | |||
@@ -65,8 +65,7 @@ static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val) | |||
65 | 65 | ||
66 | static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off) | 66 | static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off) |
67 | { | 67 | { |
68 | struct adp5588_gpio *dev = | 68 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
69 | container_of(chip, struct adp5588_gpio, gpio_chip); | ||
70 | unsigned bank = ADP5588_BANK(off); | 69 | unsigned bank = ADP5588_BANK(off); |
71 | unsigned bit = ADP5588_BIT(off); | 70 | unsigned bit = ADP5588_BIT(off); |
72 | int val; | 71 | int val; |
@@ -87,8 +86,7 @@ static void adp5588_gpio_set_value(struct gpio_chip *chip, | |||
87 | unsigned off, int val) | 86 | unsigned off, int val) |
88 | { | 87 | { |
89 | unsigned bank, bit; | 88 | unsigned bank, bit; |
90 | struct adp5588_gpio *dev = | 89 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
91 | container_of(chip, struct adp5588_gpio, gpio_chip); | ||
92 | 90 | ||
93 | bank = ADP5588_BANK(off); | 91 | bank = ADP5588_BANK(off); |
94 | bit = ADP5588_BIT(off); | 92 | bit = ADP5588_BIT(off); |
@@ -108,8 +106,7 @@ static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off) | |||
108 | { | 106 | { |
109 | int ret; | 107 | int ret; |
110 | unsigned bank; | 108 | unsigned bank; |
111 | struct adp5588_gpio *dev = | 109 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
112 | container_of(chip, struct adp5588_gpio, gpio_chip); | ||
113 | 110 | ||
114 | bank = ADP5588_BANK(off); | 111 | bank = ADP5588_BANK(off); |
115 | 112 | ||
@@ -126,8 +123,7 @@ static int adp5588_gpio_direction_output(struct gpio_chip *chip, | |||
126 | { | 123 | { |
127 | int ret; | 124 | int ret; |
128 | unsigned bank, bit; | 125 | unsigned bank, bit; |
129 | struct adp5588_gpio *dev = | 126 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
130 | container_of(chip, struct adp5588_gpio, gpio_chip); | ||
131 | 127 | ||
132 | bank = ADP5588_BANK(off); | 128 | bank = ADP5588_BANK(off); |
133 | bit = ADP5588_BIT(off); | 129 | bit = ADP5588_BIT(off); |
@@ -152,8 +148,8 @@ static int adp5588_gpio_direction_output(struct gpio_chip *chip, | |||
152 | #ifdef CONFIG_GPIO_ADP5588_IRQ | 148 | #ifdef CONFIG_GPIO_ADP5588_IRQ |
153 | static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off) | 149 | static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off) |
154 | { | 150 | { |
155 | struct adp5588_gpio *dev = | 151 | struct adp5588_gpio *dev = gpiochip_get_data(chip); |
156 | container_of(chip, struct adp5588_gpio, gpio_chip); | 152 | |
157 | return dev->irq_base + off; | 153 | return dev->irq_base + off; |
158 | } | 154 | } |
159 | 155 | ||
@@ -418,7 +414,7 @@ static int adp5588_gpio_probe(struct i2c_client *client, | |||
418 | } | 414 | } |
419 | } | 415 | } |
420 | 416 | ||
421 | ret = gpiochip_add(&dev->gpio_chip); | 417 | ret = gpiochip_add_data(&dev->gpio_chip, dev); |
422 | if (ret) | 418 | if (ret) |
423 | goto err_irq; | 419 | goto err_irq; |
424 | 420 | ||
diff --git a/drivers/gpio/gpio-altera.c b/drivers/gpio/gpio-altera.c index 3e6661bab54a..2aeaebd1c6e7 100644 --- a/drivers/gpio/gpio-altera.c +++ b/drivers/gpio/gpio-altera.c | |||
@@ -42,11 +42,6 @@ struct altera_gpio_chip { | |||
42 | int mapped_irq; | 42 | int mapped_irq; |
43 | }; | 43 | }; |
44 | 44 | ||
45 | static struct altera_gpio_chip *to_altera(struct gpio_chip *gc) | ||
46 | { | ||
47 | return container_of(gc, struct altera_gpio_chip, mmchip.gc); | ||
48 | } | ||
49 | |||
50 | static void altera_gpio_irq_unmask(struct irq_data *d) | 45 | static void altera_gpio_irq_unmask(struct irq_data *d) |
51 | { | 46 | { |
52 | struct altera_gpio_chip *altera_gc; | 47 | struct altera_gpio_chip *altera_gc; |
@@ -54,7 +49,7 @@ static void altera_gpio_irq_unmask(struct irq_data *d) | |||
54 | unsigned long flags; | 49 | unsigned long flags; |
55 | u32 intmask; | 50 | u32 intmask; |
56 | 51 | ||
57 | altera_gc = to_altera(irq_data_get_irq_chip_data(d)); | 52 | altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
58 | mm_gc = &altera_gc->mmchip; | 53 | mm_gc = &altera_gc->mmchip; |
59 | 54 | ||
60 | spin_lock_irqsave(&altera_gc->gpio_lock, flags); | 55 | spin_lock_irqsave(&altera_gc->gpio_lock, flags); |
@@ -72,7 +67,7 @@ static void altera_gpio_irq_mask(struct irq_data *d) | |||
72 | unsigned long flags; | 67 | unsigned long flags; |
73 | u32 intmask; | 68 | u32 intmask; |
74 | 69 | ||
75 | altera_gc = to_altera(irq_data_get_irq_chip_data(d)); | 70 | altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
76 | mm_gc = &altera_gc->mmchip; | 71 | mm_gc = &altera_gc->mmchip; |
77 | 72 | ||
78 | spin_lock_irqsave(&altera_gc->gpio_lock, flags); | 73 | spin_lock_irqsave(&altera_gc->gpio_lock, flags); |
@@ -92,7 +87,7 @@ static int altera_gpio_irq_set_type(struct irq_data *d, | |||
92 | { | 87 | { |
93 | struct altera_gpio_chip *altera_gc; | 88 | struct altera_gpio_chip *altera_gc; |
94 | 89 | ||
95 | altera_gc = to_altera(irq_data_get_irq_chip_data(d)); | 90 | altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
96 | 91 | ||
97 | if (type == IRQ_TYPE_NONE) | 92 | if (type == IRQ_TYPE_NONE) |
98 | return 0; | 93 | return 0; |
@@ -145,7 +140,7 @@ static void altera_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |||
145 | unsigned int data_reg; | 140 | unsigned int data_reg; |
146 | 141 | ||
147 | mm_gc = to_of_mm_gpio_chip(gc); | 142 | mm_gc = to_of_mm_gpio_chip(gc); |
148 | chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); | 143 | chip = gpiochip_get_data(gc); |
149 | 144 | ||
150 | spin_lock_irqsave(&chip->gpio_lock, flags); | 145 | spin_lock_irqsave(&chip->gpio_lock, flags); |
151 | data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); | 146 | data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); |
@@ -165,7 +160,7 @@ static int altera_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | |||
165 | unsigned int gpio_ddr; | 160 | unsigned int gpio_ddr; |
166 | 161 | ||
167 | mm_gc = to_of_mm_gpio_chip(gc); | 162 | mm_gc = to_of_mm_gpio_chip(gc); |
168 | chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); | 163 | chip = gpiochip_get_data(gc); |
169 | 164 | ||
170 | spin_lock_irqsave(&chip->gpio_lock, flags); | 165 | spin_lock_irqsave(&chip->gpio_lock, flags); |
171 | /* Set pin as input, assumes software controlled IP */ | 166 | /* Set pin as input, assumes software controlled IP */ |
@@ -186,7 +181,7 @@ static int altera_gpio_direction_output(struct gpio_chip *gc, | |||
186 | unsigned int data_reg, gpio_ddr; | 181 | unsigned int data_reg, gpio_ddr; |
187 | 182 | ||
188 | mm_gc = to_of_mm_gpio_chip(gc); | 183 | mm_gc = to_of_mm_gpio_chip(gc); |
189 | chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); | 184 | chip = gpiochip_get_data(gc); |
190 | 185 | ||
191 | spin_lock_irqsave(&chip->gpio_lock, flags); | 186 | spin_lock_irqsave(&chip->gpio_lock, flags); |
192 | /* Sets the GPIO value */ | 187 | /* Sets the GPIO value */ |
@@ -215,7 +210,7 @@ static void altera_gpio_irq_edge_handler(struct irq_desc *desc) | |||
215 | unsigned long status; | 210 | unsigned long status; |
216 | int i; | 211 | int i; |
217 | 212 | ||
218 | altera_gc = to_altera(irq_desc_get_handler_data(desc)); | 213 | altera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc)); |
219 | chip = irq_desc_get_chip(desc); | 214 | chip = irq_desc_get_chip(desc); |
220 | mm_gc = &altera_gc->mmchip; | 215 | mm_gc = &altera_gc->mmchip; |
221 | irqdomain = altera_gc->mmchip.gc.irqdomain; | 216 | irqdomain = altera_gc->mmchip.gc.irqdomain; |
@@ -244,7 +239,7 @@ static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc) | |||
244 | unsigned long status; | 239 | unsigned long status; |
245 | int i; | 240 | int i; |
246 | 241 | ||
247 | altera_gc = to_altera(irq_desc_get_handler_data(desc)); | 242 | altera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc)); |
248 | chip = irq_desc_get_chip(desc); | 243 | chip = irq_desc_get_chip(desc); |
249 | mm_gc = &altera_gc->mmchip; | 244 | mm_gc = &altera_gc->mmchip; |
250 | irqdomain = altera_gc->mmchip.gc.irqdomain; | 245 | irqdomain = altera_gc->mmchip.gc.irqdomain; |
@@ -290,9 +285,9 @@ static int altera_gpio_probe(struct platform_device *pdev) | |||
290 | altera_gc->mmchip.gc.get = altera_gpio_get; | 285 | altera_gc->mmchip.gc.get = altera_gpio_get; |
291 | altera_gc->mmchip.gc.set = altera_gpio_set; | 286 | altera_gc->mmchip.gc.set = altera_gpio_set; |
292 | altera_gc->mmchip.gc.owner = THIS_MODULE; | 287 | altera_gc->mmchip.gc.owner = THIS_MODULE; |
293 | altera_gc->mmchip.gc.dev = &pdev->dev; | 288 | altera_gc->mmchip.gc.parent = &pdev->dev; |
294 | 289 | ||
295 | ret = of_mm_gpiochip_add(node, &altera_gc->mmchip); | 290 | ret = of_mm_gpiochip_add_data(node, &altera_gc->mmchip, altera_gc); |
296 | if (ret) { | 291 | if (ret) { |
297 | dev_err(&pdev->dev, "Failed adding memory mapped gpiochip\n"); | 292 | dev_err(&pdev->dev, "Failed adding memory mapped gpiochip\n"); |
298 | return ret; | 293 | return ret; |
diff --git a/drivers/gpio/gpio-amd8111.c b/drivers/gpio/gpio-amd8111.c index d00d81928fe8..c7040fffc5b4 100644 --- a/drivers/gpio/gpio-amd8111.c +++ b/drivers/gpio/gpio-amd8111.c | |||
@@ -75,11 +75,9 @@ struct amd_gpio { | |||
75 | u8 orig[32]; | 75 | u8 orig[32]; |
76 | }; | 76 | }; |
77 | 77 | ||
78 | #define to_agp(chip) container_of(chip, struct amd_gpio, chip) | ||
79 | |||
80 | static int amd_gpio_request(struct gpio_chip *chip, unsigned offset) | 78 | static int amd_gpio_request(struct gpio_chip *chip, unsigned offset) |
81 | { | 79 | { |
82 | struct amd_gpio *agp = to_agp(chip); | 80 | struct amd_gpio *agp = gpiochip_get_data(chip); |
83 | 81 | ||
84 | agp->orig[offset] = ioread8(agp->pm + AMD_REG_GPIO(offset)) & | 82 | agp->orig[offset] = ioread8(agp->pm + AMD_REG_GPIO(offset)) & |
85 | (AMD_GPIO_DEBOUNCE | AMD_GPIO_MODE_MASK | AMD_GPIO_X_MASK); | 83 | (AMD_GPIO_DEBOUNCE | AMD_GPIO_MODE_MASK | AMD_GPIO_X_MASK); |
@@ -91,7 +89,7 @@ static int amd_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
91 | 89 | ||
92 | static void amd_gpio_free(struct gpio_chip *chip, unsigned offset) | 90 | static void amd_gpio_free(struct gpio_chip *chip, unsigned offset) |
93 | { | 91 | { |
94 | struct amd_gpio *agp = to_agp(chip); | 92 | struct amd_gpio *agp = gpiochip_get_data(chip); |
95 | 93 | ||
96 | dev_dbg(&agp->pdev->dev, "Freed gpio %d, data %x\n", offset, agp->orig[offset]); | 94 | dev_dbg(&agp->pdev->dev, "Freed gpio %d, data %x\n", offset, agp->orig[offset]); |
97 | 95 | ||
@@ -100,7 +98,7 @@ static void amd_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
100 | 98 | ||
101 | static void amd_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 99 | static void amd_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
102 | { | 100 | { |
103 | struct amd_gpio *agp = to_agp(chip); | 101 | struct amd_gpio *agp = gpiochip_get_data(chip); |
104 | u8 temp; | 102 | u8 temp; |
105 | unsigned long flags; | 103 | unsigned long flags; |
106 | 104 | ||
@@ -115,7 +113,7 @@ static void amd_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
115 | 113 | ||
116 | static int amd_gpio_get(struct gpio_chip *chip, unsigned offset) | 114 | static int amd_gpio_get(struct gpio_chip *chip, unsigned offset) |
117 | { | 115 | { |
118 | struct amd_gpio *agp = to_agp(chip); | 116 | struct amd_gpio *agp = gpiochip_get_data(chip); |
119 | u8 temp; | 117 | u8 temp; |
120 | 118 | ||
121 | temp = ioread8(agp->pm + AMD_REG_GPIO(offset)); | 119 | temp = ioread8(agp->pm + AMD_REG_GPIO(offset)); |
@@ -127,7 +125,7 @@ static int amd_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
127 | 125 | ||
128 | static int amd_gpio_dirout(struct gpio_chip *chip, unsigned offset, int value) | 126 | static int amd_gpio_dirout(struct gpio_chip *chip, unsigned offset, int value) |
129 | { | 127 | { |
130 | struct amd_gpio *agp = to_agp(chip); | 128 | struct amd_gpio *agp = gpiochip_get_data(chip); |
131 | u8 temp; | 129 | u8 temp; |
132 | unsigned long flags; | 130 | unsigned long flags; |
133 | 131 | ||
@@ -144,7 +142,7 @@ static int amd_gpio_dirout(struct gpio_chip *chip, unsigned offset, int value) | |||
144 | 142 | ||
145 | static int amd_gpio_dirin(struct gpio_chip *chip, unsigned offset) | 143 | static int amd_gpio_dirin(struct gpio_chip *chip, unsigned offset) |
146 | { | 144 | { |
147 | struct amd_gpio *agp = to_agp(chip); | 145 | struct amd_gpio *agp = gpiochip_get_data(chip); |
148 | u8 temp; | 146 | u8 temp; |
149 | unsigned long flags; | 147 | unsigned long flags; |
150 | 148 | ||
@@ -220,12 +218,12 @@ found: | |||
220 | goto out; | 218 | goto out; |
221 | } | 219 | } |
222 | gp.pdev = pdev; | 220 | gp.pdev = pdev; |
223 | gp.chip.dev = &pdev->dev; | 221 | gp.chip.parent = &pdev->dev; |
224 | 222 | ||
225 | spin_lock_init(&gp.lock); | 223 | spin_lock_init(&gp.lock); |
226 | 224 | ||
227 | printk(KERN_INFO "AMD-8111 GPIO detected\n"); | 225 | printk(KERN_INFO "AMD-8111 GPIO detected\n"); |
228 | err = gpiochip_add(&gp.chip); | 226 | err = gpiochip_add_data(&gp.chip, &gp); |
229 | if (err) { | 227 | if (err) { |
230 | printk(KERN_ERR "GPIO registering failed (%d)\n", | 228 | printk(KERN_ERR "GPIO registering failed (%d)\n", |
231 | err); | 229 | err); |
diff --git a/drivers/gpio/gpio-amdpt.c b/drivers/gpio/gpio-amdpt.c index cbbb966d4fc0..c2484046e8e9 100644 --- a/drivers/gpio/gpio-amdpt.c +++ b/drivers/gpio/gpio-amdpt.c | |||
@@ -31,22 +31,20 @@ struct pt_gpio_chip { | |||
31 | spinlock_t lock; | 31 | spinlock_t lock; |
32 | }; | 32 | }; |
33 | 33 | ||
34 | #define to_pt_gpio(c) container_of(c, struct pt_gpio_chip, gc) | ||
35 | |||
36 | static int pt_gpio_request(struct gpio_chip *gc, unsigned offset) | 34 | static int pt_gpio_request(struct gpio_chip *gc, unsigned offset) |
37 | { | 35 | { |
38 | struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc); | 36 | struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc); |
39 | unsigned long flags; | 37 | unsigned long flags; |
40 | u32 using_pins; | 38 | u32 using_pins; |
41 | 39 | ||
42 | dev_dbg(gc->dev, "pt_gpio_request offset=%x\n", offset); | 40 | dev_dbg(gc->parent, "pt_gpio_request offset=%x\n", offset); |
43 | 41 | ||
44 | spin_lock_irqsave(&pt_gpio->lock, flags); | 42 | spin_lock_irqsave(&pt_gpio->lock, flags); |
45 | 43 | ||
46 | using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG); | 44 | using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG); |
47 | if (using_pins & BIT(offset)) { | 45 | if (using_pins & BIT(offset)) { |
48 | dev_warn(gc->dev, "PT GPIO pin %x reconfigured\n", | 46 | dev_warn(gc->parent, "PT GPIO pin %x reconfigured\n", |
49 | offset); | 47 | offset); |
50 | spin_unlock_irqrestore(&pt_gpio->lock, flags); | 48 | spin_unlock_irqrestore(&pt_gpio->lock, flags); |
51 | return -EINVAL; | 49 | return -EINVAL; |
52 | } | 50 | } |
@@ -60,7 +58,7 @@ static int pt_gpio_request(struct gpio_chip *gc, unsigned offset) | |||
60 | 58 | ||
61 | static void pt_gpio_free(struct gpio_chip *gc, unsigned offset) | 59 | static void pt_gpio_free(struct gpio_chip *gc, unsigned offset) |
62 | { | 60 | { |
63 | struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc); | 61 | struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc); |
64 | unsigned long flags; | 62 | unsigned long flags; |
65 | u32 using_pins; | 63 | u32 using_pins; |
66 | 64 | ||
@@ -72,16 +70,16 @@ static void pt_gpio_free(struct gpio_chip *gc, unsigned offset) | |||
72 | 70 | ||
73 | spin_unlock_irqrestore(&pt_gpio->lock, flags); | 71 | spin_unlock_irqrestore(&pt_gpio->lock, flags); |
74 | 72 | ||
75 | dev_dbg(gc->dev, "pt_gpio_free offset=%x\n", offset); | 73 | dev_dbg(gc->parent, "pt_gpio_free offset=%x\n", offset); |
76 | } | 74 | } |
77 | 75 | ||
78 | static void pt_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value) | 76 | static void pt_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value) |
79 | { | 77 | { |
80 | struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc); | 78 | struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc); |
81 | unsigned long flags; | 79 | unsigned long flags; |
82 | u32 data; | 80 | u32 data; |
83 | 81 | ||
84 | dev_dbg(gc->dev, "pt_gpio_set_value offset=%x, value=%x\n", | 82 | dev_dbg(gc->parent, "pt_gpio_set_value offset=%x, value=%x\n", |
85 | offset, value); | 83 | offset, value); |
86 | 84 | ||
87 | spin_lock_irqsave(&pt_gpio->lock, flags); | 85 | spin_lock_irqsave(&pt_gpio->lock, flags); |
@@ -97,7 +95,7 @@ static void pt_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value) | |||
97 | 95 | ||
98 | static int pt_gpio_get_value(struct gpio_chip *gc, unsigned offset) | 96 | static int pt_gpio_get_value(struct gpio_chip *gc, unsigned offset) |
99 | { | 97 | { |
100 | struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc); | 98 | struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc); |
101 | unsigned long flags; | 99 | unsigned long flags; |
102 | u32 data; | 100 | u32 data; |
103 | 101 | ||
@@ -116,7 +114,7 @@ static int pt_gpio_get_value(struct gpio_chip *gc, unsigned offset) | |||
116 | data >>= offset; | 114 | data >>= offset; |
117 | data &= 1; | 115 | data &= 1; |
118 | 116 | ||
119 | dev_dbg(gc->dev, "pt_gpio_get_value offset=%x, value=%x\n", | 117 | dev_dbg(gc->parent, "pt_gpio_get_value offset=%x, value=%x\n", |
120 | offset, data); | 118 | offset, data); |
121 | 119 | ||
122 | return data; | 120 | return data; |
@@ -124,11 +122,11 @@ static int pt_gpio_get_value(struct gpio_chip *gc, unsigned offset) | |||
124 | 122 | ||
125 | static int pt_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | 123 | static int pt_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
126 | { | 124 | { |
127 | struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc); | 125 | struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc); |
128 | unsigned long flags; | 126 | unsigned long flags; |
129 | u32 data; | 127 | u32 data; |
130 | 128 | ||
131 | dev_dbg(gc->dev, "pt_gpio_dirction_input offset=%x\n", offset); | 129 | dev_dbg(gc->parent, "pt_gpio_dirction_input offset=%x\n", offset); |
132 | 130 | ||
133 | spin_lock_irqsave(&pt_gpio->lock, flags); | 131 | spin_lock_irqsave(&pt_gpio->lock, flags); |
134 | 132 | ||
@@ -144,11 +142,11 @@ static int pt_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | |||
144 | static int pt_gpio_direction_output(struct gpio_chip *gc, | 142 | static int pt_gpio_direction_output(struct gpio_chip *gc, |
145 | unsigned offset, int value) | 143 | unsigned offset, int value) |
146 | { | 144 | { |
147 | struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc); | 145 | struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc); |
148 | unsigned long flags; | 146 | unsigned long flags; |
149 | u32 data; | 147 | u32 data; |
150 | 148 | ||
151 | dev_dbg(gc->dev, "pt_gpio_direction_output offset=%x, value=%x\n", | 149 | dev_dbg(gc->parent, "pt_gpio_direction_output offset=%x, value=%x\n", |
152 | offset, value); | 150 | offset, value); |
153 | 151 | ||
154 | spin_lock_irqsave(&pt_gpio->lock, flags); | 152 | spin_lock_irqsave(&pt_gpio->lock, flags); |
@@ -202,7 +200,7 @@ static int pt_gpio_probe(struct platform_device *pdev) | |||
202 | 200 | ||
203 | pt_gpio->gc.label = pdev->name; | 201 | pt_gpio->gc.label = pdev->name; |
204 | pt_gpio->gc.owner = THIS_MODULE; | 202 | pt_gpio->gc.owner = THIS_MODULE; |
205 | pt_gpio->gc.dev = dev; | 203 | pt_gpio->gc.parent = dev; |
206 | pt_gpio->gc.request = pt_gpio_request; | 204 | pt_gpio->gc.request = pt_gpio_request; |
207 | pt_gpio->gc.free = pt_gpio_free; | 205 | pt_gpio->gc.free = pt_gpio_free; |
208 | pt_gpio->gc.direction_input = pt_gpio_direction_input; | 206 | pt_gpio->gc.direction_input = pt_gpio_direction_input; |
@@ -214,7 +212,7 @@ static int pt_gpio_probe(struct platform_device *pdev) | |||
214 | #if defined(CONFIG_OF_GPIO) | 212 | #if defined(CONFIG_OF_GPIO) |
215 | pt_gpio->gc.of_node = pdev->dev.of_node; | 213 | pt_gpio->gc.of_node = pdev->dev.of_node; |
216 | #endif | 214 | #endif |
217 | ret = gpiochip_add(&pt_gpio->gc); | 215 | ret = gpiochip_add_data(&pt_gpio->gc, pt_gpio); |
218 | if (ret) { | 216 | if (ret) { |
219 | dev_err(&pdev->dev, "Failed to register GPIO lib\n"); | 217 | dev_err(&pdev->dev, "Failed to register GPIO lib\n"); |
220 | return ret; | 218 | return ret; |
diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c index 624ea5421995..e910c1f41d93 100644 --- a/drivers/gpio/gpio-arizona.c +++ b/drivers/gpio/gpio-arizona.c | |||
@@ -28,14 +28,9 @@ struct arizona_gpio { | |||
28 | struct gpio_chip gpio_chip; | 28 | struct gpio_chip gpio_chip; |
29 | }; | 29 | }; |
30 | 30 | ||
31 | static inline struct arizona_gpio *to_arizona_gpio(struct gpio_chip *chip) | ||
32 | { | ||
33 | return container_of(chip, struct arizona_gpio, gpio_chip); | ||
34 | } | ||
35 | |||
36 | static int arizona_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | 31 | static int arizona_gpio_direction_in(struct gpio_chip *chip, unsigned offset) |
37 | { | 32 | { |
38 | struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); | 33 | struct arizona_gpio *arizona_gpio = gpiochip_get_data(chip); |
39 | struct arizona *arizona = arizona_gpio->arizona; | 34 | struct arizona *arizona = arizona_gpio->arizona; |
40 | 35 | ||
41 | return regmap_update_bits(arizona->regmap, ARIZONA_GPIO1_CTRL + offset, | 36 | return regmap_update_bits(arizona->regmap, ARIZONA_GPIO1_CTRL + offset, |
@@ -44,7 +39,7 @@ static int arizona_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | |||
44 | 39 | ||
45 | static int arizona_gpio_get(struct gpio_chip *chip, unsigned offset) | 40 | static int arizona_gpio_get(struct gpio_chip *chip, unsigned offset) |
46 | { | 41 | { |
47 | struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); | 42 | struct arizona_gpio *arizona_gpio = gpiochip_get_data(chip); |
48 | struct arizona *arizona = arizona_gpio->arizona; | 43 | struct arizona *arizona = arizona_gpio->arizona; |
49 | unsigned int val; | 44 | unsigned int val; |
50 | int ret; | 45 | int ret; |
@@ -62,7 +57,7 @@ static int arizona_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
62 | static int arizona_gpio_direction_out(struct gpio_chip *chip, | 57 | static int arizona_gpio_direction_out(struct gpio_chip *chip, |
63 | unsigned offset, int value) | 58 | unsigned offset, int value) |
64 | { | 59 | { |
65 | struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); | 60 | struct arizona_gpio *arizona_gpio = gpiochip_get_data(chip); |
66 | struct arizona *arizona = arizona_gpio->arizona; | 61 | struct arizona *arizona = arizona_gpio->arizona; |
67 | 62 | ||
68 | if (value) | 63 | if (value) |
@@ -74,7 +69,7 @@ static int arizona_gpio_direction_out(struct gpio_chip *chip, | |||
74 | 69 | ||
75 | static void arizona_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 70 | static void arizona_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
76 | { | 71 | { |
77 | struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip); | 72 | struct arizona_gpio *arizona_gpio = gpiochip_get_data(chip); |
78 | struct arizona *arizona = arizona_gpio->arizona; | 73 | struct arizona *arizona = arizona_gpio->arizona; |
79 | 74 | ||
80 | if (value) | 75 | if (value) |
@@ -108,7 +103,7 @@ static int arizona_gpio_probe(struct platform_device *pdev) | |||
108 | 103 | ||
109 | arizona_gpio->arizona = arizona; | 104 | arizona_gpio->arizona = arizona; |
110 | arizona_gpio->gpio_chip = template_chip; | 105 | arizona_gpio->gpio_chip = template_chip; |
111 | arizona_gpio->gpio_chip.dev = &pdev->dev; | 106 | arizona_gpio->gpio_chip.parent = &pdev->dev; |
112 | #ifdef CONFIG_OF_GPIO | 107 | #ifdef CONFIG_OF_GPIO |
113 | arizona_gpio->gpio_chip.of_node = arizona->dev->of_node; | 108 | arizona_gpio->gpio_chip.of_node = arizona->dev->of_node; |
114 | #endif | 109 | #endif |
@@ -137,7 +132,7 @@ static int arizona_gpio_probe(struct platform_device *pdev) | |||
137 | else | 132 | else |
138 | arizona_gpio->gpio_chip.base = -1; | 133 | arizona_gpio->gpio_chip.base = -1; |
139 | 134 | ||
140 | ret = gpiochip_add(&arizona_gpio->gpio_chip); | 135 | ret = gpiochip_add_data(&arizona_gpio->gpio_chip, arizona_gpio); |
141 | if (ret < 0) { | 136 | if (ret < 0) { |
142 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", | 137 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", |
143 | ret); | 138 | ret); |
diff --git a/drivers/gpio/gpio-ath79.c b/drivers/gpio/gpio-ath79.c index 5eaea8b812cf..d13dd133a907 100644 --- a/drivers/gpio/gpio-ath79.c +++ b/drivers/gpio/gpio-ath79.c | |||
@@ -24,12 +24,10 @@ struct ath79_gpio_ctrl { | |||
24 | spinlock_t lock; | 24 | spinlock_t lock; |
25 | }; | 25 | }; |
26 | 26 | ||
27 | #define to_ath79_gpio_ctrl(c) container_of(c, struct ath79_gpio_ctrl, chip) | ||
28 | |||
29 | static void ath79_gpio_set_value(struct gpio_chip *chip, | 27 | static void ath79_gpio_set_value(struct gpio_chip *chip, |
30 | unsigned gpio, int value) | 28 | unsigned gpio, int value) |
31 | { | 29 | { |
32 | struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip); | 30 | struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip); |
33 | 31 | ||
34 | if (value) | 32 | if (value) |
35 | __raw_writel(BIT(gpio), ctrl->base + AR71XX_GPIO_REG_SET); | 33 | __raw_writel(BIT(gpio), ctrl->base + AR71XX_GPIO_REG_SET); |
@@ -39,7 +37,7 @@ static void ath79_gpio_set_value(struct gpio_chip *chip, | |||
39 | 37 | ||
40 | static int ath79_gpio_get_value(struct gpio_chip *chip, unsigned gpio) | 38 | static int ath79_gpio_get_value(struct gpio_chip *chip, unsigned gpio) |
41 | { | 39 | { |
42 | struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip); | 40 | struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip); |
43 | 41 | ||
44 | return (__raw_readl(ctrl->base + AR71XX_GPIO_REG_IN) >> gpio) & 1; | 42 | return (__raw_readl(ctrl->base + AR71XX_GPIO_REG_IN) >> gpio) & 1; |
45 | } | 43 | } |
@@ -47,7 +45,7 @@ static int ath79_gpio_get_value(struct gpio_chip *chip, unsigned gpio) | |||
47 | static int ath79_gpio_direction_input(struct gpio_chip *chip, | 45 | static int ath79_gpio_direction_input(struct gpio_chip *chip, |
48 | unsigned offset) | 46 | unsigned offset) |
49 | { | 47 | { |
50 | struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip); | 48 | struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip); |
51 | unsigned long flags; | 49 | unsigned long flags; |
52 | 50 | ||
53 | spin_lock_irqsave(&ctrl->lock, flags); | 51 | spin_lock_irqsave(&ctrl->lock, flags); |
@@ -64,7 +62,7 @@ static int ath79_gpio_direction_input(struct gpio_chip *chip, | |||
64 | static int ath79_gpio_direction_output(struct gpio_chip *chip, | 62 | static int ath79_gpio_direction_output(struct gpio_chip *chip, |
65 | unsigned offset, int value) | 63 | unsigned offset, int value) |
66 | { | 64 | { |
67 | struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip); | 65 | struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip); |
68 | unsigned long flags; | 66 | unsigned long flags; |
69 | 67 | ||
70 | spin_lock_irqsave(&ctrl->lock, flags); | 68 | spin_lock_irqsave(&ctrl->lock, flags); |
@@ -85,7 +83,7 @@ static int ath79_gpio_direction_output(struct gpio_chip *chip, | |||
85 | 83 | ||
86 | static int ar934x_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 84 | static int ar934x_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
87 | { | 85 | { |
88 | struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip); | 86 | struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip); |
89 | unsigned long flags; | 87 | unsigned long flags; |
90 | 88 | ||
91 | spin_lock_irqsave(&ctrl->lock, flags); | 89 | spin_lock_irqsave(&ctrl->lock, flags); |
@@ -102,7 +100,7 @@ static int ar934x_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
102 | static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | 100 | static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset, |
103 | int value) | 101 | int value) |
104 | { | 102 | { |
105 | struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip); | 103 | struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip); |
106 | unsigned long flags; | 104 | unsigned long flags; |
107 | 105 | ||
108 | spin_lock_irqsave(&ctrl->lock, flags); | 106 | spin_lock_irqsave(&ctrl->lock, flags); |
@@ -138,7 +136,7 @@ static const struct of_device_id ath79_gpio_of_match[] = { | |||
138 | 136 | ||
139 | static int ath79_gpio_probe(struct platform_device *pdev) | 137 | static int ath79_gpio_probe(struct platform_device *pdev) |
140 | { | 138 | { |
141 | struct ath79_gpio_platform_data *pdata = pdev->dev.platform_data; | 139 | struct ath79_gpio_platform_data *pdata = dev_get_platdata(&pdev->dev); |
142 | struct device_node *np = pdev->dev.of_node; | 140 | struct device_node *np = pdev->dev.of_node; |
143 | struct ath79_gpio_ctrl *ctrl; | 141 | struct ath79_gpio_ctrl *ctrl; |
144 | struct resource *res; | 142 | struct resource *res; |
@@ -177,14 +175,14 @@ static int ath79_gpio_probe(struct platform_device *pdev) | |||
177 | 175 | ||
178 | spin_lock_init(&ctrl->lock); | 176 | spin_lock_init(&ctrl->lock); |
179 | memcpy(&ctrl->chip, &ath79_gpio_chip, sizeof(ctrl->chip)); | 177 | memcpy(&ctrl->chip, &ath79_gpio_chip, sizeof(ctrl->chip)); |
180 | ctrl->chip.dev = &pdev->dev; | 178 | ctrl->chip.parent = &pdev->dev; |
181 | ctrl->chip.ngpio = ath79_gpio_count; | 179 | ctrl->chip.ngpio = ath79_gpio_count; |
182 | if (oe_inverted) { | 180 | if (oe_inverted) { |
183 | ctrl->chip.direction_input = ar934x_gpio_direction_input; | 181 | ctrl->chip.direction_input = ar934x_gpio_direction_input; |
184 | ctrl->chip.direction_output = ar934x_gpio_direction_output; | 182 | ctrl->chip.direction_output = ar934x_gpio_direction_output; |
185 | } | 183 | } |
186 | 184 | ||
187 | err = gpiochip_add(&ctrl->chip); | 185 | err = gpiochip_add_data(&ctrl->chip, ctrl); |
188 | if (err) { | 186 | if (err) { |
189 | dev_err(&pdev->dev, | 187 | dev_err(&pdev->dev, |
190 | "cannot add AR71xx GPIO chip, error=%d", err); | 188 | "cannot add AR71xx GPIO chip, error=%d", err); |
diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c index 33a1f9779b86..b6c5abe85daf 100644 --- a/drivers/gpio/gpio-bcm-kona.c +++ b/drivers/gpio/gpio-bcm-kona.c | |||
@@ -78,11 +78,6 @@ struct bcm_kona_gpio_bank { | |||
78 | struct bcm_kona_gpio *kona_gpio; | 78 | struct bcm_kona_gpio *kona_gpio; |
79 | }; | 79 | }; |
80 | 80 | ||
81 | static inline struct bcm_kona_gpio *to_kona_gpio(struct gpio_chip *chip) | ||
82 | { | ||
83 | return container_of(chip, struct bcm_kona_gpio, gpio_chip); | ||
84 | } | ||
85 | |||
86 | static inline void bcm_kona_gpio_write_lock_regs(void __iomem *reg_base, | 81 | static inline void bcm_kona_gpio_write_lock_regs(void __iomem *reg_base, |
87 | int bank_id, u32 lockcode) | 82 | int bank_id, u32 lockcode) |
88 | { | 83 | { |
@@ -124,7 +119,7 @@ static void bcm_kona_gpio_unlock_gpio(struct bcm_kona_gpio *kona_gpio, | |||
124 | 119 | ||
125 | static int bcm_kona_gpio_get_dir(struct gpio_chip *chip, unsigned gpio) | 120 | static int bcm_kona_gpio_get_dir(struct gpio_chip *chip, unsigned gpio) |
126 | { | 121 | { |
127 | struct bcm_kona_gpio *kona_gpio = to_kona_gpio(chip); | 122 | struct bcm_kona_gpio *kona_gpio = gpiochip_get_data(chip); |
128 | void __iomem *reg_base = kona_gpio->reg_base; | 123 | void __iomem *reg_base = kona_gpio->reg_base; |
129 | u32 val; | 124 | u32 val; |
130 | 125 | ||
@@ -141,7 +136,7 @@ static void bcm_kona_gpio_set(struct gpio_chip *chip, unsigned gpio, int value) | |||
141 | u32 val, reg_offset; | 136 | u32 val, reg_offset; |
142 | unsigned long flags; | 137 | unsigned long flags; |
143 | 138 | ||
144 | kona_gpio = to_kona_gpio(chip); | 139 | kona_gpio = gpiochip_get_data(chip); |
145 | reg_base = kona_gpio->reg_base; | 140 | reg_base = kona_gpio->reg_base; |
146 | spin_lock_irqsave(&kona_gpio->lock, flags); | 141 | spin_lock_irqsave(&kona_gpio->lock, flags); |
147 | 142 | ||
@@ -168,7 +163,7 @@ static int bcm_kona_gpio_get(struct gpio_chip *chip, unsigned gpio) | |||
168 | u32 val, reg_offset; | 163 | u32 val, reg_offset; |
169 | unsigned long flags; | 164 | unsigned long flags; |
170 | 165 | ||
171 | kona_gpio = to_kona_gpio(chip); | 166 | kona_gpio = gpiochip_get_data(chip); |
172 | reg_base = kona_gpio->reg_base; | 167 | reg_base = kona_gpio->reg_base; |
173 | spin_lock_irqsave(&kona_gpio->lock, flags); | 168 | spin_lock_irqsave(&kona_gpio->lock, flags); |
174 | 169 | ||
@@ -188,7 +183,7 @@ static int bcm_kona_gpio_get(struct gpio_chip *chip, unsigned gpio) | |||
188 | 183 | ||
189 | static int bcm_kona_gpio_request(struct gpio_chip *chip, unsigned gpio) | 184 | static int bcm_kona_gpio_request(struct gpio_chip *chip, unsigned gpio) |
190 | { | 185 | { |
191 | struct bcm_kona_gpio *kona_gpio = to_kona_gpio(chip); | 186 | struct bcm_kona_gpio *kona_gpio = gpiochip_get_data(chip); |
192 | 187 | ||
193 | bcm_kona_gpio_unlock_gpio(kona_gpio, gpio); | 188 | bcm_kona_gpio_unlock_gpio(kona_gpio, gpio); |
194 | return 0; | 189 | return 0; |
@@ -196,7 +191,7 @@ static int bcm_kona_gpio_request(struct gpio_chip *chip, unsigned gpio) | |||
196 | 191 | ||
197 | static void bcm_kona_gpio_free(struct gpio_chip *chip, unsigned gpio) | 192 | static void bcm_kona_gpio_free(struct gpio_chip *chip, unsigned gpio) |
198 | { | 193 | { |
199 | struct bcm_kona_gpio *kona_gpio = to_kona_gpio(chip); | 194 | struct bcm_kona_gpio *kona_gpio = gpiochip_get_data(chip); |
200 | 195 | ||
201 | bcm_kona_gpio_lock_gpio(kona_gpio, gpio); | 196 | bcm_kona_gpio_lock_gpio(kona_gpio, gpio); |
202 | } | 197 | } |
@@ -208,7 +203,7 @@ static int bcm_kona_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | |||
208 | u32 val; | 203 | u32 val; |
209 | unsigned long flags; | 204 | unsigned long flags; |
210 | 205 | ||
211 | kona_gpio = to_kona_gpio(chip); | 206 | kona_gpio = gpiochip_get_data(chip); |
212 | reg_base = kona_gpio->reg_base; | 207 | reg_base = kona_gpio->reg_base; |
213 | spin_lock_irqsave(&kona_gpio->lock, flags); | 208 | spin_lock_irqsave(&kona_gpio->lock, flags); |
214 | 209 | ||
@@ -232,7 +227,7 @@ static int bcm_kona_gpio_direction_output(struct gpio_chip *chip, | |||
232 | u32 val, reg_offset; | 227 | u32 val, reg_offset; |
233 | unsigned long flags; | 228 | unsigned long flags; |
234 | 229 | ||
235 | kona_gpio = to_kona_gpio(chip); | 230 | kona_gpio = gpiochip_get_data(chip); |
236 | reg_base = kona_gpio->reg_base; | 231 | reg_base = kona_gpio->reg_base; |
237 | spin_lock_irqsave(&kona_gpio->lock, flags); | 232 | spin_lock_irqsave(&kona_gpio->lock, flags); |
238 | 233 | ||
@@ -255,7 +250,7 @@ static int bcm_kona_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) | |||
255 | { | 250 | { |
256 | struct bcm_kona_gpio *kona_gpio; | 251 | struct bcm_kona_gpio *kona_gpio; |
257 | 252 | ||
258 | kona_gpio = to_kona_gpio(chip); | 253 | kona_gpio = gpiochip_get_data(chip); |
259 | if (gpio >= kona_gpio->gpio_chip.ngpio) | 254 | if (gpio >= kona_gpio->gpio_chip.ngpio) |
260 | return -ENXIO; | 255 | return -ENXIO; |
261 | return irq_create_mapping(kona_gpio->irq_domain, gpio); | 256 | return irq_create_mapping(kona_gpio->irq_domain, gpio); |
@@ -269,11 +264,11 @@ static int bcm_kona_gpio_set_debounce(struct gpio_chip *chip, unsigned gpio, | |||
269 | u32 val, res; | 264 | u32 val, res; |
270 | unsigned long flags; | 265 | unsigned long flags; |
271 | 266 | ||
272 | kona_gpio = to_kona_gpio(chip); | 267 | kona_gpio = gpiochip_get_data(chip); |
273 | reg_base = kona_gpio->reg_base; | 268 | reg_base = kona_gpio->reg_base; |
274 | /* debounce must be 1-128ms (or 0) */ | 269 | /* debounce must be 1-128ms (or 0) */ |
275 | if ((debounce > 0 && debounce < 1000) || debounce > 128000) { | 270 | if ((debounce > 0 && debounce < 1000) || debounce > 128000) { |
276 | dev_err(chip->dev, "Debounce value %u not in range\n", | 271 | dev_err(chip->parent, "Debounce value %u not in range\n", |
277 | debounce); | 272 | debounce); |
278 | return -EINVAL; | 273 | return -EINVAL; |
279 | } | 274 | } |
@@ -416,7 +411,7 @@ static int bcm_kona_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
416 | case IRQ_TYPE_LEVEL_LOW: | 411 | case IRQ_TYPE_LEVEL_LOW: |
417 | /* BCM GPIO doesn't support level triggering */ | 412 | /* BCM GPIO doesn't support level triggering */ |
418 | default: | 413 | default: |
419 | dev_err(kona_gpio->gpio_chip.dev, | 414 | dev_err(kona_gpio->gpio_chip.parent, |
420 | "Invalid BCM GPIO irq type 0x%x\n", type); | 415 | "Invalid BCM GPIO irq type 0x%x\n", type); |
421 | return -EINVAL; | 416 | return -EINVAL; |
422 | } | 417 | } |
@@ -477,7 +472,7 @@ static int bcm_kona_gpio_irq_reqres(struct irq_data *d) | |||
477 | struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d); | 472 | struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d); |
478 | 473 | ||
479 | if (gpiochip_lock_as_irq(&kona_gpio->gpio_chip, d->hwirq)) { | 474 | if (gpiochip_lock_as_irq(&kona_gpio->gpio_chip, d->hwirq)) { |
480 | dev_err(kona_gpio->gpio_chip.dev, | 475 | dev_err(kona_gpio->gpio_chip.parent, |
481 | "unable to lock HW IRQ %lu for IRQ\n", | 476 | "unable to lock HW IRQ %lu for IRQ\n", |
482 | d->hwirq); | 477 | d->hwirq); |
483 | return -EINVAL; | 478 | return -EINVAL; |
@@ -635,7 +630,7 @@ static int bcm_kona_gpio_probe(struct platform_device *pdev) | |||
635 | 630 | ||
636 | bcm_kona_gpio_reset(kona_gpio); | 631 | bcm_kona_gpio_reset(kona_gpio); |
637 | 632 | ||
638 | ret = gpiochip_add(chip); | 633 | ret = gpiochip_add_data(chip, kona_gpio); |
639 | if (ret < 0) { | 634 | if (ret < 0) { |
640 | dev_err(dev, "Couldn't add GPIO chip -- %d\n", ret); | 635 | dev_err(dev, "Couldn't add GPIO chip -- %d\n", ret); |
641 | goto err_irq_domain; | 636 | goto err_irq_domain; |
diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c index 4c64627c6bb5..d7644251e869 100644 --- a/drivers/gpio/gpio-brcmstb.c +++ b/drivers/gpio/gpio-brcmstb.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <linux/of_device.h> | 16 | #include <linux/of_device.h> |
17 | #include <linux/of_irq.h> | 17 | #include <linux/of_irq.h> |
18 | #include <linux/module.h> | 18 | #include <linux/module.h> |
19 | #include <linux/basic_mmio_gpio.h> | ||
20 | #include <linux/irqdomain.h> | 19 | #include <linux/irqdomain.h> |
21 | #include <linux/irqchip/chained_irq.h> | 20 | #include <linux/irqchip/chained_irq.h> |
22 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
@@ -35,7 +34,7 @@ | |||
35 | struct brcmstb_gpio_bank { | 34 | struct brcmstb_gpio_bank { |
36 | struct list_head node; | 35 | struct list_head node; |
37 | int id; | 36 | int id; |
38 | struct bgpio_chip bgc; | 37 | struct gpio_chip gc; |
39 | struct brcmstb_gpio_priv *parent_priv; | 38 | struct brcmstb_gpio_priv *parent_priv; |
40 | u32 width; | 39 | u32 width; |
41 | struct irq_chip irq_chip; | 40 | struct irq_chip irq_chip; |
@@ -57,37 +56,30 @@ struct brcmstb_gpio_priv { | |||
57 | /* assumes MAX_GPIO_PER_BANK is a multiple of 2 */ | 56 | /* assumes MAX_GPIO_PER_BANK is a multiple of 2 */ |
58 | #define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1)) | 57 | #define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1)) |
59 | 58 | ||
60 | static inline struct brcmstb_gpio_bank * | ||
61 | brcmstb_gpio_gc_to_bank(struct gpio_chip *gc) | ||
62 | { | ||
63 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
64 | return container_of(bgc, struct brcmstb_gpio_bank, bgc); | ||
65 | } | ||
66 | |||
67 | static inline struct brcmstb_gpio_priv * | 59 | static inline struct brcmstb_gpio_priv * |
68 | brcmstb_gpio_gc_to_priv(struct gpio_chip *gc) | 60 | brcmstb_gpio_gc_to_priv(struct gpio_chip *gc) |
69 | { | 61 | { |
70 | struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); | 62 | struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); |
71 | return bank->parent_priv; | 63 | return bank->parent_priv; |
72 | } | 64 | } |
73 | 65 | ||
74 | static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, | 66 | static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, |
75 | unsigned int offset, bool enable) | 67 | unsigned int offset, bool enable) |
76 | { | 68 | { |
77 | struct bgpio_chip *bgc = &bank->bgc; | 69 | struct gpio_chip *gc = &bank->gc; |
78 | struct brcmstb_gpio_priv *priv = bank->parent_priv; | 70 | struct brcmstb_gpio_priv *priv = bank->parent_priv; |
79 | u32 mask = bgc->pin2mask(bgc, offset); | 71 | u32 mask = gc->pin2mask(gc, offset); |
80 | u32 imask; | 72 | u32 imask; |
81 | unsigned long flags; | 73 | unsigned long flags; |
82 | 74 | ||
83 | spin_lock_irqsave(&bgc->lock, flags); | 75 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
84 | imask = bgc->read_reg(priv->reg_base + GIO_MASK(bank->id)); | 76 | imask = gc->read_reg(priv->reg_base + GIO_MASK(bank->id)); |
85 | if (enable) | 77 | if (enable) |
86 | imask |= mask; | 78 | imask |= mask; |
87 | else | 79 | else |
88 | imask &= ~mask; | 80 | imask &= ~mask; |
89 | bgc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask); | 81 | gc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask); |
90 | spin_unlock_irqrestore(&bgc->lock, flags); | 82 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
91 | } | 83 | } |
92 | 84 | ||
93 | /* -------------------- IRQ chip functions -------------------- */ | 85 | /* -------------------- IRQ chip functions -------------------- */ |
@@ -95,7 +87,7 @@ static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, | |||
95 | static void brcmstb_gpio_irq_mask(struct irq_data *d) | 87 | static void brcmstb_gpio_irq_mask(struct irq_data *d) |
96 | { | 88 | { |
97 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 89 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
98 | struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); | 90 | struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); |
99 | 91 | ||
100 | brcmstb_gpio_set_imask(bank, d->hwirq, false); | 92 | brcmstb_gpio_set_imask(bank, d->hwirq, false); |
101 | } | 93 | } |
@@ -103,7 +95,7 @@ static void brcmstb_gpio_irq_mask(struct irq_data *d) | |||
103 | static void brcmstb_gpio_irq_unmask(struct irq_data *d) | 95 | static void brcmstb_gpio_irq_unmask(struct irq_data *d) |
104 | { | 96 | { |
105 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 97 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
106 | struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); | 98 | struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); |
107 | 99 | ||
108 | brcmstb_gpio_set_imask(bank, d->hwirq, true); | 100 | brcmstb_gpio_set_imask(bank, d->hwirq, true); |
109 | } | 101 | } |
@@ -111,7 +103,7 @@ static void brcmstb_gpio_irq_unmask(struct irq_data *d) | |||
111 | static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type) | 103 | static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type) |
112 | { | 104 | { |
113 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 105 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
114 | struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); | 106 | struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); |
115 | struct brcmstb_gpio_priv *priv = bank->parent_priv; | 107 | struct brcmstb_gpio_priv *priv = bank->parent_priv; |
116 | u32 mask = BIT(d->hwirq); | 108 | u32 mask = BIT(d->hwirq); |
117 | u32 edge_insensitive, iedge_insensitive; | 109 | u32 edge_insensitive, iedge_insensitive; |
@@ -149,23 +141,23 @@ static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
149 | return -EINVAL; | 141 | return -EINVAL; |
150 | } | 142 | } |
151 | 143 | ||
152 | spin_lock_irqsave(&bank->bgc.lock, flags); | 144 | spin_lock_irqsave(&bank->gc.bgpio_lock, flags); |
153 | 145 | ||
154 | iedge_config = bank->bgc.read_reg(priv->reg_base + | 146 | iedge_config = bank->gc.read_reg(priv->reg_base + |
155 | GIO_EC(bank->id)) & ~mask; | 147 | GIO_EC(bank->id)) & ~mask; |
156 | iedge_insensitive = bank->bgc.read_reg(priv->reg_base + | 148 | iedge_insensitive = bank->gc.read_reg(priv->reg_base + |
157 | GIO_EI(bank->id)) & ~mask; | 149 | GIO_EI(bank->id)) & ~mask; |
158 | ilevel = bank->bgc.read_reg(priv->reg_base + | 150 | ilevel = bank->gc.read_reg(priv->reg_base + |
159 | GIO_LEVEL(bank->id)) & ~mask; | 151 | GIO_LEVEL(bank->id)) & ~mask; |
160 | 152 | ||
161 | bank->bgc.write_reg(priv->reg_base + GIO_EC(bank->id), | 153 | bank->gc.write_reg(priv->reg_base + GIO_EC(bank->id), |
162 | iedge_config | edge_config); | 154 | iedge_config | edge_config); |
163 | bank->bgc.write_reg(priv->reg_base + GIO_EI(bank->id), | 155 | bank->gc.write_reg(priv->reg_base + GIO_EI(bank->id), |
164 | iedge_insensitive | edge_insensitive); | 156 | iedge_insensitive | edge_insensitive); |
165 | bank->bgc.write_reg(priv->reg_base + GIO_LEVEL(bank->id), | 157 | bank->gc.write_reg(priv->reg_base + GIO_LEVEL(bank->id), |
166 | ilevel | level); | 158 | ilevel | level); |
167 | 159 | ||
168 | spin_unlock_irqrestore(&bank->bgc.lock, flags); | 160 | spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags); |
169 | return 0; | 161 | return 0; |
170 | } | 162 | } |
171 | 163 | ||
@@ -210,29 +202,29 @@ static irqreturn_t brcmstb_gpio_wake_irq_handler(int irq, void *data) | |||
210 | static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank) | 202 | static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank) |
211 | { | 203 | { |
212 | struct brcmstb_gpio_priv *priv = bank->parent_priv; | 204 | struct brcmstb_gpio_priv *priv = bank->parent_priv; |
213 | struct irq_domain *irq_domain = bank->bgc.gc.irqdomain; | 205 | struct irq_domain *irq_domain = bank->gc.irqdomain; |
214 | void __iomem *reg_base = priv->reg_base; | 206 | void __iomem *reg_base = priv->reg_base; |
215 | unsigned long status; | 207 | unsigned long status; |
216 | unsigned long flags; | 208 | unsigned long flags; |
217 | 209 | ||
218 | spin_lock_irqsave(&bank->bgc.lock, flags); | 210 | spin_lock_irqsave(&bank->gc.bgpio_lock, flags); |
219 | while ((status = bank->bgc.read_reg(reg_base + GIO_STAT(bank->id)) & | 211 | while ((status = bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) & |
220 | bank->bgc.read_reg(reg_base + GIO_MASK(bank->id)))) { | 212 | bank->gc.read_reg(reg_base + GIO_MASK(bank->id)))) { |
221 | int bit; | 213 | int bit; |
222 | 214 | ||
223 | for_each_set_bit(bit, &status, 32) { | 215 | for_each_set_bit(bit, &status, 32) { |
224 | u32 stat = bank->bgc.read_reg(reg_base + | 216 | u32 stat = bank->gc.read_reg(reg_base + |
225 | GIO_STAT(bank->id)); | 217 | GIO_STAT(bank->id)); |
226 | if (bit >= bank->width) | 218 | if (bit >= bank->width) |
227 | dev_warn(&priv->pdev->dev, | 219 | dev_warn(&priv->pdev->dev, |
228 | "IRQ for invalid GPIO (bank=%d, offset=%d)\n", | 220 | "IRQ for invalid GPIO (bank=%d, offset=%d)\n", |
229 | bank->id, bit); | 221 | bank->id, bit); |
230 | bank->bgc.write_reg(reg_base + GIO_STAT(bank->id), | 222 | bank->gc.write_reg(reg_base + GIO_STAT(bank->id), |
231 | stat | BIT(bit)); | 223 | stat | BIT(bit)); |
232 | generic_handle_irq(irq_find_mapping(irq_domain, bit)); | 224 | generic_handle_irq(irq_find_mapping(irq_domain, bit)); |
233 | } | 225 | } |
234 | } | 226 | } |
235 | spin_unlock_irqrestore(&bank->bgc.lock, flags); | 227 | spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags); |
236 | } | 228 | } |
237 | 229 | ||
238 | /* Each UPG GIO block has one IRQ for all banks */ | 230 | /* Each UPG GIO block has one IRQ for all banks */ |
@@ -303,9 +295,7 @@ static int brcmstb_gpio_remove(struct platform_device *pdev) | |||
303 | */ | 295 | */ |
304 | list_for_each(pos, &priv->bank_list) { | 296 | list_for_each(pos, &priv->bank_list) { |
305 | bank = list_entry(pos, struct brcmstb_gpio_bank, node); | 297 | bank = list_entry(pos, struct brcmstb_gpio_bank, node); |
306 | ret = bgpio_remove(&bank->bgc); | 298 | gpiochip_remove(&bank->gc); |
307 | if (ret) | ||
308 | dev_err(&pdev->dev, "gpiochip_remove fail in cleanup\n"); | ||
309 | } | 299 | } |
310 | if (priv->reboot_notifier.notifier_call) { | 300 | if (priv->reboot_notifier.notifier_call) { |
311 | ret = unregister_reboot_notifier(&priv->reboot_notifier); | 301 | ret = unregister_reboot_notifier(&priv->reboot_notifier); |
@@ -320,7 +310,7 @@ static int brcmstb_gpio_of_xlate(struct gpio_chip *gc, | |||
320 | const struct of_phandle_args *gpiospec, u32 *flags) | 310 | const struct of_phandle_args *gpiospec, u32 *flags) |
321 | { | 311 | { |
322 | struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc); | 312 | struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc); |
323 | struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); | 313 | struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); |
324 | int offset; | 314 | int offset; |
325 | 315 | ||
326 | if (gc->of_gpio_n_cells != 2) { | 316 | if (gc->of_gpio_n_cells != 2) { |
@@ -398,9 +388,9 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev, | |||
398 | if (priv->can_wake) | 388 | if (priv->can_wake) |
399 | bank->irq_chip.irq_set_wake = brcmstb_gpio_irq_set_wake; | 389 | bank->irq_chip.irq_set_wake = brcmstb_gpio_irq_set_wake; |
400 | 390 | ||
401 | gpiochip_irqchip_add(&bank->bgc.gc, &bank->irq_chip, 0, | 391 | gpiochip_irqchip_add(&bank->gc, &bank->irq_chip, 0, |
402 | handle_simple_irq, IRQ_TYPE_NONE); | 392 | handle_simple_irq, IRQ_TYPE_NONE); |
403 | gpiochip_set_chained_irqchip(&bank->bgc.gc, &bank->irq_chip, | 393 | gpiochip_set_chained_irqchip(&bank->gc, &bank->irq_chip, |
404 | priv->parent_irq, brcmstb_gpio_irq_handler); | 394 | priv->parent_irq, brcmstb_gpio_irq_handler); |
405 | 395 | ||
406 | return 0; | 396 | return 0; |
@@ -419,6 +409,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev) | |||
419 | int num_banks = 0; | 409 | int num_banks = 0; |
420 | int err; | 410 | int err; |
421 | static int gpio_base; | 411 | static int gpio_base; |
412 | unsigned long flags = 0; | ||
422 | 413 | ||
423 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); | 414 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
424 | if (!priv) | 415 | if (!priv) |
@@ -448,10 +439,21 @@ static int brcmstb_gpio_probe(struct platform_device *pdev) | |||
448 | if (brcmstb_gpio_sanity_check_banks(dev, np, res)) | 439 | if (brcmstb_gpio_sanity_check_banks(dev, np, res)) |
449 | return -EINVAL; | 440 | return -EINVAL; |
450 | 441 | ||
442 | /* | ||
443 | * MIPS endianness is configured by boot strap, which also reverses all | ||
444 | * bus endianness (i.e., big-endian CPU + big endian bus ==> native | ||
445 | * endian I/O). | ||
446 | * | ||
447 | * Other architectures (e.g., ARM) either do not support big endian, or | ||
448 | * else leave I/O in little endian mode. | ||
449 | */ | ||
450 | #if defined(CONFIG_MIPS) && defined(__BIG_ENDIAN) | ||
451 | flags = BGPIOF_BIG_ENDIAN_BYTE_ORDER; | ||
452 | #endif | ||
453 | |||
451 | of_property_for_each_u32(np, "brcm,gpio-bank-widths", prop, p, | 454 | of_property_for_each_u32(np, "brcm,gpio-bank-widths", prop, p, |
452 | bank_width) { | 455 | bank_width) { |
453 | struct brcmstb_gpio_bank *bank; | 456 | struct brcmstb_gpio_bank *bank; |
454 | struct bgpio_chip *bgc; | ||
455 | struct gpio_chip *gc; | 457 | struct gpio_chip *gc; |
456 | 458 | ||
457 | bank = devm_kzalloc(dev, sizeof(*bank), GFP_KERNEL); | 459 | bank = devm_kzalloc(dev, sizeof(*bank), GFP_KERNEL); |
@@ -473,17 +475,16 @@ static int brcmstb_gpio_probe(struct platform_device *pdev) | |||
473 | * Regs are 4 bytes wide, have data reg, no set/clear regs, | 475 | * Regs are 4 bytes wide, have data reg, no set/clear regs, |
474 | * and direction bits have 0 = output and 1 = input | 476 | * and direction bits have 0 = output and 1 = input |
475 | */ | 477 | */ |
476 | bgc = &bank->bgc; | 478 | gc = &bank->gc; |
477 | err = bgpio_init(bgc, dev, 4, | 479 | err = bgpio_init(gc, dev, 4, |
478 | reg_base + GIO_DATA(bank->id), | 480 | reg_base + GIO_DATA(bank->id), |
479 | NULL, NULL, NULL, | 481 | NULL, NULL, NULL, |
480 | reg_base + GIO_IODIR(bank->id), 0); | 482 | reg_base + GIO_IODIR(bank->id), flags); |
481 | if (err) { | 483 | if (err) { |
482 | dev_err(dev, "bgpio_init() failed\n"); | 484 | dev_err(dev, "bgpio_init() failed\n"); |
483 | goto fail; | 485 | goto fail; |
484 | } | 486 | } |
485 | 487 | ||
486 | gc = &bgc->gc; | ||
487 | gc->of_node = np; | 488 | gc->of_node = np; |
488 | gc->owner = THIS_MODULE; | 489 | gc->owner = THIS_MODULE; |
489 | gc->label = np->full_name; | 490 | gc->label = np->full_name; |
@@ -497,9 +498,9 @@ static int brcmstb_gpio_probe(struct platform_device *pdev) | |||
497 | * Mask all interrupts by default, since wakeup interrupts may | 498 | * Mask all interrupts by default, since wakeup interrupts may |
498 | * be retained from S5 cold boot | 499 | * be retained from S5 cold boot |
499 | */ | 500 | */ |
500 | bank->bgc.write_reg(reg_base + GIO_MASK(bank->id), 0); | 501 | gc->write_reg(reg_base + GIO_MASK(bank->id), 0); |
501 | 502 | ||
502 | err = gpiochip_add(gc); | 503 | err = gpiochip_add_data(gc, bank); |
503 | if (err) { | 504 | if (err) { |
504 | dev_err(dev, "Could not add gpiochip for bank %d\n", | 505 | dev_err(dev, "Could not add gpiochip for bank %d\n", |
505 | bank->id); | 506 | bank->id); |
diff --git a/drivers/gpio/gpio-bt8xx.c b/drivers/gpio/gpio-bt8xx.c index 7e4c43c18960..acefb25e8eca 100644 --- a/drivers/gpio/gpio-bt8xx.c +++ b/drivers/gpio/gpio-bt8xx.c | |||
@@ -80,7 +80,7 @@ MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, which is the | |||
80 | 80 | ||
81 | static int bt8xxgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) | 81 | static int bt8xxgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) |
82 | { | 82 | { |
83 | struct bt8xxgpio *bg = container_of(gpio, struct bt8xxgpio, gpio); | 83 | struct bt8xxgpio *bg = gpiochip_get_data(gpio); |
84 | unsigned long flags; | 84 | unsigned long flags; |
85 | u32 outen, data; | 85 | u32 outen, data; |
86 | 86 | ||
@@ -101,7 +101,7 @@ static int bt8xxgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) | |||
101 | 101 | ||
102 | static int bt8xxgpio_gpio_get(struct gpio_chip *gpio, unsigned nr) | 102 | static int bt8xxgpio_gpio_get(struct gpio_chip *gpio, unsigned nr) |
103 | { | 103 | { |
104 | struct bt8xxgpio *bg = container_of(gpio, struct bt8xxgpio, gpio); | 104 | struct bt8xxgpio *bg = gpiochip_get_data(gpio); |
105 | unsigned long flags; | 105 | unsigned long flags; |
106 | u32 val; | 106 | u32 val; |
107 | 107 | ||
@@ -115,7 +115,7 @@ static int bt8xxgpio_gpio_get(struct gpio_chip *gpio, unsigned nr) | |||
115 | static int bt8xxgpio_gpio_direction_output(struct gpio_chip *gpio, | 115 | static int bt8xxgpio_gpio_direction_output(struct gpio_chip *gpio, |
116 | unsigned nr, int val) | 116 | unsigned nr, int val) |
117 | { | 117 | { |
118 | struct bt8xxgpio *bg = container_of(gpio, struct bt8xxgpio, gpio); | 118 | struct bt8xxgpio *bg = gpiochip_get_data(gpio); |
119 | unsigned long flags; | 119 | unsigned long flags; |
120 | u32 outen, data; | 120 | u32 outen, data; |
121 | 121 | ||
@@ -140,7 +140,7 @@ static int bt8xxgpio_gpio_direction_output(struct gpio_chip *gpio, | |||
140 | static void bt8xxgpio_gpio_set(struct gpio_chip *gpio, | 140 | static void bt8xxgpio_gpio_set(struct gpio_chip *gpio, |
141 | unsigned nr, int val) | 141 | unsigned nr, int val) |
142 | { | 142 | { |
143 | struct bt8xxgpio *bg = container_of(gpio, struct bt8xxgpio, gpio); | 143 | struct bt8xxgpio *bg = gpiochip_get_data(gpio); |
144 | unsigned long flags; | 144 | unsigned long flags; |
145 | u32 data; | 145 | u32 data; |
146 | 146 | ||
@@ -217,7 +217,7 @@ static int bt8xxgpio_probe(struct pci_dev *dev, | |||
217 | bgwrite(0, BT848_GPIO_OUT_EN); | 217 | bgwrite(0, BT848_GPIO_OUT_EN); |
218 | 218 | ||
219 | bt8xxgpio_gpio_setup(bg); | 219 | bt8xxgpio_gpio_setup(bg); |
220 | err = gpiochip_add(&bg->gpio); | 220 | err = gpiochip_add_data(&bg->gpio, bg); |
221 | if (err) { | 221 | if (err) { |
222 | printk(KERN_ERR "bt8xxgpio: Failed to register GPIOs\n"); | 222 | printk(KERN_ERR "bt8xxgpio: Failed to register GPIOs\n"); |
223 | goto err_disable; | 223 | goto err_disable; |
diff --git a/drivers/gpio/gpio-clps711x.c b/drivers/gpio/gpio-clps711x.c index b6908f1ff1ab..c84f9551f108 100644 --- a/drivers/gpio/gpio-clps711x.c +++ b/drivers/gpio/gpio-clps711x.c | |||
@@ -10,24 +10,23 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/err.h> | 12 | #include <linux/err.h> |
13 | #include <linux/gpio.h> | ||
14 | #include <linux/module.h> | 13 | #include <linux/module.h> |
15 | #include <linux/basic_mmio_gpio.h> | 14 | #include <linux/gpio/driver.h> |
16 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
17 | 16 | ||
18 | static int clps711x_gpio_probe(struct platform_device *pdev) | 17 | static int clps711x_gpio_probe(struct platform_device *pdev) |
19 | { | 18 | { |
20 | struct device_node *np = pdev->dev.of_node; | 19 | struct device_node *np = pdev->dev.of_node; |
21 | void __iomem *dat, *dir; | 20 | void __iomem *dat, *dir; |
22 | struct bgpio_chip *bgc; | 21 | struct gpio_chip *gc; |
23 | struct resource *res; | 22 | struct resource *res; |
24 | int err, id = np ? of_alias_get_id(np, "gpio") : pdev->id; | 23 | int err, id = np ? of_alias_get_id(np, "gpio") : pdev->id; |
25 | 24 | ||
26 | if ((id < 0) || (id > 4)) | 25 | if ((id < 0) || (id > 4)) |
27 | return -ENODEV; | 26 | return -ENODEV; |
28 | 27 | ||
29 | bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL); | 28 | gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); |
30 | if (!bgc) | 29 | if (!gc) |
31 | return -ENOMEM; | 30 | return -ENOMEM; |
32 | 31 | ||
33 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 32 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
@@ -43,11 +42,11 @@ static int clps711x_gpio_probe(struct platform_device *pdev) | |||
43 | switch (id) { | 42 | switch (id) { |
44 | case 3: | 43 | case 3: |
45 | /* PORTD is inverted logic for direction register */ | 44 | /* PORTD is inverted logic for direction register */ |
46 | err = bgpio_init(bgc, &pdev->dev, 1, dat, NULL, NULL, | 45 | err = bgpio_init(gc, &pdev->dev, 1, dat, NULL, NULL, |
47 | NULL, dir, 0); | 46 | NULL, dir, 0); |
48 | break; | 47 | break; |
49 | default: | 48 | default: |
50 | err = bgpio_init(bgc, &pdev->dev, 1, dat, NULL, NULL, | 49 | err = bgpio_init(gc, &pdev->dev, 1, dat, NULL, NULL, |
51 | dir, NULL, 0); | 50 | dir, NULL, 0); |
52 | break; | 51 | break; |
53 | } | 52 | } |
@@ -58,24 +57,25 @@ static int clps711x_gpio_probe(struct platform_device *pdev) | |||
58 | switch (id) { | 57 | switch (id) { |
59 | case 4: | 58 | case 4: |
60 | /* PORTE is 3 lines only */ | 59 | /* PORTE is 3 lines only */ |
61 | bgc->gc.ngpio = 3; | 60 | gc->ngpio = 3; |
62 | break; | 61 | break; |
63 | default: | 62 | default: |
64 | break; | 63 | break; |
65 | } | 64 | } |
66 | 65 | ||
67 | bgc->gc.base = id * 8; | 66 | gc->base = id * 8; |
68 | bgc->gc.owner = THIS_MODULE; | 67 | gc->owner = THIS_MODULE; |
69 | platform_set_drvdata(pdev, bgc); | 68 | platform_set_drvdata(pdev, gc); |
70 | 69 | ||
71 | return gpiochip_add(&bgc->gc); | 70 | return gpiochip_add_data(gc, NULL); |
72 | } | 71 | } |
73 | 72 | ||
74 | static int clps711x_gpio_remove(struct platform_device *pdev) | 73 | static int clps711x_gpio_remove(struct platform_device *pdev) |
75 | { | 74 | { |
76 | struct bgpio_chip *bgc = platform_get_drvdata(pdev); | 75 | struct gpio_chip *gc = platform_get_drvdata(pdev); |
77 | 76 | ||
78 | return bgpio_remove(bgc); | 77 | gpiochip_remove(gc); |
78 | return 0; | ||
79 | } | 79 | } |
80 | 80 | ||
81 | static const struct of_device_id __maybe_unused clps711x_gpio_ids[] = { | 81 | static const struct of_device_id __maybe_unused clps711x_gpio_ids[] = { |
diff --git a/drivers/gpio/gpio-crystalcove.c b/drivers/gpio/gpio-crystalcove.c index fddd204dc9b6..7865ef0d3352 100644 --- a/drivers/gpio/gpio-crystalcove.c +++ b/drivers/gpio/gpio-crystalcove.c | |||
@@ -86,11 +86,6 @@ struct crystalcove_gpio { | |||
86 | bool set_irq_mask; | 86 | bool set_irq_mask; |
87 | }; | 87 | }; |
88 | 88 | ||
89 | static inline struct crystalcove_gpio *to_cg(struct gpio_chip *gc) | ||
90 | { | ||
91 | return container_of(gc, struct crystalcove_gpio, chip); | ||
92 | } | ||
93 | |||
94 | static inline int to_reg(int gpio, enum ctrl_register reg_type) | 89 | static inline int to_reg(int gpio, enum ctrl_register reg_type) |
95 | { | 90 | { |
96 | int reg; | 91 | int reg; |
@@ -134,7 +129,7 @@ static void crystalcove_update_irq_ctrl(struct crystalcove_gpio *cg, int gpio) | |||
134 | 129 | ||
135 | static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) | 130 | static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) |
136 | { | 131 | { |
137 | struct crystalcove_gpio *cg = to_cg(chip); | 132 | struct crystalcove_gpio *cg = gpiochip_get_data(chip); |
138 | 133 | ||
139 | if (gpio > CRYSTALCOVE_VGPIO_NUM) | 134 | if (gpio > CRYSTALCOVE_VGPIO_NUM) |
140 | return 0; | 135 | return 0; |
@@ -146,7 +141,7 @@ static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) | |||
146 | static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, | 141 | static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, |
147 | int value) | 142 | int value) |
148 | { | 143 | { |
149 | struct crystalcove_gpio *cg = to_cg(chip); | 144 | struct crystalcove_gpio *cg = gpiochip_get_data(chip); |
150 | 145 | ||
151 | if (gpio > CRYSTALCOVE_VGPIO_NUM) | 146 | if (gpio > CRYSTALCOVE_VGPIO_NUM) |
152 | return 0; | 147 | return 0; |
@@ -157,7 +152,7 @@ static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, | |||
157 | 152 | ||
158 | static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio) | 153 | static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio) |
159 | { | 154 | { |
160 | struct crystalcove_gpio *cg = to_cg(chip); | 155 | struct crystalcove_gpio *cg = gpiochip_get_data(chip); |
161 | int ret; | 156 | int ret; |
162 | unsigned int val; | 157 | unsigned int val; |
163 | 158 | ||
@@ -174,7 +169,7 @@ static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio) | |||
174 | static void crystalcove_gpio_set(struct gpio_chip *chip, | 169 | static void crystalcove_gpio_set(struct gpio_chip *chip, |
175 | unsigned gpio, int value) | 170 | unsigned gpio, int value) |
176 | { | 171 | { |
177 | struct crystalcove_gpio *cg = to_cg(chip); | 172 | struct crystalcove_gpio *cg = gpiochip_get_data(chip); |
178 | 173 | ||
179 | if (gpio > CRYSTALCOVE_VGPIO_NUM) | 174 | if (gpio > CRYSTALCOVE_VGPIO_NUM) |
180 | return; | 175 | return; |
@@ -187,7 +182,8 @@ static void crystalcove_gpio_set(struct gpio_chip *chip, | |||
187 | 182 | ||
188 | static int crystalcove_irq_type(struct irq_data *data, unsigned type) | 183 | static int crystalcove_irq_type(struct irq_data *data, unsigned type) |
189 | { | 184 | { |
190 | struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data)); | 185 | struct crystalcove_gpio *cg = |
186 | gpiochip_get_data(irq_data_get_irq_chip_data(data)); | ||
191 | 187 | ||
192 | switch (type) { | 188 | switch (type) { |
193 | case IRQ_TYPE_NONE: | 189 | case IRQ_TYPE_NONE: |
@@ -213,14 +209,16 @@ static int crystalcove_irq_type(struct irq_data *data, unsigned type) | |||
213 | 209 | ||
214 | static void crystalcove_bus_lock(struct irq_data *data) | 210 | static void crystalcove_bus_lock(struct irq_data *data) |
215 | { | 211 | { |
216 | struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data)); | 212 | struct crystalcove_gpio *cg = |
213 | gpiochip_get_data(irq_data_get_irq_chip_data(data)); | ||
217 | 214 | ||
218 | mutex_lock(&cg->buslock); | 215 | mutex_lock(&cg->buslock); |
219 | } | 216 | } |
220 | 217 | ||
221 | static void crystalcove_bus_sync_unlock(struct irq_data *data) | 218 | static void crystalcove_bus_sync_unlock(struct irq_data *data) |
222 | { | 219 | { |
223 | struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data)); | 220 | struct crystalcove_gpio *cg = |
221 | gpiochip_get_data(irq_data_get_irq_chip_data(data)); | ||
224 | int gpio = data->hwirq; | 222 | int gpio = data->hwirq; |
225 | 223 | ||
226 | if (cg->update & UPDATE_IRQ_TYPE) | 224 | if (cg->update & UPDATE_IRQ_TYPE) |
@@ -234,7 +232,8 @@ static void crystalcove_bus_sync_unlock(struct irq_data *data) | |||
234 | 232 | ||
235 | static void crystalcove_irq_unmask(struct irq_data *data) | 233 | static void crystalcove_irq_unmask(struct irq_data *data) |
236 | { | 234 | { |
237 | struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data)); | 235 | struct crystalcove_gpio *cg = |
236 | gpiochip_get_data(irq_data_get_irq_chip_data(data)); | ||
238 | 237 | ||
239 | cg->set_irq_mask = false; | 238 | cg->set_irq_mask = false; |
240 | cg->update |= UPDATE_IRQ_MASK; | 239 | cg->update |= UPDATE_IRQ_MASK; |
@@ -242,7 +241,8 @@ static void crystalcove_irq_unmask(struct irq_data *data) | |||
242 | 241 | ||
243 | static void crystalcove_irq_mask(struct irq_data *data) | 242 | static void crystalcove_irq_mask(struct irq_data *data) |
244 | { | 243 | { |
245 | struct crystalcove_gpio *cg = to_cg(irq_data_get_irq_chip_data(data)); | 244 | struct crystalcove_gpio *cg = |
245 | gpiochip_get_data(irq_data_get_irq_chip_data(data)); | ||
246 | 246 | ||
247 | cg->set_irq_mask = true; | 247 | cg->set_irq_mask = true; |
248 | cg->update |= UPDATE_IRQ_MASK; | 248 | cg->update |= UPDATE_IRQ_MASK; |
@@ -288,7 +288,7 @@ static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data) | |||
288 | static void crystalcove_gpio_dbg_show(struct seq_file *s, | 288 | static void crystalcove_gpio_dbg_show(struct seq_file *s, |
289 | struct gpio_chip *chip) | 289 | struct gpio_chip *chip) |
290 | { | 290 | { |
291 | struct crystalcove_gpio *cg = to_cg(chip); | 291 | struct crystalcove_gpio *cg = gpiochip_get_data(chip); |
292 | int gpio, offset; | 292 | int gpio, offset; |
293 | unsigned int ctlo, ctli, mirqs0, mirqsx, irq; | 293 | unsigned int ctlo, ctli, mirqs0, mirqsx, irq; |
294 | 294 | ||
@@ -341,11 +341,11 @@ static int crystalcove_gpio_probe(struct platform_device *pdev) | |||
341 | cg->chip.base = -1; | 341 | cg->chip.base = -1; |
342 | cg->chip.ngpio = CRYSTALCOVE_VGPIO_NUM; | 342 | cg->chip.ngpio = CRYSTALCOVE_VGPIO_NUM; |
343 | cg->chip.can_sleep = true; | 343 | cg->chip.can_sleep = true; |
344 | cg->chip.dev = dev; | 344 | cg->chip.parent = dev; |
345 | cg->chip.dbg_show = crystalcove_gpio_dbg_show; | 345 | cg->chip.dbg_show = crystalcove_gpio_dbg_show; |
346 | cg->regmap = pmic->regmap; | 346 | cg->regmap = pmic->regmap; |
347 | 347 | ||
348 | retval = gpiochip_add(&cg->chip); | 348 | retval = gpiochip_add_data(&cg->chip, cg); |
349 | if (retval) { | 349 | if (retval) { |
350 | dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval); | 350 | dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval); |
351 | return retval; | 351 | return retval; |
diff --git a/drivers/gpio/gpio-cs5535.c b/drivers/gpio/gpio-cs5535.c index 7b0b198a563d..eccb712e09fb 100644 --- a/drivers/gpio/gpio-cs5535.c +++ b/drivers/gpio/gpio-cs5535.c | |||
@@ -42,6 +42,10 @@ static ulong mask = GPIO_DEFAULT_MASK; | |||
42 | module_param_named(mask, mask, ulong, 0444); | 42 | module_param_named(mask, mask, ulong, 0444); |
43 | MODULE_PARM_DESC(mask, "GPIO channel mask."); | 43 | MODULE_PARM_DESC(mask, "GPIO channel mask."); |
44 | 44 | ||
45 | /* | ||
46 | * FIXME: convert this singleton driver to use the state container | ||
47 | * design pattern, see Documentation/driver-model/design-patterns.txt | ||
48 | */ | ||
45 | static struct cs5535_gpio_chip { | 49 | static struct cs5535_gpio_chip { |
46 | struct gpio_chip chip; | 50 | struct gpio_chip chip; |
47 | resource_size_t base; | 51 | resource_size_t base; |
@@ -201,8 +205,7 @@ EXPORT_SYMBOL_GPL(cs5535_gpio_setup_event); | |||
201 | 205 | ||
202 | static int chip_gpio_request(struct gpio_chip *c, unsigned offset) | 206 | static int chip_gpio_request(struct gpio_chip *c, unsigned offset) |
203 | { | 207 | { |
204 | struct cs5535_gpio_chip *chip = | 208 | struct cs5535_gpio_chip *chip = gpiochip_get_data(c); |
205 | container_of(c, struct cs5535_gpio_chip, chip); | ||
206 | unsigned long flags; | 209 | unsigned long flags; |
207 | 210 | ||
208 | spin_lock_irqsave(&chip->lock, flags); | 211 | spin_lock_irqsave(&chip->lock, flags); |
@@ -242,8 +245,7 @@ static void chip_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | |||
242 | 245 | ||
243 | static int chip_direction_input(struct gpio_chip *c, unsigned offset) | 246 | static int chip_direction_input(struct gpio_chip *c, unsigned offset) |
244 | { | 247 | { |
245 | struct cs5535_gpio_chip *chip = | 248 | struct cs5535_gpio_chip *chip = gpiochip_get_data(c); |
246 | container_of(c, struct cs5535_gpio_chip, chip); | ||
247 | unsigned long flags; | 249 | unsigned long flags; |
248 | 250 | ||
249 | spin_lock_irqsave(&chip->lock, flags); | 251 | spin_lock_irqsave(&chip->lock, flags); |
@@ -256,8 +258,7 @@ static int chip_direction_input(struct gpio_chip *c, unsigned offset) | |||
256 | 258 | ||
257 | static int chip_direction_output(struct gpio_chip *c, unsigned offset, int val) | 259 | static int chip_direction_output(struct gpio_chip *c, unsigned offset, int val) |
258 | { | 260 | { |
259 | struct cs5535_gpio_chip *chip = | 261 | struct cs5535_gpio_chip *chip = gpiochip_get_data(c); |
260 | container_of(c, struct cs5535_gpio_chip, chip); | ||
261 | unsigned long flags; | 262 | unsigned long flags; |
262 | 263 | ||
263 | spin_lock_irqsave(&chip->lock, flags); | 264 | spin_lock_irqsave(&chip->lock, flags); |
@@ -347,7 +348,7 @@ static int cs5535_gpio_probe(struct platform_device *pdev) | |||
347 | mask_orig, mask); | 348 | mask_orig, mask); |
348 | 349 | ||
349 | /* finally, register with the generic GPIO API */ | 350 | /* finally, register with the generic GPIO API */ |
350 | err = gpiochip_add(&cs5535_gpio_chip.chip); | 351 | err = gpiochip_add_data(&cs5535_gpio_chip.chip, &cs5535_gpio_chip); |
351 | if (err) | 352 | if (err) |
352 | goto done; | 353 | goto done; |
353 | 354 | ||
diff --git a/drivers/gpio/gpio-da9052.c b/drivers/gpio/gpio-da9052.c index 2e9578ec0ca1..f9b3247ad14b 100644 --- a/drivers/gpio/gpio-da9052.c +++ b/drivers/gpio/gpio-da9052.c | |||
@@ -51,11 +51,6 @@ struct da9052_gpio { | |||
51 | struct gpio_chip gp; | 51 | struct gpio_chip gp; |
52 | }; | 52 | }; |
53 | 53 | ||
54 | static inline struct da9052_gpio *to_da9052_gpio(struct gpio_chip *chip) | ||
55 | { | ||
56 | return container_of(chip, struct da9052_gpio, gp); | ||
57 | } | ||
58 | |||
59 | static unsigned char da9052_gpio_port_odd(unsigned offset) | 54 | static unsigned char da9052_gpio_port_odd(unsigned offset) |
60 | { | 55 | { |
61 | return offset % 2; | 56 | return offset % 2; |
@@ -63,7 +58,7 @@ static unsigned char da9052_gpio_port_odd(unsigned offset) | |||
63 | 58 | ||
64 | static int da9052_gpio_get(struct gpio_chip *gc, unsigned offset) | 59 | static int da9052_gpio_get(struct gpio_chip *gc, unsigned offset) |
65 | { | 60 | { |
66 | struct da9052_gpio *gpio = to_da9052_gpio(gc); | 61 | struct da9052_gpio *gpio = gpiochip_get_data(gc); |
67 | int da9052_port_direction = 0; | 62 | int da9052_port_direction = 0; |
68 | int ret; | 63 | int ret; |
69 | 64 | ||
@@ -89,15 +84,12 @@ static int da9052_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
89 | DA9052_STATUS_D_REG); | 84 | DA9052_STATUS_D_REG); |
90 | if (ret < 0) | 85 | if (ret < 0) |
91 | return ret; | 86 | return ret; |
92 | if (ret & (1 << DA9052_GPIO_SHIFT_COUNT(offset))) | 87 | return !!(ret & (1 << DA9052_GPIO_SHIFT_COUNT(offset))); |
93 | return 1; | ||
94 | else | ||
95 | return 0; | ||
96 | case DA9052_OUTPUT_PUSHPULL: | 88 | case DA9052_OUTPUT_PUSHPULL: |
97 | if (da9052_gpio_port_odd(offset)) | 89 | if (da9052_gpio_port_odd(offset)) |
98 | return ret & DA9052_GPIO_ODD_PORT_MODE; | 90 | return !!(ret & DA9052_GPIO_ODD_PORT_MODE); |
99 | else | 91 | else |
100 | return ret & DA9052_GPIO_EVEN_PORT_MODE; | 92 | return !!(ret & DA9052_GPIO_EVEN_PORT_MODE); |
101 | default: | 93 | default: |
102 | return -EINVAL; | 94 | return -EINVAL; |
103 | } | 95 | } |
@@ -105,7 +97,7 @@ static int da9052_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
105 | 97 | ||
106 | static void da9052_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | 98 | static void da9052_gpio_set(struct gpio_chip *gc, unsigned offset, int value) |
107 | { | 99 | { |
108 | struct da9052_gpio *gpio = to_da9052_gpio(gc); | 100 | struct da9052_gpio *gpio = gpiochip_get_data(gc); |
109 | int ret; | 101 | int ret; |
110 | 102 | ||
111 | if (da9052_gpio_port_odd(offset)) { | 103 | if (da9052_gpio_port_odd(offset)) { |
@@ -131,7 +123,7 @@ static void da9052_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |||
131 | 123 | ||
132 | static int da9052_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | 124 | static int da9052_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
133 | { | 125 | { |
134 | struct da9052_gpio *gpio = to_da9052_gpio(gc); | 126 | struct da9052_gpio *gpio = gpiochip_get_data(gc); |
135 | unsigned char register_value; | 127 | unsigned char register_value; |
136 | int ret; | 128 | int ret; |
137 | 129 | ||
@@ -157,7 +149,7 @@ static int da9052_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | |||
157 | static int da9052_gpio_direction_output(struct gpio_chip *gc, | 149 | static int da9052_gpio_direction_output(struct gpio_chip *gc, |
158 | unsigned offset, int value) | 150 | unsigned offset, int value) |
159 | { | 151 | { |
160 | struct da9052_gpio *gpio = to_da9052_gpio(gc); | 152 | struct da9052_gpio *gpio = gpiochip_get_data(gc); |
161 | unsigned char register_value; | 153 | unsigned char register_value; |
162 | int ret; | 154 | int ret; |
163 | 155 | ||
@@ -182,7 +174,7 @@ static int da9052_gpio_direction_output(struct gpio_chip *gc, | |||
182 | 174 | ||
183 | static int da9052_gpio_to_irq(struct gpio_chip *gc, u32 offset) | 175 | static int da9052_gpio_to_irq(struct gpio_chip *gc, u32 offset) |
184 | { | 176 | { |
185 | struct da9052_gpio *gpio = to_da9052_gpio(gc); | 177 | struct da9052_gpio *gpio = gpiochip_get_data(gc); |
186 | struct da9052 *da9052 = gpio->da9052; | 178 | struct da9052 *da9052 = gpio->da9052; |
187 | 179 | ||
188 | int irq; | 180 | int irq; |
@@ -222,7 +214,7 @@ static int da9052_gpio_probe(struct platform_device *pdev) | |||
222 | if (pdata && pdata->gpio_base) | 214 | if (pdata && pdata->gpio_base) |
223 | gpio->gp.base = pdata->gpio_base; | 215 | gpio->gp.base = pdata->gpio_base; |
224 | 216 | ||
225 | ret = gpiochip_add(&gpio->gp); | 217 | ret = gpiochip_add_data(&gpio->gp, gpio); |
226 | if (ret < 0) { | 218 | if (ret < 0) { |
227 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); | 219 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); |
228 | return ret; | 220 | return ret; |
diff --git a/drivers/gpio/gpio-da9055.c b/drivers/gpio/gpio-da9055.c index 7227e6ed3cb9..18210fb2cb13 100644 --- a/drivers/gpio/gpio-da9055.c +++ b/drivers/gpio/gpio-da9055.c | |||
@@ -35,14 +35,9 @@ struct da9055_gpio { | |||
35 | struct gpio_chip gp; | 35 | struct gpio_chip gp; |
36 | }; | 36 | }; |
37 | 37 | ||
38 | static inline struct da9055_gpio *to_da9055_gpio(struct gpio_chip *chip) | ||
39 | { | ||
40 | return container_of(chip, struct da9055_gpio, gp); | ||
41 | } | ||
42 | |||
43 | static int da9055_gpio_get(struct gpio_chip *gc, unsigned offset) | 38 | static int da9055_gpio_get(struct gpio_chip *gc, unsigned offset) |
44 | { | 39 | { |
45 | struct da9055_gpio *gpio = to_da9055_gpio(gc); | 40 | struct da9055_gpio *gpio = gpiochip_get_data(gc); |
46 | int gpio_direction = 0; | 41 | int gpio_direction = 0; |
47 | int ret; | 42 | int ret; |
48 | 43 | ||
@@ -71,7 +66,7 @@ static int da9055_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
71 | 66 | ||
72 | static void da9055_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | 67 | static void da9055_gpio_set(struct gpio_chip *gc, unsigned offset, int value) |
73 | { | 68 | { |
74 | struct da9055_gpio *gpio = to_da9055_gpio(gc); | 69 | struct da9055_gpio *gpio = gpiochip_get_data(gc); |
75 | 70 | ||
76 | da9055_reg_update(gpio->da9055, | 71 | da9055_reg_update(gpio->da9055, |
77 | DA9055_REG_GPIO_MODE0_2, | 72 | DA9055_REG_GPIO_MODE0_2, |
@@ -81,7 +76,7 @@ static void da9055_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |||
81 | 76 | ||
82 | static int da9055_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | 77 | static int da9055_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
83 | { | 78 | { |
84 | struct da9055_gpio *gpio = to_da9055_gpio(gc); | 79 | struct da9055_gpio *gpio = gpiochip_get_data(gc); |
85 | unsigned char reg_byte; | 80 | unsigned char reg_byte; |
86 | 81 | ||
87 | reg_byte = (DA9055_ACT_LOW | DA9055_GPI) | 82 | reg_byte = (DA9055_ACT_LOW | DA9055_GPI) |
@@ -97,7 +92,7 @@ static int da9055_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | |||
97 | static int da9055_gpio_direction_output(struct gpio_chip *gc, | 92 | static int da9055_gpio_direction_output(struct gpio_chip *gc, |
98 | unsigned offset, int value) | 93 | unsigned offset, int value) |
99 | { | 94 | { |
100 | struct da9055_gpio *gpio = to_da9055_gpio(gc); | 95 | struct da9055_gpio *gpio = gpiochip_get_data(gc); |
101 | unsigned char reg_byte; | 96 | unsigned char reg_byte; |
102 | int ret; | 97 | int ret; |
103 | 98 | ||
@@ -119,7 +114,7 @@ static int da9055_gpio_direction_output(struct gpio_chip *gc, | |||
119 | 114 | ||
120 | static int da9055_gpio_to_irq(struct gpio_chip *gc, u32 offset) | 115 | static int da9055_gpio_to_irq(struct gpio_chip *gc, u32 offset) |
121 | { | 116 | { |
122 | struct da9055_gpio *gpio = to_da9055_gpio(gc); | 117 | struct da9055_gpio *gpio = gpiochip_get_data(gc); |
123 | struct da9055 *da9055 = gpio->da9055; | 118 | struct da9055 *da9055 = gpio->da9055; |
124 | 119 | ||
125 | return regmap_irq_get_virq(da9055->irq_data, | 120 | return regmap_irq_get_virq(da9055->irq_data, |
@@ -156,7 +151,7 @@ static int da9055_gpio_probe(struct platform_device *pdev) | |||
156 | if (pdata && pdata->gpio_base) | 151 | if (pdata && pdata->gpio_base) |
157 | gpio->gp.base = pdata->gpio_base; | 152 | gpio->gp.base = pdata->gpio_base; |
158 | 153 | ||
159 | ret = gpiochip_add(&gpio->gp); | 154 | ret = gpiochip_add_data(&gpio->gp, gpio); |
160 | if (ret < 0) { | 155 | if (ret < 0) { |
161 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); | 156 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); |
162 | goto err_mem; | 157 | goto err_mem; |
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 5e715388803d..ec58f4288649 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c | |||
@@ -41,9 +41,6 @@ typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq); | |||
41 | 41 | ||
42 | #define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */ | 42 | #define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */ |
43 | 43 | ||
44 | #define chip2controller(chip) \ | ||
45 | container_of(chip, struct davinci_gpio_controller, chip) | ||
46 | |||
47 | static void __iomem *gpio_base; | 44 | static void __iomem *gpio_base; |
48 | 45 | ||
49 | static struct davinci_gpio_regs __iomem *gpio2regs(unsigned gpio) | 46 | static struct davinci_gpio_regs __iomem *gpio2regs(unsigned gpio) |
@@ -82,7 +79,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev); | |||
82 | static inline int __davinci_direction(struct gpio_chip *chip, | 79 | static inline int __davinci_direction(struct gpio_chip *chip, |
83 | unsigned offset, bool out, int value) | 80 | unsigned offset, bool out, int value) |
84 | { | 81 | { |
85 | struct davinci_gpio_controller *d = chip2controller(chip); | 82 | struct davinci_gpio_controller *d = gpiochip_get_data(chip); |
86 | struct davinci_gpio_regs __iomem *g = d->regs; | 83 | struct davinci_gpio_regs __iomem *g = d->regs; |
87 | unsigned long flags; | 84 | unsigned long flags; |
88 | u32 temp; | 85 | u32 temp; |
@@ -122,10 +119,10 @@ davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value) | |||
122 | */ | 119 | */ |
123 | static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset) | 120 | static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset) |
124 | { | 121 | { |
125 | struct davinci_gpio_controller *d = chip2controller(chip); | 122 | struct davinci_gpio_controller *d = gpiochip_get_data(chip); |
126 | struct davinci_gpio_regs __iomem *g = d->regs; | 123 | struct davinci_gpio_regs __iomem *g = d->regs; |
127 | 124 | ||
128 | return (1 << offset) & readl_relaxed(&g->in_data); | 125 | return !!((1 << offset) & readl_relaxed(&g->in_data)); |
129 | } | 126 | } |
130 | 127 | ||
131 | /* | 128 | /* |
@@ -134,7 +131,7 @@ static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
134 | static void | 131 | static void |
135 | davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 132 | davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
136 | { | 133 | { |
137 | struct davinci_gpio_controller *d = chip2controller(chip); | 134 | struct davinci_gpio_controller *d = gpiochip_get_data(chip); |
138 | struct davinci_gpio_regs __iomem *g = d->regs; | 135 | struct davinci_gpio_regs __iomem *g = d->regs; |
139 | 136 | ||
140 | writel_relaxed((1 << offset), value ? &g->set_data : &g->clr_data); | 137 | writel_relaxed((1 << offset), value ? &g->set_data : &g->clr_data); |
@@ -149,7 +146,7 @@ davinci_gpio_get_pdata(struct platform_device *pdev) | |||
149 | u32 val; | 146 | u32 val; |
150 | 147 | ||
151 | if (!IS_ENABLED(CONFIG_OF) || !pdev->dev.of_node) | 148 | if (!IS_ENABLED(CONFIG_OF) || !pdev->dev.of_node) |
152 | return pdev->dev.platform_data; | 149 | return dev_get_platdata(&pdev->dev); |
153 | 150 | ||
154 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); | 151 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
155 | if (!pdata) | 152 | if (!pdata) |
@@ -179,8 +176,8 @@ static int davinci_gpio_of_xlate(struct gpio_chip *gc, | |||
179 | const struct of_phandle_args *gpiospec, | 176 | const struct of_phandle_args *gpiospec, |
180 | u32 *flags) | 177 | u32 *flags) |
181 | { | 178 | { |
182 | struct davinci_gpio_controller *chips = dev_get_drvdata(gc->dev); | 179 | struct davinci_gpio_controller *chips = dev_get_drvdata(gc->parent); |
183 | struct davinci_gpio_platform_data *pdata = dev_get_platdata(gc->dev); | 180 | struct davinci_gpio_platform_data *pdata = dev_get_platdata(gc->parent); |
184 | 181 | ||
185 | if (gpiospec->args[0] > pdata->ngpio) | 182 | if (gpiospec->args[0] > pdata->ngpio) |
186 | return -EINVAL; | 183 | return -EINVAL; |
@@ -254,7 +251,7 @@ static int davinci_gpio_probe(struct platform_device *pdev) | |||
254 | #ifdef CONFIG_OF_GPIO | 251 | #ifdef CONFIG_OF_GPIO |
255 | chips[i].chip.of_gpio_n_cells = 2; | 252 | chips[i].chip.of_gpio_n_cells = 2; |
256 | chips[i].chip.of_xlate = davinci_gpio_of_xlate; | 253 | chips[i].chip.of_xlate = davinci_gpio_of_xlate; |
257 | chips[i].chip.dev = dev; | 254 | chips[i].chip.parent = dev; |
258 | chips[i].chip.of_node = dev->of_node; | 255 | chips[i].chip.of_node = dev->of_node; |
259 | #endif | 256 | #endif |
260 | spin_lock_init(&chips[i].lock); | 257 | spin_lock_init(&chips[i].lock); |
@@ -265,7 +262,7 @@ static int davinci_gpio_probe(struct platform_device *pdev) | |||
265 | chips[i].clr_data = ®s->clr_data; | 262 | chips[i].clr_data = ®s->clr_data; |
266 | chips[i].in_data = ®s->in_data; | 263 | chips[i].in_data = ®s->in_data; |
267 | 264 | ||
268 | gpiochip_add(&chips[i].chip); | 265 | gpiochip_add_data(&chips[i].chip, &chips[i]); |
269 | } | 266 | } |
270 | 267 | ||
271 | platform_set_drvdata(pdev, chips); | 268 | platform_set_drvdata(pdev, chips); |
@@ -368,7 +365,7 @@ static void gpio_irq_handler(struct irq_desc *desc) | |||
368 | 365 | ||
369 | static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset) | 366 | static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset) |
370 | { | 367 | { |
371 | struct davinci_gpio_controller *d = chip2controller(chip); | 368 | struct davinci_gpio_controller *d = gpiochip_get_data(chip); |
372 | 369 | ||
373 | if (d->irq_domain) | 370 | if (d->irq_domain) |
374 | return irq_create_mapping(d->irq_domain, d->chip.base + offset); | 371 | return irq_create_mapping(d->irq_domain, d->chip.base + offset); |
@@ -378,7 +375,7 @@ static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset) | |||
378 | 375 | ||
379 | static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) | 376 | static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) |
380 | { | 377 | { |
381 | struct davinci_gpio_controller *d = chip2controller(chip); | 378 | struct davinci_gpio_controller *d = gpiochip_get_data(chip); |
382 | 379 | ||
383 | /* | 380 | /* |
384 | * NOTE: we assume for now that only irqs in the first gpio_chip | 381 | * NOTE: we assume for now that only irqs in the first gpio_chip |
diff --git a/drivers/gpio/gpio-dln2.c b/drivers/gpio/gpio-dln2.c index 6685712c15cf..e11a7d126e74 100644 --- a/drivers/gpio/gpio-dln2.c +++ b/drivers/gpio/gpio-dln2.c | |||
@@ -153,7 +153,7 @@ static int dln2_gpio_pin_set_out_val(struct dln2_gpio *dln2, | |||
153 | 153 | ||
154 | static int dln2_gpio_request(struct gpio_chip *chip, unsigned offset) | 154 | static int dln2_gpio_request(struct gpio_chip *chip, unsigned offset) |
155 | { | 155 | { |
156 | struct dln2_gpio *dln2 = container_of(chip, struct dln2_gpio, gpio); | 156 | struct dln2_gpio *dln2 = gpiochip_get_data(chip); |
157 | struct dln2_gpio_pin req = { | 157 | struct dln2_gpio_pin req = { |
158 | .pin = cpu_to_le16(offset), | 158 | .pin = cpu_to_le16(offset), |
159 | }; | 159 | }; |
@@ -194,14 +194,14 @@ out_disable: | |||
194 | 194 | ||
195 | static void dln2_gpio_free(struct gpio_chip *chip, unsigned offset) | 195 | static void dln2_gpio_free(struct gpio_chip *chip, unsigned offset) |
196 | { | 196 | { |
197 | struct dln2_gpio *dln2 = container_of(chip, struct dln2_gpio, gpio); | 197 | struct dln2_gpio *dln2 = gpiochip_get_data(chip); |
198 | 198 | ||
199 | dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_DISABLE, offset); | 199 | dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_DISABLE, offset); |
200 | } | 200 | } |
201 | 201 | ||
202 | static int dln2_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | 202 | static int dln2_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
203 | { | 203 | { |
204 | struct dln2_gpio *dln2 = container_of(chip, struct dln2_gpio, gpio); | 204 | struct dln2_gpio *dln2 = gpiochip_get_data(chip); |
205 | 205 | ||
206 | if (test_bit(offset, dln2->output_enabled)) | 206 | if (test_bit(offset, dln2->output_enabled)) |
207 | return GPIOF_DIR_OUT; | 207 | return GPIOF_DIR_OUT; |
@@ -211,7 +211,7 @@ static int dln2_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | |||
211 | 211 | ||
212 | static int dln2_gpio_get(struct gpio_chip *chip, unsigned int offset) | 212 | static int dln2_gpio_get(struct gpio_chip *chip, unsigned int offset) |
213 | { | 213 | { |
214 | struct dln2_gpio *dln2 = container_of(chip, struct dln2_gpio, gpio); | 214 | struct dln2_gpio *dln2 = gpiochip_get_data(chip); |
215 | int dir; | 215 | int dir; |
216 | 216 | ||
217 | dir = dln2_gpio_get_direction(chip, offset); | 217 | dir = dln2_gpio_get_direction(chip, offset); |
@@ -226,7 +226,7 @@ static int dln2_gpio_get(struct gpio_chip *chip, unsigned int offset) | |||
226 | 226 | ||
227 | static void dln2_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 227 | static void dln2_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
228 | { | 228 | { |
229 | struct dln2_gpio *dln2 = container_of(chip, struct dln2_gpio, gpio); | 229 | struct dln2_gpio *dln2 = gpiochip_get_data(chip); |
230 | 230 | ||
231 | dln2_gpio_pin_set_out_val(dln2, offset, value); | 231 | dln2_gpio_pin_set_out_val(dln2, offset, value); |
232 | } | 232 | } |
@@ -234,7 +234,7 @@ static void dln2_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
234 | static int dln2_gpio_set_direction(struct gpio_chip *chip, unsigned offset, | 234 | static int dln2_gpio_set_direction(struct gpio_chip *chip, unsigned offset, |
235 | unsigned dir) | 235 | unsigned dir) |
236 | { | 236 | { |
237 | struct dln2_gpio *dln2 = container_of(chip, struct dln2_gpio, gpio); | 237 | struct dln2_gpio *dln2 = gpiochip_get_data(chip); |
238 | struct dln2_gpio_pin_val req = { | 238 | struct dln2_gpio_pin_val req = { |
239 | .pin = cpu_to_le16(offset), | 239 | .pin = cpu_to_le16(offset), |
240 | .value = dir, | 240 | .value = dir, |
@@ -262,7 +262,7 @@ static int dln2_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
262 | static int dln2_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | 262 | static int dln2_gpio_direction_output(struct gpio_chip *chip, unsigned offset, |
263 | int value) | 263 | int value) |
264 | { | 264 | { |
265 | struct dln2_gpio *dln2 = container_of(chip, struct dln2_gpio, gpio); | 265 | struct dln2_gpio *dln2 = gpiochip_get_data(chip); |
266 | int ret; | 266 | int ret; |
267 | 267 | ||
268 | ret = dln2_gpio_pin_set_out_val(dln2, offset, value); | 268 | ret = dln2_gpio_pin_set_out_val(dln2, offset, value); |
@@ -275,7 +275,7 @@ static int dln2_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | |||
275 | static int dln2_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, | 275 | static int dln2_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, |
276 | unsigned debounce) | 276 | unsigned debounce) |
277 | { | 277 | { |
278 | struct dln2_gpio *dln2 = container_of(chip, struct dln2_gpio, gpio); | 278 | struct dln2_gpio *dln2 = gpiochip_get_data(chip); |
279 | __le32 duration = cpu_to_le32(debounce); | 279 | __le32 duration = cpu_to_le32(debounce); |
280 | 280 | ||
281 | return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_SET_DEBOUNCE, | 281 | return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_SET_DEBOUNCE, |
@@ -302,7 +302,7 @@ static int dln2_gpio_set_event_cfg(struct dln2_gpio *dln2, unsigned pin, | |||
302 | static void dln2_irq_unmask(struct irq_data *irqd) | 302 | static void dln2_irq_unmask(struct irq_data *irqd) |
303 | { | 303 | { |
304 | struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); | 304 | struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); |
305 | struct dln2_gpio *dln2 = container_of(gc, struct dln2_gpio, gpio); | 305 | struct dln2_gpio *dln2 = gpiochip_get_data(gc); |
306 | int pin = irqd_to_hwirq(irqd); | 306 | int pin = irqd_to_hwirq(irqd); |
307 | 307 | ||
308 | set_bit(pin, dln2->unmasked_irqs); | 308 | set_bit(pin, dln2->unmasked_irqs); |
@@ -311,7 +311,7 @@ static void dln2_irq_unmask(struct irq_data *irqd) | |||
311 | static void dln2_irq_mask(struct irq_data *irqd) | 311 | static void dln2_irq_mask(struct irq_data *irqd) |
312 | { | 312 | { |
313 | struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); | 313 | struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); |
314 | struct dln2_gpio *dln2 = container_of(gc, struct dln2_gpio, gpio); | 314 | struct dln2_gpio *dln2 = gpiochip_get_data(gc); |
315 | int pin = irqd_to_hwirq(irqd); | 315 | int pin = irqd_to_hwirq(irqd); |
316 | 316 | ||
317 | clear_bit(pin, dln2->unmasked_irqs); | 317 | clear_bit(pin, dln2->unmasked_irqs); |
@@ -320,7 +320,7 @@ static void dln2_irq_mask(struct irq_data *irqd) | |||
320 | static int dln2_irq_set_type(struct irq_data *irqd, unsigned type) | 320 | static int dln2_irq_set_type(struct irq_data *irqd, unsigned type) |
321 | { | 321 | { |
322 | struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); | 322 | struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); |
323 | struct dln2_gpio *dln2 = container_of(gc, struct dln2_gpio, gpio); | 323 | struct dln2_gpio *dln2 = gpiochip_get_data(gc); |
324 | int pin = irqd_to_hwirq(irqd); | 324 | int pin = irqd_to_hwirq(irqd); |
325 | 325 | ||
326 | switch (type) { | 326 | switch (type) { |
@@ -349,7 +349,7 @@ static int dln2_irq_set_type(struct irq_data *irqd, unsigned type) | |||
349 | static void dln2_irq_bus_lock(struct irq_data *irqd) | 349 | static void dln2_irq_bus_lock(struct irq_data *irqd) |
350 | { | 350 | { |
351 | struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); | 351 | struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); |
352 | struct dln2_gpio *dln2 = container_of(gc, struct dln2_gpio, gpio); | 352 | struct dln2_gpio *dln2 = gpiochip_get_data(gc); |
353 | 353 | ||
354 | mutex_lock(&dln2->irq_lock); | 354 | mutex_lock(&dln2->irq_lock); |
355 | } | 355 | } |
@@ -357,7 +357,7 @@ static void dln2_irq_bus_lock(struct irq_data *irqd) | |||
357 | static void dln2_irq_bus_unlock(struct irq_data *irqd) | 357 | static void dln2_irq_bus_unlock(struct irq_data *irqd) |
358 | { | 358 | { |
359 | struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); | 359 | struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); |
360 | struct dln2_gpio *dln2 = container_of(gc, struct dln2_gpio, gpio); | 360 | struct dln2_gpio *dln2 = gpiochip_get_data(gc); |
361 | int pin = irqd_to_hwirq(irqd); | 361 | int pin = irqd_to_hwirq(irqd); |
362 | int enabled, unmasked; | 362 | int enabled, unmasked; |
363 | unsigned type; | 363 | unsigned type; |
@@ -377,7 +377,7 @@ static void dln2_irq_bus_unlock(struct irq_data *irqd) | |||
377 | 377 | ||
378 | ret = dln2_gpio_set_event_cfg(dln2, pin, type, 0); | 378 | ret = dln2_gpio_set_event_cfg(dln2, pin, type, 0); |
379 | if (ret) | 379 | if (ret) |
380 | dev_err(dln2->gpio.dev, "failed to set event\n"); | 380 | dev_err(dln2->gpio.parent, "failed to set event\n"); |
381 | } | 381 | } |
382 | 382 | ||
383 | mutex_unlock(&dln2->irq_lock); | 383 | mutex_unlock(&dln2->irq_lock); |
@@ -406,19 +406,19 @@ static void dln2_gpio_event(struct platform_device *pdev, u16 echo, | |||
406 | struct dln2_gpio *dln2 = platform_get_drvdata(pdev); | 406 | struct dln2_gpio *dln2 = platform_get_drvdata(pdev); |
407 | 407 | ||
408 | if (len < sizeof(*event)) { | 408 | if (len < sizeof(*event)) { |
409 | dev_err(dln2->gpio.dev, "short event message\n"); | 409 | dev_err(dln2->gpio.parent, "short event message\n"); |
410 | return; | 410 | return; |
411 | } | 411 | } |
412 | 412 | ||
413 | pin = le16_to_cpu(event->pin); | 413 | pin = le16_to_cpu(event->pin); |
414 | if (pin >= dln2->gpio.ngpio) { | 414 | if (pin >= dln2->gpio.ngpio) { |
415 | dev_err(dln2->gpio.dev, "out of bounds pin %d\n", pin); | 415 | dev_err(dln2->gpio.parent, "out of bounds pin %d\n", pin); |
416 | return; | 416 | return; |
417 | } | 417 | } |
418 | 418 | ||
419 | irq = irq_find_mapping(dln2->gpio.irqdomain, pin); | 419 | irq = irq_find_mapping(dln2->gpio.irqdomain, pin); |
420 | if (!irq) { | 420 | if (!irq) { |
421 | dev_err(dln2->gpio.dev, "pin %d not mapped to IRQ\n", pin); | 421 | dev_err(dln2->gpio.parent, "pin %d not mapped to IRQ\n", pin); |
422 | return; | 422 | return; |
423 | } | 423 | } |
424 | 424 | ||
@@ -462,7 +462,7 @@ static int dln2_gpio_probe(struct platform_device *pdev) | |||
462 | dln2->pdev = pdev; | 462 | dln2->pdev = pdev; |
463 | 463 | ||
464 | dln2->gpio.label = "dln2"; | 464 | dln2->gpio.label = "dln2"; |
465 | dln2->gpio.dev = dev; | 465 | dln2->gpio.parent = dev; |
466 | dln2->gpio.owner = THIS_MODULE; | 466 | dln2->gpio.owner = THIS_MODULE; |
467 | dln2->gpio.base = -1; | 467 | dln2->gpio.base = -1; |
468 | dln2->gpio.ngpio = pins; | 468 | dln2->gpio.ngpio = pins; |
@@ -479,7 +479,7 @@ static int dln2_gpio_probe(struct platform_device *pdev) | |||
479 | 479 | ||
480 | platform_set_drvdata(pdev, dln2); | 480 | platform_set_drvdata(pdev, dln2); |
481 | 481 | ||
482 | ret = gpiochip_add(&dln2->gpio); | 482 | ret = gpiochip_add_data(&dln2->gpio, dln2); |
483 | if (ret < 0) { | 483 | if (ret < 0) { |
484 | dev_err(dev, "failed to add gpio chip: %d\n", ret); | 484 | dev_err(dev, "failed to add gpio chip: %d\n", ret); |
485 | goto out; | 485 | goto out; |
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index fcd5b0acfc72..597de1ef497b 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c | |||
@@ -7,7 +7,9 @@ | |||
7 | * | 7 | * |
8 | * All enquiries to support@picochip.com | 8 | * All enquiries to support@picochip.com |
9 | */ | 9 | */ |
10 | #include <linux/basic_mmio_gpio.h> | 10 | #include <linux/gpio/driver.h> |
11 | /* FIXME: for gpio_get_value(), replace this with direct register read */ | ||
12 | #include <linux/gpio.h> | ||
11 | #include <linux/err.h> | 13 | #include <linux/err.h> |
12 | #include <linux/init.h> | 14 | #include <linux/init.h> |
13 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
@@ -66,7 +68,7 @@ struct dwapb_context { | |||
66 | #endif | 68 | #endif |
67 | 69 | ||
68 | struct dwapb_gpio_port { | 70 | struct dwapb_gpio_port { |
69 | struct bgpio_chip bgc; | 71 | struct gpio_chip gc; |
70 | bool is_registered; | 72 | bool is_registered; |
71 | struct dwapb_gpio *gpio; | 73 | struct dwapb_gpio *gpio; |
72 | #ifdef CONFIG_PM_SLEEP | 74 | #ifdef CONFIG_PM_SLEEP |
@@ -83,33 +85,26 @@ struct dwapb_gpio { | |||
83 | struct irq_domain *domain; | 85 | struct irq_domain *domain; |
84 | }; | 86 | }; |
85 | 87 | ||
86 | static inline struct dwapb_gpio_port * | ||
87 | to_dwapb_gpio_port(struct bgpio_chip *bgc) | ||
88 | { | ||
89 | return container_of(bgc, struct dwapb_gpio_port, bgc); | ||
90 | } | ||
91 | |||
92 | static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset) | 88 | static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset) |
93 | { | 89 | { |
94 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 90 | struct gpio_chip *gc = &gpio->ports[0].gc; |
95 | void __iomem *reg_base = gpio->regs; | 91 | void __iomem *reg_base = gpio->regs; |
96 | 92 | ||
97 | return bgc->read_reg(reg_base + offset); | 93 | return gc->read_reg(reg_base + offset); |
98 | } | 94 | } |
99 | 95 | ||
100 | static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset, | 96 | static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset, |
101 | u32 val) | 97 | u32 val) |
102 | { | 98 | { |
103 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 99 | struct gpio_chip *gc = &gpio->ports[0].gc; |
104 | void __iomem *reg_base = gpio->regs; | 100 | void __iomem *reg_base = gpio->regs; |
105 | 101 | ||
106 | bgc->write_reg(reg_base + offset, val); | 102 | gc->write_reg(reg_base + offset, val); |
107 | } | 103 | } |
108 | 104 | ||
109 | static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 105 | static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
110 | { | 106 | { |
111 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 107 | struct dwapb_gpio_port *port = gpiochip_get_data(gc); |
112 | struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc); | ||
113 | struct dwapb_gpio *gpio = port->gpio; | 108 | struct dwapb_gpio *gpio = port->gpio; |
114 | 109 | ||
115 | return irq_find_mapping(gpio->domain, offset); | 110 | return irq_find_mapping(gpio->domain, offset); |
@@ -119,7 +114,7 @@ static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs) | |||
119 | { | 114 | { |
120 | u32 v = dwapb_read(gpio, GPIO_INT_POLARITY); | 115 | u32 v = dwapb_read(gpio, GPIO_INT_POLARITY); |
121 | 116 | ||
122 | if (gpio_get_value(gpio->ports[0].bgc.gc.base + offs)) | 117 | if (gpio_get_value(gpio->ports[0].gc.base + offs)) |
123 | v &= ~BIT(offs); | 118 | v &= ~BIT(offs); |
124 | else | 119 | else |
125 | v |= BIT(offs); | 120 | v |= BIT(offs); |
@@ -162,39 +157,39 @@ static void dwapb_irq_enable(struct irq_data *d) | |||
162 | { | 157 | { |
163 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); | 158 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
164 | struct dwapb_gpio *gpio = igc->private; | 159 | struct dwapb_gpio *gpio = igc->private; |
165 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 160 | struct gpio_chip *gc = &gpio->ports[0].gc; |
166 | unsigned long flags; | 161 | unsigned long flags; |
167 | u32 val; | 162 | u32 val; |
168 | 163 | ||
169 | spin_lock_irqsave(&bgc->lock, flags); | 164 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
170 | val = dwapb_read(gpio, GPIO_INTEN); | 165 | val = dwapb_read(gpio, GPIO_INTEN); |
171 | val |= BIT(d->hwirq); | 166 | val |= BIT(d->hwirq); |
172 | dwapb_write(gpio, GPIO_INTEN, val); | 167 | dwapb_write(gpio, GPIO_INTEN, val); |
173 | spin_unlock_irqrestore(&bgc->lock, flags); | 168 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
174 | } | 169 | } |
175 | 170 | ||
176 | static void dwapb_irq_disable(struct irq_data *d) | 171 | static void dwapb_irq_disable(struct irq_data *d) |
177 | { | 172 | { |
178 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); | 173 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
179 | struct dwapb_gpio *gpio = igc->private; | 174 | struct dwapb_gpio *gpio = igc->private; |
180 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 175 | struct gpio_chip *gc = &gpio->ports[0].gc; |
181 | unsigned long flags; | 176 | unsigned long flags; |
182 | u32 val; | 177 | u32 val; |
183 | 178 | ||
184 | spin_lock_irqsave(&bgc->lock, flags); | 179 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
185 | val = dwapb_read(gpio, GPIO_INTEN); | 180 | val = dwapb_read(gpio, GPIO_INTEN); |
186 | val &= ~BIT(d->hwirq); | 181 | val &= ~BIT(d->hwirq); |
187 | dwapb_write(gpio, GPIO_INTEN, val); | 182 | dwapb_write(gpio, GPIO_INTEN, val); |
188 | spin_unlock_irqrestore(&bgc->lock, flags); | 183 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
189 | } | 184 | } |
190 | 185 | ||
191 | static int dwapb_irq_reqres(struct irq_data *d) | 186 | static int dwapb_irq_reqres(struct irq_data *d) |
192 | { | 187 | { |
193 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); | 188 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
194 | struct dwapb_gpio *gpio = igc->private; | 189 | struct dwapb_gpio *gpio = igc->private; |
195 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 190 | struct gpio_chip *gc = &gpio->ports[0].gc; |
196 | 191 | ||
197 | if (gpiochip_lock_as_irq(&bgc->gc, irqd_to_hwirq(d))) { | 192 | if (gpiochip_lock_as_irq(gc, irqd_to_hwirq(d))) { |
198 | dev_err(gpio->dev, "unable to lock HW IRQ %lu for IRQ\n", | 193 | dev_err(gpio->dev, "unable to lock HW IRQ %lu for IRQ\n", |
199 | irqd_to_hwirq(d)); | 194 | irqd_to_hwirq(d)); |
200 | return -EINVAL; | 195 | return -EINVAL; |
@@ -206,16 +201,16 @@ static void dwapb_irq_relres(struct irq_data *d) | |||
206 | { | 201 | { |
207 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); | 202 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
208 | struct dwapb_gpio *gpio = igc->private; | 203 | struct dwapb_gpio *gpio = igc->private; |
209 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 204 | struct gpio_chip *gc = &gpio->ports[0].gc; |
210 | 205 | ||
211 | gpiochip_unlock_as_irq(&bgc->gc, irqd_to_hwirq(d)); | 206 | gpiochip_unlock_as_irq(gc, irqd_to_hwirq(d)); |
212 | } | 207 | } |
213 | 208 | ||
214 | static int dwapb_irq_set_type(struct irq_data *d, u32 type) | 209 | static int dwapb_irq_set_type(struct irq_data *d, u32 type) |
215 | { | 210 | { |
216 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); | 211 | struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); |
217 | struct dwapb_gpio *gpio = igc->private; | 212 | struct dwapb_gpio *gpio = igc->private; |
218 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 213 | struct gpio_chip *gc = &gpio->ports[0].gc; |
219 | int bit = d->hwirq; | 214 | int bit = d->hwirq; |
220 | unsigned long level, polarity, flags; | 215 | unsigned long level, polarity, flags; |
221 | 216 | ||
@@ -223,7 +218,7 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type) | |||
223 | IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) | 218 | IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) |
224 | return -EINVAL; | 219 | return -EINVAL; |
225 | 220 | ||
226 | spin_lock_irqsave(&bgc->lock, flags); | 221 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
227 | level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); | 222 | level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); |
228 | polarity = dwapb_read(gpio, GPIO_INT_POLARITY); | 223 | polarity = dwapb_read(gpio, GPIO_INT_POLARITY); |
229 | 224 | ||
@@ -254,7 +249,7 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type) | |||
254 | 249 | ||
255 | dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level); | 250 | dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level); |
256 | dwapb_write(gpio, GPIO_INT_POLARITY, polarity); | 251 | dwapb_write(gpio, GPIO_INT_POLARITY, polarity); |
257 | spin_unlock_irqrestore(&bgc->lock, flags); | 252 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
258 | 253 | ||
259 | return 0; | 254 | return 0; |
260 | } | 255 | } |
@@ -262,13 +257,12 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type) | |||
262 | static int dwapb_gpio_set_debounce(struct gpio_chip *gc, | 257 | static int dwapb_gpio_set_debounce(struct gpio_chip *gc, |
263 | unsigned offset, unsigned debounce) | 258 | unsigned offset, unsigned debounce) |
264 | { | 259 | { |
265 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 260 | struct dwapb_gpio_port *port = gpiochip_get_data(gc); |
266 | struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc); | ||
267 | struct dwapb_gpio *gpio = port->gpio; | 261 | struct dwapb_gpio *gpio = port->gpio; |
268 | unsigned long flags, val_deb; | 262 | unsigned long flags, val_deb; |
269 | unsigned long mask = bgc->pin2mask(bgc, offset); | 263 | unsigned long mask = gc->pin2mask(gc, offset); |
270 | 264 | ||
271 | spin_lock_irqsave(&bgc->lock, flags); | 265 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
272 | 266 | ||
273 | val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); | 267 | val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); |
274 | if (debounce) | 268 | if (debounce) |
@@ -276,7 +270,7 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc, | |||
276 | else | 270 | else |
277 | dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb & ~mask); | 271 | dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb & ~mask); |
278 | 272 | ||
279 | spin_unlock_irqrestore(&bgc->lock, flags); | 273 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
280 | 274 | ||
281 | return 0; | 275 | return 0; |
282 | } | 276 | } |
@@ -295,7 +289,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, | |||
295 | struct dwapb_gpio_port *port, | 289 | struct dwapb_gpio_port *port, |
296 | struct dwapb_port_property *pp) | 290 | struct dwapb_port_property *pp) |
297 | { | 291 | { |
298 | struct gpio_chip *gc = &port->bgc.gc; | 292 | struct gpio_chip *gc = &port->gc; |
299 | struct device_node *node = pp->node; | 293 | struct device_node *node = pp->node; |
300 | struct irq_chip_generic *irq_gc = NULL; | 294 | struct irq_chip_generic *irq_gc = NULL; |
301 | unsigned int hwirq, ngpio = gc->ngpio; | 295 | unsigned int hwirq, ngpio = gc->ngpio; |
@@ -369,13 +363,13 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, | |||
369 | for (hwirq = 0 ; hwirq < ngpio ; hwirq++) | 363 | for (hwirq = 0 ; hwirq < ngpio ; hwirq++) |
370 | irq_create_mapping(gpio->domain, hwirq); | 364 | irq_create_mapping(gpio->domain, hwirq); |
371 | 365 | ||
372 | port->bgc.gc.to_irq = dwapb_gpio_to_irq; | 366 | port->gc.to_irq = dwapb_gpio_to_irq; |
373 | } | 367 | } |
374 | 368 | ||
375 | static void dwapb_irq_teardown(struct dwapb_gpio *gpio) | 369 | static void dwapb_irq_teardown(struct dwapb_gpio *gpio) |
376 | { | 370 | { |
377 | struct dwapb_gpio_port *port = &gpio->ports[0]; | 371 | struct dwapb_gpio_port *port = &gpio->ports[0]; |
378 | struct gpio_chip *gc = &port->bgc.gc; | 372 | struct gpio_chip *gc = &port->gc; |
379 | unsigned int ngpio = gc->ngpio; | 373 | unsigned int ngpio = gc->ngpio; |
380 | irq_hw_number_t hwirq; | 374 | irq_hw_number_t hwirq; |
381 | 375 | ||
@@ -412,7 +406,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, | |||
412 | dirout = gpio->regs + GPIO_SWPORTA_DDR + | 406 | dirout = gpio->regs + GPIO_SWPORTA_DDR + |
413 | (pp->idx * GPIO_SWPORT_DDR_SIZE); | 407 | (pp->idx * GPIO_SWPORT_DDR_SIZE); |
414 | 408 | ||
415 | err = bgpio_init(&port->bgc, gpio->dev, 4, dat, set, NULL, dirout, | 409 | err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout, |
416 | NULL, false); | 410 | NULL, false); |
417 | if (err) { | 411 | if (err) { |
418 | dev_err(gpio->dev, "failed to init gpio chip for %s\n", | 412 | dev_err(gpio->dev, "failed to init gpio chip for %s\n", |
@@ -421,19 +415,19 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, | |||
421 | } | 415 | } |
422 | 416 | ||
423 | #ifdef CONFIG_OF_GPIO | 417 | #ifdef CONFIG_OF_GPIO |
424 | port->bgc.gc.of_node = pp->node; | 418 | port->gc.of_node = pp->node; |
425 | #endif | 419 | #endif |
426 | port->bgc.gc.ngpio = pp->ngpio; | 420 | port->gc.ngpio = pp->ngpio; |
427 | port->bgc.gc.base = pp->gpio_base; | 421 | port->gc.base = pp->gpio_base; |
428 | 422 | ||
429 | /* Only port A support debounce */ | 423 | /* Only port A support debounce */ |
430 | if (pp->idx == 0) | 424 | if (pp->idx == 0) |
431 | port->bgc.gc.set_debounce = dwapb_gpio_set_debounce; | 425 | port->gc.set_debounce = dwapb_gpio_set_debounce; |
432 | 426 | ||
433 | if (pp->irq) | 427 | if (pp->irq) |
434 | dwapb_configure_irqs(gpio, port, pp); | 428 | dwapb_configure_irqs(gpio, port, pp); |
435 | 429 | ||
436 | err = gpiochip_add(&port->bgc.gc); | 430 | err = gpiochip_add_data(&port->gc, port); |
437 | if (err) | 431 | if (err) |
438 | dev_err(gpio->dev, "failed to register gpiochip for %s\n", | 432 | dev_err(gpio->dev, "failed to register gpiochip for %s\n", |
439 | pp->name); | 433 | pp->name); |
@@ -449,7 +443,7 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio) | |||
449 | 443 | ||
450 | for (m = 0; m < gpio->nr_ports; ++m) | 444 | for (m = 0; m < gpio->nr_ports; ++m) |
451 | if (gpio->ports[m].is_registered) | 445 | if (gpio->ports[m].is_registered) |
452 | gpiochip_remove(&gpio->ports[m].bgc.gc); | 446 | gpiochip_remove(&gpio->ports[m].gc); |
453 | } | 447 | } |
454 | 448 | ||
455 | static struct dwapb_platform_data * | 449 | static struct dwapb_platform_data * |
@@ -591,11 +585,11 @@ static int dwapb_gpio_suspend(struct device *dev) | |||
591 | { | 585 | { |
592 | struct platform_device *pdev = to_platform_device(dev); | 586 | struct platform_device *pdev = to_platform_device(dev); |
593 | struct dwapb_gpio *gpio = platform_get_drvdata(pdev); | 587 | struct dwapb_gpio *gpio = platform_get_drvdata(pdev); |
594 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 588 | struct gpio_chip *gc = &gpio->ports[0].gc; |
595 | unsigned long flags; | 589 | unsigned long flags; |
596 | int i; | 590 | int i; |
597 | 591 | ||
598 | spin_lock_irqsave(&bgc->lock, flags); | 592 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
599 | for (i = 0; i < gpio->nr_ports; i++) { | 593 | for (i = 0; i < gpio->nr_ports; i++) { |
600 | unsigned int offset; | 594 | unsigned int offset; |
601 | unsigned int idx = gpio->ports[i].idx; | 595 | unsigned int idx = gpio->ports[i].idx; |
@@ -624,7 +618,7 @@ static int dwapb_gpio_suspend(struct device *dev) | |||
624 | dwapb_write(gpio, GPIO_INTMASK, 0xffffffff); | 618 | dwapb_write(gpio, GPIO_INTMASK, 0xffffffff); |
625 | } | 619 | } |
626 | } | 620 | } |
627 | spin_unlock_irqrestore(&bgc->lock, flags); | 621 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
628 | 622 | ||
629 | return 0; | 623 | return 0; |
630 | } | 624 | } |
@@ -633,11 +627,11 @@ static int dwapb_gpio_resume(struct device *dev) | |||
633 | { | 627 | { |
634 | struct platform_device *pdev = to_platform_device(dev); | 628 | struct platform_device *pdev = to_platform_device(dev); |
635 | struct dwapb_gpio *gpio = platform_get_drvdata(pdev); | 629 | struct dwapb_gpio *gpio = platform_get_drvdata(pdev); |
636 | struct bgpio_chip *bgc = &gpio->ports[0].bgc; | 630 | struct gpio_chip *gc = &gpio->ports[0].gc; |
637 | unsigned long flags; | 631 | unsigned long flags; |
638 | int i; | 632 | int i; |
639 | 633 | ||
640 | spin_lock_irqsave(&bgc->lock, flags); | 634 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
641 | for (i = 0; i < gpio->nr_ports; i++) { | 635 | for (i = 0; i < gpio->nr_ports; i++) { |
642 | unsigned int offset; | 636 | unsigned int offset; |
643 | unsigned int idx = gpio->ports[i].idx; | 637 | unsigned int idx = gpio->ports[i].idx; |
@@ -666,7 +660,7 @@ static int dwapb_gpio_resume(struct device *dev) | |||
666 | dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); | 660 | dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); |
667 | } | 661 | } |
668 | } | 662 | } |
669 | spin_unlock_irqrestore(&bgc->lock, flags); | 663 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
670 | 664 | ||
671 | return 0; | 665 | return 0; |
672 | } | 666 | } |
diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c index 6bca1e125e12..8d32ccc980d9 100644 --- a/drivers/gpio/gpio-em.c +++ b/drivers/gpio/gpio-em.c | |||
@@ -103,7 +103,7 @@ static int em_gio_irq_reqres(struct irq_data *d) | |||
103 | struct em_gio_priv *p = irq_data_get_irq_chip_data(d); | 103 | struct em_gio_priv *p = irq_data_get_irq_chip_data(d); |
104 | 104 | ||
105 | if (gpiochip_lock_as_irq(&p->gpio_chip, irqd_to_hwirq(d))) { | 105 | if (gpiochip_lock_as_irq(&p->gpio_chip, irqd_to_hwirq(d))) { |
106 | dev_err(p->gpio_chip.dev, | 106 | dev_err(p->gpio_chip.parent, |
107 | "unable to lock HW IRQ %lu for IRQ\n", | 107 | "unable to lock HW IRQ %lu for IRQ\n", |
108 | irqd_to_hwirq(d)); | 108 | irqd_to_hwirq(d)); |
109 | return -EINVAL; | 109 | return -EINVAL; |
@@ -192,7 +192,7 @@ static irqreturn_t em_gio_irq_handler(int irq, void *dev_id) | |||
192 | 192 | ||
193 | static inline struct em_gio_priv *gpio_to_priv(struct gpio_chip *chip) | 193 | static inline struct em_gio_priv *gpio_to_priv(struct gpio_chip *chip) |
194 | { | 194 | { |
195 | return container_of(chip, struct em_gio_priv, gpio_chip); | 195 | return gpiochip_get_data(chip); |
196 | } | 196 | } |
197 | 197 | ||
198 | static int em_gio_direction_input(struct gpio_chip *chip, unsigned offset) | 198 | static int em_gio_direction_input(struct gpio_chip *chip, unsigned offset) |
@@ -203,7 +203,7 @@ static int em_gio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
203 | 203 | ||
204 | static int em_gio_get(struct gpio_chip *chip, unsigned offset) | 204 | static int em_gio_get(struct gpio_chip *chip, unsigned offset) |
205 | { | 205 | { |
206 | return (int)(em_gio_read(gpio_to_priv(chip), GIO_I) & BIT(offset)); | 206 | return !!(em_gio_read(gpio_to_priv(chip), GIO_I) & BIT(offset)); |
207 | } | 207 | } |
208 | 208 | ||
209 | static void __em_gio_set(struct gpio_chip *chip, unsigned int reg, | 209 | static void __em_gio_set(struct gpio_chip *chip, unsigned int reg, |
@@ -332,7 +332,7 @@ static int em_gio_probe(struct platform_device *pdev) | |||
332 | gpio_chip->request = em_gio_request; | 332 | gpio_chip->request = em_gio_request; |
333 | gpio_chip->free = em_gio_free; | 333 | gpio_chip->free = em_gio_free; |
334 | gpio_chip->label = name; | 334 | gpio_chip->label = name; |
335 | gpio_chip->dev = &pdev->dev; | 335 | gpio_chip->parent = &pdev->dev; |
336 | gpio_chip->owner = THIS_MODULE; | 336 | gpio_chip->owner = THIS_MODULE; |
337 | gpio_chip->base = -1; | 337 | gpio_chip->base = -1; |
338 | gpio_chip->ngpio = ngpios; | 338 | gpio_chip->ngpio = ngpios; |
@@ -368,7 +368,7 @@ static int em_gio_probe(struct platform_device *pdev) | |||
368 | goto err1; | 368 | goto err1; |
369 | } | 369 | } |
370 | 370 | ||
371 | ret = gpiochip_add(gpio_chip); | 371 | ret = gpiochip_add_data(gpio_chip, p); |
372 | if (ret) { | 372 | if (ret) { |
373 | dev_err(&pdev->dev, "failed to add GPIO controller\n"); | 373 | dev_err(&pdev->dev, "failed to add GPIO controller\n"); |
374 | goto err1; | 374 | goto err1; |
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c index 3e3947b35c83..ad279078fed7 100644 --- a/drivers/gpio/gpio-ep93xx.c +++ b/drivers/gpio/gpio-ep93xx.c | |||
@@ -16,10 +16,11 @@ | |||
16 | #include <linux/module.h> | 16 | #include <linux/module.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/gpio.h> | ||
20 | #include <linux/irq.h> | 19 | #include <linux/irq.h> |
21 | #include <linux/slab.h> | 20 | #include <linux/slab.h> |
22 | #include <linux/basic_mmio_gpio.h> | 21 | #include <linux/gpio/driver.h> |
22 | /* FIXME: this is here for gpio_to_irq() - get rid of this! */ | ||
23 | #include <linux/gpio.h> | ||
23 | 24 | ||
24 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
25 | #include <mach/gpio-ep93xx.h> | 26 | #include <mach/gpio-ep93xx.h> |
@@ -28,7 +29,7 @@ | |||
28 | 29 | ||
29 | struct ep93xx_gpio { | 30 | struct ep93xx_gpio { |
30 | void __iomem *mmio_base; | 31 | void __iomem *mmio_base; |
31 | struct bgpio_chip bgc[8]; | 32 | struct gpio_chip gc[8]; |
32 | }; | 33 | }; |
33 | 34 | ||
34 | /************************************************************************* | 35 | /************************************************************************* |
@@ -319,26 +320,26 @@ static int ep93xx_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | |||
319 | return 64 + gpio; | 320 | return 64 + gpio; |
320 | } | 321 | } |
321 | 322 | ||
322 | static int ep93xx_gpio_add_bank(struct bgpio_chip *bgc, struct device *dev, | 323 | static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev, |
323 | void __iomem *mmio_base, struct ep93xx_gpio_bank *bank) | 324 | void __iomem *mmio_base, struct ep93xx_gpio_bank *bank) |
324 | { | 325 | { |
325 | void __iomem *data = mmio_base + bank->data; | 326 | void __iomem *data = mmio_base + bank->data; |
326 | void __iomem *dir = mmio_base + bank->dir; | 327 | void __iomem *dir = mmio_base + bank->dir; |
327 | int err; | 328 | int err; |
328 | 329 | ||
329 | err = bgpio_init(bgc, dev, 1, data, NULL, NULL, dir, NULL, 0); | 330 | err = bgpio_init(gc, dev, 1, data, NULL, NULL, dir, NULL, 0); |
330 | if (err) | 331 | if (err) |
331 | return err; | 332 | return err; |
332 | 333 | ||
333 | bgc->gc.label = bank->label; | 334 | gc->label = bank->label; |
334 | bgc->gc.base = bank->base; | 335 | gc->base = bank->base; |
335 | 336 | ||
336 | if (bank->has_debounce) { | 337 | if (bank->has_debounce) { |
337 | bgc->gc.set_debounce = ep93xx_gpio_set_debounce; | 338 | gc->set_debounce = ep93xx_gpio_set_debounce; |
338 | bgc->gc.to_irq = ep93xx_gpio_to_irq; | 339 | gc->to_irq = ep93xx_gpio_to_irq; |
339 | } | 340 | } |
340 | 341 | ||
341 | return gpiochip_add(&bgc->gc); | 342 | return gpiochip_add_data(gc, NULL); |
342 | } | 343 | } |
343 | 344 | ||
344 | static int ep93xx_gpio_probe(struct platform_device *pdev) | 345 | static int ep93xx_gpio_probe(struct platform_device *pdev) |
@@ -358,10 +359,10 @@ static int ep93xx_gpio_probe(struct platform_device *pdev) | |||
358 | return PTR_ERR(ep93xx_gpio->mmio_base); | 359 | return PTR_ERR(ep93xx_gpio->mmio_base); |
359 | 360 | ||
360 | for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) { | 361 | for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) { |
361 | struct bgpio_chip *bgc = &ep93xx_gpio->bgc[i]; | 362 | struct gpio_chip *gc = &ep93xx_gpio->gc[i]; |
362 | struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i]; | 363 | struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i]; |
363 | 364 | ||
364 | if (ep93xx_gpio_add_bank(bgc, &pdev->dev, | 365 | if (ep93xx_gpio_add_bank(gc, &pdev->dev, |
365 | ep93xx_gpio->mmio_base, bank)) | 366 | ep93xx_gpio->mmio_base, bank)) |
366 | dev_warn(&pdev->dev, "Unable to add gpio bank %s\n", | 367 | dev_warn(&pdev->dev, "Unable to add gpio bank %s\n", |
367 | bank->label); | 368 | bank->label); |
diff --git a/drivers/gpio/gpio-etraxfs.c b/drivers/gpio/gpio-etraxfs.c index 5c15dd12172d..00b022c9acb3 100644 --- a/drivers/gpio/gpio-etraxfs.c +++ b/drivers/gpio/gpio-etraxfs.c | |||
@@ -1,12 +1,10 @@ | |||
1 | #include <linux/kernel.h> | 1 | #include <linux/kernel.h> |
2 | #include <linux/init.h> | 2 | #include <linux/init.h> |
3 | #include <linux/gpio.h> | ||
4 | #include <linux/gpio/driver.h> | 3 | #include <linux/gpio/driver.h> |
5 | #include <linux/of_gpio.h> | 4 | #include <linux/of_gpio.h> |
6 | #include <linux/io.h> | 5 | #include <linux/io.h> |
7 | #include <linux/interrupt.h> | 6 | #include <linux/interrupt.h> |
8 | #include <linux/platform_device.h> | 7 | #include <linux/platform_device.h> |
9 | #include <linux/basic_mmio_gpio.h> | ||
10 | 8 | ||
11 | #define ETRAX_FS_rw_pa_dout 0 | 9 | #define ETRAX_FS_rw_pa_dout 0 |
12 | #define ETRAX_FS_r_pa_din 4 | 10 | #define ETRAX_FS_r_pa_din 4 |
@@ -67,7 +65,7 @@ struct etraxfs_gpio_block { | |||
67 | }; | 65 | }; |
68 | 66 | ||
69 | struct etraxfs_gpio_chip { | 67 | struct etraxfs_gpio_chip { |
70 | struct bgpio_chip bgc; | 68 | struct gpio_chip gc; |
71 | struct etraxfs_gpio_block *block; | 69 | struct etraxfs_gpio_block *block; |
72 | }; | 70 | }; |
73 | 71 | ||
@@ -176,11 +174,6 @@ static const struct etraxfs_gpio_info etraxfs_gpio_artpec3 = { | |||
176 | .rw_intr_pins = ARTPEC3_rw_intr_pins, | 174 | .rw_intr_pins = ARTPEC3_rw_intr_pins, |
177 | }; | 175 | }; |
178 | 176 | ||
179 | static struct etraxfs_gpio_chip *to_etraxfs(struct gpio_chip *gc) | ||
180 | { | ||
181 | return container_of(gc, struct etraxfs_gpio_chip, bgc.gc); | ||
182 | } | ||
183 | |||
184 | static unsigned int etraxfs_gpio_chip_to_port(struct gpio_chip *gc) | 177 | static unsigned int etraxfs_gpio_chip_to_port(struct gpio_chip *gc) |
185 | { | 178 | { |
186 | return gc->label[0] - 'A'; | 179 | return gc->label[0] - 'A'; |
@@ -220,13 +213,13 @@ static unsigned int etraxfs_gpio_to_group_irq(unsigned int gpio) | |||
220 | static unsigned int etraxfs_gpio_to_group_pin(struct etraxfs_gpio_chip *chip, | 213 | static unsigned int etraxfs_gpio_to_group_pin(struct etraxfs_gpio_chip *chip, |
221 | unsigned int gpio) | 214 | unsigned int gpio) |
222 | { | 215 | { |
223 | return 4 * etraxfs_gpio_chip_to_port(&chip->bgc.gc) + gpio / 8; | 216 | return 4 * etraxfs_gpio_chip_to_port(&chip->gc) + gpio / 8; |
224 | } | 217 | } |
225 | 218 | ||
226 | static void etraxfs_gpio_irq_ack(struct irq_data *d) | 219 | static void etraxfs_gpio_irq_ack(struct irq_data *d) |
227 | { | 220 | { |
228 | struct etraxfs_gpio_chip *chip = | 221 | struct etraxfs_gpio_chip *chip = |
229 | to_etraxfs(irq_data_get_irq_chip_data(d)); | 222 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
230 | struct etraxfs_gpio_block *block = chip->block; | 223 | struct etraxfs_gpio_block *block = chip->block; |
231 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); | 224 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); |
232 | 225 | ||
@@ -236,7 +229,7 @@ static void etraxfs_gpio_irq_ack(struct irq_data *d) | |||
236 | static void etraxfs_gpio_irq_mask(struct irq_data *d) | 229 | static void etraxfs_gpio_irq_mask(struct irq_data *d) |
237 | { | 230 | { |
238 | struct etraxfs_gpio_chip *chip = | 231 | struct etraxfs_gpio_chip *chip = |
239 | to_etraxfs(irq_data_get_irq_chip_data(d)); | 232 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
240 | struct etraxfs_gpio_block *block = chip->block; | 233 | struct etraxfs_gpio_block *block = chip->block; |
241 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); | 234 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); |
242 | 235 | ||
@@ -249,7 +242,7 @@ static void etraxfs_gpio_irq_mask(struct irq_data *d) | |||
249 | static void etraxfs_gpio_irq_unmask(struct irq_data *d) | 242 | static void etraxfs_gpio_irq_unmask(struct irq_data *d) |
250 | { | 243 | { |
251 | struct etraxfs_gpio_chip *chip = | 244 | struct etraxfs_gpio_chip *chip = |
252 | to_etraxfs(irq_data_get_irq_chip_data(d)); | 245 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
253 | struct etraxfs_gpio_block *block = chip->block; | 246 | struct etraxfs_gpio_block *block = chip->block; |
254 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); | 247 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); |
255 | 248 | ||
@@ -262,7 +255,7 @@ static void etraxfs_gpio_irq_unmask(struct irq_data *d) | |||
262 | static int etraxfs_gpio_irq_set_type(struct irq_data *d, u32 type) | 255 | static int etraxfs_gpio_irq_set_type(struct irq_data *d, u32 type) |
263 | { | 256 | { |
264 | struct etraxfs_gpio_chip *chip = | 257 | struct etraxfs_gpio_chip *chip = |
265 | to_etraxfs(irq_data_get_irq_chip_data(d)); | 258 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
266 | struct etraxfs_gpio_block *block = chip->block; | 259 | struct etraxfs_gpio_block *block = chip->block; |
267 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); | 260 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); |
268 | u32 cfg; | 261 | u32 cfg; |
@@ -299,7 +292,7 @@ static int etraxfs_gpio_irq_set_type(struct irq_data *d, u32 type) | |||
299 | static int etraxfs_gpio_irq_request_resources(struct irq_data *d) | 292 | static int etraxfs_gpio_irq_request_resources(struct irq_data *d) |
300 | { | 293 | { |
301 | struct etraxfs_gpio_chip *chip = | 294 | struct etraxfs_gpio_chip *chip = |
302 | to_etraxfs(irq_data_get_irq_chip_data(d)); | 295 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
303 | struct etraxfs_gpio_block *block = chip->block; | 296 | struct etraxfs_gpio_block *block = chip->block; |
304 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); | 297 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); |
305 | int ret = -EBUSY; | 298 | int ret = -EBUSY; |
@@ -308,7 +301,7 @@ static int etraxfs_gpio_irq_request_resources(struct irq_data *d) | |||
308 | if (block->group[grpirq]) | 301 | if (block->group[grpirq]) |
309 | goto out; | 302 | goto out; |
310 | 303 | ||
311 | ret = gpiochip_lock_as_irq(&chip->bgc.gc, d->hwirq); | 304 | ret = gpiochip_lock_as_irq(&chip->gc, d->hwirq); |
312 | if (ret) | 305 | if (ret) |
313 | goto out; | 306 | goto out; |
314 | 307 | ||
@@ -330,13 +323,13 @@ out: | |||
330 | static void etraxfs_gpio_irq_release_resources(struct irq_data *d) | 323 | static void etraxfs_gpio_irq_release_resources(struct irq_data *d) |
331 | { | 324 | { |
332 | struct etraxfs_gpio_chip *chip = | 325 | struct etraxfs_gpio_chip *chip = |
333 | to_etraxfs(irq_data_get_irq_chip_data(d)); | 326 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
334 | struct etraxfs_gpio_block *block = chip->block; | 327 | struct etraxfs_gpio_block *block = chip->block; |
335 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); | 328 | unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); |
336 | 329 | ||
337 | spin_lock(&block->lock); | 330 | spin_lock(&block->lock); |
338 | block->group[grpirq] = 0; | 331 | block->group[grpirq] = 0; |
339 | gpiochip_unlock_as_irq(&chip->bgc.gc, d->hwirq); | 332 | gpiochip_unlock_as_irq(&chip->gc, d->hwirq); |
340 | spin_unlock(&block->lock); | 333 | spin_unlock(&block->lock); |
341 | } | 334 | } |
342 | 335 | ||
@@ -419,7 +412,7 @@ static int etraxfs_gpio_probe(struct platform_device *pdev) | |||
419 | 412 | ||
420 | for (i = 0; i < info->num_ports; i++) { | 413 | for (i = 0; i < info->num_ports; i++) { |
421 | struct etraxfs_gpio_chip *chip = &chips[i]; | 414 | struct etraxfs_gpio_chip *chip = &chips[i]; |
422 | struct bgpio_chip *bgc = &chip->bgc; | 415 | struct gpio_chip *gc = &chip->gc; |
423 | const struct etraxfs_gpio_port *port = &info->ports[i]; | 416 | const struct etraxfs_gpio_port *port = &info->ports[i]; |
424 | unsigned long flags = BGPIOF_READ_OUTPUT_REG_SET; | 417 | unsigned long flags = BGPIOF_READ_OUTPUT_REG_SET; |
425 | void __iomem *dat = regs + port->din; | 418 | void __iomem *dat = regs + port->din; |
@@ -433,7 +426,7 @@ static int etraxfs_gpio_probe(struct platform_device *pdev) | |||
433 | flags = BGPIOF_NO_OUTPUT; | 426 | flags = BGPIOF_NO_OUTPUT; |
434 | } | 427 | } |
435 | 428 | ||
436 | ret = bgpio_init(bgc, dev, 4, | 429 | ret = bgpio_init(gc, dev, 4, |
437 | dat, set, NULL, dirout, NULL, | 430 | dat, set, NULL, dirout, NULL, |
438 | flags); | 431 | flags); |
439 | if (ret) { | 432 | if (ret) { |
@@ -442,28 +435,28 @@ static int etraxfs_gpio_probe(struct platform_device *pdev) | |||
442 | continue; | 435 | continue; |
443 | } | 436 | } |
444 | 437 | ||
445 | bgc->gc.ngpio = port->ngpio; | 438 | gc->ngpio = port->ngpio; |
446 | bgc->gc.label = port->label; | 439 | gc->label = port->label; |
447 | 440 | ||
448 | bgc->gc.of_node = dev->of_node; | 441 | gc->of_node = dev->of_node; |
449 | bgc->gc.of_gpio_n_cells = 3; | 442 | gc->of_gpio_n_cells = 3; |
450 | bgc->gc.of_xlate = etraxfs_gpio_of_xlate; | 443 | gc->of_xlate = etraxfs_gpio_of_xlate; |
451 | 444 | ||
452 | ret = gpiochip_add(&bgc->gc); | 445 | ret = gpiochip_add_data(gc, chip); |
453 | if (ret) { | 446 | if (ret) { |
454 | dev_err(dev, "Unable to register port %s\n", | 447 | dev_err(dev, "Unable to register port %s\n", |
455 | bgc->gc.label); | 448 | gc->label); |
456 | continue; | 449 | continue; |
457 | } | 450 | } |
458 | 451 | ||
459 | if (i > 0 && !allportsirq) | 452 | if (i > 0 && !allportsirq) |
460 | continue; | 453 | continue; |
461 | 454 | ||
462 | ret = gpiochip_irqchip_add(&bgc->gc, &etraxfs_gpio_irq_chip, 0, | 455 | ret = gpiochip_irqchip_add(gc, &etraxfs_gpio_irq_chip, 0, |
463 | handle_level_irq, IRQ_TYPE_NONE); | 456 | handle_level_irq, IRQ_TYPE_NONE); |
464 | if (ret) { | 457 | if (ret) { |
465 | dev_err(dev, "Unable to add irqchip to port %s\n", | 458 | dev_err(dev, "Unable to add irqchip to port %s\n", |
466 | bgc->gc.label); | 459 | gc->label); |
467 | } | 460 | } |
468 | } | 461 | } |
469 | 462 | ||
diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c index 5e3c4fa67d82..d62fd6bbaf82 100644 --- a/drivers/gpio/gpio-f7188x.c +++ b/drivers/gpio/gpio-f7188x.c | |||
@@ -193,8 +193,7 @@ static struct f7188x_gpio_bank f71889_gpio_bank[] = { | |||
193 | static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | 193 | static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) |
194 | { | 194 | { |
195 | int err; | 195 | int err; |
196 | struct f7188x_gpio_bank *bank = | 196 | struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); |
197 | container_of(chip, struct f7188x_gpio_bank, chip); | ||
198 | struct f7188x_sio *sio = bank->data->sio; | 197 | struct f7188x_sio *sio = bank->data->sio; |
199 | u8 dir; | 198 | u8 dir; |
200 | 199 | ||
@@ -215,8 +214,7 @@ static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | |||
215 | static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset) | 214 | static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset) |
216 | { | 215 | { |
217 | int err; | 216 | int err; |
218 | struct f7188x_gpio_bank *bank = | 217 | struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); |
219 | container_of(chip, struct f7188x_gpio_bank, chip); | ||
220 | struct f7188x_sio *sio = bank->data->sio; | 218 | struct f7188x_sio *sio = bank->data->sio; |
221 | u8 dir, data; | 219 | u8 dir, data; |
222 | 220 | ||
@@ -241,8 +239,7 @@ static int f7188x_gpio_direction_out(struct gpio_chip *chip, | |||
241 | unsigned offset, int value) | 239 | unsigned offset, int value) |
242 | { | 240 | { |
243 | int err; | 241 | int err; |
244 | struct f7188x_gpio_bank *bank = | 242 | struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); |
245 | container_of(chip, struct f7188x_gpio_bank, chip); | ||
246 | struct f7188x_sio *sio = bank->data->sio; | 243 | struct f7188x_sio *sio = bank->data->sio; |
247 | u8 dir, data_out; | 244 | u8 dir, data_out; |
248 | 245 | ||
@@ -270,8 +267,7 @@ static int f7188x_gpio_direction_out(struct gpio_chip *chip, | |||
270 | static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 267 | static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
271 | { | 268 | { |
272 | int err; | 269 | int err; |
273 | struct f7188x_gpio_bank *bank = | 270 | struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); |
274 | container_of(chip, struct f7188x_gpio_bank, chip); | ||
275 | struct f7188x_sio *sio = bank->data->sio; | 271 | struct f7188x_sio *sio = bank->data->sio; |
276 | u8 data_out; | 272 | u8 data_out; |
277 | 273 | ||
@@ -298,7 +294,7 @@ static int f7188x_gpio_probe(struct platform_device *pdev) | |||
298 | { | 294 | { |
299 | int err; | 295 | int err; |
300 | int i; | 296 | int i; |
301 | struct f7188x_sio *sio = pdev->dev.platform_data; | 297 | struct f7188x_sio *sio = dev_get_platdata(&pdev->dev); |
302 | struct f7188x_gpio_data *data; | 298 | struct f7188x_gpio_data *data; |
303 | 299 | ||
304 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); | 300 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); |
@@ -333,10 +329,10 @@ static int f7188x_gpio_probe(struct platform_device *pdev) | |||
333 | for (i = 0; i < data->nr_bank; i++) { | 329 | for (i = 0; i < data->nr_bank; i++) { |
334 | struct f7188x_gpio_bank *bank = &data->bank[i]; | 330 | struct f7188x_gpio_bank *bank = &data->bank[i]; |
335 | 331 | ||
336 | bank->chip.dev = &pdev->dev; | 332 | bank->chip.parent = &pdev->dev; |
337 | bank->data = data; | 333 | bank->data = data; |
338 | 334 | ||
339 | err = gpiochip_add(&bank->chip); | 335 | err = gpiochip_add_data(&bank->chip, bank); |
340 | if (err) { | 336 | if (err) { |
341 | dev_err(&pdev->dev, | 337 | dev_err(&pdev->dev, |
342 | "Failed to register gpiochip %d: %d\n", | 338 | "Failed to register gpiochip %d: %d\n", |
diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c index f9ac3f351753..cbbec838a9d1 100644 --- a/drivers/gpio/gpio-ge.c +++ b/drivers/gpio/gpio-ge.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include <linux/of_gpio.h> | 24 | #include <linux/of_gpio.h> |
25 | #include <linux/of_address.h> | 25 | #include <linux/of_address.h> |
26 | #include <linux/module.h> | 26 | #include <linux/module.h> |
27 | #include <linux/basic_mmio_gpio.h> | 27 | #include <linux/gpio/driver.h> |
28 | 28 | ||
29 | #define GEF_GPIO_DIRECT 0x00 | 29 | #define GEF_GPIO_DIRECT 0x00 |
30 | #define GEF_GPIO_IN 0x04 | 30 | #define GEF_GPIO_IN 0x04 |
@@ -55,19 +55,19 @@ static int __init gef_gpio_probe(struct platform_device *pdev) | |||
55 | { | 55 | { |
56 | const struct of_device_id *of_id = | 56 | const struct of_device_id *of_id = |
57 | of_match_device(gef_gpio_ids, &pdev->dev); | 57 | of_match_device(gef_gpio_ids, &pdev->dev); |
58 | struct bgpio_chip *bgc; | 58 | struct gpio_chip *gc; |
59 | void __iomem *regs; | 59 | void __iomem *regs; |
60 | int ret; | 60 | int ret; |
61 | 61 | ||
62 | bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL); | 62 | gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); |
63 | if (!bgc) | 63 | if (!gc) |
64 | return -ENOMEM; | 64 | return -ENOMEM; |
65 | 65 | ||
66 | regs = of_iomap(pdev->dev.of_node, 0); | 66 | regs = of_iomap(pdev->dev.of_node, 0); |
67 | if (!regs) | 67 | if (!regs) |
68 | return -ENOMEM; | 68 | return -ENOMEM; |
69 | 69 | ||
70 | ret = bgpio_init(bgc, &pdev->dev, 4, regs + GEF_GPIO_IN, | 70 | ret = bgpio_init(gc, &pdev->dev, 4, regs + GEF_GPIO_IN, |
71 | regs + GEF_GPIO_OUT, NULL, NULL, | 71 | regs + GEF_GPIO_OUT, NULL, NULL, |
72 | regs + GEF_GPIO_DIRECT, BGPIOF_BIG_ENDIAN_BYTE_ORDER); | 72 | regs + GEF_GPIO_DIRECT, BGPIOF_BIG_ENDIAN_BYTE_ORDER); |
73 | if (ret) { | 73 | if (ret) { |
@@ -76,20 +76,20 @@ static int __init gef_gpio_probe(struct platform_device *pdev) | |||
76 | } | 76 | } |
77 | 77 | ||
78 | /* Setup pointers to chip functions */ | 78 | /* Setup pointers to chip functions */ |
79 | bgc->gc.label = devm_kstrdup(&pdev->dev, pdev->dev.of_node->full_name, | 79 | gc->label = devm_kstrdup(&pdev->dev, pdev->dev.of_node->full_name, |
80 | GFP_KERNEL); | 80 | GFP_KERNEL); |
81 | if (!bgc->gc.label) { | 81 | if (!gc->label) { |
82 | ret = -ENOMEM; | 82 | ret = -ENOMEM; |
83 | goto err0; | 83 | goto err0; |
84 | } | 84 | } |
85 | 85 | ||
86 | bgc->gc.base = -1; | 86 | gc->base = -1; |
87 | bgc->gc.ngpio = (u16)(uintptr_t)of_id->data; | 87 | gc->ngpio = (u16)(uintptr_t)of_id->data; |
88 | bgc->gc.of_gpio_n_cells = 2; | 88 | gc->of_gpio_n_cells = 2; |
89 | bgc->gc.of_node = pdev->dev.of_node; | 89 | gc->of_node = pdev->dev.of_node; |
90 | 90 | ||
91 | /* This function adds a memory mapped GPIO chip */ | 91 | /* This function adds a memory mapped GPIO chip */ |
92 | ret = gpiochip_add(&bgc->gc); | 92 | ret = gpiochip_add_data(gc, NULL); |
93 | if (ret) | 93 | if (ret) |
94 | goto err0; | 94 | goto err0; |
95 | 95 | ||
diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-generic.c index 88ae70ddb127..2a4f2333a50b 100644 --- a/drivers/gpio/gpio-generic.c +++ b/drivers/gpio/gpio-generic.c | |||
@@ -56,11 +56,11 @@ o ` ~~~~\___/~~~~ ` controller in FPGA is ,.` | |||
56 | #include <linux/log2.h> | 56 | #include <linux/log2.h> |
57 | #include <linux/ioport.h> | 57 | #include <linux/ioport.h> |
58 | #include <linux/io.h> | 58 | #include <linux/io.h> |
59 | #include <linux/gpio.h> | 59 | #include <linux/gpio/driver.h> |
60 | #include <linux/slab.h> | 60 | #include <linux/slab.h> |
61 | #include <linux/bitops.h> | ||
61 | #include <linux/platform_device.h> | 62 | #include <linux/platform_device.h> |
62 | #include <linux/mod_devicetable.h> | 63 | #include <linux/mod_devicetable.h> |
63 | #include <linux/basic_mmio_gpio.h> | ||
64 | 64 | ||
65 | static void bgpio_write8(void __iomem *reg, unsigned long data) | 65 | static void bgpio_write8(void __iomem *reg, unsigned long data) |
66 | { | 66 | { |
@@ -124,33 +124,30 @@ static unsigned long bgpio_read32be(void __iomem *reg) | |||
124 | return ioread32be(reg); | 124 | return ioread32be(reg); |
125 | } | 125 | } |
126 | 126 | ||
127 | static unsigned long bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin) | 127 | static unsigned long bgpio_pin2mask(struct gpio_chip *gc, unsigned int pin) |
128 | { | 128 | { |
129 | return 1 << pin; | 129 | return BIT(pin); |
130 | } | 130 | } |
131 | 131 | ||
132 | static unsigned long bgpio_pin2mask_be(struct bgpio_chip *bgc, | 132 | static unsigned long bgpio_pin2mask_be(struct gpio_chip *gc, |
133 | unsigned int pin) | 133 | unsigned int pin) |
134 | { | 134 | { |
135 | return 1 << (bgc->bits - 1 - pin); | 135 | return BIT(gc->bgpio_bits - 1 - pin); |
136 | } | 136 | } |
137 | 137 | ||
138 | static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio) | 138 | static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio) |
139 | { | 139 | { |
140 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 140 | unsigned long pinmask = gc->pin2mask(gc, gpio); |
141 | unsigned long pinmask = bgc->pin2mask(bgc, gpio); | ||
142 | 141 | ||
143 | if (bgc->dir & pinmask) | 142 | if (gc->bgpio_dir & pinmask) |
144 | return !!(bgc->read_reg(bgc->reg_set) & pinmask); | 143 | return !!(gc->read_reg(gc->reg_set) & pinmask); |
145 | else | 144 | else |
146 | return !!(bgc->read_reg(bgc->reg_dat) & pinmask); | 145 | return !!(gc->read_reg(gc->reg_dat) & pinmask); |
147 | } | 146 | } |
148 | 147 | ||
149 | static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) | 148 | static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) |
150 | { | 149 | { |
151 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 150 | return !!(gc->read_reg(gc->reg_dat) & gc->pin2mask(gc, gpio)); |
152 | |||
153 | return !!(bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio)); | ||
154 | } | 151 | } |
155 | 152 | ||
156 | static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val) | 153 | static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val) |
@@ -159,53 +156,50 @@ static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val) | |||
159 | 156 | ||
160 | static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | 157 | static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) |
161 | { | 158 | { |
162 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 159 | unsigned long mask = gc->pin2mask(gc, gpio); |
163 | unsigned long mask = bgc->pin2mask(bgc, gpio); | ||
164 | unsigned long flags; | 160 | unsigned long flags; |
165 | 161 | ||
166 | spin_lock_irqsave(&bgc->lock, flags); | 162 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
167 | 163 | ||
168 | if (val) | 164 | if (val) |
169 | bgc->data |= mask; | 165 | gc->bgpio_data |= mask; |
170 | else | 166 | else |
171 | bgc->data &= ~mask; | 167 | gc->bgpio_data &= ~mask; |
172 | 168 | ||
173 | bgc->write_reg(bgc->reg_dat, bgc->data); | 169 | gc->write_reg(gc->reg_dat, gc->bgpio_data); |
174 | 170 | ||
175 | spin_unlock_irqrestore(&bgc->lock, flags); | 171 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
176 | } | 172 | } |
177 | 173 | ||
178 | static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio, | 174 | static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio, |
179 | int val) | 175 | int val) |
180 | { | 176 | { |
181 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 177 | unsigned long mask = gc->pin2mask(gc, gpio); |
182 | unsigned long mask = bgc->pin2mask(bgc, gpio); | ||
183 | 178 | ||
184 | if (val) | 179 | if (val) |
185 | bgc->write_reg(bgc->reg_set, mask); | 180 | gc->write_reg(gc->reg_set, mask); |
186 | else | 181 | else |
187 | bgc->write_reg(bgc->reg_clr, mask); | 182 | gc->write_reg(gc->reg_clr, mask); |
188 | } | 183 | } |
189 | 184 | ||
190 | static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) | 185 | static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) |
191 | { | 186 | { |
192 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 187 | unsigned long mask = gc->pin2mask(gc, gpio); |
193 | unsigned long mask = bgc->pin2mask(bgc, gpio); | ||
194 | unsigned long flags; | 188 | unsigned long flags; |
195 | 189 | ||
196 | spin_lock_irqsave(&bgc->lock, flags); | 190 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
197 | 191 | ||
198 | if (val) | 192 | if (val) |
199 | bgc->data |= mask; | 193 | gc->bgpio_data |= mask; |
200 | else | 194 | else |
201 | bgc->data &= ~mask; | 195 | gc->bgpio_data &= ~mask; |
202 | 196 | ||
203 | bgc->write_reg(bgc->reg_set, bgc->data); | 197 | gc->write_reg(gc->reg_set, gc->bgpio_data); |
204 | 198 | ||
205 | spin_unlock_irqrestore(&bgc->lock, flags); | 199 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
206 | } | 200 | } |
207 | 201 | ||
208 | static void bgpio_multiple_get_masks(struct bgpio_chip *bgc, | 202 | static void bgpio_multiple_get_masks(struct gpio_chip *gc, |
209 | unsigned long *mask, unsigned long *bits, | 203 | unsigned long *mask, unsigned long *bits, |
210 | unsigned long *set_mask, | 204 | unsigned long *set_mask, |
211 | unsigned long *clear_mask) | 205 | unsigned long *clear_mask) |
@@ -215,19 +209,19 @@ static void bgpio_multiple_get_masks(struct bgpio_chip *bgc, | |||
215 | *set_mask = 0; | 209 | *set_mask = 0; |
216 | *clear_mask = 0; | 210 | *clear_mask = 0; |
217 | 211 | ||
218 | for (i = 0; i < bgc->bits; i++) { | 212 | for (i = 0; i < gc->bgpio_bits; i++) { |
219 | if (*mask == 0) | 213 | if (*mask == 0) |
220 | break; | 214 | break; |
221 | if (__test_and_clear_bit(i, mask)) { | 215 | if (__test_and_clear_bit(i, mask)) { |
222 | if (test_bit(i, bits)) | 216 | if (test_bit(i, bits)) |
223 | *set_mask |= bgc->pin2mask(bgc, i); | 217 | *set_mask |= gc->pin2mask(gc, i); |
224 | else | 218 | else |
225 | *clear_mask |= bgc->pin2mask(bgc, i); | 219 | *clear_mask |= gc->pin2mask(gc, i); |
226 | } | 220 | } |
227 | } | 221 | } |
228 | } | 222 | } |
229 | 223 | ||
230 | static void bgpio_set_multiple_single_reg(struct bgpio_chip *bgc, | 224 | static void bgpio_set_multiple_single_reg(struct gpio_chip *gc, |
231 | unsigned long *mask, | 225 | unsigned long *mask, |
232 | unsigned long *bits, | 226 | unsigned long *bits, |
233 | void __iomem *reg) | 227 | void __iomem *reg) |
@@ -235,47 +229,42 @@ static void bgpio_set_multiple_single_reg(struct bgpio_chip *bgc, | |||
235 | unsigned long flags; | 229 | unsigned long flags; |
236 | unsigned long set_mask, clear_mask; | 230 | unsigned long set_mask, clear_mask; |
237 | 231 | ||
238 | spin_lock_irqsave(&bgc->lock, flags); | 232 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
239 | 233 | ||
240 | bgpio_multiple_get_masks(bgc, mask, bits, &set_mask, &clear_mask); | 234 | bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); |
241 | 235 | ||
242 | bgc->data |= set_mask; | 236 | gc->bgpio_data |= set_mask; |
243 | bgc->data &= ~clear_mask; | 237 | gc->bgpio_data &= ~clear_mask; |
244 | 238 | ||
245 | bgc->write_reg(reg, bgc->data); | 239 | gc->write_reg(reg, gc->bgpio_data); |
246 | 240 | ||
247 | spin_unlock_irqrestore(&bgc->lock, flags); | 241 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
248 | } | 242 | } |
249 | 243 | ||
250 | static void bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, | 244 | static void bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, |
251 | unsigned long *bits) | 245 | unsigned long *bits) |
252 | { | 246 | { |
253 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 247 | bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat); |
254 | |||
255 | bgpio_set_multiple_single_reg(bgc, mask, bits, bgc->reg_dat); | ||
256 | } | 248 | } |
257 | 249 | ||
258 | static void bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask, | 250 | static void bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask, |
259 | unsigned long *bits) | 251 | unsigned long *bits) |
260 | { | 252 | { |
261 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 253 | bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set); |
262 | |||
263 | bgpio_set_multiple_single_reg(bgc, mask, bits, bgc->reg_set); | ||
264 | } | 254 | } |
265 | 255 | ||
266 | static void bgpio_set_multiple_with_clear(struct gpio_chip *gc, | 256 | static void bgpio_set_multiple_with_clear(struct gpio_chip *gc, |
267 | unsigned long *mask, | 257 | unsigned long *mask, |
268 | unsigned long *bits) | 258 | unsigned long *bits) |
269 | { | 259 | { |
270 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
271 | unsigned long set_mask, clear_mask; | 260 | unsigned long set_mask, clear_mask; |
272 | 261 | ||
273 | bgpio_multiple_get_masks(bgc, mask, bits, &set_mask, &clear_mask); | 262 | bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); |
274 | 263 | ||
275 | if (set_mask) | 264 | if (set_mask) |
276 | bgc->write_reg(bgc->reg_set, set_mask); | 265 | gc->write_reg(gc->reg_set, set_mask); |
277 | if (clear_mask) | 266 | if (clear_mask) |
278 | bgc->write_reg(bgc->reg_clr, clear_mask); | 267 | gc->write_reg(gc->reg_clr, clear_mask); |
279 | } | 268 | } |
280 | 269 | ||
281 | static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) | 270 | static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) |
@@ -299,111 +288,103 @@ static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio, | |||
299 | 288 | ||
300 | static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | 289 | static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) |
301 | { | 290 | { |
302 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
303 | unsigned long flags; | 291 | unsigned long flags; |
304 | 292 | ||
305 | spin_lock_irqsave(&bgc->lock, flags); | 293 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
306 | 294 | ||
307 | bgc->dir &= ~bgc->pin2mask(bgc, gpio); | 295 | gc->bgpio_dir &= ~gc->pin2mask(gc, gpio); |
308 | bgc->write_reg(bgc->reg_dir, bgc->dir); | 296 | gc->write_reg(gc->reg_dir, gc->bgpio_dir); |
309 | 297 | ||
310 | spin_unlock_irqrestore(&bgc->lock, flags); | 298 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
311 | 299 | ||
312 | return 0; | 300 | return 0; |
313 | } | 301 | } |
314 | 302 | ||
315 | static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio) | 303 | static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio) |
316 | { | 304 | { |
317 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 305 | /* Return 0 if output, 1 of input */ |
318 | 306 | return !(gc->read_reg(gc->reg_dir) & gc->pin2mask(gc, gpio)); | |
319 | return (bgc->read_reg(bgc->reg_dir) & bgc->pin2mask(bgc, gpio)) ? | ||
320 | GPIOF_DIR_OUT : GPIOF_DIR_IN; | ||
321 | } | 307 | } |
322 | 308 | ||
323 | static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | 309 | static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) |
324 | { | 310 | { |
325 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
326 | unsigned long flags; | 311 | unsigned long flags; |
327 | 312 | ||
328 | gc->set(gc, gpio, val); | 313 | gc->set(gc, gpio, val); |
329 | 314 | ||
330 | spin_lock_irqsave(&bgc->lock, flags); | 315 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
331 | 316 | ||
332 | bgc->dir |= bgc->pin2mask(bgc, gpio); | 317 | gc->bgpio_dir |= gc->pin2mask(gc, gpio); |
333 | bgc->write_reg(bgc->reg_dir, bgc->dir); | 318 | gc->write_reg(gc->reg_dir, gc->bgpio_dir); |
334 | 319 | ||
335 | spin_unlock_irqrestore(&bgc->lock, flags); | 320 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
336 | 321 | ||
337 | return 0; | 322 | return 0; |
338 | } | 323 | } |
339 | 324 | ||
340 | static int bgpio_dir_in_inv(struct gpio_chip *gc, unsigned int gpio) | 325 | static int bgpio_dir_in_inv(struct gpio_chip *gc, unsigned int gpio) |
341 | { | 326 | { |
342 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
343 | unsigned long flags; | 327 | unsigned long flags; |
344 | 328 | ||
345 | spin_lock_irqsave(&bgc->lock, flags); | 329 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
346 | 330 | ||
347 | bgc->dir |= bgc->pin2mask(bgc, gpio); | 331 | gc->bgpio_dir |= gc->pin2mask(gc, gpio); |
348 | bgc->write_reg(bgc->reg_dir, bgc->dir); | 332 | gc->write_reg(gc->reg_dir, gc->bgpio_dir); |
349 | 333 | ||
350 | spin_unlock_irqrestore(&bgc->lock, flags); | 334 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
351 | 335 | ||
352 | return 0; | 336 | return 0; |
353 | } | 337 | } |
354 | 338 | ||
355 | static int bgpio_dir_out_inv(struct gpio_chip *gc, unsigned int gpio, int val) | 339 | static int bgpio_dir_out_inv(struct gpio_chip *gc, unsigned int gpio, int val) |
356 | { | 340 | { |
357 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
358 | unsigned long flags; | 341 | unsigned long flags; |
359 | 342 | ||
360 | gc->set(gc, gpio, val); | 343 | gc->set(gc, gpio, val); |
361 | 344 | ||
362 | spin_lock_irqsave(&bgc->lock, flags); | 345 | spin_lock_irqsave(&gc->bgpio_lock, flags); |
363 | 346 | ||
364 | bgc->dir &= ~bgc->pin2mask(bgc, gpio); | 347 | gc->bgpio_dir &= ~gc->pin2mask(gc, gpio); |
365 | bgc->write_reg(bgc->reg_dir, bgc->dir); | 348 | gc->write_reg(gc->reg_dir, gc->bgpio_dir); |
366 | 349 | ||
367 | spin_unlock_irqrestore(&bgc->lock, flags); | 350 | spin_unlock_irqrestore(&gc->bgpio_lock, flags); |
368 | 351 | ||
369 | return 0; | 352 | return 0; |
370 | } | 353 | } |
371 | 354 | ||
372 | static int bgpio_get_dir_inv(struct gpio_chip *gc, unsigned int gpio) | 355 | static int bgpio_get_dir_inv(struct gpio_chip *gc, unsigned int gpio) |
373 | { | 356 | { |
374 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 357 | /* Return 0 if output, 1 if input */ |
375 | 358 | return !!(gc->read_reg(gc->reg_dir) & gc->pin2mask(gc, gpio)); | |
376 | return (bgc->read_reg(bgc->reg_dir) & bgc->pin2mask(bgc, gpio)) ? | ||
377 | GPIOF_DIR_IN : GPIOF_DIR_OUT; | ||
378 | } | 359 | } |
379 | 360 | ||
380 | static int bgpio_setup_accessors(struct device *dev, | 361 | static int bgpio_setup_accessors(struct device *dev, |
381 | struct bgpio_chip *bgc, | 362 | struct gpio_chip *gc, |
382 | bool bit_be, | 363 | bool bit_be, |
383 | bool byte_be) | 364 | bool byte_be) |
384 | { | 365 | { |
385 | 366 | ||
386 | switch (bgc->bits) { | 367 | switch (gc->bgpio_bits) { |
387 | case 8: | 368 | case 8: |
388 | bgc->read_reg = bgpio_read8; | 369 | gc->read_reg = bgpio_read8; |
389 | bgc->write_reg = bgpio_write8; | 370 | gc->write_reg = bgpio_write8; |
390 | break; | 371 | break; |
391 | case 16: | 372 | case 16: |
392 | if (byte_be) { | 373 | if (byte_be) { |
393 | bgc->read_reg = bgpio_read16be; | 374 | gc->read_reg = bgpio_read16be; |
394 | bgc->write_reg = bgpio_write16be; | 375 | gc->write_reg = bgpio_write16be; |
395 | } else { | 376 | } else { |
396 | bgc->read_reg = bgpio_read16; | 377 | gc->read_reg = bgpio_read16; |
397 | bgc->write_reg = bgpio_write16; | 378 | gc->write_reg = bgpio_write16; |
398 | } | 379 | } |
399 | break; | 380 | break; |
400 | case 32: | 381 | case 32: |
401 | if (byte_be) { | 382 | if (byte_be) { |
402 | bgc->read_reg = bgpio_read32be; | 383 | gc->read_reg = bgpio_read32be; |
403 | bgc->write_reg = bgpio_write32be; | 384 | gc->write_reg = bgpio_write32be; |
404 | } else { | 385 | } else { |
405 | bgc->read_reg = bgpio_read32; | 386 | gc->read_reg = bgpio_read32; |
406 | bgc->write_reg = bgpio_write32; | 387 | gc->write_reg = bgpio_write32; |
407 | } | 388 | } |
408 | break; | 389 | break; |
409 | #if BITS_PER_LONG >= 64 | 390 | #if BITS_PER_LONG >= 64 |
@@ -413,17 +394,17 @@ static int bgpio_setup_accessors(struct device *dev, | |||
413 | "64 bit big endian byte order unsupported\n"); | 394 | "64 bit big endian byte order unsupported\n"); |
414 | return -EINVAL; | 395 | return -EINVAL; |
415 | } else { | 396 | } else { |
416 | bgc->read_reg = bgpio_read64; | 397 | gc->read_reg = bgpio_read64; |
417 | bgc->write_reg = bgpio_write64; | 398 | gc->write_reg = bgpio_write64; |
418 | } | 399 | } |
419 | break; | 400 | break; |
420 | #endif /* BITS_PER_LONG >= 64 */ | 401 | #endif /* BITS_PER_LONG >= 64 */ |
421 | default: | 402 | default: |
422 | dev_err(dev, "unsupported data width %u bits\n", bgc->bits); | 403 | dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits); |
423 | return -EINVAL; | 404 | return -EINVAL; |
424 | } | 405 | } |
425 | 406 | ||
426 | bgc->pin2mask = bit_be ? bgpio_pin2mask_be : bgpio_pin2mask; | 407 | gc->pin2mask = bit_be ? bgpio_pin2mask_be : bgpio_pin2mask; |
427 | 408 | ||
428 | return 0; | 409 | return 0; |
429 | } | 410 | } |
@@ -450,44 +431,44 @@ static int bgpio_setup_accessors(struct device *dev, | |||
450 | * - an input direction register (named "dirin") where a 1 bit indicates | 431 | * - an input direction register (named "dirin") where a 1 bit indicates |
451 | * the GPIO is an input. | 432 | * the GPIO is an input. |
452 | */ | 433 | */ |
453 | static int bgpio_setup_io(struct bgpio_chip *bgc, | 434 | static int bgpio_setup_io(struct gpio_chip *gc, |
454 | void __iomem *dat, | 435 | void __iomem *dat, |
455 | void __iomem *set, | 436 | void __iomem *set, |
456 | void __iomem *clr, | 437 | void __iomem *clr, |
457 | unsigned long flags) | 438 | unsigned long flags) |
458 | { | 439 | { |
459 | 440 | ||
460 | bgc->reg_dat = dat; | 441 | gc->reg_dat = dat; |
461 | if (!bgc->reg_dat) | 442 | if (!gc->reg_dat) |
462 | return -EINVAL; | 443 | return -EINVAL; |
463 | 444 | ||
464 | if (set && clr) { | 445 | if (set && clr) { |
465 | bgc->reg_set = set; | 446 | gc->reg_set = set; |
466 | bgc->reg_clr = clr; | 447 | gc->reg_clr = clr; |
467 | bgc->gc.set = bgpio_set_with_clear; | 448 | gc->set = bgpio_set_with_clear; |
468 | bgc->gc.set_multiple = bgpio_set_multiple_with_clear; | 449 | gc->set_multiple = bgpio_set_multiple_with_clear; |
469 | } else if (set && !clr) { | 450 | } else if (set && !clr) { |
470 | bgc->reg_set = set; | 451 | gc->reg_set = set; |
471 | bgc->gc.set = bgpio_set_set; | 452 | gc->set = bgpio_set_set; |
472 | bgc->gc.set_multiple = bgpio_set_multiple_set; | 453 | gc->set_multiple = bgpio_set_multiple_set; |
473 | } else if (flags & BGPIOF_NO_OUTPUT) { | 454 | } else if (flags & BGPIOF_NO_OUTPUT) { |
474 | bgc->gc.set = bgpio_set_none; | 455 | gc->set = bgpio_set_none; |
475 | bgc->gc.set_multiple = NULL; | 456 | gc->set_multiple = NULL; |
476 | } else { | 457 | } else { |
477 | bgc->gc.set = bgpio_set; | 458 | gc->set = bgpio_set; |
478 | bgc->gc.set_multiple = bgpio_set_multiple; | 459 | gc->set_multiple = bgpio_set_multiple; |
479 | } | 460 | } |
480 | 461 | ||
481 | if (!(flags & BGPIOF_UNREADABLE_REG_SET) && | 462 | if (!(flags & BGPIOF_UNREADABLE_REG_SET) && |
482 | (flags & BGPIOF_READ_OUTPUT_REG_SET)) | 463 | (flags & BGPIOF_READ_OUTPUT_REG_SET)) |
483 | bgc->gc.get = bgpio_get_set; | 464 | gc->get = bgpio_get_set; |
484 | else | 465 | else |
485 | bgc->gc.get = bgpio_get; | 466 | gc->get = bgpio_get; |
486 | 467 | ||
487 | return 0; | 468 | return 0; |
488 | } | 469 | } |
489 | 470 | ||
490 | static int bgpio_setup_direction(struct bgpio_chip *bgc, | 471 | static int bgpio_setup_direction(struct gpio_chip *gc, |
491 | void __iomem *dirout, | 472 | void __iomem *dirout, |
492 | void __iomem *dirin, | 473 | void __iomem *dirin, |
493 | unsigned long flags) | 474 | unsigned long flags) |
@@ -495,21 +476,21 @@ static int bgpio_setup_direction(struct bgpio_chip *bgc, | |||
495 | if (dirout && dirin) { | 476 | if (dirout && dirin) { |
496 | return -EINVAL; | 477 | return -EINVAL; |
497 | } else if (dirout) { | 478 | } else if (dirout) { |
498 | bgc->reg_dir = dirout; | 479 | gc->reg_dir = dirout; |
499 | bgc->gc.direction_output = bgpio_dir_out; | 480 | gc->direction_output = bgpio_dir_out; |
500 | bgc->gc.direction_input = bgpio_dir_in; | 481 | gc->direction_input = bgpio_dir_in; |
501 | bgc->gc.get_direction = bgpio_get_dir; | 482 | gc->get_direction = bgpio_get_dir; |
502 | } else if (dirin) { | 483 | } else if (dirin) { |
503 | bgc->reg_dir = dirin; | 484 | gc->reg_dir = dirin; |
504 | bgc->gc.direction_output = bgpio_dir_out_inv; | 485 | gc->direction_output = bgpio_dir_out_inv; |
505 | bgc->gc.direction_input = bgpio_dir_in_inv; | 486 | gc->direction_input = bgpio_dir_in_inv; |
506 | bgc->gc.get_direction = bgpio_get_dir_inv; | 487 | gc->get_direction = bgpio_get_dir_inv; |
507 | } else { | 488 | } else { |
508 | if (flags & BGPIOF_NO_OUTPUT) | 489 | if (flags & BGPIOF_NO_OUTPUT) |
509 | bgc->gc.direction_output = bgpio_dir_out_err; | 490 | gc->direction_output = bgpio_dir_out_err; |
510 | else | 491 | else |
511 | bgc->gc.direction_output = bgpio_simple_dir_out; | 492 | gc->direction_output = bgpio_simple_dir_out; |
512 | bgc->gc.direction_input = bgpio_simple_dir_in; | 493 | gc->direction_input = bgpio_simple_dir_in; |
513 | } | 494 | } |
514 | 495 | ||
515 | return 0; | 496 | return 0; |
@@ -523,14 +504,7 @@ static int bgpio_request(struct gpio_chip *chip, unsigned gpio_pin) | |||
523 | return -EINVAL; | 504 | return -EINVAL; |
524 | } | 505 | } |
525 | 506 | ||
526 | int bgpio_remove(struct bgpio_chip *bgc) | 507 | int bgpio_init(struct gpio_chip *gc, struct device *dev, |
527 | { | ||
528 | gpiochip_remove(&bgc->gc); | ||
529 | return 0; | ||
530 | } | ||
531 | EXPORT_SYMBOL_GPL(bgpio_remove); | ||
532 | |||
533 | int bgpio_init(struct bgpio_chip *bgc, struct device *dev, | ||
534 | unsigned long sz, void __iomem *dat, void __iomem *set, | 508 | unsigned long sz, void __iomem *dat, void __iomem *set, |
535 | void __iomem *clr, void __iomem *dirout, void __iomem *dirin, | 509 | void __iomem *clr, void __iomem *dirout, void __iomem *dirin, |
536 | unsigned long flags) | 510 | unsigned long flags) |
@@ -540,36 +514,36 @@ int bgpio_init(struct bgpio_chip *bgc, struct device *dev, | |||
540 | if (!is_power_of_2(sz)) | 514 | if (!is_power_of_2(sz)) |
541 | return -EINVAL; | 515 | return -EINVAL; |
542 | 516 | ||
543 | bgc->bits = sz * 8; | 517 | gc->bgpio_bits = sz * 8; |
544 | if (bgc->bits > BITS_PER_LONG) | 518 | if (gc->bgpio_bits > BITS_PER_LONG) |
545 | return -EINVAL; | 519 | return -EINVAL; |
546 | 520 | ||
547 | spin_lock_init(&bgc->lock); | 521 | spin_lock_init(&gc->bgpio_lock); |
548 | bgc->gc.dev = dev; | 522 | gc->parent = dev; |
549 | bgc->gc.label = dev_name(dev); | 523 | gc->label = dev_name(dev); |
550 | bgc->gc.base = -1; | 524 | gc->base = -1; |
551 | bgc->gc.ngpio = bgc->bits; | 525 | gc->ngpio = gc->bgpio_bits; |
552 | bgc->gc.request = bgpio_request; | 526 | gc->request = bgpio_request; |
553 | 527 | ||
554 | ret = bgpio_setup_io(bgc, dat, set, clr, flags); | 528 | ret = bgpio_setup_io(gc, dat, set, clr, flags); |
555 | if (ret) | 529 | if (ret) |
556 | return ret; | 530 | return ret; |
557 | 531 | ||
558 | ret = bgpio_setup_accessors(dev, bgc, flags & BGPIOF_BIG_ENDIAN, | 532 | ret = bgpio_setup_accessors(dev, gc, flags & BGPIOF_BIG_ENDIAN, |
559 | flags & BGPIOF_BIG_ENDIAN_BYTE_ORDER); | 533 | flags & BGPIOF_BIG_ENDIAN_BYTE_ORDER); |
560 | if (ret) | 534 | if (ret) |
561 | return ret; | 535 | return ret; |
562 | 536 | ||
563 | ret = bgpio_setup_direction(bgc, dirout, dirin, flags); | 537 | ret = bgpio_setup_direction(gc, dirout, dirin, flags); |
564 | if (ret) | 538 | if (ret) |
565 | return ret; | 539 | return ret; |
566 | 540 | ||
567 | bgc->data = bgc->read_reg(bgc->reg_dat); | 541 | gc->bgpio_data = gc->read_reg(gc->reg_dat); |
568 | if (bgc->gc.set == bgpio_set_set && | 542 | if (gc->set == bgpio_set_set && |
569 | !(flags & BGPIOF_UNREADABLE_REG_SET)) | 543 | !(flags & BGPIOF_UNREADABLE_REG_SET)) |
570 | bgc->data = bgc->read_reg(bgc->reg_set); | 544 | gc->bgpio_data = gc->read_reg(gc->reg_set); |
571 | if (bgc->reg_dir && !(flags & BGPIOF_UNREADABLE_REG_DIR)) | 545 | if (gc->reg_dir && !(flags & BGPIOF_UNREADABLE_REG_DIR)) |
572 | bgc->dir = bgc->read_reg(bgc->reg_dir); | 546 | gc->bgpio_dir = gc->read_reg(gc->reg_dir); |
573 | 547 | ||
574 | return ret; | 548 | return ret; |
575 | } | 549 | } |
@@ -607,7 +581,7 @@ static int bgpio_pdev_probe(struct platform_device *pdev) | |||
607 | unsigned long sz; | 581 | unsigned long sz; |
608 | unsigned long flags = pdev->id_entry->driver_data; | 582 | unsigned long flags = pdev->id_entry->driver_data; |
609 | int err; | 583 | int err; |
610 | struct bgpio_chip *bgc; | 584 | struct gpio_chip *gc; |
611 | struct bgpio_pdata *pdata = dev_get_platdata(dev); | 585 | struct bgpio_pdata *pdata = dev_get_platdata(dev); |
612 | 586 | ||
613 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); | 587 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); |
@@ -636,32 +610,33 @@ static int bgpio_pdev_probe(struct platform_device *pdev) | |||
636 | if (IS_ERR(dirin)) | 610 | if (IS_ERR(dirin)) |
637 | return PTR_ERR(dirin); | 611 | return PTR_ERR(dirin); |
638 | 612 | ||
639 | bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL); | 613 | gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); |
640 | if (!bgc) | 614 | if (!gc) |
641 | return -ENOMEM; | 615 | return -ENOMEM; |
642 | 616 | ||
643 | err = bgpio_init(bgc, dev, sz, dat, set, clr, dirout, dirin, flags); | 617 | err = bgpio_init(gc, dev, sz, dat, set, clr, dirout, dirin, flags); |
644 | if (err) | 618 | if (err) |
645 | return err; | 619 | return err; |
646 | 620 | ||
647 | if (pdata) { | 621 | if (pdata) { |
648 | if (pdata->label) | 622 | if (pdata->label) |
649 | bgc->gc.label = pdata->label; | 623 | gc->label = pdata->label; |
650 | bgc->gc.base = pdata->base; | 624 | gc->base = pdata->base; |
651 | if (pdata->ngpio > 0) | 625 | if (pdata->ngpio > 0) |
652 | bgc->gc.ngpio = pdata->ngpio; | 626 | gc->ngpio = pdata->ngpio; |
653 | } | 627 | } |
654 | 628 | ||
655 | platform_set_drvdata(pdev, bgc); | 629 | platform_set_drvdata(pdev, gc); |
656 | 630 | ||
657 | return gpiochip_add(&bgc->gc); | 631 | return gpiochip_add_data(gc, NULL); |
658 | } | 632 | } |
659 | 633 | ||
660 | static int bgpio_pdev_remove(struct platform_device *pdev) | 634 | static int bgpio_pdev_remove(struct platform_device *pdev) |
661 | { | 635 | { |
662 | struct bgpio_chip *bgc = platform_get_drvdata(pdev); | 636 | struct gpio_chip *gc = platform_get_drvdata(pdev); |
663 | 637 | ||
664 | return bgpio_remove(bgc); | 638 | gpiochip_remove(gc); |
639 | return 0; | ||
665 | } | 640 | } |
666 | 641 | ||
667 | static const struct platform_device_id bgpio_id_table[] = { | 642 | static const struct platform_device_id bgpio_id_table[] = { |
diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c index 801423fe8143..7847dd34f86f 100644 --- a/drivers/gpio/gpio-grgpio.c +++ b/drivers/gpio/gpio-grgpio.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
32 | #include <linux/slab.h> | 32 | #include <linux/slab.h> |
33 | #include <linux/err.h> | 33 | #include <linux/err.h> |
34 | #include <linux/basic_mmio_gpio.h> | 34 | #include <linux/gpio/driver.h> |
35 | #include <linux/interrupt.h> | 35 | #include <linux/interrupt.h> |
36 | #include <linux/irq.h> | 36 | #include <linux/irq.h> |
37 | #include <linux/irqdomain.h> | 37 | #include <linux/irqdomain.h> |
@@ -63,7 +63,7 @@ struct grgpio_lirq { | |||
63 | }; | 63 | }; |
64 | 64 | ||
65 | struct grgpio_priv { | 65 | struct grgpio_priv { |
66 | struct bgpio_chip bgc; | 66 | struct gpio_chip gc; |
67 | void __iomem *regs; | 67 | void __iomem *regs; |
68 | struct device *dev; | 68 | struct device *dev; |
69 | 69 | ||
@@ -92,29 +92,22 @@ struct grgpio_priv { | |||
92 | struct grgpio_lirq lirqs[GRGPIO_MAX_NGPIO]; | 92 | struct grgpio_lirq lirqs[GRGPIO_MAX_NGPIO]; |
93 | }; | 93 | }; |
94 | 94 | ||
95 | static inline struct grgpio_priv *grgpio_gc_to_priv(struct gpio_chip *gc) | ||
96 | { | ||
97 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
98 | |||
99 | return container_of(bgc, struct grgpio_priv, bgc); | ||
100 | } | ||
101 | |||
102 | static void grgpio_set_imask(struct grgpio_priv *priv, unsigned int offset, | 95 | static void grgpio_set_imask(struct grgpio_priv *priv, unsigned int offset, |
103 | int val) | 96 | int val) |
104 | { | 97 | { |
105 | struct bgpio_chip *bgc = &priv->bgc; | 98 | struct gpio_chip *gc = &priv->gc; |
106 | unsigned long mask = bgc->pin2mask(bgc, offset); | 99 | unsigned long mask = gc->pin2mask(gc, offset); |
107 | 100 | ||
108 | if (val) | 101 | if (val) |
109 | priv->imask |= mask; | 102 | priv->imask |= mask; |
110 | else | 103 | else |
111 | priv->imask &= ~mask; | 104 | priv->imask &= ~mask; |
112 | bgc->write_reg(priv->regs + GRGPIO_IMASK, priv->imask); | 105 | gc->write_reg(priv->regs + GRGPIO_IMASK, priv->imask); |
113 | } | 106 | } |
114 | 107 | ||
115 | static int grgpio_to_irq(struct gpio_chip *gc, unsigned offset) | 108 | static int grgpio_to_irq(struct gpio_chip *gc, unsigned offset) |
116 | { | 109 | { |
117 | struct grgpio_priv *priv = grgpio_gc_to_priv(gc); | 110 | struct grgpio_priv *priv = gpiochip_get_data(gc); |
118 | 111 | ||
119 | if (offset >= gc->ngpio) | 112 | if (offset >= gc->ngpio) |
120 | return -ENXIO; | 113 | return -ENXIO; |
@@ -158,15 +151,15 @@ static int grgpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
158 | return -EINVAL; | 151 | return -EINVAL; |
159 | } | 152 | } |
160 | 153 | ||
161 | spin_lock_irqsave(&priv->bgc.lock, flags); | 154 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
162 | 155 | ||
163 | ipol = priv->bgc.read_reg(priv->regs + GRGPIO_IPOL) & ~mask; | 156 | ipol = priv->gc.read_reg(priv->regs + GRGPIO_IPOL) & ~mask; |
164 | iedge = priv->bgc.read_reg(priv->regs + GRGPIO_IEDGE) & ~mask; | 157 | iedge = priv->gc.read_reg(priv->regs + GRGPIO_IEDGE) & ~mask; |
165 | 158 | ||
166 | priv->bgc.write_reg(priv->regs + GRGPIO_IPOL, ipol | pol); | 159 | priv->gc.write_reg(priv->regs + GRGPIO_IPOL, ipol | pol); |
167 | priv->bgc.write_reg(priv->regs + GRGPIO_IEDGE, iedge | edge); | 160 | priv->gc.write_reg(priv->regs + GRGPIO_IEDGE, iedge | edge); |
168 | 161 | ||
169 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 162 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
170 | 163 | ||
171 | return 0; | 164 | return 0; |
172 | } | 165 | } |
@@ -177,11 +170,11 @@ static void grgpio_irq_mask(struct irq_data *d) | |||
177 | int offset = d->hwirq; | 170 | int offset = d->hwirq; |
178 | unsigned long flags; | 171 | unsigned long flags; |
179 | 172 | ||
180 | spin_lock_irqsave(&priv->bgc.lock, flags); | 173 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
181 | 174 | ||
182 | grgpio_set_imask(priv, offset, 0); | 175 | grgpio_set_imask(priv, offset, 0); |
183 | 176 | ||
184 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 177 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
185 | } | 178 | } |
186 | 179 | ||
187 | static void grgpio_irq_unmask(struct irq_data *d) | 180 | static void grgpio_irq_unmask(struct irq_data *d) |
@@ -190,11 +183,11 @@ static void grgpio_irq_unmask(struct irq_data *d) | |||
190 | int offset = d->hwirq; | 183 | int offset = d->hwirq; |
191 | unsigned long flags; | 184 | unsigned long flags; |
192 | 185 | ||
193 | spin_lock_irqsave(&priv->bgc.lock, flags); | 186 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
194 | 187 | ||
195 | grgpio_set_imask(priv, offset, 1); | 188 | grgpio_set_imask(priv, offset, 1); |
196 | 189 | ||
197 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 190 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
198 | } | 191 | } |
199 | 192 | ||
200 | static struct irq_chip grgpio_irq_chip = { | 193 | static struct irq_chip grgpio_irq_chip = { |
@@ -207,12 +200,12 @@ static struct irq_chip grgpio_irq_chip = { | |||
207 | static irqreturn_t grgpio_irq_handler(int irq, void *dev) | 200 | static irqreturn_t grgpio_irq_handler(int irq, void *dev) |
208 | { | 201 | { |
209 | struct grgpio_priv *priv = dev; | 202 | struct grgpio_priv *priv = dev; |
210 | int ngpio = priv->bgc.gc.ngpio; | 203 | int ngpio = priv->gc.ngpio; |
211 | unsigned long flags; | 204 | unsigned long flags; |
212 | int i; | 205 | int i; |
213 | int match = 0; | 206 | int match = 0; |
214 | 207 | ||
215 | spin_lock_irqsave(&priv->bgc.lock, flags); | 208 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
216 | 209 | ||
217 | /* | 210 | /* |
218 | * For each gpio line, call its interrupt handler if it its underlying | 211 | * For each gpio line, call its interrupt handler if it its underlying |
@@ -228,7 +221,7 @@ static irqreturn_t grgpio_irq_handler(int irq, void *dev) | |||
228 | } | 221 | } |
229 | } | 222 | } |
230 | 223 | ||
231 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 224 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
232 | 225 | ||
233 | if (!match) | 226 | if (!match) |
234 | dev_warn(priv->dev, "No gpio line matched irq %d\n", irq); | 227 | dev_warn(priv->dev, "No gpio line matched irq %d\n", irq); |
@@ -260,7 +253,7 @@ static int grgpio_irq_map(struct irq_domain *d, unsigned int irq, | |||
260 | dev_dbg(priv->dev, "Mapping irq %d for gpio line %d\n", | 253 | dev_dbg(priv->dev, "Mapping irq %d for gpio line %d\n", |
261 | irq, offset); | 254 | irq, offset); |
262 | 255 | ||
263 | spin_lock_irqsave(&priv->bgc.lock, flags); | 256 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
264 | 257 | ||
265 | /* Request underlying irq if not already requested */ | 258 | /* Request underlying irq if not already requested */ |
266 | lirq->irq = irq; | 259 | lirq->irq = irq; |
@@ -273,14 +266,14 @@ static int grgpio_irq_map(struct irq_domain *d, unsigned int irq, | |||
273 | "Could not request underlying irq %d\n", | 266 | "Could not request underlying irq %d\n", |
274 | uirq->uirq); | 267 | uirq->uirq); |
275 | 268 | ||
276 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 269 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
277 | 270 | ||
278 | return ret; | 271 | return ret; |
279 | } | 272 | } |
280 | } | 273 | } |
281 | uirq->refcnt++; | 274 | uirq->refcnt++; |
282 | 275 | ||
283 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 276 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
284 | 277 | ||
285 | /* Setup irq */ | 278 | /* Setup irq */ |
286 | irq_set_chip_data(irq, priv); | 279 | irq_set_chip_data(irq, priv); |
@@ -298,13 +291,13 @@ static void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq) | |||
298 | struct grgpio_lirq *lirq; | 291 | struct grgpio_lirq *lirq; |
299 | struct grgpio_uirq *uirq; | 292 | struct grgpio_uirq *uirq; |
300 | unsigned long flags; | 293 | unsigned long flags; |
301 | int ngpio = priv->bgc.gc.ngpio; | 294 | int ngpio = priv->gc.ngpio; |
302 | int i; | 295 | int i; |
303 | 296 | ||
304 | irq_set_chip_and_handler(irq, NULL, NULL); | 297 | irq_set_chip_and_handler(irq, NULL, NULL); |
305 | irq_set_chip_data(irq, NULL); | 298 | irq_set_chip_data(irq, NULL); |
306 | 299 | ||
307 | spin_lock_irqsave(&priv->bgc.lock, flags); | 300 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
308 | 301 | ||
309 | /* Free underlying irq if last user unmapped */ | 302 | /* Free underlying irq if last user unmapped */ |
310 | index = -1; | 303 | index = -1; |
@@ -326,7 +319,7 @@ static void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq) | |||
326 | free_irq(uirq->uirq, priv); | 319 | free_irq(uirq->uirq, priv); |
327 | } | 320 | } |
328 | 321 | ||
329 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 322 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
330 | } | 323 | } |
331 | 324 | ||
332 | static const struct irq_domain_ops grgpio_irq_domain_ops = { | 325 | static const struct irq_domain_ops grgpio_irq_domain_ops = { |
@@ -341,7 +334,6 @@ static int grgpio_probe(struct platform_device *ofdev) | |||
341 | struct device_node *np = ofdev->dev.of_node; | 334 | struct device_node *np = ofdev->dev.of_node; |
342 | void __iomem *regs; | 335 | void __iomem *regs; |
343 | struct gpio_chip *gc; | 336 | struct gpio_chip *gc; |
344 | struct bgpio_chip *bgc; | ||
345 | struct grgpio_priv *priv; | 337 | struct grgpio_priv *priv; |
346 | struct resource *res; | 338 | struct resource *res; |
347 | int err; | 339 | int err; |
@@ -359,8 +351,8 @@ static int grgpio_probe(struct platform_device *ofdev) | |||
359 | if (IS_ERR(regs)) | 351 | if (IS_ERR(regs)) |
360 | return PTR_ERR(regs); | 352 | return PTR_ERR(regs); |
361 | 353 | ||
362 | bgc = &priv->bgc; | 354 | gc = &priv->gc; |
363 | err = bgpio_init(bgc, &ofdev->dev, 4, regs + GRGPIO_DATA, | 355 | err = bgpio_init(gc, &ofdev->dev, 4, regs + GRGPIO_DATA, |
364 | regs + GRGPIO_OUTPUT, NULL, regs + GRGPIO_DIR, NULL, | 356 | regs + GRGPIO_OUTPUT, NULL, regs + GRGPIO_DIR, NULL, |
365 | BGPIOF_BIG_ENDIAN_BYTE_ORDER); | 357 | BGPIOF_BIG_ENDIAN_BYTE_ORDER); |
366 | if (err) { | 358 | if (err) { |
@@ -369,10 +361,9 @@ static int grgpio_probe(struct platform_device *ofdev) | |||
369 | } | 361 | } |
370 | 362 | ||
371 | priv->regs = regs; | 363 | priv->regs = regs; |
372 | priv->imask = bgc->read_reg(regs + GRGPIO_IMASK); | 364 | priv->imask = gc->read_reg(regs + GRGPIO_IMASK); |
373 | priv->dev = &ofdev->dev; | 365 | priv->dev = &ofdev->dev; |
374 | 366 | ||
375 | gc = &bgc->gc; | ||
376 | gc->of_node = np; | 367 | gc->of_node = np; |
377 | gc->owner = THIS_MODULE; | 368 | gc->owner = THIS_MODULE; |
378 | gc->to_irq = grgpio_to_irq; | 369 | gc->to_irq = grgpio_to_irq; |
@@ -435,7 +426,7 @@ static int grgpio_probe(struct platform_device *ofdev) | |||
435 | 426 | ||
436 | platform_set_drvdata(ofdev, priv); | 427 | platform_set_drvdata(ofdev, priv); |
437 | 428 | ||
438 | err = gpiochip_add(gc); | 429 | err = gpiochip_add_data(gc, priv); |
439 | if (err) { | 430 | if (err) { |
440 | dev_err(&ofdev->dev, "Could not add gpiochip\n"); | 431 | dev_err(&ofdev->dev, "Could not add gpiochip\n"); |
441 | if (priv->domain) | 432 | if (priv->domain) |
@@ -456,7 +447,7 @@ static int grgpio_remove(struct platform_device *ofdev) | |||
456 | int i; | 447 | int i; |
457 | int ret = 0; | 448 | int ret = 0; |
458 | 449 | ||
459 | spin_lock_irqsave(&priv->bgc.lock, flags); | 450 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
460 | 451 | ||
461 | if (priv->domain) { | 452 | if (priv->domain) { |
462 | for (i = 0; i < GRGPIO_MAX_NGPIO; i++) { | 453 | for (i = 0; i < GRGPIO_MAX_NGPIO; i++) { |
@@ -467,13 +458,13 @@ static int grgpio_remove(struct platform_device *ofdev) | |||
467 | } | 458 | } |
468 | } | 459 | } |
469 | 460 | ||
470 | gpiochip_remove(&priv->bgc.gc); | 461 | gpiochip_remove(&priv->gc); |
471 | 462 | ||
472 | if (priv->domain) | 463 | if (priv->domain) |
473 | irq_domain_remove(priv->domain); | 464 | irq_domain_remove(priv->domain); |
474 | 465 | ||
475 | out: | 466 | out: |
476 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 467 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
477 | 468 | ||
478 | return ret; | 469 | return ret; |
479 | } | 470 | } |
diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index 4ba7ed502131..a4893386abbf 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c | |||
@@ -282,7 +282,7 @@ static void ichx_gpiolib_setup(struct gpio_chip *chip) | |||
282 | { | 282 | { |
283 | chip->owner = THIS_MODULE; | 283 | chip->owner = THIS_MODULE; |
284 | chip->label = DRV_NAME; | 284 | chip->label = DRV_NAME; |
285 | chip->dev = &ichx_priv.dev->dev; | 285 | chip->parent = &ichx_priv.dev->dev; |
286 | 286 | ||
287 | /* Allow chip-specific overrides of request()/get() */ | 287 | /* Allow chip-specific overrides of request()/get() */ |
288 | chip->request = ichx_priv.desc->request ? | 288 | chip->request = ichx_priv.desc->request ? |
@@ -499,7 +499,7 @@ static int ichx_gpio_probe(struct platform_device *pdev) | |||
499 | 499 | ||
500 | init: | 500 | init: |
501 | ichx_gpiolib_setup(&ichx_priv.chip); | 501 | ichx_gpiolib_setup(&ichx_priv.chip); |
502 | err = gpiochip_add(&ichx_priv.chip); | 502 | err = gpiochip_add_data(&ichx_priv.chip, NULL); |
503 | if (err) { | 503 | if (err) { |
504 | pr_err("Failed to register GPIOs\n"); | 504 | pr_err("Failed to register GPIOs\n"); |
505 | goto add_err; | 505 | goto add_err; |
diff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c index 70097472b02c..cdaba13cb8e8 100644 --- a/drivers/gpio/gpio-intel-mid.c +++ b/drivers/gpio/gpio-intel-mid.c | |||
@@ -78,15 +78,10 @@ struct intel_mid_gpio { | |||
78 | struct pci_dev *pdev; | 78 | struct pci_dev *pdev; |
79 | }; | 79 | }; |
80 | 80 | ||
81 | static inline struct intel_mid_gpio *to_intel_gpio_priv(struct gpio_chip *gc) | ||
82 | { | ||
83 | return container_of(gc, struct intel_mid_gpio, chip); | ||
84 | } | ||
85 | |||
86 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, | 81 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, |
87 | enum GPIO_REG reg_type) | 82 | enum GPIO_REG reg_type) |
88 | { | 83 | { |
89 | struct intel_mid_gpio *priv = to_intel_gpio_priv(chip); | 84 | struct intel_mid_gpio *priv = gpiochip_get_data(chip); |
90 | unsigned nreg = chip->ngpio / 32; | 85 | unsigned nreg = chip->ngpio / 32; |
91 | u8 reg = offset / 32; | 86 | u8 reg = offset / 32; |
92 | 87 | ||
@@ -96,7 +91,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, | |||
96 | static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, | 91 | static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, |
97 | enum GPIO_REG reg_type) | 92 | enum GPIO_REG reg_type) |
98 | { | 93 | { |
99 | struct intel_mid_gpio *priv = to_intel_gpio_priv(chip); | 94 | struct intel_mid_gpio *priv = gpiochip_get_data(chip); |
100 | unsigned nreg = chip->ngpio / 32; | 95 | unsigned nreg = chip->ngpio / 32; |
101 | u8 reg = offset / 16; | 96 | u8 reg = offset / 16; |
102 | 97 | ||
@@ -120,7 +115,7 @@ static int intel_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
120 | { | 115 | { |
121 | void __iomem *gplr = gpio_reg(chip, offset, GPLR); | 116 | void __iomem *gplr = gpio_reg(chip, offset, GPLR); |
122 | 117 | ||
123 | return readl(gplr) & BIT(offset % 32); | 118 | return !!(readl(gplr) & BIT(offset % 32)); |
124 | } | 119 | } |
125 | 120 | ||
126 | static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 121 | static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
@@ -138,7 +133,7 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
138 | 133 | ||
139 | static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 134 | static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
140 | { | 135 | { |
141 | struct intel_mid_gpio *priv = to_intel_gpio_priv(chip); | 136 | struct intel_mid_gpio *priv = gpiochip_get_data(chip); |
142 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); | 137 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); |
143 | u32 value; | 138 | u32 value; |
144 | unsigned long flags; | 139 | unsigned long flags; |
@@ -161,7 +156,7 @@ static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
161 | static int intel_gpio_direction_output(struct gpio_chip *chip, | 156 | static int intel_gpio_direction_output(struct gpio_chip *chip, |
162 | unsigned offset, int value) | 157 | unsigned offset, int value) |
163 | { | 158 | { |
164 | struct intel_mid_gpio *priv = to_intel_gpio_priv(chip); | 159 | struct intel_mid_gpio *priv = gpiochip_get_data(chip); |
165 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); | 160 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); |
166 | unsigned long flags; | 161 | unsigned long flags; |
167 | 162 | ||
@@ -185,7 +180,7 @@ static int intel_gpio_direction_output(struct gpio_chip *chip, | |||
185 | static int intel_mid_irq_type(struct irq_data *d, unsigned type) | 180 | static int intel_mid_irq_type(struct irq_data *d, unsigned type) |
186 | { | 181 | { |
187 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 182 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
188 | struct intel_mid_gpio *priv = to_intel_gpio_priv(gc); | 183 | struct intel_mid_gpio *priv = gpiochip_get_data(gc); |
189 | u32 gpio = irqd_to_hwirq(d); | 184 | u32 gpio = irqd_to_hwirq(d); |
190 | unsigned long flags; | 185 | unsigned long flags; |
191 | u32 value; | 186 | u32 value; |
@@ -304,7 +299,7 @@ MODULE_DEVICE_TABLE(pci, intel_gpio_ids); | |||
304 | static void intel_mid_irq_handler(struct irq_desc *desc) | 299 | static void intel_mid_irq_handler(struct irq_desc *desc) |
305 | { | 300 | { |
306 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 301 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
307 | struct intel_mid_gpio *priv = to_intel_gpio_priv(gc); | 302 | struct intel_mid_gpio *priv = gpiochip_get_data(gc); |
308 | struct irq_data *data = irq_desc_get_irq_data(desc); | 303 | struct irq_data *data = irq_desc_get_irq_data(desc); |
309 | struct irq_chip *chip = irq_data_get_irq_chip(data); | 304 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
310 | u32 base, gpio, mask; | 305 | u32 base, gpio, mask; |
@@ -392,7 +387,7 @@ static int intel_gpio_probe(struct pci_dev *pdev, | |||
392 | 387 | ||
393 | priv->reg_base = pcim_iomap_table(pdev)[0]; | 388 | priv->reg_base = pcim_iomap_table(pdev)[0]; |
394 | priv->chip.label = dev_name(&pdev->dev); | 389 | priv->chip.label = dev_name(&pdev->dev); |
395 | priv->chip.dev = &pdev->dev; | 390 | priv->chip.parent = &pdev->dev; |
396 | priv->chip.request = intel_gpio_request; | 391 | priv->chip.request = intel_gpio_request; |
397 | priv->chip.direction_input = intel_gpio_direction_input; | 392 | priv->chip.direction_input = intel_gpio_direction_input; |
398 | priv->chip.direction_output = intel_gpio_direction_output; | 393 | priv->chip.direction_output = intel_gpio_direction_output; |
@@ -406,7 +401,7 @@ static int intel_gpio_probe(struct pci_dev *pdev, | |||
406 | spin_lock_init(&priv->lock); | 401 | spin_lock_init(&priv->lock); |
407 | 402 | ||
408 | pci_set_drvdata(pdev, priv); | 403 | pci_set_drvdata(pdev, priv); |
409 | retval = gpiochip_add(&priv->chip); | 404 | retval = gpiochip_add_data(&priv->chip, priv); |
410 | if (retval) { | 405 | if (retval) { |
411 | dev_err(&pdev->dev, "gpiochip_add error %d\n", retval); | 406 | dev_err(&pdev->dev, "gpiochip_add error %d\n", retval); |
412 | return retval; | 407 | return retval; |
diff --git a/drivers/gpio/gpio-iop.c b/drivers/gpio/gpio-iop.c index 2ed0237a8baf..fb65e5850e0c 100644 --- a/drivers/gpio/gpio-iop.c +++ b/drivers/gpio/gpio-iop.c | |||
@@ -114,7 +114,7 @@ static int iop3xx_gpio_probe(struct platform_device *pdev) | |||
114 | if (IS_ERR(base)) | 114 | if (IS_ERR(base)) |
115 | return PTR_ERR(base); | 115 | return PTR_ERR(base); |
116 | 116 | ||
117 | return gpiochip_add(&iop3xx_chip); | 117 | return gpiochip_add_data(&iop3xx_chip, NULL); |
118 | } | 118 | } |
119 | 119 | ||
120 | static struct platform_driver iop3xx_gpio_driver = { | 120 | static struct platform_driver iop3xx_gpio_driver = { |
diff --git a/drivers/gpio/gpio-it87.c b/drivers/gpio/gpio-it87.c index 21f6f7c0eb34..b219c82414bf 100644 --- a/drivers/gpio/gpio-it87.c +++ b/drivers/gpio/gpio-it87.c | |||
@@ -77,11 +77,6 @@ static struct it87_gpio it87_gpio_chip = { | |||
77 | .lock = __SPIN_LOCK_UNLOCKED(it87_gpio_chip.lock), | 77 | .lock = __SPIN_LOCK_UNLOCKED(it87_gpio_chip.lock), |
78 | }; | 78 | }; |
79 | 79 | ||
80 | static inline struct it87_gpio *to_it87_gpio(struct gpio_chip *chip) | ||
81 | { | ||
82 | return container_of(chip, struct it87_gpio, chip); | ||
83 | } | ||
84 | |||
85 | /* Superio chip access functions; copied from wdt_it87 */ | 80 | /* Superio chip access functions; copied from wdt_it87 */ |
86 | 81 | ||
87 | static inline int superio_enter(void) | 82 | static inline int superio_enter(void) |
@@ -165,7 +160,7 @@ static int it87_gpio_request(struct gpio_chip *chip, unsigned gpio_num) | |||
165 | { | 160 | { |
166 | u8 mask, group; | 161 | u8 mask, group; |
167 | int rc = 0; | 162 | int rc = 0; |
168 | struct it87_gpio *it87_gpio = to_it87_gpio(chip); | 163 | struct it87_gpio *it87_gpio = gpiochip_get_data(chip); |
169 | 164 | ||
170 | mask = 1 << (gpio_num % 8); | 165 | mask = 1 << (gpio_num % 8); |
171 | group = (gpio_num / 8); | 166 | group = (gpio_num / 8); |
@@ -198,7 +193,7 @@ static int it87_gpio_get(struct gpio_chip *chip, unsigned gpio_num) | |||
198 | { | 193 | { |
199 | u16 reg; | 194 | u16 reg; |
200 | u8 mask; | 195 | u8 mask; |
201 | struct it87_gpio *it87_gpio = to_it87_gpio(chip); | 196 | struct it87_gpio *it87_gpio = gpiochip_get_data(chip); |
202 | 197 | ||
203 | mask = 1 << (gpio_num % 8); | 198 | mask = 1 << (gpio_num % 8); |
204 | reg = (gpio_num / 8) + it87_gpio->io_base; | 199 | reg = (gpio_num / 8) + it87_gpio->io_base; |
@@ -210,7 +205,7 @@ static int it87_gpio_direction_in(struct gpio_chip *chip, unsigned gpio_num) | |||
210 | { | 205 | { |
211 | u8 mask, group; | 206 | u8 mask, group; |
212 | int rc = 0; | 207 | int rc = 0; |
213 | struct it87_gpio *it87_gpio = to_it87_gpio(chip); | 208 | struct it87_gpio *it87_gpio = gpiochip_get_data(chip); |
214 | 209 | ||
215 | mask = 1 << (gpio_num % 8); | 210 | mask = 1 << (gpio_num % 8); |
216 | group = (gpio_num / 8); | 211 | group = (gpio_num / 8); |
@@ -236,7 +231,7 @@ static void it87_gpio_set(struct gpio_chip *chip, | |||
236 | { | 231 | { |
237 | u8 mask, curr_vals; | 232 | u8 mask, curr_vals; |
238 | u16 reg; | 233 | u16 reg; |
239 | struct it87_gpio *it87_gpio = to_it87_gpio(chip); | 234 | struct it87_gpio *it87_gpio = gpiochip_get_data(chip); |
240 | 235 | ||
241 | mask = 1 << (gpio_num % 8); | 236 | mask = 1 << (gpio_num % 8); |
242 | reg = (gpio_num / 8) + it87_gpio->io_base; | 237 | reg = (gpio_num / 8) + it87_gpio->io_base; |
@@ -253,7 +248,7 @@ static int it87_gpio_direction_out(struct gpio_chip *chip, | |||
253 | { | 248 | { |
254 | u8 mask, group; | 249 | u8 mask, group; |
255 | int rc = 0; | 250 | int rc = 0; |
256 | struct it87_gpio *it87_gpio = to_it87_gpio(chip); | 251 | struct it87_gpio *it87_gpio = gpiochip_get_data(chip); |
257 | 252 | ||
258 | mask = 1 << (gpio_num % 8); | 253 | mask = 1 << (gpio_num % 8); |
259 | group = (gpio_num / 8); | 254 | group = (gpio_num / 8); |
@@ -380,7 +375,7 @@ static int __init it87_gpio_init(void) | |||
380 | 375 | ||
381 | it87_gpio->chip.names = (const char *const*)labels_table; | 376 | it87_gpio->chip.names = (const char *const*)labels_table; |
382 | 377 | ||
383 | rc = gpiochip_add(&it87_gpio->chip); | 378 | rc = gpiochip_add_data(&it87_gpio->chip, it87_gpio); |
384 | if (rc) | 379 | if (rc) |
385 | goto labels_free; | 380 | goto labels_free; |
386 | 381 | ||
diff --git a/drivers/gpio/gpio-janz-ttl.c b/drivers/gpio/gpio-janz-ttl.c index 3a1664335f5e..482aa0353868 100644 --- a/drivers/gpio/gpio-janz-ttl.c +++ b/drivers/gpio/gpio-janz-ttl.c | |||
@@ -59,7 +59,7 @@ struct ttl_module { | |||
59 | 59 | ||
60 | static int ttl_get_value(struct gpio_chip *gpio, unsigned offset) | 60 | static int ttl_get_value(struct gpio_chip *gpio, unsigned offset) |
61 | { | 61 | { |
62 | struct ttl_module *mod = dev_get_drvdata(gpio->dev); | 62 | struct ttl_module *mod = dev_get_drvdata(gpio->parent); |
63 | u8 *shadow; | 63 | u8 *shadow; |
64 | int ret; | 64 | int ret; |
65 | 65 | ||
@@ -76,12 +76,12 @@ static int ttl_get_value(struct gpio_chip *gpio, unsigned offset) | |||
76 | spin_lock(&mod->lock); | 76 | spin_lock(&mod->lock); |
77 | ret = *shadow & (1 << offset); | 77 | ret = *shadow & (1 << offset); |
78 | spin_unlock(&mod->lock); | 78 | spin_unlock(&mod->lock); |
79 | return ret; | 79 | return !!ret; |
80 | } | 80 | } |
81 | 81 | ||
82 | static void ttl_set_value(struct gpio_chip *gpio, unsigned offset, int value) | 82 | static void ttl_set_value(struct gpio_chip *gpio, unsigned offset, int value) |
83 | { | 83 | { |
84 | struct ttl_module *mod = dev_get_drvdata(gpio->dev); | 84 | struct ttl_module *mod = dev_get_drvdata(gpio->parent); |
85 | void __iomem *port; | 85 | void __iomem *port; |
86 | u8 *shadow; | 86 | u8 *shadow; |
87 | 87 | ||
@@ -172,7 +172,7 @@ static int ttl_probe(struct platform_device *pdev) | |||
172 | 172 | ||
173 | /* Initialize the GPIO data structures */ | 173 | /* Initialize the GPIO data structures */ |
174 | gpio = &mod->gpio; | 174 | gpio = &mod->gpio; |
175 | gpio->dev = &pdev->dev; | 175 | gpio->parent = &pdev->dev; |
176 | gpio->label = pdev->name; | 176 | gpio->label = pdev->name; |
177 | gpio->get = ttl_get_value; | 177 | gpio->get = ttl_get_value; |
178 | gpio->set = ttl_set_value; | 178 | gpio->set = ttl_set_value; |
@@ -182,7 +182,7 @@ static int ttl_probe(struct platform_device *pdev) | |||
182 | gpio->base = -1; | 182 | gpio->base = -1; |
183 | gpio->ngpio = 20; | 183 | gpio->ngpio = 20; |
184 | 184 | ||
185 | ret = gpiochip_add(gpio); | 185 | ret = gpiochip_add_data(gpio, NULL); |
186 | if (ret) { | 186 | if (ret) { |
187 | dev_err(dev, "unable to add GPIO chip\n"); | 187 | dev_err(dev, "unable to add GPIO chip\n"); |
188 | return ret; | 188 | return ret; |
diff --git a/drivers/gpio/gpio-kempld.c b/drivers/gpio/gpio-kempld.c index 83f281dda1e0..01117747b965 100644 --- a/drivers/gpio/gpio-kempld.c +++ b/drivers/gpio/gpio-kempld.c | |||
@@ -65,17 +65,15 @@ static int kempld_gpio_get_bit(struct kempld_device_data *pld, u8 reg, u8 bit) | |||
65 | 65 | ||
66 | static int kempld_gpio_get(struct gpio_chip *chip, unsigned offset) | 66 | static int kempld_gpio_get(struct gpio_chip *chip, unsigned offset) |
67 | { | 67 | { |
68 | struct kempld_gpio_data *gpio | 68 | struct kempld_gpio_data *gpio = gpiochip_get_data(chip); |
69 | = container_of(chip, struct kempld_gpio_data, chip); | ||
70 | struct kempld_device_data *pld = gpio->pld; | 69 | struct kempld_device_data *pld = gpio->pld; |
71 | 70 | ||
72 | return kempld_gpio_get_bit(pld, KEMPLD_GPIO_LVL_NUM(offset), offset); | 71 | return !!kempld_gpio_get_bit(pld, KEMPLD_GPIO_LVL_NUM(offset), offset); |
73 | } | 72 | } |
74 | 73 | ||
75 | static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 74 | static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
76 | { | 75 | { |
77 | struct kempld_gpio_data *gpio | 76 | struct kempld_gpio_data *gpio = gpiochip_get_data(chip); |
78 | = container_of(chip, struct kempld_gpio_data, chip); | ||
79 | struct kempld_device_data *pld = gpio->pld; | 77 | struct kempld_device_data *pld = gpio->pld; |
80 | 78 | ||
81 | kempld_get_mutex(pld); | 79 | kempld_get_mutex(pld); |
@@ -85,8 +83,7 @@ static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
85 | 83 | ||
86 | static int kempld_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 84 | static int kempld_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
87 | { | 85 | { |
88 | struct kempld_gpio_data *gpio | 86 | struct kempld_gpio_data *gpio = gpiochip_get_data(chip); |
89 | = container_of(chip, struct kempld_gpio_data, chip); | ||
90 | struct kempld_device_data *pld = gpio->pld; | 87 | struct kempld_device_data *pld = gpio->pld; |
91 | 88 | ||
92 | kempld_get_mutex(pld); | 89 | kempld_get_mutex(pld); |
@@ -99,8 +96,7 @@ static int kempld_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
99 | static int kempld_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | 96 | static int kempld_gpio_direction_output(struct gpio_chip *chip, unsigned offset, |
100 | int value) | 97 | int value) |
101 | { | 98 | { |
102 | struct kempld_gpio_data *gpio | 99 | struct kempld_gpio_data *gpio = gpiochip_get_data(chip); |
103 | = container_of(chip, struct kempld_gpio_data, chip); | ||
104 | struct kempld_device_data *pld = gpio->pld; | 100 | struct kempld_device_data *pld = gpio->pld; |
105 | 101 | ||
106 | kempld_get_mutex(pld); | 102 | kempld_get_mutex(pld); |
@@ -113,8 +109,7 @@ static int kempld_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | |||
113 | 109 | ||
114 | static int kempld_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | 110 | static int kempld_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
115 | { | 111 | { |
116 | struct kempld_gpio_data *gpio | 112 | struct kempld_gpio_data *gpio = gpiochip_get_data(chip); |
117 | = container_of(chip, struct kempld_gpio_data, chip); | ||
118 | struct kempld_device_data *pld = gpio->pld; | 113 | struct kempld_device_data *pld = gpio->pld; |
119 | 114 | ||
120 | return !kempld_gpio_get_bit(pld, KEMPLD_GPIO_DIR_NUM(offset), offset); | 115 | return !kempld_gpio_get_bit(pld, KEMPLD_GPIO_DIR_NUM(offset), offset); |
@@ -166,7 +161,7 @@ static int kempld_gpio_probe(struct platform_device *pdev) | |||
166 | chip = &gpio->chip; | 161 | chip = &gpio->chip; |
167 | chip->label = "gpio-kempld"; | 162 | chip->label = "gpio-kempld"; |
168 | chip->owner = THIS_MODULE; | 163 | chip->owner = THIS_MODULE; |
169 | chip->dev = dev; | 164 | chip->parent = dev; |
170 | chip->can_sleep = true; | 165 | chip->can_sleep = true; |
171 | if (pdata && pdata->gpio_base) | 166 | if (pdata && pdata->gpio_base) |
172 | chip->base = pdata->gpio_base; | 167 | chip->base = pdata->gpio_base; |
@@ -183,7 +178,7 @@ static int kempld_gpio_probe(struct platform_device *pdev) | |||
183 | return -ENODEV; | 178 | return -ENODEV; |
184 | } | 179 | } |
185 | 180 | ||
186 | ret = gpiochip_add(chip); | 181 | ret = gpiochip_add_data(chip, gpio); |
187 | if (ret) { | 182 | if (ret) { |
188 | dev_err(dev, "Could not register GPIO chip\n"); | 183 | dev_err(dev, "Could not register GPIO chip\n"); |
189 | return ret; | 184 | return ret; |
diff --git a/drivers/gpio/gpio-ks8695.c b/drivers/gpio/gpio-ks8695.c index cc09b237e88c..9f86ed9c753b 100644 --- a/drivers/gpio/gpio-ks8695.c +++ b/drivers/gpio/gpio-ks8695.c | |||
@@ -234,7 +234,7 @@ static struct gpio_chip ks8695_gpio_chip = { | |||
234 | /* Register the GPIOs */ | 234 | /* Register the GPIOs */ |
235 | void ks8695_register_gpios(void) | 235 | void ks8695_register_gpios(void) |
236 | { | 236 | { |
237 | if (gpiochip_add(&ks8695_gpio_chip)) | 237 | if (gpiochip_add_data(&ks8695_gpio_chip, NULL)) |
238 | printk(KERN_ERR "Unable to register core GPIOs\n"); | 238 | printk(KERN_ERR "Unable to register core GPIOs\n"); |
239 | } | 239 | } |
240 | 240 | ||
diff --git a/drivers/gpio/gpio-loongson.c b/drivers/gpio/gpio-loongson.c index ccc65a1aea88..92c4fe7b2677 100644 --- a/drivers/gpio/gpio-loongson.c +++ b/drivers/gpio/gpio-loongson.c | |||
@@ -110,6 +110,6 @@ static struct gpio_chip loongson_chip = { | |||
110 | 110 | ||
111 | static int __init loongson_gpio_setup(void) | 111 | static int __init loongson_gpio_setup(void) |
112 | { | 112 | { |
113 | return gpiochip_add(&loongson_chip); | 113 | return gpiochip_add_data(&loongson_chip, NULL); |
114 | } | 114 | } |
115 | postcore_initcall(loongson_gpio_setup); | 115 | postcore_initcall(loongson_gpio_setup); |
diff --git a/drivers/gpio/gpio-lp3943.c b/drivers/gpio/gpio-lp3943.c index cfc5b12b43ad..1c8e2ae26938 100644 --- a/drivers/gpio/gpio-lp3943.c +++ b/drivers/gpio/gpio-lp3943.c | |||
@@ -45,14 +45,9 @@ struct lp3943_gpio { | |||
45 | u16 input_mask; /* 1 = GPIO is input direction, 0 = output */ | 45 | u16 input_mask; /* 1 = GPIO is input direction, 0 = output */ |
46 | }; | 46 | }; |
47 | 47 | ||
48 | static inline struct lp3943_gpio *to_lp3943_gpio(struct gpio_chip *_chip) | ||
49 | { | ||
50 | return container_of(_chip, struct lp3943_gpio, chip); | ||
51 | } | ||
52 | |||
53 | static int lp3943_gpio_request(struct gpio_chip *chip, unsigned offset) | 48 | static int lp3943_gpio_request(struct gpio_chip *chip, unsigned offset) |
54 | { | 49 | { |
55 | struct lp3943_gpio *lp3943_gpio = to_lp3943_gpio(chip); | 50 | struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip); |
56 | struct lp3943 *lp3943 = lp3943_gpio->lp3943; | 51 | struct lp3943 *lp3943 = lp3943_gpio->lp3943; |
57 | 52 | ||
58 | /* Return an error if the pin is already assigned */ | 53 | /* Return an error if the pin is already assigned */ |
@@ -64,7 +59,7 @@ static int lp3943_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
64 | 59 | ||
65 | static void lp3943_gpio_free(struct gpio_chip *chip, unsigned offset) | 60 | static void lp3943_gpio_free(struct gpio_chip *chip, unsigned offset) |
66 | { | 61 | { |
67 | struct lp3943_gpio *lp3943_gpio = to_lp3943_gpio(chip); | 62 | struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip); |
68 | struct lp3943 *lp3943 = lp3943_gpio->lp3943; | 63 | struct lp3943 *lp3943 = lp3943_gpio->lp3943; |
69 | 64 | ||
70 | clear_bit(offset, &lp3943->pin_used); | 65 | clear_bit(offset, &lp3943->pin_used); |
@@ -82,7 +77,7 @@ static int lp3943_gpio_set_mode(struct lp3943_gpio *lp3943_gpio, u8 offset, | |||
82 | 77 | ||
83 | static int lp3943_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 78 | static int lp3943_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
84 | { | 79 | { |
85 | struct lp3943_gpio *lp3943_gpio = to_lp3943_gpio(chip); | 80 | struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip); |
86 | 81 | ||
87 | lp3943_gpio->input_mask |= BIT(offset); | 82 | lp3943_gpio->input_mask |= BIT(offset); |
88 | 83 | ||
@@ -138,7 +133,7 @@ static int lp3943_get_gpio_out_status(struct lp3943_gpio *lp3943_gpio, | |||
138 | 133 | ||
139 | static int lp3943_gpio_get(struct gpio_chip *chip, unsigned offset) | 134 | static int lp3943_gpio_get(struct gpio_chip *chip, unsigned offset) |
140 | { | 135 | { |
141 | struct lp3943_gpio *lp3943_gpio = to_lp3943_gpio(chip); | 136 | struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip); |
142 | 137 | ||
143 | /* | 138 | /* |
144 | * Limitation: | 139 | * Limitation: |
@@ -157,7 +152,7 @@ static int lp3943_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
157 | 152 | ||
158 | static void lp3943_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 153 | static void lp3943_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
159 | { | 154 | { |
160 | struct lp3943_gpio *lp3943_gpio = to_lp3943_gpio(chip); | 155 | struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip); |
161 | u8 data; | 156 | u8 data; |
162 | 157 | ||
163 | if (value) | 158 | if (value) |
@@ -171,7 +166,7 @@ static void lp3943_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
171 | static int lp3943_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | 166 | static int lp3943_gpio_direction_output(struct gpio_chip *chip, unsigned offset, |
172 | int value) | 167 | int value) |
173 | { | 168 | { |
174 | struct lp3943_gpio *lp3943_gpio = to_lp3943_gpio(chip); | 169 | struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip); |
175 | 170 | ||
176 | lp3943_gpio_set(chip, offset, value); | 171 | lp3943_gpio_set(chip, offset, value); |
177 | lp3943_gpio->input_mask &= ~BIT(offset); | 172 | lp3943_gpio->input_mask &= ~BIT(offset); |
@@ -205,11 +200,11 @@ static int lp3943_gpio_probe(struct platform_device *pdev) | |||
205 | 200 | ||
206 | lp3943_gpio->lp3943 = lp3943; | 201 | lp3943_gpio->lp3943 = lp3943; |
207 | lp3943_gpio->chip = lp3943_gpio_chip; | 202 | lp3943_gpio->chip = lp3943_gpio_chip; |
208 | lp3943_gpio->chip.dev = &pdev->dev; | 203 | lp3943_gpio->chip.parent = &pdev->dev; |
209 | 204 | ||
210 | platform_set_drvdata(pdev, lp3943_gpio); | 205 | platform_set_drvdata(pdev, lp3943_gpio); |
211 | 206 | ||
212 | return gpiochip_add(&lp3943_gpio->chip); | 207 | return gpiochip_add_data(&lp3943_gpio->chip, lp3943_gpio); |
213 | } | 208 | } |
214 | 209 | ||
215 | static int lp3943_gpio_remove(struct platform_device *pdev) | 210 | static int lp3943_gpio_remove(struct platform_device *pdev) |
diff --git a/drivers/gpio/gpio-lpc18xx.c b/drivers/gpio/gpio-lpc18xx.c index e39dcb0af8ae..98832c9f614a 100644 --- a/drivers/gpio/gpio-lpc18xx.c +++ b/drivers/gpio/gpio-lpc18xx.c | |||
@@ -31,27 +31,22 @@ struct lpc18xx_gpio_chip { | |||
31 | spinlock_t lock; | 31 | spinlock_t lock; |
32 | }; | 32 | }; |
33 | 33 | ||
34 | static inline struct lpc18xx_gpio_chip *to_lpc18xx_gpio(struct gpio_chip *chip) | ||
35 | { | ||
36 | return container_of(chip, struct lpc18xx_gpio_chip, gpio); | ||
37 | } | ||
38 | |||
39 | static void lpc18xx_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 34 | static void lpc18xx_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
40 | { | 35 | { |
41 | struct lpc18xx_gpio_chip *gc = to_lpc18xx_gpio(chip); | 36 | struct lpc18xx_gpio_chip *gc = gpiochip_get_data(chip); |
42 | writeb(value ? 1 : 0, gc->base + offset); | 37 | writeb(value ? 1 : 0, gc->base + offset); |
43 | } | 38 | } |
44 | 39 | ||
45 | static int lpc18xx_gpio_get(struct gpio_chip *chip, unsigned offset) | 40 | static int lpc18xx_gpio_get(struct gpio_chip *chip, unsigned offset) |
46 | { | 41 | { |
47 | struct lpc18xx_gpio_chip *gc = to_lpc18xx_gpio(chip); | 42 | struct lpc18xx_gpio_chip *gc = gpiochip_get_data(chip); |
48 | return !!readb(gc->base + offset); | 43 | return !!readb(gc->base + offset); |
49 | } | 44 | } |
50 | 45 | ||
51 | static int lpc18xx_gpio_direction(struct gpio_chip *chip, unsigned offset, | 46 | static int lpc18xx_gpio_direction(struct gpio_chip *chip, unsigned offset, |
52 | bool out) | 47 | bool out) |
53 | { | 48 | { |
54 | struct lpc18xx_gpio_chip *gc = to_lpc18xx_gpio(chip); | 49 | struct lpc18xx_gpio_chip *gc = gpiochip_get_data(chip); |
55 | unsigned long flags; | 50 | unsigned long flags; |
56 | u32 port, pin, dir; | 51 | u32 port, pin, dir; |
57 | 52 | ||
@@ -127,9 +122,9 @@ static int lpc18xx_gpio_probe(struct platform_device *pdev) | |||
127 | 122 | ||
128 | spin_lock_init(&gc->lock); | 123 | spin_lock_init(&gc->lock); |
129 | 124 | ||
130 | gc->gpio.dev = &pdev->dev; | 125 | gc->gpio.parent = &pdev->dev; |
131 | 126 | ||
132 | ret = gpiochip_add(&gc->gpio); | 127 | ret = gpiochip_add_data(&gc->gpio, gc); |
133 | if (ret) { | 128 | if (ret) { |
134 | dev_err(&pdev->dev, "failed to add gpio chip\n"); | 129 | dev_err(&pdev->dev, "failed to add gpio chip\n"); |
135 | clk_disable_unprepare(gc->clk); | 130 | clk_disable_unprepare(gc->clk); |
diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c index 47e2dde63734..4cecf4ce96c1 100644 --- a/drivers/gpio/gpio-lpc32xx.c +++ b/drivers/gpio/gpio-lpc32xx.c | |||
@@ -165,12 +165,6 @@ struct lpc32xx_gpio_chip { | |||
165 | struct gpio_regs *gpio_grp; | 165 | struct gpio_regs *gpio_grp; |
166 | }; | 166 | }; |
167 | 167 | ||
168 | static inline struct lpc32xx_gpio_chip *to_lpc32xx_gpio( | ||
169 | struct gpio_chip *gpc) | ||
170 | { | ||
171 | return container_of(gpc, struct lpc32xx_gpio_chip, chip); | ||
172 | } | ||
173 | |||
174 | static void __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group, | 168 | static void __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group, |
175 | unsigned pin, int input) | 169 | unsigned pin, int input) |
176 | { | 170 | { |
@@ -261,7 +255,7 @@ static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group, | |||
261 | static int lpc32xx_gpio_dir_input_p012(struct gpio_chip *chip, | 255 | static int lpc32xx_gpio_dir_input_p012(struct gpio_chip *chip, |
262 | unsigned pin) | 256 | unsigned pin) |
263 | { | 257 | { |
264 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 258 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
265 | 259 | ||
266 | __set_gpio_dir_p012(group, pin, 1); | 260 | __set_gpio_dir_p012(group, pin, 1); |
267 | 261 | ||
@@ -271,7 +265,7 @@ static int lpc32xx_gpio_dir_input_p012(struct gpio_chip *chip, | |||
271 | static int lpc32xx_gpio_dir_input_p3(struct gpio_chip *chip, | 265 | static int lpc32xx_gpio_dir_input_p3(struct gpio_chip *chip, |
272 | unsigned pin) | 266 | unsigned pin) |
273 | { | 267 | { |
274 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 268 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
275 | 269 | ||
276 | __set_gpio_dir_p3(group, pin, 1); | 270 | __set_gpio_dir_p3(group, pin, 1); |
277 | 271 | ||
@@ -286,29 +280,29 @@ static int lpc32xx_gpio_dir_in_always(struct gpio_chip *chip, | |||
286 | 280 | ||
287 | static int lpc32xx_gpio_get_value_p012(struct gpio_chip *chip, unsigned pin) | 281 | static int lpc32xx_gpio_get_value_p012(struct gpio_chip *chip, unsigned pin) |
288 | { | 282 | { |
289 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 283 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
290 | 284 | ||
291 | return __get_gpio_state_p012(group, pin); | 285 | return !!__get_gpio_state_p012(group, pin); |
292 | } | 286 | } |
293 | 287 | ||
294 | static int lpc32xx_gpio_get_value_p3(struct gpio_chip *chip, unsigned pin) | 288 | static int lpc32xx_gpio_get_value_p3(struct gpio_chip *chip, unsigned pin) |
295 | { | 289 | { |
296 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 290 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
297 | 291 | ||
298 | return __get_gpio_state_p3(group, pin); | 292 | return !!__get_gpio_state_p3(group, pin); |
299 | } | 293 | } |
300 | 294 | ||
301 | static int lpc32xx_gpi_get_value(struct gpio_chip *chip, unsigned pin) | 295 | static int lpc32xx_gpi_get_value(struct gpio_chip *chip, unsigned pin) |
302 | { | 296 | { |
303 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 297 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
304 | 298 | ||
305 | return __get_gpi_state_p3(group, pin); | 299 | return !!__get_gpi_state_p3(group, pin); |
306 | } | 300 | } |
307 | 301 | ||
308 | static int lpc32xx_gpio_dir_output_p012(struct gpio_chip *chip, unsigned pin, | 302 | static int lpc32xx_gpio_dir_output_p012(struct gpio_chip *chip, unsigned pin, |
309 | int value) | 303 | int value) |
310 | { | 304 | { |
311 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 305 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
312 | 306 | ||
313 | __set_gpio_level_p012(group, pin, value); | 307 | __set_gpio_level_p012(group, pin, value); |
314 | __set_gpio_dir_p012(group, pin, 0); | 308 | __set_gpio_dir_p012(group, pin, 0); |
@@ -319,7 +313,7 @@ static int lpc32xx_gpio_dir_output_p012(struct gpio_chip *chip, unsigned pin, | |||
319 | static int lpc32xx_gpio_dir_output_p3(struct gpio_chip *chip, unsigned pin, | 313 | static int lpc32xx_gpio_dir_output_p3(struct gpio_chip *chip, unsigned pin, |
320 | int value) | 314 | int value) |
321 | { | 315 | { |
322 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 316 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
323 | 317 | ||
324 | __set_gpio_level_p3(group, pin, value); | 318 | __set_gpio_level_p3(group, pin, value); |
325 | __set_gpio_dir_p3(group, pin, 0); | 319 | __set_gpio_dir_p3(group, pin, 0); |
@@ -330,7 +324,7 @@ static int lpc32xx_gpio_dir_output_p3(struct gpio_chip *chip, unsigned pin, | |||
330 | static int lpc32xx_gpio_dir_out_always(struct gpio_chip *chip, unsigned pin, | 324 | static int lpc32xx_gpio_dir_out_always(struct gpio_chip *chip, unsigned pin, |
331 | int value) | 325 | int value) |
332 | { | 326 | { |
333 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 327 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
334 | 328 | ||
335 | __set_gpo_level_p3(group, pin, value); | 329 | __set_gpo_level_p3(group, pin, value); |
336 | return 0; | 330 | return 0; |
@@ -339,7 +333,7 @@ static int lpc32xx_gpio_dir_out_always(struct gpio_chip *chip, unsigned pin, | |||
339 | static void lpc32xx_gpio_set_value_p012(struct gpio_chip *chip, unsigned pin, | 333 | static void lpc32xx_gpio_set_value_p012(struct gpio_chip *chip, unsigned pin, |
340 | int value) | 334 | int value) |
341 | { | 335 | { |
342 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 336 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
343 | 337 | ||
344 | __set_gpio_level_p012(group, pin, value); | 338 | __set_gpio_level_p012(group, pin, value); |
345 | } | 339 | } |
@@ -347,7 +341,7 @@ static void lpc32xx_gpio_set_value_p012(struct gpio_chip *chip, unsigned pin, | |||
347 | static void lpc32xx_gpio_set_value_p3(struct gpio_chip *chip, unsigned pin, | 341 | static void lpc32xx_gpio_set_value_p3(struct gpio_chip *chip, unsigned pin, |
348 | int value) | 342 | int value) |
349 | { | 343 | { |
350 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 344 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
351 | 345 | ||
352 | __set_gpio_level_p3(group, pin, value); | 346 | __set_gpio_level_p3(group, pin, value); |
353 | } | 347 | } |
@@ -355,16 +349,16 @@ static void lpc32xx_gpio_set_value_p3(struct gpio_chip *chip, unsigned pin, | |||
355 | static void lpc32xx_gpo_set_value(struct gpio_chip *chip, unsigned pin, | 349 | static void lpc32xx_gpo_set_value(struct gpio_chip *chip, unsigned pin, |
356 | int value) | 350 | int value) |
357 | { | 351 | { |
358 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 352 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
359 | 353 | ||
360 | __set_gpo_level_p3(group, pin, value); | 354 | __set_gpo_level_p3(group, pin, value); |
361 | } | 355 | } |
362 | 356 | ||
363 | static int lpc32xx_gpo_get_value(struct gpio_chip *chip, unsigned pin) | 357 | static int lpc32xx_gpo_get_value(struct gpio_chip *chip, unsigned pin) |
364 | { | 358 | { |
365 | struct lpc32xx_gpio_chip *group = to_lpc32xx_gpio(chip); | 359 | struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); |
366 | 360 | ||
367 | return __get_gpo_state_p3(group, pin); | 361 | return !!__get_gpo_state_p3(group, pin); |
368 | } | 362 | } |
369 | 363 | ||
370 | static int lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin) | 364 | static int lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin) |
@@ -553,7 +547,8 @@ static int lpc32xx_gpio_probe(struct platform_device *pdev) | |||
553 | lpc32xx_gpiochip[i].chip.of_gpio_n_cells = 3; | 547 | lpc32xx_gpiochip[i].chip.of_gpio_n_cells = 3; |
554 | lpc32xx_gpiochip[i].chip.of_node = pdev->dev.of_node; | 548 | lpc32xx_gpiochip[i].chip.of_node = pdev->dev.of_node; |
555 | } | 549 | } |
556 | gpiochip_add(&lpc32xx_gpiochip[i].chip); | 550 | gpiochip_add_data(&lpc32xx_gpiochip[i].chip, |
551 | &lpc32xx_gpiochip[i]); | ||
557 | } | 552 | } |
558 | 553 | ||
559 | return 0; | 554 | return 0; |
diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c index 127c37b380ae..13107772be4f 100644 --- a/drivers/gpio/gpio-lynxpoint.c +++ b/drivers/gpio/gpio-lynxpoint.c | |||
@@ -97,7 +97,7 @@ struct lp_gpio { | |||
97 | static unsigned long lp_gpio_reg(struct gpio_chip *chip, unsigned offset, | 97 | static unsigned long lp_gpio_reg(struct gpio_chip *chip, unsigned offset, |
98 | int reg) | 98 | int reg) |
99 | { | 99 | { |
100 | struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip); | 100 | struct lp_gpio *lg = gpiochip_get_data(chip); |
101 | int reg_offset; | 101 | int reg_offset; |
102 | 102 | ||
103 | if (reg == LP_CONFIG1 || reg == LP_CONFIG2) | 103 | if (reg == LP_CONFIG1 || reg == LP_CONFIG2) |
@@ -112,7 +112,7 @@ static unsigned long lp_gpio_reg(struct gpio_chip *chip, unsigned offset, | |||
112 | 112 | ||
113 | static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) | 113 | static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) |
114 | { | 114 | { |
115 | struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip); | 115 | struct lp_gpio *lg = gpiochip_get_data(chip); |
116 | unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); | 116 | unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); |
117 | unsigned long conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); | 117 | unsigned long conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); |
118 | unsigned long acpi_use = lp_gpio_reg(chip, offset, LP_ACPI_OWNED); | 118 | unsigned long acpi_use = lp_gpio_reg(chip, offset, LP_ACPI_OWNED); |
@@ -137,7 +137,7 @@ static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
137 | 137 | ||
138 | static void lp_gpio_free(struct gpio_chip *chip, unsigned offset) | 138 | static void lp_gpio_free(struct gpio_chip *chip, unsigned offset) |
139 | { | 139 | { |
140 | struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip); | 140 | struct lp_gpio *lg = gpiochip_get_data(chip); |
141 | unsigned long conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); | 141 | unsigned long conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); |
142 | 142 | ||
143 | /* disable input sensing */ | 143 | /* disable input sensing */ |
@@ -149,7 +149,7 @@ static void lp_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
149 | static int lp_irq_type(struct irq_data *d, unsigned type) | 149 | static int lp_irq_type(struct irq_data *d, unsigned type) |
150 | { | 150 | { |
151 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 151 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
152 | struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip); | 152 | struct lp_gpio *lg = gpiochip_get_data(gc); |
153 | u32 hwirq = irqd_to_hwirq(d); | 153 | u32 hwirq = irqd_to_hwirq(d); |
154 | unsigned long flags; | 154 | unsigned long flags; |
155 | u32 value; | 155 | u32 value; |
@@ -191,7 +191,7 @@ static int lp_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
191 | 191 | ||
192 | static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 192 | static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
193 | { | 193 | { |
194 | struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip); | 194 | struct lp_gpio *lg = gpiochip_get_data(chip); |
195 | unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); | 195 | unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); |
196 | unsigned long flags; | 196 | unsigned long flags; |
197 | 197 | ||
@@ -207,7 +207,7 @@ static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
207 | 207 | ||
208 | static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 208 | static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
209 | { | 209 | { |
210 | struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip); | 210 | struct lp_gpio *lg = gpiochip_get_data(chip); |
211 | unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); | 211 | unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); |
212 | unsigned long flags; | 212 | unsigned long flags; |
213 | 213 | ||
@@ -221,7 +221,7 @@ static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
221 | static int lp_gpio_direction_output(struct gpio_chip *chip, | 221 | static int lp_gpio_direction_output(struct gpio_chip *chip, |
222 | unsigned offset, int value) | 222 | unsigned offset, int value) |
223 | { | 223 | { |
224 | struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip); | 224 | struct lp_gpio *lg = gpiochip_get_data(chip); |
225 | unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); | 225 | unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); |
226 | unsigned long flags; | 226 | unsigned long flags; |
227 | 227 | ||
@@ -238,7 +238,7 @@ static void lp_gpio_irq_handler(struct irq_desc *desc) | |||
238 | { | 238 | { |
239 | struct irq_data *data = irq_desc_get_irq_data(desc); | 239 | struct irq_data *data = irq_desc_get_irq_data(desc); |
240 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 240 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
241 | struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip); | 241 | struct lp_gpio *lg = gpiochip_get_data(gc); |
242 | struct irq_chip *chip = irq_data_get_irq_chip(data); | 242 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
243 | u32 base, pin, mask; | 243 | u32 base, pin, mask; |
244 | unsigned long reg, ena, pending; | 244 | unsigned long reg, ena, pending; |
@@ -273,7 +273,7 @@ static void lp_irq_mask(struct irq_data *d) | |||
273 | static void lp_irq_enable(struct irq_data *d) | 273 | static void lp_irq_enable(struct irq_data *d) |
274 | { | 274 | { |
275 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 275 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
276 | struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip); | 276 | struct lp_gpio *lg = gpiochip_get_data(gc); |
277 | u32 hwirq = irqd_to_hwirq(d); | 277 | u32 hwirq = irqd_to_hwirq(d); |
278 | unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); | 278 | unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); |
279 | unsigned long flags; | 279 | unsigned long flags; |
@@ -286,7 +286,7 @@ static void lp_irq_enable(struct irq_data *d) | |||
286 | static void lp_irq_disable(struct irq_data *d) | 286 | static void lp_irq_disable(struct irq_data *d) |
287 | { | 287 | { |
288 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 288 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
289 | struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip); | 289 | struct lp_gpio *lg = gpiochip_get_data(gc); |
290 | u32 hwirq = irqd_to_hwirq(d); | 290 | u32 hwirq = irqd_to_hwirq(d); |
291 | unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); | 291 | unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); |
292 | unsigned long flags; | 292 | unsigned long flags; |
@@ -368,9 +368,9 @@ static int lp_gpio_probe(struct platform_device *pdev) | |||
368 | gc->base = -1; | 368 | gc->base = -1; |
369 | gc->ngpio = LP_NUM_GPIO; | 369 | gc->ngpio = LP_NUM_GPIO; |
370 | gc->can_sleep = false; | 370 | gc->can_sleep = false; |
371 | gc->dev = dev; | 371 | gc->parent = dev; |
372 | 372 | ||
373 | ret = gpiochip_add(gc); | 373 | ret = gpiochip_add_data(gc, lg); |
374 | if (ret) { | 374 | if (ret) { |
375 | dev_err(dev, "failed adding lp-gpio chip\n"); | 375 | dev_err(dev, "failed adding lp-gpio chip\n"); |
376 | return ret; | 376 | return ret; |
diff --git a/drivers/gpio/gpio-max7300.c b/drivers/gpio/gpio-max7300.c index 0cc2c279ab5c..1ae9ba851c9a 100644 --- a/drivers/gpio/gpio-max7300.c +++ b/drivers/gpio/gpio-max7300.c | |||
@@ -65,7 +65,6 @@ MODULE_DEVICE_TABLE(i2c, max7300_id); | |||
65 | static struct i2c_driver max7300_driver = { | 65 | static struct i2c_driver max7300_driver = { |
66 | .driver = { | 66 | .driver = { |
67 | .name = "max7300", | 67 | .name = "max7300", |
68 | .owner = THIS_MODULE, | ||
69 | }, | 68 | }, |
70 | .probe = max7300_probe, | 69 | .probe = max7300_probe, |
71 | .remove = max7300_remove, | 70 | .remove = max7300_remove, |
diff --git a/drivers/gpio/gpio-max730x.c b/drivers/gpio/gpio-max730x.c index 0f57d2d248ec..08807368f007 100644 --- a/drivers/gpio/gpio-max730x.c +++ b/drivers/gpio/gpio-max730x.c | |||
@@ -50,7 +50,7 @@ | |||
50 | 50 | ||
51 | static int max7301_direction_input(struct gpio_chip *chip, unsigned offset) | 51 | static int max7301_direction_input(struct gpio_chip *chip, unsigned offset) |
52 | { | 52 | { |
53 | struct max7301 *ts = container_of(chip, struct max7301, chip); | 53 | struct max7301 *ts = gpiochip_get_data(chip); |
54 | u8 *config; | 54 | u8 *config; |
55 | u8 offset_bits, pin_config; | 55 | u8 offset_bits, pin_config; |
56 | int ret; | 56 | int ret; |
@@ -92,7 +92,7 @@ static int __max7301_set(struct max7301 *ts, unsigned offset, int value) | |||
92 | static int max7301_direction_output(struct gpio_chip *chip, unsigned offset, | 92 | static int max7301_direction_output(struct gpio_chip *chip, unsigned offset, |
93 | int value) | 93 | int value) |
94 | { | 94 | { |
95 | struct max7301 *ts = container_of(chip, struct max7301, chip); | 95 | struct max7301 *ts = gpiochip_get_data(chip); |
96 | u8 *config; | 96 | u8 *config; |
97 | u8 offset_bits; | 97 | u8 offset_bits; |
98 | int ret; | 98 | int ret; |
@@ -120,7 +120,7 @@ static int max7301_direction_output(struct gpio_chip *chip, unsigned offset, | |||
120 | 120 | ||
121 | static int max7301_get(struct gpio_chip *chip, unsigned offset) | 121 | static int max7301_get(struct gpio_chip *chip, unsigned offset) |
122 | { | 122 | { |
123 | struct max7301 *ts = container_of(chip, struct max7301, chip); | 123 | struct max7301 *ts = gpiochip_get_data(chip); |
124 | int config, level = -EINVAL; | 124 | int config, level = -EINVAL; |
125 | 125 | ||
126 | /* First 4 pins are unused in the controller */ | 126 | /* First 4 pins are unused in the controller */ |
@@ -148,7 +148,7 @@ static int max7301_get(struct gpio_chip *chip, unsigned offset) | |||
148 | 148 | ||
149 | static void max7301_set(struct gpio_chip *chip, unsigned offset, int value) | 149 | static void max7301_set(struct gpio_chip *chip, unsigned offset, int value) |
150 | { | 150 | { |
151 | struct max7301 *ts = container_of(chip, struct max7301, chip); | 151 | struct max7301 *ts = gpiochip_get_data(chip); |
152 | 152 | ||
153 | /* First 4 pins are unused in the controller */ | 153 | /* First 4 pins are unused in the controller */ |
154 | offset += 4; | 154 | offset += 4; |
@@ -189,7 +189,7 @@ int __max730x_probe(struct max7301 *ts) | |||
189 | 189 | ||
190 | ts->chip.ngpio = PIN_NUMBER; | 190 | ts->chip.ngpio = PIN_NUMBER; |
191 | ts->chip.can_sleep = true; | 191 | ts->chip.can_sleep = true; |
192 | ts->chip.dev = dev; | 192 | ts->chip.parent = dev; |
193 | ts->chip.owner = THIS_MODULE; | 193 | ts->chip.owner = THIS_MODULE; |
194 | 194 | ||
195 | /* | 195 | /* |
@@ -213,7 +213,7 @@ int __max730x_probe(struct max7301 *ts) | |||
213 | } | 213 | } |
214 | } | 214 | } |
215 | 215 | ||
216 | ret = gpiochip_add(&ts->chip); | 216 | ret = gpiochip_add_data(&ts->chip, ts); |
217 | if (ret) | 217 | if (ret) |
218 | goto exit_destroy; | 218 | goto exit_destroy; |
219 | 219 | ||
diff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c index 8c5252c6c327..a9aaf9d822b4 100644 --- a/drivers/gpio/gpio-max732x.c +++ b/drivers/gpio/gpio-max732x.c | |||
@@ -158,11 +158,6 @@ struct max732x_chip { | |||
158 | #endif | 158 | #endif |
159 | }; | 159 | }; |
160 | 160 | ||
161 | static inline struct max732x_chip *to_max732x(struct gpio_chip *gc) | ||
162 | { | ||
163 | return container_of(gc, struct max732x_chip, gpio_chip); | ||
164 | } | ||
165 | |||
166 | static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val) | 161 | static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val) |
167 | { | 162 | { |
168 | struct i2c_client *client; | 163 | struct i2c_client *client; |
@@ -201,21 +196,21 @@ static inline int is_group_a(struct max732x_chip *chip, unsigned off) | |||
201 | 196 | ||
202 | static int max732x_gpio_get_value(struct gpio_chip *gc, unsigned off) | 197 | static int max732x_gpio_get_value(struct gpio_chip *gc, unsigned off) |
203 | { | 198 | { |
204 | struct max732x_chip *chip = to_max732x(gc); | 199 | struct max732x_chip *chip = gpiochip_get_data(gc); |
205 | uint8_t reg_val; | 200 | uint8_t reg_val; |
206 | int ret; | 201 | int ret; |
207 | 202 | ||
208 | ret = max732x_readb(chip, is_group_a(chip, off), ®_val); | 203 | ret = max732x_readb(chip, is_group_a(chip, off), ®_val); |
209 | if (ret < 0) | 204 | if (ret < 0) |
210 | return 0; | 205 | return ret; |
211 | 206 | ||
212 | return reg_val & (1u << (off & 0x7)); | 207 | return !!(reg_val & (1u << (off & 0x7))); |
213 | } | 208 | } |
214 | 209 | ||
215 | static void max732x_gpio_set_mask(struct gpio_chip *gc, unsigned off, int mask, | 210 | static void max732x_gpio_set_mask(struct gpio_chip *gc, unsigned off, int mask, |
216 | int val) | 211 | int val) |
217 | { | 212 | { |
218 | struct max732x_chip *chip = to_max732x(gc); | 213 | struct max732x_chip *chip = gpiochip_get_data(gc); |
219 | uint8_t reg_out; | 214 | uint8_t reg_out; |
220 | int ret; | 215 | int ret; |
221 | 216 | ||
@@ -259,7 +254,7 @@ static void max732x_gpio_set_multiple(struct gpio_chip *gc, | |||
259 | 254 | ||
260 | static int max732x_gpio_direction_input(struct gpio_chip *gc, unsigned off) | 255 | static int max732x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
261 | { | 256 | { |
262 | struct max732x_chip *chip = to_max732x(gc); | 257 | struct max732x_chip *chip = gpiochip_get_data(gc); |
263 | unsigned int mask = 1u << off; | 258 | unsigned int mask = 1u << off; |
264 | 259 | ||
265 | if ((mask & chip->dir_input) == 0) { | 260 | if ((mask & chip->dir_input) == 0) { |
@@ -281,7 +276,7 @@ static int max732x_gpio_direction_input(struct gpio_chip *gc, unsigned off) | |||
281 | static int max732x_gpio_direction_output(struct gpio_chip *gc, | 276 | static int max732x_gpio_direction_output(struct gpio_chip *gc, |
282 | unsigned off, int val) | 277 | unsigned off, int val) |
283 | { | 278 | { |
284 | struct max732x_chip *chip = to_max732x(gc); | 279 | struct max732x_chip *chip = gpiochip_get_data(gc); |
285 | unsigned int mask = 1u << off; | 280 | unsigned int mask = 1u << off; |
286 | 281 | ||
287 | if ((mask & chip->dir_output) == 0) { | 282 | if ((mask & chip->dir_output) == 0) { |
@@ -356,7 +351,7 @@ static void max732x_irq_update_mask(struct max732x_chip *chip) | |||
356 | static void max732x_irq_mask(struct irq_data *d) | 351 | static void max732x_irq_mask(struct irq_data *d) |
357 | { | 352 | { |
358 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 353 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
359 | struct max732x_chip *chip = to_max732x(gc); | 354 | struct max732x_chip *chip = gpiochip_get_data(gc); |
360 | 355 | ||
361 | chip->irq_mask_cur &= ~(1 << d->hwirq); | 356 | chip->irq_mask_cur &= ~(1 << d->hwirq); |
362 | } | 357 | } |
@@ -364,7 +359,7 @@ static void max732x_irq_mask(struct irq_data *d) | |||
364 | static void max732x_irq_unmask(struct irq_data *d) | 359 | static void max732x_irq_unmask(struct irq_data *d) |
365 | { | 360 | { |
366 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 361 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
367 | struct max732x_chip *chip = to_max732x(gc); | 362 | struct max732x_chip *chip = gpiochip_get_data(gc); |
368 | 363 | ||
369 | chip->irq_mask_cur |= 1 << d->hwirq; | 364 | chip->irq_mask_cur |= 1 << d->hwirq; |
370 | } | 365 | } |
@@ -372,7 +367,7 @@ static void max732x_irq_unmask(struct irq_data *d) | |||
372 | static void max732x_irq_bus_lock(struct irq_data *d) | 367 | static void max732x_irq_bus_lock(struct irq_data *d) |
373 | { | 368 | { |
374 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 369 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
375 | struct max732x_chip *chip = to_max732x(gc); | 370 | struct max732x_chip *chip = gpiochip_get_data(gc); |
376 | 371 | ||
377 | mutex_lock(&chip->irq_lock); | 372 | mutex_lock(&chip->irq_lock); |
378 | chip->irq_mask_cur = chip->irq_mask; | 373 | chip->irq_mask_cur = chip->irq_mask; |
@@ -381,7 +376,7 @@ static void max732x_irq_bus_lock(struct irq_data *d) | |||
381 | static void max732x_irq_bus_sync_unlock(struct irq_data *d) | 376 | static void max732x_irq_bus_sync_unlock(struct irq_data *d) |
382 | { | 377 | { |
383 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 378 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
384 | struct max732x_chip *chip = to_max732x(gc); | 379 | struct max732x_chip *chip = gpiochip_get_data(gc); |
385 | uint16_t new_irqs; | 380 | uint16_t new_irqs; |
386 | uint16_t level; | 381 | uint16_t level; |
387 | 382 | ||
@@ -400,7 +395,7 @@ static void max732x_irq_bus_sync_unlock(struct irq_data *d) | |||
400 | static int max732x_irq_set_type(struct irq_data *d, unsigned int type) | 395 | static int max732x_irq_set_type(struct irq_data *d, unsigned int type) |
401 | { | 396 | { |
402 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 397 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
403 | struct max732x_chip *chip = to_max732x(gc); | 398 | struct max732x_chip *chip = gpiochip_get_data(gc); |
404 | uint16_t off = d->hwirq; | 399 | uint16_t off = d->hwirq; |
405 | uint16_t mask = 1 << off; | 400 | uint16_t mask = 1 << off; |
406 | 401 | ||
@@ -603,7 +598,7 @@ static int max732x_setup_gpio(struct max732x_chip *chip, | |||
603 | gc->base = gpio_start; | 598 | gc->base = gpio_start; |
604 | gc->ngpio = port; | 599 | gc->ngpio = port; |
605 | gc->label = chip->client->name; | 600 | gc->label = chip->client->name; |
606 | gc->dev = &chip->client->dev; | 601 | gc->parent = &chip->client->dev; |
607 | gc->owner = THIS_MODULE; | 602 | gc->owner = THIS_MODULE; |
608 | 603 | ||
609 | return port; | 604 | return port; |
@@ -649,7 +644,7 @@ static int max732x_probe(struct i2c_client *client, | |||
649 | chip->client = client; | 644 | chip->client = client; |
650 | 645 | ||
651 | nr_port = max732x_setup_gpio(chip, id, pdata->gpio_base); | 646 | nr_port = max732x_setup_gpio(chip, id, pdata->gpio_base); |
652 | chip->gpio_chip.dev = &client->dev; | 647 | chip->gpio_chip.parent = &client->dev; |
653 | 648 | ||
654 | addr_a = (client->addr & 0x0f) | 0x60; | 649 | addr_a = (client->addr & 0x0f) | 0x60; |
655 | addr_b = (client->addr & 0x0f) | 0x50; | 650 | addr_b = (client->addr & 0x0f) | 0x50; |
@@ -694,7 +689,7 @@ static int max732x_probe(struct i2c_client *client, | |||
694 | goto out_failed; | 689 | goto out_failed; |
695 | } | 690 | } |
696 | 691 | ||
697 | ret = gpiochip_add(&chip->gpio_chip); | 692 | ret = gpiochip_add_data(&chip->gpio_chip, chip); |
698 | if (ret) | 693 | if (ret) |
699 | goto out_failed; | 694 | goto out_failed; |
700 | 695 | ||
@@ -749,7 +744,6 @@ static int max732x_remove(struct i2c_client *client) | |||
749 | static struct i2c_driver max732x_driver = { | 744 | static struct i2c_driver max732x_driver = { |
750 | .driver = { | 745 | .driver = { |
751 | .name = "max732x", | 746 | .name = "max732x", |
752 | .owner = THIS_MODULE, | ||
753 | .of_match_table = of_match_ptr(max732x_of_table), | 747 | .of_match_table = of_match_ptr(max732x_of_table), |
754 | }, | 748 | }, |
755 | .probe = max732x_probe, | 749 | .probe = max732x_probe, |
diff --git a/drivers/gpio/gpio-mb86s7x.c b/drivers/gpio/gpio-mb86s7x.c index ee93c0ab0a59..7fffc1d6c055 100644 --- a/drivers/gpio/gpio-mb86s7x.c +++ b/drivers/gpio/gpio-mb86s7x.c | |||
@@ -44,14 +44,9 @@ struct mb86s70_gpio_chip { | |||
44 | spinlock_t lock; | 44 | spinlock_t lock; |
45 | }; | 45 | }; |
46 | 46 | ||
47 | static inline struct mb86s70_gpio_chip *chip_to_mb86s70(struct gpio_chip *gc) | ||
48 | { | ||
49 | return container_of(gc, struct mb86s70_gpio_chip, gc); | ||
50 | } | ||
51 | |||
52 | static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio) | 47 | static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio) |
53 | { | 48 | { |
54 | struct mb86s70_gpio_chip *gchip = chip_to_mb86s70(gc); | 49 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
55 | unsigned long flags; | 50 | unsigned long flags; |
56 | u32 val; | 51 | u32 val; |
57 | 52 | ||
@@ -73,7 +68,7 @@ static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio) | |||
73 | 68 | ||
74 | static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio) | 69 | static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio) |
75 | { | 70 | { |
76 | struct mb86s70_gpio_chip *gchip = chip_to_mb86s70(gc); | 71 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
77 | unsigned long flags; | 72 | unsigned long flags; |
78 | u32 val; | 73 | u32 val; |
79 | 74 | ||
@@ -88,7 +83,7 @@ static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio) | |||
88 | 83 | ||
89 | static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) | 84 | static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) |
90 | { | 85 | { |
91 | struct mb86s70_gpio_chip *gchip = chip_to_mb86s70(gc); | 86 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
92 | unsigned long flags; | 87 | unsigned long flags; |
93 | unsigned char val; | 88 | unsigned char val; |
94 | 89 | ||
@@ -106,7 +101,7 @@ static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) | |||
106 | static int mb86s70_gpio_direction_output(struct gpio_chip *gc, | 101 | static int mb86s70_gpio_direction_output(struct gpio_chip *gc, |
107 | unsigned gpio, int value) | 102 | unsigned gpio, int value) |
108 | { | 103 | { |
109 | struct mb86s70_gpio_chip *gchip = chip_to_mb86s70(gc); | 104 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
110 | unsigned long flags; | 105 | unsigned long flags; |
111 | unsigned char val; | 106 | unsigned char val; |
112 | 107 | ||
@@ -130,14 +125,14 @@ static int mb86s70_gpio_direction_output(struct gpio_chip *gc, | |||
130 | 125 | ||
131 | static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio) | 126 | static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio) |
132 | { | 127 | { |
133 | struct mb86s70_gpio_chip *gchip = chip_to_mb86s70(gc); | 128 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
134 | 129 | ||
135 | return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio)); | 130 | return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio)); |
136 | } | 131 | } |
137 | 132 | ||
138 | static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value) | 133 | static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value) |
139 | { | 134 | { |
140 | struct mb86s70_gpio_chip *gchip = chip_to_mb86s70(gc); | 135 | struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); |
141 | unsigned long flags; | 136 | unsigned long flags; |
142 | unsigned char val; | 137 | unsigned char val; |
143 | 138 | ||
@@ -187,12 +182,12 @@ static int mb86s70_gpio_probe(struct platform_device *pdev) | |||
187 | gchip->gc.label = dev_name(&pdev->dev); | 182 | gchip->gc.label = dev_name(&pdev->dev); |
188 | gchip->gc.ngpio = 32; | 183 | gchip->gc.ngpio = 32; |
189 | gchip->gc.owner = THIS_MODULE; | 184 | gchip->gc.owner = THIS_MODULE; |
190 | gchip->gc.dev = &pdev->dev; | 185 | gchip->gc.parent = &pdev->dev; |
191 | gchip->gc.base = -1; | 186 | gchip->gc.base = -1; |
192 | 187 | ||
193 | platform_set_drvdata(pdev, gchip); | 188 | platform_set_drvdata(pdev, gchip); |
194 | 189 | ||
195 | ret = gpiochip_add(&gchip->gc); | 190 | ret = gpiochip_add_data(&gchip->gc, gchip); |
196 | if (ret) { | 191 | if (ret) { |
197 | dev_err(&pdev->dev, "couldn't register gpio driver\n"); | 192 | dev_err(&pdev->dev, "couldn't register gpio driver\n"); |
198 | clk_disable_unprepare(gchip->clk); | 193 | clk_disable_unprepare(gchip->clk); |
diff --git a/drivers/gpio/gpio-mc33880.c b/drivers/gpio/gpio-mc33880.c index 2853731db5bc..0f0df7956264 100644 --- a/drivers/gpio/gpio-mc33880.c +++ b/drivers/gpio/gpio-mc33880.c | |||
@@ -71,7 +71,7 @@ static int __mc33880_set(struct mc33880 *mc, unsigned offset, int value) | |||
71 | 71 | ||
72 | static void mc33880_set(struct gpio_chip *chip, unsigned offset, int value) | 72 | static void mc33880_set(struct gpio_chip *chip, unsigned offset, int value) |
73 | { | 73 | { |
74 | struct mc33880 *mc = container_of(chip, struct mc33880, chip); | 74 | struct mc33880 *mc = gpiochip_get_data(chip); |
75 | 75 | ||
76 | mutex_lock(&mc->lock); | 76 | mutex_lock(&mc->lock); |
77 | 77 | ||
@@ -116,7 +116,7 @@ static int mc33880_probe(struct spi_device *spi) | |||
116 | mc->chip.base = pdata->base; | 116 | mc->chip.base = pdata->base; |
117 | mc->chip.ngpio = PIN_NUMBER; | 117 | mc->chip.ngpio = PIN_NUMBER; |
118 | mc->chip.can_sleep = true; | 118 | mc->chip.can_sleep = true; |
119 | mc->chip.dev = &spi->dev; | 119 | mc->chip.parent = &spi->dev; |
120 | mc->chip.owner = THIS_MODULE; | 120 | mc->chip.owner = THIS_MODULE; |
121 | 121 | ||
122 | mc->port_config = 0x00; | 122 | mc->port_config = 0x00; |
@@ -135,7 +135,7 @@ static int mc33880_probe(struct spi_device *spi) | |||
135 | goto exit_destroy; | 135 | goto exit_destroy; |
136 | } | 136 | } |
137 | 137 | ||
138 | ret = gpiochip_add(&mc->chip); | 138 | ret = gpiochip_add_data(&mc->chip, mc); |
139 | if (ret) | 139 | if (ret) |
140 | goto exit_destroy; | 140 | goto exit_destroy; |
141 | 141 | ||
diff --git a/drivers/gpio/gpio-mc9s08dz60.c b/drivers/gpio/gpio-mc9s08dz60.c index d62b4f8182bf..ba22fb92a6e7 100644 --- a/drivers/gpio/gpio-mc9s08dz60.c +++ b/drivers/gpio/gpio-mc9s08dz60.c | |||
@@ -29,12 +29,6 @@ struct mc9s08dz60 { | |||
29 | struct gpio_chip chip; | 29 | struct gpio_chip chip; |
30 | }; | 30 | }; |
31 | 31 | ||
32 | static inline struct mc9s08dz60 *to_mc9s08dz60(struct gpio_chip *gc) | ||
33 | { | ||
34 | return container_of(gc, struct mc9s08dz60, chip); | ||
35 | } | ||
36 | |||
37 | |||
38 | static void mc9s_gpio_to_reg_and_bit(int offset, u8 *reg, u8 *bit) | 32 | static void mc9s_gpio_to_reg_and_bit(int offset, u8 *reg, u8 *bit) |
39 | { | 33 | { |
40 | *reg = 0x20 + offset / GPIO_NUM_PER_GROUP; | 34 | *reg = 0x20 + offset / GPIO_NUM_PER_GROUP; |
@@ -45,7 +39,7 @@ static int mc9s08dz60_get_value(struct gpio_chip *gc, unsigned offset) | |||
45 | { | 39 | { |
46 | u8 reg, bit; | 40 | u8 reg, bit; |
47 | s32 value; | 41 | s32 value; |
48 | struct mc9s08dz60 *mc9s = to_mc9s08dz60(gc); | 42 | struct mc9s08dz60 *mc9s = gpiochip_get_data(gc); |
49 | 43 | ||
50 | mc9s_gpio_to_reg_and_bit(offset, ®, &bit); | 44 | mc9s_gpio_to_reg_and_bit(offset, ®, &bit); |
51 | value = i2c_smbus_read_byte_data(mc9s->client, reg); | 45 | value = i2c_smbus_read_byte_data(mc9s->client, reg); |
@@ -75,7 +69,7 @@ static int mc9s08dz60_set(struct mc9s08dz60 *mc9s, unsigned offset, int val) | |||
75 | 69 | ||
76 | static void mc9s08dz60_set_value(struct gpio_chip *gc, unsigned offset, int val) | 70 | static void mc9s08dz60_set_value(struct gpio_chip *gc, unsigned offset, int val) |
77 | { | 71 | { |
78 | struct mc9s08dz60 *mc9s = to_mc9s08dz60(gc); | 72 | struct mc9s08dz60 *mc9s = gpiochip_get_data(gc); |
79 | 73 | ||
80 | mc9s08dz60_set(mc9s, offset, val); | 74 | mc9s08dz60_set(mc9s, offset, val); |
81 | } | 75 | } |
@@ -83,7 +77,7 @@ static void mc9s08dz60_set_value(struct gpio_chip *gc, unsigned offset, int val) | |||
83 | static int mc9s08dz60_direction_output(struct gpio_chip *gc, | 77 | static int mc9s08dz60_direction_output(struct gpio_chip *gc, |
84 | unsigned offset, int val) | 78 | unsigned offset, int val) |
85 | { | 79 | { |
86 | struct mc9s08dz60 *mc9s = to_mc9s08dz60(gc); | 80 | struct mc9s08dz60 *mc9s = gpiochip_get_data(gc); |
87 | 81 | ||
88 | return mc9s08dz60_set(mc9s, offset, val); | 82 | return mc9s08dz60_set(mc9s, offset, val); |
89 | } | 83 | } |
@@ -99,7 +93,7 @@ static int mc9s08dz60_probe(struct i2c_client *client, | |||
99 | 93 | ||
100 | mc9s->chip.label = client->name; | 94 | mc9s->chip.label = client->name; |
101 | mc9s->chip.base = -1; | 95 | mc9s->chip.base = -1; |
102 | mc9s->chip.dev = &client->dev; | 96 | mc9s->chip.parent = &client->dev; |
103 | mc9s->chip.owner = THIS_MODULE; | 97 | mc9s->chip.owner = THIS_MODULE; |
104 | mc9s->chip.ngpio = GPIO_NUM; | 98 | mc9s->chip.ngpio = GPIO_NUM; |
105 | mc9s->chip.can_sleep = true; | 99 | mc9s->chip.can_sleep = true; |
@@ -109,7 +103,7 @@ static int mc9s08dz60_probe(struct i2c_client *client, | |||
109 | mc9s->client = client; | 103 | mc9s->client = client; |
110 | i2c_set_clientdata(client, mc9s); | 104 | i2c_set_clientdata(client, mc9s); |
111 | 105 | ||
112 | return gpiochip_add(&mc9s->chip); | 106 | return gpiochip_add_data(&mc9s->chip, mc9s); |
113 | } | 107 | } |
114 | 108 | ||
115 | static int mc9s08dz60_remove(struct i2c_client *client) | 109 | static int mc9s08dz60_remove(struct i2c_client *client) |
@@ -131,7 +125,6 @@ MODULE_DEVICE_TABLE(i2c, mc9s08dz60_id); | |||
131 | 125 | ||
132 | static struct i2c_driver mc9s08dz60_i2c_driver = { | 126 | static struct i2c_driver mc9s08dz60_i2c_driver = { |
133 | .driver = { | 127 | .driver = { |
134 | .owner = THIS_MODULE, | ||
135 | .name = "mc9s08dz60", | 128 | .name = "mc9s08dz60", |
136 | }, | 129 | }, |
137 | .probe = mc9s08dz60_probe, | 130 | .probe = mc9s08dz60_probe, |
diff --git a/drivers/gpio/gpio-mcp23s08.c b/drivers/gpio/gpio-mcp23s08.c index 4a41694919da..c767879e4dd9 100644 --- a/drivers/gpio/gpio-mcp23s08.c +++ b/drivers/gpio/gpio-mcp23s08.c | |||
@@ -269,7 +269,7 @@ static const struct mcp23s08_ops mcp23s17_ops = { | |||
269 | 269 | ||
270 | static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset) | 270 | static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset) |
271 | { | 271 | { |
272 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | 272 | struct mcp23s08 *mcp = gpiochip_get_data(chip); |
273 | int status; | 273 | int status; |
274 | 274 | ||
275 | mutex_lock(&mcp->lock); | 275 | mutex_lock(&mcp->lock); |
@@ -281,7 +281,7 @@ static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset) | |||
281 | 281 | ||
282 | static int mcp23s08_get(struct gpio_chip *chip, unsigned offset) | 282 | static int mcp23s08_get(struct gpio_chip *chip, unsigned offset) |
283 | { | 283 | { |
284 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | 284 | struct mcp23s08 *mcp = gpiochip_get_data(chip); |
285 | int status; | 285 | int status; |
286 | 286 | ||
287 | mutex_lock(&mcp->lock); | 287 | mutex_lock(&mcp->lock); |
@@ -312,7 +312,7 @@ static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value) | |||
312 | 312 | ||
313 | static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value) | 313 | static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value) |
314 | { | 314 | { |
315 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | 315 | struct mcp23s08 *mcp = gpiochip_get_data(chip); |
316 | unsigned mask = 1 << offset; | 316 | unsigned mask = 1 << offset; |
317 | 317 | ||
318 | mutex_lock(&mcp->lock); | 318 | mutex_lock(&mcp->lock); |
@@ -323,7 +323,7 @@ static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value) | |||
323 | static int | 323 | static int |
324 | mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value) | 324 | mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value) |
325 | { | 325 | { |
326 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | 326 | struct mcp23s08 *mcp = gpiochip_get_data(chip); |
327 | unsigned mask = 1 << offset; | 327 | unsigned mask = 1 << offset; |
328 | int status; | 328 | int status; |
329 | 329 | ||
@@ -377,7 +377,7 @@ static irqreturn_t mcp23s08_irq(int irq, void *data) | |||
377 | 377 | ||
378 | static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 378 | static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
379 | { | 379 | { |
380 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); | 380 | struct mcp23s08 *mcp = gpiochip_get_data(chip); |
381 | 381 | ||
382 | return irq_find_mapping(mcp->irq_domain, offset); | 382 | return irq_find_mapping(mcp->irq_domain, offset); |
383 | } | 383 | } |
@@ -446,7 +446,7 @@ static int mcp23s08_irq_reqres(struct irq_data *data) | |||
446 | struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); | 446 | struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); |
447 | 447 | ||
448 | if (gpiochip_lock_as_irq(&mcp->chip, data->hwirq)) { | 448 | if (gpiochip_lock_as_irq(&mcp->chip, data->hwirq)) { |
449 | dev_err(mcp->chip.dev, | 449 | dev_err(mcp->chip.parent, |
450 | "unable to lock HW IRQ %lu for IRQ usage\n", | 450 | "unable to lock HW IRQ %lu for IRQ usage\n", |
451 | data->hwirq); | 451 | data->hwirq); |
452 | return -EINVAL; | 452 | return -EINVAL; |
@@ -481,7 +481,8 @@ static int mcp23s08_irq_setup(struct mcp23s08 *mcp) | |||
481 | 481 | ||
482 | mutex_init(&mcp->irq_lock); | 482 | mutex_init(&mcp->irq_lock); |
483 | 483 | ||
484 | mcp->irq_domain = irq_domain_add_linear(chip->dev->of_node, chip->ngpio, | 484 | mcp->irq_domain = irq_domain_add_linear(chip->parent->of_node, |
485 | chip->ngpio, | ||
485 | &irq_domain_simple_ops, mcp); | 486 | &irq_domain_simple_ops, mcp); |
486 | if (!mcp->irq_domain) | 487 | if (!mcp->irq_domain) |
487 | return -ENODEV; | 488 | return -ENODEV; |
@@ -491,10 +492,11 @@ static int mcp23s08_irq_setup(struct mcp23s08 *mcp) | |||
491 | else | 492 | else |
492 | irqflags |= IRQF_TRIGGER_LOW; | 493 | irqflags |= IRQF_TRIGGER_LOW; |
493 | 494 | ||
494 | err = devm_request_threaded_irq(chip->dev, mcp->irq, NULL, mcp23s08_irq, | 495 | err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL, |
495 | irqflags, dev_name(chip->dev), mcp); | 496 | mcp23s08_irq, |
497 | irqflags, dev_name(chip->parent), mcp); | ||
496 | if (err != 0) { | 498 | if (err != 0) { |
497 | dev_err(chip->dev, "unable to request IRQ#%d: %d\n", | 499 | dev_err(chip->parent, "unable to request IRQ#%d: %d\n", |
498 | mcp->irq, err); | 500 | mcp->irq, err); |
499 | return err; | 501 | return err; |
500 | } | 502 | } |
@@ -542,7 +544,7 @@ static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip) | |||
542 | int t; | 544 | int t; |
543 | unsigned mask; | 545 | unsigned mask; |
544 | 546 | ||
545 | mcp = container_of(chip, struct mcp23s08, chip); | 547 | mcp = gpiochip_get_data(chip); |
546 | 548 | ||
547 | /* NOTE: we only handle one bank for now ... */ | 549 | /* NOTE: we only handle one bank for now ... */ |
548 | bank = '0' + ((mcp->addr >> 1) & 0x7); | 550 | bank = '0' + ((mcp->addr >> 1) & 0x7); |
@@ -638,7 +640,7 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, | |||
638 | 640 | ||
639 | mcp->chip.base = pdata->base; | 641 | mcp->chip.base = pdata->base; |
640 | mcp->chip.can_sleep = true; | 642 | mcp->chip.can_sleep = true; |
641 | mcp->chip.dev = dev; | 643 | mcp->chip.parent = dev; |
642 | mcp->chip.owner = THIS_MODULE; | 644 | mcp->chip.owner = THIS_MODULE; |
643 | 645 | ||
644 | /* verify MCP_IOCON.SEQOP = 0, so sequential reads work, | 646 | /* verify MCP_IOCON.SEQOP = 0, so sequential reads work, |
@@ -652,7 +654,7 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, | |||
652 | mcp->irq_controller = pdata->irq_controller; | 654 | mcp->irq_controller = pdata->irq_controller; |
653 | if (mcp->irq && mcp->irq_controller) { | 655 | if (mcp->irq && mcp->irq_controller) { |
654 | mcp->irq_active_high = | 656 | mcp->irq_active_high = |
655 | of_property_read_bool(mcp->chip.dev->of_node, | 657 | of_property_read_bool(mcp->chip.parent->of_node, |
656 | "microchip,irq-active-high"); | 658 | "microchip,irq-active-high"); |
657 | 659 | ||
658 | if (type == MCP_TYPE_017) | 660 | if (type == MCP_TYPE_017) |
@@ -702,7 +704,7 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, | |||
702 | goto fail; | 704 | goto fail; |
703 | } | 705 | } |
704 | 706 | ||
705 | status = gpiochip_add(&mcp->chip); | 707 | status = gpiochip_add_data(&mcp->chip, mcp); |
706 | if (status < 0) | 708 | if (status < 0) |
707 | goto fail; | 709 | goto fail; |
708 | 710 | ||
diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c index 5536108aa9db..796a5a4bc4f5 100644 --- a/drivers/gpio/gpio-ml-ioh.c +++ b/drivers/gpio/gpio-ml-ioh.c | |||
@@ -106,7 +106,7 @@ static const int num_ports[] = {6, 12, 16, 16, 15, 16, 16, 12}; | |||
106 | static void ioh_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) | 106 | static void ioh_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) |
107 | { | 107 | { |
108 | u32 reg_val; | 108 | u32 reg_val; |
109 | struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); | 109 | struct ioh_gpio *chip = gpiochip_get_data(gpio); |
110 | unsigned long flags; | 110 | unsigned long flags; |
111 | 111 | ||
112 | spin_lock_irqsave(&chip->spinlock, flags); | 112 | spin_lock_irqsave(&chip->spinlock, flags); |
@@ -122,15 +122,15 @@ static void ioh_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) | |||
122 | 122 | ||
123 | static int ioh_gpio_get(struct gpio_chip *gpio, unsigned nr) | 123 | static int ioh_gpio_get(struct gpio_chip *gpio, unsigned nr) |
124 | { | 124 | { |
125 | struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); | 125 | struct ioh_gpio *chip = gpiochip_get_data(gpio); |
126 | 126 | ||
127 | return ioread32(&chip->reg->regs[chip->ch].pi) & (1 << nr); | 127 | return !!(ioread32(&chip->reg->regs[chip->ch].pi) & (1 << nr)); |
128 | } | 128 | } |
129 | 129 | ||
130 | static int ioh_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, | 130 | static int ioh_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, |
131 | int val) | 131 | int val) |
132 | { | 132 | { |
133 | struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); | 133 | struct ioh_gpio *chip = gpiochip_get_data(gpio); |
134 | u32 pm; | 134 | u32 pm; |
135 | u32 reg_val; | 135 | u32 reg_val; |
136 | unsigned long flags; | 136 | unsigned long flags; |
@@ -155,7 +155,7 @@ static int ioh_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, | |||
155 | 155 | ||
156 | static int ioh_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) | 156 | static int ioh_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) |
157 | { | 157 | { |
158 | struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); | 158 | struct ioh_gpio *chip = gpiochip_get_data(gpio); |
159 | u32 pm; | 159 | u32 pm; |
160 | unsigned long flags; | 160 | unsigned long flags; |
161 | 161 | ||
@@ -225,7 +225,7 @@ static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) | |||
225 | 225 | ||
226 | static int ioh_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) | 226 | static int ioh_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) |
227 | { | 227 | { |
228 | struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); | 228 | struct ioh_gpio *chip = gpiochip_get_data(gpio); |
229 | return chip->irq_base + offset; | 229 | return chip->irq_base + offset; |
230 | } | 230 | } |
231 | 231 | ||
@@ -450,7 +450,7 @@ static int ioh_gpio_probe(struct pci_dev *pdev, | |||
450 | chip->ch = i; | 450 | chip->ch = i; |
451 | spin_lock_init(&chip->spinlock); | 451 | spin_lock_init(&chip->spinlock); |
452 | ioh_gpio_setup(chip, num_ports[i]); | 452 | ioh_gpio_setup(chip, num_ports[i]); |
453 | ret = gpiochip_add(&chip->gpio); | 453 | ret = gpiochip_add_data(&chip->gpio, chip); |
454 | if (ret) { | 454 | if (ret) { |
455 | dev_err(&pdev->dev, "IOH gpio: Failed to register GPIO\n"); | 455 | dev_err(&pdev->dev, "IOH gpio: Failed to register GPIO\n"); |
456 | goto err_gpiochip_add; | 456 | goto err_gpiochip_add; |
diff --git a/drivers/gpio/gpio-mm-lantiq.c b/drivers/gpio/gpio-mm-lantiq.c index f67ef2283d64..54e5d8257d34 100644 --- a/drivers/gpio/gpio-mm-lantiq.c +++ b/drivers/gpio/gpio-mm-lantiq.c | |||
@@ -61,9 +61,7 @@ static void ltq_mm_apply(struct ltq_mm *chip) | |||
61 | */ | 61 | */ |
62 | static void ltq_mm_set(struct gpio_chip *gc, unsigned offset, int value) | 62 | static void ltq_mm_set(struct gpio_chip *gc, unsigned offset, int value) |
63 | { | 63 | { |
64 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 64 | struct ltq_mm *chip = gpiochip_get_data(gc); |
65 | struct ltq_mm *chip = | ||
66 | container_of(mm_gc, struct ltq_mm, mmchip); | ||
67 | 65 | ||
68 | if (value) | 66 | if (value) |
69 | chip->shadow |= (1 << offset); | 67 | chip->shadow |= (1 << offset); |
@@ -122,7 +120,7 @@ static int ltq_mm_probe(struct platform_device *pdev) | |||
122 | if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow)) | 120 | if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow)) |
123 | chip->shadow = shadow; | 121 | chip->shadow = shadow; |
124 | 122 | ||
125 | return of_mm_gpiochip_add(pdev->dev.of_node, &chip->mmchip); | 123 | return of_mm_gpiochip_add_data(pdev->dev.of_node, &chip->mmchip, chip); |
126 | } | 124 | } |
127 | 125 | ||
128 | static int ltq_mm_remove(struct platform_device *pdev) | 126 | static int ltq_mm_remove(struct platform_device *pdev) |
diff --git a/drivers/gpio/gpio-moxart.c b/drivers/gpio/gpio-moxart.c index d3355a6dc9b1..ca604538ebf7 100644 --- a/drivers/gpio/gpio-moxart.c +++ b/drivers/gpio/gpio-moxart.c | |||
@@ -14,7 +14,6 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <linux/gpio.h> | ||
18 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
19 | #include <linux/module.h> | 18 | #include <linux/module.h> |
20 | #include <linux/of_address.h> | 19 | #include <linux/of_address.h> |
@@ -23,7 +22,7 @@ | |||
23 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
24 | #include <linux/timer.h> | 23 | #include <linux/timer.h> |
25 | #include <linux/bitops.h> | 24 | #include <linux/bitops.h> |
26 | #include <linux/basic_mmio_gpio.h> | 25 | #include <linux/gpio/driver.h> |
27 | 26 | ||
28 | #define GPIO_DATA_OUT 0x00 | 27 | #define GPIO_DATA_OUT 0x00 |
29 | #define GPIO_DATA_IN 0x04 | 28 | #define GPIO_DATA_IN 0x04 |
@@ -33,12 +32,12 @@ static int moxart_gpio_probe(struct platform_device *pdev) | |||
33 | { | 32 | { |
34 | struct device *dev = &pdev->dev; | 33 | struct device *dev = &pdev->dev; |
35 | struct resource *res; | 34 | struct resource *res; |
36 | struct bgpio_chip *bgc; | 35 | struct gpio_chip *gc; |
37 | void __iomem *base; | 36 | void __iomem *base; |
38 | int ret; | 37 | int ret; |
39 | 38 | ||
40 | bgc = devm_kzalloc(dev, sizeof(*bgc), GFP_KERNEL); | 39 | gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL); |
41 | if (!bgc) | 40 | if (!gc) |
42 | return -ENOMEM; | 41 | return -ENOMEM; |
43 | 42 | ||
44 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 43 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
@@ -46,7 +45,7 @@ static int moxart_gpio_probe(struct platform_device *pdev) | |||
46 | if (IS_ERR(base)) | 45 | if (IS_ERR(base)) |
47 | return PTR_ERR(base); | 46 | return PTR_ERR(base); |
48 | 47 | ||
49 | ret = bgpio_init(bgc, dev, 4, base + GPIO_DATA_IN, | 48 | ret = bgpio_init(gc, dev, 4, base + GPIO_DATA_IN, |
50 | base + GPIO_DATA_OUT, NULL, | 49 | base + GPIO_DATA_OUT, NULL, |
51 | base + GPIO_PIN_DIRECTION, NULL, | 50 | base + GPIO_PIN_DIRECTION, NULL, |
52 | BGPIOF_READ_OUTPUT_REG_SET); | 51 | BGPIOF_READ_OUTPUT_REG_SET); |
@@ -55,16 +54,16 @@ static int moxart_gpio_probe(struct platform_device *pdev) | |||
55 | return ret; | 54 | return ret; |
56 | } | 55 | } |
57 | 56 | ||
58 | bgc->gc.label = "moxart-gpio"; | 57 | gc->label = "moxart-gpio"; |
59 | bgc->gc.request = gpiochip_generic_request; | 58 | gc->request = gpiochip_generic_request; |
60 | bgc->gc.free = gpiochip_generic_free; | 59 | gc->free = gpiochip_generic_free; |
61 | bgc->data = bgc->read_reg(bgc->reg_set); | 60 | gc->bgpio_data = gc->read_reg(gc->reg_set); |
62 | bgc->gc.base = 0; | 61 | gc->base = 0; |
63 | bgc->gc.ngpio = 32; | 62 | gc->ngpio = 32; |
64 | bgc->gc.dev = dev; | 63 | gc->parent = dev; |
65 | bgc->gc.owner = THIS_MODULE; | 64 | gc->owner = THIS_MODULE; |
66 | 65 | ||
67 | ret = gpiochip_add(&bgc->gc); | 66 | ret = gpiochip_add_data(gc, NULL); |
68 | if (ret) { | 67 | if (ret) { |
69 | dev_err(dev, "%s: gpiochip_add failed\n", | 68 | dev_err(dev, "%s: gpiochip_add failed\n", |
70 | dev->of_node->full_name); | 69 | dev->of_node->full_name); |
diff --git a/drivers/gpio/gpio-mpc5200.c b/drivers/gpio/gpio-mpc5200.c index 4c542153e923..0e5a6709f27d 100644 --- a/drivers/gpio/gpio-mpc5200.c +++ b/drivers/gpio/gpio-mpc5200.c | |||
@@ -71,8 +71,7 @@ static inline void | |||
71 | __mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | 71 | __mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) |
72 | { | 72 | { |
73 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 73 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
74 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | 74 | struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); |
75 | struct mpc52xx_gpiochip, mmchip); | ||
76 | struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; | 75 | struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; |
77 | 76 | ||
78 | if (val) | 77 | if (val) |
@@ -100,8 +99,7 @@ mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |||
100 | static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | 99 | static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) |
101 | { | 100 | { |
102 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 101 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
103 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | 102 | struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); |
104 | struct mpc52xx_gpiochip, mmchip); | ||
105 | struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; | 103 | struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; |
106 | unsigned long flags; | 104 | unsigned long flags; |
107 | 105 | ||
@@ -125,8 +123,7 @@ mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | |||
125 | { | 123 | { |
126 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 124 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
127 | struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; | 125 | struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; |
128 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | 126 | struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); |
129 | struct mpc52xx_gpiochip, mmchip); | ||
130 | unsigned long flags; | 127 | unsigned long flags; |
131 | 128 | ||
132 | spin_lock_irqsave(&gpio_lock, flags); | 129 | spin_lock_irqsave(&gpio_lock, flags); |
@@ -169,7 +166,7 @@ static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev) | |||
169 | gc->get = mpc52xx_wkup_gpio_get; | 166 | gc->get = mpc52xx_wkup_gpio_get; |
170 | gc->set = mpc52xx_wkup_gpio_set; | 167 | gc->set = mpc52xx_wkup_gpio_set; |
171 | 168 | ||
172 | ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip); | 169 | ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip); |
173 | if (ret) | 170 | if (ret) |
174 | return ret; | 171 | return ret; |
175 | 172 | ||
@@ -236,8 +233,7 @@ static inline void | |||
236 | __mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | 233 | __mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) |
237 | { | 234 | { |
238 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 235 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
239 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | 236 | struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); |
240 | struct mpc52xx_gpiochip, mmchip); | ||
241 | struct mpc52xx_gpio __iomem *regs = mm_gc->regs; | 237 | struct mpc52xx_gpio __iomem *regs = mm_gc->regs; |
242 | 238 | ||
243 | if (val) | 239 | if (val) |
@@ -264,8 +260,7 @@ mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |||
264 | static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | 260 | static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) |
265 | { | 261 | { |
266 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 262 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
267 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | 263 | struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); |
268 | struct mpc52xx_gpiochip, mmchip); | ||
269 | struct mpc52xx_gpio __iomem *regs = mm_gc->regs; | 264 | struct mpc52xx_gpio __iomem *regs = mm_gc->regs; |
270 | unsigned long flags; | 265 | unsigned long flags; |
271 | 266 | ||
@@ -288,8 +283,7 @@ static int | |||
288 | mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | 283 | mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) |
289 | { | 284 | { |
290 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 285 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
291 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | 286 | struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); |
292 | struct mpc52xx_gpiochip, mmchip); | ||
293 | struct mpc52xx_gpio __iomem *regs = mm_gc->regs; | 287 | struct mpc52xx_gpio __iomem *regs = mm_gc->regs; |
294 | unsigned long flags; | 288 | unsigned long flags; |
295 | 289 | ||
@@ -334,7 +328,7 @@ static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev) | |||
334 | gc->get = mpc52xx_simple_gpio_get; | 328 | gc->get = mpc52xx_simple_gpio_get; |
335 | gc->set = mpc52xx_simple_gpio_set; | 329 | gc->set = mpc52xx_simple_gpio_set; |
336 | 330 | ||
337 | ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip); | 331 | ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip); |
338 | if (ret) | 332 | if (ret) |
339 | return ret; | 333 | return ret; |
340 | 334 | ||
@@ -360,15 +354,14 @@ static struct platform_driver mpc52xx_simple_gpiochip_driver = { | |||
360 | .remove = mpc52xx_gpiochip_remove, | 354 | .remove = mpc52xx_gpiochip_remove, |
361 | }; | 355 | }; |
362 | 356 | ||
357 | static struct platform_driver * const drivers[] = { | ||
358 | &mpc52xx_wkup_gpiochip_driver, | ||
359 | &mpc52xx_simple_gpiochip_driver, | ||
360 | }; | ||
361 | |||
363 | static int __init mpc52xx_gpio_init(void) | 362 | static int __init mpc52xx_gpio_init(void) |
364 | { | 363 | { |
365 | if (platform_driver_register(&mpc52xx_wkup_gpiochip_driver)) | 364 | return platform_register_drivers(drivers, ARRAY_SIZE(drivers)); |
366 | printk(KERN_ERR "Unable to register wakeup GPIO driver\n"); | ||
367 | |||
368 | if (platform_driver_register(&mpc52xx_simple_gpiochip_driver)) | ||
369 | printk(KERN_ERR "Unable to register simple GPIO driver\n"); | ||
370 | |||
371 | return 0; | ||
372 | } | 365 | } |
373 | 366 | ||
374 | /* Make sure we get initialised before anyone else tries to use us */ | 367 | /* Make sure we get initialised before anyone else tries to use us */ |
@@ -376,9 +369,7 @@ subsys_initcall(mpc52xx_gpio_init); | |||
376 | 369 | ||
377 | static void __exit mpc52xx_gpio_exit(void) | 370 | static void __exit mpc52xx_gpio_exit(void) |
378 | { | 371 | { |
379 | platform_driver_unregister(&mpc52xx_wkup_gpiochip_driver); | 372 | platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); |
380 | |||
381 | platform_driver_unregister(&mpc52xx_simple_gpiochip_driver); | ||
382 | } | 373 | } |
383 | module_exit(mpc52xx_gpio_exit); | 374 | module_exit(mpc52xx_gpio_exit); |
384 | 375 | ||
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c index 48ef368347ab..9d40787e66c0 100644 --- a/drivers/gpio/gpio-mpc8xxx.c +++ b/drivers/gpio/gpio-mpc8xxx.c | |||
@@ -49,15 +49,10 @@ static inline u32 mpc8xxx_gpio2mask(unsigned int gpio) | |||
49 | return 1u << (MPC8XXX_GPIO_PINS - 1 - gpio); | 49 | return 1u << (MPC8XXX_GPIO_PINS - 1 - gpio); |
50 | } | 50 | } |
51 | 51 | ||
52 | static inline struct mpc8xxx_gpio_chip * | ||
53 | to_mpc8xxx_gpio_chip(struct of_mm_gpio_chip *mm) | ||
54 | { | ||
55 | return container_of(mm, struct mpc8xxx_gpio_chip, mm_gc); | ||
56 | } | ||
57 | |||
58 | static void mpc8xxx_gpio_save_regs(struct of_mm_gpio_chip *mm) | 52 | static void mpc8xxx_gpio_save_regs(struct of_mm_gpio_chip *mm) |
59 | { | 53 | { |
60 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); | 54 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = |
55 | container_of(mm, struct mpc8xxx_gpio_chip, mm_gc); | ||
61 | 56 | ||
62 | mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT); | 57 | mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT); |
63 | } | 58 | } |
@@ -71,7 +66,7 @@ static int mpc8572_gpio_get(struct gpio_chip *gc, unsigned int gpio) | |||
71 | { | 66 | { |
72 | u32 val; | 67 | u32 val; |
73 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); | 68 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); |
74 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); | 69 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); |
75 | u32 out_mask, out_shadow; | 70 | u32 out_mask, out_shadow; |
76 | 71 | ||
77 | out_mask = in_be32(mm->regs + GPIO_DIR); | 72 | out_mask = in_be32(mm->regs + GPIO_DIR); |
@@ -79,7 +74,7 @@ static int mpc8572_gpio_get(struct gpio_chip *gc, unsigned int gpio) | |||
79 | val = in_be32(mm->regs + GPIO_DAT) & ~out_mask; | 74 | val = in_be32(mm->regs + GPIO_DAT) & ~out_mask; |
80 | out_shadow = mpc8xxx_gc->data & out_mask; | 75 | out_shadow = mpc8xxx_gc->data & out_mask; |
81 | 76 | ||
82 | return (val | out_shadow) & mpc8xxx_gpio2mask(gpio); | 77 | return !!((val | out_shadow) & mpc8xxx_gpio2mask(gpio)); |
83 | } | 78 | } |
84 | 79 | ||
85 | static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio) | 80 | static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio) |
@@ -92,7 +87,7 @@ static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio) | |||
92 | static void mpc8xxx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | 87 | static void mpc8xxx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) |
93 | { | 88 | { |
94 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); | 89 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); |
95 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); | 90 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); |
96 | unsigned long flags; | 91 | unsigned long flags; |
97 | 92 | ||
98 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); | 93 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
@@ -111,7 +106,7 @@ static void mpc8xxx_gpio_set_multiple(struct gpio_chip *gc, | |||
111 | unsigned long *mask, unsigned long *bits) | 106 | unsigned long *mask, unsigned long *bits) |
112 | { | 107 | { |
113 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); | 108 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); |
114 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); | 109 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); |
115 | unsigned long flags; | 110 | unsigned long flags; |
116 | int i; | 111 | int i; |
117 | 112 | ||
@@ -136,7 +131,7 @@ static void mpc8xxx_gpio_set_multiple(struct gpio_chip *gc, | |||
136 | static int mpc8xxx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | 131 | static int mpc8xxx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) |
137 | { | 132 | { |
138 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); | 133 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); |
139 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); | 134 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); |
140 | unsigned long flags; | 135 | unsigned long flags; |
141 | 136 | ||
142 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); | 137 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
@@ -151,7 +146,7 @@ static int mpc8xxx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | |||
151 | static int mpc8xxx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | 146 | static int mpc8xxx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) |
152 | { | 147 | { |
153 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); | 148 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); |
154 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); | 149 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); |
155 | unsigned long flags; | 150 | unsigned long flags; |
156 | 151 | ||
157 | mpc8xxx_gpio_set(gc, gpio, val); | 152 | mpc8xxx_gpio_set(gc, gpio, val); |
@@ -185,8 +180,7 @@ static int mpc5125_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val | |||
185 | 180 | ||
186 | static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 181 | static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
187 | { | 182 | { |
188 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); | 183 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); |
189 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); | ||
190 | 184 | ||
191 | if (mpc8xxx_gc->irq && offset < MPC8XXX_GPIO_PINS) | 185 | if (mpc8xxx_gc->irq && offset < MPC8XXX_GPIO_PINS) |
192 | return irq_create_mapping(mpc8xxx_gc->irq, offset); | 186 | return irq_create_mapping(mpc8xxx_gc->irq, offset); |
@@ -417,7 +411,7 @@ static int mpc8xxx_probe(struct platform_device *pdev) | |||
417 | gc->set_multiple = mpc8xxx_gpio_set_multiple; | 411 | gc->set_multiple = mpc8xxx_gpio_set_multiple; |
418 | gc->to_irq = mpc8xxx_gpio_to_irq; | 412 | gc->to_irq = mpc8xxx_gpio_to_irq; |
419 | 413 | ||
420 | ret = of_mm_gpiochip_add(np, mm_gc); | 414 | ret = of_mm_gpiochip_add_data(np, mm_gc, mpc8xxx_gc); |
421 | if (ret) | 415 | if (ret) |
422 | return ret; | 416 | return ret; |
423 | 417 | ||
diff --git a/drivers/gpio/gpio-msic.c b/drivers/gpio/gpio-msic.c index 22523aae8abe..d75649787e6c 100644 --- a/drivers/gpio/gpio-msic.c +++ b/drivers/gpio/gpio-msic.c | |||
@@ -143,7 +143,7 @@ static int msic_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
143 | if (ret < 0) | 143 | if (ret < 0) |
144 | return ret; | 144 | return ret; |
145 | 145 | ||
146 | return r & MSIC_GPIO_DIN_MASK; | 146 | return !!(r & MSIC_GPIO_DIN_MASK); |
147 | } | 147 | } |
148 | 148 | ||
149 | static void msic_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 149 | static void msic_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
@@ -179,7 +179,7 @@ static int msic_irq_type(struct irq_data *data, unsigned type) | |||
179 | 179 | ||
180 | static int msic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 180 | static int msic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
181 | { | 181 | { |
182 | struct msic_gpio *mg = container_of(chip, struct msic_gpio, chip); | 182 | struct msic_gpio *mg = gpiochip_get_data(chip); |
183 | return mg->irq_base + offset; | 183 | return mg->irq_base + offset; |
184 | } | 184 | } |
185 | 185 | ||
@@ -293,11 +293,11 @@ static int platform_msic_gpio_probe(struct platform_device *pdev) | |||
293 | mg->chip.base = pdata->gpio_base; | 293 | mg->chip.base = pdata->gpio_base; |
294 | mg->chip.ngpio = MSIC_NUM_GPIO; | 294 | mg->chip.ngpio = MSIC_NUM_GPIO; |
295 | mg->chip.can_sleep = true; | 295 | mg->chip.can_sleep = true; |
296 | mg->chip.dev = dev; | 296 | mg->chip.parent = dev; |
297 | 297 | ||
298 | mutex_init(&mg->buslock); | 298 | mutex_init(&mg->buslock); |
299 | 299 | ||
300 | retval = gpiochip_add(&mg->chip); | 300 | retval = gpiochip_add_data(&mg->chip, mg); |
301 | if (retval) { | 301 | if (retval) { |
302 | dev_err(dev, "Adding MSIC gpio chip failed\n"); | 302 | dev_err(dev, "Adding MSIC gpio chip failed\n"); |
303 | goto err; | 303 | goto err; |
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index d428b97876c5..a5eacc1dff09 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c | |||
@@ -187,8 +187,7 @@ static void __iomem *mvebu_gpioreg_level_mask(struct mvebu_gpio_chip *mvchip) | |||
187 | 187 | ||
188 | static void mvebu_gpio_set(struct gpio_chip *chip, unsigned pin, int value) | 188 | static void mvebu_gpio_set(struct gpio_chip *chip, unsigned pin, int value) |
189 | { | 189 | { |
190 | struct mvebu_gpio_chip *mvchip = | 190 | struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); |
191 | container_of(chip, struct mvebu_gpio_chip, chip); | ||
192 | unsigned long flags; | 191 | unsigned long flags; |
193 | u32 u; | 192 | u32 u; |
194 | 193 | ||
@@ -204,8 +203,7 @@ static void mvebu_gpio_set(struct gpio_chip *chip, unsigned pin, int value) | |||
204 | 203 | ||
205 | static int mvebu_gpio_get(struct gpio_chip *chip, unsigned pin) | 204 | static int mvebu_gpio_get(struct gpio_chip *chip, unsigned pin) |
206 | { | 205 | { |
207 | struct mvebu_gpio_chip *mvchip = | 206 | struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); |
208 | container_of(chip, struct mvebu_gpio_chip, chip); | ||
209 | u32 u; | 207 | u32 u; |
210 | 208 | ||
211 | if (readl_relaxed(mvebu_gpioreg_io_conf(mvchip)) & (1 << pin)) { | 209 | if (readl_relaxed(mvebu_gpioreg_io_conf(mvchip)) & (1 << pin)) { |
@@ -220,8 +218,7 @@ static int mvebu_gpio_get(struct gpio_chip *chip, unsigned pin) | |||
220 | 218 | ||
221 | static void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value) | 219 | static void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value) |
222 | { | 220 | { |
223 | struct mvebu_gpio_chip *mvchip = | 221 | struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); |
224 | container_of(chip, struct mvebu_gpio_chip, chip); | ||
225 | unsigned long flags; | 222 | unsigned long flags; |
226 | u32 u; | 223 | u32 u; |
227 | 224 | ||
@@ -237,8 +234,7 @@ static void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value) | |||
237 | 234 | ||
238 | static int mvebu_gpio_direction_input(struct gpio_chip *chip, unsigned pin) | 235 | static int mvebu_gpio_direction_input(struct gpio_chip *chip, unsigned pin) |
239 | { | 236 | { |
240 | struct mvebu_gpio_chip *mvchip = | 237 | struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); |
241 | container_of(chip, struct mvebu_gpio_chip, chip); | ||
242 | unsigned long flags; | 238 | unsigned long flags; |
243 | int ret; | 239 | int ret; |
244 | u32 u; | 240 | u32 u; |
@@ -261,8 +257,7 @@ static int mvebu_gpio_direction_input(struct gpio_chip *chip, unsigned pin) | |||
261 | static int mvebu_gpio_direction_output(struct gpio_chip *chip, unsigned pin, | 257 | static int mvebu_gpio_direction_output(struct gpio_chip *chip, unsigned pin, |
262 | int value) | 258 | int value) |
263 | { | 259 | { |
264 | struct mvebu_gpio_chip *mvchip = | 260 | struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); |
265 | container_of(chip, struct mvebu_gpio_chip, chip); | ||
266 | unsigned long flags; | 261 | unsigned long flags; |
267 | int ret; | 262 | int ret; |
268 | u32 u; | 263 | u32 u; |
@@ -287,8 +282,7 @@ static int mvebu_gpio_direction_output(struct gpio_chip *chip, unsigned pin, | |||
287 | 282 | ||
288 | static int mvebu_gpio_to_irq(struct gpio_chip *chip, unsigned pin) | 283 | static int mvebu_gpio_to_irq(struct gpio_chip *chip, unsigned pin) |
289 | { | 284 | { |
290 | struct mvebu_gpio_chip *mvchip = | 285 | struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); |
291 | container_of(chip, struct mvebu_gpio_chip, chip); | ||
292 | return irq_create_mapping(mvchip->domain, pin); | 286 | return irq_create_mapping(mvchip->domain, pin); |
293 | } | 287 | } |
294 | 288 | ||
@@ -494,8 +488,7 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc) | |||
494 | 488 | ||
495 | static void mvebu_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | 489 | static void mvebu_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
496 | { | 490 | { |
497 | struct mvebu_gpio_chip *mvchip = | 491 | struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); |
498 | container_of(chip, struct mvebu_gpio_chip, chip); | ||
499 | u32 out, io_conf, blink, in_pol, data_in, cause, edg_msk, lvl_msk; | 492 | u32 out, io_conf, blink, in_pol, data_in, cause, edg_msk, lvl_msk; |
500 | int i; | 493 | int i; |
501 | 494 | ||
@@ -698,7 +691,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) | |||
698 | 691 | ||
699 | mvchip->soc_variant = soc_variant; | 692 | mvchip->soc_variant = soc_variant; |
700 | mvchip->chip.label = dev_name(&pdev->dev); | 693 | mvchip->chip.label = dev_name(&pdev->dev); |
701 | mvchip->chip.dev = &pdev->dev; | 694 | mvchip->chip.parent = &pdev->dev; |
702 | mvchip->chip.request = gpiochip_generic_request; | 695 | mvchip->chip.request = gpiochip_generic_request; |
703 | mvchip->chip.free = gpiochip_generic_free; | 696 | mvchip->chip.free = gpiochip_generic_free; |
704 | mvchip->chip.direction_input = mvebu_gpio_direction_input; | 697 | mvchip->chip.direction_input = mvebu_gpio_direction_input; |
@@ -763,7 +756,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) | |||
763 | BUG(); | 756 | BUG(); |
764 | } | 757 | } |
765 | 758 | ||
766 | gpiochip_add(&mvchip->chip); | 759 | gpiochip_add_data(&mvchip->chip, mvchip); |
767 | 760 | ||
768 | /* Some gpio controllers do not provide irq support */ | 761 | /* Some gpio controllers do not provide irq support */ |
769 | if (!of_irq_count(np)) | 762 | if (!of_irq_count(np)) |
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 6ea8df6c7397..7fd21cb53c81 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c | |||
@@ -26,10 +26,11 @@ | |||
26 | #include <linux/irq.h> | 26 | #include <linux/irq.h> |
27 | #include <linux/irqdomain.h> | 27 | #include <linux/irqdomain.h> |
28 | #include <linux/irqchip/chained_irq.h> | 28 | #include <linux/irqchip/chained_irq.h> |
29 | #include <linux/gpio.h> | ||
30 | #include <linux/platform_device.h> | 29 | #include <linux/platform_device.h> |
31 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
32 | #include <linux/basic_mmio_gpio.h> | 31 | #include <linux/gpio/driver.h> |
32 | /* FIXME: for gpio_get_value() replace this with direct register read */ | ||
33 | #include <linux/gpio.h> | ||
33 | #include <linux/of.h> | 34 | #include <linux/of.h> |
34 | #include <linux/of_device.h> | 35 | #include <linux/of_device.h> |
35 | #include <linux/module.h> | 36 | #include <linux/module.h> |
@@ -64,7 +65,7 @@ struct mxc_gpio_port { | |||
64 | int irq; | 65 | int irq; |
65 | int irq_high; | 66 | int irq_high; |
66 | struct irq_domain *domain; | 67 | struct irq_domain *domain; |
67 | struct bgpio_chip bgc; | 68 | struct gpio_chip gc; |
68 | u32 both_edges; | 69 | u32 both_edges; |
69 | }; | 70 | }; |
70 | 71 | ||
@@ -172,7 +173,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) | |||
172 | struct mxc_gpio_port *port = gc->private; | 173 | struct mxc_gpio_port *port = gc->private; |
173 | u32 bit, val; | 174 | u32 bit, val; |
174 | u32 gpio_idx = d->hwirq; | 175 | u32 gpio_idx = d->hwirq; |
175 | u32 gpio = port->bgc.gc.base + gpio_idx; | 176 | u32 gpio = port->gc.base + gpio_idx; |
176 | int edge; | 177 | int edge; |
177 | void __iomem *reg = port->base; | 178 | void __iomem *reg = port->base; |
178 | 179 | ||
@@ -398,9 +399,7 @@ static void mxc_gpio_get_hw(struct platform_device *pdev) | |||
398 | 399 | ||
399 | static int mxc_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 400 | static int mxc_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
400 | { | 401 | { |
401 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 402 | struct mxc_gpio_port *port = gpiochip_get_data(gc); |
402 | struct mxc_gpio_port *port = | ||
403 | container_of(bgc, struct mxc_gpio_port, bgc); | ||
404 | 403 | ||
405 | return irq_find_mapping(port->domain, offset); | 404 | return irq_find_mapping(port->domain, offset); |
406 | } | 405 | } |
@@ -451,7 +450,7 @@ static int mxc_gpio_probe(struct platform_device *pdev) | |||
451 | port); | 450 | port); |
452 | } | 451 | } |
453 | 452 | ||
454 | err = bgpio_init(&port->bgc, &pdev->dev, 4, | 453 | err = bgpio_init(&port->gc, &pdev->dev, 4, |
455 | port->base + GPIO_PSR, | 454 | port->base + GPIO_PSR, |
456 | port->base + GPIO_DR, NULL, | 455 | port->base + GPIO_DR, NULL, |
457 | port->base + GPIO_GDIR, NULL, | 456 | port->base + GPIO_GDIR, NULL, |
@@ -459,13 +458,13 @@ static int mxc_gpio_probe(struct platform_device *pdev) | |||
459 | if (err) | 458 | if (err) |
460 | goto out_bgio; | 459 | goto out_bgio; |
461 | 460 | ||
462 | port->bgc.gc.to_irq = mxc_gpio_to_irq; | 461 | port->gc.to_irq = mxc_gpio_to_irq; |
463 | port->bgc.gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 : | 462 | port->gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 : |
464 | pdev->id * 32; | 463 | pdev->id * 32; |
465 | 464 | ||
466 | err = gpiochip_add(&port->bgc.gc); | 465 | err = gpiochip_add_data(&port->gc, port); |
467 | if (err) | 466 | if (err) |
468 | goto out_bgpio_remove; | 467 | goto out_bgio; |
469 | 468 | ||
470 | irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id()); | 469 | irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id()); |
471 | if (irq_base < 0) { | 470 | if (irq_base < 0) { |
@@ -494,9 +493,7 @@ out_irqdomain_remove: | |||
494 | out_irqdesc_free: | 493 | out_irqdesc_free: |
495 | irq_free_descs(irq_base, 32); | 494 | irq_free_descs(irq_base, 32); |
496 | out_gpiochip_remove: | 495 | out_gpiochip_remove: |
497 | gpiochip_remove(&port->bgc.gc); | 496 | gpiochip_remove(&port->gc); |
498 | out_bgpio_remove: | ||
499 | bgpio_remove(&port->bgc); | ||
500 | out_bgio: | 497 | out_bgio: |
501 | dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); | 498 | dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); |
502 | return err; | 499 | return err; |
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index a4288f428819..b9daa0bf32a4 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c | |||
@@ -26,13 +26,14 @@ | |||
26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
27 | #include <linux/irq.h> | 27 | #include <linux/irq.h> |
28 | #include <linux/irqdomain.h> | 28 | #include <linux/irqdomain.h> |
29 | #include <linux/gpio.h> | ||
30 | #include <linux/of.h> | 29 | #include <linux/of.h> |
31 | #include <linux/of_address.h> | 30 | #include <linux/of_address.h> |
32 | #include <linux/of_device.h> | 31 | #include <linux/of_device.h> |
33 | #include <linux/platform_device.h> | 32 | #include <linux/platform_device.h> |
34 | #include <linux/slab.h> | 33 | #include <linux/slab.h> |
35 | #include <linux/basic_mmio_gpio.h> | 34 | #include <linux/gpio/driver.h> |
35 | /* FIXME: for gpio_get_value(), replace this by direct register read */ | ||
36 | #include <linux/gpio.h> | ||
36 | #include <linux/module.h> | 37 | #include <linux/module.h> |
37 | 38 | ||
38 | #define MXS_SET 0x4 | 39 | #define MXS_SET 0x4 |
@@ -64,7 +65,7 @@ struct mxs_gpio_port { | |||
64 | int id; | 65 | int id; |
65 | int irq; | 66 | int irq; |
66 | struct irq_domain *domain; | 67 | struct irq_domain *domain; |
67 | struct bgpio_chip bgc; | 68 | struct gpio_chip gc; |
68 | enum mxs_gpio_id devid; | 69 | enum mxs_gpio_id devid; |
69 | u32 both_edges; | 70 | u32 both_edges; |
70 | }; | 71 | }; |
@@ -93,7 +94,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) | |||
93 | port->both_edges &= ~pin_mask; | 94 | port->both_edges &= ~pin_mask; |
94 | switch (type) { | 95 | switch (type) { |
95 | case IRQ_TYPE_EDGE_BOTH: | 96 | case IRQ_TYPE_EDGE_BOTH: |
96 | val = gpio_get_value(port->bgc.gc.base + d->hwirq); | 97 | val = gpio_get_value(port->gc.base + d->hwirq); |
97 | if (val) | 98 | if (val) |
98 | edge = GPIO_INT_FALL_EDGE; | 99 | edge = GPIO_INT_FALL_EDGE; |
99 | else | 100 | else |
@@ -225,18 +226,14 @@ static int __init mxs_gpio_init_gc(struct mxs_gpio_port *port, int irq_base) | |||
225 | 226 | ||
226 | static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 227 | static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
227 | { | 228 | { |
228 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 229 | struct mxs_gpio_port *port = gpiochip_get_data(gc); |
229 | struct mxs_gpio_port *port = | ||
230 | container_of(bgc, struct mxs_gpio_port, bgc); | ||
231 | 230 | ||
232 | return irq_find_mapping(port->domain, offset); | 231 | return irq_find_mapping(port->domain, offset); |
233 | } | 232 | } |
234 | 233 | ||
235 | static int mxs_gpio_get_direction(struct gpio_chip *gc, unsigned offset) | 234 | static int mxs_gpio_get_direction(struct gpio_chip *gc, unsigned offset) |
236 | { | 235 | { |
237 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 236 | struct mxs_gpio_port *port = gpiochip_get_data(gc); |
238 | struct mxs_gpio_port *port = | ||
239 | container_of(bgc, struct mxs_gpio_port, bgc); | ||
240 | u32 mask = 1 << offset; | 237 | u32 mask = 1 << offset; |
241 | u32 dir; | 238 | u32 dir; |
242 | 239 | ||
@@ -330,26 +327,24 @@ static int mxs_gpio_probe(struct platform_device *pdev) | |||
330 | irq_set_chained_handler_and_data(port->irq, mxs_gpio_irq_handler, | 327 | irq_set_chained_handler_and_data(port->irq, mxs_gpio_irq_handler, |
331 | port); | 328 | port); |
332 | 329 | ||
333 | err = bgpio_init(&port->bgc, &pdev->dev, 4, | 330 | err = bgpio_init(&port->gc, &pdev->dev, 4, |
334 | port->base + PINCTRL_DIN(port), | 331 | port->base + PINCTRL_DIN(port), |
335 | port->base + PINCTRL_DOUT(port) + MXS_SET, | 332 | port->base + PINCTRL_DOUT(port) + MXS_SET, |
336 | port->base + PINCTRL_DOUT(port) + MXS_CLR, | 333 | port->base + PINCTRL_DOUT(port) + MXS_CLR, |
337 | port->base + PINCTRL_DOE(port), NULL, 0); | 334 | port->base + PINCTRL_DOE(port), NULL, 0); |
338 | if (err) | 335 | if (err) |
339 | goto out_irqdesc_free; | 336 | goto out_irqdomain_remove; |
340 | 337 | ||
341 | port->bgc.gc.to_irq = mxs_gpio_to_irq; | 338 | port->gc.to_irq = mxs_gpio_to_irq; |
342 | port->bgc.gc.get_direction = mxs_gpio_get_direction; | 339 | port->gc.get_direction = mxs_gpio_get_direction; |
343 | port->bgc.gc.base = port->id * 32; | 340 | port->gc.base = port->id * 32; |
344 | 341 | ||
345 | err = gpiochip_add(&port->bgc.gc); | 342 | err = gpiochip_add_data(&port->gc, port); |
346 | if (err) | 343 | if (err) |
347 | goto out_bgpio_remove; | 344 | goto out_irqdomain_remove; |
348 | 345 | ||
349 | return 0; | 346 | return 0; |
350 | 347 | ||
351 | out_bgpio_remove: | ||
352 | bgpio_remove(&port->bgc); | ||
353 | out_irqdomain_remove: | 348 | out_irqdomain_remove: |
354 | irq_domain_remove(port->domain); | 349 | irq_domain_remove(port->domain); |
355 | out_irqdesc_free: | 350 | out_irqdesc_free: |
diff --git a/drivers/gpio/gpio-octeon.c b/drivers/gpio/gpio-octeon.c index 62ae251d4490..7665ebcd0c1d 100644 --- a/drivers/gpio/gpio-octeon.c +++ b/drivers/gpio/gpio-octeon.c | |||
@@ -41,7 +41,7 @@ struct octeon_gpio { | |||
41 | 41 | ||
42 | static int octeon_gpio_dir_in(struct gpio_chip *chip, unsigned offset) | 42 | static int octeon_gpio_dir_in(struct gpio_chip *chip, unsigned offset) |
43 | { | 43 | { |
44 | struct octeon_gpio *gpio = container_of(chip, struct octeon_gpio, chip); | 44 | struct octeon_gpio *gpio = gpiochip_get_data(chip); |
45 | 45 | ||
46 | cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), 0); | 46 | cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), 0); |
47 | return 0; | 47 | return 0; |
@@ -49,7 +49,7 @@ static int octeon_gpio_dir_in(struct gpio_chip *chip, unsigned offset) | |||
49 | 49 | ||
50 | static void octeon_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 50 | static void octeon_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
51 | { | 51 | { |
52 | struct octeon_gpio *gpio = container_of(chip, struct octeon_gpio, chip); | 52 | struct octeon_gpio *gpio = gpiochip_get_data(chip); |
53 | u64 mask = 1ull << offset; | 53 | u64 mask = 1ull << offset; |
54 | u64 reg = gpio->register_base + (value ? TX_SET : TX_CLEAR); | 54 | u64 reg = gpio->register_base + (value ? TX_SET : TX_CLEAR); |
55 | cvmx_write_csr(reg, mask); | 55 | cvmx_write_csr(reg, mask); |
@@ -58,7 +58,7 @@ static void octeon_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
58 | static int octeon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, | 58 | static int octeon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, |
59 | int value) | 59 | int value) |
60 | { | 60 | { |
61 | struct octeon_gpio *gpio = container_of(chip, struct octeon_gpio, chip); | 61 | struct octeon_gpio *gpio = gpiochip_get_data(chip); |
62 | union cvmx_gpio_bit_cfgx cfgx; | 62 | union cvmx_gpio_bit_cfgx cfgx; |
63 | 63 | ||
64 | octeon_gpio_set(chip, offset, value); | 64 | octeon_gpio_set(chip, offset, value); |
@@ -72,7 +72,7 @@ static int octeon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, | |||
72 | 72 | ||
73 | static int octeon_gpio_get(struct gpio_chip *chip, unsigned offset) | 73 | static int octeon_gpio_get(struct gpio_chip *chip, unsigned offset) |
74 | { | 74 | { |
75 | struct octeon_gpio *gpio = container_of(chip, struct octeon_gpio, chip); | 75 | struct octeon_gpio *gpio = gpiochip_get_data(chip); |
76 | u64 read_bits = cvmx_read_csr(gpio->register_base + RX_DAT); | 76 | u64 read_bits = cvmx_read_csr(gpio->register_base + RX_DAT); |
77 | 77 | ||
78 | return ((1ull << offset) & read_bits) != 0; | 78 | return ((1ull << offset) & read_bits) != 0; |
@@ -108,7 +108,7 @@ static int octeon_gpio_probe(struct platform_device *pdev) | |||
108 | 108 | ||
109 | pdev->dev.platform_data = chip; | 109 | pdev->dev.platform_data = chip; |
110 | chip->label = "octeon-gpio"; | 110 | chip->label = "octeon-gpio"; |
111 | chip->dev = &pdev->dev; | 111 | chip->parent = &pdev->dev; |
112 | chip->owner = THIS_MODULE; | 112 | chip->owner = THIS_MODULE; |
113 | chip->base = 0; | 113 | chip->base = 0; |
114 | chip->can_sleep = false; | 114 | chip->can_sleep = false; |
@@ -117,7 +117,7 @@ static int octeon_gpio_probe(struct platform_device *pdev) | |||
117 | chip->get = octeon_gpio_get; | 117 | chip->get = octeon_gpio_get; |
118 | chip->direction_output = octeon_gpio_dir_out; | 118 | chip->direction_output = octeon_gpio_dir_out; |
119 | chip->set = octeon_gpio_set; | 119 | chip->set = octeon_gpio_set; |
120 | err = gpiochip_add(chip); | 120 | err = gpiochip_add_data(chip, gpio); |
121 | if (err) | 121 | if (err) |
122 | goto out; | 122 | goto out; |
123 | 123 | ||
@@ -128,7 +128,7 @@ out: | |||
128 | 128 | ||
129 | static int octeon_gpio_remove(struct platform_device *pdev) | 129 | static int octeon_gpio_remove(struct platform_device *pdev) |
130 | { | 130 | { |
131 | struct gpio_chip *chip = pdev->dev.platform_data; | 131 | struct gpio_chip *chip = dev_get_platdata(&pdev->dev); |
132 | gpiochip_remove(chip); | 132 | gpiochip_remove(chip); |
133 | return 0; | 133 | return 0; |
134 | } | 134 | } |
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index f7fbb46d5d79..189f672bebc1 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c | |||
@@ -93,7 +93,7 @@ static void omap_gpio_unmask_irq(struct irq_data *d); | |||
93 | static inline struct gpio_bank *omap_irq_data_get_bank(struct irq_data *d) | 93 | static inline struct gpio_bank *omap_irq_data_get_bank(struct irq_data *d) |
94 | { | 94 | { |
95 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | 95 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
96 | return container_of(chip, struct gpio_bank, chip); | 96 | return gpiochip_get_data(chip); |
97 | } | 97 | } |
98 | 98 | ||
99 | static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, | 99 | static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, |
@@ -661,7 +661,7 @@ static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) | |||
661 | 661 | ||
662 | static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) | 662 | static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) |
663 | { | 663 | { |
664 | struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); | 664 | struct gpio_bank *bank = gpiochip_get_data(chip); |
665 | unsigned long flags; | 665 | unsigned long flags; |
666 | 666 | ||
667 | /* | 667 | /* |
@@ -681,7 +681,7 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
681 | 681 | ||
682 | static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) | 682 | static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) |
683 | { | 683 | { |
684 | struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); | 684 | struct gpio_bank *bank = gpiochip_get_data(chip); |
685 | unsigned long flags; | 685 | unsigned long flags; |
686 | 686 | ||
687 | raw_spin_lock_irqsave(&bank->lock, flags); | 687 | raw_spin_lock_irqsave(&bank->lock, flags); |
@@ -954,7 +954,7 @@ static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | |||
954 | void __iomem *reg; | 954 | void __iomem *reg; |
955 | int dir; | 955 | int dir; |
956 | 956 | ||
957 | bank = container_of(chip, struct gpio_bank, chip); | 957 | bank = gpiochip_get_data(chip); |
958 | reg = bank->base + bank->regs->direction; | 958 | reg = bank->base + bank->regs->direction; |
959 | raw_spin_lock_irqsave(&bank->lock, flags); | 959 | raw_spin_lock_irqsave(&bank->lock, flags); |
960 | dir = !!(readl_relaxed(reg) & BIT(offset)); | 960 | dir = !!(readl_relaxed(reg) & BIT(offset)); |
@@ -967,7 +967,7 @@ static int omap_gpio_input(struct gpio_chip *chip, unsigned offset) | |||
967 | struct gpio_bank *bank; | 967 | struct gpio_bank *bank; |
968 | unsigned long flags; | 968 | unsigned long flags; |
969 | 969 | ||
970 | bank = container_of(chip, struct gpio_bank, chip); | 970 | bank = gpiochip_get_data(chip); |
971 | raw_spin_lock_irqsave(&bank->lock, flags); | 971 | raw_spin_lock_irqsave(&bank->lock, flags); |
972 | omap_set_gpio_direction(bank, offset, 1); | 972 | omap_set_gpio_direction(bank, offset, 1); |
973 | raw_spin_unlock_irqrestore(&bank->lock, flags); | 973 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
@@ -978,7 +978,7 @@ static int omap_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
978 | { | 978 | { |
979 | struct gpio_bank *bank; | 979 | struct gpio_bank *bank; |
980 | 980 | ||
981 | bank = container_of(chip, struct gpio_bank, chip); | 981 | bank = gpiochip_get_data(chip); |
982 | 982 | ||
983 | if (omap_gpio_is_input(bank, offset)) | 983 | if (omap_gpio_is_input(bank, offset)) |
984 | return omap_get_gpio_datain(bank, offset); | 984 | return omap_get_gpio_datain(bank, offset); |
@@ -991,7 +991,7 @@ static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value) | |||
991 | struct gpio_bank *bank; | 991 | struct gpio_bank *bank; |
992 | unsigned long flags; | 992 | unsigned long flags; |
993 | 993 | ||
994 | bank = container_of(chip, struct gpio_bank, chip); | 994 | bank = gpiochip_get_data(chip); |
995 | raw_spin_lock_irqsave(&bank->lock, flags); | 995 | raw_spin_lock_irqsave(&bank->lock, flags); |
996 | bank->set_dataout(bank, offset, value); | 996 | bank->set_dataout(bank, offset, value); |
997 | omap_set_gpio_direction(bank, offset, 0); | 997 | omap_set_gpio_direction(bank, offset, 0); |
@@ -1005,7 +1005,7 @@ static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset, | |||
1005 | struct gpio_bank *bank; | 1005 | struct gpio_bank *bank; |
1006 | unsigned long flags; | 1006 | unsigned long flags; |
1007 | 1007 | ||
1008 | bank = container_of(chip, struct gpio_bank, chip); | 1008 | bank = gpiochip_get_data(chip); |
1009 | 1009 | ||
1010 | raw_spin_lock_irqsave(&bank->lock, flags); | 1010 | raw_spin_lock_irqsave(&bank->lock, flags); |
1011 | omap2_set_gpio_debounce(bank, offset, debounce); | 1011 | omap2_set_gpio_debounce(bank, offset, debounce); |
@@ -1019,7 +1019,7 @@ static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
1019 | struct gpio_bank *bank; | 1019 | struct gpio_bank *bank; |
1020 | unsigned long flags; | 1020 | unsigned long flags; |
1021 | 1021 | ||
1022 | bank = container_of(chip, struct gpio_bank, chip); | 1022 | bank = gpiochip_get_data(chip); |
1023 | raw_spin_lock_irqsave(&bank->lock, flags); | 1023 | raw_spin_lock_irqsave(&bank->lock, flags); |
1024 | bank->set_dataout(bank, offset, value); | 1024 | bank->set_dataout(bank, offset, value); |
1025 | raw_spin_unlock_irqrestore(&bank->lock, flags); | 1025 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
@@ -1090,7 +1090,7 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) | |||
1090 | if (bank->is_mpuio) { | 1090 | if (bank->is_mpuio) { |
1091 | bank->chip.label = "mpuio"; | 1091 | bank->chip.label = "mpuio"; |
1092 | if (bank->regs->wkup_en) | 1092 | if (bank->regs->wkup_en) |
1093 | bank->chip.dev = &omap_mpuio_device.dev; | 1093 | bank->chip.parent = &omap_mpuio_device.dev; |
1094 | bank->chip.base = OMAP_MPUIO(0); | 1094 | bank->chip.base = OMAP_MPUIO(0); |
1095 | } else { | 1095 | } else { |
1096 | bank->chip.label = "gpio"; | 1096 | bank->chip.label = "gpio"; |
@@ -1098,7 +1098,7 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) | |||
1098 | } | 1098 | } |
1099 | bank->chip.ngpio = bank->width; | 1099 | bank->chip.ngpio = bank->width; |
1100 | 1100 | ||
1101 | ret = gpiochip_add(&bank->chip); | 1101 | ret = gpiochip_add_data(&bank->chip, bank); |
1102 | if (ret) { | 1102 | if (ret) { |
1103 | dev_err(bank->dev, "Could not register gpio chip %d\n", ret); | 1103 | dev_err(bank->dev, "Could not register gpio chip %d\n", ret); |
1104 | return ret; | 1104 | return ret; |
@@ -1197,7 +1197,7 @@ static int omap_gpio_probe(struct platform_device *pdev) | |||
1197 | } | 1197 | } |
1198 | 1198 | ||
1199 | bank->dev = dev; | 1199 | bank->dev = dev; |
1200 | bank->chip.dev = dev; | 1200 | bank->chip.parent = dev; |
1201 | bank->chip.owner = THIS_MODULE; | 1201 | bank->chip.owner = THIS_MODULE; |
1202 | bank->dbck_flag = pdata->dbck_flag; | 1202 | bank->dbck_flag = pdata->dbck_flag; |
1203 | bank->stride = pdata->bank_stride; | 1203 | bank->stride = pdata->bank_stride; |
diff --git a/drivers/gpio/gpio-palmas.c b/drivers/gpio/gpio-palmas.c index 52b447c071cb..fdfb3b1e0def 100644 --- a/drivers/gpio/gpio-palmas.c +++ b/drivers/gpio/gpio-palmas.c | |||
@@ -35,14 +35,9 @@ struct palmas_device_data { | |||
35 | int ngpio; | 35 | int ngpio; |
36 | }; | 36 | }; |
37 | 37 | ||
38 | static inline struct palmas_gpio *to_palmas_gpio(struct gpio_chip *chip) | ||
39 | { | ||
40 | return container_of(chip, struct palmas_gpio, gpio_chip); | ||
41 | } | ||
42 | |||
43 | static int palmas_gpio_get(struct gpio_chip *gc, unsigned offset) | 38 | static int palmas_gpio_get(struct gpio_chip *gc, unsigned offset) |
44 | { | 39 | { |
45 | struct palmas_gpio *pg = to_palmas_gpio(gc); | 40 | struct palmas_gpio *pg = gpiochip_get_data(gc); |
46 | struct palmas *palmas = pg->palmas; | 41 | struct palmas *palmas = pg->palmas; |
47 | unsigned int val; | 42 | unsigned int val; |
48 | int ret; | 43 | int ret; |
@@ -54,7 +49,7 @@ static int palmas_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
54 | 49 | ||
55 | ret = palmas_read(palmas, PALMAS_GPIO_BASE, reg, &val); | 50 | ret = palmas_read(palmas, PALMAS_GPIO_BASE, reg, &val); |
56 | if (ret < 0) { | 51 | if (ret < 0) { |
57 | dev_err(gc->dev, "Reg 0x%02x read failed, %d\n", reg, ret); | 52 | dev_err(gc->parent, "Reg 0x%02x read failed, %d\n", reg, ret); |
58 | return ret; | 53 | return ret; |
59 | } | 54 | } |
60 | 55 | ||
@@ -65,7 +60,7 @@ static int palmas_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
65 | 60 | ||
66 | ret = palmas_read(palmas, PALMAS_GPIO_BASE, reg, &val); | 61 | ret = palmas_read(palmas, PALMAS_GPIO_BASE, reg, &val); |
67 | if (ret < 0) { | 62 | if (ret < 0) { |
68 | dev_err(gc->dev, "Reg 0x%02x read failed, %d\n", reg, ret); | 63 | dev_err(gc->parent, "Reg 0x%02x read failed, %d\n", reg, ret); |
69 | return ret; | 64 | return ret; |
70 | } | 65 | } |
71 | return !!(val & BIT(offset)); | 66 | return !!(val & BIT(offset)); |
@@ -74,7 +69,7 @@ static int palmas_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
74 | static void palmas_gpio_set(struct gpio_chip *gc, unsigned offset, | 69 | static void palmas_gpio_set(struct gpio_chip *gc, unsigned offset, |
75 | int value) | 70 | int value) |
76 | { | 71 | { |
77 | struct palmas_gpio *pg = to_palmas_gpio(gc); | 72 | struct palmas_gpio *pg = gpiochip_get_data(gc); |
78 | struct palmas *palmas = pg->palmas; | 73 | struct palmas *palmas = pg->palmas; |
79 | int ret; | 74 | int ret; |
80 | unsigned int reg; | 75 | unsigned int reg; |
@@ -90,13 +85,13 @@ static void palmas_gpio_set(struct gpio_chip *gc, unsigned offset, | |||
90 | 85 | ||
91 | ret = palmas_write(palmas, PALMAS_GPIO_BASE, reg, BIT(offset)); | 86 | ret = palmas_write(palmas, PALMAS_GPIO_BASE, reg, BIT(offset)); |
92 | if (ret < 0) | 87 | if (ret < 0) |
93 | dev_err(gc->dev, "Reg 0x%02x write failed, %d\n", reg, ret); | 88 | dev_err(gc->parent, "Reg 0x%02x write failed, %d\n", reg, ret); |
94 | } | 89 | } |
95 | 90 | ||
96 | static int palmas_gpio_output(struct gpio_chip *gc, unsigned offset, | 91 | static int palmas_gpio_output(struct gpio_chip *gc, unsigned offset, |
97 | int value) | 92 | int value) |
98 | { | 93 | { |
99 | struct palmas_gpio *pg = to_palmas_gpio(gc); | 94 | struct palmas_gpio *pg = gpiochip_get_data(gc); |
100 | struct palmas *palmas = pg->palmas; | 95 | struct palmas *palmas = pg->palmas; |
101 | int ret; | 96 | int ret; |
102 | unsigned int reg; | 97 | unsigned int reg; |
@@ -111,13 +106,14 @@ static int palmas_gpio_output(struct gpio_chip *gc, unsigned offset, | |||
111 | ret = palmas_update_bits(palmas, PALMAS_GPIO_BASE, reg, | 106 | ret = palmas_update_bits(palmas, PALMAS_GPIO_BASE, reg, |
112 | BIT(offset), BIT(offset)); | 107 | BIT(offset), BIT(offset)); |
113 | if (ret < 0) | 108 | if (ret < 0) |
114 | dev_err(gc->dev, "Reg 0x%02x update failed, %d\n", reg, ret); | 109 | dev_err(gc->parent, "Reg 0x%02x update failed, %d\n", reg, |
110 | ret); | ||
115 | return ret; | 111 | return ret; |
116 | } | 112 | } |
117 | 113 | ||
118 | static int palmas_gpio_input(struct gpio_chip *gc, unsigned offset) | 114 | static int palmas_gpio_input(struct gpio_chip *gc, unsigned offset) |
119 | { | 115 | { |
120 | struct palmas_gpio *pg = to_palmas_gpio(gc); | 116 | struct palmas_gpio *pg = gpiochip_get_data(gc); |
121 | struct palmas *palmas = pg->palmas; | 117 | struct palmas *palmas = pg->palmas; |
122 | int ret; | 118 | int ret; |
123 | unsigned int reg; | 119 | unsigned int reg; |
@@ -128,13 +124,14 @@ static int palmas_gpio_input(struct gpio_chip *gc, unsigned offset) | |||
128 | 124 | ||
129 | ret = palmas_update_bits(palmas, PALMAS_GPIO_BASE, reg, BIT(offset), 0); | 125 | ret = palmas_update_bits(palmas, PALMAS_GPIO_BASE, reg, BIT(offset), 0); |
130 | if (ret < 0) | 126 | if (ret < 0) |
131 | dev_err(gc->dev, "Reg 0x%02x update failed, %d\n", reg, ret); | 127 | dev_err(gc->parent, "Reg 0x%02x update failed, %d\n", reg, |
128 | ret); | ||
132 | return ret; | 129 | return ret; |
133 | } | 130 | } |
134 | 131 | ||
135 | static int palmas_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 132 | static int palmas_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
136 | { | 133 | { |
137 | struct palmas_gpio *pg = to_palmas_gpio(gc); | 134 | struct palmas_gpio *pg = gpiochip_get_data(gc); |
138 | struct palmas *palmas = pg->palmas; | 135 | struct palmas *palmas = pg->palmas; |
139 | 136 | ||
140 | return palmas_irq_get_virq(palmas, PALMAS_GPIO_0_IRQ + offset); | 137 | return palmas_irq_get_virq(palmas, PALMAS_GPIO_0_IRQ + offset); |
@@ -188,7 +185,7 @@ static int palmas_gpio_probe(struct platform_device *pdev) | |||
188 | palmas_gpio->gpio_chip.to_irq = palmas_gpio_to_irq; | 185 | palmas_gpio->gpio_chip.to_irq = palmas_gpio_to_irq; |
189 | palmas_gpio->gpio_chip.set = palmas_gpio_set; | 186 | palmas_gpio->gpio_chip.set = palmas_gpio_set; |
190 | palmas_gpio->gpio_chip.get = palmas_gpio_get; | 187 | palmas_gpio->gpio_chip.get = palmas_gpio_get; |
191 | palmas_gpio->gpio_chip.dev = &pdev->dev; | 188 | palmas_gpio->gpio_chip.parent = &pdev->dev; |
192 | #ifdef CONFIG_OF_GPIO | 189 | #ifdef CONFIG_OF_GPIO |
193 | palmas_gpio->gpio_chip.of_node = pdev->dev.of_node; | 190 | palmas_gpio->gpio_chip.of_node = pdev->dev.of_node; |
194 | #endif | 191 | #endif |
@@ -198,7 +195,7 @@ static int palmas_gpio_probe(struct platform_device *pdev) | |||
198 | else | 195 | else |
199 | palmas_gpio->gpio_chip.base = -1; | 196 | palmas_gpio->gpio_chip.base = -1; |
200 | 197 | ||
201 | ret = gpiochip_add(&palmas_gpio->gpio_chip); | 198 | ret = gpiochip_add_data(&palmas_gpio->gpio_chip, palmas_gpio); |
202 | if (ret < 0) { | 199 | if (ret < 0) { |
203 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); | 200 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); |
204 | return ret; | 201 | return ret; |
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 2d4892cc70fb..23196c5fc17c 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c | |||
@@ -18,9 +18,7 @@ | |||
18 | #include <linux/i2c.h> | 18 | #include <linux/i2c.h> |
19 | #include <linux/platform_data/pca953x.h> | 19 | #include <linux/platform_data/pca953x.h> |
20 | #include <linux/slab.h> | 20 | #include <linux/slab.h> |
21 | #ifdef CONFIG_OF_GPIO | ||
22 | #include <linux/of_platform.h> | 21 | #include <linux/of_platform.h> |
23 | #endif | ||
24 | #include <linux/acpi.h> | 22 | #include <linux/acpi.h> |
25 | 23 | ||
26 | #define PCA953X_INPUT 0 | 24 | #define PCA953X_INPUT 0 |
@@ -109,11 +107,6 @@ struct pca953x_chip { | |||
109 | unsigned long driver_data; | 107 | unsigned long driver_data; |
110 | }; | 108 | }; |
111 | 109 | ||
112 | static inline struct pca953x_chip *to_pca(struct gpio_chip *gc) | ||
113 | { | ||
114 | return container_of(gc, struct pca953x_chip, gpio_chip); | ||
115 | } | ||
116 | |||
117 | static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, | 110 | static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, |
118 | int off) | 111 | int off) |
119 | { | 112 | { |
@@ -216,7 +209,7 @@ static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) | |||
216 | 209 | ||
217 | static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) | 210 | static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
218 | { | 211 | { |
219 | struct pca953x_chip *chip = to_pca(gc); | 212 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
220 | u8 reg_val; | 213 | u8 reg_val; |
221 | int ret, offset = 0; | 214 | int ret, offset = 0; |
222 | 215 | ||
@@ -245,7 +238,7 @@ exit: | |||
245 | static int pca953x_gpio_direction_output(struct gpio_chip *gc, | 238 | static int pca953x_gpio_direction_output(struct gpio_chip *gc, |
246 | unsigned off, int val) | 239 | unsigned off, int val) |
247 | { | 240 | { |
248 | struct pca953x_chip *chip = to_pca(gc); | 241 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
249 | u8 reg_val; | 242 | u8 reg_val; |
250 | int ret, offset = 0; | 243 | int ret, offset = 0; |
251 | 244 | ||
@@ -295,7 +288,7 @@ exit: | |||
295 | 288 | ||
296 | static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) | 289 | static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) |
297 | { | 290 | { |
298 | struct pca953x_chip *chip = to_pca(gc); | 291 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
299 | u32 reg_val; | 292 | u32 reg_val; |
300 | int ret, offset = 0; | 293 | int ret, offset = 0; |
301 | 294 | ||
@@ -323,7 +316,7 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) | |||
323 | 316 | ||
324 | static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) | 317 | static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) |
325 | { | 318 | { |
326 | struct pca953x_chip *chip = to_pca(gc); | 319 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
327 | u8 reg_val; | 320 | u8 reg_val; |
328 | int ret, offset = 0; | 321 | int ret, offset = 0; |
329 | 322 | ||
@@ -352,6 +345,43 @@ exit: | |||
352 | mutex_unlock(&chip->i2c_lock); | 345 | mutex_unlock(&chip->i2c_lock); |
353 | } | 346 | } |
354 | 347 | ||
348 | |||
349 | static void pca953x_gpio_set_multiple(struct gpio_chip *gc, | ||
350 | unsigned long *mask, unsigned long *bits) | ||
351 | { | ||
352 | struct pca953x_chip *chip = gpiochip_get_data(gc); | ||
353 | u8 reg_val[MAX_BANK]; | ||
354 | int ret, offset = 0; | ||
355 | int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); | ||
356 | int bank; | ||
357 | |||
358 | switch (chip->chip_type) { | ||
359 | case PCA953X_TYPE: | ||
360 | offset = PCA953X_OUTPUT; | ||
361 | break; | ||
362 | case PCA957X_TYPE: | ||
363 | offset = PCA957X_OUT; | ||
364 | break; | ||
365 | } | ||
366 | |||
367 | memcpy(reg_val, chip->reg_output, NBANK(chip)); | ||
368 | mutex_lock(&chip->i2c_lock); | ||
369 | for(bank=0; bank<NBANK(chip); bank++) { | ||
370 | unsigned bankmask = mask[bank/4] >> ((bank % 4) * 8); | ||
371 | if(bankmask) { | ||
372 | unsigned bankval = bits[bank/4] >> ((bank % 4) * 8); | ||
373 | reg_val[bank] = (reg_val[bank] & ~bankmask) | bankval; | ||
374 | } | ||
375 | } | ||
376 | ret = i2c_smbus_write_i2c_block_data(chip->client, offset << bank_shift, NBANK(chip), reg_val); | ||
377 | if (ret) | ||
378 | goto exit; | ||
379 | |||
380 | memcpy(chip->reg_output, reg_val, NBANK(chip)); | ||
381 | exit: | ||
382 | mutex_unlock(&chip->i2c_lock); | ||
383 | } | ||
384 | |||
355 | static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) | 385 | static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) |
356 | { | 386 | { |
357 | struct gpio_chip *gc; | 387 | struct gpio_chip *gc; |
@@ -362,12 +392,13 @@ static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) | |||
362 | gc->direction_output = pca953x_gpio_direction_output; | 392 | gc->direction_output = pca953x_gpio_direction_output; |
363 | gc->get = pca953x_gpio_get_value; | 393 | gc->get = pca953x_gpio_get_value; |
364 | gc->set = pca953x_gpio_set_value; | 394 | gc->set = pca953x_gpio_set_value; |
395 | gc->set_multiple = pca953x_gpio_set_multiple; | ||
365 | gc->can_sleep = true; | 396 | gc->can_sleep = true; |
366 | 397 | ||
367 | gc->base = chip->gpio_start; | 398 | gc->base = chip->gpio_start; |
368 | gc->ngpio = gpios; | 399 | gc->ngpio = gpios; |
369 | gc->label = chip->client->name; | 400 | gc->label = chip->client->name; |
370 | gc->dev = &chip->client->dev; | 401 | gc->parent = &chip->client->dev; |
371 | gc->owner = THIS_MODULE; | 402 | gc->owner = THIS_MODULE; |
372 | gc->names = chip->names; | 403 | gc->names = chip->names; |
373 | } | 404 | } |
@@ -376,7 +407,7 @@ static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) | |||
376 | static void pca953x_irq_mask(struct irq_data *d) | 407 | static void pca953x_irq_mask(struct irq_data *d) |
377 | { | 408 | { |
378 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 409 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
379 | struct pca953x_chip *chip = to_pca(gc); | 410 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
380 | 411 | ||
381 | chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); | 412 | chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); |
382 | } | 413 | } |
@@ -384,7 +415,7 @@ static void pca953x_irq_mask(struct irq_data *d) | |||
384 | static void pca953x_irq_unmask(struct irq_data *d) | 415 | static void pca953x_irq_unmask(struct irq_data *d) |
385 | { | 416 | { |
386 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 417 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
387 | struct pca953x_chip *chip = to_pca(gc); | 418 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
388 | 419 | ||
389 | chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); | 420 | chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); |
390 | } | 421 | } |
@@ -392,7 +423,7 @@ static void pca953x_irq_unmask(struct irq_data *d) | |||
392 | static void pca953x_irq_bus_lock(struct irq_data *d) | 423 | static void pca953x_irq_bus_lock(struct irq_data *d) |
393 | { | 424 | { |
394 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 425 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
395 | struct pca953x_chip *chip = to_pca(gc); | 426 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
396 | 427 | ||
397 | mutex_lock(&chip->irq_lock); | 428 | mutex_lock(&chip->irq_lock); |
398 | } | 429 | } |
@@ -400,7 +431,7 @@ static void pca953x_irq_bus_lock(struct irq_data *d) | |||
400 | static void pca953x_irq_bus_sync_unlock(struct irq_data *d) | 431 | static void pca953x_irq_bus_sync_unlock(struct irq_data *d) |
401 | { | 432 | { |
402 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 433 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
403 | struct pca953x_chip *chip = to_pca(gc); | 434 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
404 | u8 new_irqs; | 435 | u8 new_irqs; |
405 | int level, i; | 436 | int level, i; |
406 | 437 | ||
@@ -423,7 +454,7 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) | |||
423 | static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) | 454 | static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) |
424 | { | 455 | { |
425 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 456 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
426 | struct pca953x_chip *chip = to_pca(gc); | 457 | struct pca953x_chip *chip = gpiochip_get_data(gc); |
427 | int bank_nb = d->hwirq / BANK_SZ; | 458 | int bank_nb = d->hwirq / BANK_SZ; |
428 | u8 mask = 1 << (d->hwirq % BANK_SZ); | 459 | u8 mask = 1 << (d->hwirq % BANK_SZ); |
429 | 460 | ||
@@ -660,6 +691,8 @@ out: | |||
660 | return ret; | 691 | return ret; |
661 | } | 692 | } |
662 | 693 | ||
694 | static const struct of_device_id pca953x_dt_ids[]; | ||
695 | |||
663 | static int pca953x_probe(struct i2c_client *client, | 696 | static int pca953x_probe(struct i2c_client *client, |
664 | const struct i2c_device_id *id) | 697 | const struct i2c_device_id *id) |
665 | { | 698 | { |
@@ -691,12 +724,18 @@ static int pca953x_probe(struct i2c_client *client, | |||
691 | chip->driver_data = id->driver_data; | 724 | chip->driver_data = id->driver_data; |
692 | } else { | 725 | } else { |
693 | const struct acpi_device_id *id; | 726 | const struct acpi_device_id *id; |
727 | const struct of_device_id *match; | ||
694 | 728 | ||
695 | id = acpi_match_device(pca953x_acpi_ids, &client->dev); | 729 | match = of_match_device(pca953x_dt_ids, &client->dev); |
696 | if (!id) | 730 | if (match) { |
697 | return -ENODEV; | 731 | chip->driver_data = (int)(uintptr_t)match->data; |
732 | } else { | ||
733 | id = acpi_match_device(pca953x_acpi_ids, &client->dev); | ||
734 | if (!id) | ||
735 | return -ENODEV; | ||
698 | 736 | ||
699 | chip->driver_data = id->driver_data; | 737 | chip->driver_data = id->driver_data; |
738 | } | ||
700 | } | 739 | } |
701 | 740 | ||
702 | chip->chip_type = PCA_CHIP_TYPE(chip->driver_data); | 741 | chip->chip_type = PCA_CHIP_TYPE(chip->driver_data); |
@@ -715,7 +754,7 @@ static int pca953x_probe(struct i2c_client *client, | |||
715 | if (ret) | 754 | if (ret) |
716 | return ret; | 755 | return ret; |
717 | 756 | ||
718 | ret = gpiochip_add(&chip->gpio_chip); | 757 | ret = gpiochip_add_data(&chip->gpio_chip, chip); |
719 | if (ret) | 758 | if (ret) |
720 | return ret; | 759 | return ret; |
721 | 760 | ||
@@ -755,33 +794,39 @@ static int pca953x_remove(struct i2c_client *client) | |||
755 | return 0; | 794 | return 0; |
756 | } | 795 | } |
757 | 796 | ||
797 | /* convenience to stop overlong match-table lines */ | ||
798 | #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) | ||
799 | #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) | ||
800 | |||
758 | static const struct of_device_id pca953x_dt_ids[] = { | 801 | static const struct of_device_id pca953x_dt_ids[] = { |
759 | { .compatible = "nxp,pca9505", }, | 802 | { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, |
760 | { .compatible = "nxp,pca9534", }, | 803 | { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, |
761 | { .compatible = "nxp,pca9535", }, | 804 | { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, |
762 | { .compatible = "nxp,pca9536", }, | 805 | { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, |
763 | { .compatible = "nxp,pca9537", }, | 806 | { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, |
764 | { .compatible = "nxp,pca9538", }, | 807 | { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, |
765 | { .compatible = "nxp,pca9539", }, | 808 | { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, |
766 | { .compatible = "nxp,pca9554", }, | 809 | { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), }, |
767 | { .compatible = "nxp,pca9555", }, | 810 | { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, |
768 | { .compatible = "nxp,pca9556", }, | 811 | { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), }, |
769 | { .compatible = "nxp,pca9557", }, | 812 | { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), }, |
770 | { .compatible = "nxp,pca9574", }, | 813 | { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), }, |
771 | { .compatible = "nxp,pca9575", }, | 814 | { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, |
772 | { .compatible = "nxp,pca9698", }, | 815 | { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, |
773 | 816 | ||
774 | { .compatible = "maxim,max7310", }, | 817 | { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, |
775 | { .compatible = "maxim,max7312", }, | 818 | { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, |
776 | { .compatible = "maxim,max7313", }, | 819 | { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, |
777 | { .compatible = "maxim,max7315", }, | 820 | { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, |
778 | 821 | ||
779 | { .compatible = "ti,pca6107", }, | 822 | { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, |
780 | { .compatible = "ti,tca6408", }, | 823 | { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, |
781 | { .compatible = "ti,tca6416", }, | 824 | { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, |
782 | { .compatible = "ti,tca6424", }, | 825 | { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, |
783 | 826 | ||
784 | { .compatible = "exar,xra1202", }, | 827 | { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), }, |
828 | |||
829 | { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), }, | ||
785 | { } | 830 | { } |
786 | }; | 831 | }; |
787 | 832 | ||
diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c index 1d4d9bc8b69d..709cd3fc2a70 100644 --- a/drivers/gpio/gpio-pcf857x.c +++ b/drivers/gpio/gpio-pcf857x.c | |||
@@ -137,7 +137,7 @@ static int i2c_read_le16(struct i2c_client *client) | |||
137 | 137 | ||
138 | static int pcf857x_input(struct gpio_chip *chip, unsigned offset) | 138 | static int pcf857x_input(struct gpio_chip *chip, unsigned offset) |
139 | { | 139 | { |
140 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | 140 | struct pcf857x *gpio = gpiochip_get_data(chip); |
141 | int status; | 141 | int status; |
142 | 142 | ||
143 | mutex_lock(&gpio->lock); | 143 | mutex_lock(&gpio->lock); |
@@ -150,16 +150,16 @@ static int pcf857x_input(struct gpio_chip *chip, unsigned offset) | |||
150 | 150 | ||
151 | static int pcf857x_get(struct gpio_chip *chip, unsigned offset) | 151 | static int pcf857x_get(struct gpio_chip *chip, unsigned offset) |
152 | { | 152 | { |
153 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | 153 | struct pcf857x *gpio = gpiochip_get_data(chip); |
154 | int value; | 154 | int value; |
155 | 155 | ||
156 | value = gpio->read(gpio->client); | 156 | value = gpio->read(gpio->client); |
157 | return (value < 0) ? 0 : (value & (1 << offset)); | 157 | return (value < 0) ? value : !!(value & (1 << offset)); |
158 | } | 158 | } |
159 | 159 | ||
160 | static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value) | 160 | static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value) |
161 | { | 161 | { |
162 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | 162 | struct pcf857x *gpio = gpiochip_get_data(chip); |
163 | unsigned bit = 1 << offset; | 163 | unsigned bit = 1 << offset; |
164 | int status; | 164 | int status; |
165 | 165 | ||
@@ -293,7 +293,7 @@ static int pcf857x_probe(struct i2c_client *client, | |||
293 | 293 | ||
294 | gpio->chip.base = pdata ? pdata->gpio_base : -1; | 294 | gpio->chip.base = pdata ? pdata->gpio_base : -1; |
295 | gpio->chip.can_sleep = true; | 295 | gpio->chip.can_sleep = true; |
296 | gpio->chip.dev = &client->dev; | 296 | gpio->chip.parent = &client->dev; |
297 | gpio->chip.owner = THIS_MODULE; | 297 | gpio->chip.owner = THIS_MODULE; |
298 | gpio->chip.get = pcf857x_get; | 298 | gpio->chip.get = pcf857x_get; |
299 | gpio->chip.set = pcf857x_set; | 299 | gpio->chip.set = pcf857x_set; |
@@ -372,7 +372,7 @@ static int pcf857x_probe(struct i2c_client *client, | |||
372 | gpio->out = ~n_latch; | 372 | gpio->out = ~n_latch; |
373 | gpio->status = gpio->out; | 373 | gpio->status = gpio->out; |
374 | 374 | ||
375 | status = gpiochip_add(&gpio->chip); | 375 | status = gpiochip_add_data(&gpio->chip, gpio); |
376 | if (status < 0) | 376 | if (status < 0) |
377 | goto fail; | 377 | goto fail; |
378 | 378 | ||
@@ -447,7 +447,6 @@ static int pcf857x_remove(struct i2c_client *client) | |||
447 | static struct i2c_driver pcf857x_driver = { | 447 | static struct i2c_driver pcf857x_driver = { |
448 | .driver = { | 448 | .driver = { |
449 | .name = "pcf857x", | 449 | .name = "pcf857x", |
450 | .owner = THIS_MODULE, | ||
451 | .of_match_table = of_match_ptr(pcf857x_of_table), | 450 | .of_match_table = of_match_ptr(pcf857x_of_table), |
452 | }, | 451 | }, |
453 | .probe = pcf857x_probe, | 452 | .probe = pcf857x_probe, |
diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index 34ed176df15a..7c7135da5d4a 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c | |||
@@ -109,7 +109,7 @@ struct pch_gpio { | |||
109 | static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) | 109 | static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) |
110 | { | 110 | { |
111 | u32 reg_val; | 111 | u32 reg_val; |
112 | struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); | 112 | struct pch_gpio *chip = gpiochip_get_data(gpio); |
113 | unsigned long flags; | 113 | unsigned long flags; |
114 | 114 | ||
115 | spin_lock_irqsave(&chip->spinlock, flags); | 115 | spin_lock_irqsave(&chip->spinlock, flags); |
@@ -125,15 +125,15 @@ static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) | |||
125 | 125 | ||
126 | static int pch_gpio_get(struct gpio_chip *gpio, unsigned nr) | 126 | static int pch_gpio_get(struct gpio_chip *gpio, unsigned nr) |
127 | { | 127 | { |
128 | struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); | 128 | struct pch_gpio *chip = gpiochip_get_data(gpio); |
129 | 129 | ||
130 | return ioread32(&chip->reg->pi) & (1 << nr); | 130 | return (ioread32(&chip->reg->pi) >> nr) & 1; |
131 | } | 131 | } |
132 | 132 | ||
133 | static int pch_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, | 133 | static int pch_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, |
134 | int val) | 134 | int val) |
135 | { | 135 | { |
136 | struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); | 136 | struct pch_gpio *chip = gpiochip_get_data(gpio); |
137 | u32 pm; | 137 | u32 pm; |
138 | u32 reg_val; | 138 | u32 reg_val; |
139 | unsigned long flags; | 139 | unsigned long flags; |
@@ -158,7 +158,7 @@ static int pch_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, | |||
158 | 158 | ||
159 | static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) | 159 | static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) |
160 | { | 160 | { |
161 | struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); | 161 | struct pch_gpio *chip = gpiochip_get_data(gpio); |
162 | u32 pm; | 162 | u32 pm; |
163 | unsigned long flags; | 163 | unsigned long flags; |
164 | 164 | ||
@@ -211,7 +211,7 @@ static void pch_gpio_restore_reg_conf(struct pch_gpio *chip) | |||
211 | 211 | ||
212 | static int pch_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) | 212 | static int pch_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) |
213 | { | 213 | { |
214 | struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); | 214 | struct pch_gpio *chip = gpiochip_get_data(gpio); |
215 | return chip->irq_base + offset; | 215 | return chip->irq_base + offset; |
216 | } | 216 | } |
217 | 217 | ||
@@ -220,7 +220,7 @@ static void pch_gpio_setup(struct pch_gpio *chip) | |||
220 | struct gpio_chip *gpio = &chip->gpio; | 220 | struct gpio_chip *gpio = &chip->gpio; |
221 | 221 | ||
222 | gpio->label = dev_name(chip->dev); | 222 | gpio->label = dev_name(chip->dev); |
223 | gpio->dev = chip->dev; | 223 | gpio->parent = chip->dev; |
224 | gpio->owner = THIS_MODULE; | 224 | gpio->owner = THIS_MODULE; |
225 | gpio->direction_input = pch_gpio_direction_input; | 225 | gpio->direction_input = pch_gpio_direction_input; |
226 | gpio->get = pch_gpio_get; | 226 | gpio->get = pch_gpio_get; |
@@ -394,7 +394,10 @@ static int pch_gpio_probe(struct pci_dev *pdev, | |||
394 | pci_set_drvdata(pdev, chip); | 394 | pci_set_drvdata(pdev, chip); |
395 | spin_lock_init(&chip->spinlock); | 395 | spin_lock_init(&chip->spinlock); |
396 | pch_gpio_setup(chip); | 396 | pch_gpio_setup(chip); |
397 | ret = gpiochip_add(&chip->gpio); | 397 | #ifdef CONFIG_OF_GPIO |
398 | chip->gpio.of_node = pdev->dev.of_node; | ||
399 | #endif | ||
400 | ret = gpiochip_add_data(&chip->gpio, chip); | ||
398 | if (ret) { | 401 | if (ret) { |
399 | dev_err(&pdev->dev, "PCH gpio: Failed to register GPIO\n"); | 402 | dev_err(&pdev->dev, "PCH gpio: Failed to register GPIO\n"); |
400 | goto err_gpiochip_add; | 403 | goto err_gpiochip_add; |
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index 4d4b37676702..5cb38212bbc0 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/module.h> | 14 | #include <linux/module.h> |
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | #include <linux/ioport.h> | 16 | #include <linux/ioport.h> |
17 | #include <linux/interrupt.h> | ||
17 | #include <linux/irq.h> | 18 | #include <linux/irq.h> |
18 | #include <linux/irqchip/chained_irq.h> | 19 | #include <linux/irqchip/chained_irq.h> |
19 | #include <linux/bitops.h> | 20 | #include <linux/bitops.h> |
@@ -60,7 +61,7 @@ struct pl061_gpio { | |||
60 | 61 | ||
61 | static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) | 62 | static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) |
62 | { | 63 | { |
63 | struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); | 64 | struct pl061_gpio *chip = gpiochip_get_data(gc); |
64 | unsigned long flags; | 65 | unsigned long flags; |
65 | unsigned char gpiodir; | 66 | unsigned char gpiodir; |
66 | 67 | ||
@@ -79,7 +80,7 @@ static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) | |||
79 | static int pl061_direction_output(struct gpio_chip *gc, unsigned offset, | 80 | static int pl061_direction_output(struct gpio_chip *gc, unsigned offset, |
80 | int value) | 81 | int value) |
81 | { | 82 | { |
82 | struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); | 83 | struct pl061_gpio *chip = gpiochip_get_data(gc); |
83 | unsigned long flags; | 84 | unsigned long flags; |
84 | unsigned char gpiodir; | 85 | unsigned char gpiodir; |
85 | 86 | ||
@@ -104,14 +105,14 @@ static int pl061_direction_output(struct gpio_chip *gc, unsigned offset, | |||
104 | 105 | ||
105 | static int pl061_get_value(struct gpio_chip *gc, unsigned offset) | 106 | static int pl061_get_value(struct gpio_chip *gc, unsigned offset) |
106 | { | 107 | { |
107 | struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); | 108 | struct pl061_gpio *chip = gpiochip_get_data(gc); |
108 | 109 | ||
109 | return !!readb(chip->base + (BIT(offset + 2))); | 110 | return !!readb(chip->base + (BIT(offset + 2))); |
110 | } | 111 | } |
111 | 112 | ||
112 | static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value) | 113 | static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value) |
113 | { | 114 | { |
114 | struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); | 115 | struct pl061_gpio *chip = gpiochip_get_data(gc); |
115 | 116 | ||
116 | writeb(!!value << offset, chip->base + (BIT(offset + 2))); | 117 | writeb(!!value << offset, chip->base + (BIT(offset + 2))); |
117 | } | 118 | } |
@@ -119,7 +120,7 @@ static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value) | |||
119 | static int pl061_irq_type(struct irq_data *d, unsigned trigger) | 120 | static int pl061_irq_type(struct irq_data *d, unsigned trigger) |
120 | { | 121 | { |
121 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 122 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
122 | struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); | 123 | struct pl061_gpio *chip = gpiochip_get_data(gc); |
123 | int offset = irqd_to_hwirq(d); | 124 | int offset = irqd_to_hwirq(d); |
124 | unsigned long flags; | 125 | unsigned long flags; |
125 | u8 gpiois, gpioibe, gpioiev; | 126 | u8 gpiois, gpioibe, gpioiev; |
@@ -131,7 +132,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger) | |||
131 | if ((trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) && | 132 | if ((trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) && |
132 | (trigger & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))) | 133 | (trigger & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))) |
133 | { | 134 | { |
134 | dev_err(gc->dev, | 135 | dev_err(gc->parent, |
135 | "trying to configure line %d for both level and edge " | 136 | "trying to configure line %d for both level and edge " |
136 | "detection, choose one!\n", | 137 | "detection, choose one!\n", |
137 | offset); | 138 | offset); |
@@ -158,7 +159,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger) | |||
158 | else | 159 | else |
159 | gpioiev &= ~bit; | 160 | gpioiev &= ~bit; |
160 | irq_set_handler_locked(d, handle_level_irq); | 161 | irq_set_handler_locked(d, handle_level_irq); |
161 | dev_dbg(gc->dev, "line %d: IRQ on %s level\n", | 162 | dev_dbg(gc->parent, "line %d: IRQ on %s level\n", |
162 | offset, | 163 | offset, |
163 | polarity ? "HIGH" : "LOW"); | 164 | polarity ? "HIGH" : "LOW"); |
164 | } else if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { | 165 | } else if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { |
@@ -167,7 +168,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger) | |||
167 | /* Select both edges, setting this makes GPIOEV be ignored */ | 168 | /* Select both edges, setting this makes GPIOEV be ignored */ |
168 | gpioibe |= bit; | 169 | gpioibe |= bit; |
169 | irq_set_handler_locked(d, handle_edge_irq); | 170 | irq_set_handler_locked(d, handle_edge_irq); |
170 | dev_dbg(gc->dev, "line %d: IRQ on both edges\n", offset); | 171 | dev_dbg(gc->parent, "line %d: IRQ on both edges\n", offset); |
171 | } else if ((trigger & IRQ_TYPE_EDGE_RISING) || | 172 | } else if ((trigger & IRQ_TYPE_EDGE_RISING) || |
172 | (trigger & IRQ_TYPE_EDGE_FALLING)) { | 173 | (trigger & IRQ_TYPE_EDGE_FALLING)) { |
173 | bool rising = trigger & IRQ_TYPE_EDGE_RISING; | 174 | bool rising = trigger & IRQ_TYPE_EDGE_RISING; |
@@ -182,7 +183,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger) | |||
182 | else | 183 | else |
183 | gpioiev &= ~bit; | 184 | gpioiev &= ~bit; |
184 | irq_set_handler_locked(d, handle_edge_irq); | 185 | irq_set_handler_locked(d, handle_edge_irq); |
185 | dev_dbg(gc->dev, "line %d: IRQ on %s edge\n", | 186 | dev_dbg(gc->parent, "line %d: IRQ on %s edge\n", |
186 | offset, | 187 | offset, |
187 | rising ? "RISING" : "FALLING"); | 188 | rising ? "RISING" : "FALLING"); |
188 | } else { | 189 | } else { |
@@ -191,7 +192,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger) | |||
191 | gpioibe &= ~bit; | 192 | gpioibe &= ~bit; |
192 | gpioiev &= ~bit; | 193 | gpioiev &= ~bit; |
193 | irq_set_handler_locked(d, handle_bad_irq); | 194 | irq_set_handler_locked(d, handle_bad_irq); |
194 | dev_warn(gc->dev, "no trigger selected for line %d\n", | 195 | dev_warn(gc->parent, "no trigger selected for line %d\n", |
195 | offset); | 196 | offset); |
196 | } | 197 | } |
197 | 198 | ||
@@ -209,7 +210,7 @@ static void pl061_irq_handler(struct irq_desc *desc) | |||
209 | unsigned long pending; | 210 | unsigned long pending; |
210 | int offset; | 211 | int offset; |
211 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 212 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
212 | struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); | 213 | struct pl061_gpio *chip = gpiochip_get_data(gc); |
213 | struct irq_chip *irqchip = irq_desc_get_chip(desc); | 214 | struct irq_chip *irqchip = irq_desc_get_chip(desc); |
214 | 215 | ||
215 | chained_irq_enter(irqchip, desc); | 216 | chained_irq_enter(irqchip, desc); |
@@ -227,7 +228,7 @@ static void pl061_irq_handler(struct irq_desc *desc) | |||
227 | static void pl061_irq_mask(struct irq_data *d) | 228 | static void pl061_irq_mask(struct irq_data *d) |
228 | { | 229 | { |
229 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 230 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
230 | struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); | 231 | struct pl061_gpio *chip = gpiochip_get_data(gc); |
231 | u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); | 232 | u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); |
232 | u8 gpioie; | 233 | u8 gpioie; |
233 | 234 | ||
@@ -240,7 +241,7 @@ static void pl061_irq_mask(struct irq_data *d) | |||
240 | static void pl061_irq_unmask(struct irq_data *d) | 241 | static void pl061_irq_unmask(struct irq_data *d) |
241 | { | 242 | { |
242 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 243 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
243 | struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); | 244 | struct pl061_gpio *chip = gpiochip_get_data(gc); |
244 | u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); | 245 | u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); |
245 | u8 gpioie; | 246 | u8 gpioie; |
246 | 247 | ||
@@ -261,7 +262,7 @@ static void pl061_irq_unmask(struct irq_data *d) | |||
261 | static void pl061_irq_ack(struct irq_data *d) | 262 | static void pl061_irq_ack(struct irq_data *d) |
262 | { | 263 | { |
263 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 264 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
264 | struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); | 265 | struct pl061_gpio *chip = gpiochip_get_data(gc); |
265 | u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); | 266 | u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); |
266 | 267 | ||
267 | spin_lock(&chip->lock); | 268 | spin_lock(&chip->lock); |
@@ -269,12 +270,20 @@ static void pl061_irq_ack(struct irq_data *d) | |||
269 | spin_unlock(&chip->lock); | 270 | spin_unlock(&chip->lock); |
270 | } | 271 | } |
271 | 272 | ||
273 | static int pl061_irq_set_wake(struct irq_data *d, unsigned int state) | ||
274 | { | ||
275 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | ||
276 | |||
277 | return irq_set_irq_wake(gc->irq_parent, state); | ||
278 | } | ||
279 | |||
272 | static struct irq_chip pl061_irqchip = { | 280 | static struct irq_chip pl061_irqchip = { |
273 | .name = "pl061", | 281 | .name = "pl061", |
274 | .irq_ack = pl061_irq_ack, | 282 | .irq_ack = pl061_irq_ack, |
275 | .irq_mask = pl061_irq_mask, | 283 | .irq_mask = pl061_irq_mask, |
276 | .irq_unmask = pl061_irq_unmask, | 284 | .irq_unmask = pl061_irq_unmask, |
277 | .irq_set_type = pl061_irq_type, | 285 | .irq_set_type = pl061_irq_type, |
286 | .irq_set_wake = pl061_irq_set_wake, | ||
278 | }; | 287 | }; |
279 | 288 | ||
280 | static int pl061_probe(struct amba_device *adev, const struct amba_id *id) | 289 | static int pl061_probe(struct amba_device *adev, const struct amba_id *id) |
@@ -316,10 +325,10 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) | |||
316 | chip->gc.set = pl061_set_value; | 325 | chip->gc.set = pl061_set_value; |
317 | chip->gc.ngpio = PL061_GPIO_NR; | 326 | chip->gc.ngpio = PL061_GPIO_NR; |
318 | chip->gc.label = dev_name(dev); | 327 | chip->gc.label = dev_name(dev); |
319 | chip->gc.dev = dev; | 328 | chip->gc.parent = dev; |
320 | chip->gc.owner = THIS_MODULE; | 329 | chip->gc.owner = THIS_MODULE; |
321 | 330 | ||
322 | ret = gpiochip_add(&chip->gc); | 331 | ret = gpiochip_add_data(&chip->gc, chip); |
323 | if (ret) | 332 | if (ret) |
324 | return ret; | 333 | return ret; |
325 | 334 | ||
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index df2ce550f309..b2b7b78664b8 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/of.h> | 25 | #include <linux/of.h> |
26 | #include <linux/of_device.h> | 26 | #include <linux/of_device.h> |
27 | #include <linux/pinctrl/consumer.h> | ||
27 | #include <linux/platform_device.h> | 28 | #include <linux/platform_device.h> |
28 | #include <linux/syscore_ops.h> | 29 | #include <linux/syscore_ops.h> |
29 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
@@ -64,20 +65,11 @@ | |||
64 | int pxa_last_gpio; | 65 | int pxa_last_gpio; |
65 | static int irq_base; | 66 | static int irq_base; |
66 | 67 | ||
67 | #ifdef CONFIG_OF | 68 | struct pxa_gpio_bank { |
68 | static struct irq_domain *domain; | ||
69 | static struct device_node *pxa_gpio_of_node; | ||
70 | #endif | ||
71 | |||
72 | struct pxa_gpio_chip { | ||
73 | struct gpio_chip chip; | ||
74 | void __iomem *regbase; | 69 | void __iomem *regbase; |
75 | char label[10]; | ||
76 | |||
77 | unsigned long irq_mask; | 70 | unsigned long irq_mask; |
78 | unsigned long irq_edge_rise; | 71 | unsigned long irq_edge_rise; |
79 | unsigned long irq_edge_fall; | 72 | unsigned long irq_edge_fall; |
80 | int (*set_wake)(unsigned int gpio, unsigned int on); | ||
81 | 73 | ||
82 | #ifdef CONFIG_PM | 74 | #ifdef CONFIG_PM |
83 | unsigned long saved_gplr; | 75 | unsigned long saved_gplr; |
@@ -87,6 +79,17 @@ struct pxa_gpio_chip { | |||
87 | #endif | 79 | #endif |
88 | }; | 80 | }; |
89 | 81 | ||
82 | struct pxa_gpio_chip { | ||
83 | struct device *dev; | ||
84 | struct gpio_chip chip; | ||
85 | struct pxa_gpio_bank *banks; | ||
86 | struct irq_domain *irqdomain; | ||
87 | |||
88 | int irq0; | ||
89 | int irq1; | ||
90 | int (*set_wake)(unsigned int gpio, unsigned int on); | ||
91 | }; | ||
92 | |||
90 | enum pxa_gpio_type { | 93 | enum pxa_gpio_type { |
91 | PXA25X_GPIO = 0, | 94 | PXA25X_GPIO = 0, |
92 | PXA26X_GPIO, | 95 | PXA26X_GPIO, |
@@ -104,9 +107,8 @@ struct pxa_gpio_id { | |||
104 | }; | 107 | }; |
105 | 108 | ||
106 | static DEFINE_SPINLOCK(gpio_lock); | 109 | static DEFINE_SPINLOCK(gpio_lock); |
107 | static struct pxa_gpio_chip *pxa_gpio_chips; | 110 | static struct pxa_gpio_chip *pxa_gpio_chip; |
108 | static enum pxa_gpio_type gpio_type; | 111 | static enum pxa_gpio_type gpio_type; |
109 | static void __iomem *gpio_reg_base; | ||
110 | 112 | ||
111 | static struct pxa_gpio_id pxa25x_id = { | 113 | static struct pxa_gpio_id pxa25x_id = { |
112 | .type = PXA25X_GPIO, | 114 | .type = PXA25X_GPIO, |
@@ -148,17 +150,28 @@ static struct pxa_gpio_id pxa1928_id = { | |||
148 | .gpio_nums = 224, | 150 | .gpio_nums = 224, |
149 | }; | 151 | }; |
150 | 152 | ||
151 | #define for_each_gpio_chip(i, c) \ | 153 | #define for_each_gpio_bank(i, b, pc) \ |
152 | for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++) | 154 | for (i = 0, b = pc->banks; i <= pxa_last_gpio; i += 32, b++) |
153 | 155 | ||
154 | static inline void __iomem *gpio_chip_base(struct gpio_chip *c) | 156 | static inline struct pxa_gpio_chip *chip_to_pxachip(struct gpio_chip *c) |
155 | { | 157 | { |
156 | return container_of(c, struct pxa_gpio_chip, chip)->regbase; | 158 | struct pxa_gpio_chip *pxa_chip = gpiochip_get_data(c); |
159 | |||
160 | return pxa_chip; | ||
157 | } | 161 | } |
158 | 162 | ||
159 | static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio) | 163 | static inline void __iomem *gpio_bank_base(struct gpio_chip *c, int gpio) |
160 | { | 164 | { |
161 | return &pxa_gpio_chips[gpio_to_bank(gpio)]; | 165 | struct pxa_gpio_chip *p = gpiochip_get_data(c); |
166 | struct pxa_gpio_bank *bank = p->banks + (gpio / 32); | ||
167 | |||
168 | return bank->regbase; | ||
169 | } | ||
170 | |||
171 | static inline struct pxa_gpio_bank *gpio_to_pxabank(struct gpio_chip *c, | ||
172 | unsigned gpio) | ||
173 | { | ||
174 | return chip_to_pxachip(c)->banks + gpio / 32; | ||
162 | } | 175 | } |
163 | 176 | ||
164 | static inline int gpio_is_pxa_type(int type) | 177 | static inline int gpio_is_pxa_type(int type) |
@@ -187,15 +200,13 @@ static inline int __gpio_is_inverted(int gpio) | |||
187 | * is attributed as "occupied" here (I know this terminology isn't | 200 | * is attributed as "occupied" here (I know this terminology isn't |
188 | * accurate, you are welcome to propose a better one :-) | 201 | * accurate, you are welcome to propose a better one :-) |
189 | */ | 202 | */ |
190 | static inline int __gpio_is_occupied(unsigned gpio) | 203 | static inline int __gpio_is_occupied(struct pxa_gpio_chip *pchip, unsigned gpio) |
191 | { | 204 | { |
192 | struct pxa_gpio_chip *pxachip; | ||
193 | void __iomem *base; | 205 | void __iomem *base; |
194 | unsigned long gafr = 0, gpdr = 0; | 206 | unsigned long gafr = 0, gpdr = 0; |
195 | int ret, af = 0, dir = 0; | 207 | int ret, af = 0, dir = 0; |
196 | 208 | ||
197 | pxachip = gpio_to_pxachip(gpio); | 209 | base = gpio_bank_base(&pchip->chip, gpio); |
198 | base = gpio_chip_base(&pxachip->chip); | ||
199 | gpdr = readl_relaxed(base + GPDR_OFFSET); | 210 | gpdr = readl_relaxed(base + GPDR_OFFSET); |
200 | 211 | ||
201 | switch (gpio_type) { | 212 | switch (gpio_type) { |
@@ -218,21 +229,35 @@ static inline int __gpio_is_occupied(unsigned gpio) | |||
218 | return ret; | 229 | return ret; |
219 | } | 230 | } |
220 | 231 | ||
221 | static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 232 | int pxa_irq_to_gpio(int irq) |
222 | { | 233 | { |
223 | return chip->base + offset + irq_base; | 234 | struct pxa_gpio_chip *pchip = pxa_gpio_chip; |
235 | int irq_gpio0; | ||
236 | |||
237 | irq_gpio0 = irq_find_mapping(pchip->irqdomain, 0); | ||
238 | if (irq_gpio0 > 0) | ||
239 | return irq - irq_gpio0; | ||
240 | |||
241 | return irq_gpio0; | ||
224 | } | 242 | } |
225 | 243 | ||
226 | int pxa_irq_to_gpio(int irq) | 244 | static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
227 | { | 245 | { |
228 | return irq - irq_base; | 246 | struct pxa_gpio_chip *pchip = chip_to_pxachip(chip); |
247 | |||
248 | return irq_find_mapping(pchip->irqdomain, offset); | ||
229 | } | 249 | } |
230 | 250 | ||
231 | static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 251 | static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
232 | { | 252 | { |
233 | void __iomem *base = gpio_chip_base(chip); | 253 | void __iomem *base = gpio_bank_base(chip, offset); |
234 | uint32_t value, mask = 1 << offset; | 254 | uint32_t value, mask = GPIO_bit(offset); |
235 | unsigned long flags; | 255 | unsigned long flags; |
256 | int ret; | ||
257 | |||
258 | ret = pinctrl_gpio_direction_input(chip->base + offset); | ||
259 | if (!ret) | ||
260 | return 0; | ||
236 | 261 | ||
237 | spin_lock_irqsave(&gpio_lock, flags); | 262 | spin_lock_irqsave(&gpio_lock, flags); |
238 | 263 | ||
@@ -250,12 +275,17 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
250 | static int pxa_gpio_direction_output(struct gpio_chip *chip, | 275 | static int pxa_gpio_direction_output(struct gpio_chip *chip, |
251 | unsigned offset, int value) | 276 | unsigned offset, int value) |
252 | { | 277 | { |
253 | void __iomem *base = gpio_chip_base(chip); | 278 | void __iomem *base = gpio_bank_base(chip, offset); |
254 | uint32_t tmp, mask = 1 << offset; | 279 | uint32_t tmp, mask = GPIO_bit(offset); |
255 | unsigned long flags; | 280 | unsigned long flags; |
281 | int ret; | ||
256 | 282 | ||
257 | writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET)); | 283 | writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET)); |
258 | 284 | ||
285 | ret = pinctrl_gpio_direction_output(chip->base + offset); | ||
286 | if (!ret) | ||
287 | return 0; | ||
288 | |||
259 | spin_lock_irqsave(&gpio_lock, flags); | 289 | spin_lock_irqsave(&gpio_lock, flags); |
260 | 290 | ||
261 | tmp = readl_relaxed(base + GPDR_OFFSET); | 291 | tmp = readl_relaxed(base + GPDR_OFFSET); |
@@ -271,14 +301,18 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip, | |||
271 | 301 | ||
272 | static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset) | 302 | static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset) |
273 | { | 303 | { |
274 | u32 gplr = readl_relaxed(gpio_chip_base(chip) + GPLR_OFFSET); | 304 | void __iomem *base = gpio_bank_base(chip, offset); |
275 | return !!(gplr & (1 << offset)); | 305 | u32 gplr = readl_relaxed(base + GPLR_OFFSET); |
306 | |||
307 | return !!(gplr & GPIO_bit(offset)); | ||
276 | } | 308 | } |
277 | 309 | ||
278 | static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 310 | static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
279 | { | 311 | { |
280 | writel_relaxed(1 << offset, gpio_chip_base(chip) + | 312 | void __iomem *base = gpio_bank_base(chip, offset); |
281 | (value ? GPSR_OFFSET : GPCR_OFFSET)); | 313 | |
314 | writel_relaxed(GPIO_bit(offset), | ||
315 | base + (value ? GPSR_OFFSET : GPCR_OFFSET)); | ||
282 | } | 316 | } |
283 | 317 | ||
284 | #ifdef CONFIG_OF_GPIO | 318 | #ifdef CONFIG_OF_GPIO |
@@ -289,61 +323,61 @@ static int pxa_gpio_of_xlate(struct gpio_chip *gc, | |||
289 | if (gpiospec->args[0] > pxa_last_gpio) | 323 | if (gpiospec->args[0] > pxa_last_gpio) |
290 | return -EINVAL; | 324 | return -EINVAL; |
291 | 325 | ||
292 | if (gc != &pxa_gpio_chips[gpiospec->args[0] / 32].chip) | ||
293 | return -EINVAL; | ||
294 | |||
295 | if (flags) | 326 | if (flags) |
296 | *flags = gpiospec->args[1]; | 327 | *flags = gpiospec->args[1]; |
297 | 328 | ||
298 | return gpiospec->args[0] % 32; | 329 | return gpiospec->args[0]; |
299 | } | 330 | } |
300 | #endif | 331 | #endif |
301 | 332 | ||
302 | static int pxa_init_gpio_chip(int gpio_end, | 333 | static int pxa_gpio_request(struct gpio_chip *chip, unsigned int offset) |
303 | int (*set_wake)(unsigned int, unsigned int)) | ||
304 | { | 334 | { |
305 | int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1; | 335 | return pinctrl_request_gpio(chip->base + offset); |
306 | struct pxa_gpio_chip *chips; | 336 | } |
307 | |||
308 | chips = kzalloc(nbanks * sizeof(struct pxa_gpio_chip), GFP_KERNEL); | ||
309 | if (chips == NULL) { | ||
310 | pr_err("%s: failed to allocate GPIO chips\n", __func__); | ||
311 | return -ENOMEM; | ||
312 | } | ||
313 | 337 | ||
314 | for (i = 0, gpio = 0; i < nbanks; i++, gpio += 32) { | 338 | static void pxa_gpio_free(struct gpio_chip *chip, unsigned int offset) |
315 | struct gpio_chip *c = &chips[i].chip; | 339 | { |
340 | pinctrl_free_gpio(chip->base + offset); | ||
341 | } | ||
316 | 342 | ||
317 | sprintf(chips[i].label, "gpio-%d", i); | 343 | static int pxa_init_gpio_chip(struct pxa_gpio_chip *pchip, int ngpio, |
318 | chips[i].regbase = gpio_reg_base + BANK_OFF(i); | 344 | struct device_node *np, void __iomem *regbase) |
319 | chips[i].set_wake = set_wake; | 345 | { |
346 | int i, gpio, nbanks = DIV_ROUND_UP(ngpio, 32); | ||
347 | struct pxa_gpio_bank *bank; | ||
320 | 348 | ||
321 | c->base = gpio; | 349 | pchip->banks = devm_kcalloc(pchip->dev, nbanks, sizeof(*pchip->banks), |
322 | c->label = chips[i].label; | 350 | GFP_KERNEL); |
351 | if (!pchip->banks) | ||
352 | return -ENOMEM; | ||
323 | 353 | ||
324 | c->direction_input = pxa_gpio_direction_input; | 354 | pchip->chip.label = "gpio-pxa"; |
325 | c->direction_output = pxa_gpio_direction_output; | 355 | pchip->chip.direction_input = pxa_gpio_direction_input; |
326 | c->get = pxa_gpio_get; | 356 | pchip->chip.direction_output = pxa_gpio_direction_output; |
327 | c->set = pxa_gpio_set; | 357 | pchip->chip.get = pxa_gpio_get; |
328 | c->to_irq = pxa_gpio_to_irq; | 358 | pchip->chip.set = pxa_gpio_set; |
359 | pchip->chip.to_irq = pxa_gpio_to_irq; | ||
360 | pchip->chip.ngpio = ngpio; | ||
361 | pchip->chip.request = pxa_gpio_request; | ||
362 | pchip->chip.free = pxa_gpio_free; | ||
329 | #ifdef CONFIG_OF_GPIO | 363 | #ifdef CONFIG_OF_GPIO |
330 | c->of_node = pxa_gpio_of_node; | 364 | pchip->chip.of_node = np; |
331 | c->of_xlate = pxa_gpio_of_xlate; | 365 | pchip->chip.of_xlate = pxa_gpio_of_xlate; |
332 | c->of_gpio_n_cells = 2; | 366 | pchip->chip.of_gpio_n_cells = 2; |
333 | #endif | 367 | #endif |
334 | 368 | ||
335 | /* number of GPIOs on last bank may be less than 32 */ | 369 | for (i = 0, gpio = 0; i < nbanks; i++, gpio += 32) { |
336 | c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32; | 370 | bank = pchip->banks + i; |
337 | gpiochip_add(c); | 371 | bank->regbase = regbase + BANK_OFF(i); |
338 | } | 372 | } |
339 | pxa_gpio_chips = chips; | 373 | |
340 | return 0; | 374 | return gpiochip_add_data(&pchip->chip, pchip); |
341 | } | 375 | } |
342 | 376 | ||
343 | /* Update only those GRERx and GFERx edge detection register bits if those | 377 | /* Update only those GRERx and GFERx edge detection register bits if those |
344 | * bits are set in c->irq_mask | 378 | * bits are set in c->irq_mask |
345 | */ | 379 | */ |
346 | static inline void update_edge_detect(struct pxa_gpio_chip *c) | 380 | static inline void update_edge_detect(struct pxa_gpio_bank *c) |
347 | { | 381 | { |
348 | uint32_t grer, gfer; | 382 | uint32_t grer, gfer; |
349 | 383 | ||
@@ -357,12 +391,11 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c) | |||
357 | 391 | ||
358 | static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) | 392 | static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) |
359 | { | 393 | { |
360 | struct pxa_gpio_chip *c; | 394 | struct pxa_gpio_chip *pchip = irq_data_get_irq_chip_data(d); |
361 | int gpio = pxa_irq_to_gpio(d->irq); | 395 | unsigned int gpio = irqd_to_hwirq(d); |
396 | struct pxa_gpio_bank *c = gpio_to_pxabank(&pchip->chip, gpio); | ||
362 | unsigned long gpdr, mask = GPIO_bit(gpio); | 397 | unsigned long gpdr, mask = GPIO_bit(gpio); |
363 | 398 | ||
364 | c = gpio_to_pxachip(gpio); | ||
365 | |||
366 | if (type == IRQ_TYPE_PROBE) { | 399 | if (type == IRQ_TYPE_PROBE) { |
367 | /* Don't mess with enabled GPIOs using preconfigured edges or | 400 | /* Don't mess with enabled GPIOs using preconfigured edges or |
368 | * GPIOs set to alternate function or to output during probe | 401 | * GPIOs set to alternate function or to output during probe |
@@ -370,7 +403,7 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) | |||
370 | if ((c->irq_edge_rise | c->irq_edge_fall) & GPIO_bit(gpio)) | 403 | if ((c->irq_edge_rise | c->irq_edge_fall) & GPIO_bit(gpio)) |
371 | return 0; | 404 | return 0; |
372 | 405 | ||
373 | if (__gpio_is_occupied(gpio)) | 406 | if (__gpio_is_occupied(pchip, gpio)) |
374 | return 0; | 407 | return 0; |
375 | 408 | ||
376 | type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; | 409 | type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; |
@@ -401,20 +434,16 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) | |||
401 | return 0; | 434 | return 0; |
402 | } | 435 | } |
403 | 436 | ||
404 | static void pxa_gpio_demux_handler(struct irq_desc *desc) | 437 | static irqreturn_t pxa_gpio_demux_handler(int in_irq, void *d) |
405 | { | 438 | { |
406 | struct pxa_gpio_chip *c; | 439 | int loop, gpio, n, handled = 0; |
407 | int loop, gpio, gpio_base, n; | ||
408 | unsigned long gedr; | 440 | unsigned long gedr; |
409 | struct irq_chip *chip = irq_desc_get_chip(desc); | 441 | struct pxa_gpio_chip *pchip = d; |
410 | 442 | struct pxa_gpio_bank *c; | |
411 | chained_irq_enter(chip, desc); | ||
412 | 443 | ||
413 | do { | 444 | do { |
414 | loop = 0; | 445 | loop = 0; |
415 | for_each_gpio_chip(gpio, c) { | 446 | for_each_gpio_bank(gpio, c, pchip) { |
416 | gpio_base = c->chip.base; | ||
417 | |||
418 | gedr = readl_relaxed(c->regbase + GEDR_OFFSET); | 447 | gedr = readl_relaxed(c->regbase + GEDR_OFFSET); |
419 | gedr = gedr & c->irq_mask; | 448 | gedr = gedr & c->irq_mask; |
420 | writel_relaxed(gedr, c->regbase + GEDR_OFFSET); | 449 | writel_relaxed(gedr, c->regbase + GEDR_OFFSET); |
@@ -422,51 +451,71 @@ static void pxa_gpio_demux_handler(struct irq_desc *desc) | |||
422 | for_each_set_bit(n, &gedr, BITS_PER_LONG) { | 451 | for_each_set_bit(n, &gedr, BITS_PER_LONG) { |
423 | loop = 1; | 452 | loop = 1; |
424 | 453 | ||
425 | generic_handle_irq(gpio_to_irq(gpio_base + n)); | 454 | generic_handle_irq(gpio_to_irq(gpio + n)); |
426 | } | 455 | } |
427 | } | 456 | } |
457 | handled += loop; | ||
428 | } while (loop); | 458 | } while (loop); |
429 | 459 | ||
430 | chained_irq_exit(chip, desc); | 460 | return handled ? IRQ_HANDLED : IRQ_NONE; |
461 | } | ||
462 | |||
463 | static irqreturn_t pxa_gpio_direct_handler(int in_irq, void *d) | ||
464 | { | ||
465 | struct pxa_gpio_chip *pchip = d; | ||
466 | |||
467 | if (in_irq == pchip->irq0) { | ||
468 | generic_handle_irq(gpio_to_irq(0)); | ||
469 | } else if (in_irq == pchip->irq1) { | ||
470 | generic_handle_irq(gpio_to_irq(1)); | ||
471 | } else { | ||
472 | pr_err("%s() unknown irq %d\n", __func__, in_irq); | ||
473 | return IRQ_NONE; | ||
474 | } | ||
475 | return IRQ_HANDLED; | ||
431 | } | 476 | } |
432 | 477 | ||
433 | static void pxa_ack_muxed_gpio(struct irq_data *d) | 478 | static void pxa_ack_muxed_gpio(struct irq_data *d) |
434 | { | 479 | { |
435 | int gpio = pxa_irq_to_gpio(d->irq); | 480 | struct pxa_gpio_chip *pchip = irq_data_get_irq_chip_data(d); |
436 | struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); | 481 | unsigned int gpio = irqd_to_hwirq(d); |
482 | void __iomem *base = gpio_bank_base(&pchip->chip, gpio); | ||
437 | 483 | ||
438 | writel_relaxed(GPIO_bit(gpio), c->regbase + GEDR_OFFSET); | 484 | writel_relaxed(GPIO_bit(gpio), base + GEDR_OFFSET); |
439 | } | 485 | } |
440 | 486 | ||
441 | static void pxa_mask_muxed_gpio(struct irq_data *d) | 487 | static void pxa_mask_muxed_gpio(struct irq_data *d) |
442 | { | 488 | { |
443 | int gpio = pxa_irq_to_gpio(d->irq); | 489 | struct pxa_gpio_chip *pchip = irq_data_get_irq_chip_data(d); |
444 | struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); | 490 | unsigned int gpio = irqd_to_hwirq(d); |
491 | struct pxa_gpio_bank *b = gpio_to_pxabank(&pchip->chip, gpio); | ||
492 | void __iomem *base = gpio_bank_base(&pchip->chip, gpio); | ||
445 | uint32_t grer, gfer; | 493 | uint32_t grer, gfer; |
446 | 494 | ||
447 | c->irq_mask &= ~GPIO_bit(gpio); | 495 | b->irq_mask &= ~GPIO_bit(gpio); |
448 | 496 | ||
449 | grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio); | 497 | grer = readl_relaxed(base + GRER_OFFSET) & ~GPIO_bit(gpio); |
450 | gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio); | 498 | gfer = readl_relaxed(base + GFER_OFFSET) & ~GPIO_bit(gpio); |
451 | writel_relaxed(grer, c->regbase + GRER_OFFSET); | 499 | writel_relaxed(grer, base + GRER_OFFSET); |
452 | writel_relaxed(gfer, c->regbase + GFER_OFFSET); | 500 | writel_relaxed(gfer, base + GFER_OFFSET); |
453 | } | 501 | } |
454 | 502 | ||
455 | static int pxa_gpio_set_wake(struct irq_data *d, unsigned int on) | 503 | static int pxa_gpio_set_wake(struct irq_data *d, unsigned int on) |
456 | { | 504 | { |
457 | int gpio = pxa_irq_to_gpio(d->irq); | 505 | struct pxa_gpio_chip *pchip = irq_data_get_irq_chip_data(d); |
458 | struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); | 506 | unsigned int gpio = irqd_to_hwirq(d); |
459 | 507 | ||
460 | if (c->set_wake) | 508 | if (pchip->set_wake) |
461 | return c->set_wake(gpio, on); | 509 | return pchip->set_wake(gpio, on); |
462 | else | 510 | else |
463 | return 0; | 511 | return 0; |
464 | } | 512 | } |
465 | 513 | ||
466 | static void pxa_unmask_muxed_gpio(struct irq_data *d) | 514 | static void pxa_unmask_muxed_gpio(struct irq_data *d) |
467 | { | 515 | { |
468 | int gpio = pxa_irq_to_gpio(d->irq); | 516 | struct pxa_gpio_chip *pchip = irq_data_get_irq_chip_data(d); |
469 | struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); | 517 | unsigned int gpio = irqd_to_hwirq(d); |
518 | struct pxa_gpio_bank *c = gpio_to_pxabank(&pchip->chip, gpio); | ||
470 | 519 | ||
471 | c->irq_mask |= GPIO_bit(gpio); | 520 | c->irq_mask |= GPIO_bit(gpio); |
472 | update_edge_detect(c); | 521 | update_edge_detect(c); |
@@ -506,24 +555,12 @@ static int pxa_gpio_nums(struct platform_device *pdev) | |||
506 | return count; | 555 | return count; |
507 | } | 556 | } |
508 | 557 | ||
509 | #ifdef CONFIG_OF | ||
510 | static const struct of_device_id pxa_gpio_dt_ids[] = { | ||
511 | { .compatible = "intel,pxa25x-gpio", .data = &pxa25x_id, }, | ||
512 | { .compatible = "intel,pxa26x-gpio", .data = &pxa26x_id, }, | ||
513 | { .compatible = "intel,pxa27x-gpio", .data = &pxa27x_id, }, | ||
514 | { .compatible = "intel,pxa3xx-gpio", .data = &pxa3xx_id, }, | ||
515 | { .compatible = "marvell,pxa93x-gpio", .data = &pxa93x_id, }, | ||
516 | { .compatible = "marvell,mmp-gpio", .data = &mmp_id, }, | ||
517 | { .compatible = "marvell,mmp2-gpio", .data = &mmp2_id, }, | ||
518 | { .compatible = "marvell,pxa1928-gpio", .data = &pxa1928_id, }, | ||
519 | {} | ||
520 | }; | ||
521 | |||
522 | static int pxa_irq_domain_map(struct irq_domain *d, unsigned int irq, | 558 | static int pxa_irq_domain_map(struct irq_domain *d, unsigned int irq, |
523 | irq_hw_number_t hw) | 559 | irq_hw_number_t hw) |
524 | { | 560 | { |
525 | irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, | 561 | irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, |
526 | handle_edge_irq); | 562 | handle_edge_irq); |
563 | irq_set_chip_data(irq, d->host_data); | ||
527 | irq_set_noprobe(irq); | 564 | irq_set_noprobe(irq); |
528 | return 0; | 565 | return 0; |
529 | } | 566 | } |
@@ -533,10 +570,23 @@ const struct irq_domain_ops pxa_irq_domain_ops = { | |||
533 | .xlate = irq_domain_xlate_twocell, | 570 | .xlate = irq_domain_xlate_twocell, |
534 | }; | 571 | }; |
535 | 572 | ||
536 | static int pxa_gpio_probe_dt(struct platform_device *pdev) | 573 | #ifdef CONFIG_OF |
574 | static const struct of_device_id pxa_gpio_dt_ids[] = { | ||
575 | { .compatible = "intel,pxa25x-gpio", .data = &pxa25x_id, }, | ||
576 | { .compatible = "intel,pxa26x-gpio", .data = &pxa26x_id, }, | ||
577 | { .compatible = "intel,pxa27x-gpio", .data = &pxa27x_id, }, | ||
578 | { .compatible = "intel,pxa3xx-gpio", .data = &pxa3xx_id, }, | ||
579 | { .compatible = "marvell,pxa93x-gpio", .data = &pxa93x_id, }, | ||
580 | { .compatible = "marvell,mmp-gpio", .data = &mmp_id, }, | ||
581 | { .compatible = "marvell,mmp2-gpio", .data = &mmp2_id, }, | ||
582 | { .compatible = "marvell,pxa1928-gpio", .data = &pxa1928_id, }, | ||
583 | {} | ||
584 | }; | ||
585 | |||
586 | static int pxa_gpio_probe_dt(struct platform_device *pdev, | ||
587 | struct pxa_gpio_chip *pchip) | ||
537 | { | 588 | { |
538 | int ret = 0, nr_gpios; | 589 | int nr_gpios; |
539 | struct device_node *np = pdev->dev.of_node; | ||
540 | const struct of_device_id *of_id = | 590 | const struct of_device_id *of_id = |
541 | of_match_device(pxa_gpio_dt_ids, &pdev->dev); | 591 | of_match_device(pxa_gpio_dt_ids, &pdev->dev); |
542 | const struct pxa_gpio_id *gpio_id; | 592 | const struct pxa_gpio_id *gpio_id; |
@@ -554,57 +604,64 @@ static int pxa_gpio_probe_dt(struct platform_device *pdev) | |||
554 | irq_base = irq_alloc_descs(-1, 0, nr_gpios, 0); | 604 | irq_base = irq_alloc_descs(-1, 0, nr_gpios, 0); |
555 | if (irq_base < 0) { | 605 | if (irq_base < 0) { |
556 | dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n"); | 606 | dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n"); |
557 | ret = irq_base; | 607 | return irq_base; |
558 | goto err; | ||
559 | } | 608 | } |
560 | domain = irq_domain_add_legacy(np, nr_gpios, irq_base, 0, | 609 | return irq_base; |
561 | &pxa_irq_domain_ops, NULL); | ||
562 | pxa_gpio_of_node = np; | ||
563 | return 0; | ||
564 | err: | ||
565 | iounmap(gpio_reg_base); | ||
566 | return ret; | ||
567 | } | 610 | } |
568 | #else | 611 | #else |
569 | #define pxa_gpio_probe_dt(pdev) (-1) | 612 | #define pxa_gpio_probe_dt(pdev, pchip) (-1) |
570 | #endif | 613 | #endif |
571 | 614 | ||
572 | static int pxa_gpio_probe(struct platform_device *pdev) | 615 | static int pxa_gpio_probe(struct platform_device *pdev) |
573 | { | 616 | { |
574 | struct pxa_gpio_chip *c; | 617 | struct pxa_gpio_chip *pchip; |
618 | struct pxa_gpio_bank *c; | ||
575 | struct resource *res; | 619 | struct resource *res; |
576 | struct clk *clk; | 620 | struct clk *clk; |
577 | struct pxa_gpio_platform_data *info; | 621 | struct pxa_gpio_platform_data *info; |
578 | int gpio, irq, ret, use_of = 0; | 622 | void __iomem *gpio_reg_base; |
623 | int gpio, ret; | ||
579 | int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0; | 624 | int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0; |
580 | 625 | ||
626 | pchip = devm_kzalloc(&pdev->dev, sizeof(*pchip), GFP_KERNEL); | ||
627 | if (!pchip) | ||
628 | return -ENOMEM; | ||
629 | pchip->dev = &pdev->dev; | ||
630 | |||
581 | info = dev_get_platdata(&pdev->dev); | 631 | info = dev_get_platdata(&pdev->dev); |
582 | if (info) { | 632 | if (info) { |
583 | irq_base = info->irq_base; | 633 | irq_base = info->irq_base; |
584 | if (irq_base <= 0) | 634 | if (irq_base <= 0) |
585 | return -EINVAL; | 635 | return -EINVAL; |
586 | pxa_last_gpio = pxa_gpio_nums(pdev); | 636 | pxa_last_gpio = pxa_gpio_nums(pdev); |
637 | pchip->set_wake = info->gpio_set_wake; | ||
587 | } else { | 638 | } else { |
588 | irq_base = 0; | 639 | irq_base = pxa_gpio_probe_dt(pdev, pchip); |
589 | use_of = 1; | 640 | if (irq_base < 0) |
590 | ret = pxa_gpio_probe_dt(pdev); | ||
591 | if (ret < 0) | ||
592 | return -EINVAL; | 641 | return -EINVAL; |
593 | } | 642 | } |
594 | 643 | ||
595 | if (!pxa_last_gpio) | 644 | if (!pxa_last_gpio) |
596 | return -EINVAL; | 645 | return -EINVAL; |
597 | 646 | ||
647 | pchip->irqdomain = irq_domain_add_legacy(pdev->dev.of_node, | ||
648 | pxa_last_gpio + 1, irq_base, | ||
649 | 0, &pxa_irq_domain_ops, pchip); | ||
650 | if (!pchip->irqdomain) | ||
651 | return -ENOMEM; | ||
652 | |||
598 | irq0 = platform_get_irq_byname(pdev, "gpio0"); | 653 | irq0 = platform_get_irq_byname(pdev, "gpio0"); |
599 | irq1 = platform_get_irq_byname(pdev, "gpio1"); | 654 | irq1 = platform_get_irq_byname(pdev, "gpio1"); |
600 | irq_mux = platform_get_irq_byname(pdev, "gpio_mux"); | 655 | irq_mux = platform_get_irq_byname(pdev, "gpio_mux"); |
601 | if ((irq0 > 0 && irq1 <= 0) || (irq0 <= 0 && irq1 > 0) | 656 | if ((irq0 > 0 && irq1 <= 0) || (irq0 <= 0 && irq1 > 0) |
602 | || (irq_mux <= 0)) | 657 | || (irq_mux <= 0)) |
603 | return -EINVAL; | 658 | return -EINVAL; |
659 | |||
660 | pchip->irq0 = irq0; | ||
661 | pchip->irq1 = irq1; | ||
604 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 662 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
605 | if (!res) | 663 | gpio_reg_base = devm_ioremap(&pdev->dev, res->start, |
606 | return -EINVAL; | 664 | resource_size(res)); |
607 | gpio_reg_base = ioremap(res->start, resource_size(res)); | ||
608 | if (!gpio_reg_base) | 665 | if (!gpio_reg_base) |
609 | return -EINVAL; | 666 | return -EINVAL; |
610 | 667 | ||
@@ -615,21 +672,24 @@ static int pxa_gpio_probe(struct platform_device *pdev) | |||
615 | if (IS_ERR(clk)) { | 672 | if (IS_ERR(clk)) { |
616 | dev_err(&pdev->dev, "Error %ld to get gpio clock\n", | 673 | dev_err(&pdev->dev, "Error %ld to get gpio clock\n", |
617 | PTR_ERR(clk)); | 674 | PTR_ERR(clk)); |
618 | iounmap(gpio_reg_base); | ||
619 | return PTR_ERR(clk); | 675 | return PTR_ERR(clk); |
620 | } | 676 | } |
621 | ret = clk_prepare_enable(clk); | 677 | ret = clk_prepare_enable(clk); |
622 | if (ret) { | 678 | if (ret) { |
623 | clk_put(clk); | 679 | clk_put(clk); |
624 | iounmap(gpio_reg_base); | ||
625 | return ret; | 680 | return ret; |
626 | } | 681 | } |
627 | 682 | ||
628 | /* Initialize GPIO chips */ | 683 | /* Initialize GPIO chips */ |
629 | pxa_init_gpio_chip(pxa_last_gpio, info ? info->gpio_set_wake : NULL); | 684 | ret = pxa_init_gpio_chip(pchip, pxa_last_gpio + 1, pdev->dev.of_node, |
685 | gpio_reg_base); | ||
686 | if (ret) { | ||
687 | clk_put(clk); | ||
688 | return ret; | ||
689 | } | ||
630 | 690 | ||
631 | /* clear all GPIO edge detects */ | 691 | /* clear all GPIO edge detects */ |
632 | for_each_gpio_chip(gpio, c) { | 692 | for_each_gpio_bank(gpio, c, pchip) { |
633 | writel_relaxed(0, c->regbase + GFER_OFFSET); | 693 | writel_relaxed(0, c->regbase + GFER_OFFSET); |
634 | writel_relaxed(0, c->regbase + GRER_OFFSET); | 694 | writel_relaxed(0, c->regbase + GRER_OFFSET); |
635 | writel_relaxed(~0, c->regbase + GEDR_OFFSET); | 695 | writel_relaxed(~0, c->regbase + GEDR_OFFSET); |
@@ -638,34 +698,31 @@ static int pxa_gpio_probe(struct platform_device *pdev) | |||
638 | writel_relaxed(~0, c->regbase + ED_MASK_OFFSET); | 698 | writel_relaxed(~0, c->regbase + ED_MASK_OFFSET); |
639 | } | 699 | } |
640 | 700 | ||
641 | if (!use_of) { | 701 | if (irq0 > 0) { |
642 | if (irq0 > 0) { | 702 | ret = devm_request_irq(&pdev->dev, |
643 | irq = gpio_to_irq(0); | 703 | irq0, pxa_gpio_direct_handler, 0, |
644 | irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, | 704 | "gpio-0", pchip); |
645 | handle_edge_irq); | 705 | if (ret) |
646 | irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); | 706 | dev_err(&pdev->dev, "request of gpio0 irq failed: %d\n", |
647 | } | 707 | ret); |
648 | if (irq1 > 0) { | ||
649 | irq = gpio_to_irq(1); | ||
650 | irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, | ||
651 | handle_edge_irq); | ||
652 | irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); | ||
653 | } | ||
654 | |||
655 | for (irq = gpio_to_irq(gpio_offset); | ||
656 | irq <= gpio_to_irq(pxa_last_gpio); irq++) { | ||
657 | irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, | ||
658 | handle_edge_irq); | ||
659 | irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); | ||
660 | } | ||
661 | } | 708 | } |
709 | if (irq1 > 0) { | ||
710 | ret = devm_request_irq(&pdev->dev, | ||
711 | irq1, pxa_gpio_direct_handler, 0, | ||
712 | "gpio-1", pchip); | ||
713 | if (ret) | ||
714 | dev_err(&pdev->dev, "request of gpio1 irq failed: %d\n", | ||
715 | ret); | ||
716 | } | ||
717 | ret = devm_request_irq(&pdev->dev, | ||
718 | irq_mux, pxa_gpio_demux_handler, 0, | ||
719 | "gpio-mux", pchip); | ||
720 | if (ret) | ||
721 | dev_err(&pdev->dev, "request of gpio-mux irq failed: %d\n", | ||
722 | ret); | ||
662 | 723 | ||
663 | if (irq0 > 0) | 724 | pxa_gpio_chip = pchip; |
664 | irq_set_chained_handler(irq0, pxa_gpio_demux_handler); | ||
665 | if (irq1 > 0) | ||
666 | irq_set_chained_handler(irq1, pxa_gpio_demux_handler); | ||
667 | 725 | ||
668 | irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler); | ||
669 | return 0; | 726 | return 0; |
670 | } | 727 | } |
671 | 728 | ||
@@ -690,19 +747,32 @@ static struct platform_driver pxa_gpio_driver = { | |||
690 | .id_table = gpio_id_table, | 747 | .id_table = gpio_id_table, |
691 | }; | 748 | }; |
692 | 749 | ||
693 | static int __init pxa_gpio_init(void) | 750 | static int __init pxa_gpio_legacy_init(void) |
694 | { | 751 | { |
752 | if (of_have_populated_dt()) | ||
753 | return 0; | ||
754 | |||
695 | return platform_driver_register(&pxa_gpio_driver); | 755 | return platform_driver_register(&pxa_gpio_driver); |
696 | } | 756 | } |
697 | postcore_initcall(pxa_gpio_init); | 757 | postcore_initcall(pxa_gpio_legacy_init); |
758 | |||
759 | static int __init pxa_gpio_dt_init(void) | ||
760 | { | ||
761 | if (of_have_populated_dt()) | ||
762 | return platform_driver_register(&pxa_gpio_driver); | ||
763 | |||
764 | return 0; | ||
765 | } | ||
766 | device_initcall(pxa_gpio_dt_init); | ||
698 | 767 | ||
699 | #ifdef CONFIG_PM | 768 | #ifdef CONFIG_PM |
700 | static int pxa_gpio_suspend(void) | 769 | static int pxa_gpio_suspend(void) |
701 | { | 770 | { |
702 | struct pxa_gpio_chip *c; | 771 | struct pxa_gpio_chip *pchip = pxa_gpio_chip; |
772 | struct pxa_gpio_bank *c; | ||
703 | int gpio; | 773 | int gpio; |
704 | 774 | ||
705 | for_each_gpio_chip(gpio, c) { | 775 | for_each_gpio_bank(gpio, c, pchip) { |
706 | c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET); | 776 | c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET); |
707 | c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); | 777 | c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); |
708 | c->saved_grer = readl_relaxed(c->regbase + GRER_OFFSET); | 778 | c->saved_grer = readl_relaxed(c->regbase + GRER_OFFSET); |
@@ -716,10 +786,11 @@ static int pxa_gpio_suspend(void) | |||
716 | 786 | ||
717 | static void pxa_gpio_resume(void) | 787 | static void pxa_gpio_resume(void) |
718 | { | 788 | { |
719 | struct pxa_gpio_chip *c; | 789 | struct pxa_gpio_chip *pchip = pxa_gpio_chip; |
790 | struct pxa_gpio_bank *c; | ||
720 | int gpio; | 791 | int gpio; |
721 | 792 | ||
722 | for_each_gpio_chip(gpio, c) { | 793 | for_each_gpio_bank(gpio, c, pchip) { |
723 | /* restore level with set/clear */ | 794 | /* restore level with set/clear */ |
724 | writel_relaxed(c->saved_gplr, c->regbase + GPSR_OFFSET); | 795 | writel_relaxed(c->saved_gplr, c->regbase + GPSR_OFFSET); |
725 | writel_relaxed(~c->saved_gplr, c->regbase + GPCR_OFFSET); | 796 | writel_relaxed(~c->saved_gplr, c->regbase + GPCR_OFFSET); |
diff --git a/drivers/gpio/gpio-rc5t583.c b/drivers/gpio/gpio-rc5t583.c index 6eabf239676b..1e2d210b3369 100644 --- a/drivers/gpio/gpio-rc5t583.c +++ b/drivers/gpio/gpio-rc5t583.c | |||
@@ -34,14 +34,9 @@ struct rc5t583_gpio { | |||
34 | struct rc5t583 *rc5t583; | 34 | struct rc5t583 *rc5t583; |
35 | }; | 35 | }; |
36 | 36 | ||
37 | static inline struct rc5t583_gpio *to_rc5t583_gpio(struct gpio_chip *chip) | ||
38 | { | ||
39 | return container_of(chip, struct rc5t583_gpio, gpio_chip); | ||
40 | } | ||
41 | |||
42 | static int rc5t583_gpio_get(struct gpio_chip *gc, unsigned int offset) | 37 | static int rc5t583_gpio_get(struct gpio_chip *gc, unsigned int offset) |
43 | { | 38 | { |
44 | struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc); | 39 | struct rc5t583_gpio *rc5t583_gpio = gpiochip_get_data(gc); |
45 | struct device *parent = rc5t583_gpio->rc5t583->dev; | 40 | struct device *parent = rc5t583_gpio->rc5t583->dev; |
46 | uint8_t val = 0; | 41 | uint8_t val = 0; |
47 | int ret; | 42 | int ret; |
@@ -55,7 +50,7 @@ static int rc5t583_gpio_get(struct gpio_chip *gc, unsigned int offset) | |||
55 | 50 | ||
56 | static void rc5t583_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) | 51 | static void rc5t583_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) |
57 | { | 52 | { |
58 | struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc); | 53 | struct rc5t583_gpio *rc5t583_gpio = gpiochip_get_data(gc); |
59 | struct device *parent = rc5t583_gpio->rc5t583->dev; | 54 | struct device *parent = rc5t583_gpio->rc5t583->dev; |
60 | if (val) | 55 | if (val) |
61 | rc5t583_set_bits(parent, RC5T583_GPIO_IOOUT, BIT(offset)); | 56 | rc5t583_set_bits(parent, RC5T583_GPIO_IOOUT, BIT(offset)); |
@@ -65,7 +60,7 @@ static void rc5t583_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) | |||
65 | 60 | ||
66 | static int rc5t583_gpio_dir_input(struct gpio_chip *gc, unsigned int offset) | 61 | static int rc5t583_gpio_dir_input(struct gpio_chip *gc, unsigned int offset) |
67 | { | 62 | { |
68 | struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc); | 63 | struct rc5t583_gpio *rc5t583_gpio = gpiochip_get_data(gc); |
69 | struct device *parent = rc5t583_gpio->rc5t583->dev; | 64 | struct device *parent = rc5t583_gpio->rc5t583->dev; |
70 | int ret; | 65 | int ret; |
71 | 66 | ||
@@ -80,7 +75,7 @@ static int rc5t583_gpio_dir_input(struct gpio_chip *gc, unsigned int offset) | |||
80 | static int rc5t583_gpio_dir_output(struct gpio_chip *gc, unsigned offset, | 75 | static int rc5t583_gpio_dir_output(struct gpio_chip *gc, unsigned offset, |
81 | int value) | 76 | int value) |
82 | { | 77 | { |
83 | struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc); | 78 | struct rc5t583_gpio *rc5t583_gpio = gpiochip_get_data(gc); |
84 | struct device *parent = rc5t583_gpio->rc5t583->dev; | 79 | struct device *parent = rc5t583_gpio->rc5t583->dev; |
85 | int ret; | 80 | int ret; |
86 | 81 | ||
@@ -95,7 +90,7 @@ static int rc5t583_gpio_dir_output(struct gpio_chip *gc, unsigned offset, | |||
95 | 90 | ||
96 | static int rc5t583_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 91 | static int rc5t583_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
97 | { | 92 | { |
98 | struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc); | 93 | struct rc5t583_gpio *rc5t583_gpio = gpiochip_get_data(gc); |
99 | 94 | ||
100 | if (offset < RC5T583_MAX_GPIO) | 95 | if (offset < RC5T583_MAX_GPIO) |
101 | return rc5t583_gpio->rc5t583->irq_base + | 96 | return rc5t583_gpio->rc5t583->irq_base + |
@@ -105,7 +100,7 @@ static int rc5t583_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | |||
105 | 100 | ||
106 | static void rc5t583_gpio_free(struct gpio_chip *gc, unsigned offset) | 101 | static void rc5t583_gpio_free(struct gpio_chip *gc, unsigned offset) |
107 | { | 102 | { |
108 | struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc); | 103 | struct rc5t583_gpio *rc5t583_gpio = gpiochip_get_data(gc); |
109 | struct device *parent = rc5t583_gpio->rc5t583->dev; | 104 | struct device *parent = rc5t583_gpio->rc5t583->dev; |
110 | 105 | ||
111 | rc5t583_set_bits(parent, RC5T583_GPIO_PGSEL, BIT(offset)); | 106 | rc5t583_set_bits(parent, RC5T583_GPIO_PGSEL, BIT(offset)); |
@@ -132,7 +127,7 @@ static int rc5t583_gpio_probe(struct platform_device *pdev) | |||
132 | rc5t583_gpio->gpio_chip.to_irq = rc5t583_gpio_to_irq, | 127 | rc5t583_gpio->gpio_chip.to_irq = rc5t583_gpio_to_irq, |
133 | rc5t583_gpio->gpio_chip.ngpio = RC5T583_MAX_GPIO, | 128 | rc5t583_gpio->gpio_chip.ngpio = RC5T583_MAX_GPIO, |
134 | rc5t583_gpio->gpio_chip.can_sleep = true, | 129 | rc5t583_gpio->gpio_chip.can_sleep = true, |
135 | rc5t583_gpio->gpio_chip.dev = &pdev->dev; | 130 | rc5t583_gpio->gpio_chip.parent = &pdev->dev; |
136 | rc5t583_gpio->gpio_chip.base = -1; | 131 | rc5t583_gpio->gpio_chip.base = -1; |
137 | rc5t583_gpio->rc5t583 = rc5t583; | 132 | rc5t583_gpio->rc5t583 = rc5t583; |
138 | 133 | ||
@@ -141,7 +136,7 @@ static int rc5t583_gpio_probe(struct platform_device *pdev) | |||
141 | 136 | ||
142 | platform_set_drvdata(pdev, rc5t583_gpio); | 137 | platform_set_drvdata(pdev, rc5t583_gpio); |
143 | 138 | ||
144 | return gpiochip_add(&rc5t583_gpio->gpio_chip); | 139 | return gpiochip_add_data(&rc5t583_gpio->gpio_chip, rc5t583_gpio); |
145 | } | 140 | } |
146 | 141 | ||
147 | static int rc5t583_gpio_remove(struct platform_device *pdev) | 142 | static int rc5t583_gpio_remove(struct platform_device *pdev) |
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index 2a8122444614..cf41440aff91 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c | |||
@@ -25,7 +25,6 @@ | |||
25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
26 | #include <linux/of.h> | 26 | #include <linux/of.h> |
27 | #include <linux/pinctrl/consumer.h> | 27 | #include <linux/pinctrl/consumer.h> |
28 | #include <linux/platform_data/gpio-rcar.h> | ||
29 | #include <linux/platform_device.h> | 28 | #include <linux/platform_device.h> |
30 | #include <linux/pm_runtime.h> | 29 | #include <linux/pm_runtime.h> |
31 | #include <linux/spinlock.h> | 30 | #include <linux/spinlock.h> |
@@ -34,12 +33,13 @@ | |||
34 | struct gpio_rcar_priv { | 33 | struct gpio_rcar_priv { |
35 | void __iomem *base; | 34 | void __iomem *base; |
36 | spinlock_t lock; | 35 | spinlock_t lock; |
37 | struct gpio_rcar_config config; | ||
38 | struct platform_device *pdev; | 36 | struct platform_device *pdev; |
39 | struct gpio_chip gpio_chip; | 37 | struct gpio_chip gpio_chip; |
40 | struct irq_chip irq_chip; | 38 | struct irq_chip irq_chip; |
41 | unsigned int irq_parent; | ||
42 | struct clk *clk; | 39 | struct clk *clk; |
40 | unsigned int irq_parent; | ||
41 | bool has_both_edge_trigger; | ||
42 | bool needs_clk; | ||
43 | }; | 43 | }; |
44 | 44 | ||
45 | #define IOINTSEL 0x00 /* General IO/Interrupt Switching Register */ | 45 | #define IOINTSEL 0x00 /* General IO/Interrupt Switching Register */ |
@@ -84,8 +84,7 @@ static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs, | |||
84 | static void gpio_rcar_irq_disable(struct irq_data *d) | 84 | static void gpio_rcar_irq_disable(struct irq_data *d) |
85 | { | 85 | { |
86 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 86 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
87 | struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, | 87 | struct gpio_rcar_priv *p = gpiochip_get_data(gc); |
88 | gpio_chip); | ||
89 | 88 | ||
90 | gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d))); | 89 | gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d))); |
91 | } | 90 | } |
@@ -93,8 +92,7 @@ static void gpio_rcar_irq_disable(struct irq_data *d) | |||
93 | static void gpio_rcar_irq_enable(struct irq_data *d) | 92 | static void gpio_rcar_irq_enable(struct irq_data *d) |
94 | { | 93 | { |
95 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 94 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
96 | struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, | 95 | struct gpio_rcar_priv *p = gpiochip_get_data(gc); |
97 | gpio_chip); | ||
98 | 96 | ||
99 | gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d))); | 97 | gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d))); |
100 | } | 98 | } |
@@ -121,7 +119,7 @@ static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p, | |||
121 | gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger); | 119 | gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger); |
122 | 120 | ||
123 | /* Select one edge or both edges in BOTHEDGE */ | 121 | /* Select one edge or both edges in BOTHEDGE */ |
124 | if (p->config.has_both_edge_trigger) | 122 | if (p->has_both_edge_trigger) |
125 | gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both); | 123 | gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both); |
126 | 124 | ||
127 | /* Select "Interrupt Input Mode" in IOINTSEL */ | 125 | /* Select "Interrupt Input Mode" in IOINTSEL */ |
@@ -137,8 +135,7 @@ static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p, | |||
137 | static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type) | 135 | static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type) |
138 | { | 136 | { |
139 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 137 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
140 | struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, | 138 | struct gpio_rcar_priv *p = gpiochip_get_data(gc); |
141 | gpio_chip); | ||
142 | unsigned int hwirq = irqd_to_hwirq(d); | 139 | unsigned int hwirq = irqd_to_hwirq(d); |
143 | 140 | ||
144 | dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type); | 141 | dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type); |
@@ -161,7 +158,7 @@ static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type) | |||
161 | false); | 158 | false); |
162 | break; | 159 | break; |
163 | case IRQ_TYPE_EDGE_BOTH: | 160 | case IRQ_TYPE_EDGE_BOTH: |
164 | if (!p->config.has_both_edge_trigger) | 161 | if (!p->has_both_edge_trigger) |
165 | return -EINVAL; | 162 | return -EINVAL; |
166 | gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false, | 163 | gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false, |
167 | true); | 164 | true); |
@@ -175,8 +172,7 @@ static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type) | |||
175 | static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on) | 172 | static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on) |
176 | { | 173 | { |
177 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 174 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
178 | struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, | 175 | struct gpio_rcar_priv *p = gpiochip_get_data(gc); |
179 | gpio_chip); | ||
180 | int error; | 176 | int error; |
181 | 177 | ||
182 | if (p->irq_parent) { | 178 | if (p->irq_parent) { |
@@ -218,16 +214,11 @@ static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id) | |||
218 | return irqs_handled ? IRQ_HANDLED : IRQ_NONE; | 214 | return irqs_handled ? IRQ_HANDLED : IRQ_NONE; |
219 | } | 215 | } |
220 | 216 | ||
221 | static inline struct gpio_rcar_priv *gpio_to_priv(struct gpio_chip *chip) | ||
222 | { | ||
223 | return container_of(chip, struct gpio_rcar_priv, gpio_chip); | ||
224 | } | ||
225 | |||
226 | static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip, | 217 | static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip, |
227 | unsigned int gpio, | 218 | unsigned int gpio, |
228 | bool output) | 219 | bool output) |
229 | { | 220 | { |
230 | struct gpio_rcar_priv *p = gpio_to_priv(chip); | 221 | struct gpio_rcar_priv *p = gpiochip_get_data(chip); |
231 | unsigned long flags; | 222 | unsigned long flags; |
232 | 223 | ||
233 | /* follow steps in the GPIO documentation for | 224 | /* follow steps in the GPIO documentation for |
@@ -251,7 +242,7 @@ static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip, | |||
251 | 242 | ||
252 | static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset) | 243 | static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset) |
253 | { | 244 | { |
254 | struct gpio_rcar_priv *p = gpio_to_priv(chip); | 245 | struct gpio_rcar_priv *p = gpiochip_get_data(chip); |
255 | int error; | 246 | int error; |
256 | 247 | ||
257 | error = pm_runtime_get_sync(&p->pdev->dev); | 248 | error = pm_runtime_get_sync(&p->pdev->dev); |
@@ -267,7 +258,7 @@ static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset) | |||
267 | 258 | ||
268 | static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset) | 259 | static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset) |
269 | { | 260 | { |
270 | struct gpio_rcar_priv *p = gpio_to_priv(chip); | 261 | struct gpio_rcar_priv *p = gpiochip_get_data(chip); |
271 | 262 | ||
272 | pinctrl_free_gpio(chip->base + offset); | 263 | pinctrl_free_gpio(chip->base + offset); |
273 | 264 | ||
@@ -291,15 +282,15 @@ static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset) | |||
291 | 282 | ||
292 | /* testing on r8a7790 shows that INDT does not show correct pin state | 283 | /* testing on r8a7790 shows that INDT does not show correct pin state |
293 | * when configured as output, so use OUTDT in case of output pins */ | 284 | * when configured as output, so use OUTDT in case of output pins */ |
294 | if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit) | 285 | if (gpio_rcar_read(gpiochip_get_data(chip), INOUTSEL) & bit) |
295 | return !!(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit); | 286 | return !!(gpio_rcar_read(gpiochip_get_data(chip), OUTDT) & bit); |
296 | else | 287 | else |
297 | return !!(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit); | 288 | return !!(gpio_rcar_read(gpiochip_get_data(chip), INDT) & bit); |
298 | } | 289 | } |
299 | 290 | ||
300 | static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value) | 291 | static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value) |
301 | { | 292 | { |
302 | struct gpio_rcar_priv *p = gpio_to_priv(chip); | 293 | struct gpio_rcar_priv *p = gpiochip_get_data(chip); |
303 | unsigned long flags; | 294 | unsigned long flags; |
304 | 295 | ||
305 | spin_lock_irqsave(&p->lock, flags); | 296 | spin_lock_irqsave(&p->lock, flags); |
@@ -318,14 +309,17 @@ static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset, | |||
318 | 309 | ||
319 | struct gpio_rcar_info { | 310 | struct gpio_rcar_info { |
320 | bool has_both_edge_trigger; | 311 | bool has_both_edge_trigger; |
312 | bool needs_clk; | ||
321 | }; | 313 | }; |
322 | 314 | ||
323 | static const struct gpio_rcar_info gpio_rcar_info_gen1 = { | 315 | static const struct gpio_rcar_info gpio_rcar_info_gen1 = { |
324 | .has_both_edge_trigger = false, | 316 | .has_both_edge_trigger = false, |
317 | .needs_clk = false, | ||
325 | }; | 318 | }; |
326 | 319 | ||
327 | static const struct gpio_rcar_info gpio_rcar_info_gen2 = { | 320 | static const struct gpio_rcar_info gpio_rcar_info_gen2 = { |
328 | .has_both_edge_trigger = true, | 321 | .has_both_edge_trigger = true, |
322 | .needs_clk = true, | ||
329 | }; | 323 | }; |
330 | 324 | ||
331 | static const struct of_device_id gpio_rcar_of_table[] = { | 325 | static const struct of_device_id gpio_rcar_of_table[] = { |
@@ -355,39 +349,30 @@ static const struct of_device_id gpio_rcar_of_table[] = { | |||
355 | 349 | ||
356 | MODULE_DEVICE_TABLE(of, gpio_rcar_of_table); | 350 | MODULE_DEVICE_TABLE(of, gpio_rcar_of_table); |
357 | 351 | ||
358 | static int gpio_rcar_parse_pdata(struct gpio_rcar_priv *p) | 352 | static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, unsigned int *npins) |
359 | { | 353 | { |
360 | struct gpio_rcar_config *pdata = dev_get_platdata(&p->pdev->dev); | ||
361 | struct device_node *np = p->pdev->dev.of_node; | 354 | struct device_node *np = p->pdev->dev.of_node; |
355 | const struct of_device_id *match; | ||
356 | const struct gpio_rcar_info *info; | ||
362 | struct of_phandle_args args; | 357 | struct of_phandle_args args; |
363 | int ret; | 358 | int ret; |
364 | 359 | ||
365 | if (pdata) { | 360 | match = of_match_node(gpio_rcar_of_table, np); |
366 | p->config = *pdata; | 361 | if (!match) |
367 | } else if (IS_ENABLED(CONFIG_OF) && np) { | 362 | return -EINVAL; |
368 | const struct of_device_id *match; | ||
369 | const struct gpio_rcar_info *info; | ||
370 | |||
371 | match = of_match_node(gpio_rcar_of_table, np); | ||
372 | if (!match) | ||
373 | return -EINVAL; | ||
374 | 363 | ||
375 | info = match->data; | 364 | info = match->data; |
376 | 365 | ||
377 | ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, | 366 | ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args); |
378 | &args); | 367 | *npins = ret == 0 ? args.args[2] : RCAR_MAX_GPIO_PER_BANK; |
379 | p->config.number_of_pins = ret == 0 ? args.args[2] | 368 | p->has_both_edge_trigger = info->has_both_edge_trigger; |
380 | : RCAR_MAX_GPIO_PER_BANK; | 369 | p->needs_clk = info->needs_clk; |
381 | p->config.gpio_base = -1; | ||
382 | p->config.has_both_edge_trigger = info->has_both_edge_trigger; | ||
383 | } | ||
384 | 370 | ||
385 | if (p->config.number_of_pins == 0 || | 371 | if (*npins == 0 || *npins > RCAR_MAX_GPIO_PER_BANK) { |
386 | p->config.number_of_pins > RCAR_MAX_GPIO_PER_BANK) { | ||
387 | dev_warn(&p->pdev->dev, | 372 | dev_warn(&p->pdev->dev, |
388 | "Invalid number of gpio lines %u, using %u\n", | 373 | "Invalid number of gpio lines %u, using %u\n", *npins, |
389 | p->config.number_of_pins, RCAR_MAX_GPIO_PER_BANK); | 374 | RCAR_MAX_GPIO_PER_BANK); |
390 | p->config.number_of_pins = RCAR_MAX_GPIO_PER_BANK; | 375 | *npins = RCAR_MAX_GPIO_PER_BANK; |
391 | } | 376 | } |
392 | 377 | ||
393 | return 0; | 378 | return 0; |
@@ -401,6 +386,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) | |||
401 | struct irq_chip *irq_chip; | 386 | struct irq_chip *irq_chip; |
402 | struct device *dev = &pdev->dev; | 387 | struct device *dev = &pdev->dev; |
403 | const char *name = dev_name(dev); | 388 | const char *name = dev_name(dev); |
389 | unsigned int npins; | ||
404 | int ret; | 390 | int ret; |
405 | 391 | ||
406 | p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL); | 392 | p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL); |
@@ -410,8 +396,8 @@ static int gpio_rcar_probe(struct platform_device *pdev) | |||
410 | p->pdev = pdev; | 396 | p->pdev = pdev; |
411 | spin_lock_init(&p->lock); | 397 | spin_lock_init(&p->lock); |
412 | 398 | ||
413 | /* Get device configuration from DT node or platform data. */ | 399 | /* Get device configuration from DT node */ |
414 | ret = gpio_rcar_parse_pdata(p); | 400 | ret = gpio_rcar_parse_dt(p, &npins); |
415 | if (ret < 0) | 401 | if (ret < 0) |
416 | return ret; | 402 | return ret; |
417 | 403 | ||
@@ -419,7 +405,11 @@ static int gpio_rcar_probe(struct platform_device *pdev) | |||
419 | 405 | ||
420 | p->clk = devm_clk_get(dev, NULL); | 406 | p->clk = devm_clk_get(dev, NULL); |
421 | if (IS_ERR(p->clk)) { | 407 | if (IS_ERR(p->clk)) { |
422 | dev_warn(dev, "unable to get clock\n"); | 408 | if (p->needs_clk) { |
409 | dev_err(dev, "unable to get clock\n"); | ||
410 | ret = PTR_ERR(p->clk); | ||
411 | goto err0; | ||
412 | } | ||
423 | p->clk = NULL; | 413 | p->clk = NULL; |
424 | } | 414 | } |
425 | 415 | ||
@@ -449,10 +439,10 @@ static int gpio_rcar_probe(struct platform_device *pdev) | |||
449 | gpio_chip->direction_output = gpio_rcar_direction_output; | 439 | gpio_chip->direction_output = gpio_rcar_direction_output; |
450 | gpio_chip->set = gpio_rcar_set; | 440 | gpio_chip->set = gpio_rcar_set; |
451 | gpio_chip->label = name; | 441 | gpio_chip->label = name; |
452 | gpio_chip->dev = dev; | 442 | gpio_chip->parent = dev; |
453 | gpio_chip->owner = THIS_MODULE; | 443 | gpio_chip->owner = THIS_MODULE; |
454 | gpio_chip->base = p->config.gpio_base; | 444 | gpio_chip->base = -1; |
455 | gpio_chip->ngpio = p->config.number_of_pins; | 445 | gpio_chip->ngpio = npins; |
456 | 446 | ||
457 | irq_chip = &p->irq_chip; | 447 | irq_chip = &p->irq_chip; |
458 | irq_chip->name = name; | 448 | irq_chip->name = name; |
@@ -462,14 +452,14 @@ static int gpio_rcar_probe(struct platform_device *pdev) | |||
462 | irq_chip->irq_set_wake = gpio_rcar_irq_set_wake; | 452 | irq_chip->irq_set_wake = gpio_rcar_irq_set_wake; |
463 | irq_chip->flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND; | 453 | irq_chip->flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND; |
464 | 454 | ||
465 | ret = gpiochip_add(gpio_chip); | 455 | ret = gpiochip_add_data(gpio_chip, p); |
466 | if (ret) { | 456 | if (ret) { |
467 | dev_err(dev, "failed to add GPIO controller\n"); | 457 | dev_err(dev, "failed to add GPIO controller\n"); |
468 | goto err0; | 458 | goto err0; |
469 | } | 459 | } |
470 | 460 | ||
471 | ret = gpiochip_irqchip_add(gpio_chip, irq_chip, p->config.irq_base, | 461 | ret = gpiochip_irqchip_add(gpio_chip, irq_chip, 0, handle_level_irq, |
472 | handle_level_irq, IRQ_TYPE_NONE); | 462 | IRQ_TYPE_NONE); |
473 | if (ret) { | 463 | if (ret) { |
474 | dev_err(dev, "cannot add irqchip\n"); | 464 | dev_err(dev, "cannot add irqchip\n"); |
475 | goto err1; | 465 | goto err1; |
@@ -483,22 +473,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) | |||
483 | goto err1; | 473 | goto err1; |
484 | } | 474 | } |
485 | 475 | ||
486 | dev_info(dev, "driving %d GPIOs\n", p->config.number_of_pins); | 476 | dev_info(dev, "driving %d GPIOs\n", npins); |
487 | |||
488 | /* warn in case of mismatch if irq base is specified */ | ||
489 | if (p->config.irq_base) { | ||
490 | ret = irq_find_mapping(gpio_chip->irqdomain, 0); | ||
491 | if (p->config.irq_base != ret) | ||
492 | dev_warn(dev, "irq base mismatch (%u/%u)\n", | ||
493 | p->config.irq_base, ret); | ||
494 | } | ||
495 | |||
496 | if (p->config.pctl_name) { | ||
497 | ret = gpiochip_add_pin_range(gpio_chip, p->config.pctl_name, 0, | ||
498 | gpio_chip->base, gpio_chip->ngpio); | ||
499 | if (ret < 0) | ||
500 | dev_warn(dev, "failed to add pin range\n"); | ||
501 | } | ||
502 | 477 | ||
503 | return 0; | 478 | return 0; |
504 | 479 | ||
diff --git a/drivers/gpio/gpio-rdc321x.c b/drivers/gpio/gpio-rdc321x.c index d729bc8a554d..96ddee3f464a 100644 --- a/drivers/gpio/gpio-rdc321x.c +++ b/drivers/gpio/gpio-rdc321x.c | |||
@@ -47,7 +47,7 @@ static int rdc_gpio_get_value(struct gpio_chip *chip, unsigned gpio) | |||
47 | u32 value = 0; | 47 | u32 value = 0; |
48 | int reg; | 48 | int reg; |
49 | 49 | ||
50 | gpch = container_of(chip, struct rdc321x_gpio, chip); | 50 | gpch = gpiochip_get_data(chip); |
51 | reg = gpio < 32 ? gpch->reg1_data_base : gpch->reg2_data_base; | 51 | reg = gpio < 32 ? gpch->reg1_data_base : gpch->reg2_data_base; |
52 | 52 | ||
53 | spin_lock(&gpch->lock); | 53 | spin_lock(&gpch->lock); |
@@ -65,7 +65,7 @@ static void rdc_gpio_set_value_impl(struct gpio_chip *chip, | |||
65 | struct rdc321x_gpio *gpch; | 65 | struct rdc321x_gpio *gpch; |
66 | int reg = (gpio < 32) ? 0 : 1; | 66 | int reg = (gpio < 32) ? 0 : 1; |
67 | 67 | ||
68 | gpch = container_of(chip, struct rdc321x_gpio, chip); | 68 | gpch = gpiochip_get_data(chip); |
69 | 69 | ||
70 | if (value) | 70 | if (value) |
71 | gpch->data_reg[reg] |= 1 << (gpio & 0x1f); | 71 | gpch->data_reg[reg] |= 1 << (gpio & 0x1f); |
@@ -83,7 +83,7 @@ static void rdc_gpio_set_value(struct gpio_chip *chip, | |||
83 | { | 83 | { |
84 | struct rdc321x_gpio *gpch; | 84 | struct rdc321x_gpio *gpch; |
85 | 85 | ||
86 | gpch = container_of(chip, struct rdc321x_gpio, chip); | 86 | gpch = gpiochip_get_data(chip); |
87 | spin_lock(&gpch->lock); | 87 | spin_lock(&gpch->lock); |
88 | rdc_gpio_set_value_impl(chip, gpio, value); | 88 | rdc_gpio_set_value_impl(chip, gpio, value); |
89 | spin_unlock(&gpch->lock); | 89 | spin_unlock(&gpch->lock); |
@@ -96,7 +96,7 @@ static int rdc_gpio_config(struct gpio_chip *chip, | |||
96 | int err; | 96 | int err; |
97 | u32 reg; | 97 | u32 reg; |
98 | 98 | ||
99 | gpch = container_of(chip, struct rdc321x_gpio, chip); | 99 | gpch = gpiochip_get_data(chip); |
100 | 100 | ||
101 | spin_lock(&gpch->lock); | 101 | spin_lock(&gpch->lock); |
102 | err = pci_read_config_dword(gpch->sb_pdev, gpio < 32 ? | 102 | err = pci_read_config_dword(gpch->sb_pdev, gpio < 32 ? |
@@ -194,7 +194,7 @@ static int rdc321x_gpio_probe(struct platform_device *pdev) | |||
194 | 194 | ||
195 | dev_info(&pdev->dev, "registering %d GPIOs\n", | 195 | dev_info(&pdev->dev, "registering %d GPIOs\n", |
196 | rdc321x_gpio_dev->chip.ngpio); | 196 | rdc321x_gpio_dev->chip.ngpio); |
197 | return gpiochip_add(&rdc321x_gpio_dev->chip); | 197 | return gpiochip_add_data(&rdc321x_gpio_dev->chip, rdc321x_gpio_dev); |
198 | } | 198 | } |
199 | 199 | ||
200 | static int rdc321x_gpio_remove(struct platform_device *pdev) | 200 | static int rdc321x_gpio_remove(struct platform_device *pdev) |
diff --git a/drivers/gpio/gpio-sa1100.c b/drivers/gpio/gpio-sa1100.c index 990fa9023e22..0c99e8fb9af3 100644 --- a/drivers/gpio/gpio-sa1100.c +++ b/drivers/gpio/gpio-sa1100.c | |||
@@ -17,7 +17,7 @@ | |||
17 | 17 | ||
18 | static int sa1100_gpio_get(struct gpio_chip *chip, unsigned offset) | 18 | static int sa1100_gpio_get(struct gpio_chip *chip, unsigned offset) |
19 | { | 19 | { |
20 | return GPLR & GPIO_GPIO(offset); | 20 | return !!(GPLR & GPIO_GPIO(offset)); |
21 | } | 21 | } |
22 | 22 | ||
23 | static void sa1100_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 23 | static void sa1100_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
@@ -238,7 +238,7 @@ void __init sa1100_init_gpio(void) | |||
238 | GRER = 0; | 238 | GRER = 0; |
239 | GEDR = -1; | 239 | GEDR = -1; |
240 | 240 | ||
241 | gpiochip_add(&sa1100_gpio_chip); | 241 | gpiochip_add_data(&sa1100_gpio_chip, NULL); |
242 | 242 | ||
243 | sa1100_gpio_irqdomain = irq_domain_add_simple(NULL, | 243 | sa1100_gpio_irqdomain = irq_domain_add_simple(NULL, |
244 | 28, IRQ_GPIO0, | 244 | 28, IRQ_GPIO0, |
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index 7c288ba4dc87..4cb4a314c02b 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c | |||
@@ -753,7 +753,7 @@ static void __init samsung_gpiolib_add(struct samsung_gpio_chip *chip) | |||
753 | #endif | 753 | #endif |
754 | 754 | ||
755 | /* gpiochip_add() prints own failure message on error. */ | 755 | /* gpiochip_add() prints own failure message on error. */ |
756 | ret = gpiochip_add(gc); | 756 | ret = gpiochip_add_data(gc, chip); |
757 | if (ret >= 0) | 757 | if (ret >= 0) |
758 | s3c_gpiolib_track(chip); | 758 | s3c_gpiolib_track(chip); |
759 | } | 759 | } |
@@ -862,7 +862,7 @@ static void __init samsung_gpiolib_add_4bit2_chips(struct samsung_gpio_chip *chi | |||
862 | 862 | ||
863 | int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) | 863 | int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) |
864 | { | 864 | { |
865 | struct samsung_gpio_chip *samsung_chip = container_of(chip, struct samsung_gpio_chip, chip); | 865 | struct samsung_gpio_chip *samsung_chip = gpiochip_get_data(chip); |
866 | 866 | ||
867 | return samsung_chip->irq_base + offset; | 867 | return samsung_chip->irq_base + offset; |
868 | } | 868 | } |
diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c index b72906f5b999..5314ee4b947d 100644 --- a/drivers/gpio/gpio-sch.c +++ b/drivers/gpio/gpio-sch.c | |||
@@ -41,8 +41,6 @@ struct sch_gpio { | |||
41 | unsigned short resume_base; | 41 | unsigned short resume_base; |
42 | }; | 42 | }; |
43 | 43 | ||
44 | #define to_sch_gpio(gc) container_of(gc, struct sch_gpio, chip) | ||
45 | |||
46 | static unsigned sch_gpio_offset(struct sch_gpio *sch, unsigned gpio, | 44 | static unsigned sch_gpio_offset(struct sch_gpio *sch, unsigned gpio, |
47 | unsigned reg) | 45 | unsigned reg) |
48 | { | 46 | { |
@@ -65,7 +63,7 @@ static unsigned sch_gpio_bit(struct sch_gpio *sch, unsigned gpio) | |||
65 | 63 | ||
66 | static int sch_gpio_reg_get(struct gpio_chip *gc, unsigned gpio, unsigned reg) | 64 | static int sch_gpio_reg_get(struct gpio_chip *gc, unsigned gpio, unsigned reg) |
67 | { | 65 | { |
68 | struct sch_gpio *sch = to_sch_gpio(gc); | 66 | struct sch_gpio *sch = gpiochip_get_data(gc); |
69 | unsigned short offset, bit; | 67 | unsigned short offset, bit; |
70 | u8 reg_val; | 68 | u8 reg_val; |
71 | 69 | ||
@@ -80,7 +78,7 @@ static int sch_gpio_reg_get(struct gpio_chip *gc, unsigned gpio, unsigned reg) | |||
80 | static void sch_gpio_reg_set(struct gpio_chip *gc, unsigned gpio, unsigned reg, | 78 | static void sch_gpio_reg_set(struct gpio_chip *gc, unsigned gpio, unsigned reg, |
81 | int val) | 79 | int val) |
82 | { | 80 | { |
83 | struct sch_gpio *sch = to_sch_gpio(gc); | 81 | struct sch_gpio *sch = gpiochip_get_data(gc); |
84 | unsigned short offset, bit; | 82 | unsigned short offset, bit; |
85 | u8 reg_val; | 83 | u8 reg_val; |
86 | 84 | ||
@@ -97,7 +95,7 @@ static void sch_gpio_reg_set(struct gpio_chip *gc, unsigned gpio, unsigned reg, | |||
97 | 95 | ||
98 | static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num) | 96 | static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num) |
99 | { | 97 | { |
100 | struct sch_gpio *sch = to_sch_gpio(gc); | 98 | struct sch_gpio *sch = gpiochip_get_data(gc); |
101 | 99 | ||
102 | spin_lock(&sch->lock); | 100 | spin_lock(&sch->lock); |
103 | sch_gpio_reg_set(gc, gpio_num, GIO, 1); | 101 | sch_gpio_reg_set(gc, gpio_num, GIO, 1); |
@@ -112,7 +110,7 @@ static int sch_gpio_get(struct gpio_chip *gc, unsigned gpio_num) | |||
112 | 110 | ||
113 | static void sch_gpio_set(struct gpio_chip *gc, unsigned gpio_num, int val) | 111 | static void sch_gpio_set(struct gpio_chip *gc, unsigned gpio_num, int val) |
114 | { | 112 | { |
115 | struct sch_gpio *sch = to_sch_gpio(gc); | 113 | struct sch_gpio *sch = gpiochip_get_data(gc); |
116 | 114 | ||
117 | spin_lock(&sch->lock); | 115 | spin_lock(&sch->lock); |
118 | sch_gpio_reg_set(gc, gpio_num, GLV, val); | 116 | sch_gpio_reg_set(gc, gpio_num, GLV, val); |
@@ -122,7 +120,7 @@ static void sch_gpio_set(struct gpio_chip *gc, unsigned gpio_num, int val) | |||
122 | static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned gpio_num, | 120 | static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned gpio_num, |
123 | int val) | 121 | int val) |
124 | { | 122 | { |
125 | struct sch_gpio *sch = to_sch_gpio(gc); | 123 | struct sch_gpio *sch = gpiochip_get_data(gc); |
126 | 124 | ||
127 | spin_lock(&sch->lock); | 125 | spin_lock(&sch->lock); |
128 | sch_gpio_reg_set(gc, gpio_num, GIO, 0); | 126 | sch_gpio_reg_set(gc, gpio_num, GIO, 0); |
@@ -171,7 +169,7 @@ static int sch_gpio_probe(struct platform_device *pdev) | |||
171 | sch->iobase = res->start; | 169 | sch->iobase = res->start; |
172 | sch->chip = sch_gpio_chip; | 170 | sch->chip = sch_gpio_chip; |
173 | sch->chip.label = dev_name(&pdev->dev); | 171 | sch->chip.label = dev_name(&pdev->dev); |
174 | sch->chip.dev = &pdev->dev; | 172 | sch->chip.parent = &pdev->dev; |
175 | 173 | ||
176 | switch (pdev->id) { | 174 | switch (pdev->id) { |
177 | case PCI_DEVICE_ID_INTEL_SCH_LPC: | 175 | case PCI_DEVICE_ID_INTEL_SCH_LPC: |
@@ -217,7 +215,7 @@ static int sch_gpio_probe(struct platform_device *pdev) | |||
217 | 215 | ||
218 | platform_set_drvdata(pdev, sch); | 216 | platform_set_drvdata(pdev, sch); |
219 | 217 | ||
220 | return gpiochip_add(&sch->chip); | 218 | return gpiochip_add_data(&sch->chip, sch); |
221 | } | 219 | } |
222 | 220 | ||
223 | static int sch_gpio_remove(struct platform_device *pdev) | 221 | static int sch_gpio_remove(struct platform_device *pdev) |
diff --git a/drivers/gpio/gpio-sch311x.c b/drivers/gpio/gpio-sch311x.c index 0cb11413e814..1cbd77a04e7b 100644 --- a/drivers/gpio/gpio-sch311x.c +++ b/drivers/gpio/gpio-sch311x.c | |||
@@ -93,13 +93,6 @@ static struct sch311x_gpio_block_def sch311x_gpio_blocks[] = { | |||
93 | }, | 93 | }, |
94 | }; | 94 | }; |
95 | 95 | ||
96 | static inline struct sch311x_gpio_block * | ||
97 | to_sch311x_gpio_block(struct gpio_chip *chip) | ||
98 | { | ||
99 | return container_of(chip, struct sch311x_gpio_block, chip); | ||
100 | } | ||
101 | |||
102 | |||
103 | /* | 96 | /* |
104 | * Super-IO functions | 97 | * Super-IO functions |
105 | */ | 98 | */ |
@@ -142,14 +135,14 @@ static inline void sch311x_sio_outb(int sio_config_port, int reg, int val) | |||
142 | 135 | ||
143 | static int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset) | 136 | static int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset) |
144 | { | 137 | { |
145 | struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip); | 138 | struct sch311x_gpio_block *block = gpiochip_get_data(chip); |
146 | 139 | ||
147 | if (block->config_regs[offset] == 0) /* GPIO is not available */ | 140 | if (block->config_regs[offset] == 0) /* GPIO is not available */ |
148 | return -ENODEV; | 141 | return -ENODEV; |
149 | 142 | ||
150 | if (!request_region(block->runtime_reg + block->config_regs[offset], | 143 | if (!request_region(block->runtime_reg + block->config_regs[offset], |
151 | 1, DRV_NAME)) { | 144 | 1, DRV_NAME)) { |
152 | dev_err(chip->dev, "Failed to request region 0x%04x.\n", | 145 | dev_err(chip->parent, "Failed to request region 0x%04x.\n", |
153 | block->runtime_reg + block->config_regs[offset]); | 146 | block->runtime_reg + block->config_regs[offset]); |
154 | return -EBUSY; | 147 | return -EBUSY; |
155 | } | 148 | } |
@@ -158,7 +151,7 @@ static int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
158 | 151 | ||
159 | static void sch311x_gpio_free(struct gpio_chip *chip, unsigned offset) | 152 | static void sch311x_gpio_free(struct gpio_chip *chip, unsigned offset) |
160 | { | 153 | { |
161 | struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip); | 154 | struct sch311x_gpio_block *block = gpiochip_get_data(chip); |
162 | 155 | ||
163 | if (block->config_regs[offset] == 0) /* GPIO is not available */ | 156 | if (block->config_regs[offset] == 0) /* GPIO is not available */ |
164 | return; | 157 | return; |
@@ -168,7 +161,7 @@ static void sch311x_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
168 | 161 | ||
169 | static int sch311x_gpio_get(struct gpio_chip *chip, unsigned offset) | 162 | static int sch311x_gpio_get(struct gpio_chip *chip, unsigned offset) |
170 | { | 163 | { |
171 | struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip); | 164 | struct sch311x_gpio_block *block = gpiochip_get_data(chip); |
172 | unsigned char data; | 165 | unsigned char data; |
173 | 166 | ||
174 | spin_lock(&block->lock); | 167 | spin_lock(&block->lock); |
@@ -192,7 +185,7 @@ static void __sch311x_gpio_set(struct sch311x_gpio_block *block, | |||
192 | static void sch311x_gpio_set(struct gpio_chip *chip, unsigned offset, | 185 | static void sch311x_gpio_set(struct gpio_chip *chip, unsigned offset, |
193 | int value) | 186 | int value) |
194 | { | 187 | { |
195 | struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip); | 188 | struct sch311x_gpio_block *block = gpiochip_get_data(chip); |
196 | 189 | ||
197 | spin_lock(&block->lock); | 190 | spin_lock(&block->lock); |
198 | __sch311x_gpio_set(block, offset, value); | 191 | __sch311x_gpio_set(block, offset, value); |
@@ -201,7 +194,7 @@ static void sch311x_gpio_set(struct gpio_chip *chip, unsigned offset, | |||
201 | 194 | ||
202 | static int sch311x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | 195 | static int sch311x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) |
203 | { | 196 | { |
204 | struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip); | 197 | struct sch311x_gpio_block *block = gpiochip_get_data(chip); |
205 | 198 | ||
206 | spin_lock(&block->lock); | 199 | spin_lock(&block->lock); |
207 | outb(SCH311X_GPIO_CONF_IN, block->runtime_reg + | 200 | outb(SCH311X_GPIO_CONF_IN, block->runtime_reg + |
@@ -214,7 +207,7 @@ static int sch311x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | |||
214 | static int sch311x_gpio_direction_out(struct gpio_chip *chip, unsigned offset, | 207 | static int sch311x_gpio_direction_out(struct gpio_chip *chip, unsigned offset, |
215 | int value) | 208 | int value) |
216 | { | 209 | { |
217 | struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip); | 210 | struct sch311x_gpio_block *block = gpiochip_get_data(chip); |
218 | 211 | ||
219 | spin_lock(&block->lock); | 212 | spin_lock(&block->lock); |
220 | 213 | ||
@@ -229,7 +222,7 @@ static int sch311x_gpio_direction_out(struct gpio_chip *chip, unsigned offset, | |||
229 | 222 | ||
230 | static int sch311x_gpio_probe(struct platform_device *pdev) | 223 | static int sch311x_gpio_probe(struct platform_device *pdev) |
231 | { | 224 | { |
232 | struct sch311x_pdev_data *pdata = pdev->dev.platform_data; | 225 | struct sch311x_pdev_data *pdata = dev_get_platdata(&pdev->dev); |
233 | struct sch311x_gpio_priv *priv; | 226 | struct sch311x_gpio_priv *priv; |
234 | struct sch311x_gpio_block *block; | 227 | struct sch311x_gpio_block *block; |
235 | int err, i; | 228 | int err, i; |
@@ -261,13 +254,13 @@ static int sch311x_gpio_probe(struct platform_device *pdev) | |||
261 | block->chip.get = sch311x_gpio_get; | 254 | block->chip.get = sch311x_gpio_get; |
262 | block->chip.set = sch311x_gpio_set; | 255 | block->chip.set = sch311x_gpio_set; |
263 | block->chip.ngpio = 8; | 256 | block->chip.ngpio = 8; |
264 | block->chip.dev = &pdev->dev; | 257 | block->chip.parent = &pdev->dev; |
265 | block->chip.base = sch311x_gpio_blocks[i].base; | 258 | block->chip.base = sch311x_gpio_blocks[i].base; |
266 | block->config_regs = sch311x_gpio_blocks[i].config_regs; | 259 | block->config_regs = sch311x_gpio_blocks[i].config_regs; |
267 | block->data_reg = sch311x_gpio_blocks[i].data_reg; | 260 | block->data_reg = sch311x_gpio_blocks[i].data_reg; |
268 | block->runtime_reg = pdata->runtime_reg; | 261 | block->runtime_reg = pdata->runtime_reg; |
269 | 262 | ||
270 | err = gpiochip_add(&block->chip); | 263 | err = gpiochip_add_data(&block->chip, block); |
271 | if (err < 0) { | 264 | if (err < 0) { |
272 | dev_err(&pdev->dev, | 265 | dev_err(&pdev->dev, |
273 | "Could not register gpiochip, %d\n", err); | 266 | "Could not register gpiochip, %d\n", err); |
@@ -289,7 +282,7 @@ exit_err: | |||
289 | 282 | ||
290 | static int sch311x_gpio_remove(struct platform_device *pdev) | 283 | static int sch311x_gpio_remove(struct platform_device *pdev) |
291 | { | 284 | { |
292 | struct sch311x_pdev_data *pdata = pdev->dev.platform_data; | 285 | struct sch311x_pdev_data *pdata = dev_get_platdata(&pdev->dev); |
293 | struct sch311x_gpio_priv *priv = platform_get_drvdata(pdev); | 286 | struct sch311x_gpio_priv *priv = platform_get_drvdata(pdev); |
294 | int i; | 287 | int i; |
295 | 288 | ||
diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c index 34b02b42ab9e..e3cb6772f6ec 100644 --- a/drivers/gpio/gpio-sodaville.c +++ b/drivers/gpio/gpio-sodaville.c | |||
@@ -10,7 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/errno.h> | 12 | #include <linux/errno.h> |
13 | #include <linux/gpio.h> | ||
14 | #include <linux/init.h> | 13 | #include <linux/init.h> |
15 | #include <linux/io.h> | 14 | #include <linux/io.h> |
16 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
@@ -20,7 +19,7 @@ | |||
20 | #include <linux/pci.h> | 19 | #include <linux/pci.h> |
21 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
22 | #include <linux/of_irq.h> | 21 | #include <linux/of_irq.h> |
23 | #include <linux/basic_mmio_gpio.h> | 22 | #include <linux/gpio/driver.h> |
24 | 23 | ||
25 | #define DRV_NAME "sdv_gpio" | 24 | #define DRV_NAME "sdv_gpio" |
26 | #define SDV_NUM_PUB_GPIOS 12 | 25 | #define SDV_NUM_PUB_GPIOS 12 |
@@ -43,7 +42,7 @@ struct sdv_gpio_chip_data { | |||
43 | void __iomem *gpio_pub_base; | 42 | void __iomem *gpio_pub_base; |
44 | struct irq_domain *id; | 43 | struct irq_domain *id; |
45 | struct irq_chip_generic *gc; | 44 | struct irq_chip_generic *gc; |
46 | struct bgpio_chip bgpio; | 45 | struct gpio_chip chip; |
47 | }; | 46 | }; |
48 | 47 | ||
49 | static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type) | 48 | static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type) |
@@ -226,14 +225,14 @@ static int sdv_gpio_probe(struct pci_dev *pdev, | |||
226 | writel(mux_val, sd->gpio_pub_base + GPMUXCTL); | 225 | writel(mux_val, sd->gpio_pub_base + GPMUXCTL); |
227 | } | 226 | } |
228 | 227 | ||
229 | ret = bgpio_init(&sd->bgpio, &pdev->dev, 4, | 228 | ret = bgpio_init(&sd->chip, &pdev->dev, 4, |
230 | sd->gpio_pub_base + GPINR, sd->gpio_pub_base + GPOUTR, | 229 | sd->gpio_pub_base + GPINR, sd->gpio_pub_base + GPOUTR, |
231 | NULL, sd->gpio_pub_base + GPOER, NULL, 0); | 230 | NULL, sd->gpio_pub_base + GPOER, NULL, 0); |
232 | if (ret) | 231 | if (ret) |
233 | goto unmap; | 232 | goto unmap; |
234 | sd->bgpio.gc.ngpio = SDV_NUM_PUB_GPIOS; | 233 | sd->chip.ngpio = SDV_NUM_PUB_GPIOS; |
235 | 234 | ||
236 | ret = gpiochip_add(&sd->bgpio.gc); | 235 | ret = gpiochip_add_data(&sd->chip, sd); |
237 | if (ret < 0) { | 236 | if (ret < 0) { |
238 | dev_err(&pdev->dev, "gpiochip_add() failed.\n"); | 237 | dev_err(&pdev->dev, "gpiochip_add() failed.\n"); |
239 | goto unmap; | 238 | goto unmap; |
@@ -265,7 +264,7 @@ static void sdv_gpio_remove(struct pci_dev *pdev) | |||
265 | free_irq(pdev->irq, sd); | 264 | free_irq(pdev->irq, sd); |
266 | irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS); | 265 | irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS); |
267 | 266 | ||
268 | gpiochip_remove(&sd->bgpio.gc); | 267 | gpiochip_remove(&sd->chip); |
269 | pci_release_region(pdev, GPIO_BAR); | 268 | pci_release_region(pdev, GPIO_BAR); |
270 | iounmap(sd->gpio_pub_base); | 269 | iounmap(sd->gpio_pub_base); |
271 | pci_disable_device(pdev); | 270 | pci_disable_device(pdev); |
diff --git a/drivers/gpio/gpio-spear-spics.c b/drivers/gpio/gpio-spear-spics.c index 69ffca5b073b..50fb09080a6b 100644 --- a/drivers/gpio/gpio-spear-spics.c +++ b/drivers/gpio/gpio-spear-spics.c | |||
@@ -62,8 +62,7 @@ static int spics_get_value(struct gpio_chip *chip, unsigned offset) | |||
62 | 62 | ||
63 | static void spics_set_value(struct gpio_chip *chip, unsigned offset, int value) | 63 | static void spics_set_value(struct gpio_chip *chip, unsigned offset, int value) |
64 | { | 64 | { |
65 | struct spear_spics *spics = container_of(chip, struct spear_spics, | 65 | struct spear_spics *spics = gpiochip_get_data(chip); |
66 | chip); | ||
67 | u32 tmp; | 66 | u32 tmp; |
68 | 67 | ||
69 | /* select chip select from register */ | 68 | /* select chip select from register */ |
@@ -94,8 +93,7 @@ static int spics_direction_output(struct gpio_chip *chip, unsigned offset, | |||
94 | 93 | ||
95 | static int spics_request(struct gpio_chip *chip, unsigned offset) | 94 | static int spics_request(struct gpio_chip *chip, unsigned offset) |
96 | { | 95 | { |
97 | struct spear_spics *spics = container_of(chip, struct spear_spics, | 96 | struct spear_spics *spics = gpiochip_get_data(chip); |
98 | chip); | ||
99 | u32 tmp; | 97 | u32 tmp; |
100 | 98 | ||
101 | if (!spics->use_count++) { | 99 | if (!spics->use_count++) { |
@@ -110,8 +108,7 @@ static int spics_request(struct gpio_chip *chip, unsigned offset) | |||
110 | 108 | ||
111 | static void spics_free(struct gpio_chip *chip, unsigned offset) | 109 | static void spics_free(struct gpio_chip *chip, unsigned offset) |
112 | { | 110 | { |
113 | struct spear_spics *spics = container_of(chip, struct spear_spics, | 111 | struct spear_spics *spics = gpiochip_get_data(chip); |
114 | chip); | ||
115 | u32 tmp; | 112 | u32 tmp; |
116 | 113 | ||
117 | if (!--spics->use_count) { | 114 | if (!--spics->use_count) { |
@@ -164,11 +161,11 @@ static int spics_gpio_probe(struct platform_device *pdev) | |||
164 | spics->chip.get = spics_get_value; | 161 | spics->chip.get = spics_get_value; |
165 | spics->chip.set = spics_set_value; | 162 | spics->chip.set = spics_set_value; |
166 | spics->chip.label = dev_name(&pdev->dev); | 163 | spics->chip.label = dev_name(&pdev->dev); |
167 | spics->chip.dev = &pdev->dev; | 164 | spics->chip.parent = &pdev->dev; |
168 | spics->chip.owner = THIS_MODULE; | 165 | spics->chip.owner = THIS_MODULE; |
169 | spics->last_off = -1; | 166 | spics->last_off = -1; |
170 | 167 | ||
171 | ret = gpiochip_add(&spics->chip); | 168 | ret = gpiochip_add_data(&spics->chip, spics); |
172 | if (ret) { | 169 | if (ret) { |
173 | dev_err(&pdev->dev, "unable to add gpio chip\n"); | 170 | dev_err(&pdev->dev, "unable to add gpio chip\n"); |
174 | return ret; | 171 | return ret; |
diff --git a/drivers/gpio/gpio-sta2x11.c b/drivers/gpio/gpio-sta2x11.c index 55e47828ddfc..83af1cb36333 100644 --- a/drivers/gpio/gpio-sta2x11.c +++ b/drivers/gpio/gpio-sta2x11.c | |||
@@ -74,7 +74,7 @@ static inline u32 __bit(int nr) | |||
74 | 74 | ||
75 | static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) | 75 | static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) |
76 | { | 76 | { |
77 | struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); | 77 | struct gsta_gpio *chip = gpiochip_get_data(gpio); |
78 | struct gsta_regs __iomem *regs = __regs(chip, nr); | 78 | struct gsta_regs __iomem *regs = __regs(chip, nr); |
79 | u32 bit = __bit(nr); | 79 | u32 bit = __bit(nr); |
80 | 80 | ||
@@ -86,17 +86,17 @@ static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) | |||
86 | 86 | ||
87 | static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr) | 87 | static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr) |
88 | { | 88 | { |
89 | struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); | 89 | struct gsta_gpio *chip = gpiochip_get_data(gpio); |
90 | struct gsta_regs __iomem *regs = __regs(chip, nr); | 90 | struct gsta_regs __iomem *regs = __regs(chip, nr); |
91 | u32 bit = __bit(nr); | 91 | u32 bit = __bit(nr); |
92 | 92 | ||
93 | return readl(®s->dat) & bit; | 93 | return !!(readl(®s->dat) & bit); |
94 | } | 94 | } |
95 | 95 | ||
96 | static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, | 96 | static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, |
97 | int val) | 97 | int val) |
98 | { | 98 | { |
99 | struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); | 99 | struct gsta_gpio *chip = gpiochip_get_data(gpio); |
100 | struct gsta_regs __iomem *regs = __regs(chip, nr); | 100 | struct gsta_regs __iomem *regs = __regs(chip, nr); |
101 | u32 bit = __bit(nr); | 101 | u32 bit = __bit(nr); |
102 | 102 | ||
@@ -111,7 +111,7 @@ static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, | |||
111 | 111 | ||
112 | static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) | 112 | static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) |
113 | { | 113 | { |
114 | struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); | 114 | struct gsta_gpio *chip = gpiochip_get_data(gpio); |
115 | struct gsta_regs __iomem *regs = __regs(chip, nr); | 115 | struct gsta_regs __iomem *regs = __regs(chip, nr); |
116 | u32 bit = __bit(nr); | 116 | u32 bit = __bit(nr); |
117 | 117 | ||
@@ -121,7 +121,7 @@ static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) | |||
121 | 121 | ||
122 | static int gsta_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) | 122 | static int gsta_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) |
123 | { | 123 | { |
124 | struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio); | 124 | struct gsta_gpio *chip = gpiochip_get_data(gpio); |
125 | return chip->irq_base + offset; | 125 | return chip->irq_base + offset; |
126 | } | 126 | } |
127 | 127 | ||
@@ -409,7 +409,7 @@ static int gsta_probe(struct platform_device *dev) | |||
409 | goto err_free_descs; | 409 | goto err_free_descs; |
410 | } | 410 | } |
411 | 411 | ||
412 | err = gpiochip_add(&chip->gpio); | 412 | err = gpiochip_add_data(&chip->gpio, chip); |
413 | if (err < 0) { | 413 | if (err < 0) { |
414 | dev_err(&dev->dev, "sta2x11 gpio: Can't register (%i)\n", | 414 | dev_err(&dev->dev, "sta2x11 gpio: Can't register (%i)\n", |
415 | -err); | 415 | -err); |
diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c index dabfb99dddef..5197edf1acfd 100644 --- a/drivers/gpio/gpio-stmpe.c +++ b/drivers/gpio/gpio-stmpe.c | |||
@@ -36,14 +36,9 @@ struct stmpe_gpio { | |||
36 | u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; | 36 | u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; |
37 | }; | 37 | }; |
38 | 38 | ||
39 | static inline struct stmpe_gpio *to_stmpe_gpio(struct gpio_chip *chip) | ||
40 | { | ||
41 | return container_of(chip, struct stmpe_gpio, chip); | ||
42 | } | ||
43 | |||
44 | static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset) | 39 | static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset) |
45 | { | 40 | { |
46 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); | 41 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); |
47 | struct stmpe *stmpe = stmpe_gpio->stmpe; | 42 | struct stmpe *stmpe = stmpe_gpio->stmpe; |
48 | u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8); | 43 | u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8); |
49 | u8 mask = 1 << (offset % 8); | 44 | u8 mask = 1 << (offset % 8); |
@@ -58,7 +53,7 @@ static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
58 | 53 | ||
59 | static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | 54 | static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val) |
60 | { | 55 | { |
61 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); | 56 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); |
62 | struct stmpe *stmpe = stmpe_gpio->stmpe; | 57 | struct stmpe *stmpe = stmpe_gpio->stmpe; |
63 | int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB; | 58 | int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB; |
64 | u8 reg = stmpe->regs[which] - (offset / 8); | 59 | u8 reg = stmpe->regs[which] - (offset / 8); |
@@ -77,7 +72,7 @@ static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | |||
77 | static int stmpe_gpio_direction_output(struct gpio_chip *chip, | 72 | static int stmpe_gpio_direction_output(struct gpio_chip *chip, |
78 | unsigned offset, int val) | 73 | unsigned offset, int val) |
79 | { | 74 | { |
80 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); | 75 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); |
81 | struct stmpe *stmpe = stmpe_gpio->stmpe; | 76 | struct stmpe *stmpe = stmpe_gpio->stmpe; |
82 | u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); | 77 | u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); |
83 | u8 mask = 1 << (offset % 8); | 78 | u8 mask = 1 << (offset % 8); |
@@ -90,7 +85,7 @@ static int stmpe_gpio_direction_output(struct gpio_chip *chip, | |||
90 | static int stmpe_gpio_direction_input(struct gpio_chip *chip, | 85 | static int stmpe_gpio_direction_input(struct gpio_chip *chip, |
91 | unsigned offset) | 86 | unsigned offset) |
92 | { | 87 | { |
93 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); | 88 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); |
94 | struct stmpe *stmpe = stmpe_gpio->stmpe; | 89 | struct stmpe *stmpe = stmpe_gpio->stmpe; |
95 | u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); | 90 | u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); |
96 | u8 mask = 1 << (offset % 8); | 91 | u8 mask = 1 << (offset % 8); |
@@ -100,7 +95,7 @@ static int stmpe_gpio_direction_input(struct gpio_chip *chip, | |||
100 | 95 | ||
101 | static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) | 96 | static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) |
102 | { | 97 | { |
103 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); | 98 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); |
104 | struct stmpe *stmpe = stmpe_gpio->stmpe; | 99 | struct stmpe *stmpe = stmpe_gpio->stmpe; |
105 | 100 | ||
106 | if (stmpe_gpio->norequest_mask & (1 << offset)) | 101 | if (stmpe_gpio->norequest_mask & (1 << offset)) |
@@ -123,7 +118,7 @@ static struct gpio_chip template_chip = { | |||
123 | static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) | 118 | static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) |
124 | { | 119 | { |
125 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 120 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
126 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | 121 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); |
127 | int offset = d->hwirq; | 122 | int offset = d->hwirq; |
128 | int regoffset = offset / 8; | 123 | int regoffset = offset / 8; |
129 | int mask = 1 << (offset % 8); | 124 | int mask = 1 << (offset % 8); |
@@ -151,7 +146,7 @@ static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
151 | static void stmpe_gpio_irq_lock(struct irq_data *d) | 146 | static void stmpe_gpio_irq_lock(struct irq_data *d) |
152 | { | 147 | { |
153 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 148 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
154 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | 149 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); |
155 | 150 | ||
156 | mutex_lock(&stmpe_gpio->irq_lock); | 151 | mutex_lock(&stmpe_gpio->irq_lock); |
157 | } | 152 | } |
@@ -159,7 +154,7 @@ static void stmpe_gpio_irq_lock(struct irq_data *d) | |||
159 | static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) | 154 | static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) |
160 | { | 155 | { |
161 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 156 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
162 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | 157 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); |
163 | struct stmpe *stmpe = stmpe_gpio->stmpe; | 158 | struct stmpe *stmpe = stmpe_gpio->stmpe; |
164 | int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); | 159 | int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); |
165 | static const u8 regmap[] = { | 160 | static const u8 regmap[] = { |
@@ -193,7 +188,7 @@ static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) | |||
193 | static void stmpe_gpio_irq_mask(struct irq_data *d) | 188 | static void stmpe_gpio_irq_mask(struct irq_data *d) |
194 | { | 189 | { |
195 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 190 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
196 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | 191 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); |
197 | int offset = d->hwirq; | 192 | int offset = d->hwirq; |
198 | int regoffset = offset / 8; | 193 | int regoffset = offset / 8; |
199 | int mask = 1 << (offset % 8); | 194 | int mask = 1 << (offset % 8); |
@@ -204,7 +199,7 @@ static void stmpe_gpio_irq_mask(struct irq_data *d) | |||
204 | static void stmpe_gpio_irq_unmask(struct irq_data *d) | 199 | static void stmpe_gpio_irq_unmask(struct irq_data *d) |
205 | { | 200 | { |
206 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 201 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
207 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | 202 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); |
208 | int offset = d->hwirq; | 203 | int offset = d->hwirq; |
209 | int regoffset = offset / 8; | 204 | int regoffset = offset / 8; |
210 | int mask = 1 << (offset % 8); | 205 | int mask = 1 << (offset % 8); |
@@ -216,7 +211,7 @@ static void stmpe_dbg_show_one(struct seq_file *s, | |||
216 | struct gpio_chip *gc, | 211 | struct gpio_chip *gc, |
217 | unsigned offset, unsigned gpio) | 212 | unsigned offset, unsigned gpio) |
218 | { | 213 | { |
219 | struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); | 214 | struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); |
220 | struct stmpe *stmpe = stmpe_gpio->stmpe; | 215 | struct stmpe *stmpe = stmpe_gpio->stmpe; |
221 | const char *label = gpiochip_is_requested(gc, offset); | 216 | const char *label = gpiochip_is_requested(gc, offset); |
222 | int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); | 217 | int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); |
@@ -356,7 +351,7 @@ static int stmpe_gpio_probe(struct platform_device *pdev) | |||
356 | stmpe_gpio->stmpe = stmpe; | 351 | stmpe_gpio->stmpe = stmpe; |
357 | stmpe_gpio->chip = template_chip; | 352 | stmpe_gpio->chip = template_chip; |
358 | stmpe_gpio->chip.ngpio = stmpe->num_gpios; | 353 | stmpe_gpio->chip.ngpio = stmpe->num_gpios; |
359 | stmpe_gpio->chip.dev = &pdev->dev; | 354 | stmpe_gpio->chip.parent = &pdev->dev; |
360 | stmpe_gpio->chip.of_node = np; | 355 | stmpe_gpio->chip.of_node = np; |
361 | stmpe_gpio->chip.base = -1; | 356 | stmpe_gpio->chip.base = -1; |
362 | 357 | ||
@@ -375,7 +370,7 @@ static int stmpe_gpio_probe(struct platform_device *pdev) | |||
375 | if (ret) | 370 | if (ret) |
376 | goto out_free; | 371 | goto out_free; |
377 | 372 | ||
378 | ret = gpiochip_add(&stmpe_gpio->chip); | 373 | ret = gpiochip_add_data(&stmpe_gpio->chip, stmpe_gpio); |
379 | if (ret) { | 374 | if (ret) { |
380 | dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); | 375 | dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); |
381 | goto out_disable; | 376 | goto out_disable; |
diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c index 81bdbe7ba2a4..d11dd48570b2 100644 --- a/drivers/gpio/gpio-stp-xway.c +++ b/drivers/gpio/gpio-stp-xway.c | |||
@@ -100,8 +100,7 @@ struct xway_stp { | |||
100 | */ | 100 | */ |
101 | static void xway_stp_set(struct gpio_chip *gc, unsigned gpio, int val) | 101 | static void xway_stp_set(struct gpio_chip *gc, unsigned gpio, int val) |
102 | { | 102 | { |
103 | struct xway_stp *chip = | 103 | struct xway_stp *chip = gpiochip_get_data(gc); |
104 | container_of(gc, struct xway_stp, gc); | ||
105 | 104 | ||
106 | if (val) | 105 | if (val) |
107 | chip->shadow |= BIT(gpio); | 106 | chip->shadow |= BIT(gpio); |
@@ -135,11 +134,10 @@ static int xway_stp_dir_out(struct gpio_chip *gc, unsigned gpio, int val) | |||
135 | */ | 134 | */ |
136 | static int xway_stp_request(struct gpio_chip *gc, unsigned gpio) | 135 | static int xway_stp_request(struct gpio_chip *gc, unsigned gpio) |
137 | { | 136 | { |
138 | struct xway_stp *chip = | 137 | struct xway_stp *chip = gpiochip_get_data(gc); |
139 | container_of(gc, struct xway_stp, gc); | ||
140 | 138 | ||
141 | if ((gpio < 8) && (chip->reserved & BIT(gpio))) { | 139 | if ((gpio < 8) && (chip->reserved & BIT(gpio))) { |
142 | dev_err(gc->dev, "GPIO %d is driven by hardware\n", gpio); | 140 | dev_err(gc->parent, "GPIO %d is driven by hardware\n", gpio); |
143 | return -ENODEV; | 141 | return -ENODEV; |
144 | } | 142 | } |
145 | 143 | ||
@@ -214,7 +212,7 @@ static int xway_stp_probe(struct platform_device *pdev) | |||
214 | if (IS_ERR(chip->virt)) | 212 | if (IS_ERR(chip->virt)) |
215 | return PTR_ERR(chip->virt); | 213 | return PTR_ERR(chip->virt); |
216 | 214 | ||
217 | chip->gc.dev = &pdev->dev; | 215 | chip->gc.parent = &pdev->dev; |
218 | chip->gc.label = "stp-xway"; | 216 | chip->gc.label = "stp-xway"; |
219 | chip->gc.direction_output = xway_stp_dir_out; | 217 | chip->gc.direction_output = xway_stp_dir_out; |
220 | chip->gc.set = xway_stp_set; | 218 | chip->gc.set = xway_stp_set; |
@@ -260,7 +258,7 @@ static int xway_stp_probe(struct platform_device *pdev) | |||
260 | 258 | ||
261 | ret = xway_stp_hw_init(chip); | 259 | ret = xway_stp_hw_init(chip); |
262 | if (!ret) | 260 | if (!ret) |
263 | ret = gpiochip_add(&chip->gc); | 261 | ret = gpiochip_add_data(&chip->gc, chip); |
264 | 262 | ||
265 | if (!ret) | 263 | if (!ret) |
266 | dev_info(&pdev->dev, "Init done\n"); | 264 | dev_info(&pdev->dev, "Init done\n"); |
diff --git a/drivers/gpio/gpio-sx150x.c b/drivers/gpio/gpio-sx150x.c index 76f920173a2f..e6cff1cabd0c 100644 --- a/drivers/gpio/gpio-sx150x.c +++ b/drivers/gpio/gpio-sx150x.c | |||
@@ -32,8 +32,19 @@ | |||
32 | #define NO_UPDATE_PENDING -1 | 32 | #define NO_UPDATE_PENDING -1 |
33 | 33 | ||
34 | /* The chip models of sx150x */ | 34 | /* The chip models of sx150x */ |
35 | #define SX150X_456 0 | 35 | #define SX150X_123 0 |
36 | #define SX150X_789 1 | 36 | #define SX150X_456 1 |
37 | #define SX150X_789 2 | ||
38 | |||
39 | struct sx150x_123_pri { | ||
40 | u8 reg_pld_mode; | ||
41 | u8 reg_pld_table0; | ||
42 | u8 reg_pld_table1; | ||
43 | u8 reg_pld_table2; | ||
44 | u8 reg_pld_table3; | ||
45 | u8 reg_pld_table4; | ||
46 | u8 reg_advance; | ||
47 | }; | ||
37 | 48 | ||
38 | struct sx150x_456_pri { | 49 | struct sx150x_456_pri { |
39 | u8 reg_pld_mode; | 50 | u8 reg_pld_mode; |
@@ -65,6 +76,7 @@ struct sx150x_device_data { | |||
65 | u8 reg_sense; | 76 | u8 reg_sense; |
66 | u8 ngpios; | 77 | u8 ngpios; |
67 | union { | 78 | union { |
79 | struct sx150x_123_pri x123; | ||
68 | struct sx150x_456_pri x456; | 80 | struct sx150x_456_pri x456; |
69 | struct sx150x_789_pri x789; | 81 | struct sx150x_789_pri x789; |
70 | } pri; | 82 | } pri; |
@@ -142,12 +154,33 @@ static const struct sx150x_device_data sx150x_devices[] = { | |||
142 | }, | 154 | }, |
143 | .ngpios = 16 | 155 | .ngpios = 16 |
144 | }, | 156 | }, |
157 | [3] = { /* sx1502q */ | ||
158 | .model = SX150X_123, | ||
159 | .reg_pullup = 0x02, | ||
160 | .reg_pulldn = 0x03, | ||
161 | .reg_dir = 0x01, | ||
162 | .reg_data = 0x00, | ||
163 | .reg_irq_mask = 0x05, | ||
164 | .reg_irq_src = 0x08, | ||
165 | .reg_sense = 0x07, | ||
166 | .pri.x123 = { | ||
167 | .reg_pld_mode = 0x10, | ||
168 | .reg_pld_table0 = 0x11, | ||
169 | .reg_pld_table1 = 0x12, | ||
170 | .reg_pld_table2 = 0x13, | ||
171 | .reg_pld_table3 = 0x14, | ||
172 | .reg_pld_table4 = 0x15, | ||
173 | .reg_advance = 0xad, | ||
174 | }, | ||
175 | .ngpios = 8, | ||
176 | }, | ||
145 | }; | 177 | }; |
146 | 178 | ||
147 | static const struct i2c_device_id sx150x_id[] = { | 179 | static const struct i2c_device_id sx150x_id[] = { |
148 | {"sx1508q", 0}, | 180 | {"sx1508q", 0}, |
149 | {"sx1509q", 1}, | 181 | {"sx1509q", 1}, |
150 | {"sx1506q", 2}, | 182 | {"sx1506q", 2}, |
183 | {"sx1502q", 3}, | ||
151 | {} | 184 | {} |
152 | }; | 185 | }; |
153 | MODULE_DEVICE_TABLE(i2c, sx150x_id); | 186 | MODULE_DEVICE_TABLE(i2c, sx150x_id); |
@@ -156,15 +189,11 @@ static const struct of_device_id sx150x_of_match[] = { | |||
156 | { .compatible = "semtech,sx1508q" }, | 189 | { .compatible = "semtech,sx1508q" }, |
157 | { .compatible = "semtech,sx1509q" }, | 190 | { .compatible = "semtech,sx1509q" }, |
158 | { .compatible = "semtech,sx1506q" }, | 191 | { .compatible = "semtech,sx1506q" }, |
192 | { .compatible = "semtech,sx1502q" }, | ||
159 | {}, | 193 | {}, |
160 | }; | 194 | }; |
161 | MODULE_DEVICE_TABLE(of, sx150x_of_match); | 195 | MODULE_DEVICE_TABLE(of, sx150x_of_match); |
162 | 196 | ||
163 | struct sx150x_chip *to_sx150x(struct gpio_chip *gc) | ||
164 | { | ||
165 | return container_of(gc, struct sx150x_chip, gpio_chip); | ||
166 | } | ||
167 | |||
168 | static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val) | 197 | static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val) |
169 | { | 198 | { |
170 | s32 err = i2c_smbus_write_byte_data(client, reg, val); | 199 | s32 err = i2c_smbus_write_byte_data(client, reg, val); |
@@ -301,7 +330,7 @@ static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val) | |||
301 | 330 | ||
302 | static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset) | 331 | static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset) |
303 | { | 332 | { |
304 | struct sx150x_chip *chip = to_sx150x(gc); | 333 | struct sx150x_chip *chip = gpiochip_get_data(gc); |
305 | int status = -EINVAL; | 334 | int status = -EINVAL; |
306 | 335 | ||
307 | if (!offset_is_oscio(chip, offset)) { | 336 | if (!offset_is_oscio(chip, offset)) { |
@@ -310,12 +339,12 @@ static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
310 | mutex_unlock(&chip->lock); | 339 | mutex_unlock(&chip->lock); |
311 | } | 340 | } |
312 | 341 | ||
313 | return status; | 342 | return (status < 0) ? status : !!status; |
314 | } | 343 | } |
315 | 344 | ||
316 | static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val) | 345 | static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val) |
317 | { | 346 | { |
318 | struct sx150x_chip *chip = to_sx150x(gc); | 347 | struct sx150x_chip *chip = gpiochip_get_data(gc); |
319 | 348 | ||
320 | mutex_lock(&chip->lock); | 349 | mutex_lock(&chip->lock); |
321 | if (offset_is_oscio(chip, offset)) | 350 | if (offset_is_oscio(chip, offset)) |
@@ -327,7 +356,7 @@ static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val) | |||
327 | 356 | ||
328 | static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | 357 | static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
329 | { | 358 | { |
330 | struct sx150x_chip *chip = to_sx150x(gc); | 359 | struct sx150x_chip *chip = gpiochip_get_data(gc); |
331 | int status = -EINVAL; | 360 | int status = -EINVAL; |
332 | 361 | ||
333 | if (!offset_is_oscio(chip, offset)) { | 362 | if (!offset_is_oscio(chip, offset)) { |
@@ -342,7 +371,7 @@ static int sx150x_gpio_direction_output(struct gpio_chip *gc, | |||
342 | unsigned offset, | 371 | unsigned offset, |
343 | int val) | 372 | int val) |
344 | { | 373 | { |
345 | struct sx150x_chip *chip = to_sx150x(gc); | 374 | struct sx150x_chip *chip = gpiochip_get_data(gc); |
346 | int status = 0; | 375 | int status = 0; |
347 | 376 | ||
348 | if (!offset_is_oscio(chip, offset)) { | 377 | if (!offset_is_oscio(chip, offset)) { |
@@ -355,7 +384,7 @@ static int sx150x_gpio_direction_output(struct gpio_chip *gc, | |||
355 | 384 | ||
356 | static void sx150x_irq_mask(struct irq_data *d) | 385 | static void sx150x_irq_mask(struct irq_data *d) |
357 | { | 386 | { |
358 | struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d)); | 387 | struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
359 | unsigned n = d->hwirq; | 388 | unsigned n = d->hwirq; |
360 | 389 | ||
361 | chip->irq_masked |= (1 << n); | 390 | chip->irq_masked |= (1 << n); |
@@ -364,7 +393,7 @@ static void sx150x_irq_mask(struct irq_data *d) | |||
364 | 393 | ||
365 | static void sx150x_irq_unmask(struct irq_data *d) | 394 | static void sx150x_irq_unmask(struct irq_data *d) |
366 | { | 395 | { |
367 | struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d)); | 396 | struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
368 | unsigned n = d->hwirq; | 397 | unsigned n = d->hwirq; |
369 | 398 | ||
370 | chip->irq_masked &= ~(1 << n); | 399 | chip->irq_masked &= ~(1 << n); |
@@ -373,7 +402,7 @@ static void sx150x_irq_unmask(struct irq_data *d) | |||
373 | 402 | ||
374 | static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type) | 403 | static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type) |
375 | { | 404 | { |
376 | struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d)); | 405 | struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
377 | unsigned n, val = 0; | 406 | unsigned n, val = 0; |
378 | 407 | ||
379 | if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) | 408 | if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) |
@@ -428,14 +457,14 @@ static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id) | |||
428 | 457 | ||
429 | static void sx150x_irq_bus_lock(struct irq_data *d) | 458 | static void sx150x_irq_bus_lock(struct irq_data *d) |
430 | { | 459 | { |
431 | struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d)); | 460 | struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
432 | 461 | ||
433 | mutex_lock(&chip->lock); | 462 | mutex_lock(&chip->lock); |
434 | } | 463 | } |
435 | 464 | ||
436 | static void sx150x_irq_bus_sync_unlock(struct irq_data *d) | 465 | static void sx150x_irq_bus_sync_unlock(struct irq_data *d) |
437 | { | 466 | { |
438 | struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d)); | 467 | struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
439 | unsigned n; | 468 | unsigned n; |
440 | 469 | ||
441 | if (chip->irq_update == NO_UPDATE_PENDING) | 470 | if (chip->irq_update == NO_UPDATE_PENDING) |
@@ -473,7 +502,7 @@ static void sx150x_init_chip(struct sx150x_chip *chip, | |||
473 | 502 | ||
474 | chip->client = client; | 503 | chip->client = client; |
475 | chip->dev_cfg = &sx150x_devices[driver_data]; | 504 | chip->dev_cfg = &sx150x_devices[driver_data]; |
476 | chip->gpio_chip.dev = &client->dev; | 505 | chip->gpio_chip.parent = &client->dev; |
477 | chip->gpio_chip.label = client->name; | 506 | chip->gpio_chip.label = client->name; |
478 | chip->gpio_chip.direction_input = sx150x_gpio_direction_input; | 507 | chip->gpio_chip.direction_input = sx150x_gpio_direction_input; |
479 | chip->gpio_chip.direction_output = sx150x_gpio_direction_output; | 508 | chip->gpio_chip.direction_output = sx150x_gpio_direction_output; |
@@ -545,10 +574,14 @@ static int sx150x_init_hw(struct sx150x_chip *chip, | |||
545 | err = sx150x_i2c_write(chip->client, | 574 | err = sx150x_i2c_write(chip->client, |
546 | chip->dev_cfg->pri.x789.reg_misc, | 575 | chip->dev_cfg->pri.x789.reg_misc, |
547 | 0x01); | 576 | 0x01); |
548 | else | 577 | else if (chip->dev_cfg->model == SX150X_456) |
549 | err = sx150x_i2c_write(chip->client, | 578 | err = sx150x_i2c_write(chip->client, |
550 | chip->dev_cfg->pri.x456.reg_advance, | 579 | chip->dev_cfg->pri.x456.reg_advance, |
551 | 0x04); | 580 | 0x04); |
581 | else | ||
582 | err = sx150x_i2c_write(chip->client, | ||
583 | chip->dev_cfg->pri.x123.reg_advance, | ||
584 | 0x00); | ||
552 | if (err < 0) | 585 | if (err < 0) |
553 | return err; | 586 | return err; |
554 | 587 | ||
@@ -574,13 +607,20 @@ static int sx150x_init_hw(struct sx150x_chip *chip, | |||
574 | pdata->io_polarity); | 607 | pdata->io_polarity); |
575 | if (err < 0) | 608 | if (err < 0) |
576 | return err; | 609 | return err; |
577 | } else { | 610 | } else if (chip->dev_cfg->model == SX150X_456) { |
578 | /* Set all pins to work in normal mode */ | 611 | /* Set all pins to work in normal mode */ |
579 | err = sx150x_init_io(chip, | 612 | err = sx150x_init_io(chip, |
580 | chip->dev_cfg->pri.x456.reg_pld_mode, | 613 | chip->dev_cfg->pri.x456.reg_pld_mode, |
581 | 0); | 614 | 0); |
582 | if (err < 0) | 615 | if (err < 0) |
583 | return err; | 616 | return err; |
617 | } else { | ||
618 | /* Set all pins to work in normal mode */ | ||
619 | err = sx150x_init_io(chip, | ||
620 | chip->dev_cfg->pri.x123.reg_pld_mode, | ||
621 | 0); | ||
622 | if (err < 0) | ||
623 | return err; | ||
584 | } | 624 | } |
585 | 625 | ||
586 | 626 | ||
@@ -647,7 +687,7 @@ static int sx150x_probe(struct i2c_client *client, | |||
647 | if (rc < 0) | 687 | if (rc < 0) |
648 | return rc; | 688 | return rc; |
649 | 689 | ||
650 | rc = gpiochip_add(&chip->gpio_chip); | 690 | rc = gpiochip_add_data(&chip->gpio_chip, chip); |
651 | if (rc) | 691 | if (rc) |
652 | return rc; | 692 | return rc; |
653 | 693 | ||
@@ -680,7 +720,6 @@ static int sx150x_remove(struct i2c_client *client) | |||
680 | static struct i2c_driver sx150x_driver = { | 720 | static struct i2c_driver sx150x_driver = { |
681 | .driver = { | 721 | .driver = { |
682 | .name = "sx150x", | 722 | .name = "sx150x", |
683 | .owner = THIS_MODULE, | ||
684 | .of_match_table = of_match_ptr(sx150x_of_match), | 723 | .of_match_table = of_match_ptr(sx150x_of_match), |
685 | }, | 724 | }, |
686 | .probe = sx150x_probe, | 725 | .probe = sx150x_probe, |
diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c index 7b25fdf64802..e5c5b6205886 100644 --- a/drivers/gpio/gpio-syscon.c +++ b/drivers/gpio/gpio-syscon.c | |||
@@ -59,14 +59,9 @@ struct syscon_gpio_priv { | |||
59 | u32 dir_reg_offset; | 59 | u32 dir_reg_offset; |
60 | }; | 60 | }; |
61 | 61 | ||
62 | static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip) | ||
63 | { | ||
64 | return container_of(chip, struct syscon_gpio_priv, chip); | ||
65 | } | ||
66 | |||
67 | static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset) | 62 | static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset) |
68 | { | 63 | { |
69 | struct syscon_gpio_priv *priv = to_syscon_gpio(chip); | 64 | struct syscon_gpio_priv *priv = gpiochip_get_data(chip); |
70 | unsigned int val, offs; | 65 | unsigned int val, offs; |
71 | int ret; | 66 | int ret; |
72 | 67 | ||
@@ -82,7 +77,7 @@ static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
82 | 77 | ||
83 | static void syscon_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | 78 | static void syscon_gpio_set(struct gpio_chip *chip, unsigned offset, int val) |
84 | { | 79 | { |
85 | struct syscon_gpio_priv *priv = to_syscon_gpio(chip); | 80 | struct syscon_gpio_priv *priv = gpiochip_get_data(chip); |
86 | unsigned int offs; | 81 | unsigned int offs; |
87 | 82 | ||
88 | offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; | 83 | offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; |
@@ -95,7 +90,7 @@ static void syscon_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | |||
95 | 90 | ||
96 | static int syscon_gpio_dir_in(struct gpio_chip *chip, unsigned offset) | 91 | static int syscon_gpio_dir_in(struct gpio_chip *chip, unsigned offset) |
97 | { | 92 | { |
98 | struct syscon_gpio_priv *priv = to_syscon_gpio(chip); | 93 | struct syscon_gpio_priv *priv = gpiochip_get_data(chip); |
99 | 94 | ||
100 | if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) { | 95 | if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) { |
101 | unsigned int offs; | 96 | unsigned int offs; |
@@ -113,7 +108,7 @@ static int syscon_gpio_dir_in(struct gpio_chip *chip, unsigned offset) | |||
113 | 108 | ||
114 | static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val) | 109 | static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val) |
115 | { | 110 | { |
116 | struct syscon_gpio_priv *priv = to_syscon_gpio(chip); | 111 | struct syscon_gpio_priv *priv = gpiochip_get_data(chip); |
117 | 112 | ||
118 | if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) { | 113 | if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) { |
119 | unsigned int offs; | 114 | unsigned int offs; |
@@ -144,7 +139,7 @@ static const struct syscon_gpio_data clps711x_mctrl_gpio = { | |||
144 | 139 | ||
145 | static void keystone_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | 140 | static void keystone_gpio_set(struct gpio_chip *chip, unsigned offset, int val) |
146 | { | 141 | { |
147 | struct syscon_gpio_priv *priv = to_syscon_gpio(chip); | 142 | struct syscon_gpio_priv *priv = gpiochip_get_data(chip); |
148 | unsigned int offs; | 143 | unsigned int offs; |
149 | int ret; | 144 | int ret; |
150 | 145 | ||
@@ -159,7 +154,7 @@ static void keystone_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | |||
159 | BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT, | 154 | BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT, |
160 | BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT); | 155 | BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT); |
161 | if (ret < 0) | 156 | if (ret < 0) |
162 | dev_err(chip->dev, "gpio write failed ret(%d)\n", ret); | 157 | dev_err(chip->parent, "gpio write failed ret(%d)\n", ret); |
163 | } | 158 | } |
164 | 159 | ||
165 | static const struct syscon_gpio_data keystone_dsp_gpio = { | 160 | static const struct syscon_gpio_data keystone_dsp_gpio = { |
@@ -228,7 +223,7 @@ static int syscon_gpio_probe(struct platform_device *pdev) | |||
228 | priv->dir_reg_offset <<= 3; | 223 | priv->dir_reg_offset <<= 3; |
229 | } | 224 | } |
230 | 225 | ||
231 | priv->chip.dev = dev; | 226 | priv->chip.parent = dev; |
232 | priv->chip.owner = THIS_MODULE; | 227 | priv->chip.owner = THIS_MODULE; |
233 | priv->chip.label = dev_name(dev); | 228 | priv->chip.label = dev_name(dev); |
234 | priv->chip.base = -1; | 229 | priv->chip.base = -1; |
@@ -243,7 +238,7 @@ static int syscon_gpio_probe(struct platform_device *pdev) | |||
243 | 238 | ||
244 | platform_set_drvdata(pdev, priv); | 239 | platform_set_drvdata(pdev, priv); |
245 | 240 | ||
246 | return gpiochip_add(&priv->chip); | 241 | return gpiochip_add_data(&priv->chip, priv); |
247 | } | 242 | } |
248 | 243 | ||
249 | static int syscon_gpio_remove(struct platform_device *pdev) | 244 | static int syscon_gpio_remove(struct platform_device *pdev) |
diff --git a/drivers/gpio/gpio-tb10x.c b/drivers/gpio/gpio-tb10x.c index 4356e6c20fc5..5eaec20ddbc7 100644 --- a/drivers/gpio/gpio-tb10x.c +++ b/drivers/gpio/gpio-tb10x.c | |||
@@ -87,14 +87,9 @@ static inline void tb10x_set_bits(struct tb10x_gpio *gpio, unsigned int offs, | |||
87 | spin_unlock_irqrestore(&gpio->spinlock, flags); | 87 | spin_unlock_irqrestore(&gpio->spinlock, flags); |
88 | } | 88 | } |
89 | 89 | ||
90 | static inline struct tb10x_gpio *to_tb10x_gpio(struct gpio_chip *chip) | ||
91 | { | ||
92 | return container_of(chip, struct tb10x_gpio, gc); | ||
93 | } | ||
94 | |||
95 | static int tb10x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | 90 | static int tb10x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) |
96 | { | 91 | { |
97 | struct tb10x_gpio *tb10x_gpio = to_tb10x_gpio(chip); | 92 | struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip); |
98 | int mask = BIT(offset); | 93 | int mask = BIT(offset); |
99 | int val = TB10X_GPIO_DIR_IN << offset; | 94 | int val = TB10X_GPIO_DIR_IN << offset; |
100 | 95 | ||
@@ -105,7 +100,7 @@ static int tb10x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | |||
105 | 100 | ||
106 | static int tb10x_gpio_get(struct gpio_chip *chip, unsigned offset) | 101 | static int tb10x_gpio_get(struct gpio_chip *chip, unsigned offset) |
107 | { | 102 | { |
108 | struct tb10x_gpio *tb10x_gpio = to_tb10x_gpio(chip); | 103 | struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip); |
109 | int val; | 104 | int val; |
110 | 105 | ||
111 | val = tb10x_reg_read(tb10x_gpio, OFFSET_TO_REG_DATA); | 106 | val = tb10x_reg_read(tb10x_gpio, OFFSET_TO_REG_DATA); |
@@ -118,7 +113,7 @@ static int tb10x_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
118 | 113 | ||
119 | static void tb10x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 114 | static void tb10x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
120 | { | 115 | { |
121 | struct tb10x_gpio *tb10x_gpio = to_tb10x_gpio(chip); | 116 | struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip); |
122 | int mask = BIT(offset); | 117 | int mask = BIT(offset); |
123 | int val = value << offset; | 118 | int val = value << offset; |
124 | 119 | ||
@@ -128,7 +123,7 @@ static void tb10x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
128 | static int tb10x_gpio_direction_out(struct gpio_chip *chip, | 123 | static int tb10x_gpio_direction_out(struct gpio_chip *chip, |
129 | unsigned offset, int value) | 124 | unsigned offset, int value) |
130 | { | 125 | { |
131 | struct tb10x_gpio *tb10x_gpio = to_tb10x_gpio(chip); | 126 | struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip); |
132 | int mask = BIT(offset); | 127 | int mask = BIT(offset); |
133 | int val = TB10X_GPIO_DIR_OUT << offset; | 128 | int val = TB10X_GPIO_DIR_OUT << offset; |
134 | 129 | ||
@@ -140,7 +135,7 @@ static int tb10x_gpio_direction_out(struct gpio_chip *chip, | |||
140 | 135 | ||
141 | static int tb10x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 136 | static int tb10x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
142 | { | 137 | { |
143 | struct tb10x_gpio *tb10x_gpio = to_tb10x_gpio(chip); | 138 | struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip); |
144 | 139 | ||
145 | return irq_create_mapping(tb10x_gpio->domain, offset); | 140 | return irq_create_mapping(tb10x_gpio->domain, offset); |
146 | } | 141 | } |
@@ -197,7 +192,7 @@ static int tb10x_gpio_probe(struct platform_device *pdev) | |||
197 | return PTR_ERR(tb10x_gpio->base); | 192 | return PTR_ERR(tb10x_gpio->base); |
198 | 193 | ||
199 | tb10x_gpio->gc.label = of_node_full_name(dn); | 194 | tb10x_gpio->gc.label = of_node_full_name(dn); |
200 | tb10x_gpio->gc.dev = &pdev->dev; | 195 | tb10x_gpio->gc.parent = &pdev->dev; |
201 | tb10x_gpio->gc.owner = THIS_MODULE; | 196 | tb10x_gpio->gc.owner = THIS_MODULE; |
202 | tb10x_gpio->gc.direction_input = tb10x_gpio_direction_in; | 197 | tb10x_gpio->gc.direction_input = tb10x_gpio_direction_in; |
203 | tb10x_gpio->gc.get = tb10x_gpio_get; | 198 | tb10x_gpio->gc.get = tb10x_gpio_get; |
@@ -210,7 +205,7 @@ static int tb10x_gpio_probe(struct platform_device *pdev) | |||
210 | tb10x_gpio->gc.can_sleep = false; | 205 | tb10x_gpio->gc.can_sleep = false; |
211 | 206 | ||
212 | 207 | ||
213 | ret = gpiochip_add(&tb10x_gpio->gc); | 208 | ret = gpiochip_add_data(&tb10x_gpio->gc, tb10x_gpio); |
214 | if (ret < 0) { | 209 | if (ret < 0) { |
215 | dev_err(&pdev->dev, "Could not add gpiochip.\n"); | 210 | dev_err(&pdev->dev, "Could not add gpiochip.\n"); |
216 | goto fail_gpiochip_registration; | 211 | goto fail_gpiochip_registration; |
diff --git a/drivers/gpio/gpio-tc3589x.c b/drivers/gpio/gpio-tc3589x.c index d1d585ddb9ab..05a27ec55add 100644 --- a/drivers/gpio/gpio-tc3589x.c +++ b/drivers/gpio/gpio-tc3589x.c | |||
@@ -34,14 +34,9 @@ struct tc3589x_gpio { | |||
34 | u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; | 34 | u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; |
35 | }; | 35 | }; |
36 | 36 | ||
37 | static inline struct tc3589x_gpio *to_tc3589x_gpio(struct gpio_chip *chip) | ||
38 | { | ||
39 | return container_of(chip, struct tc3589x_gpio, chip); | ||
40 | } | ||
41 | |||
42 | static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset) | 37 | static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset) |
43 | { | 38 | { |
44 | struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip); | 39 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); |
45 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; | 40 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; |
46 | u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; | 41 | u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; |
47 | u8 mask = 1 << (offset % 8); | 42 | u8 mask = 1 << (offset % 8); |
@@ -51,12 +46,12 @@ static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
51 | if (ret < 0) | 46 | if (ret < 0) |
52 | return ret; | 47 | return ret; |
53 | 48 | ||
54 | return ret & mask; | 49 | return !!(ret & mask); |
55 | } | 50 | } |
56 | 51 | ||
57 | static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | 52 | static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val) |
58 | { | 53 | { |
59 | struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip); | 54 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); |
60 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; | 55 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; |
61 | u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; | 56 | u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; |
62 | unsigned pos = offset % 8; | 57 | unsigned pos = offset % 8; |
@@ -68,7 +63,7 @@ static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | |||
68 | static int tc3589x_gpio_direction_output(struct gpio_chip *chip, | 63 | static int tc3589x_gpio_direction_output(struct gpio_chip *chip, |
69 | unsigned offset, int val) | 64 | unsigned offset, int val) |
70 | { | 65 | { |
71 | struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip); | 66 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); |
72 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; | 67 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; |
73 | u8 reg = TC3589x_GPIODIR0 + offset / 8; | 68 | u8 reg = TC3589x_GPIODIR0 + offset / 8; |
74 | unsigned pos = offset % 8; | 69 | unsigned pos = offset % 8; |
@@ -81,7 +76,7 @@ static int tc3589x_gpio_direction_output(struct gpio_chip *chip, | |||
81 | static int tc3589x_gpio_direction_input(struct gpio_chip *chip, | 76 | static int tc3589x_gpio_direction_input(struct gpio_chip *chip, |
82 | unsigned offset) | 77 | unsigned offset) |
83 | { | 78 | { |
84 | struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip); | 79 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); |
85 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; | 80 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; |
86 | u8 reg = TC3589x_GPIODIR0 + offset / 8; | 81 | u8 reg = TC3589x_GPIODIR0 + offset / 8; |
87 | unsigned pos = offset % 8; | 82 | unsigned pos = offset % 8; |
@@ -102,7 +97,7 @@ static struct gpio_chip template_chip = { | |||
102 | static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type) | 97 | static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type) |
103 | { | 98 | { |
104 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 99 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
105 | struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(gc); | 100 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); |
106 | int offset = d->hwirq; | 101 | int offset = d->hwirq; |
107 | int regoffset = offset / 8; | 102 | int regoffset = offset / 8; |
108 | int mask = 1 << (offset % 8); | 103 | int mask = 1 << (offset % 8); |
@@ -130,7 +125,7 @@ static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
130 | static void tc3589x_gpio_irq_lock(struct irq_data *d) | 125 | static void tc3589x_gpio_irq_lock(struct irq_data *d) |
131 | { | 126 | { |
132 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 127 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
133 | struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(gc); | 128 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); |
134 | 129 | ||
135 | mutex_lock(&tc3589x_gpio->irq_lock); | 130 | mutex_lock(&tc3589x_gpio->irq_lock); |
136 | } | 131 | } |
@@ -138,7 +133,7 @@ static void tc3589x_gpio_irq_lock(struct irq_data *d) | |||
138 | static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d) | 133 | static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d) |
139 | { | 134 | { |
140 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 135 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
141 | struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(gc); | 136 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); |
142 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; | 137 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; |
143 | static const u8 regmap[] = { | 138 | static const u8 regmap[] = { |
144 | [REG_IBE] = TC3589x_GPIOIBE0, | 139 | [REG_IBE] = TC3589x_GPIOIBE0, |
@@ -167,7 +162,7 @@ static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d) | |||
167 | static void tc3589x_gpio_irq_mask(struct irq_data *d) | 162 | static void tc3589x_gpio_irq_mask(struct irq_data *d) |
168 | { | 163 | { |
169 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 164 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
170 | struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(gc); | 165 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); |
171 | int offset = d->hwirq; | 166 | int offset = d->hwirq; |
172 | int regoffset = offset / 8; | 167 | int regoffset = offset / 8; |
173 | int mask = 1 << (offset % 8); | 168 | int mask = 1 << (offset % 8); |
@@ -178,7 +173,7 @@ static void tc3589x_gpio_irq_mask(struct irq_data *d) | |||
178 | static void tc3589x_gpio_irq_unmask(struct irq_data *d) | 173 | static void tc3589x_gpio_irq_unmask(struct irq_data *d) |
179 | { | 174 | { |
180 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 175 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
181 | struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(gc); | 176 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); |
182 | int offset = d->hwirq; | 177 | int offset = d->hwirq; |
183 | int regoffset = offset / 8; | 178 | int regoffset = offset / 8; |
184 | int mask = 1 << (offset % 8); | 179 | int mask = 1 << (offset % 8); |
@@ -258,7 +253,7 @@ static int tc3589x_gpio_probe(struct platform_device *pdev) | |||
258 | 253 | ||
259 | tc3589x_gpio->chip = template_chip; | 254 | tc3589x_gpio->chip = template_chip; |
260 | tc3589x_gpio->chip.ngpio = tc3589x->num_gpio; | 255 | tc3589x_gpio->chip.ngpio = tc3589x->num_gpio; |
261 | tc3589x_gpio->chip.dev = &pdev->dev; | 256 | tc3589x_gpio->chip.parent = &pdev->dev; |
262 | tc3589x_gpio->chip.base = -1; | 257 | tc3589x_gpio->chip.base = -1; |
263 | tc3589x_gpio->chip.of_node = np; | 258 | tc3589x_gpio->chip.of_node = np; |
264 | 259 | ||
@@ -277,7 +272,7 @@ static int tc3589x_gpio_probe(struct platform_device *pdev) | |||
277 | return ret; | 272 | return ret; |
278 | } | 273 | } |
279 | 274 | ||
280 | ret = gpiochip_add(&tc3589x_gpio->chip); | 275 | ret = gpiochip_add_data(&tc3589x_gpio->chip, tc3589x_gpio); |
281 | if (ret) { | 276 | if (ret) { |
282 | dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); | 277 | dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); |
283 | return ret; | 278 | return ret; |
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index 896bf29776b0..9a1a7e2ef388 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c | |||
@@ -545,7 +545,7 @@ static int tegra_gpio_probe(struct platform_device *pdev) | |||
545 | 545 | ||
546 | tegra_gpio_chip.of_node = pdev->dev.of_node; | 546 | tegra_gpio_chip.of_node = pdev->dev.of_node; |
547 | 547 | ||
548 | ret = gpiochip_add(&tegra_gpio_chip); | 548 | ret = gpiochip_add_data(&tegra_gpio_chip, NULL); |
549 | if (ret < 0) { | 549 | if (ret < 0) { |
550 | irq_domain_remove(irq_domain); | 550 | irq_domain_remove(irq_domain); |
551 | return ret; | 551 | return ret; |
diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c index 30653e6319e9..a6de10c5275b 100644 --- a/drivers/gpio/gpio-timberdale.c +++ b/drivers/gpio/gpio-timberdale.c | |||
@@ -53,7 +53,7 @@ struct timbgpio { | |||
53 | static int timbgpio_update_bit(struct gpio_chip *gpio, unsigned index, | 53 | static int timbgpio_update_bit(struct gpio_chip *gpio, unsigned index, |
54 | unsigned offset, bool enabled) | 54 | unsigned offset, bool enabled) |
55 | { | 55 | { |
56 | struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio); | 56 | struct timbgpio *tgpio = gpiochip_get_data(gpio); |
57 | u32 reg; | 57 | u32 reg; |
58 | 58 | ||
59 | spin_lock(&tgpio->lock); | 59 | spin_lock(&tgpio->lock); |
@@ -77,7 +77,7 @@ static int timbgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) | |||
77 | 77 | ||
78 | static int timbgpio_gpio_get(struct gpio_chip *gpio, unsigned nr) | 78 | static int timbgpio_gpio_get(struct gpio_chip *gpio, unsigned nr) |
79 | { | 79 | { |
80 | struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio); | 80 | struct timbgpio *tgpio = gpiochip_get_data(gpio); |
81 | u32 value; | 81 | u32 value; |
82 | 82 | ||
83 | value = ioread32(tgpio->membase + TGPIOVAL); | 83 | value = ioread32(tgpio->membase + TGPIOVAL); |
@@ -98,7 +98,7 @@ static void timbgpio_gpio_set(struct gpio_chip *gpio, | |||
98 | 98 | ||
99 | static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset) | 99 | static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset) |
100 | { | 100 | { |
101 | struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio); | 101 | struct timbgpio *tgpio = gpiochip_get_data(gpio); |
102 | 102 | ||
103 | if (tgpio->irq_base <= 0) | 103 | if (tgpio->irq_base <= 0) |
104 | return -EINVAL; | 104 | return -EINVAL; |
@@ -268,7 +268,7 @@ static int timbgpio_probe(struct platform_device *pdev) | |||
268 | 268 | ||
269 | gc->label = dev_name(&pdev->dev); | 269 | gc->label = dev_name(&pdev->dev); |
270 | gc->owner = THIS_MODULE; | 270 | gc->owner = THIS_MODULE; |
271 | gc->dev = &pdev->dev; | 271 | gc->parent = &pdev->dev; |
272 | gc->direction_input = timbgpio_gpio_direction_input; | 272 | gc->direction_input = timbgpio_gpio_direction_input; |
273 | gc->get = timbgpio_gpio_get; | 273 | gc->get = timbgpio_gpio_get; |
274 | gc->direction_output = timbgpio_gpio_direction_output; | 274 | gc->direction_output = timbgpio_gpio_direction_output; |
@@ -279,7 +279,7 @@ static int timbgpio_probe(struct platform_device *pdev) | |||
279 | gc->ngpio = pdata->nr_pins; | 279 | gc->ngpio = pdata->nr_pins; |
280 | gc->can_sleep = false; | 280 | gc->can_sleep = false; |
281 | 281 | ||
282 | err = gpiochip_add(gc); | 282 | err = gpiochip_add_data(gc, tgpio); |
283 | if (err) | 283 | if (err) |
284 | return err; | 284 | return err; |
285 | 285 | ||
diff --git a/drivers/gpio/gpio-tps6586x.c b/drivers/gpio/gpio-tps6586x.c index 9c9238e838a9..87de5486a29e 100644 --- a/drivers/gpio/gpio-tps6586x.c +++ b/drivers/gpio/gpio-tps6586x.c | |||
@@ -38,14 +38,9 @@ struct tps6586x_gpio { | |||
38 | struct device *parent; | 38 | struct device *parent; |
39 | }; | 39 | }; |
40 | 40 | ||
41 | static inline struct tps6586x_gpio *to_tps6586x_gpio(struct gpio_chip *chip) | ||
42 | { | ||
43 | return container_of(chip, struct tps6586x_gpio, gpio_chip); | ||
44 | } | ||
45 | |||
46 | static int tps6586x_gpio_get(struct gpio_chip *gc, unsigned offset) | 41 | static int tps6586x_gpio_get(struct gpio_chip *gc, unsigned offset) |
47 | { | 42 | { |
48 | struct tps6586x_gpio *tps6586x_gpio = to_tps6586x_gpio(gc); | 43 | struct tps6586x_gpio *tps6586x_gpio = gpiochip_get_data(gc); |
49 | uint8_t val; | 44 | uint8_t val; |
50 | int ret; | 45 | int ret; |
51 | 46 | ||
@@ -59,7 +54,7 @@ static int tps6586x_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
59 | static void tps6586x_gpio_set(struct gpio_chip *gc, unsigned offset, | 54 | static void tps6586x_gpio_set(struct gpio_chip *gc, unsigned offset, |
60 | int value) | 55 | int value) |
61 | { | 56 | { |
62 | struct tps6586x_gpio *tps6586x_gpio = to_tps6586x_gpio(gc); | 57 | struct tps6586x_gpio *tps6586x_gpio = gpiochip_get_data(gc); |
63 | 58 | ||
64 | tps6586x_update(tps6586x_gpio->parent, TPS6586X_GPIOSET2, | 59 | tps6586x_update(tps6586x_gpio->parent, TPS6586X_GPIOSET2, |
65 | value << offset, 1 << offset); | 60 | value << offset, 1 << offset); |
@@ -68,7 +63,7 @@ static void tps6586x_gpio_set(struct gpio_chip *gc, unsigned offset, | |||
68 | static int tps6586x_gpio_output(struct gpio_chip *gc, unsigned offset, | 63 | static int tps6586x_gpio_output(struct gpio_chip *gc, unsigned offset, |
69 | int value) | 64 | int value) |
70 | { | 65 | { |
71 | struct tps6586x_gpio *tps6586x_gpio = to_tps6586x_gpio(gc); | 66 | struct tps6586x_gpio *tps6586x_gpio = gpiochip_get_data(gc); |
72 | uint8_t val, mask; | 67 | uint8_t val, mask; |
73 | 68 | ||
74 | tps6586x_gpio_set(gc, offset, value); | 69 | tps6586x_gpio_set(gc, offset, value); |
@@ -82,7 +77,7 @@ static int tps6586x_gpio_output(struct gpio_chip *gc, unsigned offset, | |||
82 | 77 | ||
83 | static int tps6586x_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 78 | static int tps6586x_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
84 | { | 79 | { |
85 | struct tps6586x_gpio *tps6586x_gpio = to_tps6586x_gpio(gc); | 80 | struct tps6586x_gpio *tps6586x_gpio = gpiochip_get_data(gc); |
86 | 81 | ||
87 | return tps6586x_irq_get_virq(tps6586x_gpio->parent, | 82 | return tps6586x_irq_get_virq(tps6586x_gpio->parent, |
88 | TPS6586X_INT_PLDO_0 + offset); | 83 | TPS6586X_INT_PLDO_0 + offset); |
@@ -104,7 +99,7 @@ static int tps6586x_gpio_probe(struct platform_device *pdev) | |||
104 | 99 | ||
105 | tps6586x_gpio->gpio_chip.owner = THIS_MODULE; | 100 | tps6586x_gpio->gpio_chip.owner = THIS_MODULE; |
106 | tps6586x_gpio->gpio_chip.label = pdev->name; | 101 | tps6586x_gpio->gpio_chip.label = pdev->name; |
107 | tps6586x_gpio->gpio_chip.dev = &pdev->dev; | 102 | tps6586x_gpio->gpio_chip.parent = &pdev->dev; |
108 | tps6586x_gpio->gpio_chip.ngpio = 4; | 103 | tps6586x_gpio->gpio_chip.ngpio = 4; |
109 | tps6586x_gpio->gpio_chip.can_sleep = true; | 104 | tps6586x_gpio->gpio_chip.can_sleep = true; |
110 | 105 | ||
@@ -122,7 +117,7 @@ static int tps6586x_gpio_probe(struct platform_device *pdev) | |||
122 | else | 117 | else |
123 | tps6586x_gpio->gpio_chip.base = -1; | 118 | tps6586x_gpio->gpio_chip.base = -1; |
124 | 119 | ||
125 | ret = gpiochip_add(&tps6586x_gpio->gpio_chip); | 120 | ret = gpiochip_add_data(&tps6586x_gpio->gpio_chip, tps6586x_gpio); |
126 | if (ret < 0) { | 121 | if (ret < 0) { |
127 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); | 122 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); |
128 | return ret; | 123 | return ret; |
diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c index 88f1f5ff4e96..e81eee7627a3 100644 --- a/drivers/gpio/gpio-tps65910.c +++ b/drivers/gpio/gpio-tps65910.c | |||
@@ -27,14 +27,9 @@ struct tps65910_gpio { | |||
27 | struct tps65910 *tps65910; | 27 | struct tps65910 *tps65910; |
28 | }; | 28 | }; |
29 | 29 | ||
30 | static inline struct tps65910_gpio *to_tps65910_gpio(struct gpio_chip *chip) | ||
31 | { | ||
32 | return container_of(chip, struct tps65910_gpio, gpio_chip); | ||
33 | } | ||
34 | |||
35 | static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset) | 30 | static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset) |
36 | { | 31 | { |
37 | struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc); | 32 | struct tps65910_gpio *tps65910_gpio = gpiochip_get_data(gc); |
38 | struct tps65910 *tps65910 = tps65910_gpio->tps65910; | 33 | struct tps65910 *tps65910 = tps65910_gpio->tps65910; |
39 | unsigned int val; | 34 | unsigned int val; |
40 | 35 | ||
@@ -49,7 +44,7 @@ static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
49 | static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset, | 44 | static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset, |
50 | int value) | 45 | int value) |
51 | { | 46 | { |
52 | struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc); | 47 | struct tps65910_gpio *tps65910_gpio = gpiochip_get_data(gc); |
53 | struct tps65910 *tps65910 = tps65910_gpio->tps65910; | 48 | struct tps65910 *tps65910 = tps65910_gpio->tps65910; |
54 | 49 | ||
55 | if (value) | 50 | if (value) |
@@ -63,7 +58,7 @@ static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset, | |||
63 | static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset, | 58 | static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset, |
64 | int value) | 59 | int value) |
65 | { | 60 | { |
66 | struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc); | 61 | struct tps65910_gpio *tps65910_gpio = gpiochip_get_data(gc); |
67 | struct tps65910 *tps65910 = tps65910_gpio->tps65910; | 62 | struct tps65910 *tps65910 = tps65910_gpio->tps65910; |
68 | 63 | ||
69 | /* Set the initial value */ | 64 | /* Set the initial value */ |
@@ -75,7 +70,7 @@ static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset, | |||
75 | 70 | ||
76 | static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset) | 71 | static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset) |
77 | { | 72 | { |
78 | struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc); | 73 | struct tps65910_gpio *tps65910_gpio = gpiochip_get_data(gc); |
79 | struct tps65910 *tps65910 = tps65910_gpio->tps65910; | 74 | struct tps65910 *tps65910 = tps65910_gpio->tps65910; |
80 | 75 | ||
81 | return tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset, | 76 | return tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset, |
@@ -146,7 +141,7 @@ static int tps65910_gpio_probe(struct platform_device *pdev) | |||
146 | tps65910_gpio->gpio_chip.direction_output = tps65910_gpio_output; | 141 | tps65910_gpio->gpio_chip.direction_output = tps65910_gpio_output; |
147 | tps65910_gpio->gpio_chip.set = tps65910_gpio_set; | 142 | tps65910_gpio->gpio_chip.set = tps65910_gpio_set; |
148 | tps65910_gpio->gpio_chip.get = tps65910_gpio_get; | 143 | tps65910_gpio->gpio_chip.get = tps65910_gpio_get; |
149 | tps65910_gpio->gpio_chip.dev = &pdev->dev; | 144 | tps65910_gpio->gpio_chip.parent = &pdev->dev; |
150 | #ifdef CONFIG_OF_GPIO | 145 | #ifdef CONFIG_OF_GPIO |
151 | tps65910_gpio->gpio_chip.of_node = tps65910->dev->of_node; | 146 | tps65910_gpio->gpio_chip.of_node = tps65910->dev->of_node; |
152 | #endif | 147 | #endif |
@@ -175,7 +170,7 @@ static int tps65910_gpio_probe(struct platform_device *pdev) | |||
175 | } | 170 | } |
176 | 171 | ||
177 | skip_init: | 172 | skip_init: |
178 | ret = gpiochip_add(&tps65910_gpio->gpio_chip); | 173 | ret = gpiochip_add_data(&tps65910_gpio->gpio_chip, tps65910_gpio); |
179 | if (ret < 0) { | 174 | if (ret < 0) { |
180 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); | 175 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); |
181 | return ret; | 176 | return ret; |
diff --git a/drivers/gpio/gpio-tps65912.c b/drivers/gpio/gpio-tps65912.c index 9cdbc0c9cb2d..4f2029c7da3a 100644 --- a/drivers/gpio/gpio-tps65912.c +++ b/drivers/gpio/gpio-tps65912.c | |||
@@ -26,11 +26,9 @@ struct tps65912_gpio_data { | |||
26 | struct gpio_chip gpio_chip; | 26 | struct gpio_chip gpio_chip; |
27 | }; | 27 | }; |
28 | 28 | ||
29 | #define to_tgd(gc) container_of(gc, struct tps65912_gpio_data, gpio_chip) | ||
30 | |||
31 | static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset) | 29 | static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset) |
32 | { | 30 | { |
33 | struct tps65912_gpio_data *tps65912_gpio = to_tgd(gc); | 31 | struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc); |
34 | struct tps65912 *tps65912 = tps65912_gpio->tps65912; | 32 | struct tps65912 *tps65912 = tps65912_gpio->tps65912; |
35 | int val; | 33 | int val; |
36 | 34 | ||
@@ -45,7 +43,7 @@ static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
45 | static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset, | 43 | static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset, |
46 | int value) | 44 | int value) |
47 | { | 45 | { |
48 | struct tps65912_gpio_data *tps65912_gpio = to_tgd(gc); | 46 | struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc); |
49 | struct tps65912 *tps65912 = tps65912_gpio->tps65912; | 47 | struct tps65912 *tps65912 = tps65912_gpio->tps65912; |
50 | 48 | ||
51 | if (value) | 49 | if (value) |
@@ -59,7 +57,7 @@ static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset, | |||
59 | static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset, | 57 | static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset, |
60 | int value) | 58 | int value) |
61 | { | 59 | { |
62 | struct tps65912_gpio_data *tps65912_gpio = to_tgd(gc); | 60 | struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc); |
63 | struct tps65912 *tps65912 = tps65912_gpio->tps65912; | 61 | struct tps65912 *tps65912 = tps65912_gpio->tps65912; |
64 | 62 | ||
65 | /* Set the initial value */ | 63 | /* Set the initial value */ |
@@ -71,7 +69,7 @@ static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset, | |||
71 | 69 | ||
72 | static int tps65912_gpio_input(struct gpio_chip *gc, unsigned offset) | 70 | static int tps65912_gpio_input(struct gpio_chip *gc, unsigned offset) |
73 | { | 71 | { |
74 | struct tps65912_gpio_data *tps65912_gpio = to_tgd(gc); | 72 | struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc); |
75 | struct tps65912 *tps65912 = tps65912_gpio->tps65912; | 73 | struct tps65912 *tps65912 = tps65912_gpio->tps65912; |
76 | 74 | ||
77 | return tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset, | 75 | return tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset, |
@@ -104,11 +102,11 @@ static int tps65912_gpio_probe(struct platform_device *pdev) | |||
104 | 102 | ||
105 | tps65912_gpio->tps65912 = tps65912; | 103 | tps65912_gpio->tps65912 = tps65912; |
106 | tps65912_gpio->gpio_chip = template_chip; | 104 | tps65912_gpio->gpio_chip = template_chip; |
107 | tps65912_gpio->gpio_chip.dev = &pdev->dev; | 105 | tps65912_gpio->gpio_chip.parent = &pdev->dev; |
108 | if (pdata && pdata->gpio_base) | 106 | if (pdata && pdata->gpio_base) |
109 | tps65912_gpio->gpio_chip.base = pdata->gpio_base; | 107 | tps65912_gpio->gpio_chip.base = pdata->gpio_base; |
110 | 108 | ||
111 | ret = gpiochip_add(&tps65912_gpio->gpio_chip); | 109 | ret = gpiochip_add_data(&tps65912_gpio->gpio_chip, tps65912_gpio); |
112 | if (ret < 0) { | 110 | if (ret < 0) { |
113 | dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret); | 111 | dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret); |
114 | return ret; | 112 | return ret; |
diff --git a/drivers/gpio/gpio-ts5500.c b/drivers/gpio/gpio-ts5500.c index b29a102d136b..5f945083f9d8 100644 --- a/drivers/gpio/gpio-ts5500.c +++ b/drivers/gpio/gpio-ts5500.c | |||
@@ -185,11 +185,6 @@ static const struct ts5500_dio ts5500_lcd[] = { | |||
185 | TS5500_DIO_IN_IRQ(0x73, 7, 1), | 185 | TS5500_DIO_IN_IRQ(0x73, 7, 1), |
186 | }; | 186 | }; |
187 | 187 | ||
188 | static inline struct ts5500_priv *ts5500_gc_to_priv(struct gpio_chip *chip) | ||
189 | { | ||
190 | return container_of(chip, struct ts5500_priv, gpio_chip); | ||
191 | } | ||
192 | |||
193 | static inline void ts5500_set_mask(u8 mask, u8 addr) | 188 | static inline void ts5500_set_mask(u8 mask, u8 addr) |
194 | { | 189 | { |
195 | u8 val = inb(addr); | 190 | u8 val = inb(addr); |
@@ -206,7 +201,7 @@ static inline void ts5500_clear_mask(u8 mask, u8 addr) | |||
206 | 201 | ||
207 | static int ts5500_gpio_input(struct gpio_chip *chip, unsigned offset) | 202 | static int ts5500_gpio_input(struct gpio_chip *chip, unsigned offset) |
208 | { | 203 | { |
209 | struct ts5500_priv *priv = ts5500_gc_to_priv(chip); | 204 | struct ts5500_priv *priv = gpiochip_get_data(chip); |
210 | const struct ts5500_dio line = priv->pinout[offset]; | 205 | const struct ts5500_dio line = priv->pinout[offset]; |
211 | unsigned long flags; | 206 | unsigned long flags; |
212 | 207 | ||
@@ -225,7 +220,7 @@ static int ts5500_gpio_input(struct gpio_chip *chip, unsigned offset) | |||
225 | 220 | ||
226 | static int ts5500_gpio_get(struct gpio_chip *chip, unsigned offset) | 221 | static int ts5500_gpio_get(struct gpio_chip *chip, unsigned offset) |
227 | { | 222 | { |
228 | struct ts5500_priv *priv = ts5500_gc_to_priv(chip); | 223 | struct ts5500_priv *priv = gpiochip_get_data(chip); |
229 | const struct ts5500_dio line = priv->pinout[offset]; | 224 | const struct ts5500_dio line = priv->pinout[offset]; |
230 | 225 | ||
231 | return !!(inb(line.value_addr) & line.value_mask); | 226 | return !!(inb(line.value_addr) & line.value_mask); |
@@ -233,7 +228,7 @@ static int ts5500_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
233 | 228 | ||
234 | static int ts5500_gpio_output(struct gpio_chip *chip, unsigned offset, int val) | 229 | static int ts5500_gpio_output(struct gpio_chip *chip, unsigned offset, int val) |
235 | { | 230 | { |
236 | struct ts5500_priv *priv = ts5500_gc_to_priv(chip); | 231 | struct ts5500_priv *priv = gpiochip_get_data(chip); |
237 | const struct ts5500_dio line = priv->pinout[offset]; | 232 | const struct ts5500_dio line = priv->pinout[offset]; |
238 | unsigned long flags; | 233 | unsigned long flags; |
239 | 234 | ||
@@ -255,7 +250,7 @@ static int ts5500_gpio_output(struct gpio_chip *chip, unsigned offset, int val) | |||
255 | 250 | ||
256 | static void ts5500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | 251 | static void ts5500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) |
257 | { | 252 | { |
258 | struct ts5500_priv *priv = ts5500_gc_to_priv(chip); | 253 | struct ts5500_priv *priv = gpiochip_get_data(chip); |
259 | const struct ts5500_dio line = priv->pinout[offset]; | 254 | const struct ts5500_dio line = priv->pinout[offset]; |
260 | unsigned long flags; | 255 | unsigned long flags; |
261 | 256 | ||
@@ -269,7 +264,7 @@ static void ts5500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | |||
269 | 264 | ||
270 | static int ts5500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 265 | static int ts5500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
271 | { | 266 | { |
272 | struct ts5500_priv *priv = ts5500_gc_to_priv(chip); | 267 | struct ts5500_priv *priv = gpiochip_get_data(chip); |
273 | const struct ts5500_dio *block = priv->pinout; | 268 | const struct ts5500_dio *block = priv->pinout; |
274 | const struct ts5500_dio line = block[offset]; | 269 | const struct ts5500_dio line = block[offset]; |
275 | 270 | ||
@@ -315,7 +310,8 @@ static void ts5500_disable_irq(struct ts5500_priv *priv) | |||
315 | else if (priv->hwirq == 1) | 310 | else if (priv->hwirq == 1) |
316 | ts5500_clear_mask(BIT(6), 0x7d); /* LCD_RS on IRQ1 */ | 311 | ts5500_clear_mask(BIT(6), 0x7d); /* LCD_RS on IRQ1 */ |
317 | else | 312 | else |
318 | dev_err(priv->gpio_chip.dev, "invalid hwirq %d\n", priv->hwirq); | 313 | dev_err(priv->gpio_chip.parent, "invalid hwirq %d\n", |
314 | priv->hwirq); | ||
319 | spin_unlock_irqrestore(&priv->lock, flags); | 315 | spin_unlock_irqrestore(&priv->lock, flags); |
320 | } | 316 | } |
321 | 317 | ||
@@ -346,7 +342,7 @@ static int ts5500_dio_probe(struct platform_device *pdev) | |||
346 | 342 | ||
347 | priv->gpio_chip.owner = THIS_MODULE; | 343 | priv->gpio_chip.owner = THIS_MODULE; |
348 | priv->gpio_chip.label = name; | 344 | priv->gpio_chip.label = name; |
349 | priv->gpio_chip.dev = dev; | 345 | priv->gpio_chip.parent = dev; |
350 | priv->gpio_chip.direction_input = ts5500_gpio_input; | 346 | priv->gpio_chip.direction_input = ts5500_gpio_input; |
351 | priv->gpio_chip.direction_output = ts5500_gpio_output; | 347 | priv->gpio_chip.direction_output = ts5500_gpio_output; |
352 | priv->gpio_chip.get = ts5500_gpio_get; | 348 | priv->gpio_chip.get = ts5500_gpio_get; |
@@ -413,7 +409,7 @@ static int ts5500_dio_probe(struct platform_device *pdev) | |||
413 | break; | 409 | break; |
414 | } | 410 | } |
415 | 411 | ||
416 | ret = gpiochip_add(&priv->gpio_chip); | 412 | ret = gpiochip_add_data(&priv->gpio_chip, priv); |
417 | if (ret) { | 413 | if (ret) { |
418 | dev_err(dev, "failed to register the gpio chip\n"); | 414 | dev_err(dev, "failed to register the gpio chip\n"); |
419 | return ret; | 415 | return ret; |
diff --git a/drivers/gpio/gpio-twl4030.c b/drivers/gpio/gpio-twl4030.c index 9e1dbb9877c1..4b807b0e0c8e 100644 --- a/drivers/gpio/gpio-twl4030.c +++ b/drivers/gpio/gpio-twl4030.c | |||
@@ -76,11 +76,6 @@ struct gpio_twl4030_priv { | |||
76 | 76 | ||
77 | /*----------------------------------------------------------------------*/ | 77 | /*----------------------------------------------------------------------*/ |
78 | 78 | ||
79 | static inline struct gpio_twl4030_priv *to_gpio_twl4030(struct gpio_chip *chip) | ||
80 | { | ||
81 | return container_of(chip, struct gpio_twl4030_priv, gpio_chip); | ||
82 | } | ||
83 | |||
84 | /* | 79 | /* |
85 | * To configure TWL4030 GPIO module registers | 80 | * To configure TWL4030 GPIO module registers |
86 | */ | 81 | */ |
@@ -205,7 +200,7 @@ static int twl4030_get_gpio_datain(int gpio) | |||
205 | 200 | ||
206 | static int twl_request(struct gpio_chip *chip, unsigned offset) | 201 | static int twl_request(struct gpio_chip *chip, unsigned offset) |
207 | { | 202 | { |
208 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); | 203 | struct gpio_twl4030_priv *priv = gpiochip_get_data(chip); |
209 | int status = 0; | 204 | int status = 0; |
210 | 205 | ||
211 | mutex_lock(&priv->mutex); | 206 | mutex_lock(&priv->mutex); |
@@ -256,7 +251,7 @@ static int twl_request(struct gpio_chip *chip, unsigned offset) | |||
256 | /* optionally have the first two GPIOs switch vMMC1 | 251 | /* optionally have the first two GPIOs switch vMMC1 |
257 | * and vMMC2 power supplies based on card presence. | 252 | * and vMMC2 power supplies based on card presence. |
258 | */ | 253 | */ |
259 | pdata = dev_get_platdata(chip->dev); | 254 | pdata = dev_get_platdata(chip->parent); |
260 | if (pdata) | 255 | if (pdata) |
261 | value |= pdata->mmc_cd & 0x03; | 256 | value |= pdata->mmc_cd & 0x03; |
262 | 257 | ||
@@ -273,7 +268,7 @@ done: | |||
273 | 268 | ||
274 | static void twl_free(struct gpio_chip *chip, unsigned offset) | 269 | static void twl_free(struct gpio_chip *chip, unsigned offset) |
275 | { | 270 | { |
276 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); | 271 | struct gpio_twl4030_priv *priv = gpiochip_get_data(chip); |
277 | 272 | ||
278 | mutex_lock(&priv->mutex); | 273 | mutex_lock(&priv->mutex); |
279 | if (offset >= TWL4030_GPIO_MAX) { | 274 | if (offset >= TWL4030_GPIO_MAX) { |
@@ -293,7 +288,7 @@ out: | |||
293 | 288 | ||
294 | static int twl_direction_in(struct gpio_chip *chip, unsigned offset) | 289 | static int twl_direction_in(struct gpio_chip *chip, unsigned offset) |
295 | { | 290 | { |
296 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); | 291 | struct gpio_twl4030_priv *priv = gpiochip_get_data(chip); |
297 | int ret; | 292 | int ret; |
298 | 293 | ||
299 | mutex_lock(&priv->mutex); | 294 | mutex_lock(&priv->mutex); |
@@ -312,7 +307,7 @@ static int twl_direction_in(struct gpio_chip *chip, unsigned offset) | |||
312 | 307 | ||
313 | static int twl_get(struct gpio_chip *chip, unsigned offset) | 308 | static int twl_get(struct gpio_chip *chip, unsigned offset) |
314 | { | 309 | { |
315 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); | 310 | struct gpio_twl4030_priv *priv = gpiochip_get_data(chip); |
316 | int ret; | 311 | int ret; |
317 | int status = 0; | 312 | int status = 0; |
318 | 313 | ||
@@ -327,7 +322,7 @@ static int twl_get(struct gpio_chip *chip, unsigned offset) | |||
327 | else | 322 | else |
328 | status = twl4030_get_gpio_datain(offset); | 323 | status = twl4030_get_gpio_datain(offset); |
329 | 324 | ||
330 | ret = (status <= 0) ? 0 : 1; | 325 | ret = (status < 0) ? status : !!status; |
331 | out: | 326 | out: |
332 | mutex_unlock(&priv->mutex); | 327 | mutex_unlock(&priv->mutex); |
333 | return ret; | 328 | return ret; |
@@ -335,7 +330,7 @@ out: | |||
335 | 330 | ||
336 | static void twl_set(struct gpio_chip *chip, unsigned offset, int value) | 331 | static void twl_set(struct gpio_chip *chip, unsigned offset, int value) |
337 | { | 332 | { |
338 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); | 333 | struct gpio_twl4030_priv *priv = gpiochip_get_data(chip); |
339 | 334 | ||
340 | mutex_lock(&priv->mutex); | 335 | mutex_lock(&priv->mutex); |
341 | if (offset < TWL4030_GPIO_MAX) | 336 | if (offset < TWL4030_GPIO_MAX) |
@@ -353,7 +348,7 @@ static void twl_set(struct gpio_chip *chip, unsigned offset, int value) | |||
353 | 348 | ||
354 | static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value) | 349 | static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value) |
355 | { | 350 | { |
356 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); | 351 | struct gpio_twl4030_priv *priv = gpiochip_get_data(chip); |
357 | int ret = 0; | 352 | int ret = 0; |
358 | 353 | ||
359 | mutex_lock(&priv->mutex); | 354 | mutex_lock(&priv->mutex); |
@@ -379,7 +374,7 @@ static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value) | |||
379 | 374 | ||
380 | static int twl_to_irq(struct gpio_chip *chip, unsigned offset) | 375 | static int twl_to_irq(struct gpio_chip *chip, unsigned offset) |
381 | { | 376 | { |
382 | struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip); | 377 | struct gpio_twl4030_priv *priv = gpiochip_get_data(chip); |
383 | 378 | ||
384 | return (priv->irq_base && (offset < TWL4030_GPIO_MAX)) | 379 | return (priv->irq_base && (offset < TWL4030_GPIO_MAX)) |
385 | ? (priv->irq_base + offset) | 380 | ? (priv->irq_base + offset) |
@@ -509,7 +504,7 @@ no_irqs: | |||
509 | priv->gpio_chip = template_chip; | 504 | priv->gpio_chip = template_chip; |
510 | priv->gpio_chip.base = -1; | 505 | priv->gpio_chip.base = -1; |
511 | priv->gpio_chip.ngpio = TWL4030_GPIO_MAX; | 506 | priv->gpio_chip.ngpio = TWL4030_GPIO_MAX; |
512 | priv->gpio_chip.dev = &pdev->dev; | 507 | priv->gpio_chip.parent = &pdev->dev; |
513 | 508 | ||
514 | mutex_init(&priv->mutex); | 509 | mutex_init(&priv->mutex); |
515 | 510 | ||
@@ -544,7 +539,7 @@ no_irqs: | |||
544 | if (pdata->use_leds) | 539 | if (pdata->use_leds) |
545 | priv->gpio_chip.ngpio += 2; | 540 | priv->gpio_chip.ngpio += 2; |
546 | 541 | ||
547 | ret = gpiochip_add(&priv->gpio_chip); | 542 | ret = gpiochip_add_data(&priv->gpio_chip, priv); |
548 | if (ret < 0) { | 543 | if (ret < 0) { |
549 | dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret); | 544 | dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret); |
550 | priv->gpio_chip.ngpio = 0; | 545 | priv->gpio_chip.ngpio = 0; |
diff --git a/drivers/gpio/gpio-twl6040.c b/drivers/gpio/gpio-twl6040.c index c946e7eef3ee..8e9e9853f3bd 100644 --- a/drivers/gpio/gpio-twl6040.c +++ b/drivers/gpio/gpio-twl6040.c | |||
@@ -36,7 +36,7 @@ static struct gpio_chip twl6040gpo_chip; | |||
36 | 36 | ||
37 | static int twl6040gpo_get(struct gpio_chip *chip, unsigned offset) | 37 | static int twl6040gpo_get(struct gpio_chip *chip, unsigned offset) |
38 | { | 38 | { |
39 | struct twl6040 *twl6040 = dev_get_drvdata(chip->dev->parent); | 39 | struct twl6040 *twl6040 = dev_get_drvdata(chip->parent->parent); |
40 | int ret = 0; | 40 | int ret = 0; |
41 | 41 | ||
42 | ret = twl6040_reg_read(twl6040, TWL6040_REG_GPOCTL); | 42 | ret = twl6040_reg_read(twl6040, TWL6040_REG_GPOCTL); |
@@ -55,7 +55,7 @@ static int twl6040gpo_direction_out(struct gpio_chip *chip, unsigned offset, | |||
55 | 55 | ||
56 | static void twl6040gpo_set(struct gpio_chip *chip, unsigned offset, int value) | 56 | static void twl6040gpo_set(struct gpio_chip *chip, unsigned offset, int value) |
57 | { | 57 | { |
58 | struct twl6040 *twl6040 = dev_get_drvdata(chip->dev->parent); | 58 | struct twl6040 *twl6040 = dev_get_drvdata(chip->parent->parent); |
59 | int ret; | 59 | int ret; |
60 | u8 gpoctl; | 60 | u8 gpoctl; |
61 | 61 | ||
@@ -95,12 +95,12 @@ static int gpo_twl6040_probe(struct platform_device *pdev) | |||
95 | else | 95 | else |
96 | twl6040gpo_chip.ngpio = 1; /* twl6041 have 1 GPO */ | 96 | twl6040gpo_chip.ngpio = 1; /* twl6041 have 1 GPO */ |
97 | 97 | ||
98 | twl6040gpo_chip.dev = &pdev->dev; | 98 | twl6040gpo_chip.parent = &pdev->dev; |
99 | #ifdef CONFIG_OF_GPIO | 99 | #ifdef CONFIG_OF_GPIO |
100 | twl6040gpo_chip.of_node = twl6040_core_dev->of_node; | 100 | twl6040gpo_chip.of_node = twl6040_core_dev->of_node; |
101 | #endif | 101 | #endif |
102 | 102 | ||
103 | ret = gpiochip_add(&twl6040gpo_chip); | 103 | ret = gpiochip_add_data(&twl6040gpo_chip, NULL); |
104 | if (ret < 0) { | 104 | if (ret < 0) { |
105 | dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret); | 105 | dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret); |
106 | twl6040gpo_chip.ngpio = 0; | 106 | twl6040gpo_chip.ngpio = 0; |
diff --git a/drivers/gpio/gpio-tz1090-pdc.c b/drivers/gpio/gpio-tz1090-pdc.c index 3623d009d808..5b7781741ee9 100644 --- a/drivers/gpio/gpio-tz1090-pdc.c +++ b/drivers/gpio/gpio-tz1090-pdc.c | |||
@@ -49,7 +49,6 @@ struct tz1090_pdc_gpio { | |||
49 | void __iomem *reg; | 49 | void __iomem *reg; |
50 | int irq[GPIO_PDC_NIRQ]; | 50 | int irq[GPIO_PDC_NIRQ]; |
51 | }; | 51 | }; |
52 | #define to_pdc(c) container_of(c, struct tz1090_pdc_gpio, chip) | ||
53 | 52 | ||
54 | /* Register accesses into the PDC MMIO area */ | 53 | /* Register accesses into the PDC MMIO area */ |
55 | 54 | ||
@@ -70,7 +69,7 @@ static inline unsigned int pdc_read(struct tz1090_pdc_gpio *priv, | |||
70 | static int tz1090_pdc_gpio_direction_input(struct gpio_chip *chip, | 69 | static int tz1090_pdc_gpio_direction_input(struct gpio_chip *chip, |
71 | unsigned int offset) | 70 | unsigned int offset) |
72 | { | 71 | { |
73 | struct tz1090_pdc_gpio *priv = to_pdc(chip); | 72 | struct tz1090_pdc_gpio *priv = gpiochip_get_data(chip); |
74 | u32 value; | 73 | u32 value; |
75 | int lstat; | 74 | int lstat; |
76 | 75 | ||
@@ -87,7 +86,7 @@ static int tz1090_pdc_gpio_direction_output(struct gpio_chip *chip, | |||
87 | unsigned int offset, | 86 | unsigned int offset, |
88 | int output_value) | 87 | int output_value) |
89 | { | 88 | { |
90 | struct tz1090_pdc_gpio *priv = to_pdc(chip); | 89 | struct tz1090_pdc_gpio *priv = gpiochip_get_data(chip); |
91 | u32 value; | 90 | u32 value; |
92 | int lstat; | 91 | int lstat; |
93 | 92 | ||
@@ -112,14 +111,14 @@ static int tz1090_pdc_gpio_direction_output(struct gpio_chip *chip, | |||
112 | 111 | ||
113 | static int tz1090_pdc_gpio_get(struct gpio_chip *chip, unsigned int offset) | 112 | static int tz1090_pdc_gpio_get(struct gpio_chip *chip, unsigned int offset) |
114 | { | 113 | { |
115 | struct tz1090_pdc_gpio *priv = to_pdc(chip); | 114 | struct tz1090_pdc_gpio *priv = gpiochip_get_data(chip); |
116 | return pdc_read(priv, REG_SOC_GPIO_STATUS) & BIT(offset); | 115 | return !!(pdc_read(priv, REG_SOC_GPIO_STATUS) & BIT(offset)); |
117 | } | 116 | } |
118 | 117 | ||
119 | static void tz1090_pdc_gpio_set(struct gpio_chip *chip, unsigned int offset, | 118 | static void tz1090_pdc_gpio_set(struct gpio_chip *chip, unsigned int offset, |
120 | int output_value) | 119 | int output_value) |
121 | { | 120 | { |
122 | struct tz1090_pdc_gpio *priv = to_pdc(chip); | 121 | struct tz1090_pdc_gpio *priv = gpiochip_get_data(chip); |
123 | u32 value; | 122 | u32 value; |
124 | int lstat; | 123 | int lstat; |
125 | 124 | ||
@@ -139,7 +138,7 @@ static void tz1090_pdc_gpio_set(struct gpio_chip *chip, unsigned int offset, | |||
139 | 138 | ||
140 | static int tz1090_pdc_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) | 139 | static int tz1090_pdc_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) |
141 | { | 140 | { |
142 | struct tz1090_pdc_gpio *priv = to_pdc(chip); | 141 | struct tz1090_pdc_gpio *priv = gpiochip_get_data(chip); |
143 | unsigned int syswake = offset - GPIO_PDC_IRQ_FIRST; | 142 | unsigned int syswake = offset - GPIO_PDC_IRQ_FIRST; |
144 | int irq; | 143 | int irq; |
145 | 144 | ||
@@ -188,7 +187,7 @@ static int tz1090_pdc_gpio_probe(struct platform_device *pdev) | |||
188 | 187 | ||
189 | /* Set up GPIO chip */ | 188 | /* Set up GPIO chip */ |
190 | priv->chip.label = "tz1090-pdc-gpio"; | 189 | priv->chip.label = "tz1090-pdc-gpio"; |
191 | priv->chip.dev = &pdev->dev; | 190 | priv->chip.parent = &pdev->dev; |
192 | priv->chip.direction_input = tz1090_pdc_gpio_direction_input; | 191 | priv->chip.direction_input = tz1090_pdc_gpio_direction_input; |
193 | priv->chip.direction_output = tz1090_pdc_gpio_direction_output; | 192 | priv->chip.direction_output = tz1090_pdc_gpio_direction_output; |
194 | priv->chip.get = tz1090_pdc_gpio_get; | 193 | priv->chip.get = tz1090_pdc_gpio_get; |
@@ -207,7 +206,7 @@ static int tz1090_pdc_gpio_probe(struct platform_device *pdev) | |||
207 | priv->irq[i] = irq_of_parse_and_map(np, i); | 206 | priv->irq[i] = irq_of_parse_and_map(np, i); |
208 | 207 | ||
209 | /* Add the GPIO bank */ | 208 | /* Add the GPIO bank */ |
210 | gpiochip_add(&priv->chip); | 209 | gpiochip_add_data(&priv->chip, priv); |
211 | 210 | ||
212 | return 0; | 211 | return 0; |
213 | } | 212 | } |
diff --git a/drivers/gpio/gpio-tz1090.c b/drivers/gpio/gpio-tz1090.c index 87bb1b1eee8d..ca958e0f6909 100644 --- a/drivers/gpio/gpio-tz1090.c +++ b/drivers/gpio/gpio-tz1090.c | |||
@@ -62,7 +62,6 @@ struct tz1090_gpio_bank { | |||
62 | int irq; | 62 | int irq; |
63 | char label[16]; | 63 | char label[16]; |
64 | }; | 64 | }; |
65 | #define to_bank(c) container_of(c, struct tz1090_gpio_bank, chip) | ||
66 | 65 | ||
67 | /** | 66 | /** |
68 | * struct tz1090_gpio - Overall GPIO device private data | 67 | * struct tz1090_gpio - Overall GPIO device private data |
@@ -187,7 +186,7 @@ static inline int tz1090_gpio_read_bit(struct tz1090_gpio_bank *bank, | |||
187 | static int tz1090_gpio_direction_input(struct gpio_chip *chip, | 186 | static int tz1090_gpio_direction_input(struct gpio_chip *chip, |
188 | unsigned int offset) | 187 | unsigned int offset) |
189 | { | 188 | { |
190 | struct tz1090_gpio_bank *bank = to_bank(chip); | 189 | struct tz1090_gpio_bank *bank = gpiochip_get_data(chip); |
191 | tz1090_gpio_set_bit(bank, REG_GPIO_DIR, offset); | 190 | tz1090_gpio_set_bit(bank, REG_GPIO_DIR, offset); |
192 | 191 | ||
193 | return 0; | 192 | return 0; |
@@ -196,7 +195,7 @@ static int tz1090_gpio_direction_input(struct gpio_chip *chip, | |||
196 | static int tz1090_gpio_direction_output(struct gpio_chip *chip, | 195 | static int tz1090_gpio_direction_output(struct gpio_chip *chip, |
197 | unsigned int offset, int output_value) | 196 | unsigned int offset, int output_value) |
198 | { | 197 | { |
199 | struct tz1090_gpio_bank *bank = to_bank(chip); | 198 | struct tz1090_gpio_bank *bank = gpiochip_get_data(chip); |
200 | int lstat; | 199 | int lstat; |
201 | 200 | ||
202 | __global_lock2(lstat); | 201 | __global_lock2(lstat); |
@@ -212,9 +211,9 @@ static int tz1090_gpio_direction_output(struct gpio_chip *chip, | |||
212 | */ | 211 | */ |
213 | static int tz1090_gpio_get(struct gpio_chip *chip, unsigned int offset) | 212 | static int tz1090_gpio_get(struct gpio_chip *chip, unsigned int offset) |
214 | { | 213 | { |
215 | struct tz1090_gpio_bank *bank = to_bank(chip); | 214 | struct tz1090_gpio_bank *bank = gpiochip_get_data(chip); |
216 | 215 | ||
217 | return tz1090_gpio_read_bit(bank, REG_GPIO_DIN, offset); | 216 | return !!tz1090_gpio_read_bit(bank, REG_GPIO_DIN, offset); |
218 | } | 217 | } |
219 | 218 | ||
220 | /* | 219 | /* |
@@ -223,14 +222,14 @@ static int tz1090_gpio_get(struct gpio_chip *chip, unsigned int offset) | |||
223 | static void tz1090_gpio_set(struct gpio_chip *chip, unsigned int offset, | 222 | static void tz1090_gpio_set(struct gpio_chip *chip, unsigned int offset, |
224 | int output_value) | 223 | int output_value) |
225 | { | 224 | { |
226 | struct tz1090_gpio_bank *bank = to_bank(chip); | 225 | struct tz1090_gpio_bank *bank = gpiochip_get_data(chip); |
227 | 226 | ||
228 | tz1090_gpio_mod_bit(bank, REG_GPIO_DOUT, offset, output_value); | 227 | tz1090_gpio_mod_bit(bank, REG_GPIO_DOUT, offset, output_value); |
229 | } | 228 | } |
230 | 229 | ||
231 | static int tz1090_gpio_request(struct gpio_chip *chip, unsigned int offset) | 230 | static int tz1090_gpio_request(struct gpio_chip *chip, unsigned int offset) |
232 | { | 231 | { |
233 | struct tz1090_gpio_bank *bank = to_bank(chip); | 232 | struct tz1090_gpio_bank *bank = gpiochip_get_data(chip); |
234 | int ret; | 233 | int ret; |
235 | 234 | ||
236 | ret = pinctrl_request_gpio(chip->base + offset); | 235 | ret = pinctrl_request_gpio(chip->base + offset); |
@@ -245,7 +244,7 @@ static int tz1090_gpio_request(struct gpio_chip *chip, unsigned int offset) | |||
245 | 244 | ||
246 | static void tz1090_gpio_free(struct gpio_chip *chip, unsigned int offset) | 245 | static void tz1090_gpio_free(struct gpio_chip *chip, unsigned int offset) |
247 | { | 246 | { |
248 | struct tz1090_gpio_bank *bank = to_bank(chip); | 247 | struct tz1090_gpio_bank *bank = gpiochip_get_data(chip); |
249 | 248 | ||
250 | pinctrl_free_gpio(chip->base + offset); | 249 | pinctrl_free_gpio(chip->base + offset); |
251 | 250 | ||
@@ -254,7 +253,7 @@ static void tz1090_gpio_free(struct gpio_chip *chip, unsigned int offset) | |||
254 | 253 | ||
255 | static int tz1090_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) | 254 | static int tz1090_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) |
256 | { | 255 | { |
257 | struct tz1090_gpio_bank *bank = to_bank(chip); | 256 | struct tz1090_gpio_bank *bank = gpiochip_get_data(chip); |
258 | 257 | ||
259 | if (!bank->domain) | 258 | if (!bank->domain) |
260 | return -EINVAL; | 259 | return -EINVAL; |
@@ -425,7 +424,7 @@ static int tz1090_gpio_bank_probe(struct tz1090_gpio_bank_info *info) | |||
425 | snprintf(bank->label, sizeof(bank->label), "tz1090-gpio-%u", | 424 | snprintf(bank->label, sizeof(bank->label), "tz1090-gpio-%u", |
426 | info->index); | 425 | info->index); |
427 | bank->chip.label = bank->label; | 426 | bank->chip.label = bank->label; |
428 | bank->chip.dev = dev; | 427 | bank->chip.parent = dev; |
429 | bank->chip.direction_input = tz1090_gpio_direction_input; | 428 | bank->chip.direction_input = tz1090_gpio_direction_input; |
430 | bank->chip.direction_output = tz1090_gpio_direction_output; | 429 | bank->chip.direction_output = tz1090_gpio_direction_output; |
431 | bank->chip.get = tz1090_gpio_get; | 430 | bank->chip.get = tz1090_gpio_get; |
@@ -440,7 +439,7 @@ static int tz1090_gpio_bank_probe(struct tz1090_gpio_bank_info *info) | |||
440 | bank->chip.ngpio = 30; | 439 | bank->chip.ngpio = 30; |
441 | 440 | ||
442 | /* Add the GPIO bank */ | 441 | /* Add the GPIO bank */ |
443 | gpiochip_add(&bank->chip); | 442 | gpiochip_add_data(&bank->chip, bank); |
444 | 443 | ||
445 | /* Get the GPIO bank IRQ if provided */ | 444 | /* Get the GPIO bank IRQ if provided */ |
446 | bank->irq = irq_of_parse_and_map(np, 0); | 445 | bank->irq = irq_of_parse_and_map(np, 0); |
diff --git a/drivers/gpio/gpio-ucb1400.c b/drivers/gpio/gpio-ucb1400.c index d502825159b9..2c5cd46bfa6e 100644 --- a/drivers/gpio/gpio-ucb1400.c +++ b/drivers/gpio/gpio-ucb1400.c | |||
@@ -15,7 +15,7 @@ | |||
15 | static int ucb1400_gpio_dir_in(struct gpio_chip *gc, unsigned off) | 15 | static int ucb1400_gpio_dir_in(struct gpio_chip *gc, unsigned off) |
16 | { | 16 | { |
17 | struct ucb1400_gpio *gpio; | 17 | struct ucb1400_gpio *gpio; |
18 | gpio = container_of(gc, struct ucb1400_gpio, gc); | 18 | gpio = gpiochip_get_data(gc); |
19 | ucb1400_gpio_set_direction(gpio->ac97, off, 0); | 19 | ucb1400_gpio_set_direction(gpio->ac97, off, 0); |
20 | return 0; | 20 | return 0; |
21 | } | 21 | } |
@@ -23,7 +23,7 @@ static int ucb1400_gpio_dir_in(struct gpio_chip *gc, unsigned off) | |||
23 | static int ucb1400_gpio_dir_out(struct gpio_chip *gc, unsigned off, int val) | 23 | static int ucb1400_gpio_dir_out(struct gpio_chip *gc, unsigned off, int val) |
24 | { | 24 | { |
25 | struct ucb1400_gpio *gpio; | 25 | struct ucb1400_gpio *gpio; |
26 | gpio = container_of(gc, struct ucb1400_gpio, gc); | 26 | gpio = gpiochip_get_data(gc); |
27 | ucb1400_gpio_set_direction(gpio->ac97, off, 1); | 27 | ucb1400_gpio_set_direction(gpio->ac97, off, 1); |
28 | ucb1400_gpio_set_value(gpio->ac97, off, val); | 28 | ucb1400_gpio_set_value(gpio->ac97, off, val); |
29 | return 0; | 29 | return 0; |
@@ -32,14 +32,15 @@ static int ucb1400_gpio_dir_out(struct gpio_chip *gc, unsigned off, int val) | |||
32 | static int ucb1400_gpio_get(struct gpio_chip *gc, unsigned off) | 32 | static int ucb1400_gpio_get(struct gpio_chip *gc, unsigned off) |
33 | { | 33 | { |
34 | struct ucb1400_gpio *gpio; | 34 | struct ucb1400_gpio *gpio; |
35 | gpio = container_of(gc, struct ucb1400_gpio, gc); | 35 | |
36 | return ucb1400_gpio_get_value(gpio->ac97, off); | 36 | gpio = gpiochip_get_data(gc); |
37 | return !!ucb1400_gpio_get_value(gpio->ac97, off); | ||
37 | } | 38 | } |
38 | 39 | ||
39 | static void ucb1400_gpio_set(struct gpio_chip *gc, unsigned off, int val) | 40 | static void ucb1400_gpio_set(struct gpio_chip *gc, unsigned off, int val) |
40 | { | 41 | { |
41 | struct ucb1400_gpio *gpio; | 42 | struct ucb1400_gpio *gpio; |
42 | gpio = container_of(gc, struct ucb1400_gpio, gc); | 43 | gpio = gpiochip_get_data(gc); |
43 | ucb1400_gpio_set_value(gpio->ac97, off, val); | 44 | ucb1400_gpio_set_value(gpio->ac97, off, val); |
44 | } | 45 | } |
45 | 46 | ||
@@ -66,7 +67,7 @@ static int ucb1400_gpio_probe(struct platform_device *dev) | |||
66 | ucb->gc.set = ucb1400_gpio_set; | 67 | ucb->gc.set = ucb1400_gpio_set; |
67 | ucb->gc.can_sleep = true; | 68 | ucb->gc.can_sleep = true; |
68 | 69 | ||
69 | err = gpiochip_add(&ucb->gc); | 70 | err = gpiochip_add_data(&ucb->gc, ucb); |
70 | if (err) | 71 | if (err) |
71 | goto err; | 72 | goto err; |
72 | 73 | ||
diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c index 87b950cec6ec..6284bdbe1e0c 100644 --- a/drivers/gpio/gpio-vf610.c +++ b/drivers/gpio/gpio-vf610.c | |||
@@ -62,11 +62,6 @@ struct vf610_gpio_port { | |||
62 | 62 | ||
63 | static struct irq_chip vf610_gpio_irq_chip; | 63 | static struct irq_chip vf610_gpio_irq_chip; |
64 | 64 | ||
65 | static struct vf610_gpio_port *to_vf610_gp(struct gpio_chip *gc) | ||
66 | { | ||
67 | return container_of(gc, struct vf610_gpio_port, gc); | ||
68 | } | ||
69 | |||
70 | static const struct of_device_id vf610_gpio_dt_ids[] = { | 65 | static const struct of_device_id vf610_gpio_dt_ids[] = { |
71 | { .compatible = "fsl,vf610-gpio" }, | 66 | { .compatible = "fsl,vf610-gpio" }, |
72 | { /* sentinel */ } | 67 | { /* sentinel */ } |
@@ -84,14 +79,14 @@ static inline u32 vf610_gpio_readl(void __iomem *reg) | |||
84 | 79 | ||
85 | static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio) | 80 | static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio) |
86 | { | 81 | { |
87 | struct vf610_gpio_port *port = to_vf610_gp(gc); | 82 | struct vf610_gpio_port *port = gpiochip_get_data(gc); |
88 | 83 | ||
89 | return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) & BIT(gpio)); | 84 | return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) & BIT(gpio)); |
90 | } | 85 | } |
91 | 86 | ||
92 | static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | 87 | static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) |
93 | { | 88 | { |
94 | struct vf610_gpio_port *port = to_vf610_gp(gc); | 89 | struct vf610_gpio_port *port = gpiochip_get_data(gc); |
95 | unsigned long mask = BIT(gpio); | 90 | unsigned long mask = BIT(gpio); |
96 | 91 | ||
97 | if (val) | 92 | if (val) |
@@ -116,7 +111,7 @@ static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, | |||
116 | static void vf610_gpio_irq_handler(struct irq_desc *desc) | 111 | static void vf610_gpio_irq_handler(struct irq_desc *desc) |
117 | { | 112 | { |
118 | struct vf610_gpio_port *port = | 113 | struct vf610_gpio_port *port = |
119 | to_vf610_gp(irq_desc_get_handler_data(desc)); | 114 | gpiochip_get_data(irq_desc_get_handler_data(desc)); |
120 | struct irq_chip *chip = irq_desc_get_chip(desc); | 115 | struct irq_chip *chip = irq_desc_get_chip(desc); |
121 | int pin; | 116 | int pin; |
122 | unsigned long irq_isfr; | 117 | unsigned long irq_isfr; |
@@ -137,7 +132,7 @@ static void vf610_gpio_irq_handler(struct irq_desc *desc) | |||
137 | static void vf610_gpio_irq_ack(struct irq_data *d) | 132 | static void vf610_gpio_irq_ack(struct irq_data *d) |
138 | { | 133 | { |
139 | struct vf610_gpio_port *port = | 134 | struct vf610_gpio_port *port = |
140 | to_vf610_gp(irq_data_get_irq_chip_data(d)); | 135 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
141 | int gpio = d->hwirq; | 136 | int gpio = d->hwirq; |
142 | 137 | ||
143 | vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR); | 138 | vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR); |
@@ -146,7 +141,7 @@ static void vf610_gpio_irq_ack(struct irq_data *d) | |||
146 | static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type) | 141 | static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type) |
147 | { | 142 | { |
148 | struct vf610_gpio_port *port = | 143 | struct vf610_gpio_port *port = |
149 | to_vf610_gp(irq_data_get_irq_chip_data(d)); | 144 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
150 | u8 irqc; | 145 | u8 irqc; |
151 | 146 | ||
152 | switch (type) { | 147 | switch (type) { |
@@ -182,7 +177,7 @@ static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type) | |||
182 | static void vf610_gpio_irq_mask(struct irq_data *d) | 177 | static void vf610_gpio_irq_mask(struct irq_data *d) |
183 | { | 178 | { |
184 | struct vf610_gpio_port *port = | 179 | struct vf610_gpio_port *port = |
185 | to_vf610_gp(irq_data_get_irq_chip_data(d)); | 180 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
186 | void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); | 181 | void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); |
187 | 182 | ||
188 | vf610_gpio_writel(0, pcr_base); | 183 | vf610_gpio_writel(0, pcr_base); |
@@ -191,7 +186,7 @@ static void vf610_gpio_irq_mask(struct irq_data *d) | |||
191 | static void vf610_gpio_irq_unmask(struct irq_data *d) | 186 | static void vf610_gpio_irq_unmask(struct irq_data *d) |
192 | { | 187 | { |
193 | struct vf610_gpio_port *port = | 188 | struct vf610_gpio_port *port = |
194 | to_vf610_gp(irq_data_get_irq_chip_data(d)); | 189 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
195 | void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); | 190 | void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); |
196 | 191 | ||
197 | vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET, | 192 | vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET, |
@@ -201,7 +196,7 @@ static void vf610_gpio_irq_unmask(struct irq_data *d) | |||
201 | static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable) | 196 | static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable) |
202 | { | 197 | { |
203 | struct vf610_gpio_port *port = | 198 | struct vf610_gpio_port *port = |
204 | to_vf610_gp(irq_data_get_irq_chip_data(d)); | 199 | gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
205 | 200 | ||
206 | if (enable) | 201 | if (enable) |
207 | enable_irq_wake(port->irq); | 202 | enable_irq_wake(port->irq); |
@@ -249,7 +244,7 @@ static int vf610_gpio_probe(struct platform_device *pdev) | |||
249 | 244 | ||
250 | gc = &port->gc; | 245 | gc = &port->gc; |
251 | gc->of_node = np; | 246 | gc->of_node = np; |
252 | gc->dev = dev; | 247 | gc->parent = dev; |
253 | gc->label = "vf610-gpio"; | 248 | gc->label = "vf610-gpio"; |
254 | gc->ngpio = VF610_GPIO_PER_PORT; | 249 | gc->ngpio = VF610_GPIO_PER_PORT; |
255 | gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT; | 250 | gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT; |
@@ -261,7 +256,7 @@ static int vf610_gpio_probe(struct platform_device *pdev) | |||
261 | gc->direction_output = vf610_gpio_direction_output; | 256 | gc->direction_output = vf610_gpio_direction_output; |
262 | gc->set = vf610_gpio_set; | 257 | gc->set = vf610_gpio_set; |
263 | 258 | ||
264 | ret = gpiochip_add(gc); | 259 | ret = gpiochip_add_data(gc, port); |
265 | if (ret < 0) | 260 | if (ret < 0) |
266 | return ret; | 261 | return ret; |
267 | 262 | ||
diff --git a/drivers/gpio/gpio-viperboard.c b/drivers/gpio/gpio-viperboard.c index e2a11f27807f..1170b035cb92 100644 --- a/drivers/gpio/gpio-viperboard.c +++ b/drivers/gpio/gpio-viperboard.c | |||
@@ -88,14 +88,13 @@ static int vprbrd_gpioa_get(struct gpio_chip *chip, | |||
88 | unsigned offset) | 88 | unsigned offset) |
89 | { | 89 | { |
90 | int ret, answer, error = 0; | 90 | int ret, answer, error = 0; |
91 | struct vprbrd_gpio *gpio = | 91 | struct vprbrd_gpio *gpio = gpiochip_get_data(chip); |
92 | container_of(chip, struct vprbrd_gpio, gpioa); | ||
93 | struct vprbrd *vb = gpio->vb; | 92 | struct vprbrd *vb = gpio->vb; |
94 | struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; | 93 | struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; |
95 | 94 | ||
96 | /* if io is set to output, just return the saved value */ | 95 | /* if io is set to output, just return the saved value */ |
97 | if (gpio->gpioa_out & (1 << offset)) | 96 | if (gpio->gpioa_out & (1 << offset)) |
98 | return gpio->gpioa_val & (1 << offset); | 97 | return !!(gpio->gpioa_val & (1 << offset)); |
99 | 98 | ||
100 | mutex_lock(&vb->lock); | 99 | mutex_lock(&vb->lock); |
101 | 100 | ||
@@ -139,8 +138,7 @@ static void vprbrd_gpioa_set(struct gpio_chip *chip, | |||
139 | unsigned offset, int value) | 138 | unsigned offset, int value) |
140 | { | 139 | { |
141 | int ret; | 140 | int ret; |
142 | struct vprbrd_gpio *gpio = | 141 | struct vprbrd_gpio *gpio = gpiochip_get_data(chip); |
143 | container_of(chip, struct vprbrd_gpio, gpioa); | ||
144 | struct vprbrd *vb = gpio->vb; | 142 | struct vprbrd *vb = gpio->vb; |
145 | struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; | 143 | struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; |
146 | 144 | ||
@@ -173,7 +171,7 @@ static void vprbrd_gpioa_set(struct gpio_chip *chip, | |||
173 | mutex_unlock(&vb->lock); | 171 | mutex_unlock(&vb->lock); |
174 | 172 | ||
175 | if (ret != sizeof(struct vprbrd_gpioa_msg)) | 173 | if (ret != sizeof(struct vprbrd_gpioa_msg)) |
176 | dev_err(chip->dev, "usb error setting pin value\n"); | 174 | dev_err(chip->parent, "usb error setting pin value\n"); |
177 | } | 175 | } |
178 | } | 176 | } |
179 | 177 | ||
@@ -181,8 +179,7 @@ static int vprbrd_gpioa_direction_input(struct gpio_chip *chip, | |||
181 | unsigned offset) | 179 | unsigned offset) |
182 | { | 180 | { |
183 | int ret; | 181 | int ret; |
184 | struct vprbrd_gpio *gpio = | 182 | struct vprbrd_gpio *gpio = gpiochip_get_data(chip); |
185 | container_of(chip, struct vprbrd_gpio, gpioa); | ||
186 | struct vprbrd *vb = gpio->vb; | 183 | struct vprbrd *vb = gpio->vb; |
187 | struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; | 184 | struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; |
188 | 185 | ||
@@ -219,8 +216,7 @@ static int vprbrd_gpioa_direction_output(struct gpio_chip *chip, | |||
219 | unsigned offset, int value) | 216 | unsigned offset, int value) |
220 | { | 217 | { |
221 | int ret; | 218 | int ret; |
222 | struct vprbrd_gpio *gpio = | 219 | struct vprbrd_gpio *gpio = gpiochip_get_data(chip); |
223 | container_of(chip, struct vprbrd_gpio, gpioa); | ||
224 | struct vprbrd *vb = gpio->vb; | 220 | struct vprbrd *vb = gpio->vb; |
225 | struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; | 221 | struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; |
226 | 222 | ||
@@ -287,8 +283,7 @@ static int vprbrd_gpiob_get(struct gpio_chip *chip, | |||
287 | { | 283 | { |
288 | int ret; | 284 | int ret; |
289 | u16 val; | 285 | u16 val; |
290 | struct vprbrd_gpio *gpio = | 286 | struct vprbrd_gpio *gpio = gpiochip_get_data(chip); |
291 | container_of(chip, struct vprbrd_gpio, gpiob); | ||
292 | struct vprbrd *vb = gpio->vb; | 287 | struct vprbrd *vb = gpio->vb; |
293 | struct vprbrd_gpiob_msg *gbmsg = (struct vprbrd_gpiob_msg *)vb->buf; | 288 | struct vprbrd_gpiob_msg *gbmsg = (struct vprbrd_gpiob_msg *)vb->buf; |
294 | 289 | ||
@@ -319,8 +314,7 @@ static void vprbrd_gpiob_set(struct gpio_chip *chip, | |||
319 | unsigned offset, int value) | 314 | unsigned offset, int value) |
320 | { | 315 | { |
321 | int ret; | 316 | int ret; |
322 | struct vprbrd_gpio *gpio = | 317 | struct vprbrd_gpio *gpio = gpiochip_get_data(chip); |
323 | container_of(chip, struct vprbrd_gpio, gpiob); | ||
324 | struct vprbrd *vb = gpio->vb; | 318 | struct vprbrd *vb = gpio->vb; |
325 | struct vprbrd_gpiob_msg *gbmsg = (struct vprbrd_gpiob_msg *)vb->buf; | 319 | struct vprbrd_gpiob_msg *gbmsg = (struct vprbrd_gpiob_msg *)vb->buf; |
326 | 320 | ||
@@ -345,7 +339,7 @@ static void vprbrd_gpiob_set(struct gpio_chip *chip, | |||
345 | mutex_unlock(&vb->lock); | 339 | mutex_unlock(&vb->lock); |
346 | 340 | ||
347 | if (ret != sizeof(struct vprbrd_gpiob_msg)) | 341 | if (ret != sizeof(struct vprbrd_gpiob_msg)) |
348 | dev_err(chip->dev, "usb error setting pin value\n"); | 342 | dev_err(chip->parent, "usb error setting pin value\n"); |
349 | } | 343 | } |
350 | } | 344 | } |
351 | 345 | ||
@@ -353,8 +347,7 @@ static int vprbrd_gpiob_direction_input(struct gpio_chip *chip, | |||
353 | unsigned offset) | 347 | unsigned offset) |
354 | { | 348 | { |
355 | int ret; | 349 | int ret; |
356 | struct vprbrd_gpio *gpio = | 350 | struct vprbrd_gpio *gpio = gpiochip_get_data(chip); |
357 | container_of(chip, struct vprbrd_gpio, gpiob); | ||
358 | struct vprbrd *vb = gpio->vb; | 351 | struct vprbrd *vb = gpio->vb; |
359 | 352 | ||
360 | gpio->gpiob_out &= ~(1 << offset); | 353 | gpio->gpiob_out &= ~(1 << offset); |
@@ -366,7 +359,7 @@ static int vprbrd_gpiob_direction_input(struct gpio_chip *chip, | |||
366 | mutex_unlock(&vb->lock); | 359 | mutex_unlock(&vb->lock); |
367 | 360 | ||
368 | if (ret) | 361 | if (ret) |
369 | dev_err(chip->dev, "usb error setting pin to input\n"); | 362 | dev_err(chip->parent, "usb error setting pin to input\n"); |
370 | 363 | ||
371 | return ret; | 364 | return ret; |
372 | } | 365 | } |
@@ -375,8 +368,7 @@ static int vprbrd_gpiob_direction_output(struct gpio_chip *chip, | |||
375 | unsigned offset, int value) | 368 | unsigned offset, int value) |
376 | { | 369 | { |
377 | int ret; | 370 | int ret; |
378 | struct vprbrd_gpio *gpio = | 371 | struct vprbrd_gpio *gpio = gpiochip_get_data(chip); |
379 | container_of(chip, struct vprbrd_gpio, gpiob); | ||
380 | struct vprbrd *vb = gpio->vb; | 372 | struct vprbrd *vb = gpio->vb; |
381 | 373 | ||
382 | gpio->gpiob_out |= (1 << offset); | 374 | gpio->gpiob_out |= (1 << offset); |
@@ -385,7 +377,7 @@ static int vprbrd_gpiob_direction_output(struct gpio_chip *chip, | |||
385 | 377 | ||
386 | ret = vprbrd_gpiob_setdir(vb, offset, 1); | 378 | ret = vprbrd_gpiob_setdir(vb, offset, 1); |
387 | if (ret) | 379 | if (ret) |
388 | dev_err(chip->dev, "usb error setting pin to output\n"); | 380 | dev_err(chip->parent, "usb error setting pin to output\n"); |
389 | 381 | ||
390 | mutex_unlock(&vb->lock); | 382 | mutex_unlock(&vb->lock); |
391 | 383 | ||
@@ -409,7 +401,7 @@ static int vprbrd_gpio_probe(struct platform_device *pdev) | |||
409 | vb_gpio->vb = vb; | 401 | vb_gpio->vb = vb; |
410 | /* registering gpio a */ | 402 | /* registering gpio a */ |
411 | vb_gpio->gpioa.label = "viperboard gpio a"; | 403 | vb_gpio->gpioa.label = "viperboard gpio a"; |
412 | vb_gpio->gpioa.dev = &pdev->dev; | 404 | vb_gpio->gpioa.parent = &pdev->dev; |
413 | vb_gpio->gpioa.owner = THIS_MODULE; | 405 | vb_gpio->gpioa.owner = THIS_MODULE; |
414 | vb_gpio->gpioa.base = -1; | 406 | vb_gpio->gpioa.base = -1; |
415 | vb_gpio->gpioa.ngpio = 16; | 407 | vb_gpio->gpioa.ngpio = 16; |
@@ -418,15 +410,15 @@ static int vprbrd_gpio_probe(struct platform_device *pdev) | |||
418 | vb_gpio->gpioa.get = vprbrd_gpioa_get; | 410 | vb_gpio->gpioa.get = vprbrd_gpioa_get; |
419 | vb_gpio->gpioa.direction_input = vprbrd_gpioa_direction_input; | 411 | vb_gpio->gpioa.direction_input = vprbrd_gpioa_direction_input; |
420 | vb_gpio->gpioa.direction_output = vprbrd_gpioa_direction_output; | 412 | vb_gpio->gpioa.direction_output = vprbrd_gpioa_direction_output; |
421 | ret = gpiochip_add(&vb_gpio->gpioa); | 413 | ret = gpiochip_add_data(&vb_gpio->gpioa, vb_gpio); |
422 | if (ret < 0) { | 414 | if (ret < 0) { |
423 | dev_err(vb_gpio->gpioa.dev, "could not add gpio a"); | 415 | dev_err(vb_gpio->gpioa.parent, "could not add gpio a"); |
424 | goto err_gpioa; | 416 | goto err_gpioa; |
425 | } | 417 | } |
426 | 418 | ||
427 | /* registering gpio b */ | 419 | /* registering gpio b */ |
428 | vb_gpio->gpiob.label = "viperboard gpio b"; | 420 | vb_gpio->gpiob.label = "viperboard gpio b"; |
429 | vb_gpio->gpiob.dev = &pdev->dev; | 421 | vb_gpio->gpiob.parent = &pdev->dev; |
430 | vb_gpio->gpiob.owner = THIS_MODULE; | 422 | vb_gpio->gpiob.owner = THIS_MODULE; |
431 | vb_gpio->gpiob.base = -1; | 423 | vb_gpio->gpiob.base = -1; |
432 | vb_gpio->gpiob.ngpio = 16; | 424 | vb_gpio->gpiob.ngpio = 16; |
@@ -435,9 +427,9 @@ static int vprbrd_gpio_probe(struct platform_device *pdev) | |||
435 | vb_gpio->gpiob.get = vprbrd_gpiob_get; | 427 | vb_gpio->gpiob.get = vprbrd_gpiob_get; |
436 | vb_gpio->gpiob.direction_input = vprbrd_gpiob_direction_input; | 428 | vb_gpio->gpiob.direction_input = vprbrd_gpiob_direction_input; |
437 | vb_gpio->gpiob.direction_output = vprbrd_gpiob_direction_output; | 429 | vb_gpio->gpiob.direction_output = vprbrd_gpiob_direction_output; |
438 | ret = gpiochip_add(&vb_gpio->gpiob); | 430 | ret = gpiochip_add_data(&vb_gpio->gpiob, vb_gpio); |
439 | if (ret < 0) { | 431 | if (ret < 0) { |
440 | dev_err(vb_gpio->gpiob.dev, "could not add gpio b"); | 432 | dev_err(vb_gpio->gpiob.parent, "could not add gpio b"); |
441 | goto err_gpiob; | 433 | goto err_gpiob; |
442 | } | 434 | } |
443 | 435 | ||
diff --git a/drivers/gpio/gpio-vr41xx.c b/drivers/gpio/gpio-vr41xx.c index c1caa459c02d..ac8deb01f6f6 100644 --- a/drivers/gpio/gpio-vr41xx.c +++ b/drivers/gpio/gpio-vr41xx.c | |||
@@ -139,7 +139,7 @@ static void unmask_giuint_low(struct irq_data *d) | |||
139 | static unsigned int startup_giuint(struct irq_data *data) | 139 | static unsigned int startup_giuint(struct irq_data *data) |
140 | { | 140 | { |
141 | if (gpiochip_lock_as_irq(&vr41xx_gpio_chip, data->hwirq)) | 141 | if (gpiochip_lock_as_irq(&vr41xx_gpio_chip, data->hwirq)) |
142 | dev_err(vr41xx_gpio_chip.dev, | 142 | dev_err(vr41xx_gpio_chip.parent, |
143 | "unable to lock HW IRQ %lu for IRQ\n", | 143 | "unable to lock HW IRQ %lu for IRQ\n", |
144 | data->hwirq); | 144 | data->hwirq); |
145 | /* Satisfy the .enable semantics by unmasking the line */ | 145 | /* Satisfy the .enable semantics by unmasking the line */ |
@@ -542,9 +542,9 @@ static int giu_probe(struct platform_device *pdev) | |||
542 | if (!giu_base) | 542 | if (!giu_base) |
543 | return -ENOMEM; | 543 | return -ENOMEM; |
544 | 544 | ||
545 | vr41xx_gpio_chip.dev = &pdev->dev; | 545 | vr41xx_gpio_chip.parent = &pdev->dev; |
546 | 546 | ||
547 | ret = gpiochip_add(&vr41xx_gpio_chip); | 547 | ret = gpiochip_add_data(&vr41xx_gpio_chip, NULL); |
548 | if (!ret) { | 548 | if (!ret) { |
549 | iounmap(giu_base); | 549 | iounmap(giu_base); |
550 | return -ENODEV; | 550 | return -ENODEV; |
diff --git a/drivers/gpio/gpio-vx855.c b/drivers/gpio/gpio-vx855.c index 57b470d5b39e..764999cc0794 100644 --- a/drivers/gpio/gpio-vx855.c +++ b/drivers/gpio/gpio-vx855.c | |||
@@ -96,7 +96,7 @@ static inline u_int32_t gpio_o_bit(int i) | |||
96 | static int vx855gpio_direction_input(struct gpio_chip *gpio, | 96 | static int vx855gpio_direction_input(struct gpio_chip *gpio, |
97 | unsigned int nr) | 97 | unsigned int nr) |
98 | { | 98 | { |
99 | struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio); | 99 | struct vx855_gpio *vg = gpiochip_get_data(gpio); |
100 | unsigned long flags; | 100 | unsigned long flags; |
101 | u_int32_t reg_out; | 101 | u_int32_t reg_out; |
102 | 102 | ||
@@ -120,7 +120,7 @@ static int vx855gpio_direction_input(struct gpio_chip *gpio, | |||
120 | 120 | ||
121 | static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr) | 121 | static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr) |
122 | { | 122 | { |
123 | struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio); | 123 | struct vx855_gpio *vg = gpiochip_get_data(gpio); |
124 | u_int32_t reg_in; | 124 | u_int32_t reg_in; |
125 | int ret = 0; | 125 | int ret = 0; |
126 | 126 | ||
@@ -146,7 +146,7 @@ static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr) | |||
146 | static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr, | 146 | static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr, |
147 | int val) | 147 | int val) |
148 | { | 148 | { |
149 | struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio); | 149 | struct vx855_gpio *vg = gpiochip_get_data(gpio); |
150 | unsigned long flags; | 150 | unsigned long flags; |
151 | u_int32_t reg_out; | 151 | u_int32_t reg_out; |
152 | 152 | ||
@@ -259,7 +259,7 @@ static int vx855gpio_probe(struct platform_device *pdev) | |||
259 | 259 | ||
260 | vx855gpio_gpio_setup(vg); | 260 | vx855gpio_gpio_setup(vg); |
261 | 261 | ||
262 | return gpiochip_add(&vg->gpio); | 262 | return gpiochip_add_data(&vg->gpio, vg); |
263 | } | 263 | } |
264 | 264 | ||
265 | static int vx855gpio_remove(struct platform_device *pdev) | 265 | static int vx855gpio_remove(struct platform_device *pdev) |
diff --git a/drivers/gpio/gpio-wm831x.c b/drivers/gpio/gpio-wm831x.c index 58ce75c188b7..98390070fb64 100644 --- a/drivers/gpio/gpio-wm831x.c +++ b/drivers/gpio/gpio-wm831x.c | |||
@@ -30,14 +30,9 @@ struct wm831x_gpio { | |||
30 | struct gpio_chip gpio_chip; | 30 | struct gpio_chip gpio_chip; |
31 | }; | 31 | }; |
32 | 32 | ||
33 | static inline struct wm831x_gpio *to_wm831x_gpio(struct gpio_chip *chip) | ||
34 | { | ||
35 | return container_of(chip, struct wm831x_gpio, gpio_chip); | ||
36 | } | ||
37 | |||
38 | static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | 33 | static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) |
39 | { | 34 | { |
40 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | 35 | struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); |
41 | struct wm831x *wm831x = wm831x_gpio->wm831x; | 36 | struct wm831x *wm831x = wm831x_gpio->wm831x; |
42 | int val = WM831X_GPN_DIR; | 37 | int val = WM831X_GPN_DIR; |
43 | 38 | ||
@@ -51,7 +46,7 @@ static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | |||
51 | 46 | ||
52 | static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset) | 47 | static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset) |
53 | { | 48 | { |
54 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | 49 | struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); |
55 | struct wm831x *wm831x = wm831x_gpio->wm831x; | 50 | struct wm831x *wm831x = wm831x_gpio->wm831x; |
56 | int ret; | 51 | int ret; |
57 | 52 | ||
@@ -67,7 +62,7 @@ static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
67 | 62 | ||
68 | static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 63 | static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
69 | { | 64 | { |
70 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | 65 | struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); |
71 | struct wm831x *wm831x = wm831x_gpio->wm831x; | 66 | struct wm831x *wm831x = wm831x_gpio->wm831x; |
72 | 67 | ||
73 | wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset, | 68 | wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset, |
@@ -77,7 +72,7 @@ static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
77 | static int wm831x_gpio_direction_out(struct gpio_chip *chip, | 72 | static int wm831x_gpio_direction_out(struct gpio_chip *chip, |
78 | unsigned offset, int value) | 73 | unsigned offset, int value) |
79 | { | 74 | { |
80 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | 75 | struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); |
81 | struct wm831x *wm831x = wm831x_gpio->wm831x; | 76 | struct wm831x *wm831x = wm831x_gpio->wm831x; |
82 | int val = 0; | 77 | int val = 0; |
83 | int ret; | 78 | int ret; |
@@ -99,7 +94,7 @@ static int wm831x_gpio_direction_out(struct gpio_chip *chip, | |||
99 | 94 | ||
100 | static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 95 | static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
101 | { | 96 | { |
102 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | 97 | struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); |
103 | struct wm831x *wm831x = wm831x_gpio->wm831x; | 98 | struct wm831x *wm831x = wm831x_gpio->wm831x; |
104 | 99 | ||
105 | return irq_create_mapping(wm831x->irq_domain, | 100 | return irq_create_mapping(wm831x->irq_domain, |
@@ -109,7 +104,7 @@ static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | |||
109 | static int wm831x_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, | 104 | static int wm831x_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, |
110 | unsigned debounce) | 105 | unsigned debounce) |
111 | { | 106 | { |
112 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | 107 | struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); |
113 | struct wm831x *wm831x = wm831x_gpio->wm831x; | 108 | struct wm831x *wm831x = wm831x_gpio->wm831x; |
114 | int reg = WM831X_GPIO1_CONTROL + offset; | 109 | int reg = WM831X_GPIO1_CONTROL + offset; |
115 | int ret, fn; | 110 | int ret, fn; |
@@ -140,7 +135,7 @@ static int wm831x_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, | |||
140 | #ifdef CONFIG_DEBUG_FS | 135 | #ifdef CONFIG_DEBUG_FS |
141 | static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | 136 | static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
142 | { | 137 | { |
143 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | 138 | struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); |
144 | struct wm831x *wm831x = wm831x_gpio->wm831x; | 139 | struct wm831x *wm831x = wm831x_gpio->wm831x; |
145 | int i, tristated; | 140 | int i, tristated; |
146 | 141 | ||
@@ -258,13 +253,13 @@ static int wm831x_gpio_probe(struct platform_device *pdev) | |||
258 | wm831x_gpio->wm831x = wm831x; | 253 | wm831x_gpio->wm831x = wm831x; |
259 | wm831x_gpio->gpio_chip = template_chip; | 254 | wm831x_gpio->gpio_chip = template_chip; |
260 | wm831x_gpio->gpio_chip.ngpio = wm831x->num_gpio; | 255 | wm831x_gpio->gpio_chip.ngpio = wm831x->num_gpio; |
261 | wm831x_gpio->gpio_chip.dev = &pdev->dev; | 256 | wm831x_gpio->gpio_chip.parent = &pdev->dev; |
262 | if (pdata && pdata->gpio_base) | 257 | if (pdata && pdata->gpio_base) |
263 | wm831x_gpio->gpio_chip.base = pdata->gpio_base; | 258 | wm831x_gpio->gpio_chip.base = pdata->gpio_base; |
264 | else | 259 | else |
265 | wm831x_gpio->gpio_chip.base = -1; | 260 | wm831x_gpio->gpio_chip.base = -1; |
266 | 261 | ||
267 | ret = gpiochip_add(&wm831x_gpio->gpio_chip); | 262 | ret = gpiochip_add_data(&wm831x_gpio->gpio_chip, wm831x_gpio); |
268 | if (ret < 0) { | 263 | if (ret < 0) { |
269 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); | 264 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); |
270 | return ret; | 265 | return ret; |
diff --git a/drivers/gpio/gpio-wm8350.c b/drivers/gpio/gpio-wm8350.c index 060b89303bb6..0a306b4baa73 100644 --- a/drivers/gpio/gpio-wm8350.c +++ b/drivers/gpio/gpio-wm8350.c | |||
@@ -28,14 +28,9 @@ struct wm8350_gpio_data { | |||
28 | struct gpio_chip gpio_chip; | 28 | struct gpio_chip gpio_chip; |
29 | }; | 29 | }; |
30 | 30 | ||
31 | static inline struct wm8350_gpio_data *to_wm8350_gpio(struct gpio_chip *chip) | ||
32 | { | ||
33 | return container_of(chip, struct wm8350_gpio_data, gpio_chip); | ||
34 | } | ||
35 | |||
36 | static int wm8350_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | 31 | static int wm8350_gpio_direction_in(struct gpio_chip *chip, unsigned offset) |
37 | { | 32 | { |
38 | struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip); | 33 | struct wm8350_gpio_data *wm8350_gpio = gpiochip_get_data(chip); |
39 | struct wm8350 *wm8350 = wm8350_gpio->wm8350; | 34 | struct wm8350 *wm8350 = wm8350_gpio->wm8350; |
40 | 35 | ||
41 | return wm8350_set_bits(wm8350, WM8350_GPIO_CONFIGURATION_I_O, | 36 | return wm8350_set_bits(wm8350, WM8350_GPIO_CONFIGURATION_I_O, |
@@ -44,7 +39,7 @@ static int wm8350_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | |||
44 | 39 | ||
45 | static int wm8350_gpio_get(struct gpio_chip *chip, unsigned offset) | 40 | static int wm8350_gpio_get(struct gpio_chip *chip, unsigned offset) |
46 | { | 41 | { |
47 | struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip); | 42 | struct wm8350_gpio_data *wm8350_gpio = gpiochip_get_data(chip); |
48 | struct wm8350 *wm8350 = wm8350_gpio->wm8350; | 43 | struct wm8350 *wm8350 = wm8350_gpio->wm8350; |
49 | int ret; | 44 | int ret; |
50 | 45 | ||
@@ -60,7 +55,7 @@ static int wm8350_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
60 | 55 | ||
61 | static void wm8350_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 56 | static void wm8350_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
62 | { | 57 | { |
63 | struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip); | 58 | struct wm8350_gpio_data *wm8350_gpio = gpiochip_get_data(chip); |
64 | struct wm8350 *wm8350 = wm8350_gpio->wm8350; | 59 | struct wm8350 *wm8350 = wm8350_gpio->wm8350; |
65 | 60 | ||
66 | if (value) | 61 | if (value) |
@@ -72,7 +67,7 @@ static void wm8350_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
72 | static int wm8350_gpio_direction_out(struct gpio_chip *chip, | 67 | static int wm8350_gpio_direction_out(struct gpio_chip *chip, |
73 | unsigned offset, int value) | 68 | unsigned offset, int value) |
74 | { | 69 | { |
75 | struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip); | 70 | struct wm8350_gpio_data *wm8350_gpio = gpiochip_get_data(chip); |
76 | struct wm8350 *wm8350 = wm8350_gpio->wm8350; | 71 | struct wm8350 *wm8350 = wm8350_gpio->wm8350; |
77 | int ret; | 72 | int ret; |
78 | 73 | ||
@@ -89,7 +84,7 @@ static int wm8350_gpio_direction_out(struct gpio_chip *chip, | |||
89 | 84 | ||
90 | static int wm8350_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 85 | static int wm8350_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
91 | { | 86 | { |
92 | struct wm8350_gpio_data *wm8350_gpio = to_wm8350_gpio(chip); | 87 | struct wm8350_gpio_data *wm8350_gpio = gpiochip_get_data(chip); |
93 | struct wm8350 *wm8350 = wm8350_gpio->wm8350; | 88 | struct wm8350 *wm8350 = wm8350_gpio->wm8350; |
94 | 89 | ||
95 | if (!wm8350->irq_base) | 90 | if (!wm8350->irq_base) |
@@ -124,13 +119,13 @@ static int wm8350_gpio_probe(struct platform_device *pdev) | |||
124 | wm8350_gpio->wm8350 = wm8350; | 119 | wm8350_gpio->wm8350 = wm8350; |
125 | wm8350_gpio->gpio_chip = template_chip; | 120 | wm8350_gpio->gpio_chip = template_chip; |
126 | wm8350_gpio->gpio_chip.ngpio = 13; | 121 | wm8350_gpio->gpio_chip.ngpio = 13; |
127 | wm8350_gpio->gpio_chip.dev = &pdev->dev; | 122 | wm8350_gpio->gpio_chip.parent = &pdev->dev; |
128 | if (pdata && pdata->gpio_base) | 123 | if (pdata && pdata->gpio_base) |
129 | wm8350_gpio->gpio_chip.base = pdata->gpio_base; | 124 | wm8350_gpio->gpio_chip.base = pdata->gpio_base; |
130 | else | 125 | else |
131 | wm8350_gpio->gpio_chip.base = -1; | 126 | wm8350_gpio->gpio_chip.base = -1; |
132 | 127 | ||
133 | ret = gpiochip_add(&wm8350_gpio->gpio_chip); | 128 | ret = gpiochip_add_data(&wm8350_gpio->gpio_chip, wm8350_gpio); |
134 | if (ret < 0) { | 129 | if (ret < 0) { |
135 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); | 130 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); |
136 | return ret; | 131 | return ret; |
diff --git a/drivers/gpio/gpio-wm8994.c b/drivers/gpio/gpio-wm8994.c index 6f5e42db4b9e..3ae4c1597494 100644 --- a/drivers/gpio/gpio-wm8994.c +++ b/drivers/gpio/gpio-wm8994.c | |||
@@ -31,14 +31,9 @@ struct wm8994_gpio { | |||
31 | struct gpio_chip gpio_chip; | 31 | struct gpio_chip gpio_chip; |
32 | }; | 32 | }; |
33 | 33 | ||
34 | static inline struct wm8994_gpio *to_wm8994_gpio(struct gpio_chip *chip) | ||
35 | { | ||
36 | return container_of(chip, struct wm8994_gpio, gpio_chip); | ||
37 | } | ||
38 | |||
39 | static int wm8994_gpio_request(struct gpio_chip *chip, unsigned offset) | 34 | static int wm8994_gpio_request(struct gpio_chip *chip, unsigned offset) |
40 | { | 35 | { |
41 | struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip); | 36 | struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); |
42 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; | 37 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; |
43 | 38 | ||
44 | switch (wm8994->type) { | 39 | switch (wm8994->type) { |
@@ -61,7 +56,7 @@ static int wm8994_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
61 | 56 | ||
62 | static int wm8994_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | 57 | static int wm8994_gpio_direction_in(struct gpio_chip *chip, unsigned offset) |
63 | { | 58 | { |
64 | struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip); | 59 | struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); |
65 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; | 60 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; |
66 | 61 | ||
67 | return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, | 62 | return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, |
@@ -70,7 +65,7 @@ static int wm8994_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | |||
70 | 65 | ||
71 | static int wm8994_gpio_get(struct gpio_chip *chip, unsigned offset) | 66 | static int wm8994_gpio_get(struct gpio_chip *chip, unsigned offset) |
72 | { | 67 | { |
73 | struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip); | 68 | struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); |
74 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; | 69 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; |
75 | int ret; | 70 | int ret; |
76 | 71 | ||
@@ -87,7 +82,7 @@ static int wm8994_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
87 | static int wm8994_gpio_direction_out(struct gpio_chip *chip, | 82 | static int wm8994_gpio_direction_out(struct gpio_chip *chip, |
88 | unsigned offset, int value) | 83 | unsigned offset, int value) |
89 | { | 84 | { |
90 | struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip); | 85 | struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); |
91 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; | 86 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; |
92 | 87 | ||
93 | if (value) | 88 | if (value) |
@@ -99,7 +94,7 @@ static int wm8994_gpio_direction_out(struct gpio_chip *chip, | |||
99 | 94 | ||
100 | static void wm8994_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 95 | static void wm8994_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
101 | { | 96 | { |
102 | struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip); | 97 | struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); |
103 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; | 98 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; |
104 | 99 | ||
105 | if (value) | 100 | if (value) |
@@ -110,7 +105,7 @@ static void wm8994_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
110 | 105 | ||
111 | static int wm8994_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 106 | static int wm8994_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
112 | { | 107 | { |
113 | struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip); | 108 | struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); |
114 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; | 109 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; |
115 | 110 | ||
116 | return regmap_irq_get_virq(wm8994->irq_data, offset); | 111 | return regmap_irq_get_virq(wm8994->irq_data, offset); |
@@ -174,7 +169,7 @@ static const char *wm8994_gpio_fn(u16 fn) | |||
174 | 169 | ||
175 | static void wm8994_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | 170 | static void wm8994_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
176 | { | 171 | { |
177 | struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip); | 172 | struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); |
178 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; | 173 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; |
179 | int i; | 174 | int i; |
180 | 175 | ||
@@ -260,13 +255,13 @@ static int wm8994_gpio_probe(struct platform_device *pdev) | |||
260 | wm8994_gpio->wm8994 = wm8994; | 255 | wm8994_gpio->wm8994 = wm8994; |
261 | wm8994_gpio->gpio_chip = template_chip; | 256 | wm8994_gpio->gpio_chip = template_chip; |
262 | wm8994_gpio->gpio_chip.ngpio = WM8994_GPIO_MAX; | 257 | wm8994_gpio->gpio_chip.ngpio = WM8994_GPIO_MAX; |
263 | wm8994_gpio->gpio_chip.dev = &pdev->dev; | 258 | wm8994_gpio->gpio_chip.parent = &pdev->dev; |
264 | if (pdata && pdata->gpio_base) | 259 | if (pdata && pdata->gpio_base) |
265 | wm8994_gpio->gpio_chip.base = pdata->gpio_base; | 260 | wm8994_gpio->gpio_chip.base = pdata->gpio_base; |
266 | else | 261 | else |
267 | wm8994_gpio->gpio_chip.base = -1; | 262 | wm8994_gpio->gpio_chip.base = -1; |
268 | 263 | ||
269 | ret = gpiochip_add(&wm8994_gpio->gpio_chip); | 264 | ret = gpiochip_add_data(&wm8994_gpio->gpio_chip, wm8994_gpio); |
270 | if (ret < 0) { | 265 | if (ret < 0) { |
271 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", | 266 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", |
272 | ret); | 267 | ret); |
diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c index d57068b9083e..282004deb5d4 100644 --- a/drivers/gpio/gpio-xgene-sb.c +++ b/drivers/gpio/gpio-xgene-sb.c | |||
@@ -23,10 +23,8 @@ | |||
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
25 | #include <linux/of_gpio.h> | 25 | #include <linux/of_gpio.h> |
26 | #include <linux/gpio.h> | ||
27 | #include <linux/gpio/driver.h> | 26 | #include <linux/gpio/driver.h> |
28 | #include <linux/acpi.h> | 27 | #include <linux/acpi.h> |
29 | #include <linux/basic_mmio_gpio.h> | ||
30 | 28 | ||
31 | #include "gpiolib.h" | 29 | #include "gpiolib.h" |
32 | 30 | ||
@@ -43,38 +41,31 @@ | |||
43 | 41 | ||
44 | /** | 42 | /** |
45 | * struct xgene_gpio_sb - GPIO-Standby private data structure. | 43 | * struct xgene_gpio_sb - GPIO-Standby private data structure. |
46 | * @bgc: memory-mapped GPIO controllers. | 44 | * @gc: memory-mapped GPIO controllers. |
47 | * @irq: Mapping GPIO pins and interrupt number | 45 | * @irq: Mapping GPIO pins and interrupt number |
48 | * nirq: Number of GPIO pins that supports interrupt | 46 | * nirq: Number of GPIO pins that supports interrupt |
49 | */ | 47 | */ |
50 | struct xgene_gpio_sb { | 48 | struct xgene_gpio_sb { |
51 | struct bgpio_chip bgc; | 49 | struct gpio_chip gc; |
52 | u32 *irq; | 50 | u32 *irq; |
53 | u32 nirq; | 51 | u32 nirq; |
54 | }; | 52 | }; |
55 | 53 | ||
56 | static inline struct xgene_gpio_sb *to_xgene_gpio_sb(struct gpio_chip *gc) | 54 | static void xgene_gpio_set_bit(struct gpio_chip *gc, void __iomem *reg, u32 gpio, int val) |
57 | { | ||
58 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
59 | |||
60 | return container_of(bgc, struct xgene_gpio_sb, bgc); | ||
61 | } | ||
62 | |||
63 | static void xgene_gpio_set_bit(struct bgpio_chip *bgc, void __iomem *reg, u32 gpio, int val) | ||
64 | { | 55 | { |
65 | u32 data; | 56 | u32 data; |
66 | 57 | ||
67 | data = bgc->read_reg(reg); | 58 | data = gc->read_reg(reg); |
68 | if (val) | 59 | if (val) |
69 | data |= GPIO_MASK(gpio); | 60 | data |= GPIO_MASK(gpio); |
70 | else | 61 | else |
71 | data &= ~GPIO_MASK(gpio); | 62 | data &= ~GPIO_MASK(gpio); |
72 | bgc->write_reg(reg, data); | 63 | gc->write_reg(reg, data); |
73 | } | 64 | } |
74 | 65 | ||
75 | static int apm_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio) | 66 | static int apm_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio) |
76 | { | 67 | { |
77 | struct xgene_gpio_sb *priv = to_xgene_gpio_sb(gc); | 68 | struct xgene_gpio_sb *priv = gpiochip_get_data(gc); |
78 | 69 | ||
79 | if (priv->irq[gpio]) | 70 | if (priv->irq[gpio]) |
80 | return priv->irq[gpio]; | 71 | return priv->irq[gpio]; |
@@ -99,15 +90,15 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev) | |||
99 | if (IS_ERR(regs)) | 90 | if (IS_ERR(regs)) |
100 | return PTR_ERR(regs); | 91 | return PTR_ERR(regs); |
101 | 92 | ||
102 | ret = bgpio_init(&priv->bgc, &pdev->dev, 4, | 93 | ret = bgpio_init(&priv->gc, &pdev->dev, 4, |
103 | regs + MPA_GPIO_IN_ADDR, | 94 | regs + MPA_GPIO_IN_ADDR, |
104 | regs + MPA_GPIO_OUT_ADDR, NULL, | 95 | regs + MPA_GPIO_OUT_ADDR, NULL, |
105 | regs + MPA_GPIO_OE_ADDR, NULL, 0); | 96 | regs + MPA_GPIO_OE_ADDR, NULL, 0); |
106 | if (ret) | 97 | if (ret) |
107 | return ret; | 98 | return ret; |
108 | 99 | ||
109 | priv->bgc.gc.to_irq = apm_gpio_sb_to_irq; | 100 | priv->gc.to_irq = apm_gpio_sb_to_irq; |
110 | priv->bgc.gc.ngpio = XGENE_MAX_GPIO_DS; | 101 | priv->gc.ngpio = XGENE_MAX_GPIO_DS; |
111 | 102 | ||
112 | priv->nirq = XGENE_MAX_GPIO_DS_IRQ; | 103 | priv->nirq = XGENE_MAX_GPIO_DS_IRQ; |
113 | 104 | ||
@@ -118,14 +109,14 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev) | |||
118 | 109 | ||
119 | for (i = 0; i < priv->nirq; i++) { | 110 | for (i = 0; i < priv->nirq; i++) { |
120 | priv->irq[default_lines[i]] = platform_get_irq(pdev, i); | 111 | priv->irq[default_lines[i]] = platform_get_irq(pdev, i); |
121 | xgene_gpio_set_bit(&priv->bgc, regs + MPA_GPIO_SEL_LO, | 112 | xgene_gpio_set_bit(&priv->gc, regs + MPA_GPIO_SEL_LO, |
122 | default_lines[i] * 2, 1); | 113 | default_lines[i] * 2, 1); |
123 | xgene_gpio_set_bit(&priv->bgc, regs + MPA_GPIO_INT_LVL, i, 1); | 114 | xgene_gpio_set_bit(&priv->gc, regs + MPA_GPIO_INT_LVL, i, 1); |
124 | } | 115 | } |
125 | 116 | ||
126 | platform_set_drvdata(pdev, priv); | 117 | platform_set_drvdata(pdev, priv); |
127 | 118 | ||
128 | ret = gpiochip_add(&priv->bgc.gc); | 119 | ret = gpiochip_add_data(&priv->gc, priv); |
129 | if (ret) | 120 | if (ret) |
130 | dev_err(&pdev->dev, "failed to register X-Gene GPIO Standby driver\n"); | 121 | dev_err(&pdev->dev, "failed to register X-Gene GPIO Standby driver\n"); |
131 | else | 122 | else |
@@ -133,7 +124,7 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev) | |||
133 | 124 | ||
134 | if (priv->nirq > 0) { | 125 | if (priv->nirq > 0) { |
135 | /* Register interrupt handlers for gpio signaled acpi events */ | 126 | /* Register interrupt handlers for gpio signaled acpi events */ |
136 | acpi_gpiochip_request_interrupts(&priv->bgc.gc); | 127 | acpi_gpiochip_request_interrupts(&priv->gc); |
137 | } | 128 | } |
138 | 129 | ||
139 | return ret; | 130 | return ret; |
@@ -144,10 +135,11 @@ static int xgene_gpio_sb_remove(struct platform_device *pdev) | |||
144 | struct xgene_gpio_sb *priv = platform_get_drvdata(pdev); | 135 | struct xgene_gpio_sb *priv = platform_get_drvdata(pdev); |
145 | 136 | ||
146 | if (priv->nirq > 0) { | 137 | if (priv->nirq > 0) { |
147 | acpi_gpiochip_free_interrupts(&priv->bgc.gc); | 138 | acpi_gpiochip_free_interrupts(&priv->gc); |
148 | } | 139 | } |
149 | 140 | ||
150 | return bgpio_remove(&priv->bgc); | 141 | gpiochip_remove(&priv->gc); |
142 | return 0; | ||
151 | } | 143 | } |
152 | 144 | ||
153 | static const struct of_device_id xgene_gpio_sb_of_match[] = { | 145 | static const struct of_device_id xgene_gpio_sb_of_match[] = { |
diff --git a/drivers/gpio/gpio-xgene.c b/drivers/gpio/gpio-xgene.c index 18a8182d4fec..592e9cdf9c53 100644 --- a/drivers/gpio/gpio-xgene.c +++ b/drivers/gpio/gpio-xgene.c | |||
@@ -47,14 +47,9 @@ struct xgene_gpio { | |||
47 | #endif | 47 | #endif |
48 | }; | 48 | }; |
49 | 49 | ||
50 | static inline struct xgene_gpio *to_xgene_gpio(struct gpio_chip *chip) | ||
51 | { | ||
52 | return container_of(chip, struct xgene_gpio, chip); | ||
53 | } | ||
54 | |||
55 | static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset) | 50 | static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset) |
56 | { | 51 | { |
57 | struct xgene_gpio *chip = to_xgene_gpio(gc); | 52 | struct xgene_gpio *chip = gpiochip_get_data(gc); |
58 | unsigned long bank_offset; | 53 | unsigned long bank_offset; |
59 | u32 bit_offset; | 54 | u32 bit_offset; |
60 | 55 | ||
@@ -65,7 +60,7 @@ static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset) | |||
65 | 60 | ||
66 | static void __xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) | 61 | static void __xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) |
67 | { | 62 | { |
68 | struct xgene_gpio *chip = to_xgene_gpio(gc); | 63 | struct xgene_gpio *chip = gpiochip_get_data(gc); |
69 | unsigned long bank_offset; | 64 | unsigned long bank_offset; |
70 | u32 setval, bit_offset; | 65 | u32 setval, bit_offset; |
71 | 66 | ||
@@ -82,7 +77,7 @@ static void __xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) | |||
82 | 77 | ||
83 | static void xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) | 78 | static void xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) |
84 | { | 79 | { |
85 | struct xgene_gpio *chip = to_xgene_gpio(gc); | 80 | struct xgene_gpio *chip = gpiochip_get_data(gc); |
86 | unsigned long flags; | 81 | unsigned long flags; |
87 | 82 | ||
88 | spin_lock_irqsave(&chip->lock, flags); | 83 | spin_lock_irqsave(&chip->lock, flags); |
@@ -92,7 +87,7 @@ static void xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) | |||
92 | 87 | ||
93 | static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset) | 88 | static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset) |
94 | { | 89 | { |
95 | struct xgene_gpio *chip = to_xgene_gpio(gc); | 90 | struct xgene_gpio *chip = gpiochip_get_data(gc); |
96 | unsigned long flags, bank_offset; | 91 | unsigned long flags, bank_offset; |
97 | u32 dirval, bit_offset; | 92 | u32 dirval, bit_offset; |
98 | 93 | ||
@@ -113,7 +108,7 @@ static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset) | |||
113 | static int xgene_gpio_dir_out(struct gpio_chip *gc, | 108 | static int xgene_gpio_dir_out(struct gpio_chip *gc, |
114 | unsigned int offset, int val) | 109 | unsigned int offset, int val) |
115 | { | 110 | { |
116 | struct xgene_gpio *chip = to_xgene_gpio(gc); | 111 | struct xgene_gpio *chip = gpiochip_get_data(gc); |
117 | unsigned long flags, bank_offset; | 112 | unsigned long flags, bank_offset; |
118 | u32 dirval, bit_offset; | 113 | u32 dirval, bit_offset; |
119 | 114 | ||
@@ -188,7 +183,7 @@ static int xgene_gpio_probe(struct platform_device *pdev) | |||
188 | gpio->chip.ngpio = XGENE_MAX_GPIOS; | 183 | gpio->chip.ngpio = XGENE_MAX_GPIOS; |
189 | 184 | ||
190 | spin_lock_init(&gpio->lock); | 185 | spin_lock_init(&gpio->lock); |
191 | gpio->chip.dev = &pdev->dev; | 186 | gpio->chip.parent = &pdev->dev; |
192 | gpio->chip.direction_input = xgene_gpio_dir_in; | 187 | gpio->chip.direction_input = xgene_gpio_dir_in; |
193 | gpio->chip.direction_output = xgene_gpio_dir_out; | 188 | gpio->chip.direction_output = xgene_gpio_dir_out; |
194 | gpio->chip.get = xgene_gpio_get; | 189 | gpio->chip.get = xgene_gpio_get; |
@@ -198,7 +193,7 @@ static int xgene_gpio_probe(struct platform_device *pdev) | |||
198 | 193 | ||
199 | platform_set_drvdata(pdev, gpio); | 194 | platform_set_drvdata(pdev, gpio); |
200 | 195 | ||
201 | err = gpiochip_add(&gpio->chip); | 196 | err = gpiochip_add_data(&gpio->chip, gpio); |
202 | if (err) { | 197 | if (err) { |
203 | dev_err(&pdev->dev, | 198 | dev_err(&pdev->dev, |
204 | "failed to register gpiochip.\n"); | 199 | "failed to register gpiochip.\n"); |
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index d5284dfe01fe..d0fbb7f99523 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c | |||
@@ -92,8 +92,7 @@ static inline int xgpio_offset(struct xgpio_instance *chip, int gpio) | |||
92 | static int xgpio_get(struct gpio_chip *gc, unsigned int gpio) | 92 | static int xgpio_get(struct gpio_chip *gc, unsigned int gpio) |
93 | { | 93 | { |
94 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 94 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
95 | struct xgpio_instance *chip = | 95 | struct xgpio_instance *chip = gpiochip_get_data(gc); |
96 | container_of(mm_gc, struct xgpio_instance, mmchip); | ||
97 | u32 val; | 96 | u32 val; |
98 | 97 | ||
99 | val = xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET + | 98 | val = xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET + |
@@ -115,8 +114,7 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |||
115 | { | 114 | { |
116 | unsigned long flags; | 115 | unsigned long flags; |
117 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 116 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
118 | struct xgpio_instance *chip = | 117 | struct xgpio_instance *chip = gpiochip_get_data(gc); |
119 | container_of(mm_gc, struct xgpio_instance, mmchip); | ||
120 | int index = xgpio_index(chip, gpio); | 118 | int index = xgpio_index(chip, gpio); |
121 | int offset = xgpio_offset(chip, gpio); | 119 | int offset = xgpio_offset(chip, gpio); |
122 | 120 | ||
@@ -147,8 +145,7 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | |||
147 | { | 145 | { |
148 | unsigned long flags; | 146 | unsigned long flags; |
149 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 147 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
150 | struct xgpio_instance *chip = | 148 | struct xgpio_instance *chip = gpiochip_get_data(gc); |
151 | container_of(mm_gc, struct xgpio_instance, mmchip); | ||
152 | int index = xgpio_index(chip, gpio); | 149 | int index = xgpio_index(chip, gpio); |
153 | int offset = xgpio_offset(chip, gpio); | 150 | int offset = xgpio_offset(chip, gpio); |
154 | 151 | ||
@@ -180,8 +177,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | |||
180 | { | 177 | { |
181 | unsigned long flags; | 178 | unsigned long flags; |
182 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 179 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
183 | struct xgpio_instance *chip = | 180 | struct xgpio_instance *chip = gpiochip_get_data(gc); |
184 | container_of(mm_gc, struct xgpio_instance, mmchip); | ||
185 | int index = xgpio_index(chip, gpio); | 181 | int index = xgpio_index(chip, gpio); |
186 | int offset = xgpio_offset(chip, gpio); | 182 | int offset = xgpio_offset(chip, gpio); |
187 | 183 | ||
@@ -212,7 +208,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | |||
212 | static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc) | 208 | static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc) |
213 | { | 209 | { |
214 | struct xgpio_instance *chip = | 210 | struct xgpio_instance *chip = |
215 | container_of(mm_gc, struct xgpio_instance, mmchip); | 211 | container_of(mm_gc, struct xgpio_instance, mmchip); |
216 | 212 | ||
217 | xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state[0]); | 213 | xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state[0]); |
218 | xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]); | 214 | xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]); |
@@ -305,7 +301,7 @@ static int xgpio_probe(struct platform_device *pdev) | |||
305 | } | 301 | } |
306 | 302 | ||
307 | chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1]; | 303 | chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1]; |
308 | chip->mmchip.gc.dev = &pdev->dev; | 304 | chip->mmchip.gc.parent = &pdev->dev; |
309 | chip->mmchip.gc.direction_input = xgpio_dir_in; | 305 | chip->mmchip.gc.direction_input = xgpio_dir_in; |
310 | chip->mmchip.gc.direction_output = xgpio_dir_out; | 306 | chip->mmchip.gc.direction_output = xgpio_dir_out; |
311 | chip->mmchip.gc.get = xgpio_get; | 307 | chip->mmchip.gc.get = xgpio_get; |
@@ -314,7 +310,7 @@ static int xgpio_probe(struct platform_device *pdev) | |||
314 | chip->mmchip.save_regs = xgpio_save_regs; | 310 | chip->mmchip.save_regs = xgpio_save_regs; |
315 | 311 | ||
316 | /* Call the OF gpio helper to setup and register the GPIO device */ | 312 | /* Call the OF gpio helper to setup and register the GPIO device */ |
317 | status = of_mm_gpiochip_add(np, &chip->mmchip); | 313 | status = of_mm_gpiochip_add_data(np, &chip->mmchip, chip); |
318 | if (status) { | 314 | if (status) { |
319 | pr_err("%s: error in probe function with status %d\n", | 315 | pr_err("%s: error in probe function with status %d\n", |
320 | np->full_name, status); | 316 | np->full_name, status); |
diff --git a/drivers/gpio/gpio-xlp.c b/drivers/gpio/gpio-xlp.c index bc06a2cd2c1d..aa5813d2deb1 100644 --- a/drivers/gpio/gpio-xlp.c +++ b/drivers/gpio/gpio-xlp.c | |||
@@ -100,11 +100,6 @@ struct xlp_gpio_priv { | |||
100 | spinlock_t lock; | 100 | spinlock_t lock; |
101 | }; | 101 | }; |
102 | 102 | ||
103 | static struct xlp_gpio_priv *gpio_chip_to_xlp_priv(struct gpio_chip *gc) | ||
104 | { | ||
105 | return container_of(gc, struct xlp_gpio_priv, chip); | ||
106 | } | ||
107 | |||
108 | static int xlp_gpio_get_reg(void __iomem *addr, unsigned gpio) | 103 | static int xlp_gpio_get_reg(void __iomem *addr, unsigned gpio) |
109 | { | 104 | { |
110 | u32 pos, regset; | 105 | u32 pos, regset; |
@@ -133,7 +128,7 @@ static void xlp_gpio_set_reg(void __iomem *addr, unsigned gpio, int state) | |||
133 | static void xlp_gpio_irq_disable(struct irq_data *d) | 128 | static void xlp_gpio_irq_disable(struct irq_data *d) |
134 | { | 129 | { |
135 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 130 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
136 | struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc); | 131 | struct xlp_gpio_priv *priv = gpiochip_get_data(gc); |
137 | unsigned long flags; | 132 | unsigned long flags; |
138 | 133 | ||
139 | spin_lock_irqsave(&priv->lock, flags); | 134 | spin_lock_irqsave(&priv->lock, flags); |
@@ -145,7 +140,7 @@ static void xlp_gpio_irq_disable(struct irq_data *d) | |||
145 | static void xlp_gpio_irq_mask_ack(struct irq_data *d) | 140 | static void xlp_gpio_irq_mask_ack(struct irq_data *d) |
146 | { | 141 | { |
147 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 142 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
148 | struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc); | 143 | struct xlp_gpio_priv *priv = gpiochip_get_data(gc); |
149 | unsigned long flags; | 144 | unsigned long flags; |
150 | 145 | ||
151 | spin_lock_irqsave(&priv->lock, flags); | 146 | spin_lock_irqsave(&priv->lock, flags); |
@@ -158,7 +153,7 @@ static void xlp_gpio_irq_mask_ack(struct irq_data *d) | |||
158 | static void xlp_gpio_irq_unmask(struct irq_data *d) | 153 | static void xlp_gpio_irq_unmask(struct irq_data *d) |
159 | { | 154 | { |
160 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 155 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
161 | struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc); | 156 | struct xlp_gpio_priv *priv = gpiochip_get_data(gc); |
162 | unsigned long flags; | 157 | unsigned long flags; |
163 | 158 | ||
164 | spin_lock_irqsave(&priv->lock, flags); | 159 | spin_lock_irqsave(&priv->lock, flags); |
@@ -170,7 +165,7 @@ static void xlp_gpio_irq_unmask(struct irq_data *d) | |||
170 | static int xlp_gpio_set_irq_type(struct irq_data *d, unsigned int type) | 165 | static int xlp_gpio_set_irq_type(struct irq_data *d, unsigned int type) |
171 | { | 166 | { |
172 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 167 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
173 | struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc); | 168 | struct xlp_gpio_priv *priv = gpiochip_get_data(gc); |
174 | int pol, irq_type; | 169 | int pol, irq_type; |
175 | 170 | ||
176 | switch (type) { | 171 | switch (type) { |
@@ -235,7 +230,7 @@ static void xlp_gpio_generic_handler(struct irq_desc *desc) | |||
235 | 230 | ||
236 | static int xlp_gpio_dir_output(struct gpio_chip *gc, unsigned gpio, int state) | 231 | static int xlp_gpio_dir_output(struct gpio_chip *gc, unsigned gpio, int state) |
237 | { | 232 | { |
238 | struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc); | 233 | struct xlp_gpio_priv *priv = gpiochip_get_data(gc); |
239 | 234 | ||
240 | BUG_ON(gpio >= gc->ngpio); | 235 | BUG_ON(gpio >= gc->ngpio); |
241 | xlp_gpio_set_reg(priv->gpio_out_en, gpio, 0x1); | 236 | xlp_gpio_set_reg(priv->gpio_out_en, gpio, 0x1); |
@@ -245,7 +240,7 @@ static int xlp_gpio_dir_output(struct gpio_chip *gc, unsigned gpio, int state) | |||
245 | 240 | ||
246 | static int xlp_gpio_dir_input(struct gpio_chip *gc, unsigned gpio) | 241 | static int xlp_gpio_dir_input(struct gpio_chip *gc, unsigned gpio) |
247 | { | 242 | { |
248 | struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc); | 243 | struct xlp_gpio_priv *priv = gpiochip_get_data(gc); |
249 | 244 | ||
250 | BUG_ON(gpio >= gc->ngpio); | 245 | BUG_ON(gpio >= gc->ngpio); |
251 | xlp_gpio_set_reg(priv->gpio_out_en, gpio, 0x0); | 246 | xlp_gpio_set_reg(priv->gpio_out_en, gpio, 0x0); |
@@ -255,7 +250,7 @@ static int xlp_gpio_dir_input(struct gpio_chip *gc, unsigned gpio) | |||
255 | 250 | ||
256 | static int xlp_gpio_get(struct gpio_chip *gc, unsigned gpio) | 251 | static int xlp_gpio_get(struct gpio_chip *gc, unsigned gpio) |
257 | { | 252 | { |
258 | struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc); | 253 | struct xlp_gpio_priv *priv = gpiochip_get_data(gc); |
259 | 254 | ||
260 | BUG_ON(gpio >= gc->ngpio); | 255 | BUG_ON(gpio >= gc->ngpio); |
261 | return xlp_gpio_get_reg(priv->gpio_paddrv, gpio); | 256 | return xlp_gpio_get_reg(priv->gpio_paddrv, gpio); |
@@ -263,7 +258,7 @@ static int xlp_gpio_get(struct gpio_chip *gc, unsigned gpio) | |||
263 | 258 | ||
264 | static void xlp_gpio_set(struct gpio_chip *gc, unsigned gpio, int state) | 259 | static void xlp_gpio_set(struct gpio_chip *gc, unsigned gpio, int state) |
265 | { | 260 | { |
266 | struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc); | 261 | struct xlp_gpio_priv *priv = gpiochip_get_data(gc); |
267 | 262 | ||
268 | BUG_ON(gpio >= gc->ngpio); | 263 | BUG_ON(gpio >= gc->ngpio); |
269 | xlp_gpio_set_reg(priv->gpio_paddrv, gpio, state); | 264 | xlp_gpio_set_reg(priv->gpio_paddrv, gpio, state); |
@@ -373,7 +368,7 @@ static int xlp_gpio_probe(struct platform_device *pdev) | |||
373 | gc->owner = THIS_MODULE; | 368 | gc->owner = THIS_MODULE; |
374 | gc->label = dev_name(&pdev->dev); | 369 | gc->label = dev_name(&pdev->dev); |
375 | gc->base = 0; | 370 | gc->base = 0; |
376 | gc->dev = &pdev->dev; | 371 | gc->parent = &pdev->dev; |
377 | gc->ngpio = ngpio; | 372 | gc->ngpio = ngpio; |
378 | gc->of_node = pdev->dev.of_node; | 373 | gc->of_node = pdev->dev.of_node; |
379 | gc->direction_output = xlp_gpio_dir_output; | 374 | gc->direction_output = xlp_gpio_dir_output; |
@@ -388,7 +383,7 @@ static int xlp_gpio_probe(struct platform_device *pdev) | |||
388 | return -ENODEV; | 383 | return -ENODEV; |
389 | } | 384 | } |
390 | 385 | ||
391 | err = gpiochip_add(gc); | 386 | err = gpiochip_add_data(gc, priv); |
392 | if (err < 0) | 387 | if (err < 0) |
393 | goto out_free_desc; | 388 | goto out_free_desc; |
394 | 389 | ||
diff --git a/drivers/gpio/gpio-xtensa.c b/drivers/gpio/gpio-xtensa.c index 93ec95df67a3..f16c0427952e 100644 --- a/drivers/gpio/gpio-xtensa.c +++ b/drivers/gpio/gpio-xtensa.c | |||
@@ -148,10 +148,10 @@ static int xtensa_gpio_probe(struct platform_device *pdev) | |||
148 | { | 148 | { |
149 | int ret; | 149 | int ret; |
150 | 150 | ||
151 | ret = gpiochip_add(&impwire_chip); | 151 | ret = gpiochip_add_data(&impwire_chip, NULL); |
152 | if (ret) | 152 | if (ret) |
153 | return ret; | 153 | return ret; |
154 | return gpiochip_add(&expstate_chip); | 154 | return gpiochip_add_data(&expstate_chip, NULL); |
155 | } | 155 | } |
156 | 156 | ||
157 | static struct platform_driver xtensa_gpio_driver = { | 157 | static struct platform_driver xtensa_gpio_driver = { |
diff --git a/drivers/gpio/gpio-zevio.c b/drivers/gpio/gpio-zevio.c index 6f02d7c4cc57..cda6d922be98 100644 --- a/drivers/gpio/gpio-zevio.c +++ b/drivers/gpio/gpio-zevio.c | |||
@@ -52,9 +52,6 @@ | |||
52 | #define ZEVIO_GPIO_INPUT 0x18 | 52 | #define ZEVIO_GPIO_INPUT 0x18 |
53 | #define ZEVIO_GPIO_INT_STICKY 0x20 | 53 | #define ZEVIO_GPIO_INT_STICKY 0x20 |
54 | 54 | ||
55 | #define to_zevio_gpio(chip) container_of(to_of_mm_gpio_chip(chip), \ | ||
56 | struct zevio_gpio, chip) | ||
57 | |||
58 | /* Bit number of GPIO in its section */ | 55 | /* Bit number of GPIO in its section */ |
59 | #define ZEVIO_GPIO_BIT(gpio) (gpio&7) | 56 | #define ZEVIO_GPIO_BIT(gpio) (gpio&7) |
60 | 57 | ||
@@ -80,7 +77,7 @@ static inline void zevio_gpio_port_set(struct zevio_gpio *c, unsigned pin, | |||
80 | /* Functions for struct gpio_chip */ | 77 | /* Functions for struct gpio_chip */ |
81 | static int zevio_gpio_get(struct gpio_chip *chip, unsigned pin) | 78 | static int zevio_gpio_get(struct gpio_chip *chip, unsigned pin) |
82 | { | 79 | { |
83 | struct zevio_gpio *controller = to_zevio_gpio(chip); | 80 | struct zevio_gpio *controller = gpiochip_get_data(chip); |
84 | u32 val, dir; | 81 | u32 val, dir; |
85 | 82 | ||
86 | spin_lock(&controller->lock); | 83 | spin_lock(&controller->lock); |
@@ -96,7 +93,7 @@ static int zevio_gpio_get(struct gpio_chip *chip, unsigned pin) | |||
96 | 93 | ||
97 | static void zevio_gpio_set(struct gpio_chip *chip, unsigned pin, int value) | 94 | static void zevio_gpio_set(struct gpio_chip *chip, unsigned pin, int value) |
98 | { | 95 | { |
99 | struct zevio_gpio *controller = to_zevio_gpio(chip); | 96 | struct zevio_gpio *controller = gpiochip_get_data(chip); |
100 | u32 val; | 97 | u32 val; |
101 | 98 | ||
102 | spin_lock(&controller->lock); | 99 | spin_lock(&controller->lock); |
@@ -112,7 +109,7 @@ static void zevio_gpio_set(struct gpio_chip *chip, unsigned pin, int value) | |||
112 | 109 | ||
113 | static int zevio_gpio_direction_input(struct gpio_chip *chip, unsigned pin) | 110 | static int zevio_gpio_direction_input(struct gpio_chip *chip, unsigned pin) |
114 | { | 111 | { |
115 | struct zevio_gpio *controller = to_zevio_gpio(chip); | 112 | struct zevio_gpio *controller = gpiochip_get_data(chip); |
116 | u32 val; | 113 | u32 val; |
117 | 114 | ||
118 | spin_lock(&controller->lock); | 115 | spin_lock(&controller->lock); |
@@ -129,7 +126,7 @@ static int zevio_gpio_direction_input(struct gpio_chip *chip, unsigned pin) | |||
129 | static int zevio_gpio_direction_output(struct gpio_chip *chip, | 126 | static int zevio_gpio_direction_output(struct gpio_chip *chip, |
130 | unsigned pin, int value) | 127 | unsigned pin, int value) |
131 | { | 128 | { |
132 | struct zevio_gpio *controller = to_zevio_gpio(chip); | 129 | struct zevio_gpio *controller = gpiochip_get_data(chip); |
133 | u32 val; | 130 | u32 val; |
134 | 131 | ||
135 | spin_lock(&controller->lock); | 132 | spin_lock(&controller->lock); |
@@ -185,9 +182,11 @@ static int zevio_gpio_probe(struct platform_device *pdev) | |||
185 | 182 | ||
186 | /* Copy our reference */ | 183 | /* Copy our reference */ |
187 | controller->chip.gc = zevio_gpio_chip; | 184 | controller->chip.gc = zevio_gpio_chip; |
188 | controller->chip.gc.dev = &pdev->dev; | 185 | controller->chip.gc.parent = &pdev->dev; |
189 | 186 | ||
190 | status = of_mm_gpiochip_add(pdev->dev.of_node, &(controller->chip)); | 187 | status = of_mm_gpiochip_add_data(pdev->dev.of_node, |
188 | &(controller->chip), | ||
189 | controller); | ||
191 | if (status) { | 190 | if (status) { |
192 | dev_err(&pdev->dev, "failed to add gpiochip: %d\n", status); | 191 | dev_err(&pdev->dev, "failed to add gpiochip: %d\n", status); |
193 | return status; | 192 | return status; |
@@ -199,7 +198,7 @@ static int zevio_gpio_probe(struct platform_device *pdev) | |||
199 | for (i = 0; i < controller->chip.gc.ngpio; i += 8) | 198 | for (i = 0; i < controller->chip.gc.ngpio; i += 8) |
200 | zevio_gpio_port_set(controller, i, ZEVIO_GPIO_INT_MASK, 0xFF); | 199 | zevio_gpio_port_set(controller, i, ZEVIO_GPIO_INT_MASK, 0xFF); |
201 | 200 | ||
202 | dev_dbg(controller->chip.gc.dev, "ZEVIO GPIO controller set up!\n"); | 201 | dev_dbg(controller->chip.gc.parent, "ZEVIO GPIO controller set up!\n"); |
203 | 202 | ||
204 | return 0; | 203 | return 0; |
205 | } | 204 | } |
diff --git a/drivers/gpio/gpio-zx.c b/drivers/gpio/gpio-zx.c index 1dcf7a66dd36..47c79fa65670 100644 --- a/drivers/gpio/gpio-zx.c +++ b/drivers/gpio/gpio-zx.c | |||
@@ -43,14 +43,9 @@ struct zx_gpio { | |||
43 | struct gpio_chip gc; | 43 | struct gpio_chip gc; |
44 | }; | 44 | }; |
45 | 45 | ||
46 | static inline struct zx_gpio *to_zx(struct gpio_chip *gc) | ||
47 | { | ||
48 | return container_of(gc, struct zx_gpio, gc); | ||
49 | } | ||
50 | |||
51 | static int zx_direction_input(struct gpio_chip *gc, unsigned offset) | 46 | static int zx_direction_input(struct gpio_chip *gc, unsigned offset) |
52 | { | 47 | { |
53 | struct zx_gpio *chip = to_zx(gc); | 48 | struct zx_gpio *chip = gpiochip_get_data(gc); |
54 | unsigned long flags; | 49 | unsigned long flags; |
55 | u16 gpiodir; | 50 | u16 gpiodir; |
56 | 51 | ||
@@ -69,7 +64,7 @@ static int zx_direction_input(struct gpio_chip *gc, unsigned offset) | |||
69 | static int zx_direction_output(struct gpio_chip *gc, unsigned offset, | 64 | static int zx_direction_output(struct gpio_chip *gc, unsigned offset, |
70 | int value) | 65 | int value) |
71 | { | 66 | { |
72 | struct zx_gpio *chip = to_zx(gc); | 67 | struct zx_gpio *chip = gpiochip_get_data(gc); |
73 | unsigned long flags; | 68 | unsigned long flags; |
74 | u16 gpiodir; | 69 | u16 gpiodir; |
75 | 70 | ||
@@ -92,14 +87,14 @@ static int zx_direction_output(struct gpio_chip *gc, unsigned offset, | |||
92 | 87 | ||
93 | static int zx_get_value(struct gpio_chip *gc, unsigned offset) | 88 | static int zx_get_value(struct gpio_chip *gc, unsigned offset) |
94 | { | 89 | { |
95 | struct zx_gpio *chip = to_zx(gc); | 90 | struct zx_gpio *chip = gpiochip_get_data(gc); |
96 | 91 | ||
97 | return !!(readw_relaxed(chip->base + ZX_GPIO_DI) & BIT(offset)); | 92 | return !!(readw_relaxed(chip->base + ZX_GPIO_DI) & BIT(offset)); |
98 | } | 93 | } |
99 | 94 | ||
100 | static void zx_set_value(struct gpio_chip *gc, unsigned offset, int value) | 95 | static void zx_set_value(struct gpio_chip *gc, unsigned offset, int value) |
101 | { | 96 | { |
102 | struct zx_gpio *chip = to_zx(gc); | 97 | struct zx_gpio *chip = gpiochip_get_data(gc); |
103 | 98 | ||
104 | if (value) | 99 | if (value) |
105 | writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1); | 100 | writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1); |
@@ -110,7 +105,7 @@ static void zx_set_value(struct gpio_chip *gc, unsigned offset, int value) | |||
110 | static int zx_irq_type(struct irq_data *d, unsigned trigger) | 105 | static int zx_irq_type(struct irq_data *d, unsigned trigger) |
111 | { | 106 | { |
112 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 107 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
113 | struct zx_gpio *chip = to_zx(gc); | 108 | struct zx_gpio *chip = gpiochip_get_data(gc); |
114 | int offset = irqd_to_hwirq(d); | 109 | int offset = irqd_to_hwirq(d); |
115 | unsigned long flags; | 110 | unsigned long flags; |
116 | u16 gpiois, gpioi_epos, gpioi_eneg, gpioiev; | 111 | u16 gpiois, gpioi_epos, gpioi_eneg, gpioiev; |
@@ -162,7 +157,7 @@ static void zx_irq_handler(struct irq_desc *desc) | |||
162 | unsigned long pending; | 157 | unsigned long pending; |
163 | int offset; | 158 | int offset; |
164 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 159 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
165 | struct zx_gpio *chip = to_zx(gc); | 160 | struct zx_gpio *chip = gpiochip_get_data(gc); |
166 | struct irq_chip *irqchip = irq_desc_get_chip(desc); | 161 | struct irq_chip *irqchip = irq_desc_get_chip(desc); |
167 | 162 | ||
168 | chained_irq_enter(irqchip, desc); | 163 | chained_irq_enter(irqchip, desc); |
@@ -181,7 +176,7 @@ static void zx_irq_handler(struct irq_desc *desc) | |||
181 | static void zx_irq_mask(struct irq_data *d) | 176 | static void zx_irq_mask(struct irq_data *d) |
182 | { | 177 | { |
183 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 178 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
184 | struct zx_gpio *chip = to_zx(gc); | 179 | struct zx_gpio *chip = gpiochip_get_data(gc); |
185 | u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR); | 180 | u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR); |
186 | u16 gpioie; | 181 | u16 gpioie; |
187 | 182 | ||
@@ -196,7 +191,7 @@ static void zx_irq_mask(struct irq_data *d) | |||
196 | static void zx_irq_unmask(struct irq_data *d) | 191 | static void zx_irq_unmask(struct irq_data *d) |
197 | { | 192 | { |
198 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 193 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
199 | struct zx_gpio *chip = to_zx(gc); | 194 | struct zx_gpio *chip = gpiochip_get_data(gc); |
200 | u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR); | 195 | u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR); |
201 | u16 gpioie; | 196 | u16 gpioie; |
202 | 197 | ||
@@ -245,10 +240,10 @@ static int zx_gpio_probe(struct platform_device *pdev) | |||
245 | chip->gc.base = ZX_GPIO_NR * id; | 240 | chip->gc.base = ZX_GPIO_NR * id; |
246 | chip->gc.ngpio = ZX_GPIO_NR; | 241 | chip->gc.ngpio = ZX_GPIO_NR; |
247 | chip->gc.label = dev_name(dev); | 242 | chip->gc.label = dev_name(dev); |
248 | chip->gc.dev = dev; | 243 | chip->gc.parent = dev; |
249 | chip->gc.owner = THIS_MODULE; | 244 | chip->gc.owner = THIS_MODULE; |
250 | 245 | ||
251 | ret = gpiochip_add(&chip->gc); | 246 | ret = gpiochip_add_data(&chip->gc, chip); |
252 | if (ret) | 247 | if (ret) |
253 | return ret; | 248 | return ret; |
254 | 249 | ||
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c index 8abeacac5885..66d3d247d76d 100644 --- a/drivers/gpio/gpio-zynq.c +++ b/drivers/gpio/gpio-zynq.c | |||
@@ -131,11 +131,6 @@ struct zynq_platform_data { | |||
131 | static struct irq_chip zynq_gpio_level_irqchip; | 131 | static struct irq_chip zynq_gpio_level_irqchip; |
132 | static struct irq_chip zynq_gpio_edge_irqchip; | 132 | static struct irq_chip zynq_gpio_edge_irqchip; |
133 | 133 | ||
134 | static struct zynq_gpio *to_zynq_gpio(struct gpio_chip *gc) | ||
135 | { | ||
136 | return container_of(gc, struct zynq_gpio, chip); | ||
137 | } | ||
138 | |||
139 | /** | 134 | /** |
140 | * zynq_gpio_get_bank_pin - Get the bank number and pin number within that bank | 135 | * zynq_gpio_get_bank_pin - Get the bank number and pin number within that bank |
141 | * for a given pin in the GPIO device | 136 | * for a given pin in the GPIO device |
@@ -183,7 +178,7 @@ static int zynq_gpio_get_value(struct gpio_chip *chip, unsigned int pin) | |||
183 | { | 178 | { |
184 | u32 data; | 179 | u32 data; |
185 | unsigned int bank_num, bank_pin_num; | 180 | unsigned int bank_num, bank_pin_num; |
186 | struct zynq_gpio *gpio = to_zynq_gpio(chip); | 181 | struct zynq_gpio *gpio = gpiochip_get_data(chip); |
187 | 182 | ||
188 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); | 183 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); |
189 | 184 | ||
@@ -207,7 +202,7 @@ static void zynq_gpio_set_value(struct gpio_chip *chip, unsigned int pin, | |||
207 | int state) | 202 | int state) |
208 | { | 203 | { |
209 | unsigned int reg_offset, bank_num, bank_pin_num; | 204 | unsigned int reg_offset, bank_num, bank_pin_num; |
210 | struct zynq_gpio *gpio = to_zynq_gpio(chip); | 205 | struct zynq_gpio *gpio = gpiochip_get_data(chip); |
211 | 206 | ||
212 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); | 207 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); |
213 | 208 | ||
@@ -244,7 +239,7 @@ static int zynq_gpio_dir_in(struct gpio_chip *chip, unsigned int pin) | |||
244 | { | 239 | { |
245 | u32 reg; | 240 | u32 reg; |
246 | unsigned int bank_num, bank_pin_num; | 241 | unsigned int bank_num, bank_pin_num; |
247 | struct zynq_gpio *gpio = to_zynq_gpio(chip); | 242 | struct zynq_gpio *gpio = gpiochip_get_data(chip); |
248 | 243 | ||
249 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); | 244 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); |
250 | 245 | ||
@@ -277,7 +272,7 @@ static int zynq_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, | |||
277 | { | 272 | { |
278 | u32 reg; | 273 | u32 reg; |
279 | unsigned int bank_num, bank_pin_num; | 274 | unsigned int bank_num, bank_pin_num; |
280 | struct zynq_gpio *gpio = to_zynq_gpio(chip); | 275 | struct zynq_gpio *gpio = gpiochip_get_data(chip); |
281 | 276 | ||
282 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); | 277 | zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); |
283 | 278 | ||
@@ -308,7 +303,7 @@ static void zynq_gpio_irq_mask(struct irq_data *irq_data) | |||
308 | { | 303 | { |
309 | unsigned int device_pin_num, bank_num, bank_pin_num; | 304 | unsigned int device_pin_num, bank_num, bank_pin_num; |
310 | struct zynq_gpio *gpio = | 305 | struct zynq_gpio *gpio = |
311 | to_zynq_gpio(irq_data_get_irq_chip_data(irq_data)); | 306 | gpiochip_get_data(irq_data_get_irq_chip_data(irq_data)); |
312 | 307 | ||
313 | device_pin_num = irq_data->hwirq; | 308 | device_pin_num = irq_data->hwirq; |
314 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); | 309 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); |
@@ -329,7 +324,7 @@ static void zynq_gpio_irq_unmask(struct irq_data *irq_data) | |||
329 | { | 324 | { |
330 | unsigned int device_pin_num, bank_num, bank_pin_num; | 325 | unsigned int device_pin_num, bank_num, bank_pin_num; |
331 | struct zynq_gpio *gpio = | 326 | struct zynq_gpio *gpio = |
332 | to_zynq_gpio(irq_data_get_irq_chip_data(irq_data)); | 327 | gpiochip_get_data(irq_data_get_irq_chip_data(irq_data)); |
333 | 328 | ||
334 | device_pin_num = irq_data->hwirq; | 329 | device_pin_num = irq_data->hwirq; |
335 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); | 330 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); |
@@ -349,7 +344,7 @@ static void zynq_gpio_irq_ack(struct irq_data *irq_data) | |||
349 | { | 344 | { |
350 | unsigned int device_pin_num, bank_num, bank_pin_num; | 345 | unsigned int device_pin_num, bank_num, bank_pin_num; |
351 | struct zynq_gpio *gpio = | 346 | struct zynq_gpio *gpio = |
352 | to_zynq_gpio(irq_data_get_irq_chip_data(irq_data)); | 347 | gpiochip_get_data(irq_data_get_irq_chip_data(irq_data)); |
353 | 348 | ||
354 | device_pin_num = irq_data->hwirq; | 349 | device_pin_num = irq_data->hwirq; |
355 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); | 350 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); |
@@ -400,7 +395,7 @@ static int zynq_gpio_set_irq_type(struct irq_data *irq_data, unsigned int type) | |||
400 | u32 int_type, int_pol, int_any; | 395 | u32 int_type, int_pol, int_any; |
401 | unsigned int device_pin_num, bank_num, bank_pin_num; | 396 | unsigned int device_pin_num, bank_num, bank_pin_num; |
402 | struct zynq_gpio *gpio = | 397 | struct zynq_gpio *gpio = |
403 | to_zynq_gpio(irq_data_get_irq_chip_data(irq_data)); | 398 | gpiochip_get_data(irq_data_get_irq_chip_data(irq_data)); |
404 | 399 | ||
405 | device_pin_num = irq_data->hwirq; | 400 | device_pin_num = irq_data->hwirq; |
406 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); | 401 | zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); |
@@ -464,7 +459,7 @@ static int zynq_gpio_set_irq_type(struct irq_data *irq_data, unsigned int type) | |||
464 | static int zynq_gpio_set_wake(struct irq_data *data, unsigned int on) | 459 | static int zynq_gpio_set_wake(struct irq_data *data, unsigned int on) |
465 | { | 460 | { |
466 | struct zynq_gpio *gpio = | 461 | struct zynq_gpio *gpio = |
467 | to_zynq_gpio(irq_data_get_irq_chip_data(data)); | 462 | gpiochip_get_data(irq_data_get_irq_chip_data(data)); |
468 | 463 | ||
469 | irq_set_irq_wake(gpio->irq, on); | 464 | irq_set_irq_wake(gpio->irq, on); |
470 | 465 | ||
@@ -530,7 +525,7 @@ static void zynq_gpio_irqhandler(struct irq_desc *desc) | |||
530 | u32 int_sts, int_enb; | 525 | u32 int_sts, int_enb; |
531 | unsigned int bank_num; | 526 | unsigned int bank_num; |
532 | struct zynq_gpio *gpio = | 527 | struct zynq_gpio *gpio = |
533 | to_zynq_gpio(irq_desc_get_handler_data(desc)); | 528 | gpiochip_get_data(irq_desc_get_handler_data(desc)); |
534 | struct irq_chip *irqchip = irq_desc_get_chip(desc); | 529 | struct irq_chip *irqchip = irq_desc_get_chip(desc); |
535 | 530 | ||
536 | chained_irq_enter(irqchip, desc); | 531 | chained_irq_enter(irqchip, desc); |
@@ -592,7 +587,7 @@ static int zynq_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
592 | { | 587 | { |
593 | int ret; | 588 | int ret; |
594 | 589 | ||
595 | ret = pm_runtime_get_sync(chip->dev); | 590 | ret = pm_runtime_get_sync(chip->parent); |
596 | 591 | ||
597 | /* | 592 | /* |
598 | * If the device is already active pm_runtime_get() will return 1 on | 593 | * If the device is already active pm_runtime_get() will return 1 on |
@@ -603,7 +598,7 @@ static int zynq_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
603 | 598 | ||
604 | static void zynq_gpio_free(struct gpio_chip *chip, unsigned offset) | 599 | static void zynq_gpio_free(struct gpio_chip *chip, unsigned offset) |
605 | { | 600 | { |
606 | pm_runtime_put(chip->dev); | 601 | pm_runtime_put(chip->parent); |
607 | } | 602 | } |
608 | 603 | ||
609 | static const struct dev_pm_ops zynq_gpio_dev_pm_ops = { | 604 | static const struct dev_pm_ops zynq_gpio_dev_pm_ops = { |
@@ -698,7 +693,7 @@ static int zynq_gpio_probe(struct platform_device *pdev) | |||
698 | chip = &gpio->chip; | 693 | chip = &gpio->chip; |
699 | chip->label = gpio->p_data->label; | 694 | chip->label = gpio->p_data->label; |
700 | chip->owner = THIS_MODULE; | 695 | chip->owner = THIS_MODULE; |
701 | chip->dev = &pdev->dev; | 696 | chip->parent = &pdev->dev; |
702 | chip->get = zynq_gpio_get_value; | 697 | chip->get = zynq_gpio_get_value; |
703 | chip->set = zynq_gpio_set_value; | 698 | chip->set = zynq_gpio_set_value; |
704 | chip->request = zynq_gpio_request; | 699 | chip->request = zynq_gpio_request; |
@@ -708,23 +703,23 @@ static int zynq_gpio_probe(struct platform_device *pdev) | |||
708 | chip->base = -1; | 703 | chip->base = -1; |
709 | chip->ngpio = gpio->p_data->ngpio; | 704 | chip->ngpio = gpio->p_data->ngpio; |
710 | 705 | ||
711 | /* Enable GPIO clock */ | 706 | /* Retrieve GPIO clock */ |
712 | gpio->clk = devm_clk_get(&pdev->dev, NULL); | 707 | gpio->clk = devm_clk_get(&pdev->dev, NULL); |
713 | if (IS_ERR(gpio->clk)) { | 708 | if (IS_ERR(gpio->clk)) { |
714 | dev_err(&pdev->dev, "input clock not found.\n"); | 709 | dev_err(&pdev->dev, "input clock not found.\n"); |
715 | return PTR_ERR(gpio->clk); | 710 | return PTR_ERR(gpio->clk); |
716 | } | 711 | } |
717 | ret = clk_prepare_enable(gpio->clk); | 712 | |
718 | if (ret) { | 713 | pm_runtime_enable(&pdev->dev); |
719 | dev_err(&pdev->dev, "Unable to enable clock.\n"); | 714 | ret = pm_runtime_get_sync(&pdev->dev); |
715 | if (ret < 0) | ||
720 | return ret; | 716 | return ret; |
721 | } | ||
722 | 717 | ||
723 | /* report a bug if gpio chip registration fails */ | 718 | /* report a bug if gpio chip registration fails */ |
724 | ret = gpiochip_add(chip); | 719 | ret = gpiochip_add_data(chip, gpio); |
725 | if (ret) { | 720 | if (ret) { |
726 | dev_err(&pdev->dev, "Failed to add gpio chip\n"); | 721 | dev_err(&pdev->dev, "Failed to add gpio chip\n"); |
727 | goto err_disable_clk; | 722 | goto err_pm_put; |
728 | } | 723 | } |
729 | 724 | ||
730 | /* disable interrupts for all banks */ | 725 | /* disable interrupts for all banks */ |
@@ -742,15 +737,14 @@ static int zynq_gpio_probe(struct platform_device *pdev) | |||
742 | gpiochip_set_chained_irqchip(chip, &zynq_gpio_edge_irqchip, gpio->irq, | 737 | gpiochip_set_chained_irqchip(chip, &zynq_gpio_edge_irqchip, gpio->irq, |
743 | zynq_gpio_irqhandler); | 738 | zynq_gpio_irqhandler); |
744 | 739 | ||
745 | pm_runtime_set_active(&pdev->dev); | 740 | pm_runtime_put(&pdev->dev); |
746 | pm_runtime_enable(&pdev->dev); | ||
747 | 741 | ||
748 | return 0; | 742 | return 0; |
749 | 743 | ||
750 | err_rm_gpiochip: | 744 | err_rm_gpiochip: |
751 | gpiochip_remove(chip); | 745 | gpiochip_remove(chip); |
752 | err_disable_clk: | 746 | err_pm_put: |
753 | clk_disable_unprepare(gpio->clk); | 747 | pm_runtime_put(&pdev->dev); |
754 | 748 | ||
755 | return ret; | 749 | return ret; |
756 | } | 750 | } |
diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c index bc34bc51a948..540cbc88c7a2 100644 --- a/drivers/gpio/gpiolib-acpi.c +++ b/drivers/gpio/gpiolib-acpi.c | |||
@@ -51,10 +51,10 @@ struct acpi_gpio_chip { | |||
51 | 51 | ||
52 | static int acpi_gpiochip_find(struct gpio_chip *gc, void *data) | 52 | static int acpi_gpiochip_find(struct gpio_chip *gc, void *data) |
53 | { | 53 | { |
54 | if (!gc->dev) | 54 | if (!gc->parent) |
55 | return false; | 55 | return false; |
56 | 56 | ||
57 | return ACPI_HANDLE(gc->dev) == data; | 57 | return ACPI_HANDLE(gc->parent) == data; |
58 | } | 58 | } |
59 | 59 | ||
60 | #ifdef CONFIG_PINCTRL | 60 | #ifdef CONFIG_PINCTRL |
@@ -184,7 +184,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, | |||
184 | if (agpio->connection_type != ACPI_RESOURCE_GPIO_TYPE_INT) | 184 | if (agpio->connection_type != ACPI_RESOURCE_GPIO_TYPE_INT) |
185 | return AE_OK; | 185 | return AE_OK; |
186 | 186 | ||
187 | handle = ACPI_HANDLE(chip->dev); | 187 | handle = ACPI_HANDLE(chip->parent); |
188 | pin = agpio->pin_table[0]; | 188 | pin = agpio->pin_table[0]; |
189 | 189 | ||
190 | if (pin <= 255) { | 190 | if (pin <= 255) { |
@@ -208,7 +208,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, | |||
208 | 208 | ||
209 | desc = gpiochip_request_own_desc(chip, pin, "ACPI:Event"); | 209 | desc = gpiochip_request_own_desc(chip, pin, "ACPI:Event"); |
210 | if (IS_ERR(desc)) { | 210 | if (IS_ERR(desc)) { |
211 | dev_err(chip->dev, "Failed to request GPIO\n"); | 211 | dev_err(chip->parent, "Failed to request GPIO\n"); |
212 | return AE_ERROR; | 212 | return AE_ERROR; |
213 | } | 213 | } |
214 | 214 | ||
@@ -216,13 +216,13 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, | |||
216 | 216 | ||
217 | ret = gpiochip_lock_as_irq(chip, pin); | 217 | ret = gpiochip_lock_as_irq(chip, pin); |
218 | if (ret) { | 218 | if (ret) { |
219 | dev_err(chip->dev, "Failed to lock GPIO as interrupt\n"); | 219 | dev_err(chip->parent, "Failed to lock GPIO as interrupt\n"); |
220 | goto fail_free_desc; | 220 | goto fail_free_desc; |
221 | } | 221 | } |
222 | 222 | ||
223 | irq = gpiod_to_irq(desc); | 223 | irq = gpiod_to_irq(desc); |
224 | if (irq < 0) { | 224 | if (irq < 0) { |
225 | dev_err(chip->dev, "Failed to translate GPIO to IRQ\n"); | 225 | dev_err(chip->parent, "Failed to translate GPIO to IRQ\n"); |
226 | goto fail_unlock_irq; | 226 | goto fail_unlock_irq; |
227 | } | 227 | } |
228 | 228 | ||
@@ -259,7 +259,8 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, | |||
259 | ret = request_threaded_irq(event->irq, NULL, handler, irqflags, | 259 | ret = request_threaded_irq(event->irq, NULL, handler, irqflags, |
260 | "ACPI:Event", event); | 260 | "ACPI:Event", event); |
261 | if (ret) { | 261 | if (ret) { |
262 | dev_err(chip->dev, "Failed to setup interrupt handler for %d\n", | 262 | dev_err(chip->parent, |
263 | "Failed to setup interrupt handler for %d\n", | ||
263 | event->irq); | 264 | event->irq); |
264 | goto fail_free_event; | 265 | goto fail_free_event; |
265 | } | 266 | } |
@@ -293,10 +294,10 @@ void acpi_gpiochip_request_interrupts(struct gpio_chip *chip) | |||
293 | acpi_handle handle; | 294 | acpi_handle handle; |
294 | acpi_status status; | 295 | acpi_status status; |
295 | 296 | ||
296 | if (!chip->dev || !chip->to_irq) | 297 | if (!chip->parent || !chip->to_irq) |
297 | return; | 298 | return; |
298 | 299 | ||
299 | handle = ACPI_HANDLE(chip->dev); | 300 | handle = ACPI_HANDLE(chip->parent); |
300 | if (!handle) | 301 | if (!handle) |
301 | return; | 302 | return; |
302 | 303 | ||
@@ -323,10 +324,10 @@ void acpi_gpiochip_free_interrupts(struct gpio_chip *chip) | |||
323 | acpi_handle handle; | 324 | acpi_handle handle; |
324 | acpi_status status; | 325 | acpi_status status; |
325 | 326 | ||
326 | if (!chip->dev || !chip->to_irq) | 327 | if (!chip->parent || !chip->to_irq) |
327 | return; | 328 | return; |
328 | 329 | ||
329 | handle = ACPI_HANDLE(chip->dev); | 330 | handle = ACPI_HANDLE(chip->parent); |
330 | if (!handle) | 331 | if (!handle) |
331 | return; | 332 | return; |
332 | 333 | ||
@@ -769,7 +770,7 @@ out: | |||
769 | static void acpi_gpiochip_request_regions(struct acpi_gpio_chip *achip) | 770 | static void acpi_gpiochip_request_regions(struct acpi_gpio_chip *achip) |
770 | { | 771 | { |
771 | struct gpio_chip *chip = achip->chip; | 772 | struct gpio_chip *chip = achip->chip; |
772 | acpi_handle handle = ACPI_HANDLE(chip->dev); | 773 | acpi_handle handle = ACPI_HANDLE(chip->parent); |
773 | acpi_status status; | 774 | acpi_status status; |
774 | 775 | ||
775 | INIT_LIST_HEAD(&achip->conns); | 776 | INIT_LIST_HEAD(&achip->conns); |
@@ -778,20 +779,22 @@ static void acpi_gpiochip_request_regions(struct acpi_gpio_chip *achip) | |||
778 | acpi_gpio_adr_space_handler, | 779 | acpi_gpio_adr_space_handler, |
779 | NULL, achip); | 780 | NULL, achip); |
780 | if (ACPI_FAILURE(status)) | 781 | if (ACPI_FAILURE(status)) |
781 | dev_err(chip->dev, "Failed to install GPIO OpRegion handler\n"); | 782 | dev_err(chip->parent, |
783 | "Failed to install GPIO OpRegion handler\n"); | ||
782 | } | 784 | } |
783 | 785 | ||
784 | static void acpi_gpiochip_free_regions(struct acpi_gpio_chip *achip) | 786 | static void acpi_gpiochip_free_regions(struct acpi_gpio_chip *achip) |
785 | { | 787 | { |
786 | struct gpio_chip *chip = achip->chip; | 788 | struct gpio_chip *chip = achip->chip; |
787 | acpi_handle handle = ACPI_HANDLE(chip->dev); | 789 | acpi_handle handle = ACPI_HANDLE(chip->parent); |
788 | struct acpi_gpio_connection *conn, *tmp; | 790 | struct acpi_gpio_connection *conn, *tmp; |
789 | acpi_status status; | 791 | acpi_status status; |
790 | 792 | ||
791 | status = acpi_remove_address_space_handler(handle, ACPI_ADR_SPACE_GPIO, | 793 | status = acpi_remove_address_space_handler(handle, ACPI_ADR_SPACE_GPIO, |
792 | acpi_gpio_adr_space_handler); | 794 | acpi_gpio_adr_space_handler); |
793 | if (ACPI_FAILURE(status)) { | 795 | if (ACPI_FAILURE(status)) { |
794 | dev_err(chip->dev, "Failed to remove GPIO OpRegion handler\n"); | 796 | dev_err(chip->parent, |
797 | "Failed to remove GPIO OpRegion handler\n"); | ||
795 | return; | 798 | return; |
796 | } | 799 | } |
797 | 800 | ||
@@ -808,16 +811,16 @@ void acpi_gpiochip_add(struct gpio_chip *chip) | |||
808 | acpi_handle handle; | 811 | acpi_handle handle; |
809 | acpi_status status; | 812 | acpi_status status; |
810 | 813 | ||
811 | if (!chip || !chip->dev) | 814 | if (!chip || !chip->parent) |
812 | return; | 815 | return; |
813 | 816 | ||
814 | handle = ACPI_HANDLE(chip->dev); | 817 | handle = ACPI_HANDLE(chip->parent); |
815 | if (!handle) | 818 | if (!handle) |
816 | return; | 819 | return; |
817 | 820 | ||
818 | acpi_gpio = kzalloc(sizeof(*acpi_gpio), GFP_KERNEL); | 821 | acpi_gpio = kzalloc(sizeof(*acpi_gpio), GFP_KERNEL); |
819 | if (!acpi_gpio) { | 822 | if (!acpi_gpio) { |
820 | dev_err(chip->dev, | 823 | dev_err(chip->parent, |
821 | "Failed to allocate memory for ACPI GPIO chip\n"); | 824 | "Failed to allocate memory for ACPI GPIO chip\n"); |
822 | return; | 825 | return; |
823 | } | 826 | } |
@@ -827,7 +830,7 @@ void acpi_gpiochip_add(struct gpio_chip *chip) | |||
827 | 830 | ||
828 | status = acpi_attach_data(handle, acpi_gpio_chip_dh, acpi_gpio); | 831 | status = acpi_attach_data(handle, acpi_gpio_chip_dh, acpi_gpio); |
829 | if (ACPI_FAILURE(status)) { | 832 | if (ACPI_FAILURE(status)) { |
830 | dev_err(chip->dev, "Failed to attach ACPI GPIO chip\n"); | 833 | dev_err(chip->parent, "Failed to attach ACPI GPIO chip\n"); |
831 | kfree(acpi_gpio); | 834 | kfree(acpi_gpio); |
832 | return; | 835 | return; |
833 | } | 836 | } |
@@ -841,16 +844,16 @@ void acpi_gpiochip_remove(struct gpio_chip *chip) | |||
841 | acpi_handle handle; | 844 | acpi_handle handle; |
842 | acpi_status status; | 845 | acpi_status status; |
843 | 846 | ||
844 | if (!chip || !chip->dev) | 847 | if (!chip || !chip->parent) |
845 | return; | 848 | return; |
846 | 849 | ||
847 | handle = ACPI_HANDLE(chip->dev); | 850 | handle = ACPI_HANDLE(chip->parent); |
848 | if (!handle) | 851 | if (!handle) |
849 | return; | 852 | return; |
850 | 853 | ||
851 | status = acpi_get_data(handle, acpi_gpio_chip_dh, (void **)&acpi_gpio); | 854 | status = acpi_get_data(handle, acpi_gpio_chip_dh, (void **)&acpi_gpio); |
852 | if (ACPI_FAILURE(status)) { | 855 | if (ACPI_FAILURE(status)) { |
853 | dev_warn(chip->dev, "Failed to retrieve ACPI GPIO chip\n"); | 856 | dev_warn(chip->parent, "Failed to retrieve ACPI GPIO chip\n"); |
854 | return; | 857 | return; |
855 | } | 858 | } |
856 | 859 | ||
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index 5fe34a9df3e6..42a4bb7cf49a 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c | |||
@@ -262,9 +262,10 @@ int of_gpio_simple_xlate(struct gpio_chip *gc, | |||
262 | EXPORT_SYMBOL(of_gpio_simple_xlate); | 262 | EXPORT_SYMBOL(of_gpio_simple_xlate); |
263 | 263 | ||
264 | /** | 264 | /** |
265 | * of_mm_gpiochip_add - Add memory mapped GPIO chip (bank) | 265 | * of_mm_gpiochip_add_data - Add memory mapped GPIO chip (bank) |
266 | * @np: device node of the GPIO chip | 266 | * @np: device node of the GPIO chip |
267 | * @mm_gc: pointer to the of_mm_gpio_chip allocated structure | 267 | * @mm_gc: pointer to the of_mm_gpio_chip allocated structure |
268 | * @data: driver data to store in the struct gpio_chip | ||
268 | * | 269 | * |
269 | * To use this function you should allocate and fill mm_gc with: | 270 | * To use this function you should allocate and fill mm_gc with: |
270 | * | 271 | * |
@@ -280,8 +281,9 @@ EXPORT_SYMBOL(of_gpio_simple_xlate); | |||
280 | * do all necessary work for you. Then you'll able to use .regs | 281 | * do all necessary work for you. Then you'll able to use .regs |
281 | * to manage GPIOs from the callbacks. | 282 | * to manage GPIOs from the callbacks. |
282 | */ | 283 | */ |
283 | int of_mm_gpiochip_add(struct device_node *np, | 284 | int of_mm_gpiochip_add_data(struct device_node *np, |
284 | struct of_mm_gpio_chip *mm_gc) | 285 | struct of_mm_gpio_chip *mm_gc, |
286 | void *data) | ||
285 | { | 287 | { |
286 | int ret = -ENOMEM; | 288 | int ret = -ENOMEM; |
287 | struct gpio_chip *gc = &mm_gc->gc; | 289 | struct gpio_chip *gc = &mm_gc->gc; |
@@ -301,7 +303,7 @@ int of_mm_gpiochip_add(struct device_node *np, | |||
301 | 303 | ||
302 | mm_gc->gc.of_node = np; | 304 | mm_gc->gc.of_node = np; |
303 | 305 | ||
304 | ret = gpiochip_add(gc); | 306 | ret = gpiochip_add_data(gc, data); |
305 | if (ret) | 307 | if (ret) |
306 | goto err2; | 308 | goto err2; |
307 | 309 | ||
@@ -315,7 +317,7 @@ err0: | |||
315 | np->full_name, ret); | 317 | np->full_name, ret); |
316 | return ret; | 318 | return ret; |
317 | } | 319 | } |
318 | EXPORT_SYMBOL(of_mm_gpiochip_add); | 320 | EXPORT_SYMBOL(of_mm_gpiochip_add_data); |
319 | 321 | ||
320 | /** | 322 | /** |
321 | * of_mm_gpiochip_remove - Remove memory mapped GPIO chip (bank) | 323 | * of_mm_gpiochip_remove - Remove memory mapped GPIO chip (bank) |
@@ -423,8 +425,8 @@ int of_gpiochip_add(struct gpio_chip *chip) | |||
423 | { | 425 | { |
424 | int status; | 426 | int status; |
425 | 427 | ||
426 | if ((!chip->of_node) && (chip->dev)) | 428 | if ((!chip->of_node) && (chip->parent)) |
427 | chip->of_node = chip->dev->of_node; | 429 | chip->of_node = chip->parent->of_node; |
428 | 430 | ||
429 | if (!chip->of_node) | 431 | if (!chip->of_node) |
430 | return 0; | 432 | return 0; |
diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c index b57ed8e55ab5..405dfcaadc4c 100644 --- a/drivers/gpio/gpiolib-sysfs.c +++ b/drivers/gpio/gpiolib-sysfs.c | |||
@@ -605,7 +605,7 @@ int gpiod_export(struct gpio_desc *desc, bool direction_may_change) | |||
605 | if (chip->names && chip->names[offset]) | 605 | if (chip->names && chip->names[offset]) |
606 | ioname = chip->names[offset]; | 606 | ioname = chip->names[offset]; |
607 | 607 | ||
608 | dev = device_create_with_groups(&gpio_class, chip->dev, | 608 | dev = device_create_with_groups(&gpio_class, chip->parent, |
609 | MKDEV(0, 0), data, gpio_groups, | 609 | MKDEV(0, 0), data, gpio_groups, |
610 | ioname ? ioname : "gpio%u", | 610 | ioname ? ioname : "gpio%u", |
611 | desc_to_gpio(desc)); | 611 | desc_to_gpio(desc)); |
@@ -730,7 +730,8 @@ int gpiochip_sysfs_register(struct gpio_chip *chip) | |||
730 | return 0; | 730 | return 0; |
731 | 731 | ||
732 | /* use chip->base for the ID; it's already known to be unique */ | 732 | /* use chip->base for the ID; it's already known to be unique */ |
733 | dev = device_create_with_groups(&gpio_class, chip->dev, MKDEV(0, 0), | 733 | dev = device_create_with_groups(&gpio_class, chip->parent, |
734 | MKDEV(0, 0), | ||
734 | chip, gpiochip_groups, | 735 | chip, gpiochip_groups, |
735 | "gpiochip%d", chip->base); | 736 | "gpiochip%d", chip->base); |
736 | if (IS_ERR(dev)) | 737 | if (IS_ERR(dev)) |
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 3346abd29b52..5c1ba879f889 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c | |||
@@ -182,39 +182,62 @@ EXPORT_SYMBOL_GPL(gpiod_get_direction); | |||
182 | 182 | ||
183 | /* | 183 | /* |
184 | * Add a new chip to the global chips list, keeping the list of chips sorted | 184 | * Add a new chip to the global chips list, keeping the list of chips sorted |
185 | * by base order. | 185 | * by range(means [base, base + ngpio - 1]) order. |
186 | * | 186 | * |
187 | * Return -EBUSY if the new chip overlaps with some other chip's integer | 187 | * Return -EBUSY if the new chip overlaps with some other chip's integer |
188 | * space. | 188 | * space. |
189 | */ | 189 | */ |
190 | static int gpiochip_add_to_list(struct gpio_chip *chip) | 190 | static int gpiochip_add_to_list(struct gpio_chip *chip) |
191 | { | 191 | { |
192 | struct list_head *pos; | 192 | struct gpio_chip *iterator; |
193 | struct gpio_chip *_chip; | 193 | struct gpio_chip *previous = NULL; |
194 | int err = 0; | ||
195 | 194 | ||
196 | /* find where to insert our chip */ | 195 | if (list_empty(&gpio_chips)) { |
197 | list_for_each(pos, &gpio_chips) { | 196 | list_add_tail(&chip->list, &gpio_chips); |
198 | _chip = list_entry(pos, struct gpio_chip, list); | 197 | return 0; |
199 | /* shall we insert before _chip? */ | ||
200 | if (_chip->base >= chip->base + chip->ngpio) | ||
201 | break; | ||
202 | } | 198 | } |
203 | 199 | ||
204 | /* are we stepping on the chip right before? */ | 200 | list_for_each_entry(iterator, &gpio_chips, list) { |
205 | if (pos != &gpio_chips && pos->prev != &gpio_chips) { | 201 | if (iterator->base >= chip->base + chip->ngpio) { |
206 | _chip = list_entry(pos->prev, struct gpio_chip, list); | 202 | /* |
207 | if (_chip->base + _chip->ngpio > chip->base) { | 203 | * Iterator is the first GPIO chip so there is no |
208 | dev_err(chip->dev, | 204 | * previous one |
209 | "GPIO integer space overlap, cannot add chip\n"); | 205 | */ |
210 | err = -EBUSY; | 206 | if (!previous) { |
207 | goto found; | ||
208 | } else { | ||
209 | /* | ||
210 | * We found a valid range(means | ||
211 | * [base, base + ngpio - 1]) between previous | ||
212 | * and iterator chip. | ||
213 | */ | ||
214 | if (previous->base + previous->ngpio | ||
215 | <= chip->base) | ||
216 | goto found; | ||
217 | } | ||
211 | } | 218 | } |
219 | previous = iterator; | ||
220 | } | ||
221 | |||
222 | /* | ||
223 | * We are beyond the last chip in the list and iterator now | ||
224 | * points to the head. | ||
225 | * Let iterator point to the last chip in the list. | ||
226 | */ | ||
227 | |||
228 | iterator = list_last_entry(&gpio_chips, struct gpio_chip, list); | ||
229 | if (iterator->base + iterator->ngpio <= chip->base) { | ||
230 | list_add(&chip->list, &iterator->list); | ||
231 | return 0; | ||
212 | } | 232 | } |
213 | 233 | ||
214 | if (!err) | 234 | dev_err(chip->parent, |
215 | list_add_tail(&chip->list, pos); | 235 | "GPIO integer space overlap, cannot add chip\n"); |
236 | return -EBUSY; | ||
216 | 237 | ||
217 | return err; | 238 | found: |
239 | list_add_tail(&chip->list, &iterator->list); | ||
240 | return 0; | ||
218 | } | 241 | } |
219 | 242 | ||
220 | /** | 243 | /** |
@@ -252,7 +275,7 @@ static struct gpio_desc *gpio_name_to_desc(const char * const name) | |||
252 | * Takes the names from gc->names and checks if they are all unique. If they | 275 | * Takes the names from gc->names and checks if they are all unique. If they |
253 | * are, they are assigned to their gpio descriptors. | 276 | * are, they are assigned to their gpio descriptors. |
254 | * | 277 | * |
255 | * Returns -EEXIST if one of the names is already used for a different GPIO. | 278 | * Warning if one of the names is already used for a different GPIO. |
256 | */ | 279 | */ |
257 | static int gpiochip_set_desc_names(struct gpio_chip *gc) | 280 | static int gpiochip_set_desc_names(struct gpio_chip *gc) |
258 | { | 281 | { |
@@ -267,7 +290,7 @@ static int gpiochip_set_desc_names(struct gpio_chip *gc) | |||
267 | 290 | ||
268 | gpio = gpio_name_to_desc(gc->names[i]); | 291 | gpio = gpio_name_to_desc(gc->names[i]); |
269 | if (gpio) | 292 | if (gpio) |
270 | dev_warn(gc->dev, "Detected name collision for " | 293 | dev_warn(gc->parent, "Detected name collision for " |
271 | "GPIO name '%s'\n", | 294 | "GPIO name '%s'\n", |
272 | gc->names[i]); | 295 | gc->names[i]); |
273 | } | 296 | } |
@@ -280,7 +303,7 @@ static int gpiochip_set_desc_names(struct gpio_chip *gc) | |||
280 | } | 303 | } |
281 | 304 | ||
282 | /** | 305 | /** |
283 | * gpiochip_add() - register a gpio_chip | 306 | * gpiochip_add_data() - register a gpio_chip |
284 | * @chip: the chip to register, with chip->base initialized | 307 | * @chip: the chip to register, with chip->base initialized |
285 | * Context: potentially before irqs will work | 308 | * Context: potentially before irqs will work |
286 | * | 309 | * |
@@ -288,15 +311,15 @@ static int gpiochip_set_desc_names(struct gpio_chip *gc) | |||
288 | * because the chip->base is invalid or already associated with a | 311 | * because the chip->base is invalid or already associated with a |
289 | * different chip. Otherwise it returns zero as a success code. | 312 | * different chip. Otherwise it returns zero as a success code. |
290 | * | 313 | * |
291 | * When gpiochip_add() is called very early during boot, so that GPIOs | 314 | * When gpiochip_add_data() is called very early during boot, so that GPIOs |
292 | * can be freely used, the chip->dev device must be registered before | 315 | * can be freely used, the chip->parent device must be registered before |
293 | * the gpio framework's arch_initcall(). Otherwise sysfs initialization | 316 | * the gpio framework's arch_initcall(). Otherwise sysfs initialization |
294 | * for GPIOs will fail rudely. | 317 | * for GPIOs will fail rudely. |
295 | * | 318 | * |
296 | * If chip->base is negative, this requests dynamic assignment of | 319 | * If chip->base is negative, this requests dynamic assignment of |
297 | * a range of valid GPIOs. | 320 | * a range of valid GPIOs. |
298 | */ | 321 | */ |
299 | int gpiochip_add(struct gpio_chip *chip) | 322 | int gpiochip_add_data(struct gpio_chip *chip, void *data) |
300 | { | 323 | { |
301 | unsigned long flags; | 324 | unsigned long flags; |
302 | int status = 0; | 325 | int status = 0; |
@@ -308,6 +331,13 @@ int gpiochip_add(struct gpio_chip *chip) | |||
308 | if (!descs) | 331 | if (!descs) |
309 | return -ENOMEM; | 332 | return -ENOMEM; |
310 | 333 | ||
334 | chip->data = data; | ||
335 | |||
336 | if (chip->ngpio == 0) { | ||
337 | chip_err(chip, "tried to insert a GPIO chip with zero lines\n"); | ||
338 | return -EINVAL; | ||
339 | } | ||
340 | |||
311 | spin_lock_irqsave(&gpio_lock, flags); | 341 | spin_lock_irqsave(&gpio_lock, flags); |
312 | 342 | ||
313 | if (base < 0) { | 343 | if (base < 0) { |
@@ -348,8 +378,8 @@ int gpiochip_add(struct gpio_chip *chip) | |||
348 | INIT_LIST_HEAD(&chip->pin_ranges); | 378 | INIT_LIST_HEAD(&chip->pin_ranges); |
349 | #endif | 379 | #endif |
350 | 380 | ||
351 | if (!chip->owner && chip->dev && chip->dev->driver) | 381 | if (!chip->owner && chip->parent && chip->parent->driver) |
352 | chip->owner = chip->dev->driver->owner; | 382 | chip->owner = chip->parent->driver->owner; |
353 | 383 | ||
354 | status = gpiochip_set_desc_names(chip); | 384 | status = gpiochip_set_desc_names(chip); |
355 | if (status) | 385 | if (status) |
@@ -389,7 +419,7 @@ err_free_descs: | |||
389 | chip->label ? : "generic"); | 419 | chip->label ? : "generic"); |
390 | return status; | 420 | return status; |
391 | } | 421 | } |
392 | EXPORT_SYMBOL_GPL(gpiochip_add); | 422 | EXPORT_SYMBOL_GPL(gpiochip_add_data); |
393 | 423 | ||
394 | /** | 424 | /** |
395 | * gpiochip_remove() - unregister a gpio_chip | 425 | * gpiochip_remove() - unregister a gpio_chip |
@@ -424,7 +454,8 @@ void gpiochip_remove(struct gpio_chip *chip) | |||
424 | spin_unlock_irqrestore(&gpio_lock, flags); | 454 | spin_unlock_irqrestore(&gpio_lock, flags); |
425 | 455 | ||
426 | if (requested) | 456 | if (requested) |
427 | dev_crit(chip->dev, "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); | 457 | dev_crit(chip->parent, |
458 | "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); | ||
428 | 459 | ||
429 | kfree(chip->desc); | 460 | kfree(chip->desc); |
430 | chip->desc = NULL; | 461 | chip->desc = NULL; |
@@ -659,7 +690,7 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) | |||
659 | * gpiochip, providing an irq domain to translate the local IRQs to | 690 | * gpiochip, providing an irq domain to translate the local IRQs to |
660 | * global irqs in the gpiolib core, and making sure that the gpiochip | 691 | * global irqs in the gpiolib core, and making sure that the gpiochip |
661 | * is passed as chip data to all related functions. Driver callbacks | 692 | * is passed as chip data to all related functions. Driver callbacks |
662 | * need to use container_of() to get their local state containers back | 693 | * need to use gpiochip_get_data() to get their local state containers back |
663 | * from the gpiochip passed as chip data. An irqdomain will be stored | 694 | * from the gpiochip passed as chip data. An irqdomain will be stored |
664 | * in the gpiochip that shall be used by the driver to handle IRQ number | 695 | * in the gpiochip that shall be used by the driver to handle IRQ number |
665 | * translation. The gpiochip will need to be initialized and registered | 696 | * translation. The gpiochip will need to be initialized and registered |
@@ -683,15 +714,16 @@ int _gpiochip_irqchip_add(struct gpio_chip *gpiochip, | |||
683 | if (!gpiochip || !irqchip) | 714 | if (!gpiochip || !irqchip) |
684 | return -EINVAL; | 715 | return -EINVAL; |
685 | 716 | ||
686 | if (!gpiochip->dev) { | 717 | if (!gpiochip->parent) { |
687 | pr_err("missing gpiochip .dev parent pointer\n"); | 718 | pr_err("missing gpiochip .dev parent pointer\n"); |
688 | return -EINVAL; | 719 | return -EINVAL; |
689 | } | 720 | } |
690 | of_node = gpiochip->dev->of_node; | 721 | of_node = gpiochip->parent->of_node; |
691 | #ifdef CONFIG_OF_GPIO | 722 | #ifdef CONFIG_OF_GPIO |
692 | /* | 723 | /* |
693 | * If the gpiochip has an assigned OF node this takes precedence | 724 | * If the gpiochip has an assigned OF node this takes precedence |
694 | * FIXME: get rid of this and use gpiochip->dev->of_node everywhere | 725 | * FIXME: get rid of this and use gpiochip->parent->of_node |
726 | * everywhere | ||
695 | */ | 727 | */ |
696 | if (gpiochip->of_node) | 728 | if (gpiochip->of_node) |
697 | of_node = gpiochip->of_node; | 729 | of_node = gpiochip->of_node; |
@@ -1279,13 +1311,7 @@ static int _gpiod_get_raw_value(const struct gpio_desc *desc) | |||
1279 | chip = desc->chip; | 1311 | chip = desc->chip; |
1280 | offset = gpio_chip_hwgpio(desc); | 1312 | offset = gpio_chip_hwgpio(desc); |
1281 | value = chip->get ? chip->get(chip, offset) : -EIO; | 1313 | value = chip->get ? chip->get(chip, offset) : -EIO; |
1282 | /* | 1314 | value = value < 0 ? value : !!value; |
1283 | * FIXME: fix all drivers to clamp to [0,1] or return negative, | ||
1284 | * then change this to: | ||
1285 | * value = value < 0 ? value : !!value; | ||
1286 | * so we can properly propagate error codes. | ||
1287 | */ | ||
1288 | value = !!value; | ||
1289 | trace_gpio_value(desc_to_gpio(desc), 1, value); | 1315 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
1290 | return value; | 1316 | return value; |
1291 | } | 1317 | } |
@@ -2512,7 +2538,7 @@ static int gpiolib_seq_show(struct seq_file *s, void *v) | |||
2512 | 2538 | ||
2513 | seq_printf(s, "%sGPIOs %d-%d", (char *)s->private, | 2539 | seq_printf(s, "%sGPIOs %d-%d", (char *)s->private, |
2514 | chip->base, chip->base + chip->ngpio - 1); | 2540 | chip->base, chip->base + chip->ngpio - 1); |
2515 | dev = chip->dev; | 2541 | dev = chip->parent; |
2516 | if (dev) | 2542 | if (dev) |
2517 | seq_printf(s, ", %s/%s", dev->bus ? dev->bus->name : "no-bus", | 2543 | seq_printf(s, ", %s/%s", dev->bus ? dev->bus->name : "no-bus", |
2518 | dev_name(dev)); | 2544 | dev_name(dev)); |
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index be3a977d0349..99ed3b00ffe9 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h | |||
@@ -16,7 +16,7 @@ | |||
16 | #include <linux/device.h> | 16 | #include <linux/device.h> |
17 | 17 | ||
18 | enum of_gpio_flags; | 18 | enum of_gpio_flags; |
19 | 19 | enum gpiod_flags; | |
20 | struct acpi_device; | 20 | struct acpi_device; |
21 | 21 | ||
22 | /** | 22 | /** |
diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c index 7c38bfa05fac..086d8a507157 100644 --- a/drivers/hid/hid-cp2112.c +++ b/drivers/hid/hid-cp2112.c | |||
@@ -24,7 +24,7 @@ | |||
24 | * http://www.silabs.com/Support%20Documents/TechnicalDocs/AN495.pdf | 24 | * http://www.silabs.com/Support%20Documents/TechnicalDocs/AN495.pdf |
25 | */ | 25 | */ |
26 | 26 | ||
27 | #include <linux/gpio.h> | 27 | #include <linux/gpio/driver.h> |
28 | #include <linux/hid.h> | 28 | #include <linux/hid.h> |
29 | #include <linux/i2c.h> | 29 | #include <linux/i2c.h> |
30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
@@ -169,8 +169,7 @@ MODULE_PARM_DESC(gpio_push_pull, "GPIO push-pull configuration bitmask"); | |||
169 | 169 | ||
170 | static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 170 | static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
171 | { | 171 | { |
172 | struct cp2112_device *dev = container_of(chip, struct cp2112_device, | 172 | struct cp2112_device *dev = gpiochip_get_data(chip); |
173 | gc); | ||
174 | struct hid_device *hdev = dev->hdev; | 173 | struct hid_device *hdev = dev->hdev; |
175 | u8 buf[5]; | 174 | u8 buf[5]; |
176 | int ret; | 175 | int ret; |
@@ -198,8 +197,7 @@ static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
198 | 197 | ||
199 | static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 198 | static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
200 | { | 199 | { |
201 | struct cp2112_device *dev = container_of(chip, struct cp2112_device, | 200 | struct cp2112_device *dev = gpiochip_get_data(chip); |
202 | gc); | ||
203 | struct hid_device *hdev = dev->hdev; | 201 | struct hid_device *hdev = dev->hdev; |
204 | u8 buf[3]; | 202 | u8 buf[3]; |
205 | int ret; | 203 | int ret; |
@@ -216,8 +214,7 @@ static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
216 | 214 | ||
217 | static int cp2112_gpio_get(struct gpio_chip *chip, unsigned offset) | 215 | static int cp2112_gpio_get(struct gpio_chip *chip, unsigned offset) |
218 | { | 216 | { |
219 | struct cp2112_device *dev = container_of(chip, struct cp2112_device, | 217 | struct cp2112_device *dev = gpiochip_get_data(chip); |
220 | gc); | ||
221 | struct hid_device *hdev = dev->hdev; | 218 | struct hid_device *hdev = dev->hdev; |
222 | u8 buf[2]; | 219 | u8 buf[2]; |
223 | int ret; | 220 | int ret; |
@@ -235,8 +232,7 @@ static int cp2112_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
235 | static int cp2112_gpio_direction_output(struct gpio_chip *chip, | 232 | static int cp2112_gpio_direction_output(struct gpio_chip *chip, |
236 | unsigned offset, int value) | 233 | unsigned offset, int value) |
237 | { | 234 | { |
238 | struct cp2112_device *dev = container_of(chip, struct cp2112_device, | 235 | struct cp2112_device *dev = gpiochip_get_data(chip); |
239 | gc); | ||
240 | struct hid_device *hdev = dev->hdev; | 236 | struct hid_device *hdev = dev->hdev; |
241 | u8 buf[5]; | 237 | u8 buf[5]; |
242 | int ret; | 238 | int ret; |
@@ -1104,9 +1100,9 @@ static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id) | |||
1104 | dev->gc.base = -1; | 1100 | dev->gc.base = -1; |
1105 | dev->gc.ngpio = 8; | 1101 | dev->gc.ngpio = 8; |
1106 | dev->gc.can_sleep = 1; | 1102 | dev->gc.can_sleep = 1; |
1107 | dev->gc.dev = &hdev->dev; | 1103 | dev->gc.parent = &hdev->dev; |
1108 | 1104 | ||
1109 | ret = gpiochip_add(&dev->gc); | 1105 | ret = gpiochip_add_data(&dev->gc, dev); |
1110 | if (ret < 0) { | 1106 | if (ret < 0) { |
1111 | hid_err(hdev, "error registering gpio chip\n"); | 1107 | hid_err(hdev, "error registering gpio chip\n"); |
1112 | goto err_free_i2c; | 1108 | goto err_free_i2c; |
diff --git a/drivers/input/touchscreen/ad7879.c b/drivers/input/touchscreen/ad7879.c index fec66ad80513..16b5cc2196f2 100644 --- a/drivers/input/touchscreen/ad7879.c +++ b/drivers/input/touchscreen/ad7879.c | |||
@@ -454,7 +454,7 @@ static int ad7879_gpio_add(struct ad7879 *ts, | |||
454 | ts->gc.ngpio = 1; | 454 | ts->gc.ngpio = 1; |
455 | ts->gc.label = "AD7879-GPIO"; | 455 | ts->gc.label = "AD7879-GPIO"; |
456 | ts->gc.owner = THIS_MODULE; | 456 | ts->gc.owner = THIS_MODULE; |
457 | ts->gc.dev = ts->dev; | 457 | ts->gc.parent = ts->dev; |
458 | 458 | ||
459 | ret = gpiochip_add(&ts->gc); | 459 | ret = gpiochip_add(&ts->gc); |
460 | if (ret) | 460 | if (ret) |
diff --git a/drivers/leds/leds-pca9532.c b/drivers/leds/leds-pca9532.c index 17c63ec9fb9e..e3d3b1aaa9e0 100644 --- a/drivers/leds/leds-pca9532.c +++ b/drivers/leds/leds-pca9532.c | |||
@@ -242,7 +242,7 @@ static void pca9532_input_work(struct work_struct *work) | |||
242 | #ifdef CONFIG_LEDS_PCA9532_GPIO | 242 | #ifdef CONFIG_LEDS_PCA9532_GPIO |
243 | static int pca9532_gpio_request_pin(struct gpio_chip *gc, unsigned offset) | 243 | static int pca9532_gpio_request_pin(struct gpio_chip *gc, unsigned offset) |
244 | { | 244 | { |
245 | struct pca9532_data *data = container_of(gc, struct pca9532_data, gpio); | 245 | struct pca9532_data *data = gpiochip_get_data(gc); |
246 | struct pca9532_led *led = &data->leds[offset]; | 246 | struct pca9532_led *led = &data->leds[offset]; |
247 | 247 | ||
248 | if (led->type == PCA9532_TYPE_GPIO) | 248 | if (led->type == PCA9532_TYPE_GPIO) |
@@ -253,7 +253,7 @@ static int pca9532_gpio_request_pin(struct gpio_chip *gc, unsigned offset) | |||
253 | 253 | ||
254 | static void pca9532_gpio_set_value(struct gpio_chip *gc, unsigned offset, int val) | 254 | static void pca9532_gpio_set_value(struct gpio_chip *gc, unsigned offset, int val) |
255 | { | 255 | { |
256 | struct pca9532_data *data = container_of(gc, struct pca9532_data, gpio); | 256 | struct pca9532_data *data = gpiochip_get_data(gc); |
257 | struct pca9532_led *led = &data->leds[offset]; | 257 | struct pca9532_led *led = &data->leds[offset]; |
258 | 258 | ||
259 | if (val) | 259 | if (val) |
@@ -266,7 +266,7 @@ static void pca9532_gpio_set_value(struct gpio_chip *gc, unsigned offset, int va | |||
266 | 266 | ||
267 | static int pca9532_gpio_get_value(struct gpio_chip *gc, unsigned offset) | 267 | static int pca9532_gpio_get_value(struct gpio_chip *gc, unsigned offset) |
268 | { | 268 | { |
269 | struct pca9532_data *data = container_of(gc, struct pca9532_data, gpio); | 269 | struct pca9532_data *data = gpiochip_get_data(gc); |
270 | unsigned char reg; | 270 | unsigned char reg; |
271 | 271 | ||
272 | reg = i2c_smbus_read_byte_data(data->client, PCA9532_REG_INPUT(offset)); | 272 | reg = i2c_smbus_read_byte_data(data->client, PCA9532_REG_INPUT(offset)); |
@@ -315,7 +315,7 @@ static int pca9532_destroy_devices(struct pca9532_data *data, int n_devs) | |||
315 | } | 315 | } |
316 | 316 | ||
317 | #ifdef CONFIG_LEDS_PCA9532_GPIO | 317 | #ifdef CONFIG_LEDS_PCA9532_GPIO |
318 | if (data->gpio.dev) | 318 | if (data->gpio.parent) |
319 | gpiochip_remove(&data->gpio); | 319 | gpiochip_remove(&data->gpio); |
320 | #endif | 320 | #endif |
321 | 321 | ||
@@ -409,13 +409,13 @@ static int pca9532_configure(struct i2c_client *client, | |||
409 | data->gpio.can_sleep = 1; | 409 | data->gpio.can_sleep = 1; |
410 | data->gpio.base = pdata->gpio_base; | 410 | data->gpio.base = pdata->gpio_base; |
411 | data->gpio.ngpio = data->chip_info->num_leds; | 411 | data->gpio.ngpio = data->chip_info->num_leds; |
412 | data->gpio.dev = &client->dev; | 412 | data->gpio.parent = &client->dev; |
413 | data->gpio.owner = THIS_MODULE; | 413 | data->gpio.owner = THIS_MODULE; |
414 | 414 | ||
415 | err = gpiochip_add(&data->gpio); | 415 | err = gpiochip_add_data(&data->gpio, data); |
416 | if (err) { | 416 | if (err) { |
417 | /* Use data->gpio.dev as a flag for freeing gpiochip */ | 417 | /* Use data->gpio.dev as a flag for freeing gpiochip */ |
418 | data->gpio.dev = NULL; | 418 | data->gpio.parent = NULL; |
419 | dev_warn(&client->dev, "could not add gpiochip\n"); | 419 | dev_warn(&client->dev, "could not add gpiochip\n"); |
420 | } else { | 420 | } else { |
421 | dev_info(&client->dev, "gpios %i...%i\n", | 421 | dev_info(&client->dev, "gpios %i...%i\n", |
diff --git a/drivers/leds/leds-tca6507.c b/drivers/leds/leds-tca6507.c index edbecc4ca2da..c548ea10f0f0 100644 --- a/drivers/leds/leds-tca6507.c +++ b/drivers/leds/leds-tca6507.c | |||
@@ -603,7 +603,7 @@ static int tca6507_blink_set(struct led_classdev *led_cdev, | |||
603 | static void tca6507_gpio_set_value(struct gpio_chip *gc, | 603 | static void tca6507_gpio_set_value(struct gpio_chip *gc, |
604 | unsigned offset, int val) | 604 | unsigned offset, int val) |
605 | { | 605 | { |
606 | struct tca6507_chip *tca = container_of(gc, struct tca6507_chip, gpio); | 606 | struct tca6507_chip *tca = gpiochip_get_data(gc); |
607 | unsigned long flags; | 607 | unsigned long flags; |
608 | 608 | ||
609 | spin_lock_irqsave(&tca->lock, flags); | 609 | spin_lock_irqsave(&tca->lock, flags); |
@@ -651,11 +651,11 @@ static int tca6507_probe_gpios(struct i2c_client *client, | |||
651 | tca->gpio.owner = THIS_MODULE; | 651 | tca->gpio.owner = THIS_MODULE; |
652 | tca->gpio.direction_output = tca6507_gpio_direction_output; | 652 | tca->gpio.direction_output = tca6507_gpio_direction_output; |
653 | tca->gpio.set = tca6507_gpio_set_value; | 653 | tca->gpio.set = tca6507_gpio_set_value; |
654 | tca->gpio.dev = &client->dev; | 654 | tca->gpio.parent = &client->dev; |
655 | #ifdef CONFIG_OF_GPIO | 655 | #ifdef CONFIG_OF_GPIO |
656 | tca->gpio.of_node = of_node_get(client->dev.of_node); | 656 | tca->gpio.of_node = of_node_get(client->dev.of_node); |
657 | #endif | 657 | #endif |
658 | err = gpiochip_add(&tca->gpio); | 658 | err = gpiochip_add_data(&tca->gpio, tca); |
659 | if (err) { | 659 | if (err) { |
660 | tca->gpio.ngpio = 0; | 660 | tca->gpio.ngpio = 0; |
661 | return err; | 661 | return err; |
diff --git a/drivers/media/dvb-frontends/cxd2820r_core.c b/drivers/media/dvb-frontends/cxd2820r_core.c index def6d21d1445..24a457d9d803 100644 --- a/drivers/media/dvb-frontends/cxd2820r_core.c +++ b/drivers/media/dvb-frontends/cxd2820r_core.c | |||
@@ -722,7 +722,7 @@ struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg, | |||
722 | #ifdef CONFIG_GPIOLIB | 722 | #ifdef CONFIG_GPIOLIB |
723 | /* add GPIOs */ | 723 | /* add GPIOs */ |
724 | priv->gpio_chip.label = KBUILD_MODNAME; | 724 | priv->gpio_chip.label = KBUILD_MODNAME; |
725 | priv->gpio_chip.dev = &priv->i2c->dev; | 725 | priv->gpio_chip.parent = &priv->i2c->dev; |
726 | priv->gpio_chip.owner = THIS_MODULE; | 726 | priv->gpio_chip.owner = THIS_MODULE; |
727 | priv->gpio_chip.direction_output = | 727 | priv->gpio_chip.direction_output = |
728 | cxd2820r_gpio_direction_output; | 728 | cxd2820r_gpio_direction_output; |
diff --git a/drivers/mfd/dm355evm_msp.c b/drivers/mfd/dm355evm_msp.c index bf3e0b21b247..ec4438ed2faf 100644 --- a/drivers/mfd/dm355evm_msp.c +++ b/drivers/mfd/dm355evm_msp.c | |||
@@ -259,7 +259,7 @@ static int add_children(struct i2c_client *client) | |||
259 | int i; | 259 | int i; |
260 | 260 | ||
261 | /* GPIO-ish stuff */ | 261 | /* GPIO-ish stuff */ |
262 | dm355evm_msp_gpio.dev = &client->dev; | 262 | dm355evm_msp_gpio.parent = &client->dev; |
263 | status = gpiochip_add(&dm355evm_msp_gpio); | 263 | status = gpiochip_add(&dm355evm_msp_gpio); |
264 | if (status < 0) | 264 | if (status < 0) |
265 | return status; | 265 | return status; |
diff --git a/drivers/mfd/htc-egpio.c b/drivers/mfd/htc-egpio.c index e4f4a31b76d9..c636b5f83cfb 100644 --- a/drivers/mfd/htc-egpio.c +++ b/drivers/mfd/htc-egpio.c | |||
@@ -321,7 +321,7 @@ static int __init egpio_probe(struct platform_device *pdev) | |||
321 | ei->chip[i].dev = &(pdev->dev); | 321 | ei->chip[i].dev = &(pdev->dev); |
322 | chip = &(ei->chip[i].chip); | 322 | chip = &(ei->chip[i].chip); |
323 | chip->label = "htc-egpio"; | 323 | chip->label = "htc-egpio"; |
324 | chip->dev = &pdev->dev; | 324 | chip->parent = &pdev->dev; |
325 | chip->owner = THIS_MODULE; | 325 | chip->owner = THIS_MODULE; |
326 | chip->get = egpio_get; | 326 | chip->get = egpio_get; |
327 | chip->set = egpio_set; | 327 | chip->set = egpio_set; |
diff --git a/drivers/mfd/htc-i2cpld.c b/drivers/mfd/htc-i2cpld.c index 0c6ff727b2ec..bd6b96d07ab8 100644 --- a/drivers/mfd/htc-i2cpld.c +++ b/drivers/mfd/htc-i2cpld.c | |||
@@ -429,7 +429,7 @@ static int htcpld_register_chip_gpio( | |||
429 | /* Setup the GPIO chips */ | 429 | /* Setup the GPIO chips */ |
430 | gpio_chip = &(chip->chip_out); | 430 | gpio_chip = &(chip->chip_out); |
431 | gpio_chip->label = "htcpld-out"; | 431 | gpio_chip->label = "htcpld-out"; |
432 | gpio_chip->dev = dev; | 432 | gpio_chip->parent = dev; |
433 | gpio_chip->owner = THIS_MODULE; | 433 | gpio_chip->owner = THIS_MODULE; |
434 | gpio_chip->get = htcpld_chip_get; | 434 | gpio_chip->get = htcpld_chip_get; |
435 | gpio_chip->set = htcpld_chip_set; | 435 | gpio_chip->set = htcpld_chip_set; |
@@ -440,7 +440,7 @@ static int htcpld_register_chip_gpio( | |||
440 | 440 | ||
441 | gpio_chip = &(chip->chip_in); | 441 | gpio_chip = &(chip->chip_in); |
442 | gpio_chip->label = "htcpld-in"; | 442 | gpio_chip->label = "htcpld-in"; |
443 | gpio_chip->dev = dev; | 443 | gpio_chip->parent = dev; |
444 | gpio_chip->owner = THIS_MODULE; | 444 | gpio_chip->owner = THIS_MODULE; |
445 | gpio_chip->get = htcpld_chip_get; | 445 | gpio_chip->get = htcpld_chip_get; |
446 | gpio_chip->set = NULL; | 446 | gpio_chip->set = NULL; |
diff --git a/drivers/mfd/tps65010.c b/drivers/mfd/tps65010.c index 677a127619d4..83e615ed100a 100644 --- a/drivers/mfd/tps65010.c +++ b/drivers/mfd/tps65010.c | |||
@@ -638,7 +638,7 @@ static int tps65010_probe(struct i2c_client *client, | |||
638 | tps->outmask = board->outmask; | 638 | tps->outmask = board->outmask; |
639 | 639 | ||
640 | tps->chip.label = client->name; | 640 | tps->chip.label = client->name; |
641 | tps->chip.dev = &client->dev; | 641 | tps->chip.parent = &client->dev; |
642 | tps->chip.owner = THIS_MODULE; | 642 | tps->chip.owner = THIS_MODULE; |
643 | 643 | ||
644 | tps->chip.set = tps65010_gpio_set; | 644 | tps->chip.set = tps65010_gpio_set; |
diff --git a/drivers/mfd/ucb1x00-core.c b/drivers/mfd/ucb1x00-core.c index e0dd83fb95d3..bcafe1ecd71c 100644 --- a/drivers/mfd/ucb1x00-core.c +++ b/drivers/mfd/ucb1x00-core.c | |||
@@ -570,7 +570,7 @@ static int ucb1x00_probe(struct mcp *mcp) | |||
570 | 570 | ||
571 | if (pdata && pdata->gpio_base) { | 571 | if (pdata && pdata->gpio_base) { |
572 | ucb->gpio.label = dev_name(&ucb->dev); | 572 | ucb->gpio.label = dev_name(&ucb->dev); |
573 | ucb->gpio.dev = &ucb->dev; | 573 | ucb->gpio.parent = &ucb->dev; |
574 | ucb->gpio.owner = THIS_MODULE; | 574 | ucb->gpio.owner = THIS_MODULE; |
575 | ucb->gpio.base = pdata->gpio_base; | 575 | ucb->gpio.base = pdata->gpio_base; |
576 | ucb->gpio.ngpio = 10; | 576 | ucb->gpio.ngpio = 10; |
diff --git a/drivers/mfd/vexpress-sysreg.c b/drivers/mfd/vexpress-sysreg.c index 3e628df9280c..855c0204f09a 100644 --- a/drivers/mfd/vexpress-sysreg.c +++ b/drivers/mfd/vexpress-sysreg.c | |||
@@ -11,7 +11,7 @@ | |||
11 | * Copyright (C) 2012 ARM Limited | 11 | * Copyright (C) 2012 ARM Limited |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/basic_mmio_gpio.h> | 14 | #include <linux/gpio/driver.h> |
15 | #include <linux/err.h> | 15 | #include <linux/err.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <linux/mfd/core.h> | 17 | #include <linux/mfd/core.h> |
@@ -164,7 +164,7 @@ static int vexpress_sysreg_probe(struct platform_device *pdev) | |||
164 | { | 164 | { |
165 | struct resource *mem; | 165 | struct resource *mem; |
166 | void __iomem *base; | 166 | void __iomem *base; |
167 | struct bgpio_chip *mmc_gpio_chip; | 167 | struct gpio_chip *mmc_gpio_chip; |
168 | int master; | 168 | int master; |
169 | u32 dt_hbi; | 169 | u32 dt_hbi; |
170 | 170 | ||
@@ -201,8 +201,8 @@ static int vexpress_sysreg_probe(struct platform_device *pdev) | |||
201 | return -ENOMEM; | 201 | return -ENOMEM; |
202 | bgpio_init(mmc_gpio_chip, &pdev->dev, 0x4, base + SYS_MCI, | 202 | bgpio_init(mmc_gpio_chip, &pdev->dev, 0x4, base + SYS_MCI, |
203 | NULL, NULL, NULL, NULL, 0); | 203 | NULL, NULL, NULL, NULL, 0); |
204 | mmc_gpio_chip->gc.ngpio = 2; | 204 | mmc_gpio_chip->ngpio = 2; |
205 | gpiochip_add(&mmc_gpio_chip->gc); | 205 | gpiochip_add(mmc_gpio_chip); |
206 | 206 | ||
207 | return mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, | 207 | return mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, |
208 | vexpress_sysreg_cells, | 208 | vexpress_sysreg_cells, |
diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c index 75b0d8c8f058..0f5997ceb494 100644 --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <linux/delay.h> | 23 | #include <linux/delay.h> |
24 | #include <linux/device.h> | 24 | #include <linux/device.h> |
25 | #include <linux/err.h> | 25 | #include <linux/err.h> |
26 | #include <linux/gpio.h> | 26 | #include <linux/gpio/driver.h> |
27 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
28 | #include <linux/io.h> | 28 | #include <linux/io.h> |
29 | #include <linux/irq.h> | 29 | #include <linux/irq.h> |
@@ -337,14 +337,14 @@ static int bcm2835_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
337 | 337 | ||
338 | static int bcm2835_gpio_get(struct gpio_chip *chip, unsigned offset) | 338 | static int bcm2835_gpio_get(struct gpio_chip *chip, unsigned offset) |
339 | { | 339 | { |
340 | struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev); | 340 | struct bcm2835_pinctrl *pc = gpiochip_get_data(chip); |
341 | 341 | ||
342 | return bcm2835_gpio_get_bit(pc, GPLEV0, offset); | 342 | return bcm2835_gpio_get_bit(pc, GPLEV0, offset); |
343 | } | 343 | } |
344 | 344 | ||
345 | static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 345 | static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
346 | { | 346 | { |
347 | struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev); | 347 | struct bcm2835_pinctrl *pc = gpiochip_get_data(chip); |
348 | 348 | ||
349 | bcm2835_gpio_set_bit(pc, value ? GPSET0 : GPCLR0, offset); | 349 | bcm2835_gpio_set_bit(pc, value ? GPSET0 : GPCLR0, offset); |
350 | } | 350 | } |
@@ -358,7 +358,7 @@ static int bcm2835_gpio_direction_output(struct gpio_chip *chip, | |||
358 | 358 | ||
359 | static int bcm2835_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 359 | static int bcm2835_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
360 | { | 360 | { |
361 | struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev); | 361 | struct bcm2835_pinctrl *pc = gpiochip_get_data(chip); |
362 | 362 | ||
363 | return irq_linear_revmap(pc->irq_domain, offset); | 363 | return irq_linear_revmap(pc->irq_domain, offset); |
364 | } | 364 | } |
@@ -964,7 +964,7 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) | |||
964 | return PTR_ERR(pc->base); | 964 | return PTR_ERR(pc->base); |
965 | 965 | ||
966 | pc->gpio_chip = bcm2835_gpio_chip; | 966 | pc->gpio_chip = bcm2835_gpio_chip; |
967 | pc->gpio_chip.dev = dev; | 967 | pc->gpio_chip.parent = dev; |
968 | pc->gpio_chip.of_node = np; | 968 | pc->gpio_chip.of_node = np; |
969 | 969 | ||
970 | pc->irq_domain = irq_domain_add_linear(np, BCM2835_NUM_GPIOS, | 970 | pc->irq_domain = irq_domain_add_linear(np, BCM2835_NUM_GPIOS, |
@@ -1021,7 +1021,7 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) | |||
1021 | } | 1021 | } |
1022 | } | 1022 | } |
1023 | 1023 | ||
1024 | err = gpiochip_add(&pc->gpio_chip); | 1024 | err = gpiochip_add_data(&pc->gpio_chip, pc); |
1025 | if (err) { | 1025 | if (err) { |
1026 | dev_err(dev, "could not add GPIO chip\n"); | 1026 | dev_err(dev, "could not add GPIO chip\n"); |
1027 | return err; | 1027 | return err; |
diff --git a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c index 314591a4609b..3b2ac8f771ed 100644 --- a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c +++ b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | |||
@@ -694,7 +694,7 @@ static int iproc_gpio_probe(struct platform_device *pdev) | |||
694 | gc->ngpio = ngpios; | 694 | gc->ngpio = ngpios; |
695 | chip->num_banks = (ngpios + NGPIOS_PER_BANK - 1) / NGPIOS_PER_BANK; | 695 | chip->num_banks = (ngpios + NGPIOS_PER_BANK - 1) / NGPIOS_PER_BANK; |
696 | gc->label = dev_name(dev); | 696 | gc->label = dev_name(dev); |
697 | gc->dev = dev; | 697 | gc->parent = dev; |
698 | gc->of_node = dev->of_node; | 698 | gc->of_node = dev->of_node; |
699 | gc->request = iproc_gpio_request; | 699 | gc->request = iproc_gpio_request; |
700 | gc->free = iproc_gpio_free; | 700 | gc->free = iproc_gpio_free; |
diff --git a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c index 725c36f917f9..ac900435dc39 100644 --- a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c +++ b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c | |||
@@ -18,7 +18,7 @@ | |||
18 | * through the interaction with the NSP IOMUX controller. | 18 | * through the interaction with the NSP IOMUX controller. |
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <linux/gpio.h> | 21 | #include <linux/gpio/driver.h> |
22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/ioport.h> | 24 | #include <linux/ioport.h> |
@@ -81,11 +81,6 @@ enum base_type { | |||
81 | IO_CTRL | 81 | IO_CTRL |
82 | }; | 82 | }; |
83 | 83 | ||
84 | static inline struct nsp_gpio *to_nsp_gpio(struct gpio_chip *gc) | ||
85 | { | ||
86 | return container_of(gc, struct nsp_gpio, gc); | ||
87 | } | ||
88 | |||
89 | /* | 84 | /* |
90 | * Mapping from PINCONF pins to GPIO pins is 1-to-1 | 85 | * Mapping from PINCONF pins to GPIO pins is 1-to-1 |
91 | */ | 86 | */ |
@@ -297,7 +292,7 @@ static void nsp_gpio_free(struct gpio_chip *gc, unsigned offset) | |||
297 | 292 | ||
298 | static int nsp_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) | 293 | static int nsp_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) |
299 | { | 294 | { |
300 | struct nsp_gpio *chip = to_nsp_gpio(gc); | 295 | struct nsp_gpio *chip = gpiochip_get_data(gc); |
301 | unsigned long flags; | 296 | unsigned long flags; |
302 | 297 | ||
303 | spin_lock_irqsave(&chip->lock, flags); | 298 | spin_lock_irqsave(&chip->lock, flags); |
@@ -311,7 +306,7 @@ static int nsp_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) | |||
311 | static int nsp_gpio_direction_output(struct gpio_chip *gc, unsigned gpio, | 306 | static int nsp_gpio_direction_output(struct gpio_chip *gc, unsigned gpio, |
312 | int val) | 307 | int val) |
313 | { | 308 | { |
314 | struct nsp_gpio *chip = to_nsp_gpio(gc); | 309 | struct nsp_gpio *chip = gpiochip_get_data(gc); |
315 | unsigned long flags; | 310 | unsigned long flags; |
316 | 311 | ||
317 | spin_lock_irqsave(&chip->lock, flags); | 312 | spin_lock_irqsave(&chip->lock, flags); |
@@ -325,7 +320,7 @@ static int nsp_gpio_direction_output(struct gpio_chip *gc, unsigned gpio, | |||
325 | 320 | ||
326 | static void nsp_gpio_set(struct gpio_chip *gc, unsigned gpio, int val) | 321 | static void nsp_gpio_set(struct gpio_chip *gc, unsigned gpio, int val) |
327 | { | 322 | { |
328 | struct nsp_gpio *chip = to_nsp_gpio(gc); | 323 | struct nsp_gpio *chip = gpiochip_get_data(gc); |
329 | unsigned long flags; | 324 | unsigned long flags; |
330 | 325 | ||
331 | spin_lock_irqsave(&chip->lock, flags); | 326 | spin_lock_irqsave(&chip->lock, flags); |
@@ -337,14 +332,14 @@ static void nsp_gpio_set(struct gpio_chip *gc, unsigned gpio, int val) | |||
337 | 332 | ||
338 | static int nsp_gpio_get(struct gpio_chip *gc, unsigned gpio) | 333 | static int nsp_gpio_get(struct gpio_chip *gc, unsigned gpio) |
339 | { | 334 | { |
340 | struct nsp_gpio *chip = to_nsp_gpio(gc); | 335 | struct nsp_gpio *chip = gpiochip_get_data(gc); |
341 | 336 | ||
342 | return !!(readl(chip->base + NSP_GPIO_DATA_IN) & BIT(gpio)); | 337 | return !!(readl(chip->base + NSP_GPIO_DATA_IN) & BIT(gpio)); |
343 | } | 338 | } |
344 | 339 | ||
345 | static int nsp_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 340 | static int nsp_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
346 | { | 341 | { |
347 | struct nsp_gpio *chip = to_nsp_gpio(gc); | 342 | struct nsp_gpio *chip = gpiochip_get_data(gc); |
348 | 343 | ||
349 | return irq_linear_revmap(chip->irq_domain, offset); | 344 | return irq_linear_revmap(chip->irq_domain, offset); |
350 | } | 345 | } |
@@ -669,7 +664,7 @@ static int nsp_gpio_probe(struct platform_device *pdev) | |||
669 | gc->can_sleep = false; | 664 | gc->can_sleep = false; |
670 | gc->ngpio = val; | 665 | gc->ngpio = val; |
671 | gc->label = dev_name(dev); | 666 | gc->label = dev_name(dev); |
672 | gc->dev = dev; | 667 | gc->parent = dev; |
673 | gc->of_node = dev->of_node; | 668 | gc->of_node = dev->of_node; |
674 | gc->request = nsp_gpio_request; | 669 | gc->request = nsp_gpio_request; |
675 | gc->free = nsp_gpio_free; | 670 | gc->free = nsp_gpio_free; |
@@ -714,7 +709,7 @@ static int nsp_gpio_probe(struct platform_device *pdev) | |||
714 | writel(val, (chip->base + NSP_CHIP_A_INT_MASK)); | 709 | writel(val, (chip->base + NSP_CHIP_A_INT_MASK)); |
715 | } | 710 | } |
716 | 711 | ||
717 | ret = gpiochip_add(gc); | 712 | ret = gpiochip_add_data(gc, chip); |
718 | if (ret < 0) { | 713 | if (ret < 0) { |
719 | dev_err(dev, "unable to add GPIO chip\n"); | 714 | dev_err(dev, "unable to add GPIO chip\n"); |
720 | return ret; | 715 | return ret; |
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index b59ce75b1947..21b79a446d5a 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c | |||
@@ -20,7 +20,7 @@ | |||
20 | #include <linux/types.h> | 20 | #include <linux/types.h> |
21 | #include <linux/bitops.h> | 21 | #include <linux/bitops.h> |
22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
23 | #include <linux/gpio.h> | 23 | #include <linux/gpio/driver.h> |
24 | #include <linux/acpi.h> | 24 | #include <linux/acpi.h> |
25 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
26 | #include <linux/seq_file.h> | 26 | #include <linux/seq_file.h> |
@@ -147,12 +147,10 @@ struct byt_gpio { | |||
147 | struct byt_gpio_pin_context *saved_context; | 147 | struct byt_gpio_pin_context *saved_context; |
148 | }; | 148 | }; |
149 | 149 | ||
150 | #define to_byt_gpio(c) container_of(c, struct byt_gpio, chip) | ||
151 | |||
152 | static void __iomem *byt_gpio_reg(struct gpio_chip *chip, unsigned offset, | 150 | static void __iomem *byt_gpio_reg(struct gpio_chip *chip, unsigned offset, |
153 | int reg) | 151 | int reg) |
154 | { | 152 | { |
155 | struct byt_gpio *vg = to_byt_gpio(chip); | 153 | struct byt_gpio *vg = gpiochip_get_data(chip); |
156 | u32 reg_offset; | 154 | u32 reg_offset; |
157 | 155 | ||
158 | if (reg == BYT_INT_STAT_REG) | 156 | if (reg == BYT_INT_STAT_REG) |
@@ -193,7 +191,7 @@ static u32 byt_get_gpio_mux(struct byt_gpio *vg, unsigned offset) | |||
193 | 191 | ||
194 | static int byt_gpio_request(struct gpio_chip *chip, unsigned offset) | 192 | static int byt_gpio_request(struct gpio_chip *chip, unsigned offset) |
195 | { | 193 | { |
196 | struct byt_gpio *vg = to_byt_gpio(chip); | 194 | struct byt_gpio *vg = gpiochip_get_data(chip); |
197 | void __iomem *reg = byt_gpio_reg(chip, offset, BYT_CONF0_REG); | 195 | void __iomem *reg = byt_gpio_reg(chip, offset, BYT_CONF0_REG); |
198 | u32 value, gpio_mux; | 196 | u32 value, gpio_mux; |
199 | unsigned long flags; | 197 | unsigned long flags; |
@@ -229,7 +227,7 @@ static int byt_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
229 | 227 | ||
230 | static void byt_gpio_free(struct gpio_chip *chip, unsigned offset) | 228 | static void byt_gpio_free(struct gpio_chip *chip, unsigned offset) |
231 | { | 229 | { |
232 | struct byt_gpio *vg = to_byt_gpio(chip); | 230 | struct byt_gpio *vg = gpiochip_get_data(chip); |
233 | 231 | ||
234 | byt_gpio_clear_triggering(vg, offset); | 232 | byt_gpio_clear_triggering(vg, offset); |
235 | pm_runtime_put(&vg->pdev->dev); | 233 | pm_runtime_put(&vg->pdev->dev); |
@@ -237,7 +235,7 @@ static void byt_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
237 | 235 | ||
238 | static int byt_irq_type(struct irq_data *d, unsigned type) | 236 | static int byt_irq_type(struct irq_data *d, unsigned type) |
239 | { | 237 | { |
240 | struct byt_gpio *vg = to_byt_gpio(irq_data_get_irq_chip_data(d)); | 238 | struct byt_gpio *vg = gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
241 | u32 offset = irqd_to_hwirq(d); | 239 | u32 offset = irqd_to_hwirq(d); |
242 | u32 value; | 240 | u32 value; |
243 | unsigned long flags; | 241 | unsigned long flags; |
@@ -273,7 +271,7 @@ static int byt_irq_type(struct irq_data *d, unsigned type) | |||
273 | static int byt_gpio_get(struct gpio_chip *chip, unsigned offset) | 271 | static int byt_gpio_get(struct gpio_chip *chip, unsigned offset) |
274 | { | 272 | { |
275 | void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG); | 273 | void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG); |
276 | struct byt_gpio *vg = to_byt_gpio(chip); | 274 | struct byt_gpio *vg = gpiochip_get_data(chip); |
277 | unsigned long flags; | 275 | unsigned long flags; |
278 | u32 val; | 276 | u32 val; |
279 | 277 | ||
@@ -281,12 +279,12 @@ static int byt_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
281 | val = readl(reg); | 279 | val = readl(reg); |
282 | raw_spin_unlock_irqrestore(&vg->lock, flags); | 280 | raw_spin_unlock_irqrestore(&vg->lock, flags); |
283 | 281 | ||
284 | return val & BYT_LEVEL; | 282 | return !!(val & BYT_LEVEL); |
285 | } | 283 | } |
286 | 284 | ||
287 | static void byt_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 285 | static void byt_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
288 | { | 286 | { |
289 | struct byt_gpio *vg = to_byt_gpio(chip); | 287 | struct byt_gpio *vg = gpiochip_get_data(chip); |
290 | void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG); | 288 | void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG); |
291 | unsigned long flags; | 289 | unsigned long flags; |
292 | u32 old_val; | 290 | u32 old_val; |
@@ -305,7 +303,7 @@ static void byt_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
305 | 303 | ||
306 | static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 304 | static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
307 | { | 305 | { |
308 | struct byt_gpio *vg = to_byt_gpio(chip); | 306 | struct byt_gpio *vg = gpiochip_get_data(chip); |
309 | void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG); | 307 | void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG); |
310 | unsigned long flags; | 308 | unsigned long flags; |
311 | u32 value; | 309 | u32 value; |
@@ -324,7 +322,7 @@ static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
324 | static int byt_gpio_direction_output(struct gpio_chip *chip, | 322 | static int byt_gpio_direction_output(struct gpio_chip *chip, |
325 | unsigned gpio, int value) | 323 | unsigned gpio, int value) |
326 | { | 324 | { |
327 | struct byt_gpio *vg = to_byt_gpio(chip); | 325 | struct byt_gpio *vg = gpiochip_get_data(chip); |
328 | void __iomem *conf_reg = byt_gpio_reg(chip, gpio, BYT_CONF0_REG); | 326 | void __iomem *conf_reg = byt_gpio_reg(chip, gpio, BYT_CONF0_REG); |
329 | void __iomem *reg = byt_gpio_reg(chip, gpio, BYT_VAL_REG); | 327 | void __iomem *reg = byt_gpio_reg(chip, gpio, BYT_VAL_REG); |
330 | unsigned long flags; | 328 | unsigned long flags; |
@@ -356,7 +354,7 @@ static int byt_gpio_direction_output(struct gpio_chip *chip, | |||
356 | 354 | ||
357 | static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | 355 | static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
358 | { | 356 | { |
359 | struct byt_gpio *vg = to_byt_gpio(chip); | 357 | struct byt_gpio *vg = gpiochip_get_data(chip); |
360 | int i; | 358 | int i; |
361 | u32 conf0, val, offs; | 359 | u32 conf0, val, offs; |
362 | 360 | ||
@@ -428,7 +426,7 @@ static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | |||
428 | static void byt_gpio_irq_handler(struct irq_desc *desc) | 426 | static void byt_gpio_irq_handler(struct irq_desc *desc) |
429 | { | 427 | { |
430 | struct irq_data *data = irq_desc_get_irq_data(desc); | 428 | struct irq_data *data = irq_desc_get_irq_data(desc); |
431 | struct byt_gpio *vg = to_byt_gpio(irq_desc_get_handler_data(desc)); | 429 | struct byt_gpio *vg = gpiochip_get_data(irq_desc_get_handler_data(desc)); |
432 | struct irq_chip *chip = irq_data_get_irq_chip(data); | 430 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
433 | u32 base, pin; | 431 | u32 base, pin; |
434 | void __iomem *reg; | 432 | void __iomem *reg; |
@@ -450,7 +448,7 @@ static void byt_gpio_irq_handler(struct irq_desc *desc) | |||
450 | static void byt_irq_ack(struct irq_data *d) | 448 | static void byt_irq_ack(struct irq_data *d) |
451 | { | 449 | { |
452 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 450 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
453 | struct byt_gpio *vg = to_byt_gpio(gc); | 451 | struct byt_gpio *vg = gpiochip_get_data(gc); |
454 | unsigned offset = irqd_to_hwirq(d); | 452 | unsigned offset = irqd_to_hwirq(d); |
455 | void __iomem *reg; | 453 | void __iomem *reg; |
456 | 454 | ||
@@ -463,7 +461,7 @@ static void byt_irq_ack(struct irq_data *d) | |||
463 | static void byt_irq_unmask(struct irq_data *d) | 461 | static void byt_irq_unmask(struct irq_data *d) |
464 | { | 462 | { |
465 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 463 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
466 | struct byt_gpio *vg = to_byt_gpio(gc); | 464 | struct byt_gpio *vg = gpiochip_get_data(gc); |
467 | unsigned offset = irqd_to_hwirq(d); | 465 | unsigned offset = irqd_to_hwirq(d); |
468 | unsigned long flags; | 466 | unsigned long flags; |
469 | void __iomem *reg; | 467 | void __iomem *reg; |
@@ -498,7 +496,7 @@ static void byt_irq_unmask(struct irq_data *d) | |||
498 | static void byt_irq_mask(struct irq_data *d) | 496 | static void byt_irq_mask(struct irq_data *d) |
499 | { | 497 | { |
500 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 498 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
501 | struct byt_gpio *vg = to_byt_gpio(gc); | 499 | struct byt_gpio *vg = gpiochip_get_data(gc); |
502 | 500 | ||
503 | byt_gpio_clear_triggering(vg, irqd_to_hwirq(d)); | 501 | byt_gpio_clear_triggering(vg, irqd_to_hwirq(d)); |
504 | } | 502 | } |
@@ -598,14 +596,14 @@ static int byt_gpio_probe(struct platform_device *pdev) | |||
598 | gc->dbg_show = byt_gpio_dbg_show; | 596 | gc->dbg_show = byt_gpio_dbg_show; |
599 | gc->base = -1; | 597 | gc->base = -1; |
600 | gc->can_sleep = false; | 598 | gc->can_sleep = false; |
601 | gc->dev = dev; | 599 | gc->parent = dev; |
602 | 600 | ||
603 | #ifdef CONFIG_PM_SLEEP | 601 | #ifdef CONFIG_PM_SLEEP |
604 | vg->saved_context = devm_kcalloc(&pdev->dev, gc->ngpio, | 602 | vg->saved_context = devm_kcalloc(&pdev->dev, gc->ngpio, |
605 | sizeof(*vg->saved_context), GFP_KERNEL); | 603 | sizeof(*vg->saved_context), GFP_KERNEL); |
606 | #endif | 604 | #endif |
607 | 605 | ||
608 | ret = gpiochip_add(gc); | 606 | ret = gpiochip_add_data(gc, vg); |
609 | if (ret) { | 607 | if (ret) { |
610 | dev_err(&pdev->dev, "failed adding byt-gpio chip\n"); | 608 | dev_err(&pdev->dev, "failed adding byt-gpio chip\n"); |
611 | return ret; | 609 | return ret; |
diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 84936bae6e5e..4251e0747a3a 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c | |||
@@ -181,8 +181,6 @@ struct chv_pinctrl { | |||
181 | struct chv_pin_context *saved_pin_context; | 181 | struct chv_pin_context *saved_pin_context; |
182 | }; | 182 | }; |
183 | 183 | ||
184 | #define gpiochip_to_pinctrl(c) container_of(c, struct chv_pinctrl, chip) | ||
185 | |||
186 | #define ALTERNATE_FUNCTION(p, m, i) \ | 184 | #define ALTERNATE_FUNCTION(p, m, i) \ |
187 | { \ | 185 | { \ |
188 | .pin = (p), \ | 186 | .pin = (p), \ |
@@ -1157,7 +1155,7 @@ static unsigned chv_gpio_offset_to_pin(struct chv_pinctrl *pctrl, | |||
1157 | 1155 | ||
1158 | static int chv_gpio_get(struct gpio_chip *chip, unsigned offset) | 1156 | static int chv_gpio_get(struct gpio_chip *chip, unsigned offset) |
1159 | { | 1157 | { |
1160 | struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(chip); | 1158 | struct chv_pinctrl *pctrl = gpiochip_get_data(chip); |
1161 | int pin = chv_gpio_offset_to_pin(pctrl, offset); | 1159 | int pin = chv_gpio_offset_to_pin(pctrl, offset); |
1162 | unsigned long flags; | 1160 | unsigned long flags; |
1163 | u32 ctrl0, cfg; | 1161 | u32 ctrl0, cfg; |
@@ -1176,7 +1174,7 @@ static int chv_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
1176 | 1174 | ||
1177 | static void chv_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 1175 | static void chv_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
1178 | { | 1176 | { |
1179 | struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(chip); | 1177 | struct chv_pinctrl *pctrl = gpiochip_get_data(chip); |
1180 | unsigned pin = chv_gpio_offset_to_pin(pctrl, offset); | 1178 | unsigned pin = chv_gpio_offset_to_pin(pctrl, offset); |
1181 | unsigned long flags; | 1179 | unsigned long flags; |
1182 | void __iomem *reg; | 1180 | void __iomem *reg; |
@@ -1199,7 +1197,7 @@ static void chv_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
1199 | 1197 | ||
1200 | static int chv_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | 1198 | static int chv_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
1201 | { | 1199 | { |
1202 | struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(chip); | 1200 | struct chv_pinctrl *pctrl = gpiochip_get_data(chip); |
1203 | unsigned pin = chv_gpio_offset_to_pin(pctrl, offset); | 1201 | unsigned pin = chv_gpio_offset_to_pin(pctrl, offset); |
1204 | u32 ctrl0, direction; | 1202 | u32 ctrl0, direction; |
1205 | unsigned long flags; | 1203 | unsigned long flags; |
@@ -1240,7 +1238,7 @@ static const struct gpio_chip chv_gpio_chip = { | |||
1240 | static void chv_gpio_irq_ack(struct irq_data *d) | 1238 | static void chv_gpio_irq_ack(struct irq_data *d) |
1241 | { | 1239 | { |
1242 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 1240 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
1243 | struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(gc); | 1241 | struct chv_pinctrl *pctrl = gpiochip_get_data(gc); |
1244 | int pin = chv_gpio_offset_to_pin(pctrl, irqd_to_hwirq(d)); | 1242 | int pin = chv_gpio_offset_to_pin(pctrl, irqd_to_hwirq(d)); |
1245 | u32 intr_line; | 1243 | u32 intr_line; |
1246 | 1244 | ||
@@ -1257,7 +1255,7 @@ static void chv_gpio_irq_ack(struct irq_data *d) | |||
1257 | static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask) | 1255 | static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask) |
1258 | { | 1256 | { |
1259 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 1257 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
1260 | struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(gc); | 1258 | struct chv_pinctrl *pctrl = gpiochip_get_data(gc); |
1261 | int pin = chv_gpio_offset_to_pin(pctrl, irqd_to_hwirq(d)); | 1259 | int pin = chv_gpio_offset_to_pin(pctrl, irqd_to_hwirq(d)); |
1262 | u32 value, intr_line; | 1260 | u32 value, intr_line; |
1263 | unsigned long flags; | 1261 | unsigned long flags; |
@@ -1302,7 +1300,7 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) | |||
1302 | */ | 1300 | */ |
1303 | if (irqd_get_trigger_type(d) == IRQ_TYPE_NONE) { | 1301 | if (irqd_get_trigger_type(d) == IRQ_TYPE_NONE) { |
1304 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 1302 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
1305 | struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(gc); | 1303 | struct chv_pinctrl *pctrl = gpiochip_get_data(gc); |
1306 | unsigned offset = irqd_to_hwirq(d); | 1304 | unsigned offset = irqd_to_hwirq(d); |
1307 | int pin = chv_gpio_offset_to_pin(pctrl, offset); | 1305 | int pin = chv_gpio_offset_to_pin(pctrl, offset); |
1308 | irq_flow_handler_t handler; | 1306 | irq_flow_handler_t handler; |
@@ -1334,7 +1332,7 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) | |||
1334 | static int chv_gpio_irq_type(struct irq_data *d, unsigned type) | 1332 | static int chv_gpio_irq_type(struct irq_data *d, unsigned type) |
1335 | { | 1333 | { |
1336 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 1334 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
1337 | struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(gc); | 1335 | struct chv_pinctrl *pctrl = gpiochip_get_data(gc); |
1338 | unsigned offset = irqd_to_hwirq(d); | 1336 | unsigned offset = irqd_to_hwirq(d); |
1339 | int pin = chv_gpio_offset_to_pin(pctrl, offset); | 1337 | int pin = chv_gpio_offset_to_pin(pctrl, offset); |
1340 | unsigned long flags; | 1338 | unsigned long flags; |
@@ -1407,7 +1405,7 @@ static struct irq_chip chv_gpio_irqchip = { | |||
1407 | static void chv_gpio_irq_handler(struct irq_desc *desc) | 1405 | static void chv_gpio_irq_handler(struct irq_desc *desc) |
1408 | { | 1406 | { |
1409 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 1407 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
1410 | struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(gc); | 1408 | struct chv_pinctrl *pctrl = gpiochip_get_data(gc); |
1411 | struct irq_chip *chip = irq_desc_get_chip(desc); | 1409 | struct irq_chip *chip = irq_desc_get_chip(desc); |
1412 | unsigned long pending; | 1410 | unsigned long pending; |
1413 | u32 intr_line; | 1411 | u32 intr_line; |
@@ -1436,10 +1434,10 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) | |||
1436 | 1434 | ||
1437 | chip->ngpio = pctrl->community->ngpios; | 1435 | chip->ngpio = pctrl->community->ngpios; |
1438 | chip->label = dev_name(pctrl->dev); | 1436 | chip->label = dev_name(pctrl->dev); |
1439 | chip->dev = pctrl->dev; | 1437 | chip->parent = pctrl->dev; |
1440 | chip->base = -1; | 1438 | chip->base = -1; |
1441 | 1439 | ||
1442 | ret = gpiochip_add(chip); | 1440 | ret = gpiochip_add_data(chip, pctrl); |
1443 | if (ret) { | 1441 | if (ret) { |
1444 | dev_err(pctrl->dev, "Failed to register gpiochip\n"); | 1442 | dev_err(pctrl->dev, "Failed to register gpiochip\n"); |
1445 | return ret; | 1443 | return ret; |
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 26f6b6ffea5b..c0f5586218c4 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c | |||
@@ -103,7 +103,6 @@ struct intel_pinctrl { | |||
103 | struct intel_pinctrl_context context; | 103 | struct intel_pinctrl_context context; |
104 | }; | 104 | }; |
105 | 105 | ||
106 | #define gpiochip_to_pinctrl(c) container_of(c, struct intel_pinctrl, chip) | ||
107 | #define pin_to_padno(c, p) ((p) - (c)->pin_base) | 106 | #define pin_to_padno(c, p) ((p) - (c)->pin_base) |
108 | 107 | ||
109 | static struct intel_community *intel_get_community(struct intel_pinctrl *pctrl, | 108 | static struct intel_community *intel_get_community(struct intel_pinctrl *pctrl, |
@@ -596,7 +595,7 @@ static const struct pinctrl_desc intel_pinctrl_desc = { | |||
596 | 595 | ||
597 | static int intel_gpio_get(struct gpio_chip *chip, unsigned offset) | 596 | static int intel_gpio_get(struct gpio_chip *chip, unsigned offset) |
598 | { | 597 | { |
599 | struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(chip); | 598 | struct intel_pinctrl *pctrl = gpiochip_get_data(chip); |
600 | void __iomem *reg; | 599 | void __iomem *reg; |
601 | 600 | ||
602 | reg = intel_get_padcfg(pctrl, offset, PADCFG0); | 601 | reg = intel_get_padcfg(pctrl, offset, PADCFG0); |
@@ -608,7 +607,7 @@ static int intel_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
608 | 607 | ||
609 | static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 608 | static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
610 | { | 609 | { |
611 | struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(chip); | 610 | struct intel_pinctrl *pctrl = gpiochip_get_data(chip); |
612 | void __iomem *reg; | 611 | void __iomem *reg; |
613 | 612 | ||
614 | reg = intel_get_padcfg(pctrl, offset, PADCFG0); | 613 | reg = intel_get_padcfg(pctrl, offset, PADCFG0); |
@@ -652,7 +651,7 @@ static const struct gpio_chip intel_gpio_chip = { | |||
652 | static void intel_gpio_irq_ack(struct irq_data *d) | 651 | static void intel_gpio_irq_ack(struct irq_data *d) |
653 | { | 652 | { |
654 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 653 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
655 | struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc); | 654 | struct intel_pinctrl *pctrl = gpiochip_get_data(gc); |
656 | const struct intel_community *community; | 655 | const struct intel_community *community; |
657 | unsigned pin = irqd_to_hwirq(d); | 656 | unsigned pin = irqd_to_hwirq(d); |
658 | 657 | ||
@@ -673,7 +672,7 @@ static void intel_gpio_irq_ack(struct irq_data *d) | |||
673 | static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask) | 672 | static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask) |
674 | { | 673 | { |
675 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 674 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
676 | struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc); | 675 | struct intel_pinctrl *pctrl = gpiochip_get_data(gc); |
677 | const struct intel_community *community; | 676 | const struct intel_community *community; |
678 | unsigned pin = irqd_to_hwirq(d); | 677 | unsigned pin = irqd_to_hwirq(d); |
679 | unsigned long flags; | 678 | unsigned long flags; |
@@ -713,7 +712,7 @@ static void intel_gpio_irq_unmask(struct irq_data *d) | |||
713 | static int intel_gpio_irq_type(struct irq_data *d, unsigned type) | 712 | static int intel_gpio_irq_type(struct irq_data *d, unsigned type) |
714 | { | 713 | { |
715 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 714 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
716 | struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc); | 715 | struct intel_pinctrl *pctrl = gpiochip_get_data(gc); |
717 | unsigned pin = irqd_to_hwirq(d); | 716 | unsigned pin = irqd_to_hwirq(d); |
718 | unsigned long flags; | 717 | unsigned long flags; |
719 | void __iomem *reg; | 718 | void __iomem *reg; |
@@ -767,7 +766,7 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned type) | |||
767 | static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on) | 766 | static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on) |
768 | { | 767 | { |
769 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 768 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
770 | struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc); | 769 | struct intel_pinctrl *pctrl = gpiochip_get_data(gc); |
771 | const struct intel_community *community; | 770 | const struct intel_community *community; |
772 | unsigned pin = irqd_to_hwirq(d); | 771 | unsigned pin = irqd_to_hwirq(d); |
773 | unsigned padno, gpp, gpp_offset; | 772 | unsigned padno, gpp, gpp_offset; |
@@ -872,10 +871,10 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq) | |||
872 | 871 | ||
873 | pctrl->chip.ngpio = pctrl->soc->npins; | 872 | pctrl->chip.ngpio = pctrl->soc->npins; |
874 | pctrl->chip.label = dev_name(pctrl->dev); | 873 | pctrl->chip.label = dev_name(pctrl->dev); |
875 | pctrl->chip.dev = pctrl->dev; | 874 | pctrl->chip.parent = pctrl->dev; |
876 | pctrl->chip.base = -1; | 875 | pctrl->chip.base = -1; |
877 | 876 | ||
878 | ret = gpiochip_add(&pctrl->chip); | 877 | ret = gpiochip_add_data(&pctrl->chip, pctrl); |
879 | if (ret) { | 878 | if (ret) { |
880 | dev_err(pctrl->dev, "failed to register gpiochip\n"); | 879 | dev_err(pctrl->dev, "failed to register gpiochip\n"); |
881 | return ret; | 880 | return ret; |
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index e22cbaf9f9cf..16d48a4ed225 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c | |||
@@ -14,7 +14,7 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio/driver.h> |
18 | #include <linux/module.h> | 18 | #include <linux/module.h> |
19 | #include <linux/of.h> | 19 | #include <linux/of.h> |
20 | #include <linux/of_address.h> | 20 | #include <linux/of_address.h> |
@@ -95,7 +95,7 @@ static void mtk_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
95 | { | 95 | { |
96 | unsigned int reg_addr; | 96 | unsigned int reg_addr; |
97 | unsigned int bit; | 97 | unsigned int bit; |
98 | struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev); | 98 | struct mtk_pinctrl *pctl = gpiochip_get_data(chip); |
99 | 99 | ||
100 | reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dout_offset; | 100 | reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dout_offset; |
101 | bit = BIT(offset & 0xf); | 101 | bit = BIT(offset & 0xf); |
@@ -750,7 +750,7 @@ static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | |||
750 | unsigned int bit; | 750 | unsigned int bit; |
751 | unsigned int read_val = 0; | 751 | unsigned int read_val = 0; |
752 | 752 | ||
753 | struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev); | 753 | struct mtk_pinctrl *pctl = gpiochip_get_data(chip); |
754 | 754 | ||
755 | reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset; | 755 | reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset; |
756 | bit = BIT(offset & 0xf); | 756 | bit = BIT(offset & 0xf); |
@@ -763,7 +763,7 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
763 | unsigned int reg_addr; | 763 | unsigned int reg_addr; |
764 | unsigned int bit; | 764 | unsigned int bit; |
765 | unsigned int read_val = 0; | 765 | unsigned int read_val = 0; |
766 | struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev); | 766 | struct mtk_pinctrl *pctl = gpiochip_get_data(chip); |
767 | 767 | ||
768 | reg_addr = mtk_get_port(pctl, offset) + | 768 | reg_addr = mtk_get_port(pctl, offset) + |
769 | pctl->devdata->din_offset; | 769 | pctl->devdata->din_offset; |
@@ -776,7 +776,7 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
776 | static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 776 | static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
777 | { | 777 | { |
778 | const struct mtk_desc_pin *pin; | 778 | const struct mtk_desc_pin *pin; |
779 | struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev); | 779 | struct mtk_pinctrl *pctl = gpiochip_get_data(chip); |
780 | int irq; | 780 | int irq; |
781 | 781 | ||
782 | pin = pctl->devdata->pins + offset; | 782 | pin = pctl->devdata->pins + offset; |
@@ -944,7 +944,7 @@ static void mtk_eint_unmask(struct irq_data *d) | |||
944 | static int mtk_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, | 944 | static int mtk_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, |
945 | unsigned debounce) | 945 | unsigned debounce) |
946 | { | 946 | { |
947 | struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev); | 947 | struct mtk_pinctrl *pctl = dev_get_drvdata(chip->parent); |
948 | int eint_num, virq, eint_offset; | 948 | int eint_num, virq, eint_offset; |
949 | unsigned int set_offset, bit, clr_bit, clr_offset, rst, i, unmask, dbnc; | 949 | unsigned int set_offset, bit, clr_bit, clr_offset, rst, i, unmask, dbnc; |
950 | static const unsigned int dbnc_arr[] = {0 , 1, 16, 32, 64, 128, 256}; | 950 | static const unsigned int dbnc_arr[] = {0 , 1, 16, 32, 64, 128, 256}; |
@@ -1353,10 +1353,10 @@ int mtk_pctrl_init(struct platform_device *pdev, | |||
1353 | *pctl->chip = mtk_gpio_chip; | 1353 | *pctl->chip = mtk_gpio_chip; |
1354 | pctl->chip->ngpio = pctl->devdata->npins; | 1354 | pctl->chip->ngpio = pctl->devdata->npins; |
1355 | pctl->chip->label = dev_name(&pdev->dev); | 1355 | pctl->chip->label = dev_name(&pdev->dev); |
1356 | pctl->chip->dev = &pdev->dev; | 1356 | pctl->chip->parent = &pdev->dev; |
1357 | pctl->chip->base = -1; | 1357 | pctl->chip->base = -1; |
1358 | 1358 | ||
1359 | ret = gpiochip_add(pctl->chip); | 1359 | ret = gpiochip_add_data(pctl->chip, pctl); |
1360 | if (ret) { | 1360 | if (ret) { |
1361 | ret = -EINVAL; | 1361 | ret = -EINVAL; |
1362 | goto pctrl_error; | 1362 | goto pctrl_error; |
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 84943e4cff09..50cab27c64d4 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c | |||
@@ -448,11 +448,6 @@ static const struct pinconf_ops meson_pinconf_ops = { | |||
448 | .is_generic = true, | 448 | .is_generic = true, |
449 | }; | 449 | }; |
450 | 450 | ||
451 | static inline struct meson_domain *to_meson_domain(struct gpio_chip *chip) | ||
452 | { | ||
453 | return container_of(chip, struct meson_domain, chip); | ||
454 | } | ||
455 | |||
456 | static int meson_gpio_request(struct gpio_chip *chip, unsigned gpio) | 451 | static int meson_gpio_request(struct gpio_chip *chip, unsigned gpio) |
457 | { | 452 | { |
458 | return pinctrl_request_gpio(chip->base + gpio); | 453 | return pinctrl_request_gpio(chip->base + gpio); |
@@ -460,14 +455,14 @@ static int meson_gpio_request(struct gpio_chip *chip, unsigned gpio) | |||
460 | 455 | ||
461 | static void meson_gpio_free(struct gpio_chip *chip, unsigned gpio) | 456 | static void meson_gpio_free(struct gpio_chip *chip, unsigned gpio) |
462 | { | 457 | { |
463 | struct meson_domain *domain = to_meson_domain(chip); | 458 | struct meson_domain *domain = gpiochip_get_data(chip); |
464 | 459 | ||
465 | pinctrl_free_gpio(domain->data->pin_base + gpio); | 460 | pinctrl_free_gpio(domain->data->pin_base + gpio); |
466 | } | 461 | } |
467 | 462 | ||
468 | static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | 463 | static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) |
469 | { | 464 | { |
470 | struct meson_domain *domain = to_meson_domain(chip); | 465 | struct meson_domain *domain = gpiochip_get_data(chip); |
471 | unsigned int reg, bit, pin; | 466 | unsigned int reg, bit, pin; |
472 | struct meson_bank *bank; | 467 | struct meson_bank *bank; |
473 | int ret; | 468 | int ret; |
@@ -485,7 +480,7 @@ static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | |||
485 | static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, | 480 | static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, |
486 | int value) | 481 | int value) |
487 | { | 482 | { |
488 | struct meson_domain *domain = to_meson_domain(chip); | 483 | struct meson_domain *domain = gpiochip_get_data(chip); |
489 | unsigned int reg, bit, pin; | 484 | unsigned int reg, bit, pin; |
490 | struct meson_bank *bank; | 485 | struct meson_bank *bank; |
491 | int ret; | 486 | int ret; |
@@ -507,7 +502,7 @@ static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, | |||
507 | 502 | ||
508 | static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value) | 503 | static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value) |
509 | { | 504 | { |
510 | struct meson_domain *domain = to_meson_domain(chip); | 505 | struct meson_domain *domain = gpiochip_get_data(chip); |
511 | unsigned int reg, bit, pin; | 506 | unsigned int reg, bit, pin; |
512 | struct meson_bank *bank; | 507 | struct meson_bank *bank; |
513 | int ret; | 508 | int ret; |
@@ -524,7 +519,7 @@ static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value) | |||
524 | 519 | ||
525 | static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio) | 520 | static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio) |
526 | { | 521 | { |
527 | struct meson_domain *domain = to_meson_domain(chip); | 522 | struct meson_domain *domain = gpiochip_get_data(chip); |
528 | unsigned int reg, bit, val, pin; | 523 | unsigned int reg, bit, val, pin; |
529 | struct meson_bank *bank; | 524 | struct meson_bank *bank; |
530 | int ret; | 525 | int ret; |
@@ -562,7 +557,7 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc) | |||
562 | domain = &pc->domains[i]; | 557 | domain = &pc->domains[i]; |
563 | 558 | ||
564 | domain->chip.label = domain->data->name; | 559 | domain->chip.label = domain->data->name; |
565 | domain->chip.dev = pc->dev; | 560 | domain->chip.parent = pc->dev; |
566 | domain->chip.request = meson_gpio_request; | 561 | domain->chip.request = meson_gpio_request; |
567 | domain->chip.free = meson_gpio_free; | 562 | domain->chip.free = meson_gpio_free; |
568 | domain->chip.direction_input = meson_gpio_direction_input; | 563 | domain->chip.direction_input = meson_gpio_direction_input; |
@@ -575,7 +570,7 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc) | |||
575 | domain->chip.of_node = domain->of_node; | 570 | domain->chip.of_node = domain->of_node; |
576 | domain->chip.of_gpio_n_cells = 2; | 571 | domain->chip.of_gpio_n_cells = 2; |
577 | 572 | ||
578 | ret = gpiochip_add(&domain->chip); | 573 | ret = gpiochip_add_data(&domain->chip, domain); |
579 | if (ret) { | 574 | if (ret) { |
580 | dev_err(pc->dev, "can't add gpio chip %s\n", | 575 | dev_err(pc->dev, "can't add gpio chip %s\n", |
581 | domain->data->name); | 576 | domain->data->name); |
diff --git a/drivers/pinctrl/nomadik/pinctrl-abx500.c b/drivers/pinctrl/nomadik/pinctrl-abx500.c index b59fbb4b1fb1..085e60106ec2 100644 --- a/drivers/pinctrl/nomadik/pinctrl-abx500.c +++ b/drivers/pinctrl/nomadik/pinctrl-abx500.c | |||
@@ -109,19 +109,10 @@ struct abx500_pinctrl { | |||
109 | int irq_cluster_size; | 109 | int irq_cluster_size; |
110 | }; | 110 | }; |
111 | 111 | ||
112 | /** | ||
113 | * to_abx500_pinctrl() - get the pointer to abx500_pinctrl | ||
114 | * @chip: Member of the structure abx500_pinctrl | ||
115 | */ | ||
116 | static inline struct abx500_pinctrl *to_abx500_pinctrl(struct gpio_chip *chip) | ||
117 | { | ||
118 | return container_of(chip, struct abx500_pinctrl, chip); | ||
119 | } | ||
120 | |||
121 | static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg, | 112 | static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg, |
122 | unsigned offset, bool *bit) | 113 | unsigned offset, bool *bit) |
123 | { | 114 | { |
124 | struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); | 115 | struct abx500_pinctrl *pct = gpiochip_get_data(chip); |
125 | u8 pos = offset % 8; | 116 | u8 pos = offset % 8; |
126 | u8 val; | 117 | u8 val; |
127 | int ret; | 118 | int ret; |
@@ -143,7 +134,7 @@ static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg, | |||
143 | static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg, | 134 | static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg, |
144 | unsigned offset, int val) | 135 | unsigned offset, int val) |
145 | { | 136 | { |
146 | struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); | 137 | struct abx500_pinctrl *pct = gpiochip_get_data(chip); |
147 | u8 pos = offset % 8; | 138 | u8 pos = offset % 8; |
148 | int ret; | 139 | int ret; |
149 | 140 | ||
@@ -164,7 +155,7 @@ static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg, | |||
164 | */ | 155 | */ |
165 | static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset) | 156 | static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset) |
166 | { | 157 | { |
167 | struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); | 158 | struct abx500_pinctrl *pct = gpiochip_get_data(chip); |
168 | bool bit; | 159 | bool bit; |
169 | bool is_out; | 160 | bool is_out; |
170 | u8 gpio_offset = offset - 1; | 161 | u8 gpio_offset = offset - 1; |
@@ -192,7 +183,7 @@ out: | |||
192 | 183 | ||
193 | static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | 184 | static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) |
194 | { | 185 | { |
195 | struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); | 186 | struct abx500_pinctrl *pct = gpiochip_get_data(chip); |
196 | int ret; | 187 | int ret; |
197 | 188 | ||
198 | ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); | 189 | ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); |
@@ -272,7 +263,7 @@ out: | |||
272 | 263 | ||
273 | static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio) | 264 | static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio) |
274 | { | 265 | { |
275 | struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); | 266 | struct abx500_pinctrl *pct = gpiochip_get_data(chip); |
276 | struct pullud *pullud = pct->soc->pullud; | 267 | struct pullud *pullud = pct->soc->pullud; |
277 | 268 | ||
278 | return (pullud && | 269 | return (pullud && |
@@ -284,7 +275,7 @@ static int abx500_gpio_direction_output(struct gpio_chip *chip, | |||
284 | unsigned offset, | 275 | unsigned offset, |
285 | int val) | 276 | int val) |
286 | { | 277 | { |
287 | struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); | 278 | struct abx500_pinctrl *pct = gpiochip_get_data(chip); |
288 | unsigned gpio; | 279 | unsigned gpio; |
289 | int ret; | 280 | int ret; |
290 | 281 | ||
@@ -332,7 +323,7 @@ static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
332 | 323 | ||
333 | static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 324 | static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
334 | { | 325 | { |
335 | struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); | 326 | struct abx500_pinctrl *pct = gpiochip_get_data(chip); |
336 | /* The AB8500 GPIO numbers are off by one */ | 327 | /* The AB8500 GPIO numbers are off by one */ |
337 | int gpio = offset + 1; | 328 | int gpio = offset + 1; |
338 | int hwirq; | 329 | int hwirq; |
@@ -634,7 +625,7 @@ static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | |||
634 | { | 625 | { |
635 | unsigned i; | 626 | unsigned i; |
636 | unsigned gpio = chip->base; | 627 | unsigned gpio = chip->base; |
637 | struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); | 628 | struct abx500_pinctrl *pct = gpiochip_get_data(chip); |
638 | struct pinctrl_dev *pctldev = pct->pctldev; | 629 | struct pinctrl_dev *pctldev = pct->pctldev; |
639 | 630 | ||
640 | for (i = 0; i < chip->ngpio; i++, gpio++) { | 631 | for (i = 0; i < chip->ngpio; i++, gpio++) { |
@@ -986,7 +977,7 @@ static int abx500_pin_config_set(struct pinctrl_dev *pctldev, | |||
986 | param = pinconf_to_config_param(configs[i]); | 977 | param = pinconf_to_config_param(configs[i]); |
987 | argument = pinconf_to_config_argument(configs[i]); | 978 | argument = pinconf_to_config_argument(configs[i]); |
988 | 979 | ||
989 | dev_dbg(chip->dev, "pin %d [%#lx]: %s %s\n", | 980 | dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n", |
990 | pin, configs[i], | 981 | pin, configs[i], |
991 | (param == PIN_CONFIG_OUTPUT) ? "output " : "input", | 982 | (param == PIN_CONFIG_OUTPUT) ? "output " : "input", |
992 | (param == PIN_CONFIG_OUTPUT) ? | 983 | (param == PIN_CONFIG_OUTPUT) ? |
@@ -1077,7 +1068,8 @@ static int abx500_pin_config_set(struct pinctrl_dev *pctldev, | |||
1077 | break; | 1068 | break; |
1078 | 1069 | ||
1079 | default: | 1070 | default: |
1080 | dev_err(chip->dev, "illegal configuration requested\n"); | 1071 | dev_err(chip->parent, |
1072 | "illegal configuration requested\n"); | ||
1081 | } | 1073 | } |
1082 | } /* for each config */ | 1074 | } /* for each config */ |
1083 | out: | 1075 | out: |
@@ -1172,7 +1164,7 @@ static int abx500_gpio_probe(struct platform_device *pdev) | |||
1172 | pct->dev = &pdev->dev; | 1164 | pct->dev = &pdev->dev; |
1173 | pct->parent = dev_get_drvdata(pdev->dev.parent); | 1165 | pct->parent = dev_get_drvdata(pdev->dev.parent); |
1174 | pct->chip = abx500gpio_chip; | 1166 | pct->chip = abx500gpio_chip; |
1175 | pct->chip.dev = &pdev->dev; | 1167 | pct->chip.parent = &pdev->dev; |
1176 | pct->chip.base = -1; /* Dynamic allocation */ | 1168 | pct->chip.base = -1; /* Dynamic allocation */ |
1177 | 1169 | ||
1178 | match = of_match_device(abx500_gpio_match, &pdev->dev); | 1170 | match = of_match_device(abx500_gpio_match, &pdev->dev); |
@@ -1210,7 +1202,7 @@ static int abx500_gpio_probe(struct platform_device *pdev) | |||
1210 | pct->irq_cluster = pct->soc->gpio_irq_cluster; | 1202 | pct->irq_cluster = pct->soc->gpio_irq_cluster; |
1211 | pct->irq_cluster_size = pct->soc->ngpio_irq_cluster; | 1203 | pct->irq_cluster_size = pct->soc->ngpio_irq_cluster; |
1212 | 1204 | ||
1213 | ret = gpiochip_add(&pct->chip); | 1205 | ret = gpiochip_add_data(&pct->chip, pct); |
1214 | if (ret) { | 1206 | if (ret) { |
1215 | dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); | 1207 | dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); |
1216 | return ret; | 1208 | return ret; |
diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index eebfae0c9b7c..352406108fa0 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c | |||
@@ -438,7 +438,7 @@ nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset) | |||
438 | nmk_chip->addr + NMK_GPIO_FIMSC); | 438 | nmk_chip->addr + NMK_GPIO_FIMSC); |
439 | } | 439 | } |
440 | 440 | ||
441 | dev_dbg(nmk_chip->chip.dev, "%d: clearing interrupt mask\n", gpio); | 441 | dev_dbg(nmk_chip->chip.parent, "%d: clearing interrupt mask\n", gpio); |
442 | } | 442 | } |
443 | 443 | ||
444 | static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value) | 444 | static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value) |
@@ -646,7 +646,7 @@ static inline int nmk_gpio_get_bitmask(int gpio) | |||
646 | static void nmk_gpio_irq_ack(struct irq_data *d) | 646 | static void nmk_gpio_irq_ack(struct irq_data *d) |
647 | { | 647 | { |
648 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | 648 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
649 | struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip); | 649 | struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); |
650 | 650 | ||
651 | clk_enable(nmk_chip->clk); | 651 | clk_enable(nmk_chip->clk); |
652 | writel(nmk_gpio_get_bitmask(d->hwirq), nmk_chip->addr + NMK_GPIO_IC); | 652 | writel(nmk_gpio_get_bitmask(d->hwirq), nmk_chip->addr + NMK_GPIO_IC); |
@@ -863,7 +863,7 @@ static void __nmk_gpio_irq_handler(struct irq_desc *desc, u32 status) | |||
863 | static void nmk_gpio_irq_handler(struct irq_desc *desc) | 863 | static void nmk_gpio_irq_handler(struct irq_desc *desc) |
864 | { | 864 | { |
865 | struct gpio_chip *chip = irq_desc_get_handler_data(desc); | 865 | struct gpio_chip *chip = irq_desc_get_handler_data(desc); |
866 | struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip); | 866 | struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); |
867 | u32 status; | 867 | u32 status; |
868 | 868 | ||
869 | clk_enable(nmk_chip->clk); | 869 | clk_enable(nmk_chip->clk); |
@@ -876,7 +876,7 @@ static void nmk_gpio_irq_handler(struct irq_desc *desc) | |||
876 | static void nmk_gpio_latent_irq_handler(struct irq_desc *desc) | 876 | static void nmk_gpio_latent_irq_handler(struct irq_desc *desc) |
877 | { | 877 | { |
878 | struct gpio_chip *chip = irq_desc_get_handler_data(desc); | 878 | struct gpio_chip *chip = irq_desc_get_handler_data(desc); |
879 | struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip); | 879 | struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); |
880 | u32 status = nmk_chip->get_latent_status(nmk_chip->bank); | 880 | u32 status = nmk_chip->get_latent_status(nmk_chip->bank); |
881 | 881 | ||
882 | __nmk_gpio_irq_handler(desc, status); | 882 | __nmk_gpio_irq_handler(desc, status); |
@@ -886,8 +886,7 @@ static void nmk_gpio_latent_irq_handler(struct irq_desc *desc) | |||
886 | 886 | ||
887 | static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset) | 887 | static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset) |
888 | { | 888 | { |
889 | struct nmk_gpio_chip *nmk_chip = | 889 | struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); |
890 | container_of(chip, struct nmk_gpio_chip, chip); | ||
891 | 890 | ||
892 | clk_enable(nmk_chip->clk); | 891 | clk_enable(nmk_chip->clk); |
893 | 892 | ||
@@ -900,8 +899,7 @@ static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset) | |||
900 | 899 | ||
901 | static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset) | 900 | static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset) |
902 | { | 901 | { |
903 | struct nmk_gpio_chip *nmk_chip = | 902 | struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); |
904 | container_of(chip, struct nmk_gpio_chip, chip); | ||
905 | u32 bit = 1 << offset; | 903 | u32 bit = 1 << offset; |
906 | int value; | 904 | int value; |
907 | 905 | ||
@@ -917,8 +915,7 @@ static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset) | |||
917 | static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset, | 915 | static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset, |
918 | int val) | 916 | int val) |
919 | { | 917 | { |
920 | struct nmk_gpio_chip *nmk_chip = | 918 | struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); |
921 | container_of(chip, struct nmk_gpio_chip, chip); | ||
922 | 919 | ||
923 | clk_enable(nmk_chip->clk); | 920 | clk_enable(nmk_chip->clk); |
924 | 921 | ||
@@ -930,8 +927,7 @@ static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset, | |||
930 | static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset, | 927 | static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset, |
931 | int val) | 928 | int val) |
932 | { | 929 | { |
933 | struct nmk_gpio_chip *nmk_chip = | 930 | struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); |
934 | container_of(chip, struct nmk_gpio_chip, chip); | ||
935 | 931 | ||
936 | clk_enable(nmk_chip->clk); | 932 | clk_enable(nmk_chip->clk); |
937 | 933 | ||
@@ -951,8 +947,7 @@ static void nmk_gpio_dbg_show_one(struct seq_file *s, | |||
951 | unsigned offset, unsigned gpio) | 947 | unsigned offset, unsigned gpio) |
952 | { | 948 | { |
953 | const char *label = gpiochip_is_requested(chip, offset); | 949 | const char *label = gpiochip_is_requested(chip, offset); |
954 | struct nmk_gpio_chip *nmk_chip = | 950 | struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); |
955 | container_of(chip, struct nmk_gpio_chip, chip); | ||
956 | int mode; | 951 | int mode; |
957 | bool is_out; | 952 | bool is_out; |
958 | bool data_out; | 953 | bool data_out; |
@@ -1188,7 +1183,7 @@ static struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, | |||
1188 | chip->base = id * NMK_GPIO_PER_CHIP; | 1183 | chip->base = id * NMK_GPIO_PER_CHIP; |
1189 | chip->ngpio = NMK_GPIO_PER_CHIP; | 1184 | chip->ngpio = NMK_GPIO_PER_CHIP; |
1190 | chip->label = dev_name(&gpio_pdev->dev); | 1185 | chip->label = dev_name(&gpio_pdev->dev); |
1191 | chip->dev = &gpio_pdev->dev; | 1186 | chip->parent = &gpio_pdev->dev; |
1192 | 1187 | ||
1193 | res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); | 1188 | res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); |
1194 | base = devm_ioremap_resource(&pdev->dev, res); | 1189 | base = devm_ioremap_resource(&pdev->dev, res); |
@@ -1278,7 +1273,7 @@ static int nmk_gpio_probe(struct platform_device *dev) | |||
1278 | clk_disable(nmk_chip->clk); | 1273 | clk_disable(nmk_chip->clk); |
1279 | chip->of_node = np; | 1274 | chip->of_node = np; |
1280 | 1275 | ||
1281 | ret = gpiochip_add(chip); | 1276 | ret = gpiochip_add_data(chip, nmk_chip); |
1282 | if (ret) | 1277 | if (ret) |
1283 | return ret; | 1278 | return ret; |
1284 | 1279 | ||
@@ -1789,7 +1784,7 @@ static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, | |||
1789 | return -EINVAL; | 1784 | return -EINVAL; |
1790 | } | 1785 | } |
1791 | chip = range->gc; | 1786 | chip = range->gc; |
1792 | nmk_chip = container_of(chip, struct nmk_gpio_chip, chip); | 1787 | nmk_chip = gpiochip_get_data(chip); |
1793 | 1788 | ||
1794 | dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset); | 1789 | dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset); |
1795 | 1790 | ||
@@ -1890,7 +1885,7 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, | |||
1890 | if (slpm_val) | 1885 | if (slpm_val) |
1891 | val = slpm_val - 1; | 1886 | val = slpm_val - 1; |
1892 | 1887 | ||
1893 | dev_dbg(nmk_chip->chip.dev, | 1888 | dev_dbg(nmk_chip->chip.parent, |
1894 | "pin %d: sleep pull %s, dir %s, val %s\n", | 1889 | "pin %d: sleep pull %s, dir %s, val %s\n", |
1895 | pin, | 1890 | pin, |
1896 | slpm_pull ? pullnames[pull] : "same", | 1891 | slpm_pull ? pullnames[pull] : "same", |
@@ -1899,7 +1894,7 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, | |||
1899 | slpm_val ? (val ? "high" : "low") : "same"); | 1894 | slpm_val ? (val ? "high" : "low") : "same"); |
1900 | } | 1895 | } |
1901 | 1896 | ||
1902 | dev_dbg(nmk_chip->chip.dev, | 1897 | dev_dbg(nmk_chip->chip.parent, |
1903 | "pin %d [%#lx]: pull %s, slpm %s (%s%s), lowemi %s\n", | 1898 | "pin %d [%#lx]: pull %s, slpm %s (%s%s), lowemi %s\n", |
1904 | pin, cfg, pullnames[pull], slpmnames[slpm], | 1899 | pin, cfg, pullnames[pull], slpmnames[slpm], |
1905 | output ? "output " : "input", | 1900 | output ? "output " : "input", |
diff --git a/drivers/pinctrl/pinctrl-adi2.c b/drivers/pinctrl/pinctrl-adi2.c index 8e9e8eab59ba..ecb57635a37e 100644 --- a/drivers/pinctrl/pinctrl-adi2.c +++ b/drivers/pinctrl/pinctrl-adi2.c | |||
@@ -636,7 +636,7 @@ static int adi_pinmux_set(struct pinctrl_dev *pctldev, unsigned func_id, | |||
636 | if (range == NULL) /* should not happen */ | 636 | if (range == NULL) /* should not happen */ |
637 | return -ENODEV; | 637 | return -ENODEV; |
638 | 638 | ||
639 | port = container_of(range->gc, struct gpio_port, chip); | 639 | port = gpiochip_get_data(range->gc); |
640 | 640 | ||
641 | spin_lock_irqsave(&port->lock, flags); | 641 | spin_lock_irqsave(&port->lock, flags); |
642 | 642 | ||
@@ -684,7 +684,7 @@ static int adi_pinmux_request_gpio(struct pinctrl_dev *pctldev, | |||
684 | unsigned long flags; | 684 | unsigned long flags; |
685 | u8 offset; | 685 | u8 offset; |
686 | 686 | ||
687 | port = container_of(range->gc, struct gpio_port, chip); | 687 | port = gpiochip_get_data(range->gc); |
688 | offset = pin_to_offset(range, pin); | 688 | offset = pin_to_offset(range, pin); |
689 | 689 | ||
690 | spin_lock_irqsave(&port->lock, flags); | 690 | spin_lock_irqsave(&port->lock, flags); |
@@ -718,7 +718,7 @@ static int adi_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
718 | struct gpio_port *port; | 718 | struct gpio_port *port; |
719 | unsigned long flags; | 719 | unsigned long flags; |
720 | 720 | ||
721 | port = container_of(chip, struct gpio_port, chip); | 721 | port = gpiochip_get_data(chip); |
722 | 722 | ||
723 | spin_lock_irqsave(&port->lock, flags); | 723 | spin_lock_irqsave(&port->lock, flags); |
724 | 724 | ||
@@ -733,7 +733,7 @@ static int adi_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
733 | static void adi_gpio_set_value(struct gpio_chip *chip, unsigned offset, | 733 | static void adi_gpio_set_value(struct gpio_chip *chip, unsigned offset, |
734 | int value) | 734 | int value) |
735 | { | 735 | { |
736 | struct gpio_port *port = container_of(chip, struct gpio_port, chip); | 736 | struct gpio_port *port = gpiochip_get_data(chip); |
737 | struct gpio_port_t *regs = port->regs; | 737 | struct gpio_port_t *regs = port->regs; |
738 | unsigned long flags; | 738 | unsigned long flags; |
739 | 739 | ||
@@ -750,7 +750,7 @@ static void adi_gpio_set_value(struct gpio_chip *chip, unsigned offset, | |||
750 | static int adi_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | 750 | static int adi_gpio_direction_output(struct gpio_chip *chip, unsigned offset, |
751 | int value) | 751 | int value) |
752 | { | 752 | { |
753 | struct gpio_port *port = container_of(chip, struct gpio_port, chip); | 753 | struct gpio_port *port = gpiochip_get_data(chip); |
754 | struct gpio_port_t *regs = port->regs; | 754 | struct gpio_port_t *regs = port->regs; |
755 | unsigned long flags; | 755 | unsigned long flags; |
756 | 756 | ||
@@ -770,7 +770,7 @@ static int adi_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | |||
770 | 770 | ||
771 | static int adi_gpio_get_value(struct gpio_chip *chip, unsigned offset) | 771 | static int adi_gpio_get_value(struct gpio_chip *chip, unsigned offset) |
772 | { | 772 | { |
773 | struct gpio_port *port = container_of(chip, struct gpio_port, chip); | 773 | struct gpio_port *port = gpiochip_get_data(chip); |
774 | struct gpio_port_t *regs = port->regs; | 774 | struct gpio_port_t *regs = port->regs; |
775 | unsigned long flags; | 775 | unsigned long flags; |
776 | int ret; | 776 | int ret; |
@@ -786,7 +786,7 @@ static int adi_gpio_get_value(struct gpio_chip *chip, unsigned offset) | |||
786 | 786 | ||
787 | static int adi_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 787 | static int adi_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
788 | { | 788 | { |
789 | struct gpio_port *port = container_of(chip, struct gpio_port, chip); | 789 | struct gpio_port *port = gpiochip_get_data(chip); |
790 | 790 | ||
791 | if (port->irq_base >= 0) | 791 | if (port->irq_base >= 0) |
792 | return irq_find_mapping(port->domain, offset); | 792 | return irq_find_mapping(port->domain, offset); |
@@ -994,7 +994,7 @@ static int adi_gpio_probe(struct platform_device *pdev) | |||
994 | port->chip.ngpio = port->width; | 994 | port->chip.ngpio = port->width; |
995 | gpio = port->chip.base + port->width; | 995 | gpio = port->chip.base + port->width; |
996 | 996 | ||
997 | ret = gpiochip_add(&port->chip); | 997 | ret = gpiochip_add_data(&port->chip, port); |
998 | if (ret) { | 998 | if (ret) { |
999 | dev_err(&pdev->dev, "Fail to add GPIO chip.\n"); | 999 | dev_err(&pdev->dev, "Fail to add GPIO chip.\n"); |
1000 | goto out_remove_domain; | 1000 | goto out_remove_domain; |
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 3318f1d6193c..657449431301 100644 --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c | |||
@@ -35,16 +35,11 @@ | |||
35 | #include "pinctrl-utils.h" | 35 | #include "pinctrl-utils.h" |
36 | #include "pinctrl-amd.h" | 36 | #include "pinctrl-amd.h" |
37 | 37 | ||
38 | static inline struct amd_gpio *to_amd_gpio(struct gpio_chip *gc) | ||
39 | { | ||
40 | return container_of(gc, struct amd_gpio, gc); | ||
41 | } | ||
42 | |||
43 | static int amd_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | 38 | static int amd_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
44 | { | 39 | { |
45 | unsigned long flags; | 40 | unsigned long flags; |
46 | u32 pin_reg; | 41 | u32 pin_reg; |
47 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 42 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
48 | 43 | ||
49 | spin_lock_irqsave(&gpio_dev->lock, flags); | 44 | spin_lock_irqsave(&gpio_dev->lock, flags); |
50 | pin_reg = readl(gpio_dev->base + offset * 4); | 45 | pin_reg = readl(gpio_dev->base + offset * 4); |
@@ -71,7 +66,7 @@ static int amd_gpio_direction_output(struct gpio_chip *gc, unsigned offset, | |||
71 | { | 66 | { |
72 | u32 pin_reg; | 67 | u32 pin_reg; |
73 | unsigned long flags; | 68 | unsigned long flags; |
74 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 69 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
75 | 70 | ||
76 | spin_lock_irqsave(&gpio_dev->lock, flags); | 71 | spin_lock_irqsave(&gpio_dev->lock, flags); |
77 | pin_reg = readl(gpio_dev->base + offset * 4); | 72 | pin_reg = readl(gpio_dev->base + offset * 4); |
@@ -90,7 +85,7 @@ static int amd_gpio_get_value(struct gpio_chip *gc, unsigned offset) | |||
90 | { | 85 | { |
91 | u32 pin_reg; | 86 | u32 pin_reg; |
92 | unsigned long flags; | 87 | unsigned long flags; |
93 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 88 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
94 | 89 | ||
95 | spin_lock_irqsave(&gpio_dev->lock, flags); | 90 | spin_lock_irqsave(&gpio_dev->lock, flags); |
96 | pin_reg = readl(gpio_dev->base + offset * 4); | 91 | pin_reg = readl(gpio_dev->base + offset * 4); |
@@ -103,7 +98,7 @@ static void amd_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value) | |||
103 | { | 98 | { |
104 | u32 pin_reg; | 99 | u32 pin_reg; |
105 | unsigned long flags; | 100 | unsigned long flags; |
106 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 101 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
107 | 102 | ||
108 | spin_lock_irqsave(&gpio_dev->lock, flags); | 103 | spin_lock_irqsave(&gpio_dev->lock, flags); |
109 | pin_reg = readl(gpio_dev->base + offset * 4); | 104 | pin_reg = readl(gpio_dev->base + offset * 4); |
@@ -122,7 +117,7 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset, | |||
122 | u32 pin_reg; | 117 | u32 pin_reg; |
123 | int ret = 0; | 118 | int ret = 0; |
124 | unsigned long flags; | 119 | unsigned long flags; |
125 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 120 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
126 | 121 | ||
127 | spin_lock_irqsave(&gpio_dev->lock, flags); | 122 | spin_lock_irqsave(&gpio_dev->lock, flags); |
128 | pin_reg = readl(gpio_dev->base + offset * 4); | 123 | pin_reg = readl(gpio_dev->base + offset * 4); |
@@ -186,7 +181,7 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc) | |||
186 | u32 pin_reg; | 181 | u32 pin_reg; |
187 | unsigned long flags; | 182 | unsigned long flags; |
188 | unsigned int bank, i, pin_num; | 183 | unsigned int bank, i, pin_num; |
189 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 184 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
190 | 185 | ||
191 | char *level_trig; | 186 | char *level_trig; |
192 | char *active_level; | 187 | char *active_level; |
@@ -327,7 +322,7 @@ static void amd_gpio_irq_enable(struct irq_data *d) | |||
327 | u32 pin_reg; | 322 | u32 pin_reg; |
328 | unsigned long flags; | 323 | unsigned long flags; |
329 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 324 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
330 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 325 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
331 | 326 | ||
332 | spin_lock_irqsave(&gpio_dev->lock, flags); | 327 | spin_lock_irqsave(&gpio_dev->lock, flags); |
333 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); | 328 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); |
@@ -351,7 +346,7 @@ static void amd_gpio_irq_disable(struct irq_data *d) | |||
351 | u32 pin_reg; | 346 | u32 pin_reg; |
352 | unsigned long flags; | 347 | unsigned long flags; |
353 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 348 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
354 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 349 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
355 | 350 | ||
356 | spin_lock_irqsave(&gpio_dev->lock, flags); | 351 | spin_lock_irqsave(&gpio_dev->lock, flags); |
357 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); | 352 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); |
@@ -366,7 +361,7 @@ static void amd_gpio_irq_mask(struct irq_data *d) | |||
366 | u32 pin_reg; | 361 | u32 pin_reg; |
367 | unsigned long flags; | 362 | unsigned long flags; |
368 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 363 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
369 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 364 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
370 | 365 | ||
371 | spin_lock_irqsave(&gpio_dev->lock, flags); | 366 | spin_lock_irqsave(&gpio_dev->lock, flags); |
372 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); | 367 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); |
@@ -380,7 +375,7 @@ static void amd_gpio_irq_unmask(struct irq_data *d) | |||
380 | u32 pin_reg; | 375 | u32 pin_reg; |
381 | unsigned long flags; | 376 | unsigned long flags; |
382 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 377 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
383 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 378 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
384 | 379 | ||
385 | spin_lock_irqsave(&gpio_dev->lock, flags); | 380 | spin_lock_irqsave(&gpio_dev->lock, flags); |
386 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); | 381 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); |
@@ -394,7 +389,7 @@ static void amd_gpio_irq_eoi(struct irq_data *d) | |||
394 | u32 reg; | 389 | u32 reg; |
395 | unsigned long flags; | 390 | unsigned long flags; |
396 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 391 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
397 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 392 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
398 | 393 | ||
399 | spin_lock_irqsave(&gpio_dev->lock, flags); | 394 | spin_lock_irqsave(&gpio_dev->lock, flags); |
400 | reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG); | 395 | reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG); |
@@ -409,7 +404,7 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
409 | u32 pin_reg; | 404 | u32 pin_reg; |
410 | unsigned long flags; | 405 | unsigned long flags; |
411 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 406 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
412 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 407 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
413 | 408 | ||
414 | spin_lock_irqsave(&gpio_dev->lock, flags); | 409 | spin_lock_irqsave(&gpio_dev->lock, flags); |
415 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); | 410 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); |
@@ -504,7 +499,7 @@ static void amd_gpio_irq_handler(struct irq_desc *desc) | |||
504 | unsigned long flags; | 499 | unsigned long flags; |
505 | struct irq_chip *chip = irq_desc_get_chip(desc); | 500 | struct irq_chip *chip = irq_desc_get_chip(desc); |
506 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 501 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
507 | struct amd_gpio *gpio_dev = to_amd_gpio(gc); | 502 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
508 | 503 | ||
509 | chained_irq_enter(chip, desc); | 504 | chained_irq_enter(chip, desc); |
510 | /*enable GPIO interrupt again*/ | 505 | /*enable GPIO interrupt again*/ |
@@ -778,7 +773,7 @@ static int amd_gpio_probe(struct platform_device *pdev) | |||
778 | gpio_dev->gc.base = 0; | 773 | gpio_dev->gc.base = 0; |
779 | gpio_dev->gc.label = pdev->name; | 774 | gpio_dev->gc.label = pdev->name; |
780 | gpio_dev->gc.owner = THIS_MODULE; | 775 | gpio_dev->gc.owner = THIS_MODULE; |
781 | gpio_dev->gc.dev = &pdev->dev; | 776 | gpio_dev->gc.parent = &pdev->dev; |
782 | gpio_dev->gc.ngpio = TOTAL_NUMBER_OF_PINS; | 777 | gpio_dev->gc.ngpio = TOTAL_NUMBER_OF_PINS; |
783 | #if defined(CONFIG_OF_GPIO) | 778 | #if defined(CONFIG_OF_GPIO) |
784 | gpio_dev->gc.of_node = pdev->dev.of_node; | 779 | gpio_dev->gc.of_node = pdev->dev.of_node; |
@@ -795,7 +790,7 @@ static int amd_gpio_probe(struct platform_device *pdev) | |||
795 | return PTR_ERR(gpio_dev->pctrl); | 790 | return PTR_ERR(gpio_dev->pctrl); |
796 | } | 791 | } |
797 | 792 | ||
798 | ret = gpiochip_add(&gpio_dev->gc); | 793 | ret = gpiochip_add_data(&gpio_dev->gc, gpio_dev); |
799 | if (ret) | 794 | if (ret) |
800 | goto out1; | 795 | goto out1; |
801 | 796 | ||
diff --git a/drivers/pinctrl/pinctrl-as3722.c b/drivers/pinctrl/pinctrl-as3722.c index 56af28b95a44..e844fdc6d3a8 100644 --- a/drivers/pinctrl/pinctrl-as3722.c +++ b/drivers/pinctrl/pinctrl-as3722.c | |||
@@ -436,14 +436,9 @@ static struct pinctrl_desc as3722_pinctrl_desc = { | |||
436 | .owner = THIS_MODULE, | 436 | .owner = THIS_MODULE, |
437 | }; | 437 | }; |
438 | 438 | ||
439 | static inline struct as3722_pctrl_info *to_as_pci(struct gpio_chip *chip) | ||
440 | { | ||
441 | return container_of(chip, struct as3722_pctrl_info, gpio_chip); | ||
442 | } | ||
443 | |||
444 | static int as3722_gpio_get(struct gpio_chip *chip, unsigned offset) | 439 | static int as3722_gpio_get(struct gpio_chip *chip, unsigned offset) |
445 | { | 440 | { |
446 | struct as3722_pctrl_info *as_pci = to_as_pci(chip); | 441 | struct as3722_pctrl_info *as_pci = gpiochip_get_data(chip); |
447 | struct as3722 *as3722 = as_pci->as3722; | 442 | struct as3722 *as3722 = as_pci->as3722; |
448 | int ret; | 443 | int ret; |
449 | u32 reg; | 444 | u32 reg; |
@@ -491,7 +486,7 @@ static int as3722_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
491 | static void as3722_gpio_set(struct gpio_chip *chip, unsigned offset, | 486 | static void as3722_gpio_set(struct gpio_chip *chip, unsigned offset, |
492 | int value) | 487 | int value) |
493 | { | 488 | { |
494 | struct as3722_pctrl_info *as_pci = to_as_pci(chip); | 489 | struct as3722_pctrl_info *as_pci = gpiochip_get_data(chip); |
495 | struct as3722 *as3722 = as_pci->as3722; | 490 | struct as3722 *as3722 = as_pci->as3722; |
496 | int en_invert; | 491 | int en_invert; |
497 | u32 val; | 492 | u32 val; |
@@ -531,7 +526,7 @@ static int as3722_gpio_direction_output(struct gpio_chip *chip, | |||
531 | 526 | ||
532 | static int as3722_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 527 | static int as3722_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
533 | { | 528 | { |
534 | struct as3722_pctrl_info *as_pci = to_as_pci(chip); | 529 | struct as3722_pctrl_info *as_pci = gpiochip_get_data(chip); |
535 | 530 | ||
536 | return as3722_irq_get_virq(as_pci->as3722, offset); | 531 | return as3722_irq_get_virq(as_pci->as3722, offset); |
537 | } | 532 | } |
@@ -582,9 +577,9 @@ static int as3722_pinctrl_probe(struct platform_device *pdev) | |||
582 | } | 577 | } |
583 | 578 | ||
584 | as_pci->gpio_chip = as3722_gpio_chip; | 579 | as_pci->gpio_chip = as3722_gpio_chip; |
585 | as_pci->gpio_chip.dev = &pdev->dev; | 580 | as_pci->gpio_chip.parent = &pdev->dev; |
586 | as_pci->gpio_chip.of_node = pdev->dev.parent->of_node; | 581 | as_pci->gpio_chip.of_node = pdev->dev.parent->of_node; |
587 | ret = gpiochip_add(&as_pci->gpio_chip); | 582 | ret = gpiochip_add_data(&as_pci->gpio_chip, as_pci); |
588 | if (ret < 0) { | 583 | if (ret < 0) { |
589 | dev_err(&pdev->dev, "Couldn't register gpiochip, %d\n", ret); | 584 | dev_err(&pdev->dev, "Couldn't register gpiochip, %d\n", ret); |
590 | goto fail_chip_add; | 585 | goto fail_chip_add; |
diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index d5bdcebc6aa6..ee69db6ae1c7 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c | |||
@@ -15,6 +15,8 @@ | |||
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/gpio/driver.h> | ||
19 | /* FIXME: needed for gpio_to_irq(), get rid of this */ | ||
18 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
19 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
20 | #include <linux/io.h> | 22 | #include <linux/io.h> |
@@ -290,7 +292,7 @@ static void atmel_gpio_irq_handler(struct irq_desc *desc) | |||
290 | 292 | ||
291 | static int atmel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 293 | static int atmel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
292 | { | 294 | { |
293 | struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->dev); | 295 | struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); |
294 | struct atmel_pin *pin = atmel_pioctrl->pins[offset]; | 296 | struct atmel_pin *pin = atmel_pioctrl->pins[offset]; |
295 | unsigned reg; | 297 | unsigned reg; |
296 | 298 | ||
@@ -305,7 +307,7 @@ static int atmel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
305 | 307 | ||
306 | static int atmel_gpio_get(struct gpio_chip *chip, unsigned offset) | 308 | static int atmel_gpio_get(struct gpio_chip *chip, unsigned offset) |
307 | { | 309 | { |
308 | struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->dev); | 310 | struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); |
309 | struct atmel_pin *pin = atmel_pioctrl->pins[offset]; | 311 | struct atmel_pin *pin = atmel_pioctrl->pins[offset]; |
310 | unsigned reg; | 312 | unsigned reg; |
311 | 313 | ||
@@ -317,7 +319,7 @@ static int atmel_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
317 | static int atmel_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | 319 | static int atmel_gpio_direction_output(struct gpio_chip *chip, unsigned offset, |
318 | int value) | 320 | int value) |
319 | { | 321 | { |
320 | struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->dev); | 322 | struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); |
321 | struct atmel_pin *pin = atmel_pioctrl->pins[offset]; | 323 | struct atmel_pin *pin = atmel_pioctrl->pins[offset]; |
322 | unsigned reg; | 324 | unsigned reg; |
323 | 325 | ||
@@ -336,7 +338,7 @@ static int atmel_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | |||
336 | 338 | ||
337 | static void atmel_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | 339 | static void atmel_gpio_set(struct gpio_chip *chip, unsigned offset, int val) |
338 | { | 340 | { |
339 | struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->dev); | 341 | struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); |
340 | struct atmel_pin *pin = atmel_pioctrl->pins[offset]; | 342 | struct atmel_pin *pin = atmel_pioctrl->pins[offset]; |
341 | 343 | ||
342 | atmel_gpio_write(atmel_pioctrl, pin->bank, | 344 | atmel_gpio_write(atmel_pioctrl, pin->bank, |
@@ -346,7 +348,7 @@ static void atmel_gpio_set(struct gpio_chip *chip, unsigned offset, int val) | |||
346 | 348 | ||
347 | static int atmel_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 349 | static int atmel_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
348 | { | 350 | { |
349 | struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->dev); | 351 | struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); |
350 | 352 | ||
351 | return irq_find_mapping(atmel_pioctrl->irq_domain, offset); | 353 | return irq_find_mapping(atmel_pioctrl->irq_domain, offset); |
352 | } | 354 | } |
@@ -972,7 +974,7 @@ static int atmel_pinctrl_probe(struct platform_device *pdev) | |||
972 | atmel_pioctrl->gpio_chip->of_node = dev->of_node; | 974 | atmel_pioctrl->gpio_chip->of_node = dev->of_node; |
973 | atmel_pioctrl->gpio_chip->ngpio = atmel_pioctrl->npins; | 975 | atmel_pioctrl->gpio_chip->ngpio = atmel_pioctrl->npins; |
974 | atmel_pioctrl->gpio_chip->label = dev_name(dev); | 976 | atmel_pioctrl->gpio_chip->label = dev_name(dev); |
975 | atmel_pioctrl->gpio_chip->dev = dev; | 977 | atmel_pioctrl->gpio_chip->parent = dev; |
976 | atmel_pioctrl->gpio_chip->names = atmel_pioctrl->group_names; | 978 | atmel_pioctrl->gpio_chip->names = atmel_pioctrl->group_names; |
977 | 979 | ||
978 | atmel_pioctrl->pm_wakeup_sources = devm_kzalloc(dev, | 980 | atmel_pioctrl->pm_wakeup_sources = devm_kzalloc(dev, |
@@ -1040,7 +1042,7 @@ static int atmel_pinctrl_probe(struct platform_device *pdev) | |||
1040 | goto pinctrl_register_error; | 1042 | goto pinctrl_register_error; |
1041 | } | 1043 | } |
1042 | 1044 | ||
1043 | ret = gpiochip_add(atmel_pioctrl->gpio_chip); | 1045 | ret = gpiochip_add_data(atmel_pioctrl->gpio_chip, atmel_pioctrl); |
1044 | if (ret) { | 1046 | if (ret) { |
1045 | dev_err(dev, "failed to add gpiochip\n"); | 1047 | dev_err(dev, "failed to add gpiochip\n"); |
1046 | goto gpiochip_add_error; | 1048 | goto gpiochip_add_error; |
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index 47b625b1b789..523b6b794d1f 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c | |||
@@ -45,8 +45,6 @@ struct at91_gpio_chip { | |||
45 | struct at91_pinctrl_mux_ops *ops; /* ops */ | 45 | struct at91_pinctrl_mux_ops *ops; /* ops */ |
46 | }; | 46 | }; |
47 | 47 | ||
48 | #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) | ||
49 | |||
50 | static struct at91_gpio_chip *gpio_chips[MAX_GPIO_BANKS]; | 48 | static struct at91_gpio_chip *gpio_chips[MAX_GPIO_BANKS]; |
51 | 49 | ||
52 | static int gpio_banks; | 50 | static int gpio_banks; |
@@ -811,7 +809,7 @@ static int at91_gpio_request_enable(struct pinctrl_dev *pctldev, | |||
811 | return -EINVAL; | 809 | return -EINVAL; |
812 | } | 810 | } |
813 | chip = range->gc; | 811 | chip = range->gc; |
814 | at91_chip = container_of(chip, struct at91_gpio_chip, chip); | 812 | at91_chip = gpiochip_get_data(chip); |
815 | 813 | ||
816 | dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset); | 814 | dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset); |
817 | 815 | ||
@@ -1282,7 +1280,7 @@ static int at91_pinctrl_remove(struct platform_device *pdev) | |||
1282 | 1280 | ||
1283 | static int at91_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | 1281 | static int at91_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
1284 | { | 1282 | { |
1285 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | 1283 | struct at91_gpio_chip *at91_gpio = gpiochip_get_data(chip); |
1286 | void __iomem *pio = at91_gpio->regbase; | 1284 | void __iomem *pio = at91_gpio->regbase; |
1287 | unsigned mask = 1 << offset; | 1285 | unsigned mask = 1 << offset; |
1288 | u32 osr; | 1286 | u32 osr; |
@@ -1293,7 +1291,7 @@ static int at91_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | |||
1293 | 1291 | ||
1294 | static int at91_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 1292 | static int at91_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
1295 | { | 1293 | { |
1296 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | 1294 | struct at91_gpio_chip *at91_gpio = gpiochip_get_data(chip); |
1297 | void __iomem *pio = at91_gpio->regbase; | 1295 | void __iomem *pio = at91_gpio->regbase; |
1298 | unsigned mask = 1 << offset; | 1296 | unsigned mask = 1 << offset; |
1299 | 1297 | ||
@@ -1303,7 +1301,7 @@ static int at91_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
1303 | 1301 | ||
1304 | static int at91_gpio_get(struct gpio_chip *chip, unsigned offset) | 1302 | static int at91_gpio_get(struct gpio_chip *chip, unsigned offset) |
1305 | { | 1303 | { |
1306 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | 1304 | struct at91_gpio_chip *at91_gpio = gpiochip_get_data(chip); |
1307 | void __iomem *pio = at91_gpio->regbase; | 1305 | void __iomem *pio = at91_gpio->regbase; |
1308 | unsigned mask = 1 << offset; | 1306 | unsigned mask = 1 << offset; |
1309 | u32 pdsr; | 1307 | u32 pdsr; |
@@ -1315,7 +1313,7 @@ static int at91_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
1315 | static void at91_gpio_set(struct gpio_chip *chip, unsigned offset, | 1313 | static void at91_gpio_set(struct gpio_chip *chip, unsigned offset, |
1316 | int val) | 1314 | int val) |
1317 | { | 1315 | { |
1318 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | 1316 | struct at91_gpio_chip *at91_gpio = gpiochip_get_data(chip); |
1319 | void __iomem *pio = at91_gpio->regbase; | 1317 | void __iomem *pio = at91_gpio->regbase; |
1320 | unsigned mask = 1 << offset; | 1318 | unsigned mask = 1 << offset; |
1321 | 1319 | ||
@@ -1325,7 +1323,7 @@ static void at91_gpio_set(struct gpio_chip *chip, unsigned offset, | |||
1325 | static void at91_gpio_set_multiple(struct gpio_chip *chip, | 1323 | static void at91_gpio_set_multiple(struct gpio_chip *chip, |
1326 | unsigned long *mask, unsigned long *bits) | 1324 | unsigned long *mask, unsigned long *bits) |
1327 | { | 1325 | { |
1328 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | 1326 | struct at91_gpio_chip *at91_gpio = gpiochip_get_data(chip); |
1329 | void __iomem *pio = at91_gpio->regbase; | 1327 | void __iomem *pio = at91_gpio->regbase; |
1330 | 1328 | ||
1331 | #define BITS_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1)) | 1329 | #define BITS_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1)) |
@@ -1340,7 +1338,7 @@ static void at91_gpio_set_multiple(struct gpio_chip *chip, | |||
1340 | static int at91_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | 1338 | static int at91_gpio_direction_output(struct gpio_chip *chip, unsigned offset, |
1341 | int val) | 1339 | int val) |
1342 | { | 1340 | { |
1343 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | 1341 | struct at91_gpio_chip *at91_gpio = gpiochip_get_data(chip); |
1344 | void __iomem *pio = at91_gpio->regbase; | 1342 | void __iomem *pio = at91_gpio->regbase; |
1345 | unsigned mask = 1 << offset; | 1343 | unsigned mask = 1 << offset; |
1346 | 1344 | ||
@@ -1355,7 +1353,7 @@ static void at91_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | |||
1355 | { | 1353 | { |
1356 | enum at91_mux mode; | 1354 | enum at91_mux mode; |
1357 | int i; | 1355 | int i; |
1358 | struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); | 1356 | struct at91_gpio_chip *at91_gpio = gpiochip_get_data(chip); |
1359 | void __iomem *pio = at91_gpio->regbase; | 1357 | void __iomem *pio = at91_gpio->regbase; |
1360 | 1358 | ||
1361 | for (i = 0; i < chip->ngpio; i++) { | 1359 | for (i = 0; i < chip->ngpio; i++) { |
@@ -1570,9 +1568,7 @@ static void gpio_irq_handler(struct irq_desc *desc) | |||
1570 | { | 1568 | { |
1571 | struct irq_chip *chip = irq_desc_get_chip(desc); | 1569 | struct irq_chip *chip = irq_desc_get_chip(desc); |
1572 | struct gpio_chip *gpio_chip = irq_desc_get_handler_data(desc); | 1570 | struct gpio_chip *gpio_chip = irq_desc_get_handler_data(desc); |
1573 | struct at91_gpio_chip *at91_gpio = container_of(gpio_chip, | 1571 | struct at91_gpio_chip *at91_gpio = gpiochip_get_data(gpio_chip); |
1574 | struct at91_gpio_chip, chip); | ||
1575 | |||
1576 | void __iomem *pio = at91_gpio->regbase; | 1572 | void __iomem *pio = at91_gpio->regbase; |
1577 | unsigned long isr; | 1573 | unsigned long isr; |
1578 | int n; | 1574 | int n; |
@@ -1648,7 +1644,7 @@ static int at91_gpio_of_irq_setup(struct platform_device *pdev, | |||
1648 | return 0; | 1644 | return 0; |
1649 | } | 1645 | } |
1650 | 1646 | ||
1651 | prev = container_of(gpiochip_prev, struct at91_gpio_chip, chip); | 1647 | prev = gpiochip_get_data(gpiochip_prev); |
1652 | 1648 | ||
1653 | /* we can only have 2 banks before */ | 1649 | /* we can only have 2 banks before */ |
1654 | for (i = 0; i < 2; i++) { | 1650 | for (i = 0; i < 2; i++) { |
@@ -1750,7 +1746,7 @@ static int at91_gpio_probe(struct platform_device *pdev) | |||
1750 | chip = &at91_chip->chip; | 1746 | chip = &at91_chip->chip; |
1751 | chip->of_node = np; | 1747 | chip->of_node = np; |
1752 | chip->label = dev_name(&pdev->dev); | 1748 | chip->label = dev_name(&pdev->dev); |
1753 | chip->dev = &pdev->dev; | 1749 | chip->parent = &pdev->dev; |
1754 | chip->owner = THIS_MODULE; | 1750 | chip->owner = THIS_MODULE; |
1755 | chip->base = alias_idx * MAX_NB_GPIO_PER_BANK; | 1751 | chip->base = alias_idx * MAX_NB_GPIO_PER_BANK; |
1756 | 1752 | ||
@@ -1783,7 +1779,7 @@ static int at91_gpio_probe(struct platform_device *pdev) | |||
1783 | range->npins = chip->ngpio; | 1779 | range->npins = chip->ngpio; |
1784 | range->gc = chip; | 1780 | range->gc = chip; |
1785 | 1781 | ||
1786 | ret = gpiochip_add(chip); | 1782 | ret = gpiochip_add_data(chip, at91_chip); |
1787 | if (ret) | 1783 | if (ret) |
1788 | goto gpiochip_add_err; | 1784 | goto gpiochip_add_err; |
1789 | 1785 | ||
diff --git a/drivers/pinctrl/pinctrl-coh901.c b/drivers/pinctrl/pinctrl-coh901.c index 813eb7c771ec..cf7788df0f95 100644 --- a/drivers/pinctrl/pinctrl-coh901.c +++ b/drivers/pinctrl/pinctrl-coh901.c | |||
@@ -208,25 +208,16 @@ bs335_gpio_config[U300_GPIO_NUM_PORTS][U300_GPIO_PINS_PER_PORT] = { | |||
208 | } | 208 | } |
209 | }; | 209 | }; |
210 | 210 | ||
211 | /** | ||
212 | * to_u300_gpio() - get the pointer to u300_gpio | ||
213 | * @chip: the gpio chip member of the structure u300_gpio | ||
214 | */ | ||
215 | static inline struct u300_gpio *to_u300_gpio(struct gpio_chip *chip) | ||
216 | { | ||
217 | return container_of(chip, struct u300_gpio, chip); | ||
218 | } | ||
219 | |||
220 | static int u300_gpio_get(struct gpio_chip *chip, unsigned offset) | 211 | static int u300_gpio_get(struct gpio_chip *chip, unsigned offset) |
221 | { | 212 | { |
222 | struct u300_gpio *gpio = to_u300_gpio(chip); | 213 | struct u300_gpio *gpio = gpiochip_get_data(chip); |
223 | 214 | ||
224 | return readl(U300_PIN_REG(offset, dir)) & U300_PIN_BIT(offset); | 215 | return !!(readl(U300_PIN_REG(offset, dir)) & U300_PIN_BIT(offset)); |
225 | } | 216 | } |
226 | 217 | ||
227 | static void u300_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 218 | static void u300_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
228 | { | 219 | { |
229 | struct u300_gpio *gpio = to_u300_gpio(chip); | 220 | struct u300_gpio *gpio = gpiochip_get_data(chip); |
230 | unsigned long flags; | 221 | unsigned long flags; |
231 | u32 val; | 222 | u32 val; |
232 | 223 | ||
@@ -243,7 +234,7 @@ static void u300_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
243 | 234 | ||
244 | static int u300_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 235 | static int u300_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
245 | { | 236 | { |
246 | struct u300_gpio *gpio = to_u300_gpio(chip); | 237 | struct u300_gpio *gpio = gpiochip_get_data(chip); |
247 | unsigned long flags; | 238 | unsigned long flags; |
248 | u32 val; | 239 | u32 val; |
249 | 240 | ||
@@ -259,7 +250,7 @@ static int u300_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
259 | static int u300_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | 250 | static int u300_gpio_direction_output(struct gpio_chip *chip, unsigned offset, |
260 | int value) | 251 | int value) |
261 | { | 252 | { |
262 | struct u300_gpio *gpio = to_u300_gpio(chip); | 253 | struct u300_gpio *gpio = gpiochip_get_data(chip); |
263 | unsigned long flags; | 254 | unsigned long flags; |
264 | u32 oldmode; | 255 | u32 oldmode; |
265 | u32 val; | 256 | u32 val; |
@@ -290,7 +281,7 @@ int u300_gpio_config_get(struct gpio_chip *chip, | |||
290 | unsigned offset, | 281 | unsigned offset, |
291 | unsigned long *config) | 282 | unsigned long *config) |
292 | { | 283 | { |
293 | struct u300_gpio *gpio = to_u300_gpio(chip); | 284 | struct u300_gpio *gpio = gpiochip_get_data(chip); |
294 | enum pin_config_param param = (enum pin_config_param) *config; | 285 | enum pin_config_param param = (enum pin_config_param) *config; |
295 | bool biasmode; | 286 | bool biasmode; |
296 | u32 drmode; | 287 | u32 drmode; |
@@ -348,7 +339,7 @@ int u300_gpio_config_get(struct gpio_chip *chip, | |||
348 | int u300_gpio_config_set(struct gpio_chip *chip, unsigned offset, | 339 | int u300_gpio_config_set(struct gpio_chip *chip, unsigned offset, |
349 | enum pin_config_param param) | 340 | enum pin_config_param param) |
350 | { | 341 | { |
351 | struct u300_gpio *gpio = to_u300_gpio(chip); | 342 | struct u300_gpio *gpio = gpiochip_get_data(chip); |
352 | unsigned long flags; | 343 | unsigned long flags; |
353 | u32 val; | 344 | u32 val; |
354 | 345 | ||
@@ -429,7 +420,7 @@ static void u300_toggle_trigger(struct u300_gpio *gpio, unsigned offset) | |||
429 | static int u300_gpio_irq_type(struct irq_data *d, unsigned trigger) | 420 | static int u300_gpio_irq_type(struct irq_data *d, unsigned trigger) |
430 | { | 421 | { |
431 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | 422 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
432 | struct u300_gpio *gpio = to_u300_gpio(chip); | 423 | struct u300_gpio *gpio = gpiochip_get_data(chip); |
433 | struct u300_gpio_port *port = &gpio->ports[d->hwirq >> 3]; | 424 | struct u300_gpio_port *port = &gpio->ports[d->hwirq >> 3]; |
434 | int offset = d->hwirq; | 425 | int offset = d->hwirq; |
435 | u32 val; | 426 | u32 val; |
@@ -466,7 +457,7 @@ static int u300_gpio_irq_type(struct irq_data *d, unsigned trigger) | |||
466 | static void u300_gpio_irq_enable(struct irq_data *d) | 457 | static void u300_gpio_irq_enable(struct irq_data *d) |
467 | { | 458 | { |
468 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | 459 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
469 | struct u300_gpio *gpio = to_u300_gpio(chip); | 460 | struct u300_gpio *gpio = gpiochip_get_data(chip); |
470 | struct u300_gpio_port *port = &gpio->ports[d->hwirq >> 3]; | 461 | struct u300_gpio_port *port = &gpio->ports[d->hwirq >> 3]; |
471 | int offset = d->hwirq; | 462 | int offset = d->hwirq; |
472 | u32 val; | 463 | u32 val; |
@@ -483,7 +474,7 @@ static void u300_gpio_irq_enable(struct irq_data *d) | |||
483 | static void u300_gpio_irq_disable(struct irq_data *d) | 474 | static void u300_gpio_irq_disable(struct irq_data *d) |
484 | { | 475 | { |
485 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | 476 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
486 | struct u300_gpio *gpio = to_u300_gpio(chip); | 477 | struct u300_gpio *gpio = gpiochip_get_data(chip); |
487 | int offset = d->hwirq; | 478 | int offset = d->hwirq; |
488 | u32 val; | 479 | u32 val; |
489 | unsigned long flags; | 480 | unsigned long flags; |
@@ -506,7 +497,7 @@ static void u300_gpio_irq_handler(struct irq_desc *desc) | |||
506 | unsigned int irq = irq_desc_get_irq(desc); | 497 | unsigned int irq = irq_desc_get_irq(desc); |
507 | struct irq_chip *parent_chip = irq_desc_get_chip(desc); | 498 | struct irq_chip *parent_chip = irq_desc_get_chip(desc); |
508 | struct gpio_chip *chip = irq_desc_get_handler_data(desc); | 499 | struct gpio_chip *chip = irq_desc_get_handler_data(desc); |
509 | struct u300_gpio *gpio = to_u300_gpio(chip); | 500 | struct u300_gpio *gpio = gpiochip_get_data(chip); |
510 | struct u300_gpio_port *port = &gpio->ports[irq - chip->base]; | 501 | struct u300_gpio_port *port = &gpio->ports[irq - chip->base]; |
511 | int pinoffset = port->number << 3; /* get the right stride */ | 502 | int pinoffset = port->number << 3; /* get the right stride */ |
512 | unsigned long val; | 503 | unsigned long val; |
@@ -637,7 +628,7 @@ static int __init u300_gpio_probe(struct platform_device *pdev) | |||
637 | 628 | ||
638 | gpio->chip = u300_gpio_chip; | 629 | gpio->chip = u300_gpio_chip; |
639 | gpio->chip.ngpio = U300_GPIO_NUM_PORTS * U300_GPIO_PINS_PER_PORT; | 630 | gpio->chip.ngpio = U300_GPIO_NUM_PORTS * U300_GPIO_PINS_PER_PORT; |
640 | gpio->chip.dev = &pdev->dev; | 631 | gpio->chip.parent = &pdev->dev; |
641 | gpio->chip.base = 0; | 632 | gpio->chip.base = 0; |
642 | gpio->dev = &pdev->dev; | 633 | gpio->dev = &pdev->dev; |
643 | 634 | ||
@@ -684,7 +675,7 @@ static int __init u300_gpio_probe(struct platform_device *pdev) | |||
684 | #ifdef CONFIG_OF_GPIO | 675 | #ifdef CONFIG_OF_GPIO |
685 | gpio->chip.of_node = pdev->dev.of_node; | 676 | gpio->chip.of_node = pdev->dev.of_node; |
686 | #endif | 677 | #endif |
687 | err = gpiochip_add(&gpio->chip); | 678 | err = gpiochip_add_data(&gpio->chip, gpio); |
688 | if (err) { | 679 | if (err) { |
689 | dev_err(gpio->dev, "unable to add gpiochip: %d\n", err); | 680 | dev_err(gpio->dev, "unable to add gpiochip: %d\n", err); |
690 | goto err_no_chip; | 681 | goto err_no_chip; |
diff --git a/drivers/pinctrl/pinctrl-digicolor.c b/drivers/pinctrl/pinctrl-digicolor.c index 38a7799f8257..f1343d6ca823 100644 --- a/drivers/pinctrl/pinctrl-digicolor.c +++ b/drivers/pinctrl/pinctrl-digicolor.c | |||
@@ -171,7 +171,7 @@ static struct pinmux_ops dc_pmxops = { | |||
171 | 171 | ||
172 | static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | 172 | static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) |
173 | { | 173 | { |
174 | struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip); | 174 | struct dc_pinmap *pmap = gpiochip_get_data(chip); |
175 | int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION); | 175 | int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION); |
176 | int bit_off = gpio % PINS_PER_COLLECTION; | 176 | int bit_off = gpio % PINS_PER_COLLECTION; |
177 | u8 drive; | 177 | u8 drive; |
@@ -191,7 +191,7 @@ static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value); | |||
191 | static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, | 191 | static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, |
192 | int value) | 192 | int value) |
193 | { | 193 | { |
194 | struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip); | 194 | struct dc_pinmap *pmap = gpiochip_get_data(chip); |
195 | int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION); | 195 | int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION); |
196 | int bit_off = gpio % PINS_PER_COLLECTION; | 196 | int bit_off = gpio % PINS_PER_COLLECTION; |
197 | u8 drive; | 197 | u8 drive; |
@@ -210,7 +210,7 @@ static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, | |||
210 | 210 | ||
211 | static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio) | 211 | static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio) |
212 | { | 212 | { |
213 | struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip); | 213 | struct dc_pinmap *pmap = gpiochip_get_data(chip); |
214 | int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION); | 214 | int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION); |
215 | int bit_off = gpio % PINS_PER_COLLECTION; | 215 | int bit_off = gpio % PINS_PER_COLLECTION; |
216 | u8 input; | 216 | u8 input; |
@@ -222,7 +222,7 @@ static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio) | |||
222 | 222 | ||
223 | static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value) | 223 | static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value) |
224 | { | 224 | { |
225 | struct dc_pinmap *pmap = container_of(chip, struct dc_pinmap, chip); | 225 | struct dc_pinmap *pmap = gpiochip_get_data(chip); |
226 | int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION); | 226 | int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION); |
227 | int bit_off = gpio % PINS_PER_COLLECTION; | 227 | int bit_off = gpio % PINS_PER_COLLECTION; |
228 | u8 output; | 228 | u8 output; |
@@ -244,7 +244,7 @@ static int dc_gpiochip_add(struct dc_pinmap *pmap, struct device_node *np) | |||
244 | int ret; | 244 | int ret; |
245 | 245 | ||
246 | chip->label = DRIVER_NAME; | 246 | chip->label = DRIVER_NAME; |
247 | chip->dev = pmap->dev; | 247 | chip->parent = pmap->dev; |
248 | chip->request = gpiochip_generic_request; | 248 | chip->request = gpiochip_generic_request; |
249 | chip->free = gpiochip_generic_free; | 249 | chip->free = gpiochip_generic_free; |
250 | chip->direction_input = dc_gpio_direction_input; | 250 | chip->direction_input = dc_gpio_direction_input; |
@@ -258,7 +258,7 @@ static int dc_gpiochip_add(struct dc_pinmap *pmap, struct device_node *np) | |||
258 | 258 | ||
259 | spin_lock_init(&pmap->lock); | 259 | spin_lock_init(&pmap->lock); |
260 | 260 | ||
261 | ret = gpiochip_add(chip); | 261 | ret = gpiochip_add_data(chip, pmap); |
262 | if (ret < 0) | 262 | if (ret < 0) |
263 | return ret; | 263 | return ret; |
264 | 264 | ||
diff --git a/drivers/pinctrl/pinctrl-pistachio.c b/drivers/pinctrl/pinctrl-pistachio.c index 85c9046c690e..856f736cb1a6 100644 --- a/drivers/pinctrl/pinctrl-pistachio.c +++ b/drivers/pinctrl/pinctrl-pistachio.c | |||
@@ -842,14 +842,9 @@ static inline void pctl_writel(struct pistachio_pinctrl *pctl, u32 val, u32 reg) | |||
842 | writel(val, pctl->base + reg); | 842 | writel(val, pctl->base + reg); |
843 | } | 843 | } |
844 | 844 | ||
845 | static inline struct pistachio_gpio_bank *gc_to_bank(struct gpio_chip *gc) | ||
846 | { | ||
847 | return container_of(gc, struct pistachio_gpio_bank, gpio_chip); | ||
848 | } | ||
849 | |||
850 | static inline struct pistachio_gpio_bank *irqd_to_bank(struct irq_data *d) | 845 | static inline struct pistachio_gpio_bank *irqd_to_bank(struct irq_data *d) |
851 | { | 846 | { |
852 | return gc_to_bank(irq_data_get_irq_chip_data(d)); | 847 | return gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
853 | } | 848 | } |
854 | 849 | ||
855 | static inline u32 gpio_readl(struct pistachio_gpio_bank *bank, u32 reg) | 850 | static inline u32 gpio_readl(struct pistachio_gpio_bank *bank, u32 reg) |
@@ -992,7 +987,7 @@ static int pistachio_pinmux_enable(struct pinctrl_dev *pctldev, | |||
992 | 987 | ||
993 | range = pinctrl_find_gpio_range_from_pin(pctl->pctldev, pg->pin); | 988 | range = pinctrl_find_gpio_range_from_pin(pctl->pctldev, pg->pin); |
994 | if (range) | 989 | if (range) |
995 | gpio_disable(gc_to_bank(range->gc), pg->pin - range->pin_base); | 990 | gpio_disable(gpiochip_get_data(range->gc), pg->pin - range->pin_base); |
996 | 991 | ||
997 | return 0; | 992 | return 0; |
998 | } | 993 | } |
@@ -1173,14 +1168,14 @@ static struct pinctrl_desc pistachio_pinctrl_desc = { | |||
1173 | 1168 | ||
1174 | static int pistachio_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | 1169 | static int pistachio_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
1175 | { | 1170 | { |
1176 | struct pistachio_gpio_bank *bank = gc_to_bank(chip); | 1171 | struct pistachio_gpio_bank *bank = gpiochip_get_data(chip); |
1177 | 1172 | ||
1178 | return !(gpio_readl(bank, GPIO_OUTPUT_EN) & BIT(offset)); | 1173 | return !(gpio_readl(bank, GPIO_OUTPUT_EN) & BIT(offset)); |
1179 | } | 1174 | } |
1180 | 1175 | ||
1181 | static int pistachio_gpio_get(struct gpio_chip *chip, unsigned offset) | 1176 | static int pistachio_gpio_get(struct gpio_chip *chip, unsigned offset) |
1182 | { | 1177 | { |
1183 | struct pistachio_gpio_bank *bank = gc_to_bank(chip); | 1178 | struct pistachio_gpio_bank *bank = gpiochip_get_data(chip); |
1184 | u32 reg; | 1179 | u32 reg; |
1185 | 1180 | ||
1186 | if (gpio_readl(bank, GPIO_OUTPUT_EN) & BIT(offset)) | 1181 | if (gpio_readl(bank, GPIO_OUTPUT_EN) & BIT(offset)) |
@@ -1194,7 +1189,7 @@ static int pistachio_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
1194 | static void pistachio_gpio_set(struct gpio_chip *chip, unsigned offset, | 1189 | static void pistachio_gpio_set(struct gpio_chip *chip, unsigned offset, |
1195 | int value) | 1190 | int value) |
1196 | { | 1191 | { |
1197 | struct pistachio_gpio_bank *bank = gc_to_bank(chip); | 1192 | struct pistachio_gpio_bank *bank = gpiochip_get_data(chip); |
1198 | 1193 | ||
1199 | gpio_mask_writel(bank, GPIO_OUTPUT, offset, !!value); | 1194 | gpio_mask_writel(bank, GPIO_OUTPUT, offset, !!value); |
1200 | } | 1195 | } |
@@ -1202,7 +1197,7 @@ static void pistachio_gpio_set(struct gpio_chip *chip, unsigned offset, | |||
1202 | static int pistachio_gpio_direction_input(struct gpio_chip *chip, | 1197 | static int pistachio_gpio_direction_input(struct gpio_chip *chip, |
1203 | unsigned offset) | 1198 | unsigned offset) |
1204 | { | 1199 | { |
1205 | struct pistachio_gpio_bank *bank = gc_to_bank(chip); | 1200 | struct pistachio_gpio_bank *bank = gpiochip_get_data(chip); |
1206 | 1201 | ||
1207 | gpio_mask_writel(bank, GPIO_OUTPUT_EN, offset, 0); | 1202 | gpio_mask_writel(bank, GPIO_OUTPUT_EN, offset, 0); |
1208 | gpio_enable(bank, offset); | 1203 | gpio_enable(bank, offset); |
@@ -1213,7 +1208,7 @@ static int pistachio_gpio_direction_input(struct gpio_chip *chip, | |||
1213 | static int pistachio_gpio_direction_output(struct gpio_chip *chip, | 1208 | static int pistachio_gpio_direction_output(struct gpio_chip *chip, |
1214 | unsigned offset, int value) | 1209 | unsigned offset, int value) |
1215 | { | 1210 | { |
1216 | struct pistachio_gpio_bank *bank = gc_to_bank(chip); | 1211 | struct pistachio_gpio_bank *bank = gpiochip_get_data(chip); |
1217 | 1212 | ||
1218 | pistachio_gpio_set(chip, offset, value); | 1213 | pistachio_gpio_set(chip, offset, value); |
1219 | gpio_mask_writel(bank, GPIO_OUTPUT_EN, offset, 1); | 1214 | gpio_mask_writel(bank, GPIO_OUTPUT_EN, offset, 1); |
@@ -1303,7 +1298,7 @@ static int pistachio_gpio_irq_set_type(struct irq_data *data, unsigned int type) | |||
1303 | static void pistachio_gpio_irq_handler(struct irq_desc *desc) | 1298 | static void pistachio_gpio_irq_handler(struct irq_desc *desc) |
1304 | { | 1299 | { |
1305 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 1300 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
1306 | struct pistachio_gpio_bank *bank = gc_to_bank(gc); | 1301 | struct pistachio_gpio_bank *bank = gpiochip_get_data(gc); |
1307 | struct irq_chip *chip = irq_desc_get_chip(desc); | 1302 | struct irq_chip *chip = irq_desc_get_chip(desc); |
1308 | unsigned long pending; | 1303 | unsigned long pending; |
1309 | unsigned int pin; | 1304 | unsigned int pin; |
@@ -1388,9 +1383,9 @@ static int pistachio_gpio_register(struct pistachio_pinctrl *pctl) | |||
1388 | bank->pctl = pctl; | 1383 | bank->pctl = pctl; |
1389 | bank->base = pctl->base + GPIO_BANK_BASE(i); | 1384 | bank->base = pctl->base + GPIO_BANK_BASE(i); |
1390 | 1385 | ||
1391 | bank->gpio_chip.dev = pctl->dev; | 1386 | bank->gpio_chip.parent = pctl->dev; |
1392 | bank->gpio_chip.of_node = child; | 1387 | bank->gpio_chip.of_node = child; |
1393 | ret = gpiochip_add(&bank->gpio_chip); | 1388 | ret = gpiochip_add_data(&bank->gpio_chip, bank); |
1394 | if (ret < 0) { | 1389 | if (ret < 0) { |
1395 | dev_err(pctl->dev, "Failed to add GPIO chip %u: %d\n", | 1390 | dev_err(pctl->dev, "Failed to add GPIO chip %u: %d\n", |
1396 | i, ret); | 1391 | i, ret); |
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 91288265e856..183545a068ad 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c | |||
@@ -224,11 +224,6 @@ static struct regmap_config rockchip_regmap_config = { | |||
224 | .reg_stride = 4, | 224 | .reg_stride = 4, |
225 | }; | 225 | }; |
226 | 226 | ||
227 | static inline struct rockchip_pin_bank *gc_to_pin_bank(struct gpio_chip *gc) | ||
228 | { | ||
229 | return container_of(gc, struct rockchip_pin_bank, gpio_chip); | ||
230 | } | ||
231 | |||
232 | static const inline struct rockchip_pin_group *pinctrl_name_to_group( | 227 | static const inline struct rockchip_pin_group *pinctrl_name_to_group( |
233 | const struct rockchip_pinctrl *info, | 228 | const struct rockchip_pinctrl *info, |
234 | const char *name) | 229 | const char *name) |
@@ -973,7 +968,7 @@ static int _rockchip_pmx_gpio_set_direction(struct gpio_chip *chip, | |||
973 | unsigned long flags; | 968 | unsigned long flags; |
974 | u32 data; | 969 | u32 data; |
975 | 970 | ||
976 | bank = gc_to_pin_bank(chip); | 971 | bank = gpiochip_get_data(chip); |
977 | 972 | ||
978 | ret = rockchip_set_mux(bank, pin, RK_FUNC_GPIO); | 973 | ret = rockchip_set_mux(bank, pin, RK_FUNC_GPIO); |
979 | if (ret < 0) | 974 | if (ret < 0) |
@@ -1413,7 +1408,7 @@ static int rockchip_pinctrl_register(struct platform_device *pdev, | |||
1413 | 1408 | ||
1414 | static void rockchip_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | 1409 | static void rockchip_gpio_set(struct gpio_chip *gc, unsigned offset, int value) |
1415 | { | 1410 | { |
1416 | struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); | 1411 | struct rockchip_pin_bank *bank = gpiochip_get_data(gc); |
1417 | void __iomem *reg = bank->reg_base + GPIO_SWPORT_DR; | 1412 | void __iomem *reg = bank->reg_base + GPIO_SWPORT_DR; |
1418 | unsigned long flags; | 1413 | unsigned long flags; |
1419 | u32 data; | 1414 | u32 data; |
@@ -1437,7 +1432,7 @@ static void rockchip_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |||
1437 | */ | 1432 | */ |
1438 | static int rockchip_gpio_get(struct gpio_chip *gc, unsigned offset) | 1433 | static int rockchip_gpio_get(struct gpio_chip *gc, unsigned offset) |
1439 | { | 1434 | { |
1440 | struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); | 1435 | struct rockchip_pin_bank *bank = gpiochip_get_data(gc); |
1441 | u32 data; | 1436 | u32 data; |
1442 | 1437 | ||
1443 | clk_enable(bank->clk); | 1438 | clk_enable(bank->clk); |
@@ -1476,7 +1471,7 @@ static int rockchip_gpio_direction_output(struct gpio_chip *gc, | |||
1476 | */ | 1471 | */ |
1477 | static int rockchip_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 1472 | static int rockchip_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
1478 | { | 1473 | { |
1479 | struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); | 1474 | struct rockchip_pin_bank *bank = gpiochip_get_data(gc); |
1480 | unsigned int virq; | 1475 | unsigned int virq; |
1481 | 1476 | ||
1482 | if (!bank->domain) | 1477 | if (!bank->domain) |
@@ -1791,11 +1786,11 @@ static int rockchip_gpiolib_register(struct platform_device *pdev, | |||
1791 | gc = &bank->gpio_chip; | 1786 | gc = &bank->gpio_chip; |
1792 | gc->base = bank->pin_base; | 1787 | gc->base = bank->pin_base; |
1793 | gc->ngpio = bank->nr_pins; | 1788 | gc->ngpio = bank->nr_pins; |
1794 | gc->dev = &pdev->dev; | 1789 | gc->parent = &pdev->dev; |
1795 | gc->of_node = bank->of_node; | 1790 | gc->of_node = bank->of_node; |
1796 | gc->label = bank->name; | 1791 | gc->label = bank->name; |
1797 | 1792 | ||
1798 | ret = gpiochip_add(gc); | 1793 | ret = gpiochip_add_data(gc, bank); |
1799 | if (ret) { | 1794 | if (ret) { |
1800 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", | 1795 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", |
1801 | gc->label, ret); | 1796 | gc->label, ret); |
diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c index b58d3f29148a..fac844a85cb4 100644 --- a/drivers/pinctrl/pinctrl-st.c +++ b/drivers/pinctrl/pinctrl-st.c | |||
@@ -203,9 +203,6 @@ | |||
203 | #define gpio_range_to_bank(chip) \ | 203 | #define gpio_range_to_bank(chip) \ |
204 | container_of(chip, struct st_gpio_bank, range) | 204 | container_of(chip, struct st_gpio_bank, range) |
205 | 205 | ||
206 | #define gpio_chip_to_bank(chip) \ | ||
207 | container_of(chip, struct st_gpio_bank, gpio_chip) | ||
208 | |||
209 | #define pc_to_bank(pc) \ | 206 | #define pc_to_bank(pc) \ |
210 | container_of(pc, struct st_gpio_bank, pc) | 207 | container_of(pc, struct st_gpio_bank, pc) |
211 | 208 | ||
@@ -744,14 +741,14 @@ static void st_gpio_direction(struct st_gpio_bank *bank, | |||
744 | 741 | ||
745 | static int st_gpio_get(struct gpio_chip *chip, unsigned offset) | 742 | static int st_gpio_get(struct gpio_chip *chip, unsigned offset) |
746 | { | 743 | { |
747 | struct st_gpio_bank *bank = gpio_chip_to_bank(chip); | 744 | struct st_gpio_bank *bank = gpiochip_get_data(chip); |
748 | 745 | ||
749 | return !!(readl(bank->base + REG_PIO_PIN) & BIT(offset)); | 746 | return !!(readl(bank->base + REG_PIO_PIN) & BIT(offset)); |
750 | } | 747 | } |
751 | 748 | ||
752 | static void st_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 749 | static void st_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
753 | { | 750 | { |
754 | struct st_gpio_bank *bank = gpio_chip_to_bank(chip); | 751 | struct st_gpio_bank *bank = gpiochip_get_data(chip); |
755 | __st_gpio_set(bank, offset, value); | 752 | __st_gpio_set(bank, offset, value); |
756 | } | 753 | } |
757 | 754 | ||
@@ -765,7 +762,7 @@ static int st_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
765 | static int st_gpio_direction_output(struct gpio_chip *chip, | 762 | static int st_gpio_direction_output(struct gpio_chip *chip, |
766 | unsigned offset, int value) | 763 | unsigned offset, int value) |
767 | { | 764 | { |
768 | struct st_gpio_bank *bank = gpio_chip_to_bank(chip); | 765 | struct st_gpio_bank *bank = gpiochip_get_data(chip); |
769 | 766 | ||
770 | __st_gpio_set(bank, offset, value); | 767 | __st_gpio_set(bank, offset, value); |
771 | pinctrl_gpio_direction_output(chip->base + offset); | 768 | pinctrl_gpio_direction_output(chip->base + offset); |
@@ -775,7 +772,7 @@ static int st_gpio_direction_output(struct gpio_chip *chip, | |||
775 | 772 | ||
776 | static int st_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | 773 | static int st_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
777 | { | 774 | { |
778 | struct st_gpio_bank *bank = gpio_chip_to_bank(chip); | 775 | struct st_gpio_bank *bank = gpiochip_get_data(chip); |
779 | struct st_pio_control pc = bank->pc; | 776 | struct st_pio_control pc = bank->pc; |
780 | unsigned long config; | 777 | unsigned long config; |
781 | unsigned int direction = 0; | 778 | unsigned int direction = 0; |
@@ -1325,7 +1322,7 @@ static int st_pctl_parse_functions(struct device_node *np, | |||
1325 | static void st_gpio_irq_mask(struct irq_data *d) | 1322 | static void st_gpio_irq_mask(struct irq_data *d) |
1326 | { | 1323 | { |
1327 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 1324 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
1328 | struct st_gpio_bank *bank = gpio_chip_to_bank(gc); | 1325 | struct st_gpio_bank *bank = gpiochip_get_data(gc); |
1329 | 1326 | ||
1330 | writel(BIT(d->hwirq), bank->base + REG_PIO_CLR_PMASK); | 1327 | writel(BIT(d->hwirq), bank->base + REG_PIO_CLR_PMASK); |
1331 | } | 1328 | } |
@@ -1333,7 +1330,7 @@ static void st_gpio_irq_mask(struct irq_data *d) | |||
1333 | static void st_gpio_irq_unmask(struct irq_data *d) | 1330 | static void st_gpio_irq_unmask(struct irq_data *d) |
1334 | { | 1331 | { |
1335 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 1332 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
1336 | struct st_gpio_bank *bank = gpio_chip_to_bank(gc); | 1333 | struct st_gpio_bank *bank = gpiochip_get_data(gc); |
1337 | 1334 | ||
1338 | writel(BIT(d->hwirq), bank->base + REG_PIO_SET_PMASK); | 1335 | writel(BIT(d->hwirq), bank->base + REG_PIO_SET_PMASK); |
1339 | } | 1336 | } |
@@ -1341,7 +1338,7 @@ static void st_gpio_irq_unmask(struct irq_data *d) | |||
1341 | static int st_gpio_irq_set_type(struct irq_data *d, unsigned type) | 1338 | static int st_gpio_irq_set_type(struct irq_data *d, unsigned type) |
1342 | { | 1339 | { |
1343 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 1340 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
1344 | struct st_gpio_bank *bank = gpio_chip_to_bank(gc); | 1341 | struct st_gpio_bank *bank = gpiochip_get_data(gc); |
1345 | unsigned long flags; | 1342 | unsigned long flags; |
1346 | int comp, pin = d->hwirq; | 1343 | int comp, pin = d->hwirq; |
1347 | u32 val; | 1344 | u32 val; |
@@ -1455,7 +1452,7 @@ static void st_gpio_irq_handler(struct irq_desc *desc) | |||
1455 | /* interrupt dedicated per bank */ | 1452 | /* interrupt dedicated per bank */ |
1456 | struct irq_chip *chip = irq_desc_get_chip(desc); | 1453 | struct irq_chip *chip = irq_desc_get_chip(desc); |
1457 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 1454 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
1458 | struct st_gpio_bank *bank = gpio_chip_to_bank(gc); | 1455 | struct st_gpio_bank *bank = gpiochip_get_data(gc); |
1459 | 1456 | ||
1460 | chained_irq_enter(chip, desc); | 1457 | chained_irq_enter(chip, desc); |
1461 | __gpio_irq_handler(bank); | 1458 | __gpio_irq_handler(bank); |
@@ -1522,7 +1519,7 @@ static int st_gpiolib_register_bank(struct st_pinctrl *info, | |||
1522 | bank->gpio_chip.base = bank_num * ST_GPIO_PINS_PER_BANK; | 1519 | bank->gpio_chip.base = bank_num * ST_GPIO_PINS_PER_BANK; |
1523 | bank->gpio_chip.ngpio = ST_GPIO_PINS_PER_BANK; | 1520 | bank->gpio_chip.ngpio = ST_GPIO_PINS_PER_BANK; |
1524 | bank->gpio_chip.of_node = np; | 1521 | bank->gpio_chip.of_node = np; |
1525 | bank->gpio_chip.dev = dev; | 1522 | bank->gpio_chip.parent = dev; |
1526 | spin_lock_init(&bank->lock); | 1523 | spin_lock_init(&bank->lock); |
1527 | 1524 | ||
1528 | of_property_read_string(np, "st,bank-name", &range->name); | 1525 | of_property_read_string(np, "st,bank-name", &range->name); |
@@ -1532,7 +1529,7 @@ static int st_gpiolib_register_bank(struct st_pinctrl *info, | |||
1532 | range->pin_base = range->base = range->id * ST_GPIO_PINS_PER_BANK; | 1529 | range->pin_base = range->base = range->id * ST_GPIO_PINS_PER_BANK; |
1533 | range->npins = bank->gpio_chip.ngpio; | 1530 | range->npins = bank->gpio_chip.ngpio; |
1534 | range->gc = &bank->gpio_chip; | 1531 | range->gc = &bank->gpio_chip; |
1535 | err = gpiochip_add(&bank->gpio_chip); | 1532 | err = gpiochip_add_data(&bank->gpio_chip, bank); |
1536 | if (err) { | 1533 | if (err) { |
1537 | dev_err(dev, "Failed to add gpiochip(%d)!\n", bank_num); | 1534 | dev_err(dev, "Failed to add gpiochip(%d)!\n", bank_num); |
1538 | return err; | 1535 | return err; |
diff --git a/drivers/pinctrl/pinctrl-xway.c b/drivers/pinctrl/pinctrl-xway.c index 7db74699fda4..412c6b78140a 100644 --- a/drivers/pinctrl/pinctrl-xway.c +++ b/drivers/pinctrl/pinctrl-xway.c | |||
@@ -1535,7 +1535,7 @@ static struct ltq_pinmux_info xway_info = { | |||
1535 | /* --------- gpio_chip related code --------- */ | 1535 | /* --------- gpio_chip related code --------- */ |
1536 | static void xway_gpio_set(struct gpio_chip *chip, unsigned int pin, int val) | 1536 | static void xway_gpio_set(struct gpio_chip *chip, unsigned int pin, int val) |
1537 | { | 1537 | { |
1538 | struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev); | 1538 | struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); |
1539 | 1539 | ||
1540 | if (val) | 1540 | if (val) |
1541 | gpio_setbit(info->membase[0], GPIO_OUT(pin), PORT_PIN(pin)); | 1541 | gpio_setbit(info->membase[0], GPIO_OUT(pin), PORT_PIN(pin)); |
@@ -1545,14 +1545,14 @@ static void xway_gpio_set(struct gpio_chip *chip, unsigned int pin, int val) | |||
1545 | 1545 | ||
1546 | static int xway_gpio_get(struct gpio_chip *chip, unsigned int pin) | 1546 | static int xway_gpio_get(struct gpio_chip *chip, unsigned int pin) |
1547 | { | 1547 | { |
1548 | struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev); | 1548 | struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); |
1549 | 1549 | ||
1550 | return gpio_getbit(info->membase[0], GPIO_IN(pin), PORT_PIN(pin)); | 1550 | return !!gpio_getbit(info->membase[0], GPIO_IN(pin), PORT_PIN(pin)); |
1551 | } | 1551 | } |
1552 | 1552 | ||
1553 | static int xway_gpio_dir_in(struct gpio_chip *chip, unsigned int pin) | 1553 | static int xway_gpio_dir_in(struct gpio_chip *chip, unsigned int pin) |
1554 | { | 1554 | { |
1555 | struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev); | 1555 | struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); |
1556 | 1556 | ||
1557 | gpio_clearbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin)); | 1557 | gpio_clearbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin)); |
1558 | 1558 | ||
@@ -1561,7 +1561,7 @@ static int xway_gpio_dir_in(struct gpio_chip *chip, unsigned int pin) | |||
1561 | 1561 | ||
1562 | static int xway_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, int val) | 1562 | static int xway_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, int val) |
1563 | { | 1563 | { |
1564 | struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev); | 1564 | struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); |
1565 | 1565 | ||
1566 | if (PORT(pin) == PORT3) | 1566 | if (PORT(pin) == PORT3) |
1567 | gpio_setbit(info->membase[0], GPIO3_OD, PORT_PIN(pin)); | 1567 | gpio_setbit(info->membase[0], GPIO3_OD, PORT_PIN(pin)); |
@@ -1708,7 +1708,7 @@ static int pinmux_xway_probe(struct platform_device *pdev) | |||
1708 | xway_pctrl_desc.pins = xway_info.pads; | 1708 | xway_pctrl_desc.pins = xway_info.pads; |
1709 | 1709 | ||
1710 | /* load the gpio chip */ | 1710 | /* load the gpio chip */ |
1711 | xway_chip.dev = &pdev->dev; | 1711 | xway_chip.parent = &pdev->dev; |
1712 | ret = gpiochip_add(&xway_chip); | 1712 | ret = gpiochip_add(&xway_chip); |
1713 | if (ret) { | 1713 | if (ret) { |
1714 | dev_err(&pdev->dev, "Failed to register gpio chip\n"); | 1714 | dev_err(&pdev->dev, "Failed to register gpio chip\n"); |
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 146264a41ec8..8777cf083eef 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c | |||
@@ -69,11 +69,6 @@ struct msm_pinctrl { | |||
69 | void __iomem *regs; | 69 | void __iomem *regs; |
70 | }; | 70 | }; |
71 | 71 | ||
72 | static inline struct msm_pinctrl *to_msm_pinctrl(struct gpio_chip *gc) | ||
73 | { | ||
74 | return container_of(gc, struct msm_pinctrl, chip); | ||
75 | } | ||
76 | |||
77 | static int msm_get_groups_count(struct pinctrl_dev *pctldev) | 72 | static int msm_get_groups_count(struct pinctrl_dev *pctldev) |
78 | { | 73 | { |
79 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); | 74 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
@@ -381,7 +376,7 @@ static struct pinctrl_desc msm_pinctrl_desc = { | |||
381 | static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 376 | static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
382 | { | 377 | { |
383 | const struct msm_pingroup *g; | 378 | const struct msm_pingroup *g; |
384 | struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip); | 379 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
385 | unsigned long flags; | 380 | unsigned long flags; |
386 | u32 val; | 381 | u32 val; |
387 | 382 | ||
@@ -401,7 +396,7 @@ static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
401 | static int msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) | 396 | static int msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) |
402 | { | 397 | { |
403 | const struct msm_pingroup *g; | 398 | const struct msm_pingroup *g; |
404 | struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip); | 399 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
405 | unsigned long flags; | 400 | unsigned long flags; |
406 | u32 val; | 401 | u32 val; |
407 | 402 | ||
@@ -428,7 +423,7 @@ static int msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, in | |||
428 | static int msm_gpio_get(struct gpio_chip *chip, unsigned offset) | 423 | static int msm_gpio_get(struct gpio_chip *chip, unsigned offset) |
429 | { | 424 | { |
430 | const struct msm_pingroup *g; | 425 | const struct msm_pingroup *g; |
431 | struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip); | 426 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
432 | u32 val; | 427 | u32 val; |
433 | 428 | ||
434 | g = &pctrl->soc->groups[offset]; | 429 | g = &pctrl->soc->groups[offset]; |
@@ -440,7 +435,7 @@ static int msm_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
440 | static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 435 | static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
441 | { | 436 | { |
442 | const struct msm_pingroup *g; | 437 | const struct msm_pingroup *g; |
443 | struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip); | 438 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
444 | unsigned long flags; | 439 | unsigned long flags; |
445 | u32 val; | 440 | u32 val; |
446 | 441 | ||
@@ -468,7 +463,7 @@ static void msm_gpio_dbg_show_one(struct seq_file *s, | |||
468 | unsigned gpio) | 463 | unsigned gpio) |
469 | { | 464 | { |
470 | const struct msm_pingroup *g; | 465 | const struct msm_pingroup *g; |
471 | struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip); | 466 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
472 | unsigned func; | 467 | unsigned func; |
473 | int is_out; | 468 | int is_out; |
474 | int drive; | 469 | int drive; |
@@ -567,7 +562,7 @@ static void msm_gpio_update_dual_edge_pos(struct msm_pinctrl *pctrl, | |||
567 | static void msm_gpio_irq_mask(struct irq_data *d) | 562 | static void msm_gpio_irq_mask(struct irq_data *d) |
568 | { | 563 | { |
569 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 564 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
570 | struct msm_pinctrl *pctrl = to_msm_pinctrl(gc); | 565 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
571 | const struct msm_pingroup *g; | 566 | const struct msm_pingroup *g; |
572 | unsigned long flags; | 567 | unsigned long flags; |
573 | u32 val; | 568 | u32 val; |
@@ -588,7 +583,7 @@ static void msm_gpio_irq_mask(struct irq_data *d) | |||
588 | static void msm_gpio_irq_unmask(struct irq_data *d) | 583 | static void msm_gpio_irq_unmask(struct irq_data *d) |
589 | { | 584 | { |
590 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 585 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
591 | struct msm_pinctrl *pctrl = to_msm_pinctrl(gc); | 586 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
592 | const struct msm_pingroup *g; | 587 | const struct msm_pingroup *g; |
593 | unsigned long flags; | 588 | unsigned long flags; |
594 | u32 val; | 589 | u32 val; |
@@ -613,7 +608,7 @@ static void msm_gpio_irq_unmask(struct irq_data *d) | |||
613 | static void msm_gpio_irq_ack(struct irq_data *d) | 608 | static void msm_gpio_irq_ack(struct irq_data *d) |
614 | { | 609 | { |
615 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 610 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
616 | struct msm_pinctrl *pctrl = to_msm_pinctrl(gc); | 611 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
617 | const struct msm_pingroup *g; | 612 | const struct msm_pingroup *g; |
618 | unsigned long flags; | 613 | unsigned long flags; |
619 | u32 val; | 614 | u32 val; |
@@ -638,7 +633,7 @@ static void msm_gpio_irq_ack(struct irq_data *d) | |||
638 | static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) | 633 | static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) |
639 | { | 634 | { |
640 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 635 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
641 | struct msm_pinctrl *pctrl = to_msm_pinctrl(gc); | 636 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
642 | const struct msm_pingroup *g; | 637 | const struct msm_pingroup *g; |
643 | unsigned long flags; | 638 | unsigned long flags; |
644 | u32 val; | 639 | u32 val; |
@@ -732,7 +727,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
732 | static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) | 727 | static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) |
733 | { | 728 | { |
734 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 729 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
735 | struct msm_pinctrl *pctrl = to_msm_pinctrl(gc); | 730 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
736 | unsigned long flags; | 731 | unsigned long flags; |
737 | 732 | ||
738 | spin_lock_irqsave(&pctrl->lock, flags); | 733 | spin_lock_irqsave(&pctrl->lock, flags); |
@@ -757,7 +752,7 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) | |||
757 | { | 752 | { |
758 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 753 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
759 | const struct msm_pingroup *g; | 754 | const struct msm_pingroup *g; |
760 | struct msm_pinctrl *pctrl = to_msm_pinctrl(gc); | 755 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
761 | struct irq_chip *chip = irq_desc_get_chip(desc); | 756 | struct irq_chip *chip = irq_desc_get_chip(desc); |
762 | int irq_pin; | 757 | int irq_pin; |
763 | int handled = 0; | 758 | int handled = 0; |
@@ -800,11 +795,11 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) | |||
800 | chip->base = 0; | 795 | chip->base = 0; |
801 | chip->ngpio = ngpio; | 796 | chip->ngpio = ngpio; |
802 | chip->label = dev_name(pctrl->dev); | 797 | chip->label = dev_name(pctrl->dev); |
803 | chip->dev = pctrl->dev; | 798 | chip->parent = pctrl->dev; |
804 | chip->owner = THIS_MODULE; | 799 | chip->owner = THIS_MODULE; |
805 | chip->of_node = pctrl->dev->of_node; | 800 | chip->of_node = pctrl->dev->of_node; |
806 | 801 | ||
807 | ret = gpiochip_add(&pctrl->chip); | 802 | ret = gpiochip_add_data(&pctrl->chip, pctrl); |
808 | if (ret) { | 803 | if (ret) { |
809 | dev_err(pctrl->dev, "Failed register gpiochip\n"); | 804 | dev_err(pctrl->dev, "Failed register gpiochip\n"); |
810 | return ret; | 805 | return ret; |
diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index 77f6a5cb1008..4e12ded3c773 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | |||
@@ -159,11 +159,6 @@ static const char *const pmic_gpio_functions[] = { | |||
159 | PMIC_GPIO_FUNC_DTEST3, PMIC_GPIO_FUNC_DTEST4, | 159 | PMIC_GPIO_FUNC_DTEST3, PMIC_GPIO_FUNC_DTEST4, |
160 | }; | 160 | }; |
161 | 161 | ||
162 | static inline struct pmic_gpio_state *to_gpio_state(struct gpio_chip *chip) | ||
163 | { | ||
164 | return container_of(chip, struct pmic_gpio_state, chip); | ||
165 | }; | ||
166 | |||
167 | static int pmic_gpio_read(struct pmic_gpio_state *state, | 162 | static int pmic_gpio_read(struct pmic_gpio_state *state, |
168 | struct pmic_gpio_pad *pad, unsigned int addr) | 163 | struct pmic_gpio_pad *pad, unsigned int addr) |
169 | { | 164 | { |
@@ -496,7 +491,7 @@ static const struct pinconf_ops pmic_gpio_pinconf_ops = { | |||
496 | 491 | ||
497 | static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned pin) | 492 | static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned pin) |
498 | { | 493 | { |
499 | struct pmic_gpio_state *state = to_gpio_state(chip); | 494 | struct pmic_gpio_state *state = gpiochip_get_data(chip); |
500 | unsigned long config; | 495 | unsigned long config; |
501 | 496 | ||
502 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE, 1); | 497 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE, 1); |
@@ -507,7 +502,7 @@ static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned pin) | |||
507 | static int pmic_gpio_direction_output(struct gpio_chip *chip, | 502 | static int pmic_gpio_direction_output(struct gpio_chip *chip, |
508 | unsigned pin, int val) | 503 | unsigned pin, int val) |
509 | { | 504 | { |
510 | struct pmic_gpio_state *state = to_gpio_state(chip); | 505 | struct pmic_gpio_state *state = gpiochip_get_data(chip); |
511 | unsigned long config; | 506 | unsigned long config; |
512 | 507 | ||
513 | config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val); | 508 | config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val); |
@@ -517,7 +512,7 @@ static int pmic_gpio_direction_output(struct gpio_chip *chip, | |||
517 | 512 | ||
518 | static int pmic_gpio_get(struct gpio_chip *chip, unsigned pin) | 513 | static int pmic_gpio_get(struct gpio_chip *chip, unsigned pin) |
519 | { | 514 | { |
520 | struct pmic_gpio_state *state = to_gpio_state(chip); | 515 | struct pmic_gpio_state *state = gpiochip_get_data(chip); |
521 | struct pmic_gpio_pad *pad; | 516 | struct pmic_gpio_pad *pad; |
522 | int ret; | 517 | int ret; |
523 | 518 | ||
@@ -534,12 +529,12 @@ static int pmic_gpio_get(struct gpio_chip *chip, unsigned pin) | |||
534 | pad->out_value = ret & PMIC_MPP_REG_RT_STS_VAL_MASK; | 529 | pad->out_value = ret & PMIC_MPP_REG_RT_STS_VAL_MASK; |
535 | } | 530 | } |
536 | 531 | ||
537 | return pad->out_value; | 532 | return !!pad->out_value; |
538 | } | 533 | } |
539 | 534 | ||
540 | static void pmic_gpio_set(struct gpio_chip *chip, unsigned pin, int value) | 535 | static void pmic_gpio_set(struct gpio_chip *chip, unsigned pin, int value) |
541 | { | 536 | { |
542 | struct pmic_gpio_state *state = to_gpio_state(chip); | 537 | struct pmic_gpio_state *state = gpiochip_get_data(chip); |
543 | unsigned long config; | 538 | unsigned long config; |
544 | 539 | ||
545 | config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value); | 540 | config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value); |
@@ -562,7 +557,7 @@ static int pmic_gpio_of_xlate(struct gpio_chip *chip, | |||
562 | 557 | ||
563 | static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned pin) | 558 | static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned pin) |
564 | { | 559 | { |
565 | struct pmic_gpio_state *state = to_gpio_state(chip); | 560 | struct pmic_gpio_state *state = gpiochip_get_data(chip); |
566 | struct pmic_gpio_pad *pad; | 561 | struct pmic_gpio_pad *pad; |
567 | 562 | ||
568 | pad = state->ctrl->desc->pins[pin].drv_data; | 563 | pad = state->ctrl->desc->pins[pin].drv_data; |
@@ -572,7 +567,7 @@ static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned pin) | |||
572 | 567 | ||
573 | static void pmic_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | 568 | static void pmic_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
574 | { | 569 | { |
575 | struct pmic_gpio_state *state = to_gpio_state(chip); | 570 | struct pmic_gpio_state *state = gpiochip_get_data(chip); |
576 | unsigned i; | 571 | unsigned i; |
577 | 572 | ||
578 | for (i = 0; i < chip->ngpio; i++) { | 573 | for (i = 0; i < chip->ngpio; i++) { |
@@ -762,7 +757,7 @@ static int pmic_gpio_probe(struct platform_device *pdev) | |||
762 | } | 757 | } |
763 | 758 | ||
764 | state->chip = pmic_gpio_gpio_template; | 759 | state->chip = pmic_gpio_gpio_template; |
765 | state->chip.dev = dev; | 760 | state->chip.parent = dev; |
766 | state->chip.base = -1; | 761 | state->chip.base = -1; |
767 | state->chip.ngpio = npins; | 762 | state->chip.ngpio = npins; |
768 | state->chip.label = dev_name(dev); | 763 | state->chip.label = dev_name(dev); |
@@ -773,7 +768,7 @@ static int pmic_gpio_probe(struct platform_device *pdev) | |||
773 | if (IS_ERR(state->ctrl)) | 768 | if (IS_ERR(state->ctrl)) |
774 | return PTR_ERR(state->ctrl); | 769 | return PTR_ERR(state->ctrl); |
775 | 770 | ||
776 | ret = gpiochip_add(&state->chip); | 771 | ret = gpiochip_add_data(&state->chip, state); |
777 | if (ret) { | 772 | if (ret) { |
778 | dev_err(state->dev, "can't add gpio chip\n"); | 773 | dev_err(state->dev, "can't add gpio chip\n"); |
779 | goto err_chip; | 774 | goto err_chip; |
diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c index 2df4f29175ae..2f18323571a6 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | |||
@@ -179,11 +179,6 @@ static const char *const pmic_mpp_functions[] = { | |||
179 | "digital", "analog", "sink" | 179 | "digital", "analog", "sink" |
180 | }; | 180 | }; |
181 | 181 | ||
182 | static inline struct pmic_mpp_state *to_mpp_state(struct gpio_chip *chip) | ||
183 | { | ||
184 | return container_of(chip, struct pmic_mpp_state, chip); | ||
185 | }; | ||
186 | |||
187 | static int pmic_mpp_read(struct pmic_mpp_state *state, | 182 | static int pmic_mpp_read(struct pmic_mpp_state *state, |
188 | struct pmic_mpp_pad *pad, unsigned int addr) | 183 | struct pmic_mpp_pad *pad, unsigned int addr) |
189 | { | 184 | { |
@@ -557,7 +552,7 @@ static const struct pinconf_ops pmic_mpp_pinconf_ops = { | |||
557 | 552 | ||
558 | static int pmic_mpp_direction_input(struct gpio_chip *chip, unsigned pin) | 553 | static int pmic_mpp_direction_input(struct gpio_chip *chip, unsigned pin) |
559 | { | 554 | { |
560 | struct pmic_mpp_state *state = to_mpp_state(chip); | 555 | struct pmic_mpp_state *state = gpiochip_get_data(chip); |
561 | unsigned long config; | 556 | unsigned long config; |
562 | 557 | ||
563 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE, 1); | 558 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE, 1); |
@@ -568,7 +563,7 @@ static int pmic_mpp_direction_input(struct gpio_chip *chip, unsigned pin) | |||
568 | static int pmic_mpp_direction_output(struct gpio_chip *chip, | 563 | static int pmic_mpp_direction_output(struct gpio_chip *chip, |
569 | unsigned pin, int val) | 564 | unsigned pin, int val) |
570 | { | 565 | { |
571 | struct pmic_mpp_state *state = to_mpp_state(chip); | 566 | struct pmic_mpp_state *state = gpiochip_get_data(chip); |
572 | unsigned long config; | 567 | unsigned long config; |
573 | 568 | ||
574 | config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val); | 569 | config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val); |
@@ -578,7 +573,7 @@ static int pmic_mpp_direction_output(struct gpio_chip *chip, | |||
578 | 573 | ||
579 | static int pmic_mpp_get(struct gpio_chip *chip, unsigned pin) | 574 | static int pmic_mpp_get(struct gpio_chip *chip, unsigned pin) |
580 | { | 575 | { |
581 | struct pmic_mpp_state *state = to_mpp_state(chip); | 576 | struct pmic_mpp_state *state = gpiochip_get_data(chip); |
582 | struct pmic_mpp_pad *pad; | 577 | struct pmic_mpp_pad *pad; |
583 | int ret; | 578 | int ret; |
584 | 579 | ||
@@ -592,12 +587,12 @@ static int pmic_mpp_get(struct gpio_chip *chip, unsigned pin) | |||
592 | pad->out_value = ret & PMIC_MPP_REG_RT_STS_VAL_MASK; | 587 | pad->out_value = ret & PMIC_MPP_REG_RT_STS_VAL_MASK; |
593 | } | 588 | } |
594 | 589 | ||
595 | return pad->out_value; | 590 | return !!pad->out_value; |
596 | } | 591 | } |
597 | 592 | ||
598 | static void pmic_mpp_set(struct gpio_chip *chip, unsigned pin, int value) | 593 | static void pmic_mpp_set(struct gpio_chip *chip, unsigned pin, int value) |
599 | { | 594 | { |
600 | struct pmic_mpp_state *state = to_mpp_state(chip); | 595 | struct pmic_mpp_state *state = gpiochip_get_data(chip); |
601 | unsigned long config; | 596 | unsigned long config; |
602 | 597 | ||
603 | config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value); | 598 | config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value); |
@@ -620,7 +615,7 @@ static int pmic_mpp_of_xlate(struct gpio_chip *chip, | |||
620 | 615 | ||
621 | static int pmic_mpp_to_irq(struct gpio_chip *chip, unsigned pin) | 616 | static int pmic_mpp_to_irq(struct gpio_chip *chip, unsigned pin) |
622 | { | 617 | { |
623 | struct pmic_mpp_state *state = to_mpp_state(chip); | 618 | struct pmic_mpp_state *state = gpiochip_get_data(chip); |
624 | struct pmic_mpp_pad *pad; | 619 | struct pmic_mpp_pad *pad; |
625 | 620 | ||
626 | pad = state->ctrl->desc->pins[pin].drv_data; | 621 | pad = state->ctrl->desc->pins[pin].drv_data; |
@@ -630,7 +625,7 @@ static int pmic_mpp_to_irq(struct gpio_chip *chip, unsigned pin) | |||
630 | 625 | ||
631 | static void pmic_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip) | 626 | static void pmic_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
632 | { | 627 | { |
633 | struct pmic_mpp_state *state = to_mpp_state(chip); | 628 | struct pmic_mpp_state *state = gpiochip_get_data(chip); |
634 | unsigned i; | 629 | unsigned i; |
635 | 630 | ||
636 | for (i = 0; i < chip->ngpio; i++) { | 631 | for (i = 0; i < chip->ngpio; i++) { |
@@ -865,7 +860,7 @@ static int pmic_mpp_probe(struct platform_device *pdev) | |||
865 | } | 860 | } |
866 | 861 | ||
867 | state->chip = pmic_mpp_gpio_template; | 862 | state->chip = pmic_mpp_gpio_template; |
868 | state->chip.dev = dev; | 863 | state->chip.parent = dev; |
869 | state->chip.base = -1; | 864 | state->chip.base = -1; |
870 | state->chip.ngpio = npins; | 865 | state->chip.ngpio = npins; |
871 | state->chip.label = dev_name(dev); | 866 | state->chip.label = dev_name(dev); |
@@ -876,7 +871,7 @@ static int pmic_mpp_probe(struct platform_device *pdev) | |||
876 | if (IS_ERR(state->ctrl)) | 871 | if (IS_ERR(state->ctrl)) |
877 | return PTR_ERR(state->ctrl); | 872 | return PTR_ERR(state->ctrl); |
878 | 873 | ||
879 | ret = gpiochip_add(&state->chip); | 874 | ret = gpiochip_add_data(&state->chip, state); |
880 | if (ret) { | 875 | if (ret) { |
881 | dev_err(state->dev, "can't add gpio chip\n"); | 876 | dev_err(state->dev, "can't add gpio chip\n"); |
882 | goto err_chip; | 877 | goto err_chip; |
diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c index e51176ec83d2..cd8580d9741d 100644 --- a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c | |||
@@ -444,7 +444,7 @@ static struct pinctrl_desc pm8xxx_pinctrl_desc = { | |||
444 | static int pm8xxx_gpio_direction_input(struct gpio_chip *chip, | 444 | static int pm8xxx_gpio_direction_input(struct gpio_chip *chip, |
445 | unsigned offset) | 445 | unsigned offset) |
446 | { | 446 | { |
447 | struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); | 447 | struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); |
448 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 448 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
449 | u8 val; | 449 | u8 val; |
450 | 450 | ||
@@ -460,7 +460,7 @@ static int pm8xxx_gpio_direction_output(struct gpio_chip *chip, | |||
460 | unsigned offset, | 460 | unsigned offset, |
461 | int value) | 461 | int value) |
462 | { | 462 | { |
463 | struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); | 463 | struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); |
464 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 464 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
465 | u8 val; | 465 | u8 val; |
466 | 466 | ||
@@ -478,7 +478,7 @@ static int pm8xxx_gpio_direction_output(struct gpio_chip *chip, | |||
478 | 478 | ||
479 | static int pm8xxx_gpio_get(struct gpio_chip *chip, unsigned offset) | 479 | static int pm8xxx_gpio_get(struct gpio_chip *chip, unsigned offset) |
480 | { | 480 | { |
481 | struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); | 481 | struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); |
482 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 482 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
483 | bool state; | 483 | bool state; |
484 | int ret; | 484 | int ret; |
@@ -496,7 +496,7 @@ static int pm8xxx_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
496 | 496 | ||
497 | static void pm8xxx_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 497 | static void pm8xxx_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
498 | { | 498 | { |
499 | struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); | 499 | struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); |
500 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 500 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
501 | u8 val; | 501 | u8 val; |
502 | 502 | ||
@@ -525,7 +525,7 @@ static int pm8xxx_gpio_of_xlate(struct gpio_chip *chip, | |||
525 | 525 | ||
526 | static int pm8xxx_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 526 | static int pm8xxx_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
527 | { | 527 | { |
528 | struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); | 528 | struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); |
529 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 529 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
530 | 530 | ||
531 | return pin->irq; | 531 | return pin->irq; |
@@ -540,7 +540,7 @@ static void pm8xxx_gpio_dbg_show_one(struct seq_file *s, | |||
540 | unsigned offset, | 540 | unsigned offset, |
541 | unsigned gpio) | 541 | unsigned gpio) |
542 | { | 542 | { |
543 | struct pm8xxx_gpio *pctrl = container_of(chip, struct pm8xxx_gpio, chip); | 543 | struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip); |
544 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 544 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
545 | 545 | ||
546 | static const char * const modes[] = { | 546 | static const char * const modes[] = { |
@@ -737,12 +737,12 @@ static int pm8xxx_gpio_probe(struct platform_device *pdev) | |||
737 | 737 | ||
738 | pctrl->chip = pm8xxx_gpio_template; | 738 | pctrl->chip = pm8xxx_gpio_template; |
739 | pctrl->chip.base = -1; | 739 | pctrl->chip.base = -1; |
740 | pctrl->chip.dev = &pdev->dev; | 740 | pctrl->chip.parent = &pdev->dev; |
741 | pctrl->chip.of_node = pdev->dev.of_node; | 741 | pctrl->chip.of_node = pdev->dev.of_node; |
742 | pctrl->chip.of_gpio_n_cells = 2; | 742 | pctrl->chip.of_gpio_n_cells = 2; |
743 | pctrl->chip.label = dev_name(pctrl->dev); | 743 | pctrl->chip.label = dev_name(pctrl->dev); |
744 | pctrl->chip.ngpio = pctrl->npins; | 744 | pctrl->chip.ngpio = pctrl->npins; |
745 | ret = gpiochip_add(&pctrl->chip); | 745 | ret = gpiochip_add_data(&pctrl->chip, pctrl); |
746 | if (ret) { | 746 | if (ret) { |
747 | dev_err(&pdev->dev, "failed register gpiochip\n"); | 747 | dev_err(&pdev->dev, "failed register gpiochip\n"); |
748 | goto unregister_pinctrl; | 748 | goto unregister_pinctrl; |
diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c index e9f01de51e18..54a5402a9079 100644 --- a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c | |||
@@ -449,7 +449,7 @@ static struct pinctrl_desc pm8xxx_pinctrl_desc = { | |||
449 | static int pm8xxx_mpp_direction_input(struct gpio_chip *chip, | 449 | static int pm8xxx_mpp_direction_input(struct gpio_chip *chip, |
450 | unsigned offset) | 450 | unsigned offset) |
451 | { | 451 | { |
452 | struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); | 452 | struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); |
453 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 453 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
454 | 454 | ||
455 | switch (pin->mode) { | 455 | switch (pin->mode) { |
@@ -473,7 +473,7 @@ static int pm8xxx_mpp_direction_output(struct gpio_chip *chip, | |||
473 | unsigned offset, | 473 | unsigned offset, |
474 | int value) | 474 | int value) |
475 | { | 475 | { |
476 | struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); | 476 | struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); |
477 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 477 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
478 | 478 | ||
479 | switch (pin->mode) { | 479 | switch (pin->mode) { |
@@ -497,13 +497,13 @@ static int pm8xxx_mpp_direction_output(struct gpio_chip *chip, | |||
497 | 497 | ||
498 | static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset) | 498 | static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset) |
499 | { | 499 | { |
500 | struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); | 500 | struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); |
501 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 501 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
502 | bool state; | 502 | bool state; |
503 | int ret; | 503 | int ret; |
504 | 504 | ||
505 | if (!pin->input) | 505 | if (!pin->input) |
506 | return pin->output_value; | 506 | return !!pin->output_value; |
507 | 507 | ||
508 | ret = irq_get_irqchip_state(pin->irq, IRQCHIP_STATE_LINE_LEVEL, &state); | 508 | ret = irq_get_irqchip_state(pin->irq, IRQCHIP_STATE_LINE_LEVEL, &state); |
509 | if (!ret) | 509 | if (!ret) |
@@ -514,7 +514,7 @@ static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset) | |||
514 | 514 | ||
515 | static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int value) | 515 | static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int value) |
516 | { | 516 | { |
517 | struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); | 517 | struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); |
518 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 518 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
519 | 519 | ||
520 | pin->output_value = !!value; | 520 | pin->output_value = !!value; |
@@ -538,7 +538,7 @@ static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip, | |||
538 | 538 | ||
539 | static int pm8xxx_mpp_to_irq(struct gpio_chip *chip, unsigned offset) | 539 | static int pm8xxx_mpp_to_irq(struct gpio_chip *chip, unsigned offset) |
540 | { | 540 | { |
541 | struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); | 541 | struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); |
542 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 542 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
543 | 543 | ||
544 | return pin->irq; | 544 | return pin->irq; |
@@ -553,7 +553,7 @@ static void pm8xxx_mpp_dbg_show_one(struct seq_file *s, | |||
553 | unsigned offset, | 553 | unsigned offset, |
554 | unsigned gpio) | 554 | unsigned gpio) |
555 | { | 555 | { |
556 | struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip); | 556 | struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); |
557 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; | 557 | struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; |
558 | 558 | ||
559 | static const char * const aout_lvls[] = { | 559 | static const char * const aout_lvls[] = { |
@@ -828,12 +828,12 @@ static int pm8xxx_mpp_probe(struct platform_device *pdev) | |||
828 | 828 | ||
829 | pctrl->chip = pm8xxx_mpp_template; | 829 | pctrl->chip = pm8xxx_mpp_template; |
830 | pctrl->chip.base = -1; | 830 | pctrl->chip.base = -1; |
831 | pctrl->chip.dev = &pdev->dev; | 831 | pctrl->chip.parent = &pdev->dev; |
832 | pctrl->chip.of_node = pdev->dev.of_node; | 832 | pctrl->chip.of_node = pdev->dev.of_node; |
833 | pctrl->chip.of_gpio_n_cells = 2; | 833 | pctrl->chip.of_gpio_n_cells = 2; |
834 | pctrl->chip.label = dev_name(pctrl->dev); | 834 | pctrl->chip.label = dev_name(pctrl->dev); |
835 | pctrl->chip.ngpio = pctrl->npins; | 835 | pctrl->chip.ngpio = pctrl->npins; |
836 | ret = gpiochip_add(&pctrl->chip); | 836 | ret = gpiochip_add_data(&pctrl->chip, pctrl); |
837 | if (ret) { | 837 | if (ret) { |
838 | dev_err(&pdev->dev, "failed register gpiochip\n"); | 838 | dev_err(&pdev->dev, "failed register gpiochip\n"); |
839 | goto unregister_pinctrl; | 839 | goto unregister_pinctrl; |
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index 16e2293cc2bc..051b5bf701a8 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c | |||
@@ -176,7 +176,8 @@ static int exynos_irq_request_resources(struct irq_data *irqd) | |||
176 | 176 | ||
177 | ret = gpiochip_lock_as_irq(&bank->gpio_chip, irqd->hwirq); | 177 | ret = gpiochip_lock_as_irq(&bank->gpio_chip, irqd->hwirq); |
178 | if (ret) { | 178 | if (ret) { |
179 | dev_err(bank->gpio_chip.dev, "unable to lock pin %s-%lu IRQ\n", | 179 | dev_err(bank->gpio_chip.parent, |
180 | "unable to lock pin %s-%lu IRQ\n", | ||
180 | bank->name, irqd->hwirq); | 181 | bank->name, irqd->hwirq); |
181 | return ret; | 182 | return ret; |
182 | } | 183 | } |
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos5440.c b/drivers/pinctrl/samsung/pinctrl-exynos5440.c index 82dc109f7ed4..00ab63abf1d9 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos5440.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos5440.c | |||
@@ -15,7 +15,7 @@ | |||
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | #include <linux/slab.h> | 16 | #include <linux/slab.h> |
17 | #include <linux/err.h> | 17 | #include <linux/err.h> |
18 | #include <linux/gpio.h> | 18 | #include <linux/gpio/driver.h> |
19 | #include <linux/device.h> | 19 | #include <linux/device.h> |
20 | #include <linux/pinctrl/pinctrl.h> | 20 | #include <linux/pinctrl/pinctrl.h> |
21 | #include <linux/pinctrl/pinmux.h> | 21 | #include <linux/pinctrl/pinmux.h> |
@@ -539,7 +539,7 @@ static const struct pinconf_ops exynos5440_pinconf_ops = { | |||
539 | /* gpiolib gpio_set callback function */ | 539 | /* gpiolib gpio_set callback function */ |
540 | static void exynos5440_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | 540 | static void exynos5440_gpio_set(struct gpio_chip *gc, unsigned offset, int value) |
541 | { | 541 | { |
542 | struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev); | 542 | struct exynos5440_pinctrl_priv_data *priv = gpiochip_get_data(gc); |
543 | void __iomem *base = priv->reg_base; | 543 | void __iomem *base = priv->reg_base; |
544 | u32 data; | 544 | u32 data; |
545 | 545 | ||
@@ -553,7 +553,7 @@ static void exynos5440_gpio_set(struct gpio_chip *gc, unsigned offset, int value | |||
553 | /* gpiolib gpio_get callback function */ | 553 | /* gpiolib gpio_get callback function */ |
554 | static int exynos5440_gpio_get(struct gpio_chip *gc, unsigned offset) | 554 | static int exynos5440_gpio_get(struct gpio_chip *gc, unsigned offset) |
555 | { | 555 | { |
556 | struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev); | 556 | struct exynos5440_pinctrl_priv_data *priv = gpiochip_get_data(gc); |
557 | void __iomem *base = priv->reg_base; | 557 | void __iomem *base = priv->reg_base; |
558 | u32 data; | 558 | u32 data; |
559 | 559 | ||
@@ -566,7 +566,7 @@ static int exynos5440_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
566 | /* gpiolib gpio_direction_input callback function */ | 566 | /* gpiolib gpio_direction_input callback function */ |
567 | static int exynos5440_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | 567 | static int exynos5440_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
568 | { | 568 | { |
569 | struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev); | 569 | struct exynos5440_pinctrl_priv_data *priv = gpiochip_get_data(gc); |
570 | void __iomem *base = priv->reg_base; | 570 | void __iomem *base = priv->reg_base; |
571 | u32 data; | 571 | u32 data; |
572 | 572 | ||
@@ -586,7 +586,7 @@ static int exynos5440_gpio_direction_input(struct gpio_chip *gc, unsigned offset | |||
586 | static int exynos5440_gpio_direction_output(struct gpio_chip *gc, unsigned offset, | 586 | static int exynos5440_gpio_direction_output(struct gpio_chip *gc, unsigned offset, |
587 | int value) | 587 | int value) |
588 | { | 588 | { |
589 | struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev); | 589 | struct exynos5440_pinctrl_priv_data *priv = gpiochip_get_data(gc); |
590 | void __iomem *base = priv->reg_base; | 590 | void __iomem *base = priv->reg_base; |
591 | u32 data; | 591 | u32 data; |
592 | 592 | ||
@@ -607,7 +607,7 @@ static int exynos5440_gpio_direction_output(struct gpio_chip *gc, unsigned offse | |||
607 | /* gpiolib gpio_to_irq callback function */ | 607 | /* gpiolib gpio_to_irq callback function */ |
608 | static int exynos5440_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 608 | static int exynos5440_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
609 | { | 609 | { |
610 | struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev); | 610 | struct exynos5440_pinctrl_priv_data *priv = gpiochip_get_data(gc); |
611 | unsigned int virq; | 611 | unsigned int virq; |
612 | 612 | ||
613 | if (offset < 16 || offset > 23) | 613 | if (offset < 16 || offset > 23) |
@@ -817,7 +817,7 @@ static int exynos5440_gpiolib_register(struct platform_device *pdev, | |||
817 | priv->gc = gc; | 817 | priv->gc = gc; |
818 | gc->base = 0; | 818 | gc->base = 0; |
819 | gc->ngpio = EXYNOS5440_MAX_PINS; | 819 | gc->ngpio = EXYNOS5440_MAX_PINS; |
820 | gc->dev = &pdev->dev; | 820 | gc->parent = &pdev->dev; |
821 | gc->set = exynos5440_gpio_set; | 821 | gc->set = exynos5440_gpio_set; |
822 | gc->get = exynos5440_gpio_get; | 822 | gc->get = exynos5440_gpio_get; |
823 | gc->direction_input = exynos5440_gpio_direction_input; | 823 | gc->direction_input = exynos5440_gpio_direction_input; |
@@ -825,7 +825,7 @@ static int exynos5440_gpiolib_register(struct platform_device *pdev, | |||
825 | gc->to_irq = exynos5440_gpio_to_irq; | 825 | gc->to_irq = exynos5440_gpio_to_irq; |
826 | gc->label = "gpiolib-exynos5440"; | 826 | gc->label = "gpiolib-exynos5440"; |
827 | gc->owner = THIS_MODULE; | 827 | gc->owner = THIS_MODULE; |
828 | ret = gpiochip_add(gc); | 828 | ret = gpiochip_add_data(gc, priv); |
829 | if (ret) { | 829 | if (ret) { |
830 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error " | 830 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error " |
831 | "code: %d\n", gc->label, ret); | 831 | "code: %d\n", gc->label, ret); |
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 48294e7449a4..f67b1e958589 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c | |||
@@ -50,11 +50,6 @@ static LIST_HEAD(drvdata_list); | |||
50 | 50 | ||
51 | static unsigned int pin_base; | 51 | static unsigned int pin_base; |
52 | 52 | ||
53 | static inline struct samsung_pin_bank *gc_to_pin_bank(struct gpio_chip *gc) | ||
54 | { | ||
55 | return container_of(gc, struct samsung_pin_bank, gpio_chip); | ||
56 | } | ||
57 | |||
58 | static int samsung_get_group_count(struct pinctrl_dev *pctldev) | 53 | static int samsung_get_group_count(struct pinctrl_dev *pctldev) |
59 | { | 54 | { |
60 | struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); | 55 | struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); |
@@ -522,7 +517,7 @@ static const struct pinconf_ops samsung_pinconf_ops = { | |||
522 | /* gpiolib gpio_set callback function */ | 517 | /* gpiolib gpio_set callback function */ |
523 | static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | 518 | static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) |
524 | { | 519 | { |
525 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); | 520 | struct samsung_pin_bank *bank = gpiochip_get_data(gc); |
526 | const struct samsung_pin_bank_type *type = bank->type; | 521 | const struct samsung_pin_bank_type *type = bank->type; |
527 | unsigned long flags; | 522 | unsigned long flags; |
528 | void __iomem *reg; | 523 | void __iomem *reg; |
@@ -546,7 +541,7 @@ static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) | |||
546 | { | 541 | { |
547 | void __iomem *reg; | 542 | void __iomem *reg; |
548 | u32 data; | 543 | u32 data; |
549 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); | 544 | struct samsung_pin_bank *bank = gpiochip_get_data(gc); |
550 | const struct samsung_pin_bank_type *type = bank->type; | 545 | const struct samsung_pin_bank_type *type = bank->type; |
551 | 546 | ||
552 | reg = bank->drvdata->virt_base + bank->pctl_offset; | 547 | reg = bank->drvdata->virt_base + bank->pctl_offset; |
@@ -571,7 +566,7 @@ static int samsung_gpio_set_direction(struct gpio_chip *gc, | |||
571 | u32 data, mask, shift; | 566 | u32 data, mask, shift; |
572 | unsigned long flags; | 567 | unsigned long flags; |
573 | 568 | ||
574 | bank = gc_to_pin_bank(gc); | 569 | bank = gpiochip_get_data(gc); |
575 | type = bank->type; | 570 | type = bank->type; |
576 | drvdata = bank->drvdata; | 571 | drvdata = bank->drvdata; |
577 | 572 | ||
@@ -619,7 +614,7 @@ static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset, | |||
619 | */ | 614 | */ |
620 | static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | 615 | static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
621 | { | 616 | { |
622 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); | 617 | struct samsung_pin_bank *bank = gpiochip_get_data(gc); |
623 | unsigned int virq; | 618 | unsigned int virq; |
624 | 619 | ||
625 | if (!bank->irq_domain) | 620 | if (!bank->irq_domain) |
@@ -914,11 +909,11 @@ static int samsung_gpiolib_register(struct platform_device *pdev, | |||
914 | gc = &bank->gpio_chip; | 909 | gc = &bank->gpio_chip; |
915 | gc->base = drvdata->pin_base + bank->pin_base; | 910 | gc->base = drvdata->pin_base + bank->pin_base; |
916 | gc->ngpio = bank->nr_pins; | 911 | gc->ngpio = bank->nr_pins; |
917 | gc->dev = &pdev->dev; | 912 | gc->parent = &pdev->dev; |
918 | gc->of_node = bank->of_node; | 913 | gc->of_node = bank->of_node; |
919 | gc->label = bank->name; | 914 | gc->label = bank->name; |
920 | 915 | ||
921 | ret = gpiochip_add(gc); | 916 | ret = gpiochip_add_data(gc, bank); |
922 | if (ret) { | 917 | if (ret) { |
923 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", | 918 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", |
924 | gc->label, ret); | 919 | gc->label, ret); |
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c index db3f09aa8993..a6681b8b17c3 100644 --- a/drivers/pinctrl/sh-pfc/gpio.c +++ b/drivers/pinctrl/sh-pfc/gpio.c | |||
@@ -38,14 +38,10 @@ struct sh_pfc_chip { | |||
38 | struct sh_pfc_gpio_pin *pins; | 38 | struct sh_pfc_gpio_pin *pins; |
39 | }; | 39 | }; |
40 | 40 | ||
41 | static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc) | ||
42 | { | ||
43 | return container_of(gc, struct sh_pfc_chip, gpio_chip); | ||
44 | } | ||
45 | |||
46 | static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc) | 41 | static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc) |
47 | { | 42 | { |
48 | return gpio_to_pfc_chip(gc)->pfc; | 43 | struct sh_pfc_chip *chip = gpiochip_get_data(gc); |
44 | return chip->pfc; | ||
49 | } | 45 | } |
50 | 46 | ||
51 | static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int offset, | 47 | static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int offset, |
@@ -178,14 +174,14 @@ static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset) | |||
178 | static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset, | 174 | static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset, |
179 | int value) | 175 | int value) |
180 | { | 176 | { |
181 | gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value); | 177 | gpio_pin_set_value(gpiochip_get_data(gc), offset, value); |
182 | 178 | ||
183 | return pinctrl_gpio_direction_output(offset); | 179 | return pinctrl_gpio_direction_output(offset); |
184 | } | 180 | } |
185 | 181 | ||
186 | static int gpio_pin_get(struct gpio_chip *gc, unsigned offset) | 182 | static int gpio_pin_get(struct gpio_chip *gc, unsigned offset) |
187 | { | 183 | { |
188 | struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc); | 184 | struct sh_pfc_chip *chip = gpiochip_get_data(gc); |
189 | struct sh_pfc_gpio_data_reg *reg; | 185 | struct sh_pfc_gpio_data_reg *reg; |
190 | unsigned int bit; | 186 | unsigned int bit; |
191 | unsigned int pos; | 187 | unsigned int pos; |
@@ -199,7 +195,7 @@ static int gpio_pin_get(struct gpio_chip *gc, unsigned offset) | |||
199 | 195 | ||
200 | static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value) | 196 | static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value) |
201 | { | 197 | { |
202 | gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value); | 198 | gpio_pin_set_value(gpiochip_get_data(gc), offset, value); |
203 | } | 199 | } |
204 | 200 | ||
205 | static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset) | 201 | static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset) |
@@ -246,7 +242,7 @@ static int gpio_pin_setup(struct sh_pfc_chip *chip) | |||
246 | gc->to_irq = gpio_pin_to_irq; | 242 | gc->to_irq = gpio_pin_to_irq; |
247 | 243 | ||
248 | gc->label = pfc->info->name; | 244 | gc->label = pfc->info->name; |
249 | gc->dev = pfc->dev; | 245 | gc->parent = pfc->dev; |
250 | gc->owner = THIS_MODULE; | 246 | gc->owner = THIS_MODULE; |
251 | gc->base = 0; | 247 | gc->base = 0; |
252 | gc->ngpio = pfc->nr_gpio_pins; | 248 | gc->ngpio = pfc->nr_gpio_pins; |
@@ -322,7 +318,7 @@ sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *), | |||
322 | if (ret < 0) | 318 | if (ret < 0) |
323 | return ERR_PTR(ret); | 319 | return ERR_PTR(ret); |
324 | 320 | ||
325 | ret = gpiochip_add(&chip->gpio_chip); | 321 | ret = gpiochip_add_data(&chip->gpio_chip, chip); |
326 | if (unlikely(ret < 0)) | 322 | if (unlikely(ret < 0)) |
327 | return ERR_PTR(ret); | 323 | return ERR_PTR(ret); |
328 | 324 | ||
diff --git a/drivers/pinctrl/sirf/pinctrl-atlas7.c b/drivers/pinctrl/sirf/pinctrl-atlas7.c index 053d98e33944..beb024c31a5d 100644 --- a/drivers/pinctrl/sirf/pinctrl-atlas7.c +++ b/drivers/pinctrl/sirf/pinctrl-atlas7.c | |||
@@ -358,11 +358,6 @@ struct atlas7_gpio_chip { | |||
358 | struct atlas7_gpio_bank banks[0]; | 358 | struct atlas7_gpio_bank banks[0]; |
359 | }; | 359 | }; |
360 | 360 | ||
361 | static inline struct atlas7_gpio_chip *to_atlas7_gpio(struct gpio_chip *gc) | ||
362 | { | ||
363 | return container_of(gc, struct atlas7_gpio_chip, chip); | ||
364 | } | ||
365 | |||
366 | /** | 361 | /** |
367 | * @dev: a pointer back to containing device | 362 | * @dev: a pointer back to containing device |
368 | * @virtbase: the offset to the controller in virtual memory | 363 | * @virtbase: the offset to the controller in virtual memory |
@@ -5642,7 +5637,7 @@ static int __atlas7_gpio_to_pin(struct atlas7_gpio_chip *a7gc, u32 gpio) | |||
5642 | static void atlas7_gpio_irq_ack(struct irq_data *d) | 5637 | static void atlas7_gpio_irq_ack(struct irq_data *d) |
5643 | { | 5638 | { |
5644 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 5639 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
5645 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(gc); | 5640 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(gc); |
5646 | struct atlas7_gpio_bank *bank; | 5641 | struct atlas7_gpio_bank *bank; |
5647 | void __iomem *ctrl_reg; | 5642 | void __iomem *ctrl_reg; |
5648 | u32 val, pin_in_bank; | 5643 | u32 val, pin_in_bank; |
@@ -5680,7 +5675,7 @@ static void __atlas7_gpio_irq_mask(struct atlas7_gpio_chip *a7gc, int idx) | |||
5680 | static void atlas7_gpio_irq_mask(struct irq_data *d) | 5675 | static void atlas7_gpio_irq_mask(struct irq_data *d) |
5681 | { | 5676 | { |
5682 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 5677 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
5683 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(gc); | 5678 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(gc); |
5684 | unsigned long flags; | 5679 | unsigned long flags; |
5685 | 5680 | ||
5686 | spin_lock_irqsave(&a7gc->lock, flags); | 5681 | spin_lock_irqsave(&a7gc->lock, flags); |
@@ -5693,7 +5688,7 @@ static void atlas7_gpio_irq_mask(struct irq_data *d) | |||
5693 | static void atlas7_gpio_irq_unmask(struct irq_data *d) | 5688 | static void atlas7_gpio_irq_unmask(struct irq_data *d) |
5694 | { | 5689 | { |
5695 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 5690 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
5696 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(gc); | 5691 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(gc); |
5697 | struct atlas7_gpio_bank *bank; | 5692 | struct atlas7_gpio_bank *bank; |
5698 | void __iomem *ctrl_reg; | 5693 | void __iomem *ctrl_reg; |
5699 | u32 val, pin_in_bank; | 5694 | u32 val, pin_in_bank; |
@@ -5717,7 +5712,7 @@ static int atlas7_gpio_irq_type(struct irq_data *d, | |||
5717 | unsigned int type) | 5712 | unsigned int type) |
5718 | { | 5713 | { |
5719 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 5714 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
5720 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(gc); | 5715 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(gc); |
5721 | struct atlas7_gpio_bank *bank; | 5716 | struct atlas7_gpio_bank *bank; |
5722 | void __iomem *ctrl_reg; | 5717 | void __iomem *ctrl_reg; |
5723 | u32 val, pin_in_bank; | 5718 | u32 val, pin_in_bank; |
@@ -5786,7 +5781,7 @@ static struct irq_chip atlas7_gpio_irq_chip = { | |||
5786 | static void atlas7_gpio_handle_irq(struct irq_desc *desc) | 5781 | static void atlas7_gpio_handle_irq(struct irq_desc *desc) |
5787 | { | 5782 | { |
5788 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 5783 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
5789 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(gc); | 5784 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(gc); |
5790 | struct atlas7_gpio_bank *bank = NULL; | 5785 | struct atlas7_gpio_bank *bank = NULL; |
5791 | u32 status, ctrl; | 5786 | u32 status, ctrl; |
5792 | int pin_in_bank = 0, idx; | 5787 | int pin_in_bank = 0, idx; |
@@ -5854,7 +5849,7 @@ static void __atlas7_gpio_set_input(struct atlas7_gpio_chip *a7gc, | |||
5854 | static int atlas7_gpio_request(struct gpio_chip *chip, | 5849 | static int atlas7_gpio_request(struct gpio_chip *chip, |
5855 | unsigned int gpio) | 5850 | unsigned int gpio) |
5856 | { | 5851 | { |
5857 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(chip); | 5852 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(chip); |
5858 | int ret; | 5853 | int ret; |
5859 | unsigned long flags; | 5854 | unsigned long flags; |
5860 | 5855 | ||
@@ -5882,7 +5877,7 @@ static int atlas7_gpio_request(struct gpio_chip *chip, | |||
5882 | static void atlas7_gpio_free(struct gpio_chip *chip, | 5877 | static void atlas7_gpio_free(struct gpio_chip *chip, |
5883 | unsigned int gpio) | 5878 | unsigned int gpio) |
5884 | { | 5879 | { |
5885 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(chip); | 5880 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(chip); |
5886 | unsigned long flags; | 5881 | unsigned long flags; |
5887 | 5882 | ||
5888 | spin_lock_irqsave(&a7gc->lock, flags); | 5883 | spin_lock_irqsave(&a7gc->lock, flags); |
@@ -5898,7 +5893,7 @@ static void atlas7_gpio_free(struct gpio_chip *chip, | |||
5898 | static int atlas7_gpio_direction_input(struct gpio_chip *chip, | 5893 | static int atlas7_gpio_direction_input(struct gpio_chip *chip, |
5899 | unsigned int gpio) | 5894 | unsigned int gpio) |
5900 | { | 5895 | { |
5901 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(chip); | 5896 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(chip); |
5902 | unsigned long flags; | 5897 | unsigned long flags; |
5903 | 5898 | ||
5904 | spin_lock_irqsave(&a7gc->lock, flags); | 5899 | spin_lock_irqsave(&a7gc->lock, flags); |
@@ -5935,7 +5930,7 @@ static void __atlas7_gpio_set_output(struct atlas7_gpio_chip *a7gc, | |||
5935 | static int atlas7_gpio_direction_output(struct gpio_chip *chip, | 5930 | static int atlas7_gpio_direction_output(struct gpio_chip *chip, |
5936 | unsigned int gpio, int value) | 5931 | unsigned int gpio, int value) |
5937 | { | 5932 | { |
5938 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(chip); | 5933 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(chip); |
5939 | unsigned long flags; | 5934 | unsigned long flags; |
5940 | 5935 | ||
5941 | spin_lock_irqsave(&a7gc->lock, flags); | 5936 | spin_lock_irqsave(&a7gc->lock, flags); |
@@ -5950,7 +5945,7 @@ static int atlas7_gpio_direction_output(struct gpio_chip *chip, | |||
5950 | static int atlas7_gpio_get_value(struct gpio_chip *chip, | 5945 | static int atlas7_gpio_get_value(struct gpio_chip *chip, |
5951 | unsigned int gpio) | 5946 | unsigned int gpio) |
5952 | { | 5947 | { |
5953 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(chip); | 5948 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(chip); |
5954 | struct atlas7_gpio_bank *bank; | 5949 | struct atlas7_gpio_bank *bank; |
5955 | u32 val, pin_in_bank; | 5950 | u32 val, pin_in_bank; |
5956 | unsigned long flags; | 5951 | unsigned long flags; |
@@ -5970,7 +5965,7 @@ static int atlas7_gpio_get_value(struct gpio_chip *chip, | |||
5970 | static void atlas7_gpio_set_value(struct gpio_chip *chip, | 5965 | static void atlas7_gpio_set_value(struct gpio_chip *chip, |
5971 | unsigned int gpio, int value) | 5966 | unsigned int gpio, int value) |
5972 | { | 5967 | { |
5973 | struct atlas7_gpio_chip *a7gc = to_atlas7_gpio(chip); | 5968 | struct atlas7_gpio_chip *a7gc = gpiochip_get_data(chip); |
5974 | struct atlas7_gpio_bank *bank; | 5969 | struct atlas7_gpio_bank *bank; |
5975 | void __iomem *ctrl_reg; | 5970 | void __iomem *ctrl_reg; |
5976 | u32 ctrl, pin_in_bank; | 5971 | u32 ctrl, pin_in_bank; |
@@ -6054,10 +6049,10 @@ static int atlas7_gpio_probe(struct platform_device *pdev) | |||
6054 | chip->label = kstrdup(np->name, GFP_KERNEL); | 6049 | chip->label = kstrdup(np->name, GFP_KERNEL); |
6055 | chip->of_node = np; | 6050 | chip->of_node = np; |
6056 | chip->of_gpio_n_cells = 2; | 6051 | chip->of_gpio_n_cells = 2; |
6057 | chip->dev = &pdev->dev; | 6052 | chip->parent = &pdev->dev; |
6058 | 6053 | ||
6059 | /* Add gpio chip to system */ | 6054 | /* Add gpio chip to system */ |
6060 | ret = gpiochip_add(chip); | 6055 | ret = gpiochip_add_data(chip, a7gc); |
6061 | if (ret) { | 6056 | if (ret) { |
6062 | dev_err(&pdev->dev, | 6057 | dev_err(&pdev->dev, |
6063 | "%s: error in probe function with status %d\n", | 6058 | "%s: error in probe function with status %d\n", |
diff --git a/drivers/pinctrl/sirf/pinctrl-sirf.c b/drivers/pinctrl/sirf/pinctrl-sirf.c index edf40df05ec0..762c0c9c1278 100644 --- a/drivers/pinctrl/sirf/pinctrl-sirf.c +++ b/drivers/pinctrl/sirf/pinctrl-sirf.c | |||
@@ -403,11 +403,6 @@ static int __init sirfsoc_pinmux_init(void) | |||
403 | } | 403 | } |
404 | arch_initcall(sirfsoc_pinmux_init); | 404 | arch_initcall(sirfsoc_pinmux_init); |
405 | 405 | ||
406 | static inline struct sirfsoc_gpio_chip *to_sirfsoc_gpio(struct gpio_chip *gc) | ||
407 | { | ||
408 | return container_of(gc, struct sirfsoc_gpio_chip, chip.gc); | ||
409 | } | ||
410 | |||
411 | static inline struct sirfsoc_gpio_bank * | 406 | static inline struct sirfsoc_gpio_bank * |
412 | sirfsoc_gpio_to_bank(struct sirfsoc_gpio_chip *sgpio, unsigned int offset) | 407 | sirfsoc_gpio_to_bank(struct sirfsoc_gpio_chip *sgpio, unsigned int offset) |
413 | { | 408 | { |
@@ -422,7 +417,7 @@ static inline int sirfsoc_gpio_to_bankoff(unsigned int offset) | |||
422 | static void sirfsoc_gpio_irq_ack(struct irq_data *d) | 417 | static void sirfsoc_gpio_irq_ack(struct irq_data *d) |
423 | { | 418 | { |
424 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 419 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
425 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc); | 420 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc); |
426 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); | 421 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); |
427 | int idx = sirfsoc_gpio_to_bankoff(d->hwirq); | 422 | int idx = sirfsoc_gpio_to_bankoff(d->hwirq); |
428 | u32 val, offset; | 423 | u32 val, offset; |
@@ -461,7 +456,7 @@ static void __sirfsoc_gpio_irq_mask(struct sirfsoc_gpio_chip *sgpio, | |||
461 | static void sirfsoc_gpio_irq_mask(struct irq_data *d) | 456 | static void sirfsoc_gpio_irq_mask(struct irq_data *d) |
462 | { | 457 | { |
463 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 458 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
464 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc); | 459 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc); |
465 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); | 460 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); |
466 | 461 | ||
467 | __sirfsoc_gpio_irq_mask(sgpio, bank, d->hwirq % SIRFSOC_GPIO_BANK_SIZE); | 462 | __sirfsoc_gpio_irq_mask(sgpio, bank, d->hwirq % SIRFSOC_GPIO_BANK_SIZE); |
@@ -470,7 +465,7 @@ static void sirfsoc_gpio_irq_mask(struct irq_data *d) | |||
470 | static void sirfsoc_gpio_irq_unmask(struct irq_data *d) | 465 | static void sirfsoc_gpio_irq_unmask(struct irq_data *d) |
471 | { | 466 | { |
472 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 467 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
473 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc); | 468 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc); |
474 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); | 469 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); |
475 | int idx = sirfsoc_gpio_to_bankoff(d->hwirq); | 470 | int idx = sirfsoc_gpio_to_bankoff(d->hwirq); |
476 | u32 val, offset; | 471 | u32 val, offset; |
@@ -491,7 +486,7 @@ static void sirfsoc_gpio_irq_unmask(struct irq_data *d) | |||
491 | static int sirfsoc_gpio_irq_type(struct irq_data *d, unsigned type) | 486 | static int sirfsoc_gpio_irq_type(struct irq_data *d, unsigned type) |
492 | { | 487 | { |
493 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 488 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
494 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc); | 489 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc); |
495 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); | 490 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); |
496 | int idx = sirfsoc_gpio_to_bankoff(d->hwirq); | 491 | int idx = sirfsoc_gpio_to_bankoff(d->hwirq); |
497 | u32 val, offset; | 492 | u32 val, offset; |
@@ -553,7 +548,7 @@ static void sirfsoc_gpio_handle_irq(struct irq_desc *desc) | |||
553 | { | 548 | { |
554 | unsigned int irq = irq_desc_get_irq(desc); | 549 | unsigned int irq = irq_desc_get_irq(desc); |
555 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 550 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
556 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(gc); | 551 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc); |
557 | struct sirfsoc_gpio_bank *bank; | 552 | struct sirfsoc_gpio_bank *bank; |
558 | u32 status, ctrl; | 553 | u32 status, ctrl; |
559 | int idx = 0; | 554 | int idx = 0; |
@@ -611,7 +606,7 @@ static inline void sirfsoc_gpio_set_input(struct sirfsoc_gpio_chip *sgpio, | |||
611 | 606 | ||
612 | static int sirfsoc_gpio_request(struct gpio_chip *chip, unsigned offset) | 607 | static int sirfsoc_gpio_request(struct gpio_chip *chip, unsigned offset) |
613 | { | 608 | { |
614 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip); | 609 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip); |
615 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); | 610 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); |
616 | unsigned long flags; | 611 | unsigned long flags; |
617 | 612 | ||
@@ -634,7 +629,7 @@ static int sirfsoc_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
634 | 629 | ||
635 | static void sirfsoc_gpio_free(struct gpio_chip *chip, unsigned offset) | 630 | static void sirfsoc_gpio_free(struct gpio_chip *chip, unsigned offset) |
636 | { | 631 | { |
637 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip); | 632 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip); |
638 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); | 633 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); |
639 | unsigned long flags; | 634 | unsigned long flags; |
640 | 635 | ||
@@ -650,7 +645,7 @@ static void sirfsoc_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
650 | 645 | ||
651 | static int sirfsoc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) | 646 | static int sirfsoc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) |
652 | { | 647 | { |
653 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip); | 648 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip); |
654 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio); | 649 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio); |
655 | int idx = sirfsoc_gpio_to_bankoff(gpio); | 650 | int idx = sirfsoc_gpio_to_bankoff(gpio); |
656 | unsigned long flags; | 651 | unsigned long flags; |
@@ -693,7 +688,7 @@ static inline void sirfsoc_gpio_set_output(struct sirfsoc_gpio_chip *sgpio, | |||
693 | static int sirfsoc_gpio_direction_output(struct gpio_chip *chip, | 688 | static int sirfsoc_gpio_direction_output(struct gpio_chip *chip, |
694 | unsigned gpio, int value) | 689 | unsigned gpio, int value) |
695 | { | 690 | { |
696 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip); | 691 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip); |
697 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio); | 692 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio); |
698 | int idx = sirfsoc_gpio_to_bankoff(gpio); | 693 | int idx = sirfsoc_gpio_to_bankoff(gpio); |
699 | u32 offset; | 694 | u32 offset; |
@@ -712,7 +707,7 @@ static int sirfsoc_gpio_direction_output(struct gpio_chip *chip, | |||
712 | 707 | ||
713 | static int sirfsoc_gpio_get_value(struct gpio_chip *chip, unsigned offset) | 708 | static int sirfsoc_gpio_get_value(struct gpio_chip *chip, unsigned offset) |
714 | { | 709 | { |
715 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip); | 710 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip); |
716 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); | 711 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); |
717 | u32 val; | 712 | u32 val; |
718 | unsigned long flags; | 713 | unsigned long flags; |
@@ -729,7 +724,7 @@ static int sirfsoc_gpio_get_value(struct gpio_chip *chip, unsigned offset) | |||
729 | static void sirfsoc_gpio_set_value(struct gpio_chip *chip, unsigned offset, | 724 | static void sirfsoc_gpio_set_value(struct gpio_chip *chip, unsigned offset, |
730 | int value) | 725 | int value) |
731 | { | 726 | { |
732 | struct sirfsoc_gpio_chip *sgpio = to_sirfsoc_gpio(chip); | 727 | struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip); |
733 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); | 728 | struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); |
734 | u32 ctrl; | 729 | u32 ctrl; |
735 | unsigned long flags; | 730 | unsigned long flags; |
@@ -815,10 +810,10 @@ static int sirfsoc_gpio_probe(struct device_node *np) | |||
815 | sgpio->chip.gc.of_node = np; | 810 | sgpio->chip.gc.of_node = np; |
816 | sgpio->chip.gc.of_xlate = sirfsoc_gpio_of_xlate; | 811 | sgpio->chip.gc.of_xlate = sirfsoc_gpio_of_xlate; |
817 | sgpio->chip.gc.of_gpio_n_cells = 2; | 812 | sgpio->chip.gc.of_gpio_n_cells = 2; |
818 | sgpio->chip.gc.dev = &pdev->dev; | 813 | sgpio->chip.gc.parent = &pdev->dev; |
819 | sgpio->chip.regs = regs; | 814 | sgpio->chip.regs = regs; |
820 | 815 | ||
821 | err = gpiochip_add(&sgpio->chip.gc); | 816 | err = gpiochip_add_data(&sgpio->chip.gc, sgpio); |
822 | if (err) { | 817 | if (err) { |
823 | dev_err(&pdev->dev, "%s: error in probe function with status %d\n", | 818 | dev_err(&pdev->dev, "%s: error in probe function with status %d\n", |
824 | np->full_name, err); | 819 | np->full_name, err); |
diff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear/pinctrl-plgpio.c index 1f0af250dbb5..4c9b863f8267 100644 --- a/drivers/pinctrl/spear/pinctrl-plgpio.c +++ b/drivers/pinctrl/spear/pinctrl-plgpio.c | |||
@@ -107,7 +107,7 @@ static inline void plgpio_reg_reset(void __iomem *base, u32 pin, u32 reg) | |||
107 | /* gpio framework specific routines */ | 107 | /* gpio framework specific routines */ |
108 | static int plgpio_direction_input(struct gpio_chip *chip, unsigned offset) | 108 | static int plgpio_direction_input(struct gpio_chip *chip, unsigned offset) |
109 | { | 109 | { |
110 | struct plgpio *plgpio = container_of(chip, struct plgpio, chip); | 110 | struct plgpio *plgpio = gpiochip_get_data(chip); |
111 | unsigned long flags; | 111 | unsigned long flags; |
112 | 112 | ||
113 | /* get correct offset for "offset" pin */ | 113 | /* get correct offset for "offset" pin */ |
@@ -127,7 +127,7 @@ static int plgpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
127 | static int plgpio_direction_output(struct gpio_chip *chip, unsigned offset, | 127 | static int plgpio_direction_output(struct gpio_chip *chip, unsigned offset, |
128 | int value) | 128 | int value) |
129 | { | 129 | { |
130 | struct plgpio *plgpio = container_of(chip, struct plgpio, chip); | 130 | struct plgpio *plgpio = gpiochip_get_data(chip); |
131 | unsigned long flags; | 131 | unsigned long flags; |
132 | unsigned dir_offset = offset, wdata_offset = offset, tmp; | 132 | unsigned dir_offset = offset, wdata_offset = offset, tmp; |
133 | 133 | ||
@@ -159,7 +159,7 @@ static int plgpio_direction_output(struct gpio_chip *chip, unsigned offset, | |||
159 | 159 | ||
160 | static int plgpio_get_value(struct gpio_chip *chip, unsigned offset) | 160 | static int plgpio_get_value(struct gpio_chip *chip, unsigned offset) |
161 | { | 161 | { |
162 | struct plgpio *plgpio = container_of(chip, struct plgpio, chip); | 162 | struct plgpio *plgpio = gpiochip_get_data(chip); |
163 | 163 | ||
164 | if (offset >= chip->ngpio) | 164 | if (offset >= chip->ngpio) |
165 | return -EINVAL; | 165 | return -EINVAL; |
@@ -176,7 +176,7 @@ static int plgpio_get_value(struct gpio_chip *chip, unsigned offset) | |||
176 | 176 | ||
177 | static void plgpio_set_value(struct gpio_chip *chip, unsigned offset, int value) | 177 | static void plgpio_set_value(struct gpio_chip *chip, unsigned offset, int value) |
178 | { | 178 | { |
179 | struct plgpio *plgpio = container_of(chip, struct plgpio, chip); | 179 | struct plgpio *plgpio = gpiochip_get_data(chip); |
180 | 180 | ||
181 | if (offset >= chip->ngpio) | 181 | if (offset >= chip->ngpio) |
182 | return; | 182 | return; |
@@ -196,7 +196,7 @@ static void plgpio_set_value(struct gpio_chip *chip, unsigned offset, int value) | |||
196 | 196 | ||
197 | static int plgpio_request(struct gpio_chip *chip, unsigned offset) | 197 | static int plgpio_request(struct gpio_chip *chip, unsigned offset) |
198 | { | 198 | { |
199 | struct plgpio *plgpio = container_of(chip, struct plgpio, chip); | 199 | struct plgpio *plgpio = gpiochip_get_data(chip); |
200 | int gpio = chip->base + offset; | 200 | int gpio = chip->base + offset; |
201 | unsigned long flags; | 201 | unsigned long flags; |
202 | int ret = 0; | 202 | int ret = 0; |
@@ -248,7 +248,7 @@ err0: | |||
248 | 248 | ||
249 | static void plgpio_free(struct gpio_chip *chip, unsigned offset) | 249 | static void plgpio_free(struct gpio_chip *chip, unsigned offset) |
250 | { | 250 | { |
251 | struct plgpio *plgpio = container_of(chip, struct plgpio, chip); | 251 | struct plgpio *plgpio = gpiochip_get_data(chip); |
252 | int gpio = chip->base + offset; | 252 | int gpio = chip->base + offset; |
253 | unsigned long flags; | 253 | unsigned long flags; |
254 | 254 | ||
@@ -280,7 +280,7 @@ disable_clk: | |||
280 | static void plgpio_irq_disable(struct irq_data *d) | 280 | static void plgpio_irq_disable(struct irq_data *d) |
281 | { | 281 | { |
282 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 282 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
283 | struct plgpio *plgpio = container_of(gc, struct plgpio, chip); | 283 | struct plgpio *plgpio = gpiochip_get_data(gc); |
284 | int offset = d->hwirq; | 284 | int offset = d->hwirq; |
285 | unsigned long flags; | 285 | unsigned long flags; |
286 | 286 | ||
@@ -299,7 +299,7 @@ static void plgpio_irq_disable(struct irq_data *d) | |||
299 | static void plgpio_irq_enable(struct irq_data *d) | 299 | static void plgpio_irq_enable(struct irq_data *d) |
300 | { | 300 | { |
301 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 301 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
302 | struct plgpio *plgpio = container_of(gc, struct plgpio, chip); | 302 | struct plgpio *plgpio = gpiochip_get_data(gc); |
303 | int offset = d->hwirq; | 303 | int offset = d->hwirq; |
304 | unsigned long flags; | 304 | unsigned long flags; |
305 | 305 | ||
@@ -318,7 +318,7 @@ static void plgpio_irq_enable(struct irq_data *d) | |||
318 | static int plgpio_irq_set_type(struct irq_data *d, unsigned trigger) | 318 | static int plgpio_irq_set_type(struct irq_data *d, unsigned trigger) |
319 | { | 319 | { |
320 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 320 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
321 | struct plgpio *plgpio = container_of(gc, struct plgpio, chip); | 321 | struct plgpio *plgpio = gpiochip_get_data(gc); |
322 | int offset = d->hwirq; | 322 | int offset = d->hwirq; |
323 | void __iomem *reg_off; | 323 | void __iomem *reg_off; |
324 | unsigned int supported_type = 0, val; | 324 | unsigned int supported_type = 0, val; |
@@ -359,7 +359,7 @@ static struct irq_chip plgpio_irqchip = { | |||
359 | static void plgpio_irq_handler(struct irq_desc *desc) | 359 | static void plgpio_irq_handler(struct irq_desc *desc) |
360 | { | 360 | { |
361 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 361 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
362 | struct plgpio *plgpio = container_of(gc, struct plgpio, chip); | 362 | struct plgpio *plgpio = gpiochip_get_data(gc); |
363 | struct irq_chip *irqchip = irq_desc_get_chip(desc); | 363 | struct irq_chip *irqchip = irq_desc_get_chip(desc); |
364 | int regs_count, count, pin, offset, i = 0; | 364 | int regs_count, count, pin, offset, i = 0; |
365 | unsigned long pending; | 365 | unsigned long pending; |
@@ -561,7 +561,7 @@ static int plgpio_probe(struct platform_device *pdev) | |||
561 | plgpio->chip.get = plgpio_get_value; | 561 | plgpio->chip.get = plgpio_get_value; |
562 | plgpio->chip.set = plgpio_set_value; | 562 | plgpio->chip.set = plgpio_set_value; |
563 | plgpio->chip.label = dev_name(&pdev->dev); | 563 | plgpio->chip.label = dev_name(&pdev->dev); |
564 | plgpio->chip.dev = &pdev->dev; | 564 | plgpio->chip.parent = &pdev->dev; |
565 | plgpio->chip.owner = THIS_MODULE; | 565 | plgpio->chip.owner = THIS_MODULE; |
566 | plgpio->chip.of_node = pdev->dev.of_node; | 566 | plgpio->chip.of_node = pdev->dev.of_node; |
567 | 567 | ||
@@ -573,7 +573,7 @@ static int plgpio_probe(struct platform_device *pdev) | |||
573 | } | 573 | } |
574 | } | 574 | } |
575 | 575 | ||
576 | ret = gpiochip_add(&plgpio->chip); | 576 | ret = gpiochip_add_data(&plgpio->chip, plgpio); |
577 | if (ret) { | 577 | if (ret) { |
578 | dev_err(&pdev->dev, "unable to add gpio chip\n"); | 578 | dev_err(&pdev->dev, "unable to add gpio chip\n"); |
579 | goto unprepare_clk; | 579 | goto unprepare_clk; |
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index dead97daca35..7a2465f5e71e 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c | |||
@@ -12,7 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/io.h> | 13 | #include <linux/io.h> |
14 | #include <linux/clk.h> | 14 | #include <linux/clk.h> |
15 | #include <linux/gpio.h> | 15 | #include <linux/gpio/driver.h> |
16 | #include <linux/irqdomain.h> | 16 | #include <linux/irqdomain.h> |
17 | #include <linux/irqchip/chained_irq.h> | 17 | #include <linux/irqchip/chained_irq.h> |
18 | #include <linux/module.h> | 18 | #include <linux/module.h> |
@@ -454,7 +454,7 @@ static int sunxi_pinctrl_gpio_direction_input(struct gpio_chip *chip, | |||
454 | 454 | ||
455 | static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset) | 455 | static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset) |
456 | { | 456 | { |
457 | struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev); | 457 | struct sunxi_pinctrl *pctl = gpiochip_get_data(chip); |
458 | u32 reg = sunxi_data_reg(offset); | 458 | u32 reg = sunxi_data_reg(offset); |
459 | u8 index = sunxi_data_offset(offset); | 459 | u8 index = sunxi_data_offset(offset); |
460 | u32 set_mux = pctl->desc->irq_read_needs_mux && | 460 | u32 set_mux = pctl->desc->irq_read_needs_mux && |
@@ -469,13 +469,13 @@ static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
469 | if (set_mux) | 469 | if (set_mux) |
470 | sunxi_pmx_set(pctl->pctl_dev, offset, SUN4I_FUNC_IRQ); | 470 | sunxi_pmx_set(pctl->pctl_dev, offset, SUN4I_FUNC_IRQ); |
471 | 471 | ||
472 | return val; | 472 | return !!val; |
473 | } | 473 | } |
474 | 474 | ||
475 | static void sunxi_pinctrl_gpio_set(struct gpio_chip *chip, | 475 | static void sunxi_pinctrl_gpio_set(struct gpio_chip *chip, |
476 | unsigned offset, int value) | 476 | unsigned offset, int value) |
477 | { | 477 | { |
478 | struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev); | 478 | struct sunxi_pinctrl *pctl = gpiochip_get_data(chip); |
479 | u32 reg = sunxi_data_reg(offset); | 479 | u32 reg = sunxi_data_reg(offset); |
480 | u8 index = sunxi_data_offset(offset); | 480 | u8 index = sunxi_data_offset(offset); |
481 | unsigned long flags; | 481 | unsigned long flags; |
@@ -522,7 +522,7 @@ static int sunxi_pinctrl_gpio_of_xlate(struct gpio_chip *gc, | |||
522 | 522 | ||
523 | static int sunxi_pinctrl_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 523 | static int sunxi_pinctrl_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
524 | { | 524 | { |
525 | struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev); | 525 | struct sunxi_pinctrl *pctl = gpiochip_get_data(chip); |
526 | struct sunxi_desc_function *desc; | 526 | struct sunxi_desc_function *desc; |
527 | unsigned pinnum = pctl->desc->pin_base + offset; | 527 | unsigned pinnum = pctl->desc->pin_base + offset; |
528 | unsigned irqnum; | 528 | unsigned irqnum; |
@@ -536,7 +536,7 @@ static int sunxi_pinctrl_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | |||
536 | 536 | ||
537 | irqnum = desc->irqbank * IRQ_PER_BANK + desc->irqnum; | 537 | irqnum = desc->irqbank * IRQ_PER_BANK + desc->irqnum; |
538 | 538 | ||
539 | dev_dbg(chip->dev, "%s: request IRQ for GPIO %d, return %d\n", | 539 | dev_dbg(chip->parent, "%s: request IRQ for GPIO %d, return %d\n", |
540 | chip->label, offset + chip->base, irqnum); | 540 | chip->label, offset + chip->base, irqnum); |
541 | 541 | ||
542 | return irq_find_mapping(pctl->domain, irqnum); | 542 | return irq_find_mapping(pctl->domain, irqnum); |
@@ -959,10 +959,10 @@ int sunxi_pinctrl_init(struct platform_device *pdev, | |||
959 | pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK) - | 959 | pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK) - |
960 | pctl->desc->pin_base; | 960 | pctl->desc->pin_base; |
961 | pctl->chip->label = dev_name(&pdev->dev); | 961 | pctl->chip->label = dev_name(&pdev->dev); |
962 | pctl->chip->dev = &pdev->dev; | 962 | pctl->chip->parent = &pdev->dev; |
963 | pctl->chip->base = pctl->desc->pin_base; | 963 | pctl->chip->base = pctl->desc->pin_base; |
964 | 964 | ||
965 | ret = gpiochip_add(pctl->chip); | 965 | ret = gpiochip_add_data(pctl->chip, pctl); |
966 | if (ret) | 966 | if (ret) |
967 | goto pinctrl_error; | 967 | goto pinctrl_error; |
968 | 968 | ||
diff --git a/drivers/pinctrl/vt8500/pinctrl-wmt.c b/drivers/pinctrl/vt8500/pinctrl-wmt.c index fb22d3f62480..5c261bf5542f 100644 --- a/drivers/pinctrl/vt8500/pinctrl-wmt.c +++ b/drivers/pinctrl/vt8500/pinctrl-wmt.c | |||
@@ -14,7 +14,7 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include <linux/err.h> | 16 | #include <linux/err.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio/driver.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | #include <linux/irq.h> | 20 | #include <linux/irq.h> |
@@ -488,7 +488,7 @@ static struct pinctrl_desc wmt_desc = { | |||
488 | 488 | ||
489 | static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | 489 | static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
490 | { | 490 | { |
491 | struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev); | 491 | struct wmt_pinctrl_data *data = gpiochip_get_data(chip); |
492 | u32 bank = WMT_BANK_FROM_PIN(offset); | 492 | u32 bank = WMT_BANK_FROM_PIN(offset); |
493 | u32 bit = WMT_BIT_FROM_PIN(offset); | 493 | u32 bit = WMT_BIT_FROM_PIN(offset); |
494 | u32 reg_dir = data->banks[bank].reg_dir; | 494 | u32 reg_dir = data->banks[bank].reg_dir; |
@@ -503,7 +503,7 @@ static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | |||
503 | 503 | ||
504 | static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset) | 504 | static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset) |
505 | { | 505 | { |
506 | struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev); | 506 | struct wmt_pinctrl_data *data = gpiochip_get_data(chip); |
507 | u32 bank = WMT_BANK_FROM_PIN(offset); | 507 | u32 bank = WMT_BANK_FROM_PIN(offset); |
508 | u32 bit = WMT_BIT_FROM_PIN(offset); | 508 | u32 bit = WMT_BIT_FROM_PIN(offset); |
509 | u32 reg_data_in = data->banks[bank].reg_data_in; | 509 | u32 reg_data_in = data->banks[bank].reg_data_in; |
@@ -519,7 +519,7 @@ static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset) | |||
519 | static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset, | 519 | static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset, |
520 | int val) | 520 | int val) |
521 | { | 521 | { |
522 | struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev); | 522 | struct wmt_pinctrl_data *data = gpiochip_get_data(chip); |
523 | u32 bank = WMT_BANK_FROM_PIN(offset); | 523 | u32 bank = WMT_BANK_FROM_PIN(offset); |
524 | u32 bit = WMT_BIT_FROM_PIN(offset); | 524 | u32 bit = WMT_BIT_FROM_PIN(offset); |
525 | u32 reg_data_out = data->banks[bank].reg_data_out; | 525 | u32 reg_data_out = data->banks[bank].reg_data_out; |
@@ -575,7 +575,7 @@ int wmt_pinctrl_probe(struct platform_device *pdev, | |||
575 | wmt_desc.npins = data->npins; | 575 | wmt_desc.npins = data->npins; |
576 | 576 | ||
577 | data->gpio_chip = wmt_gpio_chip; | 577 | data->gpio_chip = wmt_gpio_chip; |
578 | data->gpio_chip.dev = &pdev->dev; | 578 | data->gpio_chip.parent = &pdev->dev; |
579 | data->gpio_chip.of_node = pdev->dev.of_node; | 579 | data->gpio_chip.of_node = pdev->dev.of_node; |
580 | data->gpio_chip.ngpio = data->nbanks * 32; | 580 | data->gpio_chip.ngpio = data->nbanks * 32; |
581 | 581 | ||
@@ -589,7 +589,7 @@ int wmt_pinctrl_probe(struct platform_device *pdev, | |||
589 | return PTR_ERR(data->pctl_dev); | 589 | return PTR_ERR(data->pctl_dev); |
590 | } | 590 | } |
591 | 591 | ||
592 | err = gpiochip_add(&data->gpio_chip); | 592 | err = gpiochip_add_data(&data->gpio_chip, data); |
593 | if (err) { | 593 | if (err) { |
594 | dev_err(&pdev->dev, "could not add GPIO chip\n"); | 594 | dev_err(&pdev->dev, "could not add GPIO chip\n"); |
595 | goto fail_gpio; | 595 | goto fail_gpio; |
diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c index 709f0afdafa8..0e73fd10ba72 100644 --- a/drivers/platform/x86/intel_pmic_gpio.c +++ b/drivers/platform/x86/intel_pmic_gpio.c | |||
@@ -274,11 +274,11 @@ static int platform_pmic_gpio_probe(struct platform_device *pdev) | |||
274 | pg->chip.base = pdata->gpio_base; | 274 | pg->chip.base = pdata->gpio_base; |
275 | pg->chip.ngpio = NUM_GPIO; | 275 | pg->chip.ngpio = NUM_GPIO; |
276 | pg->chip.can_sleep = 1; | 276 | pg->chip.can_sleep = 1; |
277 | pg->chip.dev = dev; | 277 | pg->chip.parent = dev; |
278 | 278 | ||
279 | mutex_init(&pg->buslock); | 279 | mutex_init(&pg->buslock); |
280 | 280 | ||
281 | pg->chip.dev = dev; | 281 | pg->chip.parent = dev; |
282 | retval = gpiochip_add(&pg->chip); | 282 | retval = gpiochip_add(&pg->chip); |
283 | if (retval) { | 283 | if (retval) { |
284 | pr_err("Can not add pmic gpio chip\n"); | 284 | pr_err("Can not add pmic gpio chip\n"); |
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c index d45133056f51..3f98165b479c 100644 --- a/drivers/tty/serial/max310x.c +++ b/drivers/tty/serial/max310x.c | |||
@@ -1174,7 +1174,7 @@ static int max310x_probe(struct device *dev, struct max310x_devtype *devtype, | |||
1174 | #ifdef CONFIG_GPIOLIB | 1174 | #ifdef CONFIG_GPIOLIB |
1175 | /* Setup GPIO cotroller */ | 1175 | /* Setup GPIO cotroller */ |
1176 | s->gpio.owner = THIS_MODULE; | 1176 | s->gpio.owner = THIS_MODULE; |
1177 | s->gpio.dev = dev; | 1177 | s->gpio.parent = dev; |
1178 | s->gpio.label = dev_name(dev); | 1178 | s->gpio.label = dev_name(dev); |
1179 | s->gpio.direction_input = max310x_gpio_direction_input; | 1179 | s->gpio.direction_input = max310x_gpio_direction_input; |
1180 | s->gpio.get = max310x_gpio_get; | 1180 | s->gpio.get = max310x_gpio_get; |
diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index 5815bcbc55b2..13f8d5f70272 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c | |||
@@ -1193,7 +1193,7 @@ static int sc16is7xx_probe(struct device *dev, | |||
1193 | if (devtype->nr_gpio) { | 1193 | if (devtype->nr_gpio) { |
1194 | /* Setup GPIO cotroller */ | 1194 | /* Setup GPIO cotroller */ |
1195 | s->gpio.owner = THIS_MODULE; | 1195 | s->gpio.owner = THIS_MODULE; |
1196 | s->gpio.dev = dev; | 1196 | s->gpio.parent = dev; |
1197 | s->gpio.label = dev_name(dev); | 1197 | s->gpio.label = dev_name(dev); |
1198 | s->gpio.direction_input = sc16is7xx_gpio_direction_input; | 1198 | s->gpio.direction_input = sc16is7xx_gpio_direction_input; |
1199 | s->gpio.get = sc16is7xx_gpio_get; | 1199 | s->gpio.get = sc16is7xx_gpio_get; |
diff --git a/drivers/video/fbdev/via/via-gpio.c b/drivers/video/fbdev/via/via-gpio.c index 6f433b8cee12..1e89c3434071 100644 --- a/drivers/video/fbdev/via/via-gpio.c +++ b/drivers/video/fbdev/via/via-gpio.c | |||
@@ -6,7 +6,7 @@ | |||
6 | */ | 6 | */ |
7 | 7 | ||
8 | #include <linux/spinlock.h> | 8 | #include <linux/spinlock.h> |
9 | #include <linux/gpio.h> | 9 | #include <linux/gpio/driver.h> |
10 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
11 | #include <linux/via-core.h> | 11 | #include <linux/via-core.h> |
12 | #include <linux/via-gpio.h> | 12 | #include <linux/via-gpio.h> |
@@ -83,9 +83,7 @@ struct viafb_gpio_cfg { | |||
83 | static void via_gpio_set(struct gpio_chip *chip, unsigned int nr, | 83 | static void via_gpio_set(struct gpio_chip *chip, unsigned int nr, |
84 | int value) | 84 | int value) |
85 | { | 85 | { |
86 | struct viafb_gpio_cfg *cfg = container_of(chip, | 86 | struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip); |
87 | struct viafb_gpio_cfg, | ||
88 | gpio_chip); | ||
89 | u8 reg; | 87 | u8 reg; |
90 | struct viafb_gpio *gpio; | 88 | struct viafb_gpio *gpio; |
91 | unsigned long flags; | 89 | unsigned long flags; |
@@ -115,9 +113,7 @@ static int via_gpio_dir_out(struct gpio_chip *chip, unsigned int nr, | |||
115 | */ | 113 | */ |
116 | static int via_gpio_dir_input(struct gpio_chip *chip, unsigned int nr) | 114 | static int via_gpio_dir_input(struct gpio_chip *chip, unsigned int nr) |
117 | { | 115 | { |
118 | struct viafb_gpio_cfg *cfg = container_of(chip, | 116 | struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip); |
119 | struct viafb_gpio_cfg, | ||
120 | gpio_chip); | ||
121 | struct viafb_gpio *gpio; | 117 | struct viafb_gpio *gpio; |
122 | unsigned long flags; | 118 | unsigned long flags; |
123 | 119 | ||
@@ -131,9 +127,7 @@ static int via_gpio_dir_input(struct gpio_chip *chip, unsigned int nr) | |||
131 | 127 | ||
132 | static int via_gpio_get(struct gpio_chip *chip, unsigned int nr) | 128 | static int via_gpio_get(struct gpio_chip *chip, unsigned int nr) |
133 | { | 129 | { |
134 | struct viafb_gpio_cfg *cfg = container_of(chip, | 130 | struct viafb_gpio_cfg *cfg = gpiochip_get_data(chip); |
135 | struct viafb_gpio_cfg, | ||
136 | gpio_chip); | ||
137 | u8 reg; | 131 | u8 reg; |
138 | struct viafb_gpio *gpio; | 132 | struct viafb_gpio *gpio; |
139 | unsigned long flags; | 133 | unsigned long flags; |
@@ -142,7 +136,7 @@ static int via_gpio_get(struct gpio_chip *chip, unsigned int nr) | |||
142 | gpio = cfg->active_gpios[nr]; | 136 | gpio = cfg->active_gpios[nr]; |
143 | reg = via_read_reg(VIASR, gpio->vg_port_index); | 137 | reg = via_read_reg(VIASR, gpio->vg_port_index); |
144 | spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags); | 138 | spin_unlock_irqrestore(&cfg->vdev->reg_lock, flags); |
145 | return reg & (0x04 << gpio->vg_mask_shift); | 139 | return !!(reg & (0x04 << gpio->vg_mask_shift)); |
146 | } | 140 | } |
147 | 141 | ||
148 | 142 | ||
@@ -255,7 +249,8 @@ static int viafb_gpio_probe(struct platform_device *platdev) | |||
255 | * Get registered. | 249 | * Get registered. |
256 | */ | 250 | */ |
257 | viafb_gpio_config.gpio_chip.base = -1; /* Dynamic */ | 251 | viafb_gpio_config.gpio_chip.base = -1; /* Dynamic */ |
258 | ret = gpiochip_add(&viafb_gpio_config.gpio_chip); | 252 | ret = gpiochip_add_data(&viafb_gpio_config.gpio_chip, |
253 | &viafb_gpio_config); | ||
259 | if (ret) { | 254 | if (ret) { |
260 | printk(KERN_ERR "viafb: failed to add gpios (%d)\n", ret); | 255 | printk(KERN_ERR "viafb: failed to add gpios (%d)\n", ret); |
261 | viafb_gpio_config.gpio_chip.ngpio = 0; | 256 | viafb_gpio_config.gpio_chip.ngpio = 0; |
diff --git a/include/linux/basic_mmio_gpio.h b/include/linux/basic_mmio_gpio.h deleted file mode 100644 index ed3768f4ecc7..000000000000 --- a/include/linux/basic_mmio_gpio.h +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | /* | ||
2 | * Basic memory-mapped GPIO controllers. | ||
3 | * | ||
4 | * Copyright 2008 MontaVista Software, Inc. | ||
5 | * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef __BASIC_MMIO_GPIO_H | ||
14 | #define __BASIC_MMIO_GPIO_H | ||
15 | |||
16 | #include <linux/gpio.h> | ||
17 | #include <linux/types.h> | ||
18 | #include <linux/compiler.h> | ||
19 | #include <linux/spinlock_types.h> | ||
20 | |||
21 | struct bgpio_pdata { | ||
22 | const char *label; | ||
23 | int base; | ||
24 | int ngpio; | ||
25 | }; | ||
26 | |||
27 | struct device; | ||
28 | |||
29 | struct bgpio_chip { | ||
30 | struct gpio_chip gc; | ||
31 | |||
32 | unsigned long (*read_reg)(void __iomem *reg); | ||
33 | void (*write_reg)(void __iomem *reg, unsigned long data); | ||
34 | |||
35 | void __iomem *reg_dat; | ||
36 | void __iomem *reg_set; | ||
37 | void __iomem *reg_clr; | ||
38 | void __iomem *reg_dir; | ||
39 | |||
40 | /* Number of bits (GPIOs): <register width> * 8. */ | ||
41 | int bits; | ||
42 | |||
43 | /* | ||
44 | * Some GPIO controllers work with the big-endian bits notation, | ||
45 | * e.g. in a 8-bits register, GPIO7 is the least significant bit. | ||
46 | */ | ||
47 | unsigned long (*pin2mask)(struct bgpio_chip *bgc, unsigned int pin); | ||
48 | |||
49 | /* | ||
50 | * Used to lock bgpio_chip->data. Also, this is needed to keep | ||
51 | * shadowed and real data registers writes together. | ||
52 | */ | ||
53 | spinlock_t lock; | ||
54 | |||
55 | /* Shadowed data register to clear/set bits safely. */ | ||
56 | unsigned long data; | ||
57 | |||
58 | /* Shadowed direction registers to clear/set direction safely. */ | ||
59 | unsigned long dir; | ||
60 | }; | ||
61 | |||
62 | static inline struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc) | ||
63 | { | ||
64 | return container_of(gc, struct bgpio_chip, gc); | ||
65 | } | ||
66 | |||
67 | int bgpio_remove(struct bgpio_chip *bgc); | ||
68 | int bgpio_init(struct bgpio_chip *bgc, struct device *dev, | ||
69 | unsigned long sz, void __iomem *dat, void __iomem *set, | ||
70 | void __iomem *clr, void __iomem *dirout, void __iomem *dirin, | ||
71 | unsigned long flags); | ||
72 | |||
73 | #define BGPIOF_BIG_ENDIAN BIT(0) | ||
74 | #define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ | ||
75 | #define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ | ||
76 | #define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3) | ||
77 | #define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */ | ||
78 | #define BGPIOF_NO_OUTPUT BIT(5) /* only input */ | ||
79 | |||
80 | #endif /* __BASIC_MMIO_GPIO_H */ | ||
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index d1baebf350d8..82fda487453f 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h | |||
@@ -8,6 +8,7 @@ | |||
8 | #include <linux/irqdomain.h> | 8 | #include <linux/irqdomain.h> |
9 | #include <linux/lockdep.h> | 9 | #include <linux/lockdep.h> |
10 | #include <linux/pinctrl/pinctrl.h> | 10 | #include <linux/pinctrl/pinctrl.h> |
11 | #include <linux/kconfig.h> | ||
11 | 12 | ||
12 | struct device; | 13 | struct device; |
13 | struct gpio_desc; | 14 | struct gpio_desc; |
@@ -20,9 +21,10 @@ struct seq_file; | |||
20 | /** | 21 | /** |
21 | * struct gpio_chip - abstract a GPIO controller | 22 | * struct gpio_chip - abstract a GPIO controller |
22 | * @label: for diagnostics | 23 | * @label: for diagnostics |
23 | * @dev: optional device providing the GPIOs | 24 | * @parent: optional parent device providing the GPIOs |
24 | * @cdev: class device used by sysfs interface (may be NULL) | 25 | * @cdev: class device used by sysfs interface (may be NULL) |
25 | * @owner: helps prevent removal of modules exporting active GPIOs | 26 | * @owner: helps prevent removal of modules exporting active GPIOs |
27 | * @data: per-instance data assigned by the driver | ||
26 | * @list: links gpio_chips together for traversal | 28 | * @list: links gpio_chips together for traversal |
27 | * @request: optional hook for chip-specific activation, such as | 29 | * @request: optional hook for chip-specific activation, such as |
28 | * enabling module power and clock; may sleep | 30 | * enabling module power and clock; may sleep |
@@ -32,8 +34,7 @@ struct seq_file; | |||
32 | * (same as GPIOF_DIR_XXX), or negative error | 34 | * (same as GPIOF_DIR_XXX), or negative error |
33 | * @direction_input: configures signal "offset" as input, or returns error | 35 | * @direction_input: configures signal "offset" as input, or returns error |
34 | * @direction_output: configures signal "offset" as output, or returns error | 36 | * @direction_output: configures signal "offset" as output, or returns error |
35 | * @get: returns value for signal "offset"; for output signals this | 37 | * @get: returns value for signal "offset", 0=low, 1=high, or negative error |
36 | * returns either the value actually sensed, or zero | ||
37 | * @set: assigns output value for signal "offset" | 38 | * @set: assigns output value for signal "offset" |
38 | * @set_multiple: assigns output values for multiple signals defined by "mask" | 39 | * @set_multiple: assigns output values for multiple signals defined by "mask" |
39 | * @set_debounce: optional hook for setting debounce time for specified gpio in | 40 | * @set_debounce: optional hook for setting debounce time for specified gpio in |
@@ -65,6 +66,23 @@ struct seq_file; | |||
65 | * registers. | 66 | * registers. |
66 | * @irq_not_threaded: flag must be set if @can_sleep is set but the | 67 | * @irq_not_threaded: flag must be set if @can_sleep is set but the |
67 | * IRQs don't need to be threaded | 68 | * IRQs don't need to be threaded |
69 | * @read_reg: reader function for generic GPIO | ||
70 | * @write_reg: writer function for generic GPIO | ||
71 | * @pin2mask: some generic GPIO controllers work with the big-endian bits | ||
72 | * notation, e.g. in a 8-bits register, GPIO7 is the least significant | ||
73 | * bit. This callback assigns the right bit mask. | ||
74 | * @reg_dat: data (in) register for generic GPIO | ||
75 | * @reg_set: output set register (out=high) for generic GPIO | ||
76 | * @reg_clk: output clear register (out=low) for generic GPIO | ||
77 | * @reg_dir: direction setting register for generic GPIO | ||
78 | * @bgpio_bits: number of register bits used for a generic GPIO i.e. | ||
79 | * <register width> * 8 | ||
80 | * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep | ||
81 | * shadowed and real data registers writes together. | ||
82 | * @bgpio_data: shadowed data register for generic GPIO to clear/set bits | ||
83 | * safely. | ||
84 | * @bgpio_dir: shadowed direction register for generic GPIO to clear/set | ||
85 | * direction safely. | ||
68 | * @irqchip: GPIO IRQ chip impl, provided by GPIO driver | 86 | * @irqchip: GPIO IRQ chip impl, provided by GPIO driver |
69 | * @irqdomain: Interrupt translation domain; responsible for mapping | 87 | * @irqdomain: Interrupt translation domain; responsible for mapping |
70 | * between GPIO hwirq number and linux irq number | 88 | * between GPIO hwirq number and linux irq number |
@@ -89,9 +107,10 @@ struct seq_file; | |||
89 | */ | 107 | */ |
90 | struct gpio_chip { | 108 | struct gpio_chip { |
91 | const char *label; | 109 | const char *label; |
92 | struct device *dev; | 110 | struct device *parent; |
93 | struct device *cdev; | 111 | struct device *cdev; |
94 | struct module *owner; | 112 | struct module *owner; |
113 | void *data; | ||
95 | struct list_head list; | 114 | struct list_head list; |
96 | 115 | ||
97 | int (*request)(struct gpio_chip *chip, | 116 | int (*request)(struct gpio_chip *chip, |
@@ -127,6 +146,20 @@ struct gpio_chip { | |||
127 | bool can_sleep; | 146 | bool can_sleep; |
128 | bool irq_not_threaded; | 147 | bool irq_not_threaded; |
129 | 148 | ||
149 | #if IS_ENABLED(CONFIG_GPIO_GENERIC) | ||
150 | unsigned long (*read_reg)(void __iomem *reg); | ||
151 | void (*write_reg)(void __iomem *reg, unsigned long data); | ||
152 | unsigned long (*pin2mask)(struct gpio_chip *gc, unsigned int pin); | ||
153 | void __iomem *reg_dat; | ||
154 | void __iomem *reg_set; | ||
155 | void __iomem *reg_clr; | ||
156 | void __iomem *reg_dir; | ||
157 | int bgpio_bits; | ||
158 | spinlock_t bgpio_lock; | ||
159 | unsigned long bgpio_data; | ||
160 | unsigned long bgpio_dir; | ||
161 | #endif | ||
162 | |||
130 | #ifdef CONFIG_GPIOLIB_IRQCHIP | 163 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
131 | /* | 164 | /* |
132 | * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib | 165 | * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib |
@@ -166,7 +199,11 @@ extern const char *gpiochip_is_requested(struct gpio_chip *chip, | |||
166 | unsigned offset); | 199 | unsigned offset); |
167 | 200 | ||
168 | /* add/remove chips */ | 201 | /* add/remove chips */ |
169 | extern int gpiochip_add(struct gpio_chip *chip); | 202 | extern int gpiochip_add_data(struct gpio_chip *chip, void *data); |
203 | static inline int gpiochip_add(struct gpio_chip *chip) | ||
204 | { | ||
205 | return gpiochip_add_data(chip, NULL); | ||
206 | } | ||
170 | extern void gpiochip_remove(struct gpio_chip *chip); | 207 | extern void gpiochip_remove(struct gpio_chip *chip); |
171 | extern struct gpio_chip *gpiochip_find(void *data, | 208 | extern struct gpio_chip *gpiochip_find(void *data, |
172 | int (*match)(struct gpio_chip *chip, void *data)); | 209 | int (*match)(struct gpio_chip *chip, void *data)); |
@@ -175,8 +212,36 @@ extern struct gpio_chip *gpiochip_find(void *data, | |||
175 | int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset); | 212 | int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset); |
176 | void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); | 213 | void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); |
177 | 214 | ||
215 | /* get driver data */ | ||
216 | static inline void *gpiochip_get_data(struct gpio_chip *chip) | ||
217 | { | ||
218 | return chip->data; | ||
219 | } | ||
220 | |||
178 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); | 221 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); |
179 | 222 | ||
223 | struct bgpio_pdata { | ||
224 | const char *label; | ||
225 | int base; | ||
226 | int ngpio; | ||
227 | }; | ||
228 | |||
229 | #if IS_ENABLED(CONFIG_GPIO_GENERIC) | ||
230 | |||
231 | int bgpio_init(struct gpio_chip *gc, struct device *dev, | ||
232 | unsigned long sz, void __iomem *dat, void __iomem *set, | ||
233 | void __iomem *clr, void __iomem *dirout, void __iomem *dirin, | ||
234 | unsigned long flags); | ||
235 | |||
236 | #define BGPIOF_BIG_ENDIAN BIT(0) | ||
237 | #define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ | ||
238 | #define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ | ||
239 | #define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3) | ||
240 | #define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */ | ||
241 | #define BGPIOF_NO_OUTPUT BIT(5) /* only input */ | ||
242 | |||
243 | #endif | ||
244 | |||
180 | #ifdef CONFIG_GPIOLIB_IRQCHIP | 245 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
181 | 246 | ||
182 | void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, | 247 | void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, |
diff --git a/include/linux/of_gpio.h b/include/linux/of_gpio.h index 87d6d1632dd4..092186c62ff4 100644 --- a/include/linux/of_gpio.h +++ b/include/linux/of_gpio.h | |||
@@ -51,8 +51,14 @@ static inline struct of_mm_gpio_chip *to_of_mm_gpio_chip(struct gpio_chip *gc) | |||
51 | extern int of_get_named_gpio_flags(struct device_node *np, | 51 | extern int of_get_named_gpio_flags(struct device_node *np, |
52 | const char *list_name, int index, enum of_gpio_flags *flags); | 52 | const char *list_name, int index, enum of_gpio_flags *flags); |
53 | 53 | ||
54 | extern int of_mm_gpiochip_add(struct device_node *np, | 54 | extern int of_mm_gpiochip_add_data(struct device_node *np, |
55 | struct of_mm_gpio_chip *mm_gc); | 55 | struct of_mm_gpio_chip *mm_gc, |
56 | void *data); | ||
57 | static inline int of_mm_gpiochip_add(struct device_node *np, | ||
58 | struct of_mm_gpio_chip *mm_gc) | ||
59 | { | ||
60 | return of_mm_gpiochip_add_data(np, mm_gc, NULL); | ||
61 | } | ||
56 | extern void of_mm_gpiochip_remove(struct of_mm_gpio_chip *mm_gc); | 62 | extern void of_mm_gpiochip_remove(struct of_mm_gpio_chip *mm_gc); |
57 | 63 | ||
58 | extern int of_gpiochip_add(struct gpio_chip *gc); | 64 | extern int of_gpiochip_add(struct gpio_chip *gc); |
@@ -67,6 +73,9 @@ extern int of_gpio_simple_xlate(struct gpio_chip *gc, | |||
67 | static inline int of_get_named_gpio_flags(struct device_node *np, | 73 | static inline int of_get_named_gpio_flags(struct device_node *np, |
68 | const char *list_name, int index, enum of_gpio_flags *flags) | 74 | const char *list_name, int index, enum of_gpio_flags *flags) |
69 | { | 75 | { |
76 | if (flags) | ||
77 | *flags = 0; | ||
78 | |||
70 | return -ENOSYS; | 79 | return -ENOSYS; |
71 | } | 80 | } |
72 | 81 | ||
diff --git a/include/linux/platform_data/gpio-rcar.h b/include/linux/platform_data/gpio-rcar.h deleted file mode 100644 index 2d8d69432813..000000000000 --- a/include/linux/platform_data/gpio-rcar.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* | ||
2 | * Renesas R-Car GPIO Support | ||
3 | * | ||
4 | * Copyright (C) 2013 Magnus Damm | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __GPIO_RCAR_H__ | ||
17 | #define __GPIO_RCAR_H__ | ||
18 | |||
19 | struct gpio_rcar_config { | ||
20 | int gpio_base; | ||
21 | unsigned int irq_base; | ||
22 | unsigned int number_of_pins; | ||
23 | const char *pctl_name; | ||
24 | unsigned has_both_edge_trigger:1; | ||
25 | }; | ||
26 | |||
27 | #define RCAR_GP_PIN(bank, pin) (((bank) * 32) + (pin)) | ||
28 | |||
29 | #endif /* __GPIO_RCAR_H__ */ | ||
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index 967678e7f48e..33e290b703df 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c | |||
@@ -4694,7 +4694,7 @@ static void rt5677_init_gpio(struct i2c_client *i2c) | |||
4694 | 4694 | ||
4695 | rt5677->gpio_chip = rt5677_template_chip; | 4695 | rt5677->gpio_chip = rt5677_template_chip; |
4696 | rt5677->gpio_chip.ngpio = RT5677_GPIO_NUM; | 4696 | rt5677->gpio_chip.ngpio = RT5677_GPIO_NUM; |
4697 | rt5677->gpio_chip.dev = &i2c->dev; | 4697 | rt5677->gpio_chip.parent = &i2c->dev; |
4698 | rt5677->gpio_chip.base = -1; | 4698 | rt5677->gpio_chip.base = -1; |
4699 | 4699 | ||
4700 | ret = gpiochip_add(&rt5677->gpio_chip); | 4700 | ret = gpiochip_add(&rt5677->gpio_chip); |
diff --git a/sound/soc/codecs/wm5100.c b/sound/soc/codecs/wm5100.c index c2cdcae18ff6..171a23ddd15d 100644 --- a/sound/soc/codecs/wm5100.c +++ b/sound/soc/codecs/wm5100.c | |||
@@ -2306,7 +2306,7 @@ static void wm5100_init_gpio(struct i2c_client *i2c) | |||
2306 | 2306 | ||
2307 | wm5100->gpio_chip = wm5100_template_chip; | 2307 | wm5100->gpio_chip = wm5100_template_chip; |
2308 | wm5100->gpio_chip.ngpio = 6; | 2308 | wm5100->gpio_chip.ngpio = 6; |
2309 | wm5100->gpio_chip.dev = &i2c->dev; | 2309 | wm5100->gpio_chip.parent = &i2c->dev; |
2310 | 2310 | ||
2311 | if (wm5100->pdata.gpio_base) | 2311 | if (wm5100->pdata.gpio_base) |
2312 | wm5100->gpio_chip.base = wm5100->pdata.gpio_base; | 2312 | wm5100->gpio_chip.base = wm5100->pdata.gpio_base; |
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c index 2ed6419c181e..a82b8bc2cfc0 100644 --- a/sound/soc/codecs/wm8903.c +++ b/sound/soc/codecs/wm8903.c | |||
@@ -1853,7 +1853,7 @@ static void wm8903_init_gpio(struct wm8903_priv *wm8903) | |||
1853 | 1853 | ||
1854 | wm8903->gpio_chip = wm8903_template_chip; | 1854 | wm8903->gpio_chip = wm8903_template_chip; |
1855 | wm8903->gpio_chip.ngpio = WM8903_NUM_GPIO; | 1855 | wm8903->gpio_chip.ngpio = WM8903_NUM_GPIO; |
1856 | wm8903->gpio_chip.dev = wm8903->dev; | 1856 | wm8903->gpio_chip.parent = wm8903->dev; |
1857 | 1857 | ||
1858 | if (pdata->gpio_base) | 1858 | if (pdata->gpio_base) |
1859 | wm8903->gpio_chip.base = pdata->gpio_base; | 1859 | wm8903->gpio_chip.base = pdata->gpio_base; |
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 949f632fc3f8..88223608a33f 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c | |||
@@ -3379,7 +3379,7 @@ static void wm8962_init_gpio(struct snd_soc_codec *codec) | |||
3379 | 3379 | ||
3380 | wm8962->gpio_chip = wm8962_template_chip; | 3380 | wm8962->gpio_chip = wm8962_template_chip; |
3381 | wm8962->gpio_chip.ngpio = WM8962_MAX_GPIO; | 3381 | wm8962->gpio_chip.ngpio = WM8962_MAX_GPIO; |
3382 | wm8962->gpio_chip.dev = codec->dev; | 3382 | wm8962->gpio_chip.parent = codec->dev; |
3383 | 3383 | ||
3384 | if (pdata->gpio_base) | 3384 | if (pdata->gpio_base) |
3385 | wm8962->gpio_chip.base = pdata->gpio_base; | 3385 | wm8962->gpio_chip.base = pdata->gpio_base; |
diff --git a/sound/soc/codecs/wm8996.c b/sound/soc/codecs/wm8996.c index f7ccd9fc5808..8d7d6c01a2f7 100644 --- a/sound/soc/codecs/wm8996.c +++ b/sound/soc/codecs/wm8996.c | |||
@@ -2204,7 +2204,7 @@ static void wm8996_init_gpio(struct wm8996_priv *wm8996) | |||
2204 | 2204 | ||
2205 | wm8996->gpio_chip = wm8996_template_chip; | 2205 | wm8996->gpio_chip = wm8996_template_chip; |
2206 | wm8996->gpio_chip.ngpio = 5; | 2206 | wm8996->gpio_chip.ngpio = 5; |
2207 | wm8996->gpio_chip.dev = wm8996->dev; | 2207 | wm8996->gpio_chip.parent = wm8996->dev; |
2208 | 2208 | ||
2209 | if (wm8996->pdata.gpio_base) | 2209 | if (wm8996->pdata.gpio_base) |
2210 | wm8996->gpio_chip.base = wm8996->pdata.gpio_base; | 2210 | wm8996->gpio_chip.base = wm8996->pdata.gpio_base; |
diff --git a/sound/soc/soc-ac97.c b/sound/soc/soc-ac97.c index 733f5128eeff..7e0acd83b0e6 100644 --- a/sound/soc/soc-ac97.c +++ b/sound/soc/soc-ac97.c | |||
@@ -142,7 +142,7 @@ static int snd_soc_ac97_init_gpio(struct snd_ac97 *ac97, | |||
142 | gpio_priv->codec = codec; | 142 | gpio_priv->codec = codec; |
143 | gpio_priv->gpio_chip = snd_soc_ac97_gpio_chip; | 143 | gpio_priv->gpio_chip = snd_soc_ac97_gpio_chip; |
144 | gpio_priv->gpio_chip.ngpio = AC97_NUM_GPIOS; | 144 | gpio_priv->gpio_chip.ngpio = AC97_NUM_GPIOS; |
145 | gpio_priv->gpio_chip.dev = codec->dev; | 145 | gpio_priv->gpio_chip.parent = codec->dev; |
146 | gpio_priv->gpio_chip.base = -1; | 146 | gpio_priv->gpio_chip.base = -1; |
147 | 147 | ||
148 | ret = gpiochip_add(&gpio_priv->gpio_chip); | 148 | ret = gpiochip_add(&gpio_priv->gpio_chip); |