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-rw-r--r--arch/arm/mach-omap2/mcbsp.c12
-rw-r--r--include/linux/platform_data/asoc-ti-mcbsp.h1
2 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index b4ac3af1160c..959cb4cb1062 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -48,6 +48,17 @@ static int omap3_enable_st_clock(unsigned int id, bool enable)
48 return omap2_clk_allow_idle(mcbsp_iclks[id]); 48 return omap2_clk_allow_idle(mcbsp_iclks[id]);
49} 49}
50 50
51static int omap3_mcbsp_force_ick_on(struct clk *clk, bool force_on)
52{
53 if (!clk)
54 return 0;
55
56 if (force_on)
57 return omap2_clk_deny_idle(clk);
58 else
59 return omap2_clk_allow_idle(clk);
60}
61
51static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused) 62static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
52{ 63{
53 int id, count = 1; 64 int id, count = 1;
@@ -97,6 +108,7 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
97 oh_device[1] = omap_hwmod_lookup(( 108 oh_device[1] = omap_hwmod_lookup((
98 (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); 109 (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
99 pdata->enable_st_clock = omap3_enable_st_clock; 110 pdata->enable_st_clock = omap3_enable_st_clock;
111 pdata->force_ick_on = omap3_mcbsp_force_ick_on;
100 sprintf(clk_name, "mcbsp%d_ick", id); 112 sprintf(clk_name, "mcbsp%d_ick", id);
101 mcbsp_iclks[id] = clk_get(NULL, clk_name); 113 mcbsp_iclks[id] = clk_get(NULL, clk_name);
102 count++; 114 count++;
diff --git a/include/linux/platform_data/asoc-ti-mcbsp.h b/include/linux/platform_data/asoc-ti-mcbsp.h
index 3c73c045f8da..73e5e832fa23 100644
--- a/include/linux/platform_data/asoc-ti-mcbsp.h
+++ b/include/linux/platform_data/asoc-ti-mcbsp.h
@@ -45,6 +45,7 @@ struct omap_mcbsp_platform_data {
45 bool has_wakeup; /* Wakeup capability */ 45 bool has_wakeup; /* Wakeup capability */
46 bool has_ccr; /* Transceiver has configuration control registers */ 46 bool has_ccr; /* Transceiver has configuration control registers */
47 int (*enable_st_clock)(unsigned int, bool); 47 int (*enable_st_clock)(unsigned int, bool);
48 int (*force_ick_on)(struct clk *clk, bool force_on);
48}; 49};
49 50
50/** 51/**