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-rw-r--r--arch/arm/boot/dts/vf610.dtsi8
-rw-r--r--arch/arm/mach-imx/clk-vf610.c2
-rw-r--r--include/dt-bindings/clock/vf610-clock.h4
3 files changed, 9 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index e1eb7dadda80..67d929cf9804 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -442,8 +442,8 @@
442 compatible = "fsl,mvf600-fec"; 442 compatible = "fsl,mvf600-fec";
443 reg = <0x400d0000 0x1000>; 443 reg = <0x400d0000 0x1000>;
444 interrupts = <0 78 0x04>; 444 interrupts = <0 78 0x04>;
445 clocks = <&clks VF610_CLK_ENET>, 445 clocks = <&clks VF610_CLK_ENET0>,
446 <&clks VF610_CLK_ENET>, 446 <&clks VF610_CLK_ENET0>,
447 <&clks VF610_CLK_ENET>; 447 <&clks VF610_CLK_ENET>;
448 clock-names = "ipg", "ahb", "ptp"; 448 clock-names = "ipg", "ahb", "ptp";
449 status = "disabled"; 449 status = "disabled";
@@ -453,8 +453,8 @@
453 compatible = "fsl,mvf600-fec"; 453 compatible = "fsl,mvf600-fec";
454 reg = <0x400d1000 0x1000>; 454 reg = <0x400d1000 0x1000>;
455 interrupts = <0 79 0x04>; 455 interrupts = <0 79 0x04>;
456 clocks = <&clks VF610_CLK_ENET>, 456 clocks = <&clks VF610_CLK_ENET1>,
457 <&clks VF610_CLK_ENET>, 457 <&clks VF610_CLK_ENET1>,
458 <&clks VF610_CLK_ENET>; 458 <&clks VF610_CLK_ENET>;
459 clock-names = "ipg", "ahb", "ptp"; 459 clock-names = "ipg", "ahb", "ptp";
460 status = "disabled"; 460 status = "disabled";
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c
index d617c0b7c809..b169a396d93b 100644
--- a/arch/arm/mach-imx/clk-vf610.c
+++ b/arch/arm/mach-imx/clk-vf610.c
@@ -183,6 +183,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
183 clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7); 183 clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7);
184 clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24); 184 clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24);
185 clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23); 185 clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23);
186 clk[VF610_CLK_ENET0] = imx_clk_gate2("enet0", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(0));
187 clk[VF610_CLK_ENET1] = imx_clk_gate2("enet1", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(1));
186 188
187 clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7)); 189 clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7));
188 190
diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h
index 15e997fa78f2..4aa2b48cd151 100644
--- a/include/dt-bindings/clock/vf610-clock.h
+++ b/include/dt-bindings/clock/vf610-clock.h
@@ -158,6 +158,8 @@
158#define VF610_CLK_GPU_SEL 145 158#define VF610_CLK_GPU_SEL 145
159#define VF610_CLK_GPU_EN 146 159#define VF610_CLK_GPU_EN 146
160#define VF610_CLK_GPU2D 147 160#define VF610_CLK_GPU2D 147
161#define VF610_CLK_END 148 161#define VF610_CLK_ENET0 148
162#define VF610_CLK_ENET1 149
163#define VF610_CLK_END 150
162 164
163#endif /* __DT_BINDINGS_CLOCK_VF610_H */ 165#endif /* __DT_BINDINGS_CLOCK_VF610_H */