2 files changed, 94 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index b4983cbc4f8c..2015f10071f9 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -109,6 +109,53 @@
         };
 };
 
+&bus_dmc {
+        devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+        vdd-supply = <&buck1_reg>;
+        status = "okay";
+};
+
+&bus_acp {
+        devfreq = <&bus_dmc>;
+        status = "okay";
+};
+
+&bus_c2c {
+        devfreq = <&bus_dmc>;
+        status = "okay";
+};
+
+&bus_leftbus {
+        devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
+        vdd-supply = <&buck3_reg>;
+        status = "okay";
+};
+
+&bus_rightbus {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_display {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_fsys {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_peri {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_mfc {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
 &cpu0 {
         cpu0-supply = <&buck2_reg>;
 };
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index dce3cebe0606..9f3fb9a7f5f4 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -289,6 +289,53 @@
         status = "okay";
 };
 
+&bus_dmc {
+        devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+        vdd-supply = <&buck1_reg>;
+        status = "okay";
+};
+
+&bus_acp {
+        devfreq = <&bus_dmc>;
+        status = "okay";
+};
+
+&bus_c2c {
+        devfreq = <&bus_dmc>;
+        status = "okay";
+};
+
+&bus_leftbus {
+        devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
+        vdd-supply = <&buck3_reg>;
+        status = "okay";
+};
+
+&bus_rightbus {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_display {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_fsys {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_peri {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
+&bus_mfc {
+        devfreq = <&bus_leftbus>;
+        status = "okay";
+};
+
 &cpu0 {
         cpu0-supply = <&buck2_reg>;
 };