3 files changed, 30 insertions, 20 deletions

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 5ad0ec1f0e29..97199b3c25a2 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -130,26 +130,14 @@ static void dwc_desc_put(struct dw_dma_chan *dwc, struct dw_desc *desc)
 static void dwc_initialize(struct dw_dma_chan *dwc)
 {
         struct dw_dma *dw = to_dw_dma(dwc->chan.device);
-        struct dw_dma_slave *dws = dwc->chan.private;
         u32 cfghi = DWC_CFGH_FIFO_MODE;
         u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
 
         if (dwc->initialized == true)
                 return;
 
-        if (dws) {
-                /*
-                 * We need controller-specific data to set up slave
-                 * transfers.
-                 */
-                BUG_ON(!dws->dma_dev || dws->dma_dev != dw->dma.dev);
-
-                cfghi |= DWC_CFGH_DST_PER(dws->dst_id);
-                cfghi |= DWC_CFGH_SRC_PER(dws->src_id);
-        } else {
-                cfghi |= DWC_CFGH_DST_PER(dwc->dst_id);
-                cfghi |= DWC_CFGH_SRC_PER(dwc->src_id);
-        }
+        cfghi |= DWC_CFGH_DST_PER(dwc->dst_id);
+        cfghi |= DWC_CFGH_SRC_PER(dwc->src_id);
 
         channel_writel(dwc, CFG_LO, cfglo);
         channel_writel(dwc, CFG_HI, cfghi);
@@ -941,7 +929,7 @@ bool dw_dma_filter(struct dma_chan *chan, void *param)
         struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
         struct dw_dma_slave *dws = param;
 
-        if (!dws || dws->dma_dev != chan->device->dev)
+        if (dws->dma_dev != chan->device->dev)
                 return false;
 
         /* We have to copy data since dws can be temporary storage */
@@ -1165,6 +1153,14 @@ static int dwc_alloc_chan_resources(struct dma_chan *chan)
          * doesn't mean what you think it means), and status writeback.
          */
 
+        /*
+         * We need controller-specific data to set up slave transfers.
+         */
+        if (chan->private && !dw_dma_filter(chan, chan->private)) {
+                dev_warn(chan2dev(chan), "Wrong controller-specific data\n");
+                return -EINVAL;
+        }
+
         /* Enable controller here if needed */
         if (!dw->in_use)
                 dw_dma_on(dw);
@@ -1226,6 +1222,14 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
         spin_lock_irqsave(&dwc->lock, flags);
         list_splice_init(&dwc->free_list, &list);
         dwc->descs_allocated = 0;
+
+        /* Clear custom channel configuration */
+        dwc->src_id = 0;
+        dwc->dst_id = 0;
+
+        dwc->src_master = 0;
+        dwc->dst_master = 0;
+
         dwc->initialized = false;
 
         /* Disable interrupts */
diff --git a/drivers/dma/hsu/hsu.c b/drivers/dma/hsu/hsu.c
index eef145edb936..ee510515ce18 100644
--- a/drivers/dma/hsu/hsu.c
+++ b/drivers/dma/hsu/hsu.c
@@ -64,10 +64,10 @@ static void hsu_dma_chan_start(struct hsu_dma_chan *hsuc)
 
         if (hsuc->direction == DMA_MEM_TO_DEV) {
                 bsr = config->dst_maxburst;
-                mtsr = config->dst_addr_width;
+                mtsr = config->src_addr_width;
         } else if (hsuc->direction == DMA_DEV_TO_MEM) {
                 bsr = config->src_maxburst;
-                mtsr = config->src_addr_width;
+                mtsr = config->dst_addr_width;
         }
 
         hsu_chan_disable(hsuc);
@@ -135,7 +135,7 @@ static u32 hsu_dma_chan_get_sr(struct hsu_dma_chan *hsuc)
         sr = hsu_chan_readl(hsuc, HSU_CH_SR);
         spin_unlock_irqrestore(&hsuc->vchan.lock, flags);
 
-        return sr;
+        return sr & ~(HSU_CH_SR_DESCE_ANY | HSU_CH_SR_CDESC_ANY);
 }
 
 irqreturn_t hsu_dma_irq(struct hsu_dma_chip *chip, unsigned short nr)
@@ -254,10 +254,13 @@ static void hsu_dma_issue_pending(struct dma_chan *chan)
 static size_t hsu_dma_active_desc_size(struct hsu_dma_chan *hsuc)
 {
         struct hsu_dma_desc *desc = hsuc->desc;
-        size_t bytes = desc->length;
+        size_t bytes = 0;
         int i;
 
-        i = desc->active % HSU_DMA_CHAN_NR_DESC;
+        for (i = desc->active; i < desc->nents; i++)
+                bytes += desc->sg[i].len;
+
+        i = HSU_DMA_CHAN_NR_DESC - 1;
         do {
                 bytes += hsu_chan_readl(hsuc, HSU_CH_DxTSR(i));
         } while (--i >= 0);
diff --git a/drivers/dma/hsu/hsu.h b/drivers/dma/hsu/hsu.h
index 578a8ee8cd05..6b070c22b1df 100644
--- a/drivers/dma/hsu/hsu.h
+++ b/drivers/dma/hsu/hsu.h
@@ -41,6 +41,9 @@
 #define HSU_CH_SR_DESCTO(x)     BIT(8 + (x))
 #define HSU_CH_SR_DESCTO_ANY    (BIT(11) | BIT(10) | BIT(9) | BIT(8))
 #define HSU_CH_SR_CHE           BIT(15)
+#define HSU_CH_SR_DESCE(x)      BIT(16 + (x))
+#define HSU_CH_SR_DESCE_ANY     (BIT(19) | BIT(18) | BIT(17) | BIT(16))
+#define HSU_CH_SR_CDESC_ANY     (BIT(31) | BIT(30))
 
 /* Bits in HSU_CH_CR */
 #define HSU_CH_CR_CHA           BIT(0)