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-rw-r--r--arch/x86/include/asm/nospec-branch.h2
-rw-r--r--arch/x86/kernel/cpu/bugs.c13
2 files changed, 2 insertions, 13 deletions
diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 8d9deec00de9..8b38df98548e 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -217,8 +217,6 @@ enum spectre_v2_mitigation {
217 SPECTRE_V2_IBRS, 217 SPECTRE_V2_IBRS,
218}; 218};
219 219
220extern void x86_spec_ctrl_set(u64);
221
222/* The Speculative Store Bypass disable variants */ 220/* The Speculative Store Bypass disable variants */
223enum ssb_mitigation { 221enum ssb_mitigation {
224 SPEC_STORE_BYPASS_NONE, 222 SPEC_STORE_BYPASS_NONE,
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 00f51deba493..e0b2e3b3301e 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -133,15 +133,6 @@ static const char *spectre_v2_strings[] = {
133static enum spectre_v2_mitigation spectre_v2_enabled __ro_after_init = 133static enum spectre_v2_mitigation spectre_v2_enabled __ro_after_init =
134 SPECTRE_V2_NONE; 134 SPECTRE_V2_NONE;
135 135
136void x86_spec_ctrl_set(u64 val)
137{
138 if (val & x86_spec_ctrl_mask)
139 WARN_ONCE(1, "SPEC_CTRL MSR value 0x%16llx is unknown.\n", val);
140 else
141 wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base | val);
142}
143EXPORT_SYMBOL_GPL(x86_spec_ctrl_set);
144
145void 136void
146x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest) 137x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
147{ 138{
@@ -503,7 +494,7 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void)
503 case X86_VENDOR_INTEL: 494 case X86_VENDOR_INTEL:
504 x86_spec_ctrl_base |= SPEC_CTRL_SSBD; 495 x86_spec_ctrl_base |= SPEC_CTRL_SSBD;
505 x86_spec_ctrl_mask &= ~SPEC_CTRL_SSBD; 496 x86_spec_ctrl_mask &= ~SPEC_CTRL_SSBD;
506 x86_spec_ctrl_set(SPEC_CTRL_SSBD); 497 wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
507 break; 498 break;
508 case X86_VENDOR_AMD: 499 case X86_VENDOR_AMD:
509 x86_amd_ssb_disable(); 500 x86_amd_ssb_disable();
@@ -615,7 +606,7 @@ int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which)
615void x86_spec_ctrl_setup_ap(void) 606void x86_spec_ctrl_setup_ap(void)
616{ 607{
617 if (boot_cpu_has(X86_FEATURE_MSR_SPEC_CTRL)) 608 if (boot_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
618 x86_spec_ctrl_set(x86_spec_ctrl_base & ~x86_spec_ctrl_mask); 609 wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
619 610
620 if (ssb_mode == SPEC_STORE_BYPASS_DISABLE) 611 if (ssb_mode == SPEC_STORE_BYPASS_DISABLE)
621 x86_amd_ssb_disable(); 612 x86_amd_ssb_disable();