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-rw-r--r--arch/arm/mach-lpc32xx/phy3250.c77
1 files changed, 0 insertions, 77 deletions
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 568589e918c2..b3be60a8e467 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -45,73 +45,6 @@
45#include <mach/board.h> 45#include <mach/board.h>
46#include "common.h" 46#include "common.h"
47 47
48/*
49 * AMBA LCD controller
50 */
51static struct clcd_panel conn_lcd_panel = {
52 .mode = {
53 .name = "QVGA portrait",
54 .refresh = 60,
55 .xres = 240,
56 .yres = 320,
57 .pixclock = 191828,
58 .left_margin = 22,
59 .right_margin = 11,
60 .upper_margin = 2,
61 .lower_margin = 1,
62 .hsync_len = 5,
63 .vsync_len = 2,
64 .sync = 0,
65 .vmode = FB_VMODE_NONINTERLACED,
66 },
67 .width = -1,
68 .height = -1,
69 .tim2 = (TIM2_IVS | TIM2_IHS),
70 .cntl = (CNTL_BGR | CNTL_LCDTFT | CNTL_LCDVCOMP(1) |
71 CNTL_LCDBPP16_565),
72 .bpp = 16,
73};
74#define PANEL_SIZE (3 * SZ_64K)
75
76static int lpc32xx_clcd_setup(struct clcd_fb *fb)
77{
78 dma_addr_t dma;
79
80 fb->fb.screen_base = dma_alloc_wc(&fb->dev->dev, PANEL_SIZE, &dma,
81 GFP_KERNEL);
82 if (!fb->fb.screen_base) {
83 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
84 return -ENOMEM;
85 }
86
87 fb->fb.fix.smem_start = dma;
88 fb->fb.fix.smem_len = PANEL_SIZE;
89 fb->panel = &conn_lcd_panel;
90
91 return 0;
92}
93
94static int lpc32xx_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
95{
96 return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base,
97 fb->fb.fix.smem_start, fb->fb.fix.smem_len);
98}
99
100static void lpc32xx_clcd_remove(struct clcd_fb *fb)
101{
102 dma_free_wc(&fb->dev->dev, fb->fb.fix.smem_len, fb->fb.screen_base,
103 fb->fb.fix.smem_start);
104}
105
106static struct clcd_board lpc32xx_clcd_data = {
107 .name = "Phytec LCD",
108 .check = clcdfb_check,
109 .decode = clcdfb_decode,
110 .setup = lpc32xx_clcd_setup,
111 .mmap = lpc32xx_clcd_mmap,
112 .remove = lpc32xx_clcd_remove,
113};
114
115static struct pl08x_channel_data pl08x_slave_channels[] = { 48static struct pl08x_channel_data pl08x_slave_channels[] = {
116 { 49 {
117 .bus_id = "nand-slc", 50 .bus_id = "nand-slc",
@@ -159,7 +92,6 @@ static struct lpc32xx_mlc_platform_data lpc32xx_mlc_data = {
159static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { 92static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = {
160 OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", NULL), 93 OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", NULL),
161 OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", NULL), 94 OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", NULL),
162 OF_DEV_AUXDATA("arm,pl110", 0x31040000, "dev:clcd", &lpc32xx_clcd_data),
163 OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd), 95 OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd),
164 OF_DEV_AUXDATA("nxp,lpc3220-slc", 0x20020000, "20020000.flash", 96 OF_DEV_AUXDATA("nxp,lpc3220-slc", 0x20020000, "20020000.flash",
165 &lpc32xx_slc_data), 97 &lpc32xx_slc_data),
@@ -170,15 +102,6 @@ static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = {
170 102
171static void __init lpc3250_machine_init(void) 103static void __init lpc3250_machine_init(void)
172{ 104{
173 u32 tmp;
174
175 /* Setup LCD muxing to RGB565 */
176 tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL) &
177 ~(LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_MSK |
178 LPC32XX_CLKPWR_LCDCTRL_PSCALE_MSK);
179 tmp |= LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT16;
180 __raw_writel(tmp, LPC32XX_CLKPWR_LCDCLK_CTRL);
181
182 lpc32xx_serial_init(); 105 lpc32xx_serial_init();
183 106
184 /* Test clock needed for UDA1380 initial init */ 107 /* Test clock needed for UDA1380 initial init */