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-rw-r--r--drivers/spi/spi-ep93xx.c353
1 files changed, 81 insertions, 272 deletions
diff --git a/drivers/spi/spi-ep93xx.c b/drivers/spi/spi-ep93xx.c
index cad30b8a1d71..31611f7d7be9 100644
--- a/drivers/spi/spi-ep93xx.c
+++ b/drivers/spi/spi-ep93xx.c
@@ -26,7 +26,6 @@
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/workqueue.h>
30#include <linux/sched.h> 29#include <linux/sched.h>
31#include <linux/scatterlist.h> 30#include <linux/scatterlist.h>
32#include <linux/spi/spi.h> 31#include <linux/spi/spi.h>
@@ -70,19 +69,13 @@
70 69
71/** 70/**
72 * struct ep93xx_spi - EP93xx SPI controller structure 71 * struct ep93xx_spi - EP93xx SPI controller structure
73 * @lock: spinlock that protects concurrent accesses to fields @running,
74 * @current_msg and @msg_queue
75 * @pdev: pointer to platform device 72 * @pdev: pointer to platform device
76 * @clk: clock for the controller 73 * @clk: clock for the controller
77 * @regs_base: pointer to ioremap()'d registers 74 * @regs_base: pointer to ioremap()'d registers
78 * @sspdr_phys: physical address of the SSPDR register 75 * @sspdr_phys: physical address of the SSPDR register
79 * @min_rate: minimum clock rate (in Hz) supported by the controller 76 * @min_rate: minimum clock rate (in Hz) supported by the controller
80 * @max_rate: maximum clock rate (in Hz) supported by the controller 77 * @max_rate: maximum clock rate (in Hz) supported by the controller
81 * @running: is the queue running
82 * @wq: workqueue used by the driver
83 * @msg_work: work that is queued for the driver
84 * @wait: wait here until given transfer is completed 78 * @wait: wait here until given transfer is completed
85 * @msg_queue: queue for the messages
86 * @current_msg: message that is currently processed (or %NULL if none) 79 * @current_msg: message that is currently processed (or %NULL if none)
87 * @tx: current byte in transfer to transmit 80 * @tx: current byte in transfer to transmit
88 * @rx: current byte in transfer to receive 81 * @rx: current byte in transfer to receive
@@ -96,30 +89,15 @@
96 * @tx_sgt: sg table for TX transfers 89 * @tx_sgt: sg table for TX transfers
97 * @zeropage: dummy page used as RX buffer when only TX buffer is passed in by 90 * @zeropage: dummy page used as RX buffer when only TX buffer is passed in by
98 * the client 91 * the client
99 *
100 * This structure holds EP93xx SPI controller specific information. When
101 * @running is %true, driver accepts transfer requests from protocol drivers.
102 * @current_msg is used to hold pointer to the message that is currently
103 * processed. If @current_msg is %NULL, it means that no processing is going
104 * on.
105 *
106 * Most of the fields are only written once and they can be accessed without
107 * taking the @lock. Fields that are accessed concurrently are: @current_msg,
108 * @running, and @msg_queue.
109 */ 92 */
110struct ep93xx_spi { 93struct ep93xx_spi {
111 spinlock_t lock;
112 const struct platform_device *pdev; 94 const struct platform_device *pdev;
113 struct clk *clk; 95 struct clk *clk;
114 void __iomem *regs_base; 96 void __iomem *regs_base;
115 unsigned long sspdr_phys; 97 unsigned long sspdr_phys;
116 unsigned long min_rate; 98 unsigned long min_rate;
117 unsigned long max_rate; 99 unsigned long max_rate;
118 bool running;
119 struct workqueue_struct *wq;
120 struct work_struct msg_work;
121 struct completion wait; 100 struct completion wait;
122 struct list_head msg_queue;
123 struct spi_message *current_msg; 101 struct spi_message *current_msg;
124 size_t tx; 102 size_t tx;
125 size_t rx; 103 size_t rx;
@@ -136,50 +114,36 @@ struct ep93xx_spi {
136/** 114/**
137 * struct ep93xx_spi_chip - SPI device hardware settings 115 * struct ep93xx_spi_chip - SPI device hardware settings
138 * @spi: back pointer to the SPI device 116 * @spi: back pointer to the SPI device
139 * @rate: max rate in hz this chip supports
140 * @div_cpsr: cpsr (pre-scaler) divider
141 * @div_scr: scr divider
142 * @dss: bits per word (4 - 16 bits)
143 * @ops: private chip operations 117 * @ops: private chip operations
144 *
145 * This structure is used to store hardware register specific settings for each
146 * SPI device. Settings are written to hardware by function
147 * ep93xx_spi_chip_setup().
148 */ 118 */
149struct ep93xx_spi_chip { 119struct ep93xx_spi_chip {
150 const struct spi_device *spi; 120 const struct spi_device *spi;
151 unsigned long rate;
152 u8 div_cpsr;
153 u8 div_scr;
154 u8 dss;
155 struct ep93xx_spi_chip_ops *ops; 121 struct ep93xx_spi_chip_ops *ops;
156}; 122};
157 123
158/* converts bits per word to CR0.DSS value */ 124/* converts bits per word to CR0.DSS value */
159#define bits_per_word_to_dss(bpw) ((bpw) - 1) 125#define bits_per_word_to_dss(bpw) ((bpw) - 1)
160 126
161static inline void 127static void ep93xx_spi_write_u8(const struct ep93xx_spi *espi,
162ep93xx_spi_write_u8(const struct ep93xx_spi *espi, u16 reg, u8 value) 128 u16 reg, u8 value)
163{ 129{
164 __raw_writeb(value, espi->regs_base + reg); 130 writeb(value, espi->regs_base + reg);
165} 131}
166 132
167static inline u8 133static u8 ep93xx_spi_read_u8(const struct ep93xx_spi *spi, u16 reg)
168ep93xx_spi_read_u8(const struct ep93xx_spi *spi, u16 reg)
169{ 134{
170 return __raw_readb(spi->regs_base + reg); 135 return readb(spi->regs_base + reg);
171} 136}
172 137
173static inline void 138static void ep93xx_spi_write_u16(const struct ep93xx_spi *espi,
174ep93xx_spi_write_u16(const struct ep93xx_spi *espi, u16 reg, u16 value) 139 u16 reg, u16 value)
175{ 140{
176 __raw_writew(value, espi->regs_base + reg); 141 writew(value, espi->regs_base + reg);
177} 142}
178 143
179static inline u16 144static u16 ep93xx_spi_read_u16(const struct ep93xx_spi *spi, u16 reg)
180ep93xx_spi_read_u16(const struct ep93xx_spi *spi, u16 reg)
181{ 145{
182 return __raw_readw(spi->regs_base + reg); 146 return readw(spi->regs_base + reg);
183} 147}
184 148
185static int ep93xx_spi_enable(const struct ep93xx_spi *espi) 149static int ep93xx_spi_enable(const struct ep93xx_spi *espi)
@@ -230,17 +194,13 @@ static void ep93xx_spi_disable_interrupts(const struct ep93xx_spi *espi)
230/** 194/**
231 * ep93xx_spi_calc_divisors() - calculates SPI clock divisors 195 * ep93xx_spi_calc_divisors() - calculates SPI clock divisors
232 * @espi: ep93xx SPI controller struct 196 * @espi: ep93xx SPI controller struct
233 * @chip: divisors are calculated for this chip
234 * @rate: desired SPI output clock rate 197 * @rate: desired SPI output clock rate
235 * 198 * @div_cpsr: pointer to return the cpsr (pre-scaler) divider
236 * Function calculates cpsr (clock pre-scaler) and scr divisors based on 199 * @div_scr: pointer to return the scr divider
237 * given @rate and places them to @chip->div_cpsr and @chip->div_scr. If,
238 * for some reason, divisors cannot be calculated nothing is stored and
239 * %-EINVAL is returned.
240 */ 200 */
241static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi, 201static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi,
242 struct ep93xx_spi_chip *chip, 202 unsigned long rate,
243 unsigned long rate) 203 u8 *div_cpsr, u8 *div_scr)
244{ 204{
245 unsigned long spi_clk_rate = clk_get_rate(espi->clk); 205 unsigned long spi_clk_rate = clk_get_rate(espi->clk);
246 int cpsr, scr; 206 int cpsr, scr;
@@ -248,7 +208,7 @@ static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi,
248 /* 208 /*
249 * Make sure that max value is between values supported by the 209 * Make sure that max value is between values supported by the
250 * controller. Note that minimum value is already checked in 210 * controller. Note that minimum value is already checked in
251 * ep93xx_spi_transfer(). 211 * ep93xx_spi_transfer_one_message().
252 */ 212 */
253 rate = clamp(rate, espi->min_rate, espi->max_rate); 213 rate = clamp(rate, espi->min_rate, espi->max_rate);
254 214
@@ -263,8 +223,8 @@ static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi,
263 for (cpsr = 2; cpsr <= 254; cpsr += 2) { 223 for (cpsr = 2; cpsr <= 254; cpsr += 2) {
264 for (scr = 0; scr <= 255; scr++) { 224 for (scr = 0; scr <= 255; scr++) {
265 if ((spi_clk_rate / (cpsr * (scr + 1))) <= rate) { 225 if ((spi_clk_rate / (cpsr * (scr + 1))) <= rate) {
266 chip->div_scr = (u8)scr; 226 *div_scr = (u8)scr;
267 chip->div_cpsr = (u8)cpsr; 227 *div_cpsr = (u8)cpsr;
268 return 0; 228 return 0;
269 } 229 }
270 } 230 }
@@ -319,73 +279,11 @@ static int ep93xx_spi_setup(struct spi_device *spi)
319 spi_set_ctldata(spi, chip); 279 spi_set_ctldata(spi, chip);
320 } 280 }
321 281
322 if (spi->max_speed_hz != chip->rate) {
323 int err;
324
325 err = ep93xx_spi_calc_divisors(espi, chip, spi->max_speed_hz);
326 if (err != 0) {
327 spi_set_ctldata(spi, NULL);
328 kfree(chip);
329 return err;
330 }
331 chip->rate = spi->max_speed_hz;
332 }
333
334 chip->dss = bits_per_word_to_dss(spi->bits_per_word);
335
336 ep93xx_spi_cs_control(spi, false); 282 ep93xx_spi_cs_control(spi, false);
337 return 0; 283 return 0;
338} 284}
339 285
340/** 286/**
341 * ep93xx_spi_transfer() - queue message to be transferred
342 * @spi: target SPI device
343 * @msg: message to be transferred
344 *
345 * This function is called by SPI device drivers when they are going to transfer
346 * a new message. It simply puts the message in the queue and schedules
347 * workqueue to perform the actual transfer later on.
348 *
349 * Returns %0 on success and negative error in case of failure.
350 */
351static int ep93xx_spi_transfer(struct spi_device *spi, struct spi_message *msg)
352{
353 struct ep93xx_spi *espi = spi_master_get_devdata(spi->master);
354 struct spi_transfer *t;
355 unsigned long flags;
356
357 if (!msg || !msg->complete)
358 return -EINVAL;
359
360 /* first validate each transfer */
361 list_for_each_entry(t, &msg->transfers, transfer_list) {
362 if (t->speed_hz && t->speed_hz < espi->min_rate)
363 return -EINVAL;
364 }
365
366 /*
367 * Now that we own the message, let's initialize it so that it is
368 * suitable for us. We use @msg->status to signal whether there was
369 * error in transfer and @msg->state is used to hold pointer to the
370 * current transfer (or %NULL if no active current transfer).
371 */
372 msg->state = NULL;
373 msg->status = 0;
374 msg->actual_length = 0;
375
376 spin_lock_irqsave(&espi->lock, flags);
377 if (!espi->running) {
378 spin_unlock_irqrestore(&espi->lock, flags);
379 return -ESHUTDOWN;
380 }
381 list_add_tail(&msg->queue, &espi->msg_queue);
382 queue_work(espi->wq, &espi->msg_work);
383 spin_unlock_irqrestore(&espi->lock, flags);
384
385 return 0;
386}
387
388/**
389 * ep93xx_spi_cleanup() - cleans up master controller specific state 287 * ep93xx_spi_cleanup() - cleans up master controller specific state
390 * @spi: SPI device to cleanup 288 * @spi: SPI device to cleanup
391 * 289 *
@@ -409,39 +307,40 @@ static void ep93xx_spi_cleanup(struct spi_device *spi)
409 * ep93xx_spi_chip_setup() - configures hardware according to given @chip 307 * ep93xx_spi_chip_setup() - configures hardware according to given @chip
410 * @espi: ep93xx SPI controller struct 308 * @espi: ep93xx SPI controller struct
411 * @chip: chip specific settings 309 * @chip: chip specific settings
412 * 310 * @speed_hz: transfer speed
413 * This function sets up the actual hardware registers with settings given in 311 * @bits_per_word: transfer bits_per_word
414 * @chip. Note that no validation is done so make sure that callers validate
415 * settings before calling this.
416 */ 312 */
417static void ep93xx_spi_chip_setup(const struct ep93xx_spi *espi, 313static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi,
418 const struct ep93xx_spi_chip *chip) 314 const struct ep93xx_spi_chip *chip,
315 u32 speed_hz, u8 bits_per_word)
419{ 316{
317 u8 dss = bits_per_word_to_dss(bits_per_word);
318 u8 div_cpsr = 0;
319 u8 div_scr = 0;
420 u16 cr0; 320 u16 cr0;
321 int err;
421 322
422 cr0 = chip->div_scr << SSPCR0_SCR_SHIFT; 323 err = ep93xx_spi_calc_divisors(espi, speed_hz, &div_cpsr, &div_scr);
324 if (err)
325 return err;
326
327 cr0 = div_scr << SSPCR0_SCR_SHIFT;
423 cr0 |= (chip->spi->mode & (SPI_CPHA|SPI_CPOL)) << SSPCR0_MODE_SHIFT; 328 cr0 |= (chip->spi->mode & (SPI_CPHA|SPI_CPOL)) << SSPCR0_MODE_SHIFT;
424 cr0 |= chip->dss; 329 cr0 |= dss;
425 330
426 dev_dbg(&espi->pdev->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n", 331 dev_dbg(&espi->pdev->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n",
427 chip->spi->mode, chip->div_cpsr, chip->div_scr, chip->dss); 332 chip->spi->mode, div_cpsr, div_scr, dss);
428 dev_dbg(&espi->pdev->dev, "setup: cr0 %#x", cr0); 333 dev_dbg(&espi->pdev->dev, "setup: cr0 %#x", cr0);
429 334
430 ep93xx_spi_write_u8(espi, SSPCPSR, chip->div_cpsr); 335 ep93xx_spi_write_u8(espi, SSPCPSR, div_cpsr);
431 ep93xx_spi_write_u16(espi, SSPCR0, cr0); 336 ep93xx_spi_write_u16(espi, SSPCR0, cr0);
432}
433
434static inline int bits_per_word(const struct ep93xx_spi *espi)
435{
436 struct spi_message *msg = espi->current_msg;
437 struct spi_transfer *t = msg->state;
438 337
439 return t->bits_per_word; 338 return 0;
440} 339}
441 340
442static void ep93xx_do_write(struct ep93xx_spi *espi, struct spi_transfer *t) 341static void ep93xx_do_write(struct ep93xx_spi *espi, struct spi_transfer *t)
443{ 342{
444 if (bits_per_word(espi) > 8) { 343 if (t->bits_per_word > 8) {
445 u16 tx_val = 0; 344 u16 tx_val = 0;
446 345
447 if (t->tx_buf) 346 if (t->tx_buf)
@@ -460,7 +359,7 @@ static void ep93xx_do_write(struct ep93xx_spi *espi, struct spi_transfer *t)
460 359
461static void ep93xx_do_read(struct ep93xx_spi *espi, struct spi_transfer *t) 360static void ep93xx_do_read(struct ep93xx_spi *espi, struct spi_transfer *t)
462{ 361{
463 if (bits_per_word(espi) > 8) { 362 if (t->bits_per_word > 8) {
464 u16 rx_val; 363 u16 rx_val;
465 364
466 rx_val = ep93xx_spi_read_u16(espi, SSPDR); 365 rx_val = ep93xx_spi_read_u16(espi, SSPDR);
@@ -546,7 +445,7 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
546 size_t len = t->len; 445 size_t len = t->len;
547 int i, ret, nents; 446 int i, ret, nents;
548 447
549 if (bits_per_word(espi) > 8) 448 if (t->bits_per_word > 8)
550 buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES; 449 buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
551 else 450 else
552 buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE; 451 buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE;
@@ -610,7 +509,7 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
610 } 509 }
611 510
612 if (WARN_ON(len)) { 511 if (WARN_ON(len)) {
613 dev_warn(&espi->pdev->dev, "len = %d expected 0!", len); 512 dev_warn(&espi->pdev->dev, "len = %zu expected 0!", len);
614 return ERR_PTR(-EINVAL); 513 return ERR_PTR(-EINVAL);
615 } 514 }
616 515
@@ -708,37 +607,16 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
708 struct spi_transfer *t) 607 struct spi_transfer *t)
709{ 608{
710 struct ep93xx_spi_chip *chip = spi_get_ctldata(msg->spi); 609 struct ep93xx_spi_chip *chip = spi_get_ctldata(msg->spi);
610 int err;
711 611
712 msg->state = t; 612 msg->state = t;
713 613
714 /* 614 err = ep93xx_spi_chip_setup(espi, chip, t->speed_hz, t->bits_per_word);
715 * Handle any transfer specific settings if needed. We use 615 if (err) {
716 * temporary chip settings here and restore original later when 616 dev_err(&espi->pdev->dev,
717 * the transfer is finished. 617 "failed to setup chip for transfer\n");
718 */ 618 msg->status = err;
719 if (t->speed_hz || t->bits_per_word) { 619 return;
720 struct ep93xx_spi_chip tmp_chip = *chip;
721
722 if (t->speed_hz) {
723 int err;
724
725 err = ep93xx_spi_calc_divisors(espi, &tmp_chip,
726 t->speed_hz);
727 if (err) {
728 dev_err(&espi->pdev->dev,
729 "failed to adjust speed\n");
730 msg->status = err;
731 return;
732 }
733 }
734
735 if (t->bits_per_word)
736 tmp_chip.dss = bits_per_word_to_dss(t->bits_per_word);
737
738 /*
739 * Set up temporary new hw settings for this transfer.
740 */
741 ep93xx_spi_chip_setup(espi, &tmp_chip);
742 } 620 }
743 621
744 espi->rx = 0; 622 espi->rx = 0;
@@ -783,9 +661,6 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
783 ep93xx_spi_cs_control(msg->spi, true); 661 ep93xx_spi_cs_control(msg->spi, true);
784 } 662 }
785 } 663 }
786
787 if (t->speed_hz || t->bits_per_word)
788 ep93xx_spi_chip_setup(espi, chip);
789} 664}
790 665
791/* 666/*
@@ -838,10 +713,8 @@ static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
838 espi->fifo_level = 0; 713 espi->fifo_level = 0;
839 714
840 /* 715 /*
841 * Update SPI controller registers according to spi device and assert 716 * Assert the chipselect.
842 * the chipselect.
843 */ 717 */
844 ep93xx_spi_chip_setup(espi, spi_get_ctldata(msg->spi));
845 ep93xx_spi_cs_control(msg->spi, true); 718 ep93xx_spi_cs_control(msg->spi, true);
846 719
847 list_for_each_entry(t, &msg->transfers, transfer_list) { 720 list_for_each_entry(t, &msg->transfers, transfer_list) {
@@ -858,50 +731,29 @@ static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
858 ep93xx_spi_disable(espi); 731 ep93xx_spi_disable(espi);
859} 732}
860 733
861#define work_to_espi(work) (container_of((work), struct ep93xx_spi, msg_work)) 734static int ep93xx_spi_transfer_one_message(struct spi_master *master,
862 735 struct spi_message *msg)
863/**
864 * ep93xx_spi_work() - EP93xx SPI workqueue worker function
865 * @work: work struct
866 *
867 * Workqueue worker function. This function is called when there are new
868 * SPI messages to be processed. Message is taken out from the queue and then
869 * passed to ep93xx_spi_process_message().
870 *
871 * After message is transferred, protocol driver is notified by calling
872 * @msg->complete(). In case of error, @msg->status is set to negative error
873 * number, otherwise it contains zero (and @msg->actual_length is updated).
874 */
875static void ep93xx_spi_work(struct work_struct *work)
876{ 736{
877 struct ep93xx_spi *espi = work_to_espi(work); 737 struct ep93xx_spi *espi = spi_master_get_devdata(master);
878 struct spi_message *msg; 738 struct spi_transfer *t;
879 739
880 spin_lock_irq(&espi->lock); 740 /* first validate each transfer */
881 if (!espi->running || espi->current_msg || 741 list_for_each_entry(t, &msg->transfers, transfer_list) {
882 list_empty(&espi->msg_queue)) { 742 if (t->speed_hz < espi->min_rate)
883 spin_unlock_irq(&espi->lock); 743 return -EINVAL;
884 return;
885 } 744 }
886 msg = list_first_entry(&espi->msg_queue, struct spi_message, queue);
887 list_del_init(&msg->queue);
888 espi->current_msg = msg;
889 spin_unlock_irq(&espi->lock);
890 745
891 ep93xx_spi_process_message(espi, msg); 746 msg->state = NULL;
747 msg->status = 0;
748 msg->actual_length = 0;
892 749
893 /* 750 espi->current_msg = msg;
894 * Update the current message and re-schedule ourselves if there are 751 ep93xx_spi_process_message(espi, msg);
895 * more messages in the queue.
896 */
897 spin_lock_irq(&espi->lock);
898 espi->current_msg = NULL; 752 espi->current_msg = NULL;
899 if (espi->running && !list_empty(&espi->msg_queue))
900 queue_work(espi->wq, &espi->msg_work);
901 spin_unlock_irq(&espi->lock);
902 753
903 /* notify the protocol driver that we are done with this message */ 754 spi_finalize_current_message(master);
904 msg->complete(msg->context); 755
756 return 0;
905} 757}
906 758
907static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id) 759static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
@@ -1024,14 +876,24 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
1024 876
1025 info = pdev->dev.platform_data; 877 info = pdev->dev.platform_data;
1026 878
879 irq = platform_get_irq(pdev, 0);
880 if (irq < 0) {
881 dev_err(&pdev->dev, "failed to get irq resources\n");
882 return -EBUSY;
883 }
884
885 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
886 if (!res) {
887 dev_err(&pdev->dev, "unable to get iomem resource\n");
888 return -ENODEV;
889 }
890
1027 master = spi_alloc_master(&pdev->dev, sizeof(*espi)); 891 master = spi_alloc_master(&pdev->dev, sizeof(*espi));
1028 if (!master) { 892 if (!master)
1029 dev_err(&pdev->dev, "failed to allocate spi master\n");
1030 return -ENOMEM; 893 return -ENOMEM;
1031 }
1032 894
1033 master->setup = ep93xx_spi_setup; 895 master->setup = ep93xx_spi_setup;
1034 master->transfer = ep93xx_spi_transfer; 896 master->transfer_one_message = ep93xx_spi_transfer_one_message;
1035 master->cleanup = ep93xx_spi_cleanup; 897 master->cleanup = ep93xx_spi_cleanup;
1036 master->bus_num = pdev->id; 898 master->bus_num = pdev->id;
1037 master->num_chipselect = info->num_chipselect; 899 master->num_chipselect = info->num_chipselect;
@@ -1042,14 +904,13 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
1042 904
1043 espi = spi_master_get_devdata(master); 905 espi = spi_master_get_devdata(master);
1044 906
1045 espi->clk = clk_get(&pdev->dev, NULL); 907 espi->clk = devm_clk_get(&pdev->dev, NULL);
1046 if (IS_ERR(espi->clk)) { 908 if (IS_ERR(espi->clk)) {
1047 dev_err(&pdev->dev, "unable to get spi clock\n"); 909 dev_err(&pdev->dev, "unable to get spi clock\n");
1048 error = PTR_ERR(espi->clk); 910 error = PTR_ERR(espi->clk);
1049 goto fail_release_master; 911 goto fail_release_master;
1050 } 912 }
1051 913
1052 spin_lock_init(&espi->lock);
1053 init_completion(&espi->wait); 914 init_completion(&espi->wait);
1054 915
1055 /* 916 /*
@@ -1060,55 +921,31 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
1060 espi->min_rate = clk_get_rate(espi->clk) / (254 * 256); 921 espi->min_rate = clk_get_rate(espi->clk) / (254 * 256);
1061 espi->pdev = pdev; 922 espi->pdev = pdev;
1062 923
1063 irq = platform_get_irq(pdev, 0);
1064 if (irq < 0) {
1065 error = -EBUSY;
1066 dev_err(&pdev->dev, "failed to get irq resources\n");
1067 goto fail_put_clock;
1068 }
1069
1070 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1071 if (!res) {
1072 dev_err(&pdev->dev, "unable to get iomem resource\n");
1073 error = -ENODEV;
1074 goto fail_put_clock;
1075 }
1076
1077 espi->sspdr_phys = res->start + SSPDR; 924 espi->sspdr_phys = res->start + SSPDR;
1078 925
1079 espi->regs_base = devm_ioremap_resource(&pdev->dev, res); 926 espi->regs_base = devm_ioremap_resource(&pdev->dev, res);
1080 if (IS_ERR(espi->regs_base)) { 927 if (IS_ERR(espi->regs_base)) {
1081 error = PTR_ERR(espi->regs_base); 928 error = PTR_ERR(espi->regs_base);
1082 goto fail_put_clock; 929 goto fail_release_master;
1083 } 930 }
1084 931
1085 error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt, 932 error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt,
1086 0, "ep93xx-spi", espi); 933 0, "ep93xx-spi", espi);
1087 if (error) { 934 if (error) {
1088 dev_err(&pdev->dev, "failed to request irq\n"); 935 dev_err(&pdev->dev, "failed to request irq\n");
1089 goto fail_put_clock; 936 goto fail_release_master;
1090 } 937 }
1091 938
1092 if (info->use_dma && ep93xx_spi_setup_dma(espi)) 939 if (info->use_dma && ep93xx_spi_setup_dma(espi))
1093 dev_warn(&pdev->dev, "DMA setup failed. Falling back to PIO\n"); 940 dev_warn(&pdev->dev, "DMA setup failed. Falling back to PIO\n");
1094 941
1095 espi->wq = create_singlethread_workqueue("ep93xx_spid");
1096 if (!espi->wq) {
1097 dev_err(&pdev->dev, "unable to create workqueue\n");
1098 error = -ENOMEM;
1099 goto fail_free_dma;
1100 }
1101 INIT_WORK(&espi->msg_work, ep93xx_spi_work);
1102 INIT_LIST_HEAD(&espi->msg_queue);
1103 espi->running = true;
1104
1105 /* make sure that the hardware is disabled */ 942 /* make sure that the hardware is disabled */
1106 ep93xx_spi_write_u8(espi, SSPCR1, 0); 943 ep93xx_spi_write_u8(espi, SSPCR1, 0);
1107 944
1108 error = spi_register_master(master); 945 error = spi_register_master(master);
1109 if (error) { 946 if (error) {
1110 dev_err(&pdev->dev, "failed to register SPI master\n"); 947 dev_err(&pdev->dev, "failed to register SPI master\n");
1111 goto fail_free_queue; 948 goto fail_free_dma;
1112 } 949 }
1113 950
1114 dev_info(&pdev->dev, "EP93xx SPI Controller at 0x%08lx irq %d\n", 951 dev_info(&pdev->dev, "EP93xx SPI Controller at 0x%08lx irq %d\n",
@@ -1116,12 +953,8 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
1116 953
1117 return 0; 954 return 0;
1118 955
1119fail_free_queue:
1120 destroy_workqueue(espi->wq);
1121fail_free_dma: 956fail_free_dma:
1122 ep93xx_spi_release_dma(espi); 957 ep93xx_spi_release_dma(espi);
1123fail_put_clock:
1124 clk_put(espi->clk);
1125fail_release_master: 958fail_release_master:
1126 spi_master_put(master); 959 spi_master_put(master);
1127 960
@@ -1133,31 +966,7 @@ static int ep93xx_spi_remove(struct platform_device *pdev)
1133 struct spi_master *master = platform_get_drvdata(pdev); 966 struct spi_master *master = platform_get_drvdata(pdev);
1134 struct ep93xx_spi *espi = spi_master_get_devdata(master); 967 struct ep93xx_spi *espi = spi_master_get_devdata(master);
1135 968
1136 spin_lock_irq(&espi->lock);
1137 espi->running = false;
1138 spin_unlock_irq(&espi->lock);
1139
1140 destroy_workqueue(espi->wq);
1141
1142 /*
1143 * Complete remaining messages with %-ESHUTDOWN status.
1144 */
1145 spin_lock_irq(&espi->lock);
1146 while (!list_empty(&espi->msg_queue)) {
1147 struct spi_message *msg;
1148
1149 msg = list_first_entry(&espi->msg_queue,
1150 struct spi_message, queue);
1151 list_del_init(&msg->queue);
1152 msg->status = -ESHUTDOWN;
1153 spin_unlock_irq(&espi->lock);
1154 msg->complete(msg->context);
1155 spin_lock_irq(&espi->lock);
1156 }
1157 spin_unlock_irq(&espi->lock);
1158
1159 ep93xx_spi_release_dma(espi); 969 ep93xx_spi_release_dma(espi);
1160 clk_put(espi->clk);
1161 970
1162 spi_unregister_master(master); 971 spi_unregister_master(master);
1163 return 0; 972 return 0;