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-rw-r--r--sound/soc/codecs/wm9081.c228
1 files changed, 112 insertions, 116 deletions
diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c
index 6febef337dd2..52dd610cd8dc 100644
--- a/sound/soc/codecs/wm9081.c
+++ b/sound/soc/codecs/wm9081.c
@@ -339,10 +339,10 @@ static SOC_ENUM_SINGLE_DECL(speaker_mode, WM9081_ANALOGUE_SPEAKER_2, 6,
339static int speaker_mode_get(struct snd_kcontrol *kcontrol, 339static int speaker_mode_get(struct snd_kcontrol *kcontrol,
340 struct snd_ctl_elem_value *ucontrol) 340 struct snd_ctl_elem_value *ucontrol)
341{ 341{
342 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 342 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
343 unsigned int reg; 343 unsigned int reg;
344 344
345 reg = snd_soc_read(codec, WM9081_ANALOGUE_SPEAKER_2); 345 reg = snd_soc_component_read32(component, WM9081_ANALOGUE_SPEAKER_2);
346 if (reg & WM9081_SPK_MODE) 346 if (reg & WM9081_SPK_MODE)
347 ucontrol->value.enumerated.item[0] = 1; 347 ucontrol->value.enumerated.item[0] = 1;
348 else 348 else
@@ -360,9 +360,9 @@ static int speaker_mode_get(struct snd_kcontrol *kcontrol,
360static int speaker_mode_put(struct snd_kcontrol *kcontrol, 360static int speaker_mode_put(struct snd_kcontrol *kcontrol,
361 struct snd_ctl_elem_value *ucontrol) 361 struct snd_ctl_elem_value *ucontrol)
362{ 362{
363 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 363 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
364 unsigned int reg_pwr = snd_soc_read(codec, WM9081_POWER_MANAGEMENT); 364 unsigned int reg_pwr = snd_soc_component_read32(component, WM9081_POWER_MANAGEMENT);
365 unsigned int reg2 = snd_soc_read(codec, WM9081_ANALOGUE_SPEAKER_2); 365 unsigned int reg2 = snd_soc_component_read32(component, WM9081_ANALOGUE_SPEAKER_2);
366 366
367 /* Are we changing anything? */ 367 /* Are we changing anything? */
368 if (ucontrol->value.enumerated.item[0] == 368 if (ucontrol->value.enumerated.item[0] ==
@@ -383,7 +383,7 @@ static int speaker_mode_put(struct snd_kcontrol *kcontrol,
383 reg2 &= ~WM9081_SPK_MODE; 383 reg2 &= ~WM9081_SPK_MODE;
384 } 384 }
385 385
386 snd_soc_write(codec, WM9081_ANALOGUE_SPEAKER_2, reg2); 386 snd_soc_component_write(component, WM9081_ANALOGUE_SPEAKER_2, reg2);
387 387
388 return 0; 388 return 0;
389} 389}
@@ -546,10 +546,10 @@ static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
546 return 0; 546 return 0;
547} 547}
548 548
549static int wm9081_set_fll(struct snd_soc_codec *codec, int fll_id, 549static int wm9081_set_fll(struct snd_soc_component *component, int fll_id,
550 unsigned int Fref, unsigned int Fout) 550 unsigned int Fref, unsigned int Fout)
551{ 551{
552 struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec); 552 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
553 u16 reg1, reg4, reg5; 553 u16 reg1, reg4, reg5;
554 struct _fll_div fll_div; 554 struct _fll_div fll_div;
555 int ret; 555 int ret;
@@ -561,7 +561,7 @@ static int wm9081_set_fll(struct snd_soc_codec *codec, int fll_id,
561 561
562 /* Disable the FLL */ 562 /* Disable the FLL */
563 if (Fout == 0) { 563 if (Fout == 0) {
564 dev_dbg(codec->dev, "FLL disabled\n"); 564 dev_dbg(component->dev, "FLL disabled\n");
565 wm9081->fll_fref = 0; 565 wm9081->fll_fref = 0;
566 wm9081->fll_fout = 0; 566 wm9081->fll_fout = 0;
567 567
@@ -572,7 +572,7 @@ static int wm9081_set_fll(struct snd_soc_codec *codec, int fll_id,
572 if (ret != 0) 572 if (ret != 0)
573 return ret; 573 return ret;
574 574
575 reg5 = snd_soc_read(codec, WM9081_FLL_CONTROL_5); 575 reg5 = snd_soc_component_read32(component, WM9081_FLL_CONTROL_5);
576 reg5 &= ~WM9081_FLL_CLK_SRC_MASK; 576 reg5 &= ~WM9081_FLL_CLK_SRC_MASK;
577 577
578 switch (fll_id) { 578 switch (fll_id) {
@@ -581,55 +581,55 @@ static int wm9081_set_fll(struct snd_soc_codec *codec, int fll_id,
581 break; 581 break;
582 582
583 default: 583 default:
584 dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id); 584 dev_err(component->dev, "Unknown FLL ID %d\n", fll_id);
585 return -EINVAL; 585 return -EINVAL;
586 } 586 }
587 587
588 /* Disable CLK_SYS while we reconfigure */ 588 /* Disable CLK_SYS while we reconfigure */
589 clk_sys_reg = snd_soc_read(codec, WM9081_CLOCK_CONTROL_3); 589 clk_sys_reg = snd_soc_component_read32(component, WM9081_CLOCK_CONTROL_3);
590 if (clk_sys_reg & WM9081_CLK_SYS_ENA) 590 if (clk_sys_reg & WM9081_CLK_SYS_ENA)
591 snd_soc_write(codec, WM9081_CLOCK_CONTROL_3, 591 snd_soc_component_write(component, WM9081_CLOCK_CONTROL_3,
592 clk_sys_reg & ~WM9081_CLK_SYS_ENA); 592 clk_sys_reg & ~WM9081_CLK_SYS_ENA);
593 593
594 /* Any FLL configuration change requires that the FLL be 594 /* Any FLL configuration change requires that the FLL be
595 * disabled first. */ 595 * disabled first. */
596 reg1 = snd_soc_read(codec, WM9081_FLL_CONTROL_1); 596 reg1 = snd_soc_component_read32(component, WM9081_FLL_CONTROL_1);
597 reg1 &= ~WM9081_FLL_ENA; 597 reg1 &= ~WM9081_FLL_ENA;
598 snd_soc_write(codec, WM9081_FLL_CONTROL_1, reg1); 598 snd_soc_component_write(component, WM9081_FLL_CONTROL_1, reg1);
599 599
600 /* Apply the configuration */ 600 /* Apply the configuration */
601 if (fll_div.k) 601 if (fll_div.k)
602 reg1 |= WM9081_FLL_FRAC_MASK; 602 reg1 |= WM9081_FLL_FRAC_MASK;
603 else 603 else
604 reg1 &= ~WM9081_FLL_FRAC_MASK; 604 reg1 &= ~WM9081_FLL_FRAC_MASK;
605 snd_soc_write(codec, WM9081_FLL_CONTROL_1, reg1); 605 snd_soc_component_write(component, WM9081_FLL_CONTROL_1, reg1);
606 606
607 snd_soc_write(codec, WM9081_FLL_CONTROL_2, 607 snd_soc_component_write(component, WM9081_FLL_CONTROL_2,
608 (fll_div.fll_outdiv << WM9081_FLL_OUTDIV_SHIFT) | 608 (fll_div.fll_outdiv << WM9081_FLL_OUTDIV_SHIFT) |
609 (fll_div.fll_fratio << WM9081_FLL_FRATIO_SHIFT)); 609 (fll_div.fll_fratio << WM9081_FLL_FRATIO_SHIFT));
610 snd_soc_write(codec, WM9081_FLL_CONTROL_3, fll_div.k); 610 snd_soc_component_write(component, WM9081_FLL_CONTROL_3, fll_div.k);
611 611
612 reg4 = snd_soc_read(codec, WM9081_FLL_CONTROL_4); 612 reg4 = snd_soc_component_read32(component, WM9081_FLL_CONTROL_4);
613 reg4 &= ~WM9081_FLL_N_MASK; 613 reg4 &= ~WM9081_FLL_N_MASK;
614 reg4 |= fll_div.n << WM9081_FLL_N_SHIFT; 614 reg4 |= fll_div.n << WM9081_FLL_N_SHIFT;
615 snd_soc_write(codec, WM9081_FLL_CONTROL_4, reg4); 615 snd_soc_component_write(component, WM9081_FLL_CONTROL_4, reg4);
616 616
617 reg5 &= ~WM9081_FLL_CLK_REF_DIV_MASK; 617 reg5 &= ~WM9081_FLL_CLK_REF_DIV_MASK;
618 reg5 |= fll_div.fll_clk_ref_div << WM9081_FLL_CLK_REF_DIV_SHIFT; 618 reg5 |= fll_div.fll_clk_ref_div << WM9081_FLL_CLK_REF_DIV_SHIFT;
619 snd_soc_write(codec, WM9081_FLL_CONTROL_5, reg5); 619 snd_soc_component_write(component, WM9081_FLL_CONTROL_5, reg5);
620 620
621 /* Set gain to the recommended value */ 621 /* Set gain to the recommended value */
622 snd_soc_update_bits(codec, WM9081_FLL_CONTROL_4, 622 snd_soc_component_update_bits(component, WM9081_FLL_CONTROL_4,
623 WM9081_FLL_GAIN_MASK, 0); 623 WM9081_FLL_GAIN_MASK, 0);
624 624
625 /* Enable the FLL */ 625 /* Enable the FLL */
626 snd_soc_write(codec, WM9081_FLL_CONTROL_1, reg1 | WM9081_FLL_ENA); 626 snd_soc_component_write(component, WM9081_FLL_CONTROL_1, reg1 | WM9081_FLL_ENA);
627 627
628 /* Then bring CLK_SYS up again if it was disabled */ 628 /* Then bring CLK_SYS up again if it was disabled */
629 if (clk_sys_reg & WM9081_CLK_SYS_ENA) 629 if (clk_sys_reg & WM9081_CLK_SYS_ENA)
630 snd_soc_write(codec, WM9081_CLOCK_CONTROL_3, clk_sys_reg); 630 snd_soc_component_write(component, WM9081_CLOCK_CONTROL_3, clk_sys_reg);
631 631
632 dev_dbg(codec->dev, "FLL enabled at %dHz->%dHz\n", Fref, Fout); 632 dev_dbg(component->dev, "FLL enabled at %dHz->%dHz\n", Fref, Fout);
633 633
634 wm9081->fll_fref = Fref; 634 wm9081->fll_fref = Fref;
635 wm9081->fll_fout = Fout; 635 wm9081->fll_fout = Fout;
@@ -637,9 +637,9 @@ static int wm9081_set_fll(struct snd_soc_codec *codec, int fll_id,
637 return 0; 637 return 0;
638} 638}
639 639
640static int configure_clock(struct snd_soc_codec *codec) 640static int configure_clock(struct snd_soc_component *component)
641{ 641{
642 struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec); 642 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
643 int new_sysclk, i, target; 643 int new_sysclk, i, target;
644 unsigned int reg; 644 unsigned int reg;
645 int ret = 0; 645 int ret = 0;
@@ -654,7 +654,7 @@ static int configure_clock(struct snd_soc_codec *codec)
654 } else { 654 } else {
655 wm9081->sysclk_rate = wm9081->mclk_rate; 655 wm9081->sysclk_rate = wm9081->mclk_rate;
656 } 656 }
657 wm9081_set_fll(codec, WM9081_SYSCLK_FLL_MCLK, 0, 0); 657 wm9081_set_fll(component, WM9081_SYSCLK_FLL_MCLK, 0, 0);
658 break; 658 break;
659 659
660 case WM9081_SYSCLK_FLL_MCLK: 660 case WM9081_SYSCLK_FLL_MCLK:
@@ -695,7 +695,7 @@ static int configure_clock(struct snd_soc_codec *codec)
695 new_sysclk = 12288000; 695 new_sysclk = 12288000;
696 } 696 }
697 697
698 ret = wm9081_set_fll(codec, WM9081_SYSCLK_FLL_MCLK, 698 ret = wm9081_set_fll(component, WM9081_SYSCLK_FLL_MCLK,
699 wm9081->mclk_rate, new_sysclk); 699 wm9081->mclk_rate, new_sysclk);
700 if (ret == 0) { 700 if (ret == 0) {
701 wm9081->sysclk_rate = new_sysclk; 701 wm9081->sysclk_rate = new_sysclk;
@@ -711,21 +711,21 @@ static int configure_clock(struct snd_soc_codec *codec)
711 return -EINVAL; 711 return -EINVAL;
712 } 712 }
713 713
714 reg = snd_soc_read(codec, WM9081_CLOCK_CONTROL_1); 714 reg = snd_soc_component_read32(component, WM9081_CLOCK_CONTROL_1);
715 if (mclkdiv) 715 if (mclkdiv)
716 reg |= WM9081_MCLKDIV2; 716 reg |= WM9081_MCLKDIV2;
717 else 717 else
718 reg &= ~WM9081_MCLKDIV2; 718 reg &= ~WM9081_MCLKDIV2;
719 snd_soc_write(codec, WM9081_CLOCK_CONTROL_1, reg); 719 snd_soc_component_write(component, WM9081_CLOCK_CONTROL_1, reg);
720 720
721 reg = snd_soc_read(codec, WM9081_CLOCK_CONTROL_3); 721 reg = snd_soc_component_read32(component, WM9081_CLOCK_CONTROL_3);
722 if (fll) 722 if (fll)
723 reg |= WM9081_CLK_SRC_SEL; 723 reg |= WM9081_CLK_SRC_SEL;
724 else 724 else
725 reg &= ~WM9081_CLK_SRC_SEL; 725 reg &= ~WM9081_CLK_SRC_SEL;
726 snd_soc_write(codec, WM9081_CLOCK_CONTROL_3, reg); 726 snd_soc_component_write(component, WM9081_CLOCK_CONTROL_3, reg);
727 727
728 dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm9081->sysclk_rate); 728 dev_dbg(component->dev, "CLK_SYS is %dHz\n", wm9081->sysclk_rate);
729 729
730 return ret; 730 return ret;
731} 731}
@@ -733,31 +733,31 @@ static int configure_clock(struct snd_soc_codec *codec)
733static int clk_sys_event(struct snd_soc_dapm_widget *w, 733static int clk_sys_event(struct snd_soc_dapm_widget *w,
734 struct snd_kcontrol *kcontrol, int event) 734 struct snd_kcontrol *kcontrol, int event)
735{ 735{
736 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 736 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
737 struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec); 737 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
738 738
739 /* This should be done on init() for bypass paths */ 739 /* This should be done on init() for bypass paths */
740 switch (wm9081->sysclk_source) { 740 switch (wm9081->sysclk_source) {
741 case WM9081_SYSCLK_MCLK: 741 case WM9081_SYSCLK_MCLK:
742 dev_dbg(codec->dev, "Using %dHz MCLK\n", wm9081->mclk_rate); 742 dev_dbg(component->dev, "Using %dHz MCLK\n", wm9081->mclk_rate);
743 break; 743 break;
744 case WM9081_SYSCLK_FLL_MCLK: 744 case WM9081_SYSCLK_FLL_MCLK:
745 dev_dbg(codec->dev, "Using %dHz MCLK with FLL\n", 745 dev_dbg(component->dev, "Using %dHz MCLK with FLL\n",
746 wm9081->mclk_rate); 746 wm9081->mclk_rate);
747 break; 747 break;
748 default: 748 default:
749 dev_err(codec->dev, "System clock not configured\n"); 749 dev_err(component->dev, "System clock not configured\n");
750 return -EINVAL; 750 return -EINVAL;
751 } 751 }
752 752
753 switch (event) { 753 switch (event) {
754 case SND_SOC_DAPM_PRE_PMU: 754 case SND_SOC_DAPM_PRE_PMU:
755 configure_clock(codec); 755 configure_clock(component);
756 break; 756 break;
757 757
758 case SND_SOC_DAPM_POST_PMD: 758 case SND_SOC_DAPM_POST_PMD:
759 /* Disable the FLL if it's running */ 759 /* Disable the FLL if it's running */
760 wm9081_set_fll(codec, 0, 0, 0); 760 wm9081_set_fll(component, 0, 0, 0);
761 break; 761 break;
762 } 762 }
763 763
@@ -816,10 +816,10 @@ static const struct snd_soc_dapm_route wm9081_audio_paths[] = {
816 { "SPKP", NULL, "Speaker" }, 816 { "SPKP", NULL, "Speaker" },
817}; 817};
818 818
819static int wm9081_set_bias_level(struct snd_soc_codec *codec, 819static int wm9081_set_bias_level(struct snd_soc_component *component,
820 enum snd_soc_bias_level level) 820 enum snd_soc_bias_level level)
821{ 821{
822 struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec); 822 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
823 823
824 switch (level) { 824 switch (level) {
825 case SND_SOC_BIAS_ON: 825 case SND_SOC_BIAS_ON:
@@ -827,31 +827,31 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
827 827
828 case SND_SOC_BIAS_PREPARE: 828 case SND_SOC_BIAS_PREPARE:
829 /* VMID=2*40k */ 829 /* VMID=2*40k */
830 snd_soc_update_bits(codec, WM9081_VMID_CONTROL, 830 snd_soc_component_update_bits(component, WM9081_VMID_CONTROL,
831 WM9081_VMID_SEL_MASK, 0x2); 831 WM9081_VMID_SEL_MASK, 0x2);
832 832
833 /* Normal bias current */ 833 /* Normal bias current */
834 snd_soc_update_bits(codec, WM9081_BIAS_CONTROL_1, 834 snd_soc_component_update_bits(component, WM9081_BIAS_CONTROL_1,
835 WM9081_STBY_BIAS_ENA, 0); 835 WM9081_STBY_BIAS_ENA, 0);
836 break; 836 break;
837 837
838 case SND_SOC_BIAS_STANDBY: 838 case SND_SOC_BIAS_STANDBY:
839 /* Initial cold start */ 839 /* Initial cold start */
840 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { 840 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
841 regcache_cache_only(wm9081->regmap, false); 841 regcache_cache_only(wm9081->regmap, false);
842 regcache_sync(wm9081->regmap); 842 regcache_sync(wm9081->regmap);
843 843
844 /* Disable LINEOUT discharge */ 844 /* Disable LINEOUT discharge */
845 snd_soc_update_bits(codec, WM9081_ANTI_POP_CONTROL, 845 snd_soc_component_update_bits(component, WM9081_ANTI_POP_CONTROL,
846 WM9081_LINEOUT_DISCH, 0); 846 WM9081_LINEOUT_DISCH, 0);
847 847
848 /* Select startup bias source */ 848 /* Select startup bias source */
849 snd_soc_update_bits(codec, WM9081_BIAS_CONTROL_1, 849 snd_soc_component_update_bits(component, WM9081_BIAS_CONTROL_1,
850 WM9081_BIAS_SRC | WM9081_BIAS_ENA, 850 WM9081_BIAS_SRC | WM9081_BIAS_ENA,
851 WM9081_BIAS_SRC | WM9081_BIAS_ENA); 851 WM9081_BIAS_SRC | WM9081_BIAS_ENA);
852 852
853 /* VMID 2*4k; Soft VMID ramp enable */ 853 /* VMID 2*4k; Soft VMID ramp enable */
854 snd_soc_update_bits(codec, WM9081_VMID_CONTROL, 854 snd_soc_component_update_bits(component, WM9081_VMID_CONTROL,
855 WM9081_VMID_RAMP | 855 WM9081_VMID_RAMP |
856 WM9081_VMID_SEL_MASK, 856 WM9081_VMID_SEL_MASK,
857 WM9081_VMID_RAMP | 0x6); 857 WM9081_VMID_RAMP | 0x6);
@@ -859,37 +859,37 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
859 mdelay(100); 859 mdelay(100);
860 860
861 /* Normal bias enable & soft start off */ 861 /* Normal bias enable & soft start off */
862 snd_soc_update_bits(codec, WM9081_VMID_CONTROL, 862 snd_soc_component_update_bits(component, WM9081_VMID_CONTROL,
863 WM9081_VMID_RAMP, 0); 863 WM9081_VMID_RAMP, 0);
864 864
865 /* Standard bias source */ 865 /* Standard bias source */
866 snd_soc_update_bits(codec, WM9081_BIAS_CONTROL_1, 866 snd_soc_component_update_bits(component, WM9081_BIAS_CONTROL_1,
867 WM9081_BIAS_SRC, 0); 867 WM9081_BIAS_SRC, 0);
868 } 868 }
869 869
870 /* VMID 2*240k */ 870 /* VMID 2*240k */
871 snd_soc_update_bits(codec, WM9081_VMID_CONTROL, 871 snd_soc_component_update_bits(component, WM9081_VMID_CONTROL,
872 WM9081_VMID_SEL_MASK, 0x04); 872 WM9081_VMID_SEL_MASK, 0x04);
873 873
874 /* Standby bias current on */ 874 /* Standby bias current on */
875 snd_soc_update_bits(codec, WM9081_BIAS_CONTROL_1, 875 snd_soc_component_update_bits(component, WM9081_BIAS_CONTROL_1,
876 WM9081_STBY_BIAS_ENA, 876 WM9081_STBY_BIAS_ENA,
877 WM9081_STBY_BIAS_ENA); 877 WM9081_STBY_BIAS_ENA);
878 break; 878 break;
879 879
880 case SND_SOC_BIAS_OFF: 880 case SND_SOC_BIAS_OFF:
881 /* Startup bias source and disable bias */ 881 /* Startup bias source and disable bias */
882 snd_soc_update_bits(codec, WM9081_BIAS_CONTROL_1, 882 snd_soc_component_update_bits(component, WM9081_BIAS_CONTROL_1,
883 WM9081_BIAS_SRC | WM9081_BIAS_ENA, 883 WM9081_BIAS_SRC | WM9081_BIAS_ENA,
884 WM9081_BIAS_SRC); 884 WM9081_BIAS_SRC);
885 885
886 /* Disable VMID with soft ramping */ 886 /* Disable VMID with soft ramping */
887 snd_soc_update_bits(codec, WM9081_VMID_CONTROL, 887 snd_soc_component_update_bits(component, WM9081_VMID_CONTROL,
888 WM9081_VMID_RAMP | WM9081_VMID_SEL_MASK, 888 WM9081_VMID_RAMP | WM9081_VMID_SEL_MASK,
889 WM9081_VMID_RAMP); 889 WM9081_VMID_RAMP);
890 890
891 /* Actively discharge LINEOUT */ 891 /* Actively discharge LINEOUT */
892 snd_soc_update_bits(codec, WM9081_ANTI_POP_CONTROL, 892 snd_soc_component_update_bits(component, WM9081_ANTI_POP_CONTROL,
893 WM9081_LINEOUT_DISCH, 893 WM9081_LINEOUT_DISCH,
894 WM9081_LINEOUT_DISCH); 894 WM9081_LINEOUT_DISCH);
895 895
@@ -903,9 +903,9 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
903static int wm9081_set_dai_fmt(struct snd_soc_dai *dai, 903static int wm9081_set_dai_fmt(struct snd_soc_dai *dai,
904 unsigned int fmt) 904 unsigned int fmt)
905{ 905{
906 struct snd_soc_codec *codec = dai->codec; 906 struct snd_soc_component *component = dai->component;
907 struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec); 907 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
908 unsigned int aif2 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_2); 908 unsigned int aif2 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_2);
909 909
910 aif2 &= ~(WM9081_AIF_BCLK_INV | WM9081_AIF_LRCLK_INV | 910 aif2 &= ~(WM9081_AIF_BCLK_INV | WM9081_AIF_LRCLK_INV |
911 WM9081_BCLK_DIR | WM9081_LRCLK_DIR | WM9081_AIF_FMT_MASK); 911 WM9081_BCLK_DIR | WM9081_LRCLK_DIR | WM9081_AIF_FMT_MASK);
@@ -986,7 +986,7 @@ static int wm9081_set_dai_fmt(struct snd_soc_dai *dai,
986 return -EINVAL; 986 return -EINVAL;
987 } 987 }
988 988
989 snd_soc_write(codec, WM9081_AUDIO_INTERFACE_2, aif2); 989 snd_soc_component_write(component, WM9081_AUDIO_INTERFACE_2, aif2);
990 990
991 return 0; 991 return 0;
992} 992}
@@ -995,23 +995,23 @@ static int wm9081_hw_params(struct snd_pcm_substream *substream,
995 struct snd_pcm_hw_params *params, 995 struct snd_pcm_hw_params *params,
996 struct snd_soc_dai *dai) 996 struct snd_soc_dai *dai)
997{ 997{
998 struct snd_soc_codec *codec = dai->codec; 998 struct snd_soc_component *component = dai->component;
999 struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec); 999 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
1000 int ret, i, best, best_val, cur_val; 1000 int ret, i, best, best_val, cur_val;
1001 unsigned int clk_ctrl2, aif1, aif2, aif3, aif4; 1001 unsigned int clk_ctrl2, aif1, aif2, aif3, aif4;
1002 1002
1003 clk_ctrl2 = snd_soc_read(codec, WM9081_CLOCK_CONTROL_2); 1003 clk_ctrl2 = snd_soc_component_read32(component, WM9081_CLOCK_CONTROL_2);
1004 clk_ctrl2 &= ~(WM9081_CLK_SYS_RATE_MASK | WM9081_SAMPLE_RATE_MASK); 1004 clk_ctrl2 &= ~(WM9081_CLK_SYS_RATE_MASK | WM9081_SAMPLE_RATE_MASK);
1005 1005
1006 aif1 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_1); 1006 aif1 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_1);
1007 1007
1008 aif2 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_2); 1008 aif2 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_2);
1009 aif2 &= ~WM9081_AIF_WL_MASK; 1009 aif2 &= ~WM9081_AIF_WL_MASK;
1010 1010
1011 aif3 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_3); 1011 aif3 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_3);
1012 aif3 &= ~WM9081_BCLK_DIV_MASK; 1012 aif3 &= ~WM9081_BCLK_DIV_MASK;
1013 1013
1014 aif4 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_4); 1014 aif4 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_4);
1015 aif4 &= ~WM9081_LRCLK_RATE_MASK; 1015 aif4 &= ~WM9081_LRCLK_RATE_MASK;
1016 1016
1017 wm9081->fs = params_rate(params); 1017 wm9081->fs = params_rate(params);
@@ -1047,9 +1047,9 @@ static int wm9081_hw_params(struct snd_pcm_substream *substream,
1047 } 1047 }
1048 } 1048 }
1049 1049
1050 dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm9081->bclk); 1050 dev_dbg(component->dev, "Target BCLK is %dHz\n", wm9081->bclk);
1051 1051
1052 ret = configure_clock(codec); 1052 ret = configure_clock(component);
1053 if (ret != 0) 1053 if (ret != 0)
1054 return ret; 1054 return ret;
1055 1055
@@ -1065,7 +1065,7 @@ static int wm9081_hw_params(struct snd_pcm_substream *substream,
1065 best_val = cur_val; 1065 best_val = cur_val;
1066 } 1066 }
1067 } 1067 }
1068 dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n", 1068 dev_dbg(component->dev, "Selected CLK_SYS_RATIO of %d\n",
1069 clk_sys_rates[best].ratio); 1069 clk_sys_rates[best].ratio);
1070 clk_ctrl2 |= (clk_sys_rates[best].clk_sys_rate 1070 clk_ctrl2 |= (clk_sys_rates[best].clk_sys_rate
1071 << WM9081_CLK_SYS_RATE_SHIFT); 1071 << WM9081_CLK_SYS_RATE_SHIFT);
@@ -1081,7 +1081,7 @@ static int wm9081_hw_params(struct snd_pcm_substream *substream,
1081 best_val = cur_val; 1081 best_val = cur_val;
1082 } 1082 }
1083 } 1083 }
1084 dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n", 1084 dev_dbg(component->dev, "Selected SAMPLE_RATE of %dHz\n",
1085 sample_rates[best].rate); 1085 sample_rates[best].rate);
1086 clk_ctrl2 |= (sample_rates[best].sample_rate 1086 clk_ctrl2 |= (sample_rates[best].sample_rate
1087 << WM9081_SAMPLE_RATE_SHIFT); 1087 << WM9081_SAMPLE_RATE_SHIFT);
@@ -1100,12 +1100,12 @@ static int wm9081_hw_params(struct snd_pcm_substream *substream,
1100 } 1100 }
1101 } 1101 }
1102 wm9081->bclk = (wm9081->sysclk_rate * 10) / bclk_divs[best].div; 1102 wm9081->bclk = (wm9081->sysclk_rate * 10) / bclk_divs[best].div;
1103 dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n", 1103 dev_dbg(component->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n",
1104 bclk_divs[best].div, wm9081->bclk); 1104 bclk_divs[best].div, wm9081->bclk);
1105 aif3 |= bclk_divs[best].bclk_div; 1105 aif3 |= bclk_divs[best].bclk_div;
1106 1106
1107 /* LRCLK is a simple fraction of BCLK */ 1107 /* LRCLK is a simple fraction of BCLK */
1108 dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm9081->bclk / wm9081->fs); 1108 dev_dbg(component->dev, "LRCLK_RATE is %d\n", wm9081->bclk / wm9081->fs);
1109 aif4 |= wm9081->bclk / wm9081->fs; 1109 aif4 |= wm9081->bclk / wm9081->fs;
1110 1110
1111 /* Apply a ReTune Mobile configuration if it's in use */ 1111 /* Apply a ReTune Mobile configuration if it's in use */
@@ -1126,51 +1126,51 @@ static int wm9081_hw_params(struct snd_pcm_substream *substream,
1126 } 1126 }
1127 s = &pdata->retune_configs[best]; 1127 s = &pdata->retune_configs[best];
1128 1128
1129 dev_dbg(codec->dev, "ReTune Mobile %s tuned for %dHz\n", 1129 dev_dbg(component->dev, "ReTune Mobile %s tuned for %dHz\n",
1130 s->name, s->rate); 1130 s->name, s->rate);
1131 1131
1132 /* If the EQ is enabled then disable it while we write out */ 1132 /* If the EQ is enabled then disable it while we write out */
1133 eq1 = snd_soc_read(codec, WM9081_EQ_1) & WM9081_EQ_ENA; 1133 eq1 = snd_soc_component_read32(component, WM9081_EQ_1) & WM9081_EQ_ENA;
1134 if (eq1 & WM9081_EQ_ENA) 1134 if (eq1 & WM9081_EQ_ENA)
1135 snd_soc_write(codec, WM9081_EQ_1, 0); 1135 snd_soc_component_write(component, WM9081_EQ_1, 0);
1136 1136
1137 /* Write out the other values */ 1137 /* Write out the other values */
1138 for (i = 1; i < ARRAY_SIZE(s->config); i++) 1138 for (i = 1; i < ARRAY_SIZE(s->config); i++)
1139 snd_soc_write(codec, WM9081_EQ_1 + i, s->config[i]); 1139 snd_soc_component_write(component, WM9081_EQ_1 + i, s->config[i]);
1140 1140
1141 eq1 |= (s->config[0] & ~WM9081_EQ_ENA); 1141 eq1 |= (s->config[0] & ~WM9081_EQ_ENA);
1142 snd_soc_write(codec, WM9081_EQ_1, eq1); 1142 snd_soc_component_write(component, WM9081_EQ_1, eq1);
1143 } 1143 }
1144 1144
1145 snd_soc_write(codec, WM9081_CLOCK_CONTROL_2, clk_ctrl2); 1145 snd_soc_component_write(component, WM9081_CLOCK_CONTROL_2, clk_ctrl2);
1146 snd_soc_write(codec, WM9081_AUDIO_INTERFACE_2, aif2); 1146 snd_soc_component_write(component, WM9081_AUDIO_INTERFACE_2, aif2);
1147 snd_soc_write(codec, WM9081_AUDIO_INTERFACE_3, aif3); 1147 snd_soc_component_write(component, WM9081_AUDIO_INTERFACE_3, aif3);
1148 snd_soc_write(codec, WM9081_AUDIO_INTERFACE_4, aif4); 1148 snd_soc_component_write(component, WM9081_AUDIO_INTERFACE_4, aif4);
1149 1149
1150 return 0; 1150 return 0;
1151} 1151}
1152 1152
1153static int wm9081_digital_mute(struct snd_soc_dai *codec_dai, int mute) 1153static int wm9081_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1154{ 1154{
1155 struct snd_soc_codec *codec = codec_dai->codec; 1155 struct snd_soc_component *component = codec_dai->component;
1156 unsigned int reg; 1156 unsigned int reg;
1157 1157
1158 reg = snd_soc_read(codec, WM9081_DAC_DIGITAL_2); 1158 snd_soc_component_read32(component, WM9081_DAC_DIGITAL_2);
1159 1159
1160 if (mute) 1160 if (mute)
1161 reg |= WM9081_DAC_MUTE; 1161 reg |= WM9081_DAC_MUTE;
1162 else 1162 else
1163 reg &= ~WM9081_DAC_MUTE; 1163 reg &= ~WM9081_DAC_MUTE;
1164 1164
1165 snd_soc_write(codec, WM9081_DAC_DIGITAL_2, reg); 1165 snd_soc_component_write(component, WM9081_DAC_DIGITAL_2, reg);
1166 1166
1167 return 0; 1167 return 0;
1168} 1168}
1169 1169
1170static int wm9081_set_sysclk(struct snd_soc_codec *codec, int clk_id, 1170static int wm9081_set_sysclk(struct snd_soc_component *component, int clk_id,
1171 int source, unsigned int freq, int dir) 1171 int source, unsigned int freq, int dir)
1172{ 1172{
1173 struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec); 1173 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
1174 1174
1175 switch (clk_id) { 1175 switch (clk_id) {
1176 case WM9081_SYSCLK_MCLK: 1176 case WM9081_SYSCLK_MCLK:
@@ -1189,9 +1189,9 @@ static int wm9081_set_sysclk(struct snd_soc_codec *codec, int clk_id,
1189static int wm9081_set_tdm_slot(struct snd_soc_dai *dai, 1189static int wm9081_set_tdm_slot(struct snd_soc_dai *dai,
1190 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) 1190 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
1191{ 1191{
1192 struct snd_soc_codec *codec = dai->codec; 1192 struct snd_soc_component *component = dai->component;
1193 struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec); 1193 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
1194 unsigned int aif1 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_1); 1194 unsigned int aif1 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_1);
1195 1195
1196 aif1 &= ~(WM9081_AIFDAC_TDM_SLOT_MASK | WM9081_AIFDAC_TDM_MODE_MASK); 1196 aif1 &= ~(WM9081_AIFDAC_TDM_SLOT_MASK | WM9081_AIFDAC_TDM_MODE_MASK);
1197 1197
@@ -1221,7 +1221,7 @@ static int wm9081_set_tdm_slot(struct snd_soc_dai *dai,
1221 return -EINVAL; 1221 return -EINVAL;
1222 } 1222 }
1223 1223
1224 snd_soc_write(codec, WM9081_AUDIO_INTERFACE_1, aif1); 1224 snd_soc_component_write(component, WM9081_AUDIO_INTERFACE_1, aif1);
1225 1225
1226 return 0; 1226 return 0;
1227} 1227}
@@ -1254,42 +1254,39 @@ static struct snd_soc_dai_driver wm9081_dai = {
1254 .ops = &wm9081_dai_ops, 1254 .ops = &wm9081_dai_ops,
1255}; 1255};
1256 1256
1257static int wm9081_probe(struct snd_soc_codec *codec) 1257static int wm9081_probe(struct snd_soc_component *component)
1258{ 1258{
1259 struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec); 1259 struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
1260 1260
1261 /* Enable zero cross by default */ 1261 /* Enable zero cross by default */
1262 snd_soc_update_bits(codec, WM9081_ANALOGUE_LINEOUT, 1262 snd_soc_component_update_bits(component, WM9081_ANALOGUE_LINEOUT,
1263 WM9081_LINEOUTZC, WM9081_LINEOUTZC); 1263 WM9081_LINEOUTZC, WM9081_LINEOUTZC);
1264 snd_soc_update_bits(codec, WM9081_ANALOGUE_SPEAKER_PGA, 1264 snd_soc_component_update_bits(component, WM9081_ANALOGUE_SPEAKER_PGA,
1265 WM9081_SPKPGAZC, WM9081_SPKPGAZC); 1265 WM9081_SPKPGAZC, WM9081_SPKPGAZC);
1266 1266
1267 if (!wm9081->pdata.num_retune_configs) { 1267 if (!wm9081->pdata.num_retune_configs) {
1268 dev_dbg(codec->dev, 1268 dev_dbg(component->dev,
1269 "No ReTune Mobile data, using normal EQ\n"); 1269 "No ReTune Mobile data, using normal EQ\n");
1270 snd_soc_add_codec_controls(codec, wm9081_eq_controls, 1270 snd_soc_add_component_controls(component, wm9081_eq_controls,
1271 ARRAY_SIZE(wm9081_eq_controls)); 1271 ARRAY_SIZE(wm9081_eq_controls));
1272 } 1272 }
1273 1273
1274 return 0; 1274 return 0;
1275} 1275}
1276 1276
1277static const struct snd_soc_codec_driver soc_codec_dev_wm9081 = { 1277static const struct snd_soc_component_driver soc_component_dev_wm9081 = {
1278 .probe = wm9081_probe, 1278 .probe = wm9081_probe,
1279 1279 .set_sysclk = wm9081_set_sysclk,
1280 .set_sysclk = wm9081_set_sysclk, 1280 .set_bias_level = wm9081_set_bias_level,
1281 .set_bias_level = wm9081_set_bias_level, 1281 .controls = wm9081_snd_controls,
1282 1282 .num_controls = ARRAY_SIZE(wm9081_snd_controls),
1283 .idle_bias_off = true, 1283 .dapm_widgets = wm9081_dapm_widgets,
1284 1284 .num_dapm_widgets = ARRAY_SIZE(wm9081_dapm_widgets),
1285 .component_driver = { 1285 .dapm_routes = wm9081_audio_paths,
1286 .controls = wm9081_snd_controls, 1286 .num_dapm_routes = ARRAY_SIZE(wm9081_audio_paths),
1287 .num_controls = ARRAY_SIZE(wm9081_snd_controls), 1287 .use_pmdown_time = 1,
1288 .dapm_widgets = wm9081_dapm_widgets, 1288 .endianness = 1,
1289 .num_dapm_widgets = ARRAY_SIZE(wm9081_dapm_widgets), 1289 .non_legacy_dai_naming = 1,
1290 .dapm_routes = wm9081_audio_paths,
1291 .num_dapm_routes = ARRAY_SIZE(wm9081_audio_paths),
1292 },
1293}; 1290};
1294 1291
1295static const struct regmap_config wm9081_regmap = { 1292static const struct regmap_config wm9081_regmap = {
@@ -1355,8 +1352,8 @@ static int wm9081_i2c_probe(struct i2c_client *i2c,
1355 1352
1356 regcache_cache_only(wm9081->regmap, true); 1353 regcache_cache_only(wm9081->regmap, true);
1357 1354
1358 ret = snd_soc_register_codec(&i2c->dev, 1355 ret = devm_snd_soc_register_component(&i2c->dev,
1359 &soc_codec_dev_wm9081, &wm9081_dai, 1); 1356 &soc_component_dev_wm9081, &wm9081_dai, 1);
1360 if (ret < 0) 1357 if (ret < 0)
1361 return ret; 1358 return ret;
1362 1359
@@ -1365,7 +1362,6 @@ static int wm9081_i2c_probe(struct i2c_client *i2c,
1365 1362
1366static int wm9081_i2c_remove(struct i2c_client *client) 1363static int wm9081_i2c_remove(struct i2c_client *client)
1367{ 1364{
1368 snd_soc_unregister_codec(&client->dev);
1369 return 0; 1365 return 0;
1370} 1366}
1371 1367