diff options
-rw-r--r-- | Documentation/rapidio/tsi721.txt | 14 | ||||
-rw-r--r-- | drivers/rapidio/devices/tsi721.h | 2 | ||||
-rw-r--r-- | drivers/rapidio/devices/tsi721_dma.c | 26 |
3 files changed, 32 insertions, 10 deletions
diff --git a/Documentation/rapidio/tsi721.txt b/Documentation/rapidio/tsi721.txt index 7c1c7bf48ec0..0e0e90bef882 100644 --- a/Documentation/rapidio/tsi721.txt +++ b/Documentation/rapidio/tsi721.txt | |||
@@ -25,6 +25,20 @@ fully compatible with RIONET driver (Ethernet over RapidIO messaging services). | |||
25 | This parameter can be changed dynamically. | 25 | This parameter can be changed dynamically. |
26 | Use CONFIG_RAPIDIO_DEBUG=y to enable debug output at the top level. | 26 | Use CONFIG_RAPIDIO_DEBUG=y to enable debug output at the top level. |
27 | 27 | ||
28 | - 'dma_desc_per_channel' - This parameter defines number of hardware buffer | ||
29 | descriptors allocated for each registered Tsi721 DMA channel. | ||
30 | Its default value is 128. | ||
31 | |||
32 | - 'dma_txqueue_sz' - DMA transactions queue size. Defines number of pending | ||
33 | transaction requests that can be accepted by each DMA channel. | ||
34 | Default value is 16. | ||
35 | |||
36 | - 'dma_sel' - DMA channel selection mask. Bitmask that defines which hardware | ||
37 | DMA channels (0 ... 6) will be registered with DmaEngine core. | ||
38 | If bit is set to 1, the corresponding DMA channel will be registered. | ||
39 | DMA channels not selected by this mask will not be used by this device | ||
40 | driver. Default value is 0x7f (use all channels). | ||
41 | |||
28 | II. Known problems | 42 | II. Known problems |
29 | 43 | ||
30 | None. | 44 | None. |
diff --git a/drivers/rapidio/devices/tsi721.h b/drivers/rapidio/devices/tsi721.h index 5456dbddc929..5941437cbdd1 100644 --- a/drivers/rapidio/devices/tsi721.h +++ b/drivers/rapidio/devices/tsi721.h | |||
@@ -661,7 +661,7 @@ enum dma_rtype { | |||
661 | */ | 661 | */ |
662 | #define TSI721_DMA_CHNUM TSI721_DMA_MAXCH | 662 | #define TSI721_DMA_CHNUM TSI721_DMA_MAXCH |
663 | 663 | ||
664 | #define TSI721_DMACH_MAINT 0 /* DMA channel for maint requests */ | 664 | #define TSI721_DMACH_MAINT 7 /* DMA channel for maint requests */ |
665 | #define TSI721_DMACH_MAINT_NBD 32 /* Number of BDs for maint requests */ | 665 | #define TSI721_DMACH_MAINT_NBD 32 /* Number of BDs for maint requests */ |
666 | 666 | ||
667 | #define TSI721_DMACH_DMA 1 /* DMA channel for data transfers */ | 667 | #define TSI721_DMACH_DMA 1 /* DMA channel for data transfers */ |
diff --git a/drivers/rapidio/devices/tsi721_dma.c b/drivers/rapidio/devices/tsi721_dma.c index 155cae1e62de..13c669bac019 100644 --- a/drivers/rapidio/devices/tsi721_dma.c +++ b/drivers/rapidio/devices/tsi721_dma.c | |||
@@ -36,18 +36,26 @@ | |||
36 | 36 | ||
37 | #include "tsi721.h" | 37 | #include "tsi721.h" |
38 | 38 | ||
39 | #define TSI721_DMA_TX_QUEUE_SZ 16 /* number of transaction descriptors */ | ||
40 | |||
41 | #ifdef CONFIG_PCI_MSI | 39 | #ifdef CONFIG_PCI_MSI |
42 | static irqreturn_t tsi721_bdma_msix(int irq, void *ptr); | 40 | static irqreturn_t tsi721_bdma_msix(int irq, void *ptr); |
43 | #endif | 41 | #endif |
44 | static int tsi721_submit_sg(struct tsi721_tx_desc *desc); | 42 | static int tsi721_submit_sg(struct tsi721_tx_desc *desc); |
45 | 43 | ||
46 | static unsigned int dma_desc_per_channel = 128; | 44 | static unsigned int dma_desc_per_channel = 128; |
47 | module_param(dma_desc_per_channel, uint, S_IWUSR | S_IRUGO); | 45 | module_param(dma_desc_per_channel, uint, S_IRUGO); |
48 | MODULE_PARM_DESC(dma_desc_per_channel, | 46 | MODULE_PARM_DESC(dma_desc_per_channel, |
49 | "Number of DMA descriptors per channel (default: 128)"); | 47 | "Number of DMA descriptors per channel (default: 128)"); |
50 | 48 | ||
49 | static unsigned int dma_txqueue_sz = 16; | ||
50 | module_param(dma_txqueue_sz, uint, S_IRUGO); | ||
51 | MODULE_PARM_DESC(dma_txqueue_sz, | ||
52 | "DMA Transactions Queue Size (default: 16)"); | ||
53 | |||
54 | static u8 dma_sel = 0x7f; | ||
55 | module_param(dma_sel, byte, S_IRUGO); | ||
56 | MODULE_PARM_DESC(dma_sel, | ||
57 | "DMA Channel Selection Mask (default: 0x7f = all)"); | ||
58 | |||
51 | static inline struct tsi721_bdma_chan *to_tsi721_chan(struct dma_chan *chan) | 59 | static inline struct tsi721_bdma_chan *to_tsi721_chan(struct dma_chan *chan) |
52 | { | 60 | { |
53 | return container_of(chan, struct tsi721_bdma_chan, dchan); | 61 | return container_of(chan, struct tsi721_bdma_chan, dchan); |
@@ -732,7 +740,7 @@ static int tsi721_alloc_chan_resources(struct dma_chan *dchan) | |||
732 | tsi_debug(DMA, &dchan->dev->device, "DMAC%d", bdma_chan->id); | 740 | tsi_debug(DMA, &dchan->dev->device, "DMAC%d", bdma_chan->id); |
733 | 741 | ||
734 | if (bdma_chan->bd_base) | 742 | if (bdma_chan->bd_base) |
735 | return TSI721_DMA_TX_QUEUE_SZ; | 743 | return dma_txqueue_sz; |
736 | 744 | ||
737 | /* Initialize BDMA channel */ | 745 | /* Initialize BDMA channel */ |
738 | if (tsi721_bdma_ch_init(bdma_chan, dma_desc_per_channel)) { | 746 | if (tsi721_bdma_ch_init(bdma_chan, dma_desc_per_channel)) { |
@@ -742,7 +750,7 @@ static int tsi721_alloc_chan_resources(struct dma_chan *dchan) | |||
742 | } | 750 | } |
743 | 751 | ||
744 | /* Allocate queue of transaction descriptors */ | 752 | /* Allocate queue of transaction descriptors */ |
745 | desc = kcalloc(TSI721_DMA_TX_QUEUE_SZ, sizeof(struct tsi721_tx_desc), | 753 | desc = kcalloc(dma_txqueue_sz, sizeof(struct tsi721_tx_desc), |
746 | GFP_ATOMIC); | 754 | GFP_ATOMIC); |
747 | if (!desc) { | 755 | if (!desc) { |
748 | tsi_err(&dchan->dev->device, | 756 | tsi_err(&dchan->dev->device, |
@@ -754,7 +762,7 @@ static int tsi721_alloc_chan_resources(struct dma_chan *dchan) | |||
754 | 762 | ||
755 | bdma_chan->tx_desc = desc; | 763 | bdma_chan->tx_desc = desc; |
756 | 764 | ||
757 | for (i = 0; i < TSI721_DMA_TX_QUEUE_SZ; i++) { | 765 | for (i = 0; i < dma_txqueue_sz; i++) { |
758 | dma_async_tx_descriptor_init(&desc[i].txd, dchan); | 766 | dma_async_tx_descriptor_init(&desc[i].txd, dchan); |
759 | desc[i].txd.tx_submit = tsi721_tx_submit; | 767 | desc[i].txd.tx_submit = tsi721_tx_submit; |
760 | desc[i].txd.flags = DMA_CTRL_ACK; | 768 | desc[i].txd.flags = DMA_CTRL_ACK; |
@@ -766,7 +774,7 @@ static int tsi721_alloc_chan_resources(struct dma_chan *dchan) | |||
766 | bdma_chan->active = true; | 774 | bdma_chan->active = true; |
767 | tsi721_bdma_interrupt_enable(bdma_chan, 1); | 775 | tsi721_bdma_interrupt_enable(bdma_chan, 1); |
768 | 776 | ||
769 | return TSI721_DMA_TX_QUEUE_SZ; | 777 | return dma_txqueue_sz; |
770 | } | 778 | } |
771 | 779 | ||
772 | static void tsi721_sync_dma_irq(struct tsi721_bdma_chan *bdma_chan) | 780 | static void tsi721_sync_dma_irq(struct tsi721_bdma_chan *bdma_chan) |
@@ -962,7 +970,7 @@ void tsi721_dma_stop_all(struct tsi721_device *priv) | |||
962 | int i; | 970 | int i; |
963 | 971 | ||
964 | for (i = 0; i < TSI721_DMA_MAXCH; i++) { | 972 | for (i = 0; i < TSI721_DMA_MAXCH; i++) { |
965 | if (i != TSI721_DMACH_MAINT) | 973 | if ((i != TSI721_DMACH_MAINT) && (dma_sel & (1 << i))) |
966 | tsi721_dma_stop(&priv->bdma[i]); | 974 | tsi721_dma_stop(&priv->bdma[i]); |
967 | } | 975 | } |
968 | } | 976 | } |
@@ -979,7 +987,7 @@ int tsi721_register_dma(struct tsi721_device *priv) | |||
979 | for (i = 0; i < TSI721_DMA_MAXCH; i++) { | 987 | for (i = 0; i < TSI721_DMA_MAXCH; i++) { |
980 | struct tsi721_bdma_chan *bdma_chan = &priv->bdma[i]; | 988 | struct tsi721_bdma_chan *bdma_chan = &priv->bdma[i]; |
981 | 989 | ||
982 | if (i == TSI721_DMACH_MAINT) | 990 | if ((i == TSI721_DMACH_MAINT) || (dma_sel & (1 << i)) == 0) |
983 | continue; | 991 | continue; |
984 | 992 | ||
985 | bdma_chan->regs = priv->regs + TSI721_DMAC_BASE(i); | 993 | bdma_chan->regs = priv->regs + TSI721_DMAC_BASE(i); |