diff options
| -rw-r--r-- | drivers/rtc/rtc-mcp795.c | 86 |
1 files changed, 81 insertions, 5 deletions
diff --git a/drivers/rtc/rtc-mcp795.c b/drivers/rtc/rtc-mcp795.c index 4618f4fa655f..89b0ffa83064 100644 --- a/drivers/rtc/rtc-mcp795.c +++ b/drivers/rtc/rtc-mcp795.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <linux/rtc.h> | 22 | #include <linux/rtc.h> |
| 23 | #include <linux/of.h> | 23 | #include <linux/of.h> |
| 24 | #include <linux/bcd.h> | 24 | #include <linux/bcd.h> |
| 25 | #include <linux/delay.h> | ||
| 25 | 26 | ||
| 26 | /* MCP795 Instructions, see datasheet table 3-1 */ | 27 | /* MCP795 Instructions, see datasheet table 3-1 */ |
| 27 | #define MCP795_EEREAD 0x03 | 28 | #define MCP795_EEREAD 0x03 |
| @@ -38,9 +39,17 @@ | |||
| 38 | #define MCP795_CLRWDT 0x44 | 39 | #define MCP795_CLRWDT 0x44 |
| 39 | #define MCP795_CLRRAM 0x54 | 40 | #define MCP795_CLRRAM 0x54 |
| 40 | 41 | ||
| 42 | /* MCP795 RTCC registers, see datasheet table 4-1 */ | ||
| 43 | #define MCP795_REG_SECONDS 0x01 | ||
| 44 | #define MCP795_REG_DAY 0x04 | ||
| 45 | #define MCP795_REG_MONTH 0x06 | ||
| 46 | #define MCP795_REG_CONTROL 0x08 | ||
| 47 | |||
| 41 | #define MCP795_ST_BIT 0x80 | 48 | #define MCP795_ST_BIT 0x80 |
| 42 | #define MCP795_24_BIT 0x40 | 49 | #define MCP795_24_BIT 0x40 |
| 43 | #define MCP795_LP_BIT BIT(5) | 50 | #define MCP795_LP_BIT BIT(5) |
| 51 | #define MCP795_EXTOSC_BIT BIT(3) | ||
| 52 | #define MCP795_OSCON_BIT BIT(5) | ||
| 44 | 53 | ||
| 45 | static int mcp795_rtcc_read(struct device *dev, u8 addr, u8 *buf, u8 count) | 54 | static int mcp795_rtcc_read(struct device *dev, u8 addr, u8 *buf, u8 count) |
| 46 | { | 55 | { |
| @@ -95,13 +104,65 @@ static int mcp795_rtcc_set_bits(struct device *dev, u8 addr, u8 mask, u8 state) | |||
| 95 | return ret; | 104 | return ret; |
| 96 | } | 105 | } |
| 97 | 106 | ||
| 107 | static int mcp795_stop_oscillator(struct device *dev, bool *extosc) | ||
| 108 | { | ||
| 109 | int retries = 5; | ||
| 110 | int ret; | ||
| 111 | u8 data; | ||
| 112 | |||
| 113 | ret = mcp795_rtcc_set_bits(dev, MCP795_REG_SECONDS, MCP795_ST_BIT, 0); | ||
| 114 | if (ret) | ||
| 115 | return ret; | ||
| 116 | ret = mcp795_rtcc_read(dev, MCP795_REG_CONTROL, &data, 1); | ||
| 117 | if (ret) | ||
| 118 | return ret; | ||
| 119 | *extosc = !!(data & MCP795_EXTOSC_BIT); | ||
| 120 | ret = mcp795_rtcc_set_bits( | ||
| 121 | dev, MCP795_REG_CONTROL, MCP795_EXTOSC_BIT, 0); | ||
| 122 | if (ret) | ||
| 123 | return ret; | ||
| 124 | /* wait for the OSCON bit to clear */ | ||
| 125 | do { | ||
| 126 | usleep_range(700, 800); | ||
| 127 | ret = mcp795_rtcc_read(dev, MCP795_REG_DAY, &data, 1); | ||
| 128 | if (ret) | ||
| 129 | break; | ||
| 130 | if (!(data & MCP795_OSCON_BIT)) | ||
| 131 | break; | ||
| 132 | |||
| 133 | } while (--retries); | ||
| 134 | |||
| 135 | return !retries ? -EIO : ret; | ||
| 136 | } | ||
| 137 | |||
| 138 | static int mcp795_start_oscillator(struct device *dev, bool *extosc) | ||
| 139 | { | ||
| 140 | if (extosc) { | ||
| 141 | u8 data = *extosc ? MCP795_EXTOSC_BIT : 0; | ||
| 142 | int ret; | ||
| 143 | |||
| 144 | ret = mcp795_rtcc_set_bits( | ||
| 145 | dev, MCP795_REG_CONTROL, MCP795_EXTOSC_BIT, data); | ||
| 146 | if (ret) | ||
| 147 | return ret; | ||
| 148 | } | ||
| 149 | return mcp795_rtcc_set_bits( | ||
| 150 | dev, MCP795_REG_SECONDS, MCP795_ST_BIT, MCP795_ST_BIT); | ||
| 151 | } | ||
| 152 | |||
| 98 | static int mcp795_set_time(struct device *dev, struct rtc_time *tim) | 153 | static int mcp795_set_time(struct device *dev, struct rtc_time *tim) |
| 99 | { | 154 | { |
| 100 | int ret; | 155 | int ret; |
| 101 | u8 data[7]; | 156 | u8 data[7]; |
| 157 | bool extosc; | ||
| 158 | |||
| 159 | /* Stop RTC and store current value of EXTOSC bit */ | ||
| 160 | ret = mcp795_stop_oscillator(dev, &extosc); | ||
| 161 | if (ret) | ||
| 162 | return ret; | ||
| 102 | 163 | ||
| 103 | /* Read first, so we can leave config bits untouched */ | 164 | /* Read first, so we can leave config bits untouched */ |
| 104 | ret = mcp795_rtcc_read(dev, 0x01, data, sizeof(data)); | 165 | ret = mcp795_rtcc_read(dev, MCP795_REG_SECONDS, data, sizeof(data)); |
| 105 | 166 | ||
| 106 | if (ret) | 167 | if (ret) |
| 107 | return ret; | 168 | return ret; |
| @@ -117,8 +178,23 @@ static int mcp795_set_time(struct device *dev, struct rtc_time *tim) | |||
| 117 | 178 | ||
| 118 | data[6] = bin2bcd(tim->tm_year); | 179 | data[6] = bin2bcd(tim->tm_year); |
| 119 | 180 | ||
| 120 | ret = mcp795_rtcc_write(dev, 0x01, data, sizeof(data)); | 181 | /* Always write the date and month using a separate Write command. |
| 182 | * This is a workaround for a know silicon issue that some combinations | ||
| 183 | * of date and month values may result in the date being reset to 1. | ||
| 184 | */ | ||
| 185 | ret = mcp795_rtcc_write(dev, MCP795_REG_SECONDS, data, 5); | ||
| 186 | if (ret) | ||
| 187 | return ret; | ||
| 188 | |||
| 189 | ret = mcp795_rtcc_write(dev, MCP795_REG_MONTH, &data[5], 2); | ||
| 190 | if (ret) | ||
| 191 | return ret; | ||
| 121 | 192 | ||
| 193 | /* Start back RTC and restore previous value of EXTOSC bit. | ||
| 194 | * There is no need to clear EXTOSC bit when the previous value was 0 | ||
| 195 | * because it was already cleared when stopping the RTC oscillator. | ||
| 196 | */ | ||
| 197 | ret = mcp795_start_oscillator(dev, extosc ? &extosc : NULL); | ||
| 122 | if (ret) | 198 | if (ret) |
| 123 | return ret; | 199 | return ret; |
| 124 | 200 | ||
| @@ -134,7 +210,7 @@ static int mcp795_read_time(struct device *dev, struct rtc_time *tim) | |||
| 134 | int ret; | 210 | int ret; |
| 135 | u8 data[7]; | 211 | u8 data[7]; |
| 136 | 212 | ||
| 137 | ret = mcp795_rtcc_read(dev, 0x01, data, sizeof(data)); | 213 | ret = mcp795_rtcc_read(dev, MCP795_REG_SECONDS, data, sizeof(data)); |
| 138 | 214 | ||
| 139 | if (ret) | 215 | if (ret) |
| 140 | return ret; | 216 | return ret; |
| @@ -171,8 +247,8 @@ static int mcp795_probe(struct spi_device *spi) | |||
| 171 | return ret; | 247 | return ret; |
| 172 | } | 248 | } |
| 173 | 249 | ||
| 174 | /* Start the oscillator */ | 250 | /* Start the oscillator but don't set the value of EXTOSC bit */ |
| 175 | mcp795_rtcc_set_bits(&spi->dev, 0x01, MCP795_ST_BIT, MCP795_ST_BIT); | 251 | mcp795_start_oscillator(&spi->dev, NULL); |
| 176 | /* Clear the 12 hour mode flag*/ | 252 | /* Clear the 12 hour mode flag*/ |
| 177 | mcp795_rtcc_set_bits(&spi->dev, 0x03, MCP795_24_BIT, 0); | 253 | mcp795_rtcc_set_bits(&spi->dev, 0x03, MCP795_24_BIT, 0); |
| 178 | 254 | ||
