diff options
| -rw-r--r-- | drivers/clk/at91/clk-h32mx.c | 4 | ||||
| -rw-r--r-- | drivers/clk/at91/clk-main.c | 4 | ||||
| -rw-r--r-- | drivers/clk/at91/clk-master.c | 8 | ||||
| -rw-r--r-- | drivers/clk/at91/clk-pll.c | 8 | ||||
| -rw-r--r-- | drivers/clk/at91/clk-system.c | 8 | ||||
| -rw-r--r-- | drivers/clk/at91/clk-utmi.c | 8 | ||||
| -rw-r--r-- | drivers/clk/bcm/clk-iproc-asiu.c | 6 | ||||
| -rw-r--r-- | drivers/clk/bcm/clk-iproc-pll.c | 13 | ||||
| -rw-r--r-- | drivers/clk/clk-stm32f4.c | 2 | ||||
| -rw-r--r-- | drivers/clk/mediatek/clk-mt8173.c | 26 | ||||
| -rw-r--r-- | drivers/clk/qcom/clk-rcg2.c | 9 | ||||
| -rw-r--r-- | drivers/clk/st/clk-flexgen.c | 4 | ||||
| -rw-r--r-- | drivers/clk/st/clkgen-fsyn.c | 12 | ||||
| -rw-r--r-- | drivers/clk/st/clkgen-mux.c | 10 | ||||
| -rw-r--r-- | drivers/clk/st/clkgen-pll.c | 2 |
15 files changed, 74 insertions, 50 deletions
diff --git a/drivers/clk/at91/clk-h32mx.c b/drivers/clk/at91/clk-h32mx.c index 152dcb3f7b5f..61566bcefa53 100644 --- a/drivers/clk/at91/clk-h32mx.c +++ b/drivers/clk/at91/clk-h32mx.c | |||
| @@ -116,8 +116,10 @@ void __init of_sama5d4_clk_h32mx_setup(struct device_node *np, | |||
| 116 | h32mxclk->pmc = pmc; | 116 | h32mxclk->pmc = pmc; |
| 117 | 117 | ||
| 118 | clk = clk_register(NULL, &h32mxclk->hw); | 118 | clk = clk_register(NULL, &h32mxclk->hw); |
| 119 | if (!clk) | 119 | if (!clk) { |
| 120 | kfree(h32mxclk); | ||
| 120 | return; | 121 | return; |
| 122 | } | ||
| 121 | 123 | ||
| 122 | of_clk_add_provider(np, of_clk_src_simple_get, clk); | 124 | of_clk_add_provider(np, of_clk_src_simple_get, clk); |
| 123 | } | 125 | } |
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c index c2400456a044..27dfa965cfed 100644 --- a/drivers/clk/at91/clk-main.c +++ b/drivers/clk/at91/clk-main.c | |||
| @@ -171,8 +171,10 @@ at91_clk_register_main_osc(struct at91_pmc *pmc, | |||
| 171 | irq_set_status_flags(osc->irq, IRQ_NOAUTOEN); | 171 | irq_set_status_flags(osc->irq, IRQ_NOAUTOEN); |
| 172 | ret = request_irq(osc->irq, clk_main_osc_irq_handler, | 172 | ret = request_irq(osc->irq, clk_main_osc_irq_handler, |
| 173 | IRQF_TRIGGER_HIGH, name, osc); | 173 | IRQF_TRIGGER_HIGH, name, osc); |
| 174 | if (ret) | 174 | if (ret) { |
| 175 | kfree(osc); | ||
| 175 | return ERR_PTR(ret); | 176 | return ERR_PTR(ret); |
| 177 | } | ||
| 176 | 178 | ||
| 177 | if (bypass) | 179 | if (bypass) |
| 178 | pmc_write(pmc, AT91_CKGR_MOR, | 180 | pmc_write(pmc, AT91_CKGR_MOR, |
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c index f98eafe9b12d..5b3ded5205a2 100644 --- a/drivers/clk/at91/clk-master.c +++ b/drivers/clk/at91/clk-master.c | |||
| @@ -165,12 +165,16 @@ at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq, | |||
| 165 | irq_set_status_flags(master->irq, IRQ_NOAUTOEN); | 165 | irq_set_status_flags(master->irq, IRQ_NOAUTOEN); |
| 166 | ret = request_irq(master->irq, clk_master_irq_handler, | 166 | ret = request_irq(master->irq, clk_master_irq_handler, |
| 167 | IRQF_TRIGGER_HIGH, "clk-master", master); | 167 | IRQF_TRIGGER_HIGH, "clk-master", master); |
| 168 | if (ret) | 168 | if (ret) { |
| 169 | kfree(master); | ||
| 169 | return ERR_PTR(ret); | 170 | return ERR_PTR(ret); |
| 171 | } | ||
| 170 | 172 | ||
| 171 | clk = clk_register(NULL, &master->hw); | 173 | clk = clk_register(NULL, &master->hw); |
| 172 | if (IS_ERR(clk)) | 174 | if (IS_ERR(clk)) { |
| 175 | free_irq(master->irq, master); | ||
| 173 | kfree(master); | 176 | kfree(master); |
| 177 | } | ||
| 174 | 178 | ||
| 175 | return clk; | 179 | return clk; |
| 176 | } | 180 | } |
diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c index cbbe40377ad6..18b60f4895a6 100644 --- a/drivers/clk/at91/clk-pll.c +++ b/drivers/clk/at91/clk-pll.c | |||
| @@ -346,12 +346,16 @@ at91_clk_register_pll(struct at91_pmc *pmc, unsigned int irq, const char *name, | |||
| 346 | irq_set_status_flags(pll->irq, IRQ_NOAUTOEN); | 346 | irq_set_status_flags(pll->irq, IRQ_NOAUTOEN); |
| 347 | ret = request_irq(pll->irq, clk_pll_irq_handler, IRQF_TRIGGER_HIGH, | 347 | ret = request_irq(pll->irq, clk_pll_irq_handler, IRQF_TRIGGER_HIGH, |
| 348 | id ? "clk-pllb" : "clk-plla", pll); | 348 | id ? "clk-pllb" : "clk-plla", pll); |
| 349 | if (ret) | 349 | if (ret) { |
| 350 | kfree(pll); | ||
| 350 | return ERR_PTR(ret); | 351 | return ERR_PTR(ret); |
| 352 | } | ||
| 351 | 353 | ||
| 352 | clk = clk_register(NULL, &pll->hw); | 354 | clk = clk_register(NULL, &pll->hw); |
| 353 | if (IS_ERR(clk)) | 355 | if (IS_ERR(clk)) { |
| 356 | free_irq(pll->irq, pll); | ||
| 354 | kfree(pll); | 357 | kfree(pll); |
| 358 | } | ||
| 355 | 359 | ||
| 356 | return clk; | 360 | return clk; |
| 357 | } | 361 | } |
diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c index a76d03fd577b..58008b3e8bc1 100644 --- a/drivers/clk/at91/clk-system.c +++ b/drivers/clk/at91/clk-system.c | |||
| @@ -130,13 +130,17 @@ at91_clk_register_system(struct at91_pmc *pmc, const char *name, | |||
| 130 | irq_set_status_flags(sys->irq, IRQ_NOAUTOEN); | 130 | irq_set_status_flags(sys->irq, IRQ_NOAUTOEN); |
| 131 | ret = request_irq(sys->irq, clk_system_irq_handler, | 131 | ret = request_irq(sys->irq, clk_system_irq_handler, |
| 132 | IRQF_TRIGGER_HIGH, name, sys); | 132 | IRQF_TRIGGER_HIGH, name, sys); |
| 133 | if (ret) | 133 | if (ret) { |
| 134 | kfree(sys); | ||
| 134 | return ERR_PTR(ret); | 135 | return ERR_PTR(ret); |
| 136 | } | ||
| 135 | } | 137 | } |
| 136 | 138 | ||
| 137 | clk = clk_register(NULL, &sys->hw); | 139 | clk = clk_register(NULL, &sys->hw); |
| 138 | if (IS_ERR(clk)) | 140 | if (IS_ERR(clk)) { |
| 141 | free_irq(sys->irq, sys); | ||
| 139 | kfree(sys); | 142 | kfree(sys); |
| 143 | } | ||
| 140 | 144 | ||
| 141 | return clk; | 145 | return clk; |
| 142 | } | 146 | } |
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c index ae3263bc1476..30dd697b1668 100644 --- a/drivers/clk/at91/clk-utmi.c +++ b/drivers/clk/at91/clk-utmi.c | |||
| @@ -118,12 +118,16 @@ at91_clk_register_utmi(struct at91_pmc *pmc, unsigned int irq, | |||
| 118 | irq_set_status_flags(utmi->irq, IRQ_NOAUTOEN); | 118 | irq_set_status_flags(utmi->irq, IRQ_NOAUTOEN); |
| 119 | ret = request_irq(utmi->irq, clk_utmi_irq_handler, | 119 | ret = request_irq(utmi->irq, clk_utmi_irq_handler, |
| 120 | IRQF_TRIGGER_HIGH, "clk-utmi", utmi); | 120 | IRQF_TRIGGER_HIGH, "clk-utmi", utmi); |
| 121 | if (ret) | 121 | if (ret) { |
| 122 | kfree(utmi); | ||
| 122 | return ERR_PTR(ret); | 123 | return ERR_PTR(ret); |
| 124 | } | ||
| 123 | 125 | ||
| 124 | clk = clk_register(NULL, &utmi->hw); | 126 | clk = clk_register(NULL, &utmi->hw); |
| 125 | if (IS_ERR(clk)) | 127 | if (IS_ERR(clk)) { |
| 128 | free_irq(utmi->irq, utmi); | ||
| 126 | kfree(utmi); | 129 | kfree(utmi); |
| 130 | } | ||
| 127 | 131 | ||
| 128 | return clk; | 132 | return clk; |
| 129 | } | 133 | } |
diff --git a/drivers/clk/bcm/clk-iproc-asiu.c b/drivers/clk/bcm/clk-iproc-asiu.c index e19c09cd9645..f630e1bbdcfe 100644 --- a/drivers/clk/bcm/clk-iproc-asiu.c +++ b/drivers/clk/bcm/clk-iproc-asiu.c | |||
| @@ -222,10 +222,6 @@ void __init iproc_asiu_setup(struct device_node *node, | |||
| 222 | struct iproc_asiu_clk *asiu_clk; | 222 | struct iproc_asiu_clk *asiu_clk; |
| 223 | const char *clk_name; | 223 | const char *clk_name; |
| 224 | 224 | ||
| 225 | clk_name = kzalloc(IPROC_CLK_NAME_LEN, GFP_KERNEL); | ||
| 226 | if (WARN_ON(!clk_name)) | ||
| 227 | goto err_clk_register; | ||
| 228 | |||
| 229 | ret = of_property_read_string_index(node, "clock-output-names", | 225 | ret = of_property_read_string_index(node, "clock-output-names", |
| 230 | i, &clk_name); | 226 | i, &clk_name); |
| 231 | if (WARN_ON(ret)) | 227 | if (WARN_ON(ret)) |
| @@ -259,7 +255,7 @@ void __init iproc_asiu_setup(struct device_node *node, | |||
| 259 | 255 | ||
| 260 | err_clk_register: | 256 | err_clk_register: |
| 261 | for (i = 0; i < num_clks; i++) | 257 | for (i = 0; i < num_clks; i++) |
| 262 | kfree(asiu->clks[i].name); | 258 | clk_unregister(asiu->clk_data.clks[i]); |
| 263 | iounmap(asiu->gate_base); | 259 | iounmap(asiu->gate_base); |
| 264 | 260 | ||
| 265 | err_iomap_gate: | 261 | err_iomap_gate: |
diff --git a/drivers/clk/bcm/clk-iproc-pll.c b/drivers/clk/bcm/clk-iproc-pll.c index 46fb84bc2674..2dda4e8295a9 100644 --- a/drivers/clk/bcm/clk-iproc-pll.c +++ b/drivers/clk/bcm/clk-iproc-pll.c | |||
| @@ -366,7 +366,7 @@ static unsigned long iproc_pll_recalc_rate(struct clk_hw *hw, | |||
| 366 | val = readl(pll->pll_base + ctrl->ndiv_int.offset); | 366 | val = readl(pll->pll_base + ctrl->ndiv_int.offset); |
| 367 | ndiv_int = (val >> ctrl->ndiv_int.shift) & | 367 | ndiv_int = (val >> ctrl->ndiv_int.shift) & |
| 368 | bit_mask(ctrl->ndiv_int.width); | 368 | bit_mask(ctrl->ndiv_int.width); |
| 369 | ndiv = ndiv_int << ctrl->ndiv_int.shift; | 369 | ndiv = (u64)ndiv_int << ctrl->ndiv_int.shift; |
| 370 | 370 | ||
| 371 | if (ctrl->flags & IPROC_CLK_PLL_HAS_NDIV_FRAC) { | 371 | if (ctrl->flags & IPROC_CLK_PLL_HAS_NDIV_FRAC) { |
| 372 | val = readl(pll->pll_base + ctrl->ndiv_frac.offset); | 372 | val = readl(pll->pll_base + ctrl->ndiv_frac.offset); |
| @@ -374,7 +374,8 @@ static unsigned long iproc_pll_recalc_rate(struct clk_hw *hw, | |||
| 374 | bit_mask(ctrl->ndiv_frac.width); | 374 | bit_mask(ctrl->ndiv_frac.width); |
| 375 | 375 | ||
| 376 | if (ndiv_frac != 0) | 376 | if (ndiv_frac != 0) |
| 377 | ndiv = (ndiv_int << ctrl->ndiv_int.shift) | ndiv_frac; | 377 | ndiv = ((u64)ndiv_int << ctrl->ndiv_int.shift) | |
| 378 | ndiv_frac; | ||
| 378 | } | 379 | } |
| 379 | 380 | ||
| 380 | val = readl(pll->pll_base + ctrl->pdiv.offset); | 381 | val = readl(pll->pll_base + ctrl->pdiv.offset); |
| @@ -655,10 +656,6 @@ void __init iproc_pll_clk_setup(struct device_node *node, | |||
| 655 | memset(&init, 0, sizeof(init)); | 656 | memset(&init, 0, sizeof(init)); |
| 656 | parent_name = node->name; | 657 | parent_name = node->name; |
| 657 | 658 | ||
| 658 | clk_name = kzalloc(IPROC_CLK_NAME_LEN, GFP_KERNEL); | ||
| 659 | if (WARN_ON(!clk_name)) | ||
| 660 | goto err_clk_register; | ||
| 661 | |||
| 662 | ret = of_property_read_string_index(node, "clock-output-names", | 659 | ret = of_property_read_string_index(node, "clock-output-names", |
| 663 | i, &clk_name); | 660 | i, &clk_name); |
| 664 | if (WARN_ON(ret)) | 661 | if (WARN_ON(ret)) |
| @@ -690,10 +687,8 @@ void __init iproc_pll_clk_setup(struct device_node *node, | |||
| 690 | return; | 687 | return; |
| 691 | 688 | ||
| 692 | err_clk_register: | 689 | err_clk_register: |
| 693 | for (i = 0; i < num_clks; i++) { | 690 | for (i = 0; i < num_clks; i++) |
| 694 | kfree(pll->clks[i].name); | ||
| 695 | clk_unregister(pll->clk_data.clks[i]); | 691 | clk_unregister(pll->clk_data.clks[i]); |
| 696 | } | ||
| 697 | 692 | ||
| 698 | err_pll_register: | 693 | err_pll_register: |
| 699 | if (pll->asiu_base) | 694 | if (pll->asiu_base) |
diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index b9b12a742970..3f6f7ad39490 100644 --- a/drivers/clk/clk-stm32f4.c +++ b/drivers/clk/clk-stm32f4.c | |||
| @@ -268,7 +268,7 @@ static int stm32f4_rcc_lookup_clk_idx(u8 primary, u8 secondary) | |||
| 268 | memcpy(table, stm32f42xx_gate_map, sizeof(table)); | 268 | memcpy(table, stm32f42xx_gate_map, sizeof(table)); |
| 269 | 269 | ||
| 270 | /* only bits set in table can be used as indices */ | 270 | /* only bits set in table can be used as indices */ |
| 271 | if (WARN_ON(secondary > 8 * sizeof(table) || | 271 | if (WARN_ON(secondary >= BITS_PER_BYTE * sizeof(table) || |
| 272 | 0 == (table[BIT_ULL_WORD(secondary)] & | 272 | 0 == (table[BIT_ULL_WORD(secondary)] & |
| 273 | BIT_ULL_MASK(secondary)))) | 273 | BIT_ULL_MASK(secondary)))) |
| 274 | return -EINVAL; | 274 | return -EINVAL; |
diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c index 4b9e04cdf7e8..8b6523d15fb8 100644 --- a/drivers/clk/mediatek/clk-mt8173.c +++ b/drivers/clk/mediatek/clk-mt8173.c | |||
| @@ -700,6 +700,22 @@ static const struct mtk_composite peri_clks[] __initconst = { | |||
| 700 | MUX(CLK_PERI_UART3_SEL, "uart3_ck_sel", uart_ck_sel_parents, 0x40c, 3, 1), | 700 | MUX(CLK_PERI_UART3_SEL, "uart3_ck_sel", uart_ck_sel_parents, 0x40c, 3, 1), |
| 701 | }; | 701 | }; |
| 702 | 702 | ||
| 703 | static struct clk_onecell_data *mt8173_top_clk_data __initdata; | ||
| 704 | static struct clk_onecell_data *mt8173_pll_clk_data __initdata; | ||
| 705 | |||
| 706 | static void __init mtk_clk_enable_critical(void) | ||
| 707 | { | ||
| 708 | if (!mt8173_top_clk_data || !mt8173_pll_clk_data) | ||
| 709 | return; | ||
| 710 | |||
| 711 | clk_prepare_enable(mt8173_pll_clk_data->clks[CLK_APMIXED_ARMCA15PLL]); | ||
| 712 | clk_prepare_enable(mt8173_pll_clk_data->clks[CLK_APMIXED_ARMCA7PLL]); | ||
| 713 | clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_MEM_SEL]); | ||
| 714 | clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_DDRPHYCFG_SEL]); | ||
| 715 | clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_CCI400_SEL]); | ||
| 716 | clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_RTC_SEL]); | ||
| 717 | } | ||
| 718 | |||
| 703 | static void __init mtk_topckgen_init(struct device_node *node) | 719 | static void __init mtk_topckgen_init(struct device_node *node) |
| 704 | { | 720 | { |
| 705 | struct clk_onecell_data *clk_data; | 721 | struct clk_onecell_data *clk_data; |
| @@ -712,19 +728,19 @@ static void __init mtk_topckgen_init(struct device_node *node) | |||
| 712 | return; | 728 | return; |
| 713 | } | 729 | } |
| 714 | 730 | ||
| 715 | clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); | 731 | mt8173_top_clk_data = clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); |
| 716 | 732 | ||
| 717 | mtk_clk_register_factors(root_clk_alias, ARRAY_SIZE(root_clk_alias), clk_data); | 733 | mtk_clk_register_factors(root_clk_alias, ARRAY_SIZE(root_clk_alias), clk_data); |
| 718 | mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); | 734 | mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); |
| 719 | mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, | 735 | mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, |
| 720 | &mt8173_clk_lock, clk_data); | 736 | &mt8173_clk_lock, clk_data); |
| 721 | 737 | ||
| 722 | clk_prepare_enable(clk_data->clks[CLK_TOP_CCI400_SEL]); | ||
| 723 | |||
| 724 | r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); | 738 | r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
| 725 | if (r) | 739 | if (r) |
| 726 | pr_err("%s(): could not register clock provider: %d\n", | 740 | pr_err("%s(): could not register clock provider: %d\n", |
| 727 | __func__, r); | 741 | __func__, r); |
| 742 | |||
| 743 | mtk_clk_enable_critical(); | ||
| 728 | } | 744 | } |
| 729 | CLK_OF_DECLARE(mtk_topckgen, "mediatek,mt8173-topckgen", mtk_topckgen_init); | 745 | CLK_OF_DECLARE(mtk_topckgen, "mediatek,mt8173-topckgen", mtk_topckgen_init); |
| 730 | 746 | ||
| @@ -818,13 +834,13 @@ static void __init mtk_apmixedsys_init(struct device_node *node) | |||
| 818 | { | 834 | { |
| 819 | struct clk_onecell_data *clk_data; | 835 | struct clk_onecell_data *clk_data; |
| 820 | 836 | ||
| 821 | clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK); | 837 | mt8173_pll_clk_data = clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK); |
| 822 | if (!clk_data) | 838 | if (!clk_data) |
| 823 | return; | 839 | return; |
| 824 | 840 | ||
| 825 | mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data); | 841 | mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data); |
| 826 | 842 | ||
| 827 | clk_prepare_enable(clk_data->clks[CLK_APMIXED_ARMCA15PLL]); | 843 | mtk_clk_enable_critical(); |
| 828 | } | 844 | } |
| 829 | CLK_OF_DECLARE(mtk_apmixedsys, "mediatek,mt8173-apmixedsys", | 845 | CLK_OF_DECLARE(mtk_apmixedsys, "mediatek,mt8173-apmixedsys", |
| 830 | mtk_apmixedsys_init); | 846 | mtk_apmixedsys_init); |
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index b95d17fbb8d7..92936f0912d2 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c | |||
| @@ -530,19 +530,16 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate, | |||
| 530 | struct clk_rcg2 *rcg = to_clk_rcg2(hw); | 530 | struct clk_rcg2 *rcg = to_clk_rcg2(hw); |
| 531 | struct freq_tbl f = *rcg->freq_tbl; | 531 | struct freq_tbl f = *rcg->freq_tbl; |
| 532 | const struct frac_entry *frac = frac_table_pixel; | 532 | const struct frac_entry *frac = frac_table_pixel; |
| 533 | unsigned long request, src_rate; | 533 | unsigned long request; |
| 534 | int delta = 100000; | 534 | int delta = 100000; |
| 535 | u32 mask = BIT(rcg->hid_width) - 1; | 535 | u32 mask = BIT(rcg->hid_width) - 1; |
| 536 | u32 hid_div; | 536 | u32 hid_div; |
| 537 | int index = qcom_find_src_index(hw, rcg->parent_map, f.src); | ||
| 538 | struct clk *parent = clk_get_parent_by_index(hw->clk, index); | ||
| 539 | 537 | ||
| 540 | for (; frac->num; frac++) { | 538 | for (; frac->num; frac++) { |
| 541 | request = (rate * frac->den) / frac->num; | 539 | request = (rate * frac->den) / frac->num; |
| 542 | 540 | ||
| 543 | src_rate = __clk_round_rate(parent, request); | 541 | if ((parent_rate < (request - delta)) || |
| 544 | if ((src_rate < (request - delta)) || | 542 | (parent_rate > (request + delta))) |
| 545 | (src_rate > (request + delta))) | ||
| 546 | continue; | 543 | continue; |
| 547 | 544 | ||
| 548 | regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, | 545 | regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, |
diff --git a/drivers/clk/st/clk-flexgen.c b/drivers/clk/st/clk-flexgen.c index 657ca14ba709..8dd8cce27361 100644 --- a/drivers/clk/st/clk-flexgen.c +++ b/drivers/clk/st/clk-flexgen.c | |||
| @@ -190,7 +190,7 @@ static struct clk *clk_register_flexgen(const char *name, | |||
| 190 | 190 | ||
| 191 | init.name = name; | 191 | init.name = name; |
| 192 | init.ops = &flexgen_ops; | 192 | init.ops = &flexgen_ops; |
| 193 | init.flags = CLK_IS_BASIC | flexgen_flags; | 193 | init.flags = CLK_IS_BASIC | CLK_GET_RATE_NOCACHE | flexgen_flags; |
| 194 | init.parent_names = parent_names; | 194 | init.parent_names = parent_names; |
| 195 | init.num_parents = num_parents; | 195 | init.num_parents = num_parents; |
| 196 | 196 | ||
| @@ -303,6 +303,8 @@ static void __init st_of_flexgen_setup(struct device_node *np) | |||
| 303 | if (!rlock) | 303 | if (!rlock) |
| 304 | goto err; | 304 | goto err; |
| 305 | 305 | ||
| 306 | spin_lock_init(rlock); | ||
| 307 | |||
| 306 | for (i = 0; i < clk_data->clk_num; i++) { | 308 | for (i = 0; i < clk_data->clk_num; i++) { |
| 307 | struct clk *clk; | 309 | struct clk *clk; |
| 308 | const char *clk_name; | 310 | const char *clk_name; |
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c index e94197f04b0b..d9eb2e1d8471 100644 --- a/drivers/clk/st/clkgen-fsyn.c +++ b/drivers/clk/st/clkgen-fsyn.c | |||
| @@ -340,7 +340,7 @@ static const struct clkgen_quadfs_data st_fs660c32_C_407 = { | |||
| 340 | CLKGEN_FIELD(0x30c, 0xf, 20), | 340 | CLKGEN_FIELD(0x30c, 0xf, 20), |
| 341 | CLKGEN_FIELD(0x310, 0xf, 20) }, | 341 | CLKGEN_FIELD(0x310, 0xf, 20) }, |
| 342 | .lockstatus_present = true, | 342 | .lockstatus_present = true, |
| 343 | .lock_status = CLKGEN_FIELD(0x2A0, 0x1, 24), | 343 | .lock_status = CLKGEN_FIELD(0x2f0, 0x1, 24), |
| 344 | .powerup_polarity = 1, | 344 | .powerup_polarity = 1, |
| 345 | .standby_polarity = 1, | 345 | .standby_polarity = 1, |
| 346 | .pll_ops = &st_quadfs_pll_c32_ops, | 346 | .pll_ops = &st_quadfs_pll_c32_ops, |
| @@ -489,7 +489,7 @@ static int quadfs_pll_is_enabled(struct clk_hw *hw) | |||
| 489 | struct st_clk_quadfs_pll *pll = to_quadfs_pll(hw); | 489 | struct st_clk_quadfs_pll *pll = to_quadfs_pll(hw); |
| 490 | u32 npda = CLKGEN_READ(pll, npda); | 490 | u32 npda = CLKGEN_READ(pll, npda); |
| 491 | 491 | ||
| 492 | return !!npda; | 492 | return pll->data->powerup_polarity ? !npda : !!npda; |
| 493 | } | 493 | } |
| 494 | 494 | ||
| 495 | static int clk_fs660c32_vco_get_rate(unsigned long input, struct stm_fs *fs, | 495 | static int clk_fs660c32_vco_get_rate(unsigned long input, struct stm_fs *fs, |
| @@ -635,7 +635,7 @@ static struct clk * __init st_clk_register_quadfs_pll( | |||
| 635 | 635 | ||
| 636 | init.name = name; | 636 | init.name = name; |
| 637 | init.ops = quadfs->pll_ops; | 637 | init.ops = quadfs->pll_ops; |
| 638 | init.flags = CLK_IS_BASIC; | 638 | init.flags = CLK_IS_BASIC | CLK_GET_RATE_NOCACHE; |
| 639 | init.parent_names = &parent_name; | 639 | init.parent_names = &parent_name; |
| 640 | init.num_parents = 1; | 640 | init.num_parents = 1; |
| 641 | 641 | ||
| @@ -774,7 +774,7 @@ static void quadfs_fsynth_disable(struct clk_hw *hw) | |||
| 774 | if (fs->lock) | 774 | if (fs->lock) |
| 775 | spin_lock_irqsave(fs->lock, flags); | 775 | spin_lock_irqsave(fs->lock, flags); |
| 776 | 776 | ||
| 777 | CLKGEN_WRITE(fs, nsb[fs->chan], !fs->data->standby_polarity); | 777 | CLKGEN_WRITE(fs, nsb[fs->chan], fs->data->standby_polarity); |
| 778 | 778 | ||
| 779 | if (fs->lock) | 779 | if (fs->lock) |
| 780 | spin_unlock_irqrestore(fs->lock, flags); | 780 | spin_unlock_irqrestore(fs->lock, flags); |
| @@ -1082,10 +1082,6 @@ static const struct of_device_id quadfs_of_match[] = { | |||
| 1082 | .compatible = "st,stih407-quadfs660-D", | 1082 | .compatible = "st,stih407-quadfs660-D", |
| 1083 | .data = &st_fs660c32_D_407 | 1083 | .data = &st_fs660c32_D_407 |
| 1084 | }, | 1084 | }, |
| 1085 | { | ||
| 1086 | .compatible = "st,stih407-quadfs660-D", | ||
| 1087 | .data = (void *)&st_fs660c32_D_407 | ||
| 1088 | }, | ||
| 1089 | {} | 1085 | {} |
| 1090 | }; | 1086 | }; |
| 1091 | 1087 | ||
diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c index 4fbe6e099587..717c4a91a17b 100644 --- a/drivers/clk/st/clkgen-mux.c +++ b/drivers/clk/st/clkgen-mux.c | |||
| @@ -237,7 +237,7 @@ static struct clk *clk_register_genamux(const char *name, | |||
| 237 | 237 | ||
| 238 | init.name = name; | 238 | init.name = name; |
| 239 | init.ops = &clkgena_divmux_ops; | 239 | init.ops = &clkgena_divmux_ops; |
| 240 | init.flags = CLK_IS_BASIC; | 240 | init.flags = CLK_IS_BASIC | CLK_GET_RATE_NOCACHE; |
| 241 | init.parent_names = parent_names; | 241 | init.parent_names = parent_names; |
| 242 | init.num_parents = num_parents; | 242 | init.num_parents = num_parents; |
| 243 | 243 | ||
| @@ -513,7 +513,8 @@ static void __init st_of_clkgena_prediv_setup(struct device_node *np) | |||
| 513 | 0, &clk_name)) | 513 | 0, &clk_name)) |
| 514 | return; | 514 | return; |
| 515 | 515 | ||
| 516 | clk = clk_register_divider_table(NULL, clk_name, parent_name, 0, | 516 | clk = clk_register_divider_table(NULL, clk_name, parent_name, |
| 517 | CLK_GET_RATE_NOCACHE, | ||
| 517 | reg + data->offset, data->shift, 1, | 518 | reg + data->offset, data->shift, 1, |
| 518 | 0, data->table, NULL); | 519 | 0, data->table, NULL); |
| 519 | if (IS_ERR(clk)) | 520 | if (IS_ERR(clk)) |
| @@ -582,7 +583,7 @@ static struct clkgen_mux_data stih416_a9_mux_data = { | |||
| 582 | }; | 583 | }; |
| 583 | static struct clkgen_mux_data stih407_a9_mux_data = { | 584 | static struct clkgen_mux_data stih407_a9_mux_data = { |
| 584 | .offset = 0x1a4, | 585 | .offset = 0x1a4, |
| 585 | .shift = 1, | 586 | .shift = 0, |
| 586 | .width = 2, | 587 | .width = 2, |
| 587 | }; | 588 | }; |
| 588 | 589 | ||
| @@ -786,7 +787,8 @@ static void __init st_of_clkgen_vcc_setup(struct device_node *np) | |||
| 786 | &mux->hw, &clk_mux_ops, | 787 | &mux->hw, &clk_mux_ops, |
| 787 | &div->hw, &clk_divider_ops, | 788 | &div->hw, &clk_divider_ops, |
| 788 | &gate->hw, &clk_gate_ops, | 789 | &gate->hw, &clk_gate_ops, |
| 789 | data->clk_flags); | 790 | data->clk_flags | |
| 791 | CLK_GET_RATE_NOCACHE); | ||
| 790 | if (IS_ERR(clk)) { | 792 | if (IS_ERR(clk)) { |
| 791 | kfree(gate); | 793 | kfree(gate); |
| 792 | kfree(div); | 794 | kfree(div); |
diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c index 106532207213..72d1c27eaffa 100644 --- a/drivers/clk/st/clkgen-pll.c +++ b/drivers/clk/st/clkgen-pll.c | |||
| @@ -406,7 +406,7 @@ static struct clk * __init clkgen_pll_register(const char *parent_name, | |||
| 406 | init.name = clk_name; | 406 | init.name = clk_name; |
| 407 | init.ops = pll_data->ops; | 407 | init.ops = pll_data->ops; |
| 408 | 408 | ||
| 409 | init.flags = CLK_IS_BASIC; | 409 | init.flags = CLK_IS_BASIC | CLK_GET_RATE_NOCACHE; |
| 410 | init.parent_names = &parent_name; | 410 | init.parent_names = &parent_name; |
| 411 | init.num_parents = 1; | 411 | init.num_parents = 1; |
| 412 | 412 | ||
