diff options
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 47a6ba9fbb14..66a4da783899 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | |||
@@ -810,6 +810,55 @@ struct amd_powerplay { | |||
810 | uint32_t pp_feature; | 810 | uint32_t pp_feature; |
811 | }; | 811 | }; |
812 | 812 | ||
813 | /* Reserved doorbells for amdgpu (including multimedia). | ||
814 | * KFD can use all the rest in the 2M doorbell bar. | ||
815 | * For asic before vega10, doorbell is 32-bit, so the | ||
816 | * index/offset is in dword. For vega10 and after, doorbell | ||
817 | * can be 64-bit, so the index defined is in qword. | ||
818 | */ | ||
819 | struct amdgpu_doorbell_index { | ||
820 | uint32_t kiq; | ||
821 | uint32_t mec_ring0; | ||
822 | uint32_t mec_ring1; | ||
823 | uint32_t mec_ring2; | ||
824 | uint32_t mec_ring3; | ||
825 | uint32_t mec_ring4; | ||
826 | uint32_t mec_ring5; | ||
827 | uint32_t mec_ring6; | ||
828 | uint32_t mec_ring7; | ||
829 | uint32_t userqueue_start; | ||
830 | uint32_t userqueue_end; | ||
831 | uint32_t gfx_ring0; | ||
832 | uint32_t sdma_engine0; | ||
833 | uint32_t sdma_engine1; | ||
834 | uint32_t sdma_engine2; | ||
835 | uint32_t sdma_engine3; | ||
836 | uint32_t sdma_engine4; | ||
837 | uint32_t sdma_engine5; | ||
838 | uint32_t sdma_engine6; | ||
839 | uint32_t sdma_engine7; | ||
840 | uint32_t ih; | ||
841 | union { | ||
842 | struct { | ||
843 | uint32_t vcn_ring0_1; | ||
844 | uint32_t vcn_ring2_3; | ||
845 | uint32_t vcn_ring4_5; | ||
846 | uint32_t vcn_ring6_7; | ||
847 | } vcn; | ||
848 | struct { | ||
849 | uint32_t uvd_ring0_1; | ||
850 | uint32_t uvd_ring2_3; | ||
851 | uint32_t uvd_ring4_5; | ||
852 | uint32_t uvd_ring6_7; | ||
853 | uint32_t vce_ring0_1; | ||
854 | uint32_t vce_ring2_3; | ||
855 | uint32_t vce_ring4_5; | ||
856 | uint32_t vce_ring6_7; | ||
857 | } uvd_vce; | ||
858 | }; | ||
859 | uint32_t max_assignment; | ||
860 | }; | ||
861 | |||
813 | #define AMDGPU_RESET_MAGIC_NUM 64 | 862 | #define AMDGPU_RESET_MAGIC_NUM 64 |
814 | struct amdgpu_device { | 863 | struct amdgpu_device { |
815 | struct device *dev; | 864 | struct device *dev; |
@@ -1023,6 +1072,7 @@ struct amdgpu_device { | |||
1023 | unsigned long last_mm_index; | 1072 | unsigned long last_mm_index; |
1024 | bool in_gpu_reset; | 1073 | bool in_gpu_reset; |
1025 | struct mutex lock_reset; | 1074 | struct mutex lock_reset; |
1075 | struct amdgpu_doorbell_index doorbell_index; | ||
1026 | }; | 1076 | }; |
1027 | 1077 | ||
1028 | static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev) | 1078 | static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev) |