aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arm/boot/dts/lpc4357-ea4357-devkit.dts164
1 files changed, 164 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
index 9ac096746360..7768d724c379 100644
--- a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
+++ b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
@@ -88,6 +88,110 @@
88}; 88};
89 89
90&pinctrl { 90&pinctrl {
91 emc_pins: emc-pins {
92 emc_addr0_23_cfg {
93 pins = "p2_9", "p2_10", "p2_11", "p2_12",
94 "p2_13", "p1_0", "p1_1", "p1_2",
95 "p2_8", "p2_7", "p2_6", "p2_2",
96 "p2_1", "p2_0", "p6_8", "p6_7",
97 "pd_16", "pd_15", "pe_0", "pe_1",
98 "pe_2", "pe_3", "pe_4", "pa_4";
99 function = "emc";
100 slew-rate = <1>;
101 bias-disable;
102 input-enable;
103 input-schmitt-disable;
104 };
105
106 emc_data0_31_cfg {
107 pins = "p1_7", "p1_8", "p1_9", "p1_10",
108 "p1_11", "p1_12", "p1_13", "p1_14",
109 "p5_4", "p5_5", "p5_6", "p5_7",
110 "p5_0", "p5_1", "p5_2", "p5_3",
111 "pd_2", "pd_3", "pd_4", "pd_5",
112 "pd_6", "pd_7", "pd_8", "pd_9",
113 "pe_5", "pe_6", "pe_7", "pe_8",
114 "pe_9", "pe_10", "pe_11", "pe_12";
115 function = "emc";
116 slew-rate = <1>;
117 bias-disable;
118 input-enable;
119 input-schmitt-disable;
120 };
121
122 emc_we_oe_cfg {
123 pins = "p1_6", "p1_3";
124 function = "emc";
125 slew-rate = <1>;
126 bias-disable;
127 input-enable;
128 input-schmitt-disable;
129 };
130
131 emc_bls0_3_cfg {
132 pins = "p1_4", "p6_6", "pd_13", "pd_10";
133 function = "emc";
134 slew-rate = <1>;
135 bias-disable;
136 input-enable;
137 input-schmitt-disable;
138 };
139
140 emc_cs0_3_cfg {
141 pins = "p1_5", "p6_3", "pd_12", "pd_11";
142 function = "emc";
143 slew-rate = <1>;
144 bias-disable;
145 input-enable;
146 input-schmitt-disable;
147 };
148
149 emc_sdram_dqm0_3_cfg {
150 pins = "p6_12", "p6_10", "pd_0", "pe_13";
151 function = "emc";
152 slew-rate = <1>;
153 bias-disable;
154 input-enable;
155 input-schmitt-disable;
156 };
157
158 emc_sdram_ras_cas_cfg {
159 pins = "p6_5", "p6_4";
160 function = "emc";
161 slew-rate = <1>;
162 bias-disable;
163 input-enable;
164 input-schmitt-disable;
165 };
166
167 emc_sdram_dycs0_cfg {
168 pins = "p6_9";
169 function = "emc";
170 slew-rate = <1>;
171 bias-disable;
172 input-enable;
173 input-schmitt-disable;
174 };
175
176 emc_sdram_cke_cfg {
177 pins = "p6_11";
178 function = "emc";
179 slew-rate = <1>;
180 bias-disable;
181 input-enable;
182 input-schmitt-disable;
183 };
184
185 emc_sdram_clock_cfg {
186 pins = "clk0", "clk1", "clk2", "clk3";
187 function = "emc";
188 slew-rate = <1>;
189 bias-disable;
190 input-enable;
191 input-schmitt-disable;
192 };
193 };
194
91 enet_rmii_pins: enet-rmii-pins { 195 enet_rmii_pins: enet-rmii-pins {
92 enet_rmii_rxd_cfg { 196 enet_rmii_rxd_cfg {
93 pins = "p1_15", "p0_0"; 197 pins = "p1_15", "p0_0";
@@ -237,6 +341,66 @@
237 }; 341 };
238}; 342};
239 343
344&emc {
345 status = "okay";
346 pinctrl-names = "default";
347 pinctrl-0 = <&emc_pins>;
348
349 cs0 {
350 #address-cells = <2>;
351 #size-cells = <1>;
352 ranges;
353
354 mpmc,cs = <0>;
355 mpmc,memory-width = <16>;
356 mpmc,byte-lane-low;
357 mpmc,write-enable-delay = <0>;
358 mpmc,output-enable-delay = <0>;
359 mpmc,read-access-delay = <70>;
360 mpmc,page-mode-read-delay = <70>;
361
362 flash@0,0 {
363 compatible = "sst,sst39vf320", "cfi-flash";
364 reg = <0 0 0x400000>;
365 bank-width = <2>;
366 #address-cells = <1>;
367 #size-cells = <1>;
368
369 partition@0 {
370 label = "bootloader";
371 reg = <0x000000 0x040000>; /* 256 KiB */
372 };
373
374 partition@1 {
375 label = "kernel";
376 reg = <0x040000 0x2c0000>; /* 2.75 MiB */
377 };
378
379 partition@2 {
380 label = "rootfs";
381 reg = <0x300000 0x100000>; /* 1 MiB */
382 };
383 };
384 };
385
386 cs2 {
387 #address-cells = <2>;
388 #size-cells = <1>;
389 ranges;
390
391 mpmc,cs = <2>;
392 mpmc,memory-width = <16>;
393
394 mmio_leds: gpio@2,0 {
395 compatible = "ti,7416374";
396 reg = <2 0 0x2>;
397 gpio-controller;
398 #gpio-cells = <2>;
399 };
400
401 };
402};
403
240&enet_tx_clk { 404&enet_tx_clk {
241 clock-frequency = <50000000>; 405 clock-frequency = <50000000>;
242}; 406};