4 files changed, 3 insertions, 131 deletions

diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 4bbcf4fb7583..e4b6dafbcfc4 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -182,6 +182,8 @@ nodes to be present and contain the properties described below.
                              "psci"
                         # On ARM 32-bit systems this property is optional and
                           can be one of:
+                            "arm,psci"
+                            "allwinner,sun6i-a31"
                             "qcom,gcc-msm8660"
                             "qcom,kpss-acc-v1"
                             "qcom,kpss-acc-v2"
diff --git a/arch/arm/mach-sunxi/common.h b/arch/arm/mach-sunxi/common.h
deleted file mode 100644
index 9e5ac4756cbb..000000000000
--- a/arch/arm/mach-sunxi/common.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Core functions for Allwinner SoCs
- *
- * Copyright (C) 2013 Maxime Ripard
- *
- * Maxime Ripard <maxime.ripard@free-electrons.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ARCH_SUNXI_COMMON_H_
-#define __ARCH_SUNXI_COMMON_H_
-
-void sun6i_secondary_startup(void);
-extern struct smp_operations sun6i_smp_ops;
-
-#endif /* __ARCH_SUNXI_COMMON_H_ */
diff --git a/arch/arm/mach-sunxi/platsmp.c b/arch/arm/mach-sunxi/platsmp.c
index 0c7dbce033cc..c53077bb8c3f 100644
--- a/arch/arm/mach-sunxi/platsmp.c
+++ b/arch/arm/mach-sunxi/platsmp.c
@@ -21,8 +21,6 @@
 #include <linux/of_address.h>
 #include <linux/smp.h>
 
-#include "common.h"
-
 #define CPUCFG_CPU_PWR_CLAMP_STATUS_REG(cpu)    ((cpu) * 0x40 + 0x64)
 #define CPUCFG_CPU_RST_CTRL_REG(cpu)            (((cpu) + 1) * 0x40)
 #define CPUCFG_CPU_CTRL_REG(cpu)                (((cpu) + 1) * 0x40 + 0x04)
@@ -122,3 +120,4 @@ struct smp_operations sun6i_smp_ops __initdata = {
         .smp_prepare_cpus       = sun6i_smp_prepare_cpus,
         .smp_boot_secondary     = sun6i_smp_boot_secondary,
 };
+CPU_METHOD_OF_DECLARE(sun6i_smp, "allwinner,sun6i-a31", &sun6i_smp_ops);
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index 460b5a4962ef..ff2e6a404dab 100644
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -12,111 +12,8 @@
 
 #include <linux/clk-provider.h>
 #include <linux/clocksource.h>
-#include <linux/delay.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
-#include <linux/io.h>
-#include <linux/reboot.h>
 
 #include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/system_misc.h>
-
-#include "common.h"
-
-#define SUN4I_WATCHDOG_CTRL_REG         0x00
-#define SUN4I_WATCHDOG_CTRL_RESTART             BIT(0)
-#define SUN4I_WATCHDOG_MODE_REG         0x04
-#define SUN4I_WATCHDOG_MODE_ENABLE              BIT(0)
-#define SUN4I_WATCHDOG_MODE_RESET_ENABLE        BIT(1)
-
-#define SUN6I_WATCHDOG1_IRQ_REG         0x00
-#define SUN6I_WATCHDOG1_CTRL_REG        0x10
-#define SUN6I_WATCHDOG1_CTRL_RESTART            BIT(0)
-#define SUN6I_WATCHDOG1_CONFIG_REG      0x14
-#define SUN6I_WATCHDOG1_CONFIG_RESTART          BIT(0)
-#define SUN6I_WATCHDOG1_CONFIG_IRQ              BIT(1)
-#define SUN6I_WATCHDOG1_MODE_REG        0x18
-#define SUN6I_WATCHDOG1_MODE_ENABLE             BIT(0)
-
-static void __iomem *wdt_base;
-
-static void sun4i_restart(enum reboot_mode mode, const char *cmd)
-{
-        if (!wdt_base)
-                return;
-
-        /* Enable timer and set reset bit in the watchdog */
-        writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
-               wdt_base + SUN4I_WATCHDOG_MODE_REG);
-
-        /*
-         * Restart the watchdog. The default (and lowest) interval
-         * value for the watchdog is 0.5s.
-         */
-        writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
-
-        while (1) {
-                mdelay(5);
-                writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
-                       wdt_base + SUN4I_WATCHDOG_MODE_REG);
-        }
-}
-
-static void sun6i_restart(enum reboot_mode mode, const char *cmd)
-{
-        if (!wdt_base)
-                return;
-
-        /* Disable interrupts */
-        writel(0, wdt_base + SUN6I_WATCHDOG1_IRQ_REG);
-
-        /* We want to disable the IRQ and just reset the whole system */
-        writel(SUN6I_WATCHDOG1_CONFIG_RESTART,
-                wdt_base + SUN6I_WATCHDOG1_CONFIG_REG);
-
-        /* Enable timer. The default and lowest interval value is 0.5s */
-        writel(SUN6I_WATCHDOG1_MODE_ENABLE,
-                wdt_base + SUN6I_WATCHDOG1_MODE_REG);
-
-        /* Restart the watchdog. */
-        writel(SUN6I_WATCHDOG1_CTRL_RESTART,
-                wdt_base + SUN6I_WATCHDOG1_CTRL_REG);
-
-        while (1) {
-                mdelay(5);
-                writel(SUN6I_WATCHDOG1_MODE_ENABLE,
-                        wdt_base + SUN6I_WATCHDOG1_MODE_REG);
-        }
-}
-
-static struct of_device_id sunxi_restart_ids[] = {
-        { .compatible = "allwinner,sun4i-a10-wdt" },
-        { .compatible = "allwinner,sun6i-a31-wdt" },
-        { /*sentinel*/ }
-};
-
-static void sunxi_setup_restart(void)
-{
-        struct device_node *np;
-
-        np = of_find_matching_node(NULL, sunxi_restart_ids);
-        if (WARN(!np, "unable to setup watchdog restart"))
-                return;
-
-        wdt_base = of_iomap(np, 0);
-        WARN(!wdt_base, "failed to map watchdog base address");
-}
-
-static void __init sunxi_dt_init(void)
-{
-        sunxi_setup_restart();
-
-        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
 
 static const char * const sunxi_board_dt_compat[] = {
         "allwinner,sun4i-a10",
@@ -126,9 +23,7 @@ static const char * const sunxi_board_dt_compat[] = {
 };
 
 DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
-        .init_machine   = sunxi_dt_init,
         .dt_compat      = sunxi_board_dt_compat,
-        .restart        = sun4i_restart,
 MACHINE_END
 
 static const char * const sun6i_board_dt_compat[] = {
@@ -145,11 +40,8 @@ static void __init sun6i_timer_init(void)
 }
 
 DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")
-        .init_machine   = sunxi_dt_init,
         .init_time      = sun6i_timer_init,
         .dt_compat      = sun6i_board_dt_compat,
-        .restart        = sun6i_restart,
-        .smp            = smp_ops(sun6i_smp_ops),
 MACHINE_END
 
 static const char * const sun7i_board_dt_compat[] = {
@@ -158,7 +50,5 @@ static const char * const sun7i_board_dt_compat[] = {
 };
 
 DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
-        .init_machine   = sunxi_dt_init,
         .dt_compat      = sun7i_board_dt_compat,
-        .restart        = sun4i_restart,
 MACHINE_END