diff options
-rw-r--r-- | drivers/clocksource/Kconfig | 4 | ||||
-rw-r--r-- | drivers/clocksource/Makefile | 1 | ||||
-rw-r--r-- | drivers/clocksource/em_sti.c | 2 | ||||
-rw-r--r-- | drivers/clocksource/exynos_mct.c | 12 | ||||
-rw-r--r-- | drivers/clocksource/h8300_timer16.c | 1 | ||||
-rw-r--r-- | drivers/clocksource/h8300_timer8.c | 1 | ||||
-rw-r--r-- | drivers/clocksource/h8300_tpu.c | 1 | ||||
-rw-r--r-- | drivers/clocksource/mtk_timer.c | 26 | ||||
-rw-r--r-- | drivers/clocksource/sh_cmt.c | 1 | ||||
-rw-r--r-- | drivers/clocksource/tango_xtal.c | 66 | ||||
-rw-r--r-- | drivers/clocksource/time-armada-370-xp.c | 14 | ||||
-rw-r--r-- | drivers/clocksource/timer-imx-gpt.c | 3 |
12 files changed, 111 insertions, 21 deletions
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index a7726db13abb..50b68bc20720 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig | |||
@@ -279,6 +279,10 @@ config CLKSRC_MIPS_GIC | |||
279 | depends on MIPS_GIC | 279 | depends on MIPS_GIC |
280 | select CLKSRC_OF | 280 | select CLKSRC_OF |
281 | 281 | ||
282 | config CLKSRC_TANGO_XTAL | ||
283 | bool | ||
284 | select CLKSRC_OF | ||
285 | |||
282 | config CLKSRC_PXA | 286 | config CLKSRC_PXA |
283 | def_bool y if ARCH_PXA || ARCH_SA1100 | 287 | def_bool y if ARCH_PXA || ARCH_SA1100 |
284 | select CLKSRC_OF if OF | 288 | select CLKSRC_OF if OF |
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 5c00863c3e33..fc9348dc4f92 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile | |||
@@ -56,6 +56,7 @@ obj-$(CONFIG_ARCH_KEYSTONE) += timer-keystone.o | |||
56 | obj-$(CONFIG_ARCH_INTEGRATOR_AP) += timer-integrator-ap.o | 56 | obj-$(CONFIG_ARCH_INTEGRATOR_AP) += timer-integrator-ap.o |
57 | obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o | 57 | obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o |
58 | obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o | 58 | obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o |
59 | obj-$(CONFIG_CLKSRC_TANGO_XTAL) += tango_xtal.o | ||
59 | obj-$(CONFIG_CLKSRC_IMX_GPT) += timer-imx-gpt.o | 60 | obj-$(CONFIG_CLKSRC_IMX_GPT) += timer-imx-gpt.o |
60 | obj-$(CONFIG_ASM9260_TIMER) += asm9260_timer.o | 61 | obj-$(CONFIG_ASM9260_TIMER) += asm9260_timer.o |
61 | obj-$(CONFIG_H8300) += h8300_timer8.o | 62 | obj-$(CONFIG_H8300) += h8300_timer8.o |
diff --git a/drivers/clocksource/em_sti.c b/drivers/clocksource/em_sti.c index 7a97a34dba70..19bb1792d647 100644 --- a/drivers/clocksource/em_sti.c +++ b/drivers/clocksource/em_sti.c | |||
@@ -228,7 +228,6 @@ static int em_sti_register_clocksource(struct em_sti_priv *p) | |||
228 | { | 228 | { |
229 | struct clocksource *cs = &p->cs; | 229 | struct clocksource *cs = &p->cs; |
230 | 230 | ||
231 | memset(cs, 0, sizeof(*cs)); | ||
232 | cs->name = dev_name(&p->pdev->dev); | 231 | cs->name = dev_name(&p->pdev->dev); |
233 | cs->rating = 200; | 232 | cs->rating = 200; |
234 | cs->read = em_sti_clocksource_read; | 233 | cs->read = em_sti_clocksource_read; |
@@ -285,7 +284,6 @@ static void em_sti_register_clockevent(struct em_sti_priv *p) | |||
285 | { | 284 | { |
286 | struct clock_event_device *ced = &p->ced; | 285 | struct clock_event_device *ced = &p->ced; |
287 | 286 | ||
288 | memset(ced, 0, sizeof(*ced)); | ||
289 | ced->name = dev_name(&p->pdev->dev); | 287 | ced->name = dev_name(&p->pdev->dev); |
290 | ced->features = CLOCK_EVT_FEAT_ONESHOT; | 288 | ced->features = CLOCK_EVT_FEAT_ONESHOT; |
291 | ced->rating = 200; | 289 | ced->rating = 200; |
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 029f96ab131a..ff44082a0827 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c | |||
@@ -382,24 +382,28 @@ static void exynos4_mct_tick_start(unsigned long cycles, | |||
382 | static int exynos4_tick_set_next_event(unsigned long cycles, | 382 | static int exynos4_tick_set_next_event(unsigned long cycles, |
383 | struct clock_event_device *evt) | 383 | struct clock_event_device *evt) |
384 | { | 384 | { |
385 | struct mct_clock_event_device *mevt = this_cpu_ptr(&percpu_mct_tick); | 385 | struct mct_clock_event_device *mevt; |
386 | 386 | ||
387 | mevt = container_of(evt, struct mct_clock_event_device, evt); | ||
387 | exynos4_mct_tick_start(cycles, mevt); | 388 | exynos4_mct_tick_start(cycles, mevt); |
388 | |||
389 | return 0; | 389 | return 0; |
390 | } | 390 | } |
391 | 391 | ||
392 | static int set_state_shutdown(struct clock_event_device *evt) | 392 | static int set_state_shutdown(struct clock_event_device *evt) |
393 | { | 393 | { |
394 | exynos4_mct_tick_stop(this_cpu_ptr(&percpu_mct_tick)); | 394 | struct mct_clock_event_device *mevt; |
395 | |||
396 | mevt = container_of(evt, struct mct_clock_event_device, evt); | ||
397 | exynos4_mct_tick_stop(mevt); | ||
395 | return 0; | 398 | return 0; |
396 | } | 399 | } |
397 | 400 | ||
398 | static int set_state_periodic(struct clock_event_device *evt) | 401 | static int set_state_periodic(struct clock_event_device *evt) |
399 | { | 402 | { |
400 | struct mct_clock_event_device *mevt = this_cpu_ptr(&percpu_mct_tick); | 403 | struct mct_clock_event_device *mevt; |
401 | unsigned long cycles_per_jiffy; | 404 | unsigned long cycles_per_jiffy; |
402 | 405 | ||
406 | mevt = container_of(evt, struct mct_clock_event_device, evt); | ||
403 | cycles_per_jiffy = (((unsigned long long)NSEC_PER_SEC / HZ * evt->mult) | 407 | cycles_per_jiffy = (((unsigned long long)NSEC_PER_SEC / HZ * evt->mult) |
404 | >> evt->shift); | 408 | >> evt->shift); |
405 | exynos4_mct_tick_stop(mevt); | 409 | exynos4_mct_tick_stop(mevt); |
diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c index 82941c1e9e33..0e076c6fc006 100644 --- a/drivers/clocksource/h8300_timer16.c +++ b/drivers/clocksource/h8300_timer16.c | |||
@@ -153,7 +153,6 @@ static int timer16_setup(struct timer16_priv *p, struct platform_device *pdev) | |||
153 | int ret, irq; | 153 | int ret, irq; |
154 | unsigned int ch; | 154 | unsigned int ch; |
155 | 155 | ||
156 | memset(p, 0, sizeof(*p)); | ||
157 | p->pdev = pdev; | 156 | p->pdev = pdev; |
158 | 157 | ||
159 | res[REG_CH] = platform_get_resource(p->pdev, | 158 | res[REG_CH] = platform_get_resource(p->pdev, |
diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c index f9b3b7033a97..44375d8b9bc4 100644 --- a/drivers/clocksource/h8300_timer8.c +++ b/drivers/clocksource/h8300_timer8.c | |||
@@ -215,7 +215,6 @@ static int timer8_setup(struct timer8_priv *p, | |||
215 | int irq; | 215 | int irq; |
216 | int ret; | 216 | int ret; |
217 | 217 | ||
218 | memset(p, 0, sizeof(*p)); | ||
219 | p->pdev = pdev; | 218 | p->pdev = pdev; |
220 | 219 | ||
221 | res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0); | 220 | res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0); |
diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c index 64195fdd78bf..5487410bfabb 100644 --- a/drivers/clocksource/h8300_tpu.c +++ b/drivers/clocksource/h8300_tpu.c | |||
@@ -123,7 +123,6 @@ static int __init tpu_setup(struct tpu_priv *p, struct platform_device *pdev) | |||
123 | { | 123 | { |
124 | struct resource *res[2]; | 124 | struct resource *res[2]; |
125 | 125 | ||
126 | memset(p, 0, sizeof(*p)); | ||
127 | p->pdev = pdev; | 126 | p->pdev = pdev; |
128 | 127 | ||
129 | res[CH_L] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_L); | 128 | res[CH_L] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_L); |
diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c index 50f0641c65b6..fbfc74685e6a 100644 --- a/drivers/clocksource/mtk_timer.c +++ b/drivers/clocksource/mtk_timer.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/of.h> | 24 | #include <linux/of.h> |
25 | #include <linux/of_address.h> | 25 | #include <linux/of_address.h> |
26 | #include <linux/of_irq.h> | 26 | #include <linux/of_irq.h> |
27 | #include <linux/sched_clock.h> | ||
27 | #include <linux/slab.h> | 28 | #include <linux/slab.h> |
28 | 29 | ||
29 | #define GPT_IRQ_EN_REG 0x00 | 30 | #define GPT_IRQ_EN_REG 0x00 |
@@ -59,6 +60,13 @@ struct mtk_clock_event_device { | |||
59 | struct clock_event_device dev; | 60 | struct clock_event_device dev; |
60 | }; | 61 | }; |
61 | 62 | ||
63 | static void __iomem *gpt_sched_reg __read_mostly; | ||
64 | |||
65 | static u64 notrace mtk_read_sched_clock(void) | ||
66 | { | ||
67 | return readl_relaxed(gpt_sched_reg); | ||
68 | } | ||
69 | |||
62 | static inline struct mtk_clock_event_device *to_mtk_clk( | 70 | static inline struct mtk_clock_event_device *to_mtk_clk( |
63 | struct clock_event_device *c) | 71 | struct clock_event_device *c) |
64 | { | 72 | { |
@@ -141,14 +149,6 @@ static irqreturn_t mtk_timer_interrupt(int irq, void *dev_id) | |||
141 | return IRQ_HANDLED; | 149 | return IRQ_HANDLED; |
142 | } | 150 | } |
143 | 151 | ||
144 | static void mtk_timer_global_reset(struct mtk_clock_event_device *evt) | ||
145 | { | ||
146 | /* Disable all interrupts */ | ||
147 | writel(0x0, evt->gpt_base + GPT_IRQ_EN_REG); | ||
148 | /* Acknowledge all interrupts */ | ||
149 | writel(0x3f, evt->gpt_base + GPT_IRQ_ACK_REG); | ||
150 | } | ||
151 | |||
152 | static void | 152 | static void |
153 | mtk_timer_setup(struct mtk_clock_event_device *evt, u8 timer, u8 option) | 153 | mtk_timer_setup(struct mtk_clock_event_device *evt, u8 timer, u8 option) |
154 | { | 154 | { |
@@ -168,6 +168,12 @@ static void mtk_timer_enable_irq(struct mtk_clock_event_device *evt, u8 timer) | |||
168 | { | 168 | { |
169 | u32 val; | 169 | u32 val; |
170 | 170 | ||
171 | /* Disable all interrupts */ | ||
172 | writel(0x0, evt->gpt_base + GPT_IRQ_EN_REG); | ||
173 | |||
174 | /* Acknowledge all spurious pending interrupts */ | ||
175 | writel(0x3f, evt->gpt_base + GPT_IRQ_ACK_REG); | ||
176 | |||
171 | val = readl(evt->gpt_base + GPT_IRQ_EN_REG); | 177 | val = readl(evt->gpt_base + GPT_IRQ_EN_REG); |
172 | writel(val | GPT_IRQ_ENABLE(timer), | 178 | writel(val | GPT_IRQ_ENABLE(timer), |
173 | evt->gpt_base + GPT_IRQ_EN_REG); | 179 | evt->gpt_base + GPT_IRQ_EN_REG); |
@@ -220,8 +226,6 @@ static void __init mtk_timer_init(struct device_node *node) | |||
220 | } | 226 | } |
221 | rate = clk_get_rate(clk); | 227 | rate = clk_get_rate(clk); |
222 | 228 | ||
223 | mtk_timer_global_reset(evt); | ||
224 | |||
225 | if (request_irq(evt->dev.irq, mtk_timer_interrupt, | 229 | if (request_irq(evt->dev.irq, mtk_timer_interrupt, |
226 | IRQF_TIMER | IRQF_IRQPOLL, "mtk_timer", evt)) { | 230 | IRQF_TIMER | IRQF_IRQPOLL, "mtk_timer", evt)) { |
227 | pr_warn("failed to setup irq %d\n", evt->dev.irq); | 231 | pr_warn("failed to setup irq %d\n", evt->dev.irq); |
@@ -234,6 +238,8 @@ static void __init mtk_timer_init(struct device_node *node) | |||
234 | mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN); | 238 | mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN); |
235 | clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC), | 239 | clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC), |
236 | node->name, rate, 300, 32, clocksource_mmio_readl_up); | 240 | node->name, rate, 300, 32, clocksource_mmio_readl_up); |
241 | gpt_sched_reg = evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC); | ||
242 | sched_clock_register(mtk_read_sched_clock, 32, rate); | ||
237 | 243 | ||
238 | /* Configure clock event */ | 244 | /* Configure clock event */ |
239 | mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT); | 245 | mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT); |
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index ba73a6eb8d66..103c49362c68 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c | |||
@@ -962,7 +962,6 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev) | |||
962 | unsigned int i; | 962 | unsigned int i; |
963 | int ret; | 963 | int ret; |
964 | 964 | ||
965 | memset(cmt, 0, sizeof(*cmt)); | ||
966 | cmt->pdev = pdev; | 965 | cmt->pdev = pdev; |
967 | raw_spin_lock_init(&cmt->lock); | 966 | raw_spin_lock_init(&cmt->lock); |
968 | 967 | ||
diff --git a/drivers/clocksource/tango_xtal.c b/drivers/clocksource/tango_xtal.c new file mode 100644 index 000000000000..d297b30d2bc0 --- /dev/null +++ b/drivers/clocksource/tango_xtal.c | |||
@@ -0,0 +1,66 @@ | |||
1 | #include <linux/clocksource.h> | ||
2 | #include <linux/sched_clock.h> | ||
3 | #include <linux/of_address.h> | ||
4 | #include <linux/printk.h> | ||
5 | #include <linux/delay.h> | ||
6 | #include <linux/init.h> | ||
7 | #include <linux/clk.h> | ||
8 | |||
9 | static void __iomem *xtal_in_cnt; | ||
10 | static struct delay_timer delay_timer; | ||
11 | |||
12 | static unsigned long notrace read_xtal_counter(void) | ||
13 | { | ||
14 | return readl_relaxed(xtal_in_cnt); | ||
15 | } | ||
16 | |||
17 | static u64 notrace read_sched_clock(void) | ||
18 | { | ||
19 | return read_xtal_counter(); | ||
20 | } | ||
21 | |||
22 | static cycle_t read_clocksource(struct clocksource *cs) | ||
23 | { | ||
24 | return read_xtal_counter(); | ||
25 | } | ||
26 | |||
27 | static struct clocksource tango_xtal = { | ||
28 | .name = "tango-xtal", | ||
29 | .rating = 350, | ||
30 | .read = read_clocksource, | ||
31 | .mask = CLOCKSOURCE_MASK(32), | ||
32 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
33 | }; | ||
34 | |||
35 | static void __init tango_clocksource_init(struct device_node *np) | ||
36 | { | ||
37 | struct clk *clk; | ||
38 | int xtal_freq, ret; | ||
39 | |||
40 | xtal_in_cnt = of_iomap(np, 0); | ||
41 | if (xtal_in_cnt == NULL) { | ||
42 | pr_err("%s: invalid address\n", np->full_name); | ||
43 | return; | ||
44 | } | ||
45 | |||
46 | clk = of_clk_get(np, 0); | ||
47 | if (IS_ERR(clk)) { | ||
48 | pr_err("%s: invalid clock\n", np->full_name); | ||
49 | return; | ||
50 | } | ||
51 | |||
52 | xtal_freq = clk_get_rate(clk); | ||
53 | delay_timer.freq = xtal_freq; | ||
54 | delay_timer.read_current_timer = read_xtal_counter; | ||
55 | |||
56 | ret = clocksource_register_hz(&tango_xtal, xtal_freq); | ||
57 | if (ret != 0) { | ||
58 | pr_err("%s: registration failed\n", np->full_name); | ||
59 | return; | ||
60 | } | ||
61 | |||
62 | sched_clock_register(read_sched_clock, 32, xtal_freq); | ||
63 | register_current_timer_delay(&delay_timer); | ||
64 | } | ||
65 | |||
66 | CLOCKSOURCE_OF_DECLARE(tango, "sigma,tick-counter", tango_clocksource_init); | ||
diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c index 2162796fd504..d93ec3c4f139 100644 --- a/drivers/clocksource/time-armada-370-xp.c +++ b/drivers/clocksource/time-armada-370-xp.c | |||
@@ -45,6 +45,8 @@ | |||
45 | #include <linux/percpu.h> | 45 | #include <linux/percpu.h> |
46 | #include <linux/syscore_ops.h> | 46 | #include <linux/syscore_ops.h> |
47 | 47 | ||
48 | #include <asm/delay.h> | ||
49 | |||
48 | /* | 50 | /* |
49 | * Timer block registers. | 51 | * Timer block registers. |
50 | */ | 52 | */ |
@@ -249,6 +251,15 @@ struct syscore_ops armada_370_xp_timer_syscore_ops = { | |||
249 | .resume = armada_370_xp_timer_resume, | 251 | .resume = armada_370_xp_timer_resume, |
250 | }; | 252 | }; |
251 | 253 | ||
254 | static unsigned long armada_370_delay_timer_read(void) | ||
255 | { | ||
256 | return ~readl(timer_base + TIMER0_VAL_OFF); | ||
257 | } | ||
258 | |||
259 | static struct delay_timer armada_370_delay_timer = { | ||
260 | .read_current_timer = armada_370_delay_timer_read, | ||
261 | }; | ||
262 | |||
252 | static void __init armada_370_xp_timer_common_init(struct device_node *np) | 263 | static void __init armada_370_xp_timer_common_init(struct device_node *np) |
253 | { | 264 | { |
254 | u32 clr = 0, set = 0; | 265 | u32 clr = 0, set = 0; |
@@ -287,6 +298,9 @@ static void __init armada_370_xp_timer_common_init(struct device_node *np) | |||
287 | TIMER0_RELOAD_EN | enable_mask, | 298 | TIMER0_RELOAD_EN | enable_mask, |
288 | TIMER0_RELOAD_EN | enable_mask); | 299 | TIMER0_RELOAD_EN | enable_mask); |
289 | 300 | ||
301 | armada_370_delay_timer.freq = timer_clk; | ||
302 | register_current_timer_delay(&armada_370_delay_timer); | ||
303 | |||
290 | /* | 304 | /* |
291 | * Set scale and timer for sched_clock. | 305 | * Set scale and timer for sched_clock. |
292 | */ | 306 | */ |
diff --git a/drivers/clocksource/timer-imx-gpt.c b/drivers/clocksource/timer-imx-gpt.c index 839aba92fc39..99ec96769dda 100644 --- a/drivers/clocksource/timer-imx-gpt.c +++ b/drivers/clocksource/timer-imx-gpt.c | |||
@@ -305,13 +305,14 @@ static int __init mxc_clockevent_init(struct imx_timer *imxtm) | |||
305 | struct irqaction *act = &imxtm->act; | 305 | struct irqaction *act = &imxtm->act; |
306 | 306 | ||
307 | ced->name = "mxc_timer1"; | 307 | ced->name = "mxc_timer1"; |
308 | ced->features = CLOCK_EVT_FEAT_ONESHOT; | 308 | ced->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_DYNIRQ; |
309 | ced->set_state_shutdown = mxc_shutdown; | 309 | ced->set_state_shutdown = mxc_shutdown; |
310 | ced->set_state_oneshot = mxc_set_oneshot; | 310 | ced->set_state_oneshot = mxc_set_oneshot; |
311 | ced->tick_resume = mxc_shutdown; | 311 | ced->tick_resume = mxc_shutdown; |
312 | ced->set_next_event = imxtm->gpt->set_next_event; | 312 | ced->set_next_event = imxtm->gpt->set_next_event; |
313 | ced->rating = 200; | 313 | ced->rating = 200; |
314 | ced->cpumask = cpumask_of(0); | 314 | ced->cpumask = cpumask_of(0); |
315 | ced->irq = imxtm->irq; | ||
315 | clockevents_config_and_register(ced, clk_get_rate(imxtm->clk_per), | 316 | clockevents_config_and_register(ced, clk_get_rate(imxtm->clk_per), |
316 | 0xff, 0xfffffffe); | 317 | 0xff, 0xfffffffe); |
317 | 318 | ||