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-rw-r--r--arch/arm64/boot/dts/bitmain/bm1880.dtsi54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
index 55a4769e0de2..e4da4ec6a5ee 100644
--- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi
+++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
@@ -80,6 +80,60 @@
80 #interrupt-cells = <3>; 80 #interrupt-cells = <3>;
81 }; 81 };
82 82
83 gpio0: gpio@50027000 {
84 #address-cells = <1>;
85 #size-cells = <0>;
86 compatible = "snps,dw-apb-gpio";
87 reg = <0x0 0x50027000 0x0 0x400>;
88
89 porta: gpio-controller@0 {
90 compatible = "snps,dw-apb-gpio-port";
91 gpio-controller;
92 #gpio-cells = <2>;
93 snps,nr-gpios = <32>;
94 reg = <0>;
95 interrupt-controller;
96 #interrupt-cells = <2>;
97 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
98 };
99 };
100
101 gpio1: gpio@50027400 {
102 #address-cells = <1>;
103 #size-cells = <0>;
104 compatible = "snps,dw-apb-gpio";
105 reg = <0x0 0x50027400 0x0 0x400>;
106
107 portb: gpio-controller@0 {
108 compatible = "snps,dw-apb-gpio-port";
109 gpio-controller;
110 #gpio-cells = <2>;
111 snps,nr-gpios = <32>;
112 reg = <0>;
113 interrupt-controller;
114 #interrupt-cells = <2>;
115 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
116 };
117 };
118
119 gpio2: gpio@50027800 {
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "snps,dw-apb-gpio";
123 reg = <0x0 0x50027800 0x0 0x400>;
124
125 portc: gpio-controller@0 {
126 compatible = "snps,dw-apb-gpio-port";
127 gpio-controller;
128 #gpio-cells = <2>;
129 snps,nr-gpios = <8>;
130 reg = <0>;
131 interrupt-controller;
132 #interrupt-cells = <2>;
133 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
134 };
135 };
136
83 uart0: serial@58018000 { 137 uart0: serial@58018000 {
84 compatible = "snps,dw-apb-uart"; 138 compatible = "snps,dw-apb-uart";
85 reg = <0x0 0x58018000 0x0 0x2000>; 139 reg = <0x0 0x58018000 0x0 0x2000>;