3 files changed, 14 insertions, 10 deletions

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index a4e9f35da3a2..74f99bac08b1 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1638,8 +1638,8 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
         WREG32(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset,
                (viewport_w << 16) | viewport_h);
 
-        /* set pageflip to happen anywhere in vblank interval */
-        WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0);
+        /* set pageflip to happen only at start of vblank interval (front porch) */
+        WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 3);
 
         if (!atomic && fb && fb != crtc->primary->fb) {
                 radeon_fb = to_radeon_framebuffer(fb);
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 50706464d456..b8ab30a7dd6d 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -452,16 +452,19 @@ static void radeon_flip_work_func(struct work_struct *__work)
         }
 
         /* Wait until we're out of the vertical blank period before the one
-         * targeted by the flip
+         * targeted by the flip. Always wait on pre DCE4 to avoid races with
+         * flip completion handling from vblank irq, as these old asics don't
+         * have reliable pageflip completion interrupts.
          */
         while (radeon_crtc->enabled &&
-               (radeon_get_crtc_scanoutpos(dev, work->crtc_id, 0,
-                                           &vpos, &hpos, NULL, NULL,
-                                           &crtc->hwmode)
+                (radeon_get_crtc_scanoutpos(dev, work->crtc_id, 0,
+                                            &vpos, &hpos, NULL, NULL,
+                                            &crtc->hwmode)
                 & (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK)) ==
-               (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK) &&
-               (int)(work->target_vblank -
-                     dev->driver->get_vblank_counter(dev, work->crtc_id)) > 0)
+                (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK) &&
+                (!ASIC_IS_AVIVO(rdev) ||
+                ((int) (work->target_vblank -
+                dev->driver->get_vblank_counter(dev, work->crtc_id)) > 0)))
                 usleep_range(1000, 2000);
 
         /* We borrow the event spin lock for protecting flip_status */
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 76c55c5d11ec..c55d653aaf5f 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -406,8 +406,9 @@ void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save)
         for (i = 0; i < rdev->num_crtc; i++) {
                 if (save->crtc_enabled[i]) {
                         tmp = RREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i]);
-                        if ((tmp & 0x7) != 0) {
+                        if ((tmp & 0x7) != 3) {
                                 tmp &= ~0x7;
+                                tmp |= 0x3;
                                 WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i], tmp);
                         }
                         tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]);