3 files changed, 49 insertions, 32 deletions

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 35b979956d6d..5cae63aa3905 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -421,28 +421,20 @@ static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port por
 
 /*
  * Starting with Haswell, DDI port buffers must be programmed with correct
- * values in advance. The buffer values are different for FDI and DP modes,
- * but the HDMI/DVI fields are shared among those. So we program the DDI
- * in either FDI or DP modes only, as HDMI connections will work with both
- * of those
+ * values in advance. This function programs the correct values for
+ * DP/eDP/FDI use cases.
  */
-void intel_prepare_ddi_buffer(struct intel_encoder *encoder)
+void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder)
 {
         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
         u32 iboost_bit = 0;
-        int i, n_hdmi_entries, n_dp_entries, n_edp_entries,
-            size;
-        int hdmi_level;
-        enum port port;
+        int i, n_dp_entries, n_edp_entries, size;
+        enum port port = intel_ddi_get_encoder_port(encoder);
         const struct ddi_buf_trans *ddi_translations_fdi;
         const struct ddi_buf_trans *ddi_translations_dp;
         const struct ddi_buf_trans *ddi_translations_edp;
-        const struct ddi_buf_trans *ddi_translations_hdmi;
         const struct ddi_buf_trans *ddi_translations;
 
-        port = intel_ddi_get_encoder_port(encoder);
-        hdmi_level = intel_ddi_hdmi_level(dev_priv, port);
-
         if (IS_BROXTON(dev_priv))
                 return;
 
@@ -452,8 +444,7 @@ void intel_prepare_ddi_buffer(struct intel_encoder *encoder)
                                 skl_get_buf_trans_dp(dev_priv, &n_dp_entries);
                 ddi_translations_edp =
                                 skl_get_buf_trans_edp(dev_priv, &n_edp_entries);
-                ddi_translations_hdmi =
-                                skl_get_buf_trans_hdmi(dev_priv, &n_hdmi_entries);
+
                 /* If we're boosting the current, set bit 31 of trans1 */
                 if (dev_priv->vbt.ddi_port_info[port].hdmi_boost_level ||
                     dev_priv->vbt.ddi_port_info[port].dp_boost_level)
@@ -466,7 +457,6 @@ void intel_prepare_ddi_buffer(struct intel_encoder *encoder)
         } else if (IS_BROADWELL(dev_priv)) {
                 ddi_translations_fdi = bdw_ddi_translations_fdi;
                 ddi_translations_dp = bdw_ddi_translations_dp;
-
                 if (dev_priv->vbt.edp.low_vswing) {
                         ddi_translations_edp = bdw_ddi_translations_edp;
                         n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_edp);
@@ -474,27 +464,19 @@ void intel_prepare_ddi_buffer(struct intel_encoder *encoder)
                         ddi_translations_edp = bdw_ddi_translations_dp;
                         n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_dp);
                 }
-
-                ddi_translations_hdmi = bdw_ddi_translations_hdmi;
-
                 n_dp_entries = ARRAY_SIZE(bdw_ddi_translations_dp);
-                n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
         } else if (IS_HASWELL(dev_priv)) {
                 ddi_translations_fdi = hsw_ddi_translations_fdi;
                 ddi_translations_dp = hsw_ddi_translations_dp;
                 ddi_translations_edp = hsw_ddi_translations_dp;
-                ddi_translations_hdmi = hsw_ddi_translations_hdmi;
                 n_dp_entries = n_edp_entries = ARRAY_SIZE(hsw_ddi_translations_dp);
-                n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
         } else {
                 WARN(1, "ddi translation table missing\n");
                 ddi_translations_edp = bdw_ddi_translations_dp;
                 ddi_translations_fdi = bdw_ddi_translations_fdi;
                 ddi_translations_dp = bdw_ddi_translations_dp;
-                ddi_translations_hdmi = bdw_ddi_translations_hdmi;
                 n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_edp);
                 n_dp_entries = ARRAY_SIZE(bdw_ddi_translations_dp);
-                n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
         }
 
         switch (encoder->type) {
@@ -503,7 +485,6 @@ void intel_prepare_ddi_buffer(struct intel_encoder *encoder)
                 size = n_edp_entries;
                 break;
         case INTEL_OUTPUT_DP:
-        case INTEL_OUTPUT_HDMI:
                 ddi_translations = ddi_translations_dp;
                 size = n_dp_entries;
                 break;
@@ -521,10 +502,44 @@ void intel_prepare_ddi_buffer(struct intel_encoder *encoder)
                 I915_WRITE(DDI_BUF_TRANS_HI(port, i),
                            ddi_translations[i].trans2);
         }
+}
+
+/*
+ * Starting with Haswell, DDI port buffers must be programmed with correct
+ * values in advance. This function programs the correct values for
+ * HDMI/DVI use cases.
+ */
+static void intel_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder)
+{
+        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+        u32 iboost_bit = 0;
+        int n_hdmi_entries, hdmi_level;
+        enum port port = intel_ddi_get_encoder_port(encoder);
+        const struct ddi_buf_trans *ddi_translations_hdmi;
 
-        if (encoder->type != INTEL_OUTPUT_HDMI)
+        if (IS_BROXTON(dev_priv))
                 return;
 
+        hdmi_level = intel_ddi_hdmi_level(dev_priv, port);
+
+        if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
+                ddi_translations_hdmi = skl_get_buf_trans_hdmi(dev_priv, &n_hdmi_entries);
+                /* If we're boosting the current, set bit 31 of trans1 */
+                if (dev_priv->vbt.ddi_port_info[port].hdmi_boost_level ||
+                    dev_priv->vbt.ddi_port_info[port].dp_boost_level)
+                        iboost_bit = DDI_BUF_BALANCE_LEG_ENABLE;
+        } else if (IS_BROADWELL(dev_priv)) {
+                ddi_translations_hdmi = bdw_ddi_translations_hdmi;
+                n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
+        } else if (IS_HASWELL(dev_priv)) {
+                ddi_translations_hdmi = hsw_ddi_translations_hdmi;
+                n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
+        } else {
+                WARN(1, "ddi translation table missing\n");
+                ddi_translations_hdmi = bdw_ddi_translations_hdmi;
+                n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
+        }
+
         /* Entry 9 is for HDMI: */
         I915_WRITE(DDI_BUF_TRANS_LO(port, 9),
                    ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit);
@@ -565,7 +580,7 @@ void hsw_fdi_link_train(struct drm_crtc *crtc)
 
         for_each_encoder_on_crtc(dev, crtc, encoder) {
                 WARN_ON(encoder->type != INTEL_OUTPUT_ANALOG);
-                intel_prepare_ddi_buffer(encoder);
+                intel_prepare_dp_ddi_buffers(encoder);
         }
 
         /* Set the FDI_RX_MISC pwrdn lanes and the 2 workarounds listed at the
@@ -1640,8 +1655,6 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
                 intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);
         }
 
-        intel_prepare_ddi_buffer(intel_encoder);
-
         if (type == INTEL_OUTPUT_EDP) {
                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
                 intel_edp_panel_on(intel_dp);
@@ -1652,6 +1665,8 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
         if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {
                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
+                intel_prepare_dp_ddi_buffers(intel_encoder);
+
                 intel_dp_set_link_params(intel_dp, crtc->config);
 
                 intel_ddi_init_dp_buf_reg(intel_encoder);
@@ -1664,6 +1679,8 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
                 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
                 int level = intel_ddi_hdmi_level(dev_priv, port);
 
+                intel_prepare_hdmi_ddi_buffers(intel_encoder);
+
                 if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
                         skl_ddi_set_iboost(intel_encoder, level);
                 else if (IS_BROXTON(dev_priv))
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index 68a005d729e9..629337dbca3d 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -170,10 +170,10 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
         intel_mst->connector = found;
 
         if (intel_dp->active_mst_links == 0) {
-                intel_prepare_ddi_buffer(&intel_dig_port->base);
-
                 intel_ddi_clk_select(&intel_dig_port->base, intel_crtc->config);
 
+                intel_prepare_dp_ddi_buffers(&intel_dig_port->base);
+
                 intel_dp_set_link_params(intel_dp, intel_crtc->config);
 
                 intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e74d851868c5..50cdc890d956 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1107,7 +1107,7 @@ void intel_crt_reset(struct drm_encoder *encoder);
 /* intel_ddi.c */
 void intel_ddi_clk_select(struct intel_encoder *encoder,
                           const struct intel_crtc_state *pipe_config);
-void intel_prepare_ddi_buffer(struct intel_encoder *encoder);
+void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder);
 void hsw_fdi_link_train(struct drm_crtc *crtc);
 void intel_ddi_init(struct drm_device *dev, enum port port);
 enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder);