diff options
| -rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sunxi.h | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index a13bd57d880d..466840d886f6 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h | |||
| @@ -263,14 +263,19 @@ static inline u32 sunxi_pull_offset(u16 pin) | |||
| 263 | return pin_num * PULL_PINS_BITS; | 263 | return pin_num * PULL_PINS_BITS; |
| 264 | } | 264 | } |
| 265 | 265 | ||
| 266 | static inline u32 sunxi_irq_hw_bank_num(const struct sunxi_pinctrl_desc *desc, u8 bank) | ||
| 267 | { | ||
| 268 | return desc->irq_bank_base + bank; | ||
| 269 | } | ||
| 270 | |||
| 266 | static inline u32 sunxi_irq_cfg_reg(const struct sunxi_pinctrl_desc *desc, | 271 | static inline u32 sunxi_irq_cfg_reg(const struct sunxi_pinctrl_desc *desc, |
| 267 | u16 irq) | 272 | u16 irq) |
| 268 | { | 273 | { |
| 269 | unsigned bank_base = desc->irq_bank_base; | ||
| 270 | u8 bank = irq / IRQ_PER_BANK; | 274 | u8 bank = irq / IRQ_PER_BANK; |
| 271 | u8 reg = (irq % IRQ_PER_BANK) / IRQ_CFG_IRQ_PER_REG * 0x04; | 275 | u8 reg = (irq % IRQ_PER_BANK) / IRQ_CFG_IRQ_PER_REG * 0x04; |
| 272 | 276 | ||
| 273 | return IRQ_CFG_REG + (bank_base + bank) * IRQ_MEM_SIZE + reg; | 277 | return IRQ_CFG_REG + |
| 278 | sunxi_irq_hw_bank_num(desc, bank) * IRQ_MEM_SIZE + reg; | ||
| 274 | } | 279 | } |
| 275 | 280 | ||
| 276 | static inline u32 sunxi_irq_cfg_offset(u16 irq) | 281 | static inline u32 sunxi_irq_cfg_offset(u16 irq) |
| @@ -281,9 +286,7 @@ static inline u32 sunxi_irq_cfg_offset(u16 irq) | |||
| 281 | 286 | ||
| 282 | static inline u32 sunxi_irq_ctrl_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) | 287 | static inline u32 sunxi_irq_ctrl_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) |
| 283 | { | 288 | { |
| 284 | unsigned bank_base = desc->irq_bank_base; | 289 | return IRQ_CTRL_REG + sunxi_irq_hw_bank_num(desc, bank) * IRQ_MEM_SIZE; |
| 285 | |||
| 286 | return IRQ_CTRL_REG + (bank_base + bank) * IRQ_MEM_SIZE; | ||
| 287 | } | 290 | } |
| 288 | 291 | ||
| 289 | static inline u32 sunxi_irq_ctrl_reg(const struct sunxi_pinctrl_desc *desc, | 292 | static inline u32 sunxi_irq_ctrl_reg(const struct sunxi_pinctrl_desc *desc, |
| @@ -302,16 +305,14 @@ static inline u32 sunxi_irq_ctrl_offset(u16 irq) | |||
| 302 | 305 | ||
| 303 | static inline u32 sunxi_irq_debounce_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) | 306 | static inline u32 sunxi_irq_debounce_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) |
| 304 | { | 307 | { |
| 305 | unsigned bank_base = desc->irq_bank_base; | 308 | return IRQ_DEBOUNCE_REG + |
| 306 | 309 | sunxi_irq_hw_bank_num(desc, bank) * IRQ_MEM_SIZE; | |
| 307 | return IRQ_DEBOUNCE_REG + (bank_base + bank) * IRQ_MEM_SIZE; | ||
| 308 | } | 310 | } |
| 309 | 311 | ||
| 310 | static inline u32 sunxi_irq_status_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) | 312 | static inline u32 sunxi_irq_status_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) |
| 311 | { | 313 | { |
| 312 | unsigned bank_base = desc->irq_bank_base; | 314 | return IRQ_STATUS_REG + |
| 313 | 315 | sunxi_irq_hw_bank_num(desc, bank) * IRQ_MEM_SIZE; | |
| 314 | return IRQ_STATUS_REG + (bank_base + bank) * IRQ_MEM_SIZE; | ||
| 315 | } | 316 | } |
| 316 | 317 | ||
| 317 | static inline u32 sunxi_irq_status_reg(const struct sunxi_pinctrl_desc *desc, | 318 | static inline u32 sunxi_irq_status_reg(const struct sunxi_pinctrl_desc *desc, |
