diff options
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_mic.c | 44 |
1 files changed, 4 insertions, 40 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_mic.c b/drivers/gpu/drm/exynos/exynos_drm_mic.c index 16bbee897e0d..ba4a32b132ba 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_mic.c +++ b/drivers/gpu/drm/exynos/exynos_drm_mic.c | |||
@@ -21,9 +21,12 @@ | |||
21 | #include <linux/component.h> | 21 | #include <linux/component.h> |
22 | #include <linux/pm_runtime.h> | 22 | #include <linux/pm_runtime.h> |
23 | #include <drm/drmP.h> | 23 | #include <drm/drmP.h> |
24 | #include <drm/drm_encoder.h> | ||
24 | #include <linux/mfd/syscon.h> | 25 | #include <linux/mfd/syscon.h> |
25 | #include <linux/regmap.h> | 26 | #include <linux/regmap.h> |
26 | 27 | ||
28 | #include "exynos_drm_drv.h" | ||
29 | |||
27 | /* Sysreg registers for MIC */ | 30 | /* Sysreg registers for MIC */ |
28 | #define DSD_CFG_MUX 0x1004 | 31 | #define DSD_CFG_MUX 0x1004 |
29 | #define MIC0_RGB_MUX (1 << 0) | 32 | #define MIC0_RGB_MUX (1 << 0) |
@@ -85,12 +88,6 @@ | |||
85 | 88 | ||
86 | #define MIC_BS_SIZE_2D(x) ((x) & 0x3fff) | 89 | #define MIC_BS_SIZE_2D(x) ((x) & 0x3fff) |
87 | 90 | ||
88 | enum { | ||
89 | ENDPOINT_DECON_NODE, | ||
90 | ENDPOINT_DSI_NODE, | ||
91 | NUM_ENDPOINTS | ||
92 | }; | ||
93 | |||
94 | static char *clk_names[] = { "pclk_mic0", "sclk_rgb_vclk_to_mic0" }; | 91 | static char *clk_names[] = { "pclk_mic0", "sclk_rgb_vclk_to_mic0" }; |
95 | #define NUM_CLKS ARRAY_SIZE(clk_names) | 92 | #define NUM_CLKS ARRAY_SIZE(clk_names) |
96 | static DEFINE_MUTEX(mic_mutex); | 93 | static DEFINE_MUTEX(mic_mutex); |
@@ -229,36 +226,6 @@ static void mic_set_reg_on(struct exynos_mic *mic, bool enable) | |||
229 | writel(reg, mic->reg + MIC_OP); | 226 | writel(reg, mic->reg + MIC_OP); |
230 | } | 227 | } |
231 | 228 | ||
232 | static int parse_dt(struct exynos_mic *mic) | ||
233 | { | ||
234 | int ret = 0, i, j; | ||
235 | struct device_node *remote_node; | ||
236 | struct device_node *nodes[3]; | ||
237 | |||
238 | /* | ||
239 | * The order of endpoints does matter. | ||
240 | * The first node must be for decon and the second one must be for dsi. | ||
241 | */ | ||
242 | for (i = 0, j = 0; i < NUM_ENDPOINTS; i++) { | ||
243 | remote_node = of_graph_get_remote_node(mic->dev->of_node, i, 0); | ||
244 | if (!remote_node) { | ||
245 | ret = -EPIPE; | ||
246 | goto exit; | ||
247 | } | ||
248 | nodes[j++] = remote_node; | ||
249 | |||
250 | if (i == ENDPOINT_DECON_NODE && | ||
251 | of_get_child_by_name(remote_node, "i80-if-timings")) | ||
252 | mic->i80_mode = 1; | ||
253 | } | ||
254 | |||
255 | exit: | ||
256 | while (--j > -1) | ||
257 | of_node_put(nodes[j]); | ||
258 | |||
259 | return ret; | ||
260 | } | ||
261 | |||
262 | static void mic_disable(struct drm_bridge *bridge) { } | 229 | static void mic_disable(struct drm_bridge *bridge) { } |
263 | 230 | ||
264 | static void mic_post_disable(struct drm_bridge *bridge) | 231 | static void mic_post_disable(struct drm_bridge *bridge) |
@@ -286,6 +253,7 @@ static void mic_mode_set(struct drm_bridge *bridge, | |||
286 | 253 | ||
287 | mutex_lock(&mic_mutex); | 254 | mutex_lock(&mic_mutex); |
288 | drm_display_mode_to_videomode(mode, &mic->vm); | 255 | drm_display_mode_to_videomode(mode, &mic->vm); |
256 | mic->i80_mode = to_exynos_crtc(bridge->encoder->crtc)->i80_mode; | ||
289 | mutex_unlock(&mic_mutex); | 257 | mutex_unlock(&mic_mutex); |
290 | } | 258 | } |
291 | 259 | ||
@@ -417,10 +385,6 @@ static int exynos_mic_probe(struct platform_device *pdev) | |||
417 | 385 | ||
418 | mic->dev = dev; | 386 | mic->dev = dev; |
419 | 387 | ||
420 | ret = parse_dt(mic); | ||
421 | if (ret) | ||
422 | goto err; | ||
423 | |||
424 | ret = of_address_to_resource(dev->of_node, 0, &res); | 388 | ret = of_address_to_resource(dev->of_node, 0, &res); |
425 | if (ret) { | 389 | if (ret) { |
426 | DRM_ERROR("mic: Failed to get mem region for MIC\n"); | 390 | DRM_ERROR("mic: Failed to get mem region for MIC\n"); |