diff options
-rw-r--r-- | drivers/hwtracing/coresight/coresight-tmc-etf.c | 32 | ||||
-rw-r--r-- | drivers/hwtracing/coresight/coresight-tmc-etr.c | 26 | ||||
-rw-r--r-- | drivers/hwtracing/coresight/coresight-tmc.h | 2 |
3 files changed, 26 insertions, 34 deletions
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index d6941ea24d8d..e80a8f4cd12e 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c | |||
@@ -70,7 +70,7 @@ static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) | |||
70 | * When operating in sysFS mode the content of the buffer needs to be | 70 | * When operating in sysFS mode the content of the buffer needs to be |
71 | * read before the TMC is disabled. | 71 | * read before the TMC is disabled. |
72 | */ | 72 | */ |
73 | if (local_read(&drvdata->mode) == CS_MODE_SYSFS) | 73 | if (drvdata->mode == CS_MODE_SYSFS) |
74 | tmc_etb_dump_hw(drvdata); | 74 | tmc_etb_dump_hw(drvdata); |
75 | tmc_disable_hw(drvdata); | 75 | tmc_disable_hw(drvdata); |
76 | 76 | ||
@@ -108,7 +108,6 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev, u32 mode) | |||
108 | int ret = 0; | 108 | int ret = 0; |
109 | bool used = false; | 109 | bool used = false; |
110 | char *buf = NULL; | 110 | char *buf = NULL; |
111 | long val; | ||
112 | unsigned long flags; | 111 | unsigned long flags; |
113 | struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); | 112 | struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); |
114 | 113 | ||
@@ -138,13 +137,12 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev, u32 mode) | |||
138 | goto out; | 137 | goto out; |
139 | } | 138 | } |
140 | 139 | ||
141 | val = local_xchg(&drvdata->mode, mode); | ||
142 | /* | 140 | /* |
143 | * In sysFS mode we can have multiple writers per sink. Since this | 141 | * In sysFS mode we can have multiple writers per sink. Since this |
144 | * sink is already enabled no memory is needed and the HW need not be | 142 | * sink is already enabled no memory is needed and the HW need not be |
145 | * touched. | 143 | * touched. |
146 | */ | 144 | */ |
147 | if (val == CS_MODE_SYSFS) | 145 | if (drvdata->mode == CS_MODE_SYSFS) |
148 | goto out; | 146 | goto out; |
149 | 147 | ||
150 | /* | 148 | /* |
@@ -163,6 +161,7 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev, u32 mode) | |||
163 | drvdata->buf = buf; | 161 | drvdata->buf = buf; |
164 | } | 162 | } |
165 | 163 | ||
164 | drvdata->mode = CS_MODE_SYSFS; | ||
166 | tmc_etb_enable_hw(drvdata); | 165 | tmc_etb_enable_hw(drvdata); |
167 | out: | 166 | out: |
168 | spin_unlock_irqrestore(&drvdata->spinlock, flags); | 167 | spin_unlock_irqrestore(&drvdata->spinlock, flags); |
@@ -180,7 +179,6 @@ out: | |||
180 | static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, u32 mode) | 179 | static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, u32 mode) |
181 | { | 180 | { |
182 | int ret = 0; | 181 | int ret = 0; |
183 | long val; | ||
184 | unsigned long flags; | 182 | unsigned long flags; |
185 | struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); | 183 | struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); |
186 | 184 | ||
@@ -194,17 +192,17 @@ static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, u32 mode) | |||
194 | goto out; | 192 | goto out; |
195 | } | 193 | } |
196 | 194 | ||
197 | val = local_xchg(&drvdata->mode, mode); | ||
198 | /* | 195 | /* |
199 | * In Perf mode there can be only one writer per sink. There | 196 | * In Perf mode there can be only one writer per sink. There |
200 | * is also no need to continue if the ETB/ETR is already operated | 197 | * is also no need to continue if the ETB/ETR is already operated |
201 | * from sysFS. | 198 | * from sysFS. |
202 | */ | 199 | */ |
203 | if (val != CS_MODE_DISABLED) { | 200 | if (drvdata->mode != CS_MODE_DISABLED) { |
204 | ret = -EINVAL; | 201 | ret = -EINVAL; |
205 | goto out; | 202 | goto out; |
206 | } | 203 | } |
207 | 204 | ||
205 | drvdata->mode = mode; | ||
208 | tmc_etb_enable_hw(drvdata); | 206 | tmc_etb_enable_hw(drvdata); |
209 | out: | 207 | out: |
210 | spin_unlock_irqrestore(&drvdata->spinlock, flags); | 208 | spin_unlock_irqrestore(&drvdata->spinlock, flags); |
@@ -227,7 +225,6 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) | |||
227 | 225 | ||
228 | static void tmc_disable_etf_sink(struct coresight_device *csdev) | 226 | static void tmc_disable_etf_sink(struct coresight_device *csdev) |
229 | { | 227 | { |
230 | long val; | ||
231 | unsigned long flags; | 228 | unsigned long flags; |
232 | struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); | 229 | struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); |
233 | 230 | ||
@@ -237,10 +234,11 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev) | |||
237 | return; | 234 | return; |
238 | } | 235 | } |
239 | 236 | ||
240 | val = local_xchg(&drvdata->mode, CS_MODE_DISABLED); | ||
241 | /* Disable the TMC only if it needs to */ | 237 | /* Disable the TMC only if it needs to */ |
242 | if (val != CS_MODE_DISABLED) | 238 | if (drvdata->mode != CS_MODE_DISABLED) { |
243 | tmc_etb_disable_hw(drvdata); | 239 | tmc_etb_disable_hw(drvdata); |
240 | drvdata->mode = CS_MODE_DISABLED; | ||
241 | } | ||
244 | 242 | ||
245 | spin_unlock_irqrestore(&drvdata->spinlock, flags); | 243 | spin_unlock_irqrestore(&drvdata->spinlock, flags); |
246 | 244 | ||
@@ -260,7 +258,7 @@ static int tmc_enable_etf_link(struct coresight_device *csdev, | |||
260 | } | 258 | } |
261 | 259 | ||
262 | tmc_etf_enable_hw(drvdata); | 260 | tmc_etf_enable_hw(drvdata); |
263 | local_set(&drvdata->mode, CS_MODE_SYSFS); | 261 | drvdata->mode = CS_MODE_SYSFS; |
264 | spin_unlock_irqrestore(&drvdata->spinlock, flags); | 262 | spin_unlock_irqrestore(&drvdata->spinlock, flags); |
265 | 263 | ||
266 | dev_info(drvdata->dev, "TMC-ETF enabled\n"); | 264 | dev_info(drvdata->dev, "TMC-ETF enabled\n"); |
@@ -280,7 +278,7 @@ static void tmc_disable_etf_link(struct coresight_device *csdev, | |||
280 | } | 278 | } |
281 | 279 | ||
282 | tmc_etf_disable_hw(drvdata); | 280 | tmc_etf_disable_hw(drvdata); |
283 | local_set(&drvdata->mode, CS_MODE_DISABLED); | 281 | drvdata->mode = CS_MODE_DISABLED; |
284 | spin_unlock_irqrestore(&drvdata->spinlock, flags); | 282 | spin_unlock_irqrestore(&drvdata->spinlock, flags); |
285 | 283 | ||
286 | dev_info(drvdata->dev, "TMC disabled\n"); | 284 | dev_info(drvdata->dev, "TMC disabled\n"); |
@@ -383,7 +381,7 @@ static void tmc_update_etf_buffer(struct coresight_device *csdev, | |||
383 | return; | 381 | return; |
384 | 382 | ||
385 | /* This shouldn't happen */ | 383 | /* This shouldn't happen */ |
386 | if (WARN_ON_ONCE(local_read(&drvdata->mode) != CS_MODE_PERF)) | 384 | if (WARN_ON_ONCE(drvdata->mode != CS_MODE_PERF)) |
387 | return; | 385 | return; |
388 | 386 | ||
389 | CS_UNLOCK(drvdata->base); | 387 | CS_UNLOCK(drvdata->base); |
@@ -504,7 +502,6 @@ const struct coresight_ops tmc_etf_cs_ops = { | |||
504 | 502 | ||
505 | int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) | 503 | int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) |
506 | { | 504 | { |
507 | long val; | ||
508 | enum tmc_mode mode; | 505 | enum tmc_mode mode; |
509 | int ret = 0; | 506 | int ret = 0; |
510 | unsigned long flags; | 507 | unsigned long flags; |
@@ -528,9 +525,8 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) | |||
528 | goto out; | 525 | goto out; |
529 | } | 526 | } |
530 | 527 | ||
531 | val = local_read(&drvdata->mode); | ||
532 | /* Don't interfere if operated from Perf */ | 528 | /* Don't interfere if operated from Perf */ |
533 | if (val == CS_MODE_PERF) { | 529 | if (drvdata->mode == CS_MODE_PERF) { |
534 | ret = -EINVAL; | 530 | ret = -EINVAL; |
535 | goto out; | 531 | goto out; |
536 | } | 532 | } |
@@ -542,7 +538,7 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) | |||
542 | } | 538 | } |
543 | 539 | ||
544 | /* Disable the TMC if need be */ | 540 | /* Disable the TMC if need be */ |
545 | if (val == CS_MODE_SYSFS) | 541 | if (drvdata->mode == CS_MODE_SYSFS) |
546 | tmc_etb_disable_hw(drvdata); | 542 | tmc_etb_disable_hw(drvdata); |
547 | 543 | ||
548 | drvdata->reading = true; | 544 | drvdata->reading = true; |
@@ -573,7 +569,7 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) | |||
573 | } | 569 | } |
574 | 570 | ||
575 | /* Re-enable the TMC if need be */ | 571 | /* Re-enable the TMC if need be */ |
576 | if (local_read(&drvdata->mode) == CS_MODE_SYSFS) { | 572 | if (drvdata->mode == CS_MODE_SYSFS) { |
577 | /* | 573 | /* |
578 | * The trace run will continue with the same allocated trace | 574 | * The trace run will continue with the same allocated trace |
579 | * buffer. As such zero-out the buffer so that we don't end | 575 | * buffer. As such zero-out the buffer so that we don't end |
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 886ea83c68e0..f23ef0c23303 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c | |||
@@ -86,7 +86,7 @@ static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) | |||
86 | * When operating in sysFS mode the content of the buffer needs to be | 86 | * When operating in sysFS mode the content of the buffer needs to be |
87 | * read before the TMC is disabled. | 87 | * read before the TMC is disabled. |
88 | */ | 88 | */ |
89 | if (local_read(&drvdata->mode) == CS_MODE_SYSFS) | 89 | if (drvdata->mode == CS_MODE_SYSFS) |
90 | tmc_etr_dump_hw(drvdata); | 90 | tmc_etr_dump_hw(drvdata); |
91 | tmc_disable_hw(drvdata); | 91 | tmc_disable_hw(drvdata); |
92 | 92 | ||
@@ -97,7 +97,6 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev, u32 mode) | |||
97 | { | 97 | { |
98 | int ret = 0; | 98 | int ret = 0; |
99 | bool used = false; | 99 | bool used = false; |
100 | long val; | ||
101 | unsigned long flags; | 100 | unsigned long flags; |
102 | void __iomem *vaddr = NULL; | 101 | void __iomem *vaddr = NULL; |
103 | dma_addr_t paddr; | 102 | dma_addr_t paddr; |
@@ -134,13 +133,12 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev, u32 mode) | |||
134 | goto out; | 133 | goto out; |
135 | } | 134 | } |
136 | 135 | ||
137 | val = local_xchg(&drvdata->mode, mode); | ||
138 | /* | 136 | /* |
139 | * In sysFS mode we can have multiple writers per sink. Since this | 137 | * In sysFS mode we can have multiple writers per sink. Since this |
140 | * sink is already enabled no memory is needed and the HW need not be | 138 | * sink is already enabled no memory is needed and the HW need not be |
141 | * touched. | 139 | * touched. |
142 | */ | 140 | */ |
143 | if (val == CS_MODE_SYSFS) | 141 | if (drvdata->mode == CS_MODE_SYSFS) |
144 | goto out; | 142 | goto out; |
145 | 143 | ||
146 | /* | 144 | /* |
@@ -157,6 +155,7 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev, u32 mode) | |||
157 | 155 | ||
158 | memset(drvdata->vaddr, 0, drvdata->size); | 156 | memset(drvdata->vaddr, 0, drvdata->size); |
159 | 157 | ||
158 | drvdata->mode = CS_MODE_SYSFS; | ||
160 | tmc_etr_enable_hw(drvdata); | 159 | tmc_etr_enable_hw(drvdata); |
161 | out: | 160 | out: |
162 | spin_unlock_irqrestore(&drvdata->spinlock, flags); | 161 | spin_unlock_irqrestore(&drvdata->spinlock, flags); |
@@ -174,7 +173,6 @@ out: | |||
174 | static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, u32 mode) | 173 | static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, u32 mode) |
175 | { | 174 | { |
176 | int ret = 0; | 175 | int ret = 0; |
177 | long val; | ||
178 | unsigned long flags; | 176 | unsigned long flags; |
179 | struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); | 177 | struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); |
180 | 178 | ||
@@ -188,17 +186,17 @@ static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, u32 mode) | |||
188 | goto out; | 186 | goto out; |
189 | } | 187 | } |
190 | 188 | ||
191 | val = local_xchg(&drvdata->mode, mode); | ||
192 | /* | 189 | /* |
193 | * In Perf mode there can be only one writer per sink. There | 190 | * In Perf mode there can be only one writer per sink. There |
194 | * is also no need to continue if the ETR is already operated | 191 | * is also no need to continue if the ETR is already operated |
195 | * from sysFS. | 192 | * from sysFS. |
196 | */ | 193 | */ |
197 | if (val != CS_MODE_DISABLED) { | 194 | if (drvdata->mode != CS_MODE_DISABLED) { |
198 | ret = -EINVAL; | 195 | ret = -EINVAL; |
199 | goto out; | 196 | goto out; |
200 | } | 197 | } |
201 | 198 | ||
199 | drvdata->mode = CS_MODE_PERF; | ||
202 | tmc_etr_enable_hw(drvdata); | 200 | tmc_etr_enable_hw(drvdata); |
203 | out: | 201 | out: |
204 | spin_unlock_irqrestore(&drvdata->spinlock, flags); | 202 | spin_unlock_irqrestore(&drvdata->spinlock, flags); |
@@ -221,7 +219,6 @@ static int tmc_enable_etr_sink(struct coresight_device *csdev, u32 mode) | |||
221 | 219 | ||
222 | static void tmc_disable_etr_sink(struct coresight_device *csdev) | 220 | static void tmc_disable_etr_sink(struct coresight_device *csdev) |
223 | { | 221 | { |
224 | long val; | ||
225 | unsigned long flags; | 222 | unsigned long flags; |
226 | struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); | 223 | struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); |
227 | 224 | ||
@@ -231,10 +228,11 @@ static void tmc_disable_etr_sink(struct coresight_device *csdev) | |||
231 | return; | 228 | return; |
232 | } | 229 | } |
233 | 230 | ||
234 | val = local_xchg(&drvdata->mode, CS_MODE_DISABLED); | ||
235 | /* Disable the TMC only if it needs to */ | 231 | /* Disable the TMC only if it needs to */ |
236 | if (val != CS_MODE_DISABLED) | 232 | if (drvdata->mode != CS_MODE_DISABLED) { |
237 | tmc_etr_disable_hw(drvdata); | 233 | tmc_etr_disable_hw(drvdata); |
234 | drvdata->mode = CS_MODE_DISABLED; | ||
235 | } | ||
238 | 236 | ||
239 | spin_unlock_irqrestore(&drvdata->spinlock, flags); | 237 | spin_unlock_irqrestore(&drvdata->spinlock, flags); |
240 | 238 | ||
@@ -253,7 +251,6 @@ const struct coresight_ops tmc_etr_cs_ops = { | |||
253 | int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) | 251 | int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) |
254 | { | 252 | { |
255 | int ret = 0; | 253 | int ret = 0; |
256 | long val; | ||
257 | unsigned long flags; | 254 | unsigned long flags; |
258 | 255 | ||
259 | /* config types are set a boot time and never change */ | 256 | /* config types are set a boot time and never change */ |
@@ -266,9 +263,8 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) | |||
266 | goto out; | 263 | goto out; |
267 | } | 264 | } |
268 | 265 | ||
269 | val = local_read(&drvdata->mode); | ||
270 | /* Don't interfere if operated from Perf */ | 266 | /* Don't interfere if operated from Perf */ |
271 | if (val == CS_MODE_PERF) { | 267 | if (drvdata->mode == CS_MODE_PERF) { |
272 | ret = -EINVAL; | 268 | ret = -EINVAL; |
273 | goto out; | 269 | goto out; |
274 | } | 270 | } |
@@ -280,7 +276,7 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) | |||
280 | } | 276 | } |
281 | 277 | ||
282 | /* Disable the TMC if need be */ | 278 | /* Disable the TMC if need be */ |
283 | if (val == CS_MODE_SYSFS) | 279 | if (drvdata->mode == CS_MODE_SYSFS) |
284 | tmc_etr_disable_hw(drvdata); | 280 | tmc_etr_disable_hw(drvdata); |
285 | 281 | ||
286 | drvdata->reading = true; | 282 | drvdata->reading = true; |
@@ -303,7 +299,7 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata) | |||
303 | spin_lock_irqsave(&drvdata->spinlock, flags); | 299 | spin_lock_irqsave(&drvdata->spinlock, flags); |
304 | 300 | ||
305 | /* RE-enable the TMC if need be */ | 301 | /* RE-enable the TMC if need be */ |
306 | if (local_read(&drvdata->mode) == CS_MODE_SYSFS) { | 302 | if (drvdata->mode == CS_MODE_SYSFS) { |
307 | /* | 303 | /* |
308 | * The trace run will continue with the same allocated trace | 304 | * The trace run will continue with the same allocated trace |
309 | * buffer. The trace buffer is cleared in tmc_etr_enable_hw(), | 305 | * buffer. The trace buffer is cleared in tmc_etr_enable_hw(), |
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 44b3ae346118..51c01851533e 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h | |||
@@ -117,7 +117,7 @@ struct tmc_drvdata { | |||
117 | void __iomem *vaddr; | 117 | void __iomem *vaddr; |
118 | u32 size; | 118 | u32 size; |
119 | u32 len; | 119 | u32 len; |
120 | local_t mode; | 120 | u32 mode; |
121 | enum tmc_config_type config_type; | 121 | enum tmc_config_type config_type; |
122 | enum tmc_mem_intf_width memwidth; | 122 | enum tmc_mem_intf_width memwidth; |
123 | u32 trigger_cntr; | 123 | u32 trigger_cntr; |