5 files changed, 39 insertions, 39 deletions

diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c
index af42e94f6846..a0f5bdd69491 100644
--- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
@@ -340,9 +340,9 @@ static void ch7xxx_dump_regs(struct intel_dvo_device *dvo)
         for (i = 0; i < CH7xxx_NUM_REGS; i++) {
                 uint8_t val;
                 if ((i % 8) == 0)
-                        DRM_LOG_KMS("\n %02X: ", i);
+                        DRM_DEBUG_KMS("\n %02X: ", i);
                 ch7xxx_readb(dvo, i, &val);
-                DRM_LOG_KMS("%02X ", val);
+                DRM_DEBUG_KMS("%02X ", val);
         }
 }
 
diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
index baaf65bf0bdd..0f1865d7d4d8 100644
--- a/drivers/gpu/drm/i915/dvo_ivch.c
+++ b/drivers/gpu/drm/i915/dvo_ivch.c
@@ -377,41 +377,41 @@ static void ivch_dump_regs(struct intel_dvo_device *dvo)
         uint16_t val;
 
         ivch_read(dvo, VR00, &val);
-        DRM_LOG_KMS("VR00: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR00: 0x%04x\n", val);
         ivch_read(dvo, VR01, &val);
-        DRM_LOG_KMS("VR01: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR01: 0x%04x\n", val);
         ivch_read(dvo, VR30, &val);
-        DRM_LOG_KMS("VR30: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR30: 0x%04x\n", val);
         ivch_read(dvo, VR40, &val);
-        DRM_LOG_KMS("VR40: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR40: 0x%04x\n", val);
 
         /* GPIO registers */
         ivch_read(dvo, VR80, &val);
-        DRM_LOG_KMS("VR80: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR80: 0x%04x\n", val);
         ivch_read(dvo, VR81, &val);
-        DRM_LOG_KMS("VR81: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR81: 0x%04x\n", val);
         ivch_read(dvo, VR82, &val);
-        DRM_LOG_KMS("VR82: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR82: 0x%04x\n", val);
         ivch_read(dvo, VR83, &val);
-        DRM_LOG_KMS("VR83: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR83: 0x%04x\n", val);
         ivch_read(dvo, VR84, &val);
-        DRM_LOG_KMS("VR84: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR84: 0x%04x\n", val);
         ivch_read(dvo, VR85, &val);
-        DRM_LOG_KMS("VR85: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR85: 0x%04x\n", val);
         ivch_read(dvo, VR86, &val);
-        DRM_LOG_KMS("VR86: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR86: 0x%04x\n", val);
         ivch_read(dvo, VR87, &val);
-        DRM_LOG_KMS("VR87: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR87: 0x%04x\n", val);
         ivch_read(dvo, VR88, &val);
-        DRM_LOG_KMS("VR88: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR88: 0x%04x\n", val);
 
         /* Scratch register 0 - AIM Panel type */
         ivch_read(dvo, VR8E, &val);
-        DRM_LOG_KMS("VR8E: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR8E: 0x%04x\n", val);
 
         /* Scratch register 1 - Status register */
         ivch_read(dvo, VR8F, &val);
-        DRM_LOG_KMS("VR8F: 0x%04x\n", val);
+        DRM_DEBUG_KMS("VR8F: 0x%04x\n", val);
 }
 
 static void ivch_destroy(struct intel_dvo_device *dvo)
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c b/drivers/gpu/drm/i915/dvo_ns2501.c
index 954acb2c7021..8155ded79079 100644
--- a/drivers/gpu/drm/i915/dvo_ns2501.c
+++ b/drivers/gpu/drm/i915/dvo_ns2501.c
@@ -490,15 +490,15 @@ static void ns2501_dump_regs(struct intel_dvo_device *dvo)
         uint8_t val;
 
         ns2501_readb(dvo, NS2501_FREQ_LO, &val);
-        DRM_LOG_KMS("NS2501_FREQ_LO: 0x%02x\n", val);
+        DRM_DEBUG_KMS("NS2501_FREQ_LO: 0x%02x\n", val);
         ns2501_readb(dvo, NS2501_FREQ_HI, &val);
-        DRM_LOG_KMS("NS2501_FREQ_HI: 0x%02x\n", val);
+        DRM_DEBUG_KMS("NS2501_FREQ_HI: 0x%02x\n", val);
         ns2501_readb(dvo, NS2501_REG8, &val);
-        DRM_LOG_KMS("NS2501_REG8: 0x%02x\n", val);
+        DRM_DEBUG_KMS("NS2501_REG8: 0x%02x\n", val);
         ns2501_readb(dvo, NS2501_REG9, &val);
-        DRM_LOG_KMS("NS2501_REG9: 0x%02x\n", val);
+        DRM_DEBUG_KMS("NS2501_REG9: 0x%02x\n", val);
         ns2501_readb(dvo, NS2501_REGC, &val);
-        DRM_LOG_KMS("NS2501_REGC: 0x%02x\n", val);
+        DRM_DEBUG_KMS("NS2501_REGC: 0x%02x\n", val);
 }
 
 static void ns2501_destroy(struct intel_dvo_device *dvo)
diff --git a/drivers/gpu/drm/i915/dvo_sil164.c b/drivers/gpu/drm/i915/dvo_sil164.c
index 4debd32e3e4c..7b3e9e936200 100644
--- a/drivers/gpu/drm/i915/dvo_sil164.c
+++ b/drivers/gpu/drm/i915/dvo_sil164.c
@@ -246,15 +246,15 @@ static void sil164_dump_regs(struct intel_dvo_device *dvo)
         uint8_t val;
 
         sil164_readb(dvo, SIL164_FREQ_LO, &val);
-        DRM_LOG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
+        DRM_DEBUG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
         sil164_readb(dvo, SIL164_FREQ_HI, &val);
-        DRM_LOG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
+        DRM_DEBUG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
         sil164_readb(dvo, SIL164_REG8, &val);
-        DRM_LOG_KMS("SIL164_REG8: 0x%02x\n", val);
+        DRM_DEBUG_KMS("SIL164_REG8: 0x%02x\n", val);
         sil164_readb(dvo, SIL164_REG9, &val);
-        DRM_LOG_KMS("SIL164_REG9: 0x%02x\n", val);
+        DRM_DEBUG_KMS("SIL164_REG9: 0x%02x\n", val);
         sil164_readb(dvo, SIL164_REGC, &val);
-        DRM_LOG_KMS("SIL164_REGC: 0x%02x\n", val);
+        DRM_DEBUG_KMS("SIL164_REGC: 0x%02x\n", val);
 }
 
 static void sil164_destroy(struct intel_dvo_device *dvo)
diff --git a/drivers/gpu/drm/i915/dvo_tfp410.c b/drivers/gpu/drm/i915/dvo_tfp410.c
index e17f1b07e915..12ea4b164692 100644
--- a/drivers/gpu/drm/i915/dvo_tfp410.c
+++ b/drivers/gpu/drm/i915/dvo_tfp410.c
@@ -267,33 +267,33 @@ static void tfp410_dump_regs(struct intel_dvo_device *dvo)
         uint8_t val, val2;
 
         tfp410_readb(dvo, TFP410_REV, &val);
-        DRM_LOG_KMS("TFP410_REV: 0x%02X\n", val);
+        DRM_DEBUG_KMS("TFP410_REV: 0x%02X\n", val);
         tfp410_readb(dvo, TFP410_CTL_1, &val);
-        DRM_LOG_KMS("TFP410_CTL1: 0x%02X\n", val);
+        DRM_DEBUG_KMS("TFP410_CTL1: 0x%02X\n", val);
         tfp410_readb(dvo, TFP410_CTL_2, &val);
-        DRM_LOG_KMS("TFP410_CTL2: 0x%02X\n", val);
+        DRM_DEBUG_KMS("TFP410_CTL2: 0x%02X\n", val);
         tfp410_readb(dvo, TFP410_CTL_3, &val);
-        DRM_LOG_KMS("TFP410_CTL3: 0x%02X\n", val);
+        DRM_DEBUG_KMS("TFP410_CTL3: 0x%02X\n", val);
         tfp410_readb(dvo, TFP410_USERCFG, &val);
-        DRM_LOG_KMS("TFP410_USERCFG: 0x%02X\n", val);
+        DRM_DEBUG_KMS("TFP410_USERCFG: 0x%02X\n", val);
         tfp410_readb(dvo, TFP410_DE_DLY, &val);
-        DRM_LOG_KMS("TFP410_DE_DLY: 0x%02X\n", val);
+        DRM_DEBUG_KMS("TFP410_DE_DLY: 0x%02X\n", val);
         tfp410_readb(dvo, TFP410_DE_CTL, &val);
-        DRM_LOG_KMS("TFP410_DE_CTL: 0x%02X\n", val);
+        DRM_DEBUG_KMS("TFP410_DE_CTL: 0x%02X\n", val);
         tfp410_readb(dvo, TFP410_DE_TOP, &val);
-        DRM_LOG_KMS("TFP410_DE_TOP: 0x%02X\n", val);
+        DRM_DEBUG_KMS("TFP410_DE_TOP: 0x%02X\n", val);
         tfp410_readb(dvo, TFP410_DE_CNT_LO, &val);
         tfp410_readb(dvo, TFP410_DE_CNT_HI, &val2);
-        DRM_LOG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
+        DRM_DEBUG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
         tfp410_readb(dvo, TFP410_DE_LIN_LO, &val);
         tfp410_readb(dvo, TFP410_DE_LIN_HI, &val2);
-        DRM_LOG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
+        DRM_DEBUG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
         tfp410_readb(dvo, TFP410_H_RES_LO, &val);
         tfp410_readb(dvo, TFP410_H_RES_HI, &val2);
-        DRM_LOG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val);
+        DRM_DEBUG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val);
         tfp410_readb(dvo, TFP410_V_RES_LO, &val);
         tfp410_readb(dvo, TFP410_V_RES_HI, &val2);
-        DRM_LOG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val);
+        DRM_DEBUG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val);
 }
 
 static void tfp410_destroy(struct intel_dvo_device *dvo)