diff options
| -rw-r--r-- | arch/arm64/include/asm/tlb.h | 3 | ||||
| -rw-r--r-- | arch/arm64/include/asm/tlbflush.h | 13 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h index c028fe37456f..53d9c354219f 100644 --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h | |||
| @@ -48,6 +48,7 @@ static inline void tlb_flush(struct mmu_gather *tlb) | |||
| 48 | static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, | 48 | static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, |
| 49 | unsigned long addr) | 49 | unsigned long addr) |
| 50 | { | 50 | { |
| 51 | __flush_tlb_pgtable(tlb->mm, addr); | ||
| 51 | pgtable_page_dtor(pte); | 52 | pgtable_page_dtor(pte); |
| 52 | tlb_remove_entry(tlb, pte); | 53 | tlb_remove_entry(tlb, pte); |
| 53 | } | 54 | } |
| @@ -56,6 +57,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, | |||
| 56 | static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, | 57 | static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, |
| 57 | unsigned long addr) | 58 | unsigned long addr) |
| 58 | { | 59 | { |
| 60 | __flush_tlb_pgtable(tlb->mm, addr); | ||
| 59 | tlb_remove_entry(tlb, virt_to_page(pmdp)); | 61 | tlb_remove_entry(tlb, virt_to_page(pmdp)); |
| 60 | } | 62 | } |
| 61 | #endif | 63 | #endif |
| @@ -64,6 +66,7 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, | |||
| 64 | static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp, | 66 | static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp, |
| 65 | unsigned long addr) | 67 | unsigned long addr) |
| 66 | { | 68 | { |
| 69 | __flush_tlb_pgtable(tlb->mm, addr); | ||
| 67 | tlb_remove_entry(tlb, virt_to_page(pudp)); | 70 | tlb_remove_entry(tlb, virt_to_page(pudp)); |
| 68 | } | 71 | } |
| 69 | #endif | 72 | #endif |
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index 4abe9b945f77..c3bb05b98616 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h | |||
| @@ -144,6 +144,19 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end | |||
| 144 | } | 144 | } |
| 145 | 145 | ||
| 146 | /* | 146 | /* |
| 147 | * Used to invalidate the TLB (walk caches) corresponding to intermediate page | ||
| 148 | * table levels (pgd/pud/pmd). | ||
| 149 | */ | ||
| 150 | static inline void __flush_tlb_pgtable(struct mm_struct *mm, | ||
| 151 | unsigned long uaddr) | ||
| 152 | { | ||
| 153 | unsigned long addr = uaddr >> 12 | ((unsigned long)ASID(mm) << 48); | ||
| 154 | |||
| 155 | dsb(ishst); | ||
| 156 | asm("tlbi vae1is, %0" : : "r" (addr)); | ||
| 157 | dsb(ish); | ||
| 158 | } | ||
| 159 | /* | ||
| 147 | * On AArch64, the cache coherency is handled via the set_pte_at() function. | 160 | * On AArch64, the cache coherency is handled via the set_pte_at() function. |
| 148 | */ | 161 | */ |
| 149 | static inline void update_mmu_cache(struct vm_area_struct *vma, | 162 | static inline void update_mmu_cache(struct vm_area_struct *vma, |
